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019eee2e HM |
1 | /* |
2 | * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> | |
3 | * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> | |
4 | * Copyright (C) 2006 Michael Buesch <m@bues.ch> | |
5 | * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> | |
6 | * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
14 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
15 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
16 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
17 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
18 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
19 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
20 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
21 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
22 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
27 | */ | |
28 | ||
29 | #include <bcm47xx.h> | |
30 | #include <nvram.h> | |
31 | ||
32 | static void create_key(const char *prefix, const char *postfix, | |
33 | const char *name, char *buf, int len) | |
34 | { | |
35 | if (prefix && postfix) | |
36 | snprintf(buf, len, "%s%s%s", prefix, name, postfix); | |
37 | else if (prefix) | |
38 | snprintf(buf, len, "%s%s", prefix, name); | |
39 | else if (postfix) | |
40 | snprintf(buf, len, "%s%s", name, postfix); | |
41 | else | |
42 | snprintf(buf, len, "%s", name); | |
43 | } | |
44 | ||
45 | #define NVRAM_READ_VAL(type) \ | |
46 | static void nvram_read_ ## type (const char *prefix, \ | |
47 | const char *postfix, const char *name, \ | |
48 | type *val, type allset) \ | |
49 | { \ | |
50 | char buf[100]; \ | |
51 | char key[40]; \ | |
52 | int err; \ | |
53 | type var; \ | |
54 | \ | |
55 | create_key(prefix, postfix, name, key, sizeof(key)); \ | |
56 | \ | |
57 | err = nvram_getenv(key, buf, sizeof(buf)); \ | |
58 | if (err < 0) \ | |
59 | return; \ | |
60 | err = kstrto ## type (buf, 0, &var); \ | |
61 | if (err) { \ | |
62 | pr_warn("can not parse nvram name %s with value %s" \ | |
63 | " got %i", key, buf, err); \ | |
64 | return; \ | |
65 | } \ | |
66 | if (allset && var == allset) \ | |
67 | return; \ | |
68 | *val = var; \ | |
69 | } | |
70 | ||
71 | NVRAM_READ_VAL(u8) | |
72 | NVRAM_READ_VAL(s8) | |
73 | NVRAM_READ_VAL(u16) | |
74 | NVRAM_READ_VAL(u32) | |
75 | ||
76 | #undef NVRAM_READ_VAL | |
77 | ||
78 | static void nvram_read_u32_2(const char *prefix, const char *name, | |
79 | u16 *val_lo, u16 *val_hi) | |
80 | { | |
81 | char buf[100]; | |
82 | char key[40]; | |
83 | int err; | |
84 | u32 val; | |
85 | ||
86 | create_key(prefix, NULL, name, key, sizeof(key)); | |
87 | ||
88 | err = nvram_getenv(key, buf, sizeof(buf)); | |
89 | if (err < 0) | |
90 | return; | |
91 | err = kstrtou32(buf, 0, &val); | |
92 | if (err) { | |
93 | pr_warn("can not parse nvram name %s with value %s got %i", | |
94 | key, buf, err); | |
95 | return; | |
96 | } | |
97 | *val_lo = (val & 0x0000FFFFU); | |
98 | *val_hi = (val & 0xFFFF0000U) >> 16; | |
99 | } | |
100 | ||
101 | static void nvram_read_leddc(const char *prefix, const char *name, | |
102 | u8 *leddc_on_time, u8 *leddc_off_time) | |
103 | { | |
104 | char buf[100]; | |
105 | char key[40]; | |
106 | int err; | |
107 | u32 val; | |
108 | ||
109 | create_key(prefix, NULL, name, key, sizeof(key)); | |
110 | ||
111 | err = nvram_getenv(key, buf, sizeof(buf)); | |
112 | if (err < 0) | |
113 | return; | |
114 | err = kstrtou32(buf, 0, &val); | |
115 | if (err) { | |
116 | pr_warn("can not parse nvram name %s with value %s got %i", | |
117 | key, buf, err); | |
118 | return; | |
119 | } | |
120 | ||
121 | if (val == 0xffff || val == 0xffffffff) | |
122 | return; | |
123 | ||
124 | *leddc_on_time = val & 0xff; | |
125 | *leddc_off_time = (val >> 16) & 0xff; | |
126 | } | |
127 | ||
128 | static void nvram_read_macaddr(const char *prefix, const char *name, | |
129 | u8 (*val)[6]) | |
130 | { | |
131 | char buf[100]; | |
132 | char key[40]; | |
133 | int err; | |
134 | ||
135 | create_key(prefix, NULL, name, key, sizeof(key)); | |
136 | ||
137 | err = nvram_getenv(key, buf, sizeof(buf)); | |
138 | if (err < 0) | |
139 | return; | |
140 | nvram_parse_macaddr(buf, *val); | |
141 | } | |
142 | ||
143 | static void nvram_read_alpha2(const char *prefix, const char *name, | |
144 | char (*val)[2]) | |
145 | { | |
146 | char buf[10]; | |
147 | char key[40]; | |
148 | int err; | |
149 | ||
150 | create_key(prefix, NULL, name, key, sizeof(key)); | |
151 | ||
152 | err = nvram_getenv(key, buf, sizeof(buf)); | |
153 | if (err < 0) | |
154 | return; | |
155 | if (buf[0] == '0') | |
156 | return; | |
157 | if (strlen(buf) > 2) { | |
158 | pr_warn("alpha2 is too long %s", buf); | |
159 | return; | |
160 | } | |
161 | memcpy(val, buf, sizeof(val)); | |
162 | } | |
163 | ||
164 | static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom, | |
165 | const char *prefix) | |
166 | { | |
167 | nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0); | |
a2559556 HM |
168 | if (!sprom->board_rev) |
169 | nvram_read_u16(NULL, NULL, "boardrev", &sprom->board_rev, 0); | |
019eee2e HM |
170 | nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0); |
171 | nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff); | |
172 | nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff); | |
173 | nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff); | |
174 | nvram_read_u8(prefix, NULL, "ledbh3", &sprom->gpio3, 0xff); | |
175 | nvram_read_u8(prefix, NULL, "aa2g", &sprom->ant_available_bg, 0); | |
176 | nvram_read_u8(prefix, NULL, "aa5g", &sprom->ant_available_a, 0); | |
177 | nvram_read_s8(prefix, NULL, "ag0", &sprom->antenna_gain.a0, 0); | |
178 | nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.a1, 0); | |
179 | nvram_read_alpha2(prefix, "ccode", &sprom->alpha2); | |
180 | } | |
181 | ||
182 | static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom, | |
183 | const char *prefix) | |
184 | { | |
185 | nvram_read_u16(prefix, NULL, "pa0b0", &sprom->pa0b0, 0); | |
186 | nvram_read_u16(prefix, NULL, "pa0b1", &sprom->pa0b1, 0); | |
187 | nvram_read_u16(prefix, NULL, "pa0b2", &sprom->pa0b2, 0); | |
188 | nvram_read_u8(prefix, NULL, "pa0itssit", &sprom->itssi_bg, 0); | |
189 | nvram_read_u8(prefix, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0); | |
190 | nvram_read_u16(prefix, NULL, "pa1b0", &sprom->pa1b0, 0); | |
191 | nvram_read_u16(prefix, NULL, "pa1b1", &sprom->pa1b1, 0); | |
192 | nvram_read_u16(prefix, NULL, "pa1b2", &sprom->pa1b2, 0); | |
193 | nvram_read_u8(prefix, NULL, "pa1itssit", &sprom->itssi_a, 0); | |
194 | nvram_read_u8(prefix, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0); | |
195 | } | |
196 | ||
197 | static void bcm47xx_fill_sprom_r1(struct ssb_sprom *sprom, const char *prefix) | |
198 | { | |
199 | nvram_read_u16(prefix, NULL, "boardflags", &sprom->boardflags_lo, 0); | |
200 | nvram_read_u8(prefix, NULL, "cc", &sprom->country_code, 0); | |
201 | } | |
202 | ||
203 | static void bcm47xx_fill_sprom_r2389(struct ssb_sprom *sprom, | |
204 | const char *prefix) | |
205 | { | |
206 | nvram_read_u8(prefix, NULL, "opo", &sprom->opo, 0); | |
207 | nvram_read_u16(prefix, NULL, "pa1lob0", &sprom->pa1lob0, 0); | |
208 | nvram_read_u16(prefix, NULL, "pa1lob1", &sprom->pa1lob1, 0); | |
209 | nvram_read_u16(prefix, NULL, "pa1lob2", &sprom->pa1lob2, 0); | |
210 | nvram_read_u16(prefix, NULL, "pa1hib0", &sprom->pa1hib0, 0); | |
211 | nvram_read_u16(prefix, NULL, "pa1hib1", &sprom->pa1hib1, 0); | |
212 | nvram_read_u16(prefix, NULL, "pa1hib2", &sprom->pa1hib2, 0); | |
213 | nvram_read_u8(prefix, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0); | |
214 | nvram_read_u8(prefix, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0); | |
215 | } | |
216 | ||
217 | static void bcm47xx_fill_sprom_r2(struct ssb_sprom *sprom, const char *prefix) | |
218 | { | |
219 | nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo, | |
220 | &sprom->boardflags_hi); | |
221 | nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0); | |
222 | } | |
223 | ||
224 | static void bcm47xx_fill_sprom_r389(struct ssb_sprom *sprom, const char *prefix) | |
225 | { | |
226 | nvram_read_u8(prefix, NULL, "bxa2g", &sprom->bxa2g, 0); | |
227 | nvram_read_u8(prefix, NULL, "rssisav2g", &sprom->rssisav2g, 0); | |
228 | nvram_read_u8(prefix, NULL, "rssismc2g", &sprom->rssismc2g, 0); | |
229 | nvram_read_u8(prefix, NULL, "rssismf2g", &sprom->rssismf2g, 0); | |
230 | nvram_read_u8(prefix, NULL, "bxa5g", &sprom->bxa5g, 0); | |
231 | nvram_read_u8(prefix, NULL, "rssisav5g", &sprom->rssisav5g, 0); | |
232 | nvram_read_u8(prefix, NULL, "rssismc5g", &sprom->rssismc5g, 0); | |
233 | nvram_read_u8(prefix, NULL, "rssismf5g", &sprom->rssismf5g, 0); | |
234 | nvram_read_u8(prefix, NULL, "tri2g", &sprom->tri2g, 0); | |
235 | nvram_read_u8(prefix, NULL, "tri5g", &sprom->tri5g, 0); | |
236 | nvram_read_u8(prefix, NULL, "tri5gl", &sprom->tri5gl, 0); | |
237 | nvram_read_u8(prefix, NULL, "tri5gh", &sprom->tri5gh, 0); | |
238 | nvram_read_s8(prefix, NULL, "rxpo2g", &sprom->rxpo2g, 0); | |
239 | nvram_read_s8(prefix, NULL, "rxpo5g", &sprom->rxpo5g, 0); | |
240 | } | |
241 | ||
242 | static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix) | |
243 | { | |
244 | nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo, | |
245 | &sprom->boardflags_hi); | |
246 | nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0); | |
247 | nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0); | |
248 | nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time, | |
249 | &sprom->leddc_off_time); | |
250 | } | |
251 | ||
252 | static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom, | |
253 | const char *prefix) | |
254 | { | |
255 | nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo, | |
256 | &sprom->boardflags_hi); | |
257 | nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo, | |
258 | &sprom->boardflags2_hi); | |
259 | nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0); | |
260 | nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0); | |
261 | nvram_read_s8(prefix, NULL, "ag2", &sprom->antenna_gain.a2, 0); | |
262 | nvram_read_s8(prefix, NULL, "ag3", &sprom->antenna_gain.a3, 0); | |
263 | nvram_read_u8(prefix, NULL, "txchain", &sprom->txchain, 0xf); | |
264 | nvram_read_u8(prefix, NULL, "rxchain", &sprom->rxchain, 0xf); | |
265 | nvram_read_u8(prefix, NULL, "antswitch", &sprom->antswitch, 0xff); | |
266 | nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time, | |
267 | &sprom->leddc_off_time); | |
268 | } | |
269 | ||
270 | static void bcm47xx_fill_sprom_r458(struct ssb_sprom *sprom, const char *prefix) | |
271 | { | |
272 | nvram_read_u16(prefix, NULL, "cck2gpo", &sprom->cck2gpo, 0); | |
273 | nvram_read_u32(prefix, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0); | |
274 | nvram_read_u32(prefix, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0); | |
275 | nvram_read_u32(prefix, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0); | |
276 | nvram_read_u32(prefix, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0); | |
277 | nvram_read_u16(prefix, NULL, "cddpo", &sprom->cddpo, 0); | |
278 | nvram_read_u16(prefix, NULL, "stbcpo", &sprom->stbcpo, 0); | |
279 | nvram_read_u16(prefix, NULL, "bw40po", &sprom->bw40po, 0); | |
280 | nvram_read_u16(prefix, NULL, "bwduppo", &sprom->bwduppo, 0); | |
281 | nvram_read_u16(prefix, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0); | |
282 | nvram_read_u16(prefix, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0); | |
283 | nvram_read_u16(prefix, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0); | |
284 | nvram_read_u16(prefix, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0); | |
285 | nvram_read_u16(prefix, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0); | |
286 | nvram_read_u16(prefix, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0); | |
287 | nvram_read_u16(prefix, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0); | |
288 | nvram_read_u16(prefix, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0); | |
289 | nvram_read_u16(prefix, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0); | |
290 | nvram_read_u16(prefix, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0); | |
291 | nvram_read_u16(prefix, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0); | |
292 | nvram_read_u16(prefix, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0); | |
293 | nvram_read_u16(prefix, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0); | |
294 | nvram_read_u16(prefix, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0); | |
295 | nvram_read_u16(prefix, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0); | |
296 | nvram_read_u16(prefix, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0); | |
297 | nvram_read_u16(prefix, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0); | |
298 | nvram_read_u16(prefix, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0); | |
299 | nvram_read_u16(prefix, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0); | |
300 | nvram_read_u16(prefix, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0); | |
301 | nvram_read_u16(prefix, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0); | |
302 | nvram_read_u16(prefix, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0); | |
303 | nvram_read_u16(prefix, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0); | |
304 | nvram_read_u16(prefix, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0); | |
305 | nvram_read_u16(prefix, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0); | |
306 | nvram_read_u16(prefix, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0); | |
307 | nvram_read_u16(prefix, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0); | |
308 | nvram_read_u16(prefix, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0); | |
309 | nvram_read_u16(prefix, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0); | |
310 | nvram_read_u16(prefix, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0); | |
311 | nvram_read_u16(prefix, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0); | |
312 | nvram_read_u16(prefix, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0); | |
313 | } | |
314 | ||
315 | static void bcm47xx_fill_sprom_r45(struct ssb_sprom *sprom, const char *prefix) | |
316 | { | |
317 | nvram_read_u8(prefix, NULL, "txpid2ga0", &sprom->txpid2g[0], 0); | |
318 | nvram_read_u8(prefix, NULL, "txpid2ga1", &sprom->txpid2g[1], 0); | |
319 | nvram_read_u8(prefix, NULL, "txpid2ga2", &sprom->txpid2g[2], 0); | |
320 | nvram_read_u8(prefix, NULL, "txpid2ga3", &sprom->txpid2g[3], 0); | |
321 | nvram_read_u8(prefix, NULL, "txpid5ga0", &sprom->txpid5g[0], 0); | |
322 | nvram_read_u8(prefix, NULL, "txpid5ga1", &sprom->txpid5g[1], 0); | |
323 | nvram_read_u8(prefix, NULL, "txpid5ga2", &sprom->txpid5g[2], 0); | |
324 | nvram_read_u8(prefix, NULL, "txpid5ga3", &sprom->txpid5g[3], 0); | |
325 | nvram_read_u8(prefix, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0); | |
326 | nvram_read_u8(prefix, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0); | |
327 | nvram_read_u8(prefix, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0); | |
328 | nvram_read_u8(prefix, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0); | |
329 | nvram_read_u8(prefix, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0); | |
330 | nvram_read_u8(prefix, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0); | |
331 | nvram_read_u8(prefix, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0); | |
332 | nvram_read_u8(prefix, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0); | |
333 | } | |
334 | ||
335 | static void bcm47xx_fill_sprom_r89(struct ssb_sprom *sprom, const char *prefix) | |
336 | { | |
337 | nvram_read_u8(prefix, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0); | |
338 | nvram_read_u8(prefix, NULL, "extpagain2g", | |
339 | &sprom->fem.ghz2.extpa_gain, 0); | |
340 | nvram_read_u8(prefix, NULL, "pdetrange2g", | |
341 | &sprom->fem.ghz2.pdet_range, 0); | |
342 | nvram_read_u8(prefix, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0); | |
343 | nvram_read_u8(prefix, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0); | |
344 | nvram_read_u8(prefix, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0); | |
345 | nvram_read_u8(prefix, NULL, "extpagain5g", | |
346 | &sprom->fem.ghz5.extpa_gain, 0); | |
347 | nvram_read_u8(prefix, NULL, "pdetrange5g", | |
348 | &sprom->fem.ghz5.pdet_range, 0); | |
349 | nvram_read_u8(prefix, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0); | |
350 | nvram_read_u8(prefix, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0); | |
351 | nvram_read_u8(prefix, NULL, "tempthresh", &sprom->tempthresh, 0); | |
352 | nvram_read_u8(prefix, NULL, "tempoffset", &sprom->tempoffset, 0); | |
353 | nvram_read_u16(prefix, NULL, "rawtempsense", &sprom->rawtempsense, 0); | |
354 | nvram_read_u8(prefix, NULL, "measpower", &sprom->measpower, 0); | |
355 | nvram_read_u8(prefix, NULL, "tempsense_slope", | |
356 | &sprom->tempsense_slope, 0); | |
357 | nvram_read_u8(prefix, NULL, "tempcorrx", &sprom->tempcorrx, 0); | |
358 | nvram_read_u8(prefix, NULL, "tempsense_option", | |
359 | &sprom->tempsense_option, 0); | |
360 | nvram_read_u8(prefix, NULL, "freqoffset_corr", | |
361 | &sprom->freqoffset_corr, 0); | |
362 | nvram_read_u8(prefix, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0); | |
363 | nvram_read_u8(prefix, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0); | |
364 | nvram_read_u8(prefix, NULL, "elna2g", &sprom->elna2g, 0); | |
365 | nvram_read_u8(prefix, NULL, "elna5g", &sprom->elna5g, 0); | |
366 | nvram_read_u8(prefix, NULL, "phycal_tempdelta", | |
367 | &sprom->phycal_tempdelta, 0); | |
368 | nvram_read_u8(prefix, NULL, "temps_period", &sprom->temps_period, 0); | |
369 | nvram_read_u8(prefix, NULL, "temps_hysteresis", | |
370 | &sprom->temps_hysteresis, 0); | |
371 | nvram_read_u8(prefix, NULL, "measpower1", &sprom->measpower1, 0); | |
372 | nvram_read_u8(prefix, NULL, "measpower2", &sprom->measpower2, 0); | |
373 | nvram_read_u8(prefix, NULL, "rxgainerr2ga0", | |
374 | &sprom->rxgainerr2ga[0], 0); | |
375 | nvram_read_u8(prefix, NULL, "rxgainerr2ga1", | |
376 | &sprom->rxgainerr2ga[1], 0); | |
377 | nvram_read_u8(prefix, NULL, "rxgainerr2ga2", | |
378 | &sprom->rxgainerr2ga[2], 0); | |
379 | nvram_read_u8(prefix, NULL, "rxgainerr5gla0", | |
380 | &sprom->rxgainerr5gla[0], 0); | |
381 | nvram_read_u8(prefix, NULL, "rxgainerr5gla1", | |
382 | &sprom->rxgainerr5gla[1], 0); | |
383 | nvram_read_u8(prefix, NULL, "rxgainerr5gla2", | |
384 | &sprom->rxgainerr5gla[2], 0); | |
385 | nvram_read_u8(prefix, NULL, "rxgainerr5gma0", | |
386 | &sprom->rxgainerr5gma[0], 0); | |
387 | nvram_read_u8(prefix, NULL, "rxgainerr5gma1", | |
388 | &sprom->rxgainerr5gma[1], 0); | |
389 | nvram_read_u8(prefix, NULL, "rxgainerr5gma2", | |
390 | &sprom->rxgainerr5gma[2], 0); | |
391 | nvram_read_u8(prefix, NULL, "rxgainerr5gha0", | |
392 | &sprom->rxgainerr5gha[0], 0); | |
393 | nvram_read_u8(prefix, NULL, "rxgainerr5gha1", | |
394 | &sprom->rxgainerr5gha[1], 0); | |
395 | nvram_read_u8(prefix, NULL, "rxgainerr5gha2", | |
396 | &sprom->rxgainerr5gha[2], 0); | |
397 | nvram_read_u8(prefix, NULL, "rxgainerr5gua0", | |
398 | &sprom->rxgainerr5gua[0], 0); | |
399 | nvram_read_u8(prefix, NULL, "rxgainerr5gua1", | |
400 | &sprom->rxgainerr5gua[1], 0); | |
401 | nvram_read_u8(prefix, NULL, "rxgainerr5gua2", | |
402 | &sprom->rxgainerr5gua[2], 0); | |
403 | nvram_read_u8(prefix, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0); | |
404 | nvram_read_u8(prefix, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0); | |
405 | nvram_read_u8(prefix, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0); | |
406 | nvram_read_u8(prefix, NULL, "noiselvl5gla0", | |
407 | &sprom->noiselvl5gla[0], 0); | |
408 | nvram_read_u8(prefix, NULL, "noiselvl5gla1", | |
409 | &sprom->noiselvl5gla[1], 0); | |
410 | nvram_read_u8(prefix, NULL, "noiselvl5gla2", | |
411 | &sprom->noiselvl5gla[2], 0); | |
412 | nvram_read_u8(prefix, NULL, "noiselvl5gma0", | |
413 | &sprom->noiselvl5gma[0], 0); | |
414 | nvram_read_u8(prefix, NULL, "noiselvl5gma1", | |
415 | &sprom->noiselvl5gma[1], 0); | |
416 | nvram_read_u8(prefix, NULL, "noiselvl5gma2", | |
417 | &sprom->noiselvl5gma[2], 0); | |
418 | nvram_read_u8(prefix, NULL, "noiselvl5gha0", | |
419 | &sprom->noiselvl5gha[0], 0); | |
420 | nvram_read_u8(prefix, NULL, "noiselvl5gha1", | |
421 | &sprom->noiselvl5gha[1], 0); | |
422 | nvram_read_u8(prefix, NULL, "noiselvl5gha2", | |
423 | &sprom->noiselvl5gha[2], 0); | |
424 | nvram_read_u8(prefix, NULL, "noiselvl5gua0", | |
425 | &sprom->noiselvl5gua[0], 0); | |
426 | nvram_read_u8(prefix, NULL, "noiselvl5gua1", | |
427 | &sprom->noiselvl5gua[1], 0); | |
428 | nvram_read_u8(prefix, NULL, "noiselvl5gua2", | |
429 | &sprom->noiselvl5gua[2], 0); | |
430 | nvram_read_u8(prefix, NULL, "pcieingress_war", | |
431 | &sprom->pcieingress_war, 0); | |
432 | } | |
433 | ||
434 | static void bcm47xx_fill_sprom_r9(struct ssb_sprom *sprom, const char *prefix) | |
435 | { | |
436 | nvram_read_u16(prefix, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0); | |
437 | nvram_read_u16(prefix, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0); | |
438 | nvram_read_u32(prefix, NULL, "legofdmbw202gpo", | |
439 | &sprom->legofdmbw202gpo, 0); | |
440 | nvram_read_u32(prefix, NULL, "legofdmbw20ul2gpo", | |
441 | &sprom->legofdmbw20ul2gpo, 0); | |
442 | nvram_read_u32(prefix, NULL, "legofdmbw205glpo", | |
443 | &sprom->legofdmbw205glpo, 0); | |
444 | nvram_read_u32(prefix, NULL, "legofdmbw20ul5glpo", | |
445 | &sprom->legofdmbw20ul5glpo, 0); | |
446 | nvram_read_u32(prefix, NULL, "legofdmbw205gmpo", | |
447 | &sprom->legofdmbw205gmpo, 0); | |
448 | nvram_read_u32(prefix, NULL, "legofdmbw20ul5gmpo", | |
449 | &sprom->legofdmbw20ul5gmpo, 0); | |
450 | nvram_read_u32(prefix, NULL, "legofdmbw205ghpo", | |
451 | &sprom->legofdmbw205ghpo, 0); | |
452 | nvram_read_u32(prefix, NULL, "legofdmbw20ul5ghpo", | |
453 | &sprom->legofdmbw20ul5ghpo, 0); | |
454 | nvram_read_u32(prefix, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0); | |
455 | nvram_read_u32(prefix, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0); | |
456 | nvram_read_u32(prefix, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0); | |
457 | nvram_read_u32(prefix, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0); | |
458 | nvram_read_u32(prefix, NULL, "mcsbw20ul5glpo", | |
459 | &sprom->mcsbw20ul5glpo, 0); | |
460 | nvram_read_u32(prefix, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0); | |
461 | nvram_read_u32(prefix, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0); | |
462 | nvram_read_u32(prefix, NULL, "mcsbw20ul5gmpo", | |
463 | &sprom->mcsbw20ul5gmpo, 0); | |
464 | nvram_read_u32(prefix, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0); | |
465 | nvram_read_u32(prefix, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0); | |
466 | nvram_read_u32(prefix, NULL, "mcsbw20ul5ghpo", | |
467 | &sprom->mcsbw20ul5ghpo, 0); | |
468 | nvram_read_u32(prefix, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0); | |
469 | nvram_read_u16(prefix, NULL, "mcs32po", &sprom->mcs32po, 0); | |
470 | nvram_read_u16(prefix, NULL, "legofdm40duppo", | |
471 | &sprom->legofdm40duppo, 0); | |
472 | nvram_read_u8(prefix, NULL, "sar2g", &sprom->sar2g, 0); | |
473 | nvram_read_u8(prefix, NULL, "sar5g", &sprom->sar5g, 0); | |
474 | } | |
475 | ||
476 | static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom, | |
477 | const char *prefix) | |
478 | { | |
479 | char postfix[2]; | |
480 | int i; | |
481 | ||
482 | for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) { | |
483 | struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i]; | |
484 | snprintf(postfix, sizeof(postfix), "%i", i); | |
485 | nvram_read_u8(prefix, postfix, "maxp2ga", | |
486 | &pwr_info->maxpwr_2g, 0); | |
487 | nvram_read_u8(prefix, postfix, "itt2ga", | |
488 | &pwr_info->itssi_2g, 0); | |
489 | nvram_read_u8(prefix, postfix, "itt5ga", | |
490 | &pwr_info->itssi_5g, 0); | |
491 | nvram_read_u16(prefix, postfix, "pa2gw0a", | |
492 | &pwr_info->pa_2g[0], 0); | |
493 | nvram_read_u16(prefix, postfix, "pa2gw1a", | |
494 | &pwr_info->pa_2g[1], 0); | |
495 | nvram_read_u16(prefix, postfix, "pa2gw2a", | |
496 | &pwr_info->pa_2g[2], 0); | |
497 | nvram_read_u8(prefix, postfix, "maxp5ga", | |
498 | &pwr_info->maxpwr_5g, 0); | |
499 | nvram_read_u8(prefix, postfix, "maxp5gha", | |
500 | &pwr_info->maxpwr_5gh, 0); | |
501 | nvram_read_u8(prefix, postfix, "maxp5gla", | |
502 | &pwr_info->maxpwr_5gl, 0); | |
503 | nvram_read_u16(prefix, postfix, "pa5gw0a", | |
504 | &pwr_info->pa_5g[0], 0); | |
505 | nvram_read_u16(prefix, postfix, "pa5gw1a", | |
506 | &pwr_info->pa_5g[1], 0); | |
507 | nvram_read_u16(prefix, postfix, "pa5gw2a", | |
508 | &pwr_info->pa_5g[2], 0); | |
509 | nvram_read_u16(prefix, postfix, "pa5glw0a", | |
510 | &pwr_info->pa_5gl[0], 0); | |
511 | nvram_read_u16(prefix, postfix, "pa5glw1a", | |
512 | &pwr_info->pa_5gl[1], 0); | |
513 | nvram_read_u16(prefix, postfix, "pa5glw2a", | |
514 | &pwr_info->pa_5gl[2], 0); | |
515 | nvram_read_u16(prefix, postfix, "pa5ghw0a", | |
516 | &pwr_info->pa_5gh[0], 0); | |
517 | nvram_read_u16(prefix, postfix, "pa5ghw1a", | |
518 | &pwr_info->pa_5gh[1], 0); | |
519 | nvram_read_u16(prefix, postfix, "pa5ghw2a", | |
520 | &pwr_info->pa_5gh[2], 0); | |
521 | } | |
522 | } | |
523 | ||
524 | static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom, | |
525 | const char *prefix) | |
526 | { | |
527 | char postfix[2]; | |
528 | int i; | |
529 | ||
530 | for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) { | |
531 | struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i]; | |
532 | snprintf(postfix, sizeof(postfix), "%i", i); | |
533 | nvram_read_u16(prefix, postfix, "pa2gw3a", | |
534 | &pwr_info->pa_2g[3], 0); | |
535 | nvram_read_u16(prefix, postfix, "pa5gw3a", | |
536 | &pwr_info->pa_5g[3], 0); | |
537 | nvram_read_u16(prefix, postfix, "pa5glw3a", | |
538 | &pwr_info->pa_5gl[3], 0); | |
539 | nvram_read_u16(prefix, postfix, "pa5ghw3a", | |
540 | &pwr_info->pa_5gh[3], 0); | |
541 | } | |
542 | } | |
543 | ||
544 | void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix) | |
545 | { | |
546 | nvram_read_macaddr(prefix, "et0macaddr", &sprom->et0mac); | |
547 | nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0); | |
548 | nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0); | |
549 | ||
550 | nvram_read_macaddr(prefix, "et1macaddr", &sprom->et1mac); | |
551 | nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0); | |
552 | nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0); | |
553 | ||
554 | nvram_read_macaddr(prefix, "macaddr", &sprom->il0mac); | |
555 | nvram_read_macaddr(prefix, "il0macaddr", &sprom->il0mac); | |
556 | } | |
557 | ||
558 | void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix) | |
559 | { | |
019eee2e HM |
560 | bcm47xx_fill_sprom_ethernet(sprom, prefix); |
561 | ||
562 | nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0); | |
563 | ||
564 | switch (sprom->revision) { | |
565 | case 1: | |
566 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
567 | bcm47xx_fill_sprom_r12389(sprom, prefix); | |
568 | bcm47xx_fill_sprom_r1(sprom, prefix); | |
569 | break; | |
570 | case 2: | |
571 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
572 | bcm47xx_fill_sprom_r12389(sprom, prefix); | |
573 | bcm47xx_fill_sprom_r2389(sprom, prefix); | |
574 | bcm47xx_fill_sprom_r2(sprom, prefix); | |
575 | break; | |
576 | case 3: | |
577 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
578 | bcm47xx_fill_sprom_r12389(sprom, prefix); | |
579 | bcm47xx_fill_sprom_r2389(sprom, prefix); | |
580 | bcm47xx_fill_sprom_r389(sprom, prefix); | |
581 | bcm47xx_fill_sprom_r3(sprom, prefix); | |
582 | break; | |
583 | case 4: | |
584 | case 5: | |
585 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
586 | bcm47xx_fill_sprom_r4589(sprom, prefix); | |
587 | bcm47xx_fill_sprom_r458(sprom, prefix); | |
588 | bcm47xx_fill_sprom_r45(sprom, prefix); | |
589 | bcm47xx_fill_sprom_path_r4589(sprom, prefix); | |
590 | bcm47xx_fill_sprom_path_r45(sprom, prefix); | |
591 | break; | |
592 | case 8: | |
593 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
594 | bcm47xx_fill_sprom_r12389(sprom, prefix); | |
595 | bcm47xx_fill_sprom_r2389(sprom, prefix); | |
596 | bcm47xx_fill_sprom_r389(sprom, prefix); | |
597 | bcm47xx_fill_sprom_r4589(sprom, prefix); | |
598 | bcm47xx_fill_sprom_r458(sprom, prefix); | |
599 | bcm47xx_fill_sprom_r89(sprom, prefix); | |
600 | bcm47xx_fill_sprom_path_r4589(sprom, prefix); | |
601 | break; | |
602 | case 9: | |
603 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
604 | bcm47xx_fill_sprom_r12389(sprom, prefix); | |
605 | bcm47xx_fill_sprom_r2389(sprom, prefix); | |
606 | bcm47xx_fill_sprom_r389(sprom, prefix); | |
607 | bcm47xx_fill_sprom_r4589(sprom, prefix); | |
608 | bcm47xx_fill_sprom_r89(sprom, prefix); | |
609 | bcm47xx_fill_sprom_r9(sprom, prefix); | |
610 | bcm47xx_fill_sprom_path_r4589(sprom, prefix); | |
611 | break; | |
612 | default: | |
613 | pr_warn("Unsupported SPROM revision %d detected. Will extract" | |
614 | " v1\n", sprom->revision); | |
615 | sprom->revision = 1; | |
616 | bcm47xx_fill_sprom_r1234589(sprom, prefix); | |
617 | bcm47xx_fill_sprom_r12389(sprom, prefix); | |
618 | bcm47xx_fill_sprom_r1(sprom, prefix); | |
619 | } | |
620 | } | |
a9bba182 HM |
621 | |
622 | #ifdef CONFIG_BCM47XX_SSB | |
623 | void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo, | |
624 | const char *prefix) | |
625 | { | |
626 | nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0); | |
627 | if (!boardinfo->vendor) | |
628 | boardinfo->vendor = SSB_BOARDVENDOR_BCM; | |
629 | ||
630 | nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0); | |
631 | } | |
632 | #endif | |
0a2fcaa7 HM |
633 | |
634 | #ifdef CONFIG_BCM47XX_BCMA | |
635 | void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo, | |
636 | const char *prefix) | |
637 | { | |
638 | nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0); | |
639 | if (!boardinfo->vendor) | |
640 | boardinfo->vendor = SSB_BOARDVENDOR_BCM; | |
641 | ||
642 | nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0); | |
643 | } | |
644 | #endif |