Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | config MIPS |
3 | bool | |
4 | default y | |
ea6a3737 | 5 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
12597988 MR |
6 | select ARCH_CLOCKSOURCE_DATA |
7 | select ARCH_DISCARD_MEMBLOCK | |
8 | select ARCH_HAS_ELF_RANDOMIZE | |
9 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST | |
12597988 | 10 | select ARCH_SUPPORTS_UPROBES |
1ee3630a | 11 | select ARCH_USE_BUILTIN_BSWAP |
12597988 | 12 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
25da4e9d | 13 | select ARCH_USE_QUEUED_RWLOCKS |
0b17c967 | 14 | select ARCH_USE_QUEUED_SPINLOCKS |
12597988 MR |
15 | select ARCH_WANT_IPC_PARSE_VERSION |
16 | select BUILDTIME_EXTABLE_SORT | |
17 | select CLONE_BACKWARDS | |
57eeaced | 18 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
12597988 | 19 | select CPU_PM if CPU_IDLE |
dffbfde7 | 20 | select DMA_DIRECT_OPS |
12597988 MR |
21 | select GENERIC_ATOMIC64 if !64BIT |
22 | select GENERIC_CLOCKEVENTS | |
23 | select GENERIC_CMOS_UPDATE | |
24 | select GENERIC_CPU_AUTOPROBE | |
b962aeb0 | 25 | select GENERIC_IOMAP |
12597988 MR |
26 | select GENERIC_IRQ_PROBE |
27 | select GENERIC_IRQ_SHOW | |
740129b3 AP |
28 | select GENERIC_LIB_ASHLDI3 |
29 | select GENERIC_LIB_ASHRDI3 | |
30 | select GENERIC_LIB_CMPDI2 | |
31 | select GENERIC_LIB_LSHRDI3 | |
32 | select GENERIC_LIB_UCMPDI2 | |
12597988 MR |
33 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
34 | select GENERIC_SMP_IDLE_THREAD | |
35 | select GENERIC_TIME_VSYSCALL | |
36 | select HANDLE_DOMAIN_IRQ | |
906d441f | 37 | select HAVE_ARCH_COMPILER_H |
12597988 | 38 | select HAVE_ARCH_JUMP_LABEL |
88547001 | 39 | select HAVE_ARCH_KGDB |
109c32ff MR |
40 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
41 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT | |
490b004f | 42 | select HAVE_ARCH_SECCOMP_FILTER |
c0ff3c53 | 43 | select HAVE_ARCH_TRACEHOOK |
12597988 | 44 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT |
f381bf6d DD |
45 | select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) |
46 | select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) | |
12597988 MR |
47 | select HAVE_CONTEXT_TRACKING |
48 | select HAVE_COPY_THREAD_TLS | |
49 | select HAVE_C_RECORDMCOUNT | |
50 | select HAVE_DEBUG_KMEMLEAK | |
51 | select HAVE_DEBUG_STACKOVERFLOW | |
12597988 | 52 | select HAVE_DMA_CONTIGUOUS |
538f1952 | 53 | select HAVE_DYNAMIC_FTRACE |
12597988 | 54 | select HAVE_EXIT_THREAD |
538f1952 | 55 | select HAVE_FTRACE_MCOUNT_RECORD |
29c5d346 | 56 | select HAVE_FUNCTION_GRAPH_TRACER |
12597988 MR |
57 | select HAVE_FUNCTION_TRACER |
58 | select HAVE_GENERIC_DMA_COHERENT | |
59 | select HAVE_IDE | |
b3a428b4 | 60 | select HAVE_IOREMAP_PROT |
12597988 MR |
61 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
62 | select HAVE_IRQ_TIME_ACCOUNTING | |
c1bf207d DD |
63 | select HAVE_KPROBES |
64 | select HAVE_KRETPROBES | |
9d15ffc8 | 65 | select HAVE_MEMBLOCK_NODE_MAP |
786d35d4 | 66 | select HAVE_MOD_ARCH_SPECIFIC |
42a0bb3f | 67 | select HAVE_NMI |
12597988 MR |
68 | select HAVE_OPROFILE |
69 | select HAVE_PERF_EVENTS | |
70 | select HAVE_REGS_AND_STACK_ACCESS_API | |
9ea141ad | 71 | select HAVE_RSEQ |
d148eac0 | 72 | select HAVE_STACKPROTECTOR |
12597988 | 73 | select HAVE_SYSCALL_TRACEPOINTS |
a3f14310 | 74 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
12597988 | 75 | select IRQ_FORCED_THREADING |
2f12fb20 | 76 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
12597988 MR |
77 | select MODULES_USE_ELF_REL if MODULES |
78 | select PERF_USE_VMALLOC | |
05a0a344 | 79 | select RTC_LIB |
d79d853d | 80 | select SYSCTL_EXCEPTION_TRACE |
12597988 | 81 | select VIRT_TO_BUS |
1da177e4 | 82 | |
1da177e4 LT |
83 | menu "Machine selection" |
84 | ||
5e83d430 RB |
85 | choice |
86 | prompt "System type" | |
d41e6858 | 87 | default MIPS_GENERIC |
1da177e4 | 88 | |
eed0eabd PB |
89 | config MIPS_GENERIC |
90 | bool "Generic board-agnostic MIPS kernel" | |
91 | select BOOT_RAW | |
92 | select BUILTIN_DTB | |
93 | select CEVT_R4K | |
94 | select CLKSRC_MIPS_GIC | |
95 | select COMMON_CLK | |
96 | select CPU_MIPSR2_IRQ_VI | |
97 | select CPU_MIPSR2_IRQ_EI | |
98 | select CSRC_R4K | |
99 | select DMA_PERDEV_COHERENT | |
100 | select HW_HAS_PCI | |
101 | select IRQ_MIPS_CPU | |
102 | select LIBFDT | |
0211d49e | 103 | select MIPS_AUTO_PFN_OFFSET |
eed0eabd PB |
104 | select MIPS_CPU_SCACHE |
105 | select MIPS_GIC | |
106 | select MIPS_L1_CACHE_SHIFT_7 | |
107 | select NO_EXCEPT_FILL | |
108 | select PCI_DRIVERS_GENERIC | |
109 | select PINCTRL | |
110 | select SMP_UP if SMP | |
a3078e59 | 111 | select SWAP_IO_SPACE |
eed0eabd PB |
112 | select SYS_HAS_CPU_MIPS32_R1 |
113 | select SYS_HAS_CPU_MIPS32_R2 | |
114 | select SYS_HAS_CPU_MIPS32_R6 | |
115 | select SYS_HAS_CPU_MIPS64_R1 | |
116 | select SYS_HAS_CPU_MIPS64_R2 | |
117 | select SYS_HAS_CPU_MIPS64_R6 | |
118 | select SYS_SUPPORTS_32BIT_KERNEL | |
119 | select SYS_SUPPORTS_64BIT_KERNEL | |
120 | select SYS_SUPPORTS_BIG_ENDIAN | |
121 | select SYS_SUPPORTS_HIGHMEM | |
122 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
123 | select SYS_SUPPORTS_MICROMIPS | |
124 | select SYS_SUPPORTS_MIPS_CPS | |
125 | select SYS_SUPPORTS_MIPS16 | |
126 | select SYS_SUPPORTS_MULTITHREADING | |
127 | select SYS_SUPPORTS_RELOCATABLE | |
128 | select SYS_SUPPORTS_SMARTMIPS | |
2e6522c5 CL |
129 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
130 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
131 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
132 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
133 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
134 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
eed0eabd | 135 | select USE_OF |
2fe8ea39 | 136 | select UHI_BOOT |
eed0eabd PB |
137 | help |
138 | Select this to build a kernel which aims to support multiple boards, | |
139 | generally using a flattened device tree passed from the bootloader | |
140 | using the boot protocol defined in the UHI (Unified Hosting | |
141 | Interface) specification. | |
142 | ||
42a4f17d | 143 | config MIPS_ALCHEMY |
c3543e25 | 144 | bool "Alchemy processor based machines" |
d4a451d5 | 145 | select PHYS_ADDR_T_64BIT |
f772cdb2 | 146 | select CEVT_R4K |
d7ea335c | 147 | select CSRC_R4K |
67e38cf2 | 148 | select IRQ_MIPS_CPU |
88e9a93c | 149 | select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is |
42a4f17d ML |
150 | select SYS_HAS_CPU_MIPS32_R1 |
151 | select SYS_SUPPORTS_32BIT_KERNEL | |
152 | select SYS_SUPPORTS_APM_EMULATION | |
d30a2b47 | 153 | select GPIOLIB |
1b93b3c3 | 154 | select SYS_SUPPORTS_ZBOOT |
47440229 | 155 | select COMMON_CLK |
1da177e4 | 156 | |
7ca5dc14 FF |
157 | config AR7 |
158 | bool "Texas Instruments AR7" | |
159 | select BOOT_ELF32 | |
160 | select DMA_NONCOHERENT | |
161 | select CEVT_R4K | |
162 | select CSRC_R4K | |
67e38cf2 | 163 | select IRQ_MIPS_CPU |
7ca5dc14 FF |
164 | select NO_EXCEPT_FILL |
165 | select SWAP_IO_SPACE | |
166 | select SYS_HAS_CPU_MIPS32_R1 | |
167 | select SYS_HAS_EARLY_PRINTK | |
168 | select SYS_SUPPORTS_32BIT_KERNEL | |
169 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 170 | select SYS_SUPPORTS_MIPS16 |
1b93b3c3 | 171 | select SYS_SUPPORTS_ZBOOT_UART16550 |
d30a2b47 | 172 | select GPIOLIB |
7ca5dc14 | 173 | select VLYNQ |
8551fb64 | 174 | select HAVE_CLK |
7ca5dc14 FF |
175 | help |
176 | Support for the Texas Instruments AR7 System-on-a-Chip | |
177 | family: TNETD7100, 7200 and 7300. | |
178 | ||
43cc739f SR |
179 | config ATH25 |
180 | bool "Atheros AR231x/AR531x SoC support" | |
181 | select CEVT_R4K | |
182 | select CSRC_R4K | |
183 | select DMA_NONCOHERENT | |
67e38cf2 | 184 | select IRQ_MIPS_CPU |
1753e74e | 185 | select IRQ_DOMAIN |
43cc739f SR |
186 | select SYS_HAS_CPU_MIPS32_R1 |
187 | select SYS_SUPPORTS_BIG_ENDIAN | |
188 | select SYS_SUPPORTS_32BIT_KERNEL | |
8aaa7278 | 189 | select SYS_HAS_EARLY_PRINTK |
43cc739f SR |
190 | help |
191 | Support for Atheros AR231x and Atheros AR531x based boards | |
192 | ||
d4a67d9d GJ |
193 | config ATH79 |
194 | bool "Atheros AR71XX/AR724X/AR913X based boards" | |
ff591a91 | 195 | select ARCH_HAS_RESET_CONTROLLER |
d4a67d9d GJ |
196 | select BOOT_RAW |
197 | select CEVT_R4K | |
198 | select CSRC_R4K | |
199 | select DMA_NONCOHERENT | |
d30a2b47 | 200 | select GPIOLIB |
a08227a2 | 201 | select PINCTRL |
94638067 | 202 | select HAVE_CLK |
411520af | 203 | select COMMON_CLK |
2c4f1ac5 | 204 | select CLKDEV_LOOKUP |
67e38cf2 | 205 | select IRQ_MIPS_CPU |
0aabf1a4 | 206 | select MIPS_MACHINE |
d4a67d9d GJ |
207 | select SYS_HAS_CPU_MIPS32_R2 |
208 | select SYS_HAS_EARLY_PRINTK | |
209 | select SYS_SUPPORTS_32BIT_KERNEL | |
210 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 211 | select SYS_SUPPORTS_MIPS16 |
b3f0a250 | 212 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
03c8c407 | 213 | select USE_OF |
53d473fc | 214 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
d4a67d9d GJ |
215 | help |
216 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. | |
217 | ||
5f2d4459 KC |
218 | config BMIPS_GENERIC |
219 | bool "Broadcom Generic BMIPS kernel" | |
d59098a0 CH |
220 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
221 | select ARCH_HAS_PHYS_TO_DMA | |
d666cd02 KC |
222 | select BOOT_RAW |
223 | select NO_EXCEPT_FILL | |
224 | select USE_OF | |
225 | select CEVT_R4K | |
226 | select CSRC_R4K | |
227 | select SYNC_R4K | |
228 | select COMMON_CLK | |
c7c42ec2 | 229 | select BCM6345_L1_IRQ |
60b858f2 KC |
230 | select BCM7038_L1_IRQ |
231 | select BCM7120_L2_IRQ | |
232 | select BRCMSTB_L2_IRQ | |
67e38cf2 | 233 | select IRQ_MIPS_CPU |
60b858f2 | 234 | select DMA_NONCOHERENT |
d666cd02 | 235 | select SYS_SUPPORTS_32BIT_KERNEL |
60b858f2 | 236 | select SYS_SUPPORTS_LITTLE_ENDIAN |
d666cd02 KC |
237 | select SYS_SUPPORTS_BIG_ENDIAN |
238 | select SYS_SUPPORTS_HIGHMEM | |
60b858f2 KC |
239 | select SYS_HAS_CPU_BMIPS32_3300 |
240 | select SYS_HAS_CPU_BMIPS4350 | |
241 | select SYS_HAS_CPU_BMIPS4380 | |
d666cd02 KC |
242 | select SYS_HAS_CPU_BMIPS5000 |
243 | select SWAP_IO_SPACE | |
60b858f2 KC |
244 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
245 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
246 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
247 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
4dc4704c | 248 | select HARDIRQS_SW_RESEND |
d666cd02 | 249 | help |
5f2d4459 KC |
250 | Build a generic DT-based kernel image that boots on select |
251 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top | |
252 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN | |
253 | must be set appropriately for your board. | |
d666cd02 | 254 | |
1c0c13eb | 255 | config BCM47XX |
c619366e | 256 | bool "Broadcom BCM47XX based boards" |
fe08f8c2 | 257 | select BOOT_RAW |
42f77542 | 258 | select CEVT_R4K |
940f6b48 | 259 | select CSRC_R4K |
1c0c13eb AJ |
260 | select DMA_NONCOHERENT |
261 | select HW_HAS_PCI | |
67e38cf2 | 262 | select IRQ_MIPS_CPU |
314878d2 | 263 | select SYS_HAS_CPU_MIPS32_R1 |
dd54dedd | 264 | select NO_EXCEPT_FILL |
1c0c13eb AJ |
265 | select SYS_SUPPORTS_32BIT_KERNEL |
266 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 267 | select SYS_SUPPORTS_MIPS16 |
6507831f | 268 | select SYS_SUPPORTS_ZBOOT |
25e5fb97 | 269 | select SYS_HAS_EARLY_PRINTK |
e6086557 | 270 | select USE_GENERIC_EARLY_PRINTK_8250 |
c949c0bc RM |
271 | select GPIOLIB |
272 | select LEDS_GPIO_REGISTER | |
f6e734a8 | 273 | select BCM47XX_NVRAM |
2ab71a02 | 274 | select BCM47XX_SPROM |
dfe00495 | 275 | select BCM47XX_SSB if !BCM47XX_BCMA |
1c0c13eb AJ |
276 | help |
277 | Support for BCM47XX based boards | |
278 | ||
e7300d04 MB |
279 | config BCM63XX |
280 | bool "Broadcom BCM63XX based boards" | |
ae8de61c | 281 | select BOOT_RAW |
e7300d04 MB |
282 | select CEVT_R4K |
283 | select CSRC_R4K | |
fc264022 | 284 | select SYNC_R4K |
e7300d04 | 285 | select DMA_NONCOHERENT |
67e38cf2 | 286 | select IRQ_MIPS_CPU |
e7300d04 MB |
287 | select SYS_SUPPORTS_32BIT_KERNEL |
288 | select SYS_SUPPORTS_BIG_ENDIAN | |
289 | select SYS_HAS_EARLY_PRINTK | |
290 | select SWAP_IO_SPACE | |
d30a2b47 | 291 | select GPIOLIB |
3e82eeeb | 292 | select HAVE_CLK |
af2418be | 293 | select MIPS_L1_CACHE_SHIFT_4 |
c5af3c2d | 294 | select CLKDEV_LOOKUP |
e7300d04 MB |
295 | help |
296 | Support for BCM63XX based boards | |
297 | ||
1da177e4 | 298 | config MIPS_COBALT |
3fa986fa | 299 | bool "Cobalt Server" |
42f77542 | 300 | select CEVT_R4K |
940f6b48 | 301 | select CSRC_R4K |
1097c6ac | 302 | select CEVT_GT641XX |
1da177e4 LT |
303 | select DMA_NONCOHERENT |
304 | select HW_HAS_PCI | |
d865bea4 | 305 | select I8253 |
1da177e4 | 306 | select I8259 |
67e38cf2 | 307 | select IRQ_MIPS_CPU |
d5ab1a69 | 308 | select IRQ_GT641XX |
252161ec | 309 | select PCI_GT64XXX_PCI0 |
e25bfc92 | 310 | select PCI |
7cf8053b | 311 | select SYS_HAS_CPU_NEVADA |
0a22e0d4 | 312 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 313 | select SYS_SUPPORTS_32BIT_KERNEL |
0e8774b6 | 314 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 315 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e6086557 | 316 | select USE_GENERIC_EARLY_PRINTK_8250 |
1da177e4 LT |
317 | |
318 | config MACH_DECSTATION | |
3fa986fa | 319 | bool "DECstations" |
1da177e4 | 320 | select BOOT_ELF32 |
6457d9fc | 321 | select CEVT_DS1287 |
81d10bad | 322 | select CEVT_R4K if CPU_R4X00 |
4247417d | 323 | select CSRC_IOASIC |
81d10bad | 324 | select CSRC_R4K if CPU_R4X00 |
20d60d99 MR |
325 | select CPU_DADDI_WORKAROUNDS if 64BIT |
326 | select CPU_R4000_WORKAROUNDS if 64BIT | |
327 | select CPU_R4400_WORKAROUNDS if 64BIT | |
1da177e4 | 328 | select DMA_NONCOHERENT |
ce816fa8 | 329 | select NO_IOPORT_MAP |
67e38cf2 | 330 | select IRQ_MIPS_CPU |
7cf8053b RB |
331 | select SYS_HAS_CPU_R3000 |
332 | select SYS_HAS_CPU_R4X00 | |
ed5ba2fb | 333 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 334 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 335 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1723b4a3 AN |
336 | select SYS_SUPPORTS_128HZ |
337 | select SYS_SUPPORTS_256HZ | |
338 | select SYS_SUPPORTS_1024HZ | |
930beb5a | 339 | select MIPS_L1_CACHE_SHIFT_4 |
5e83d430 | 340 | help |
1da177e4 LT |
341 | This enables support for DEC's MIPS based workstations. For details |
342 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | |
343 | DECstation porting pages on <http://decstation.unix-ag.org/>. | |
344 | ||
345 | If you have one of the following DECstation Models you definitely | |
346 | want to choose R4xx0 for the CPU Type: | |
347 | ||
9308816c RB |
348 | DECstation 5000/50 |
349 | DECstation 5000/150 | |
350 | DECstation 5000/260 | |
351 | DECsystem 5900/260 | |
1da177e4 LT |
352 | |
353 | otherwise choose R3000. | |
354 | ||
5e83d430 | 355 | config MACH_JAZZ |
3fa986fa | 356 | bool "Jazz family of machines" |
a211a082 | 357 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 358 | select ARCH_MIGHT_HAVE_PC_SERIO |
0e2794b0 RB |
359 | select FW_ARC |
360 | select FW_ARC32 | |
5e83d430 | 361 | select ARCH_MAY_HAVE_PC_FDC |
42f77542 | 362 | select CEVT_R4K |
940f6b48 | 363 | select CSRC_R4K |
e2defae5 | 364 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
5e83d430 | 365 | select GENERIC_ISA_DMA |
8a118c38 | 366 | select HAVE_PCSPKR_PLATFORM |
67e38cf2 | 367 | select IRQ_MIPS_CPU |
d865bea4 | 368 | select I8253 |
5e83d430 RB |
369 | select I8259 |
370 | select ISA | |
7cf8053b | 371 | select SYS_HAS_CPU_R4X00 |
5e83d430 | 372 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 373 | select SYS_SUPPORTS_64BIT_KERNEL |
1723b4a3 | 374 | select SYS_SUPPORTS_100HZ |
1da177e4 | 375 | help |
5e83d430 RB |
376 | This a family of machines based on the MIPS R4030 chipset which was |
377 | used by several vendors to build RISC/os and Windows NT workstations. | |
692105b8 | 378 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and |
5e83d430 RB |
379 | Olivetti M700-10 workstations. |
380 | ||
de361e8b PB |
381 | config MACH_INGENIC |
382 | bool "Ingenic SoC based machines" | |
5ebabe59 LPC |
383 | select SYS_SUPPORTS_32BIT_KERNEL |
384 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
f9c9affc | 385 | select SYS_SUPPORTS_ZBOOT_UART16550 |
5ebabe59 | 386 | select DMA_NONCOHERENT |
67e38cf2 | 387 | select IRQ_MIPS_CPU |
37b4c3ca | 388 | select PINCTRL |
d30a2b47 | 389 | select GPIOLIB |
ff1930c6 | 390 | select COMMON_CLK |
83bc7692 | 391 | select GENERIC_IRQ_CHIP |
ffb1843d PB |
392 | select BUILTIN_DTB |
393 | select USE_OF | |
6ec127fb | 394 | select LIBFDT |
5ebabe59 | 395 | |
171bb2f1 JC |
396 | config LANTIQ |
397 | bool "Lantiq based platforms" | |
398 | select DMA_NONCOHERENT | |
67e38cf2 | 399 | select IRQ_MIPS_CPU |
171bb2f1 JC |
400 | select CEVT_R4K |
401 | select CSRC_R4K | |
402 | select SYS_HAS_CPU_MIPS32_R1 | |
403 | select SYS_HAS_CPU_MIPS32_R2 | |
404 | select SYS_SUPPORTS_BIG_ENDIAN | |
405 | select SYS_SUPPORTS_32BIT_KERNEL | |
377cb1b6 | 406 | select SYS_SUPPORTS_MIPS16 |
171bb2f1 | 407 | select SYS_SUPPORTS_MULTITHREADING |
f35764e7 | 408 | select SYS_SUPPORTS_VPE_LOADER |
171bb2f1 | 409 | select SYS_HAS_EARLY_PRINTK |
d30a2b47 | 410 | select GPIOLIB |
171bb2f1 JC |
411 | select SWAP_IO_SPACE |
412 | select BOOT_RAW | |
287e3f3f | 413 | select CLKDEV_LOOKUP |
a0392222 | 414 | select USE_OF |
3f8c50c9 JC |
415 | select PINCTRL |
416 | select PINCTRL_LANTIQ | |
c530781c JC |
417 | select ARCH_HAS_RESET_CONTROLLER |
418 | select RESET_CONTROLLER | |
171bb2f1 | 419 | |
1f21d2bd BM |
420 | config LASAT |
421 | bool "LASAT Networks platforms" | |
42f77542 | 422 | select CEVT_R4K |
16f0bbbc | 423 | select CRC32 |
940f6b48 | 424 | select CSRC_R4K |
1f21d2bd BM |
425 | select DMA_NONCOHERENT |
426 | select SYS_HAS_EARLY_PRINTK | |
427 | select HW_HAS_PCI | |
67e38cf2 | 428 | select IRQ_MIPS_CPU |
1f21d2bd BM |
429 | select PCI_GT64XXX_PCI0 |
430 | select MIPS_NILE4 | |
431 | select R5000_CPU_SCACHE | |
432 | select SYS_HAS_CPU_R5000 | |
433 | select SYS_SUPPORTS_32BIT_KERNEL | |
434 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN | |
435 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1f21d2bd | 436 | |
30ad29bb HC |
437 | config MACH_LOONGSON32 |
438 | bool "Loongson-1 family of machines" | |
c7e8c668 | 439 | select SYS_SUPPORTS_ZBOOT |
ade299d8 | 440 | help |
30ad29bb | 441 | This enables support for the Loongson-1 family of machines. |
85749d24 | 442 | |
30ad29bb HC |
443 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
444 | the Institute of Computing Technology (ICT), Chinese Academy of | |
445 | Sciences (CAS). | |
ade299d8 | 446 | |
30ad29bb HC |
447 | config MACH_LOONGSON64 |
448 | bool "Loongson-2/3 family of machines" | |
ca585cf9 KC |
449 | select SYS_SUPPORTS_ZBOOT |
450 | help | |
30ad29bb | 451 | This enables the support of Loongson-2/3 family of machines. |
ca585cf9 | 452 | |
30ad29bb HC |
453 | Loongson-2 is a family of single-core CPUs and Loongson-3 is a |
454 | family of multi-core CPUs. They are both 64-bit general-purpose | |
455 | MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute | |
456 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS) | |
457 | in the People's Republic of China. The chief architect is Professor | |
458 | Weiwu Hu. | |
ca585cf9 | 459 | |
6a438309 AB |
460 | config MACH_PISTACHIO |
461 | bool "IMG Pistachio SoC based boards" | |
6a438309 AB |
462 | select BOOT_ELF32 |
463 | select BOOT_RAW | |
464 | select CEVT_R4K | |
465 | select CLKSRC_MIPS_GIC | |
466 | select COMMON_CLK | |
467 | select CSRC_R4K | |
645c7827 | 468 | select DMA_NONCOHERENT |
d30a2b47 | 469 | select GPIOLIB |
67e38cf2 | 470 | select IRQ_MIPS_CPU |
6a438309 AB |
471 | select LIBFDT |
472 | select MFD_SYSCON | |
473 | select MIPS_CPU_SCACHE | |
474 | select MIPS_GIC | |
475 | select PINCTRL | |
476 | select REGULATOR | |
477 | select SYS_HAS_CPU_MIPS32_R2 | |
478 | select SYS_SUPPORTS_32BIT_KERNEL | |
479 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
480 | select SYS_SUPPORTS_MIPS_CPS | |
481 | select SYS_SUPPORTS_MULTITHREADING | |
41cc07be | 482 | select SYS_SUPPORTS_RELOCATABLE |
6a438309 | 483 | select SYS_SUPPORTS_ZBOOT |
018f62ee EG |
484 | select SYS_HAS_EARLY_PRINTK |
485 | select USE_GENERIC_EARLY_PRINTK_8250 | |
6a438309 AB |
486 | select USE_OF |
487 | help | |
488 | This enables support for the IMG Pistachio SoC platform. | |
489 | ||
1da177e4 | 490 | config MIPS_MALTA |
3fa986fa | 491 | bool "MIPS Malta board" |
61ed242d | 492 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 493 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 494 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 495 | select BOOT_ELF32 |
fa71c960 | 496 | select BOOT_RAW |
e8823d26 | 497 | select BUILTIN_DTB |
42f77542 | 498 | select CEVT_R4K |
fa5635a2 | 499 | select CLKSRC_MIPS_GIC |
42b002ab | 500 | select COMMON_CLK |
47bf2b03 | 501 | select CSRC_R4K |
885014bc | 502 | select DMA_MAYBE_COHERENT |
1da177e4 | 503 | select GENERIC_ISA_DMA |
8a118c38 | 504 | select HAVE_PCSPKR_PLATFORM |
1da177e4 | 505 | select HW_HAS_PCI |
d865bea4 | 506 | select I8253 |
1da177e4 | 507 | select I8259 |
47bf2b03 MK |
508 | select IRQ_MIPS_CPU |
509 | select LIBFDT | |
5e83d430 | 510 | select MIPS_BONITO64 |
9318c51a | 511 | select MIPS_CPU_SCACHE |
47bf2b03 | 512 | select MIPS_GIC |
a7ef1ead | 513 | select MIPS_L1_CACHE_SHIFT_6 |
5e83d430 | 514 | select MIPS_MSC |
47bf2b03 | 515 | select PCI_GT64XXX_PCI0 |
ecafe3e9 | 516 | select SMP_UP if SMP |
1da177e4 | 517 | select SWAP_IO_SPACE |
7cf8053b RB |
518 | select SYS_HAS_CPU_MIPS32_R1 |
519 | select SYS_HAS_CPU_MIPS32_R2 | |
bfc3c5a6 | 520 | select SYS_HAS_CPU_MIPS32_R3_5 |
c5b36783 | 521 | select SYS_HAS_CPU_MIPS32_R5 |
575509b6 | 522 | select SYS_HAS_CPU_MIPS32_R6 |
7cf8053b | 523 | select SYS_HAS_CPU_MIPS64_R1 |
5d9fbed1 | 524 | select SYS_HAS_CPU_MIPS64_R2 |
575509b6 | 525 | select SYS_HAS_CPU_MIPS64_R6 |
7cf8053b RB |
526 | select SYS_HAS_CPU_NEVADA |
527 | select SYS_HAS_CPU_RM7000 | |
ed5ba2fb YY |
528 | select SYS_SUPPORTS_32BIT_KERNEL |
529 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 530 | select SYS_SUPPORTS_BIG_ENDIAN |
c5b36783 | 531 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 532 | select SYS_SUPPORTS_LITTLE_ENDIAN |
424ebcdf | 533 | select SYS_SUPPORTS_MICROMIPS |
47bf2b03 | 534 | select SYS_SUPPORTS_MIPS16 |
0365070f | 535 | select SYS_SUPPORTS_MIPS_CMP |
e56b6aa6 | 536 | select SYS_SUPPORTS_MIPS_CPS |
f41ae0b2 | 537 | select SYS_SUPPORTS_MULTITHREADING |
47bf2b03 | 538 | select SYS_SUPPORTS_RELOCATABLE |
9693a853 | 539 | select SYS_SUPPORTS_SMARTMIPS |
f35764e7 | 540 | select SYS_SUPPORTS_VPE_LOADER |
1b93b3c3 | 541 | select SYS_SUPPORTS_ZBOOT |
e8823d26 | 542 | select USE_OF |
abcc82b1 | 543 | select ZONE_DMA32 if 64BIT |
1da177e4 | 544 | help |
f638d197 | 545 | This enables support for the MIPS Technologies Malta evaluation |
1da177e4 LT |
546 | board. |
547 | ||
2572f00d JH |
548 | config MACH_PIC32 |
549 | bool "Microchip PIC32 Family" | |
550 | help | |
551 | This enables support for the Microchip PIC32 family of platforms. | |
552 | ||
553 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core | |
554 | microcontrollers. | |
555 | ||
a83860c2 RB |
556 | config NEC_MARKEINS |
557 | bool "NEC EMMA2RH Mark-eins board" | |
558 | select SOC_EMMA2RH | |
559 | select HW_HAS_PCI | |
560 | help | |
561 | This enables support for the NEC Electronics Mark-eins boards. | |
ade299d8 | 562 | |
5e83d430 | 563 | config MACH_VR41XX |
74142d65 | 564 | bool "NEC VR4100 series based machines" |
42f77542 | 565 | select CEVT_R4K |
940f6b48 | 566 | select CSRC_R4K |
7cf8053b | 567 | select SYS_HAS_CPU_VR41XX |
377cb1b6 | 568 | select SYS_SUPPORTS_MIPS16 |
d30a2b47 | 569 | select GPIOLIB |
5e83d430 | 570 | |
edb6310a DL |
571 | config NXP_STB220 |
572 | bool "NXP STB220 board" | |
573 | select SOC_PNX833X | |
574 | help | |
575 | Support for NXP Semiconductors STB220 Development Board. | |
576 | ||
577 | config NXP_STB225 | |
578 | bool "NXP 225 board" | |
579 | select SOC_PNX833X | |
580 | select SOC_PNX8335 | |
581 | help | |
582 | Support for NXP Semiconductors STB225 Development Board. | |
583 | ||
9267a30d MSJ |
584 | config PMC_MSP |
585 | bool "PMC-Sierra MSP chipsets" | |
39d30c13 A |
586 | select CEVT_R4K |
587 | select CSRC_R4K | |
9267a30d MSJ |
588 | select DMA_NONCOHERENT |
589 | select SWAP_IO_SPACE | |
590 | select NO_EXCEPT_FILL | |
591 | select BOOT_RAW | |
592 | select SYS_HAS_CPU_MIPS32_R1 | |
593 | select SYS_HAS_CPU_MIPS32_R2 | |
594 | select SYS_SUPPORTS_32BIT_KERNEL | |
595 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 596 | select SYS_SUPPORTS_MIPS16 |
67e38cf2 | 597 | select IRQ_MIPS_CPU |
9267a30d MSJ |
598 | select SERIAL_8250 |
599 | select SERIAL_8250_CONSOLE | |
9296d94d FF |
600 | select USB_EHCI_BIG_ENDIAN_MMIO |
601 | select USB_EHCI_BIG_ENDIAN_DESC | |
9267a30d MSJ |
602 | help |
603 | This adds support for the PMC-Sierra family of Multi-Service | |
604 | Processor System-On-A-Chips. These parts include a number | |
605 | of integrated peripherals, interfaces and DSPs in addition to | |
606 | a variety of MIPS cores. | |
607 | ||
ae2b5bb6 JC |
608 | config RALINK |
609 | bool "Ralink based machines" | |
610 | select CEVT_R4K | |
611 | select CSRC_R4K | |
612 | select BOOT_RAW | |
613 | select DMA_NONCOHERENT | |
67e38cf2 | 614 | select IRQ_MIPS_CPU |
ae2b5bb6 JC |
615 | select USE_OF |
616 | select SYS_HAS_CPU_MIPS32_R1 | |
617 | select SYS_HAS_CPU_MIPS32_R2 | |
618 | select SYS_SUPPORTS_32BIT_KERNEL | |
619 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 620 | select SYS_SUPPORTS_MIPS16 |
ae2b5bb6 | 621 | select SYS_HAS_EARLY_PRINTK |
ae2b5bb6 | 622 | select CLKDEV_LOOKUP |
2a153f1c JC |
623 | select ARCH_HAS_RESET_CONTROLLER |
624 | select RESET_CONTROLLER | |
ae2b5bb6 | 625 | |
1da177e4 | 626 | config SGI_IP22 |
3fa986fa | 627 | bool "SGI IP22 (Indy/Indigo2)" |
0e2794b0 RB |
628 | select FW_ARC |
629 | select FW_ARC32 | |
7a407aa5 | 630 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 631 | select BOOT_ELF32 |
42f77542 | 632 | select CEVT_R4K |
940f6b48 | 633 | select CSRC_R4K |
e2defae5 | 634 | select DEFAULT_SGI_PARTITION |
1da177e4 | 635 | select DMA_NONCOHERENT |
5e83d430 | 636 | select HW_HAS_EISA |
d865bea4 | 637 | select I8253 |
68de4803 | 638 | select I8259 |
1da177e4 | 639 | select IP22_CPU_SCACHE |
67e38cf2 | 640 | select IRQ_MIPS_CPU |
aa414dff | 641 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
e2defae5 TB |
642 | select SGI_HAS_I8042 |
643 | select SGI_HAS_INDYDOG | |
36e5c21d | 644 | select SGI_HAS_HAL2 |
e2defae5 TB |
645 | select SGI_HAS_SEEQ |
646 | select SGI_HAS_WD93 | |
647 | select SGI_HAS_ZILOG | |
1da177e4 | 648 | select SWAP_IO_SPACE |
7cf8053b RB |
649 | select SYS_HAS_CPU_R4X00 |
650 | select SYS_HAS_CPU_R5000 | |
2b5e63f6 MM |
651 | # |
652 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
653 | # memory during early boot on some machines. | |
654 | # | |
655 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
656 | # for a more details discussion | |
657 | # | |
658 | # select SYS_HAS_EARLY_PRINTK | |
ed5ba2fb YY |
659 | select SYS_SUPPORTS_32BIT_KERNEL |
660 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 661 | select SYS_SUPPORTS_BIG_ENDIAN |
930beb5a | 662 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
663 | help |
664 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | |
665 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | |
666 | that runs on these, say Y here. | |
667 | ||
668 | config SGI_IP27 | |
3fa986fa | 669 | bool "SGI IP27 (Origin200/2000)" |
54aed4dd | 670 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
671 | select FW_ARC |
672 | select FW_ARC64 | |
5e83d430 | 673 | select BOOT_ELF64 |
e2defae5 | 674 | select DEFAULT_SGI_PARTITION |
36a88530 | 675 | select SYS_HAS_EARLY_PRINTK |
1da177e4 | 676 | select HW_HAS_PCI |
130e2fb7 | 677 | select NR_CPUS_DEFAULT_64 |
7cf8053b | 678 | select SYS_HAS_CPU_R10000 |
ed5ba2fb | 679 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 680 | select SYS_SUPPORTS_BIG_ENDIAN |
d8cb4e11 | 681 | select SYS_SUPPORTS_NUMA |
1a5c5de1 | 682 | select SYS_SUPPORTS_SMP |
930beb5a | 683 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
684 | help |
685 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | |
686 | workstations. To compile a Linux kernel that runs on these, say Y | |
687 | here. | |
688 | ||
e2defae5 | 689 | config SGI_IP28 |
7d60717e | 690 | bool "SGI IP28 (Indigo2 R10k)" |
0e2794b0 RB |
691 | select FW_ARC |
692 | select FW_ARC64 | |
7a407aa5 | 693 | select ARCH_MIGHT_HAVE_PC_SERIO |
e2defae5 TB |
694 | select BOOT_ELF64 |
695 | select CEVT_R4K | |
696 | select CSRC_R4K | |
697 | select DEFAULT_SGI_PARTITION | |
698 | select DMA_NONCOHERENT | |
699 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
67e38cf2 | 700 | select IRQ_MIPS_CPU |
e2defae5 TB |
701 | select HW_HAS_EISA |
702 | select I8253 | |
703 | select I8259 | |
e2defae5 TB |
704 | select SGI_HAS_I8042 |
705 | select SGI_HAS_INDYDOG | |
5b438c44 | 706 | select SGI_HAS_HAL2 |
e2defae5 TB |
707 | select SGI_HAS_SEEQ |
708 | select SGI_HAS_WD93 | |
709 | select SGI_HAS_ZILOG | |
710 | select SWAP_IO_SPACE | |
711 | select SYS_HAS_CPU_R10000 | |
2b5e63f6 MM |
712 | # |
713 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
714 | # memory during early boot on some machines. | |
715 | # | |
716 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
717 | # for a more details discussion | |
718 | # | |
719 | # select SYS_HAS_EARLY_PRINTK | |
e2defae5 TB |
720 | select SYS_SUPPORTS_64BIT_KERNEL |
721 | select SYS_SUPPORTS_BIG_ENDIAN | |
dc24d68d | 722 | select MIPS_L1_CACHE_SHIFT_7 |
e2defae5 TB |
723 | help |
724 | This is the SGI Indigo2 with R10000 processor. To compile a Linux | |
725 | kernel that runs on these, say Y here. | |
726 | ||
1da177e4 | 727 | config SGI_IP32 |
cfd2afc0 | 728 | bool "SGI IP32 (O2)" |
03df8229 | 729 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
730 | select FW_ARC |
731 | select FW_ARC32 | |
1da177e4 | 732 | select BOOT_ELF32 |
42f77542 | 733 | select CEVT_R4K |
940f6b48 | 734 | select CSRC_R4K |
1da177e4 LT |
735 | select DMA_NONCOHERENT |
736 | select HW_HAS_PCI | |
67e38cf2 | 737 | select IRQ_MIPS_CPU |
1da177e4 LT |
738 | select R5000_CPU_SCACHE |
739 | select RM7000_CPU_SCACHE | |
7cf8053b RB |
740 | select SYS_HAS_CPU_R5000 |
741 | select SYS_HAS_CPU_R10000 if BROKEN | |
742 | select SYS_HAS_CPU_RM7000 | |
dd2f18fe | 743 | select SYS_HAS_CPU_NEVADA |
ed5ba2fb | 744 | select SYS_SUPPORTS_64BIT_KERNEL |
23fbee9d | 745 | select SYS_SUPPORTS_BIG_ENDIAN |
23fbee9d | 746 | help |
5e83d430 | 747 | If you want this kernel to run on SGI O2 workstation, say Y here. |
1da177e4 | 748 | |
ade299d8 YY |
749 | config SIBYTE_CRHINE |
750 | bool "Sibyte BCM91120C-CRhine" | |
9a6dcea1 | 751 | select BOOT_ELF32 |
ade299d8 | 752 | select SIBYTE_BCM1120 |
9a6dcea1 | 753 | select SWAP_IO_SPACE |
7cf8053b | 754 | select SYS_HAS_CPU_SB1 |
9a6dcea1 AI |
755 | select SYS_SUPPORTS_BIG_ENDIAN |
756 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
757 | ||
ade299d8 YY |
758 | config SIBYTE_CARMEL |
759 | bool "Sibyte BCM91120x-Carmel" | |
5e83d430 | 760 | select BOOT_ELF32 |
ade299d8 | 761 | select SIBYTE_BCM1120 |
5e83d430 | 762 | select SWAP_IO_SPACE |
7cf8053b | 763 | select SYS_HAS_CPU_SB1 |
81731f79 | 764 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 765 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 766 | |
ade299d8 YY |
767 | config SIBYTE_CRHONE |
768 | bool "Sibyte BCM91125C-CRhone" | |
5e83d430 | 769 | select BOOT_ELF32 |
ade299d8 | 770 | select SIBYTE_BCM1125 |
5e83d430 | 771 | select SWAP_IO_SPACE |
7cf8053b | 772 | select SYS_HAS_CPU_SB1 |
5e83d430 | 773 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 774 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 775 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 776 | |
5e83d430 | 777 | config SIBYTE_RHONE |
3fa986fa | 778 | bool "Sibyte BCM91125E-Rhone" |
5e83d430 | 779 | select BOOT_ELF32 |
5e83d430 RB |
780 | select SIBYTE_BCM1125H |
781 | select SWAP_IO_SPACE | |
7cf8053b | 782 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
783 | select SYS_SUPPORTS_BIG_ENDIAN |
784 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 785 | |
ade299d8 YY |
786 | config SIBYTE_SWARM |
787 | bool "Sibyte BCM91250A-SWARM" | |
5e83d430 | 788 | select BOOT_ELF32 |
fcf3ca4c | 789 | select HAVE_PATA_PLATFORM |
ade299d8 | 790 | select SIBYTE_SB1250 |
5e83d430 | 791 | select SWAP_IO_SPACE |
7cf8053b | 792 | select SYS_HAS_CPU_SB1 |
5e83d430 | 793 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 794 | select SYS_SUPPORTS_HIGHMEM |
e3ad1c23 | 795 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 796 | select ZONE_DMA32 if 64BIT |
e3ad1c23 | 797 | |
ade299d8 YY |
798 | config SIBYTE_LITTLESUR |
799 | bool "Sibyte BCM91250C2-LittleSur" | |
5e83d430 | 800 | select BOOT_ELF32 |
fcf3ca4c | 801 | select HAVE_PATA_PLATFORM |
5e83d430 RB |
802 | select SIBYTE_SB1250 |
803 | select SWAP_IO_SPACE | |
7cf8053b | 804 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
805 | select SYS_SUPPORTS_BIG_ENDIAN |
806 | select SYS_SUPPORTS_HIGHMEM | |
807 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 808 | |
ade299d8 YY |
809 | config SIBYTE_SENTOSA |
810 | bool "Sibyte BCM91250E-Sentosa" | |
5e83d430 | 811 | select BOOT_ELF32 |
5e83d430 RB |
812 | select SIBYTE_SB1250 |
813 | select SWAP_IO_SPACE | |
7cf8053b | 814 | select SYS_HAS_CPU_SB1 |
5e83d430 | 815 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 816 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 817 | |
ade299d8 YY |
818 | config SIBYTE_BIGSUR |
819 | bool "Sibyte BCM91480B-BigSur" | |
5e83d430 | 820 | select BOOT_ELF32 |
ade299d8 | 821 | select NR_CPUS_DEFAULT_4 |
ade299d8 | 822 | select SIBYTE_BCM1x80 |
5e83d430 | 823 | select SWAP_IO_SPACE |
7cf8053b | 824 | select SYS_HAS_CPU_SB1 |
5e83d430 | 825 | select SYS_SUPPORTS_BIG_ENDIAN |
651194f8 | 826 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 827 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 828 | select ZONE_DMA32 if 64BIT |
1da177e4 | 829 | |
14b36af4 TB |
830 | config SNI_RM |
831 | bool "SNI RM200/300/400" | |
0e2794b0 RB |
832 | select FW_ARC if CPU_LITTLE_ENDIAN |
833 | select FW_ARC32 if CPU_LITTLE_ENDIAN | |
aaa9fad3 | 834 | select FW_SNIPROM if CPU_BIG_ENDIAN |
61ed242d | 835 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 836 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 837 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 838 | select BOOT_ELF32 |
42f77542 | 839 | select CEVT_R4K |
940f6b48 | 840 | select CSRC_R4K |
e2defae5 | 841 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
1da177e4 LT |
842 | select DMA_NONCOHERENT |
843 | select GENERIC_ISA_DMA | |
8a118c38 | 844 | select HAVE_PCSPKR_PLATFORM |
5e83d430 | 845 | select HW_HAS_EISA |
1da177e4 | 846 | select HW_HAS_PCI |
67e38cf2 | 847 | select IRQ_MIPS_CPU |
d865bea4 | 848 | select I8253 |
1da177e4 LT |
849 | select I8259 |
850 | select ISA | |
4a0312fc | 851 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
7cf8053b | 852 | select SYS_HAS_CPU_R4X00 |
4a0312fc | 853 | select SYS_HAS_CPU_R5000 |
c066a32a | 854 | select SYS_HAS_CPU_R10000 |
4a0312fc | 855 | select R5000_CPU_SCACHE |
36a88530 | 856 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 857 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 858 | select SYS_SUPPORTS_64BIT_KERNEL |
4a0312fc | 859 | select SYS_SUPPORTS_BIG_ENDIAN |
797798c1 | 860 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 861 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 862 | help |
14b36af4 TB |
863 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
864 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid | |
1da177e4 LT |
865 | Technology and now in turn merged with Fujitsu. Say Y here to |
866 | support this machine type. | |
867 | ||
edcaf1a6 AN |
868 | config MACH_TX39XX |
869 | bool "Toshiba TX39 series based machines" | |
5e83d430 | 870 | |
edcaf1a6 AN |
871 | config MACH_TX49XX |
872 | bool "Toshiba TX49 series based machines" | |
5e83d430 | 873 | |
73b4390f RB |
874 | config MIKROTIK_RB532 |
875 | bool "Mikrotik RB532 boards" | |
876 | select CEVT_R4K | |
877 | select CSRC_R4K | |
878 | select DMA_NONCOHERENT | |
73b4390f | 879 | select HW_HAS_PCI |
67e38cf2 | 880 | select IRQ_MIPS_CPU |
73b4390f RB |
881 | select SYS_HAS_CPU_MIPS32_R1 |
882 | select SYS_SUPPORTS_32BIT_KERNEL | |
883 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
884 | select SWAP_IO_SPACE | |
885 | select BOOT_RAW | |
d30a2b47 | 886 | select GPIOLIB |
930beb5a | 887 | select MIPS_L1_CACHE_SHIFT_4 |
73b4390f RB |
888 | help |
889 | Support the Mikrotik(tm) RouterBoard 532 series, | |
890 | based on the IDT RC32434 SoC. | |
891 | ||
9ddebc46 DD |
892 | config CAVIUM_OCTEON_SOC |
893 | bool "Cavium Networks Octeon SoC based boards" | |
a86c7f72 | 894 | select CEVT_R4K |
ea8c64ac | 895 | select ARCH_HAS_PHYS_TO_DMA |
491ec155 | 896 | select HAS_RAPIDIO |
d4a451d5 | 897 | select PHYS_ADDR_T_64BIT |
a86c7f72 DD |
898 | select SYS_SUPPORTS_64BIT_KERNEL |
899 | select SYS_SUPPORTS_BIG_ENDIAN | |
f65aad41 | 900 | select EDAC_SUPPORT |
b01aec9b | 901 | select EDAC_ATOMIC_SCRUB |
73569d87 DD |
902 | select SYS_SUPPORTS_LITTLE_ENDIAN |
903 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN | |
a86c7f72 | 904 | select SYS_HAS_EARLY_PRINTK |
5e683389 | 905 | select SYS_HAS_CPU_CAVIUM_OCTEON |
e8635b48 | 906 | select HW_HAS_PCI |
f00e001e | 907 | select ZONE_DMA32 |
465aaed0 | 908 | select HOLES_IN_ZONE |
d30a2b47 | 909 | select GPIOLIB |
6e511163 DD |
910 | select LIBFDT |
911 | select USE_OF | |
912 | select ARCH_SPARSEMEM_ENABLE | |
913 | select SYS_SUPPORTS_SMP | |
7820b84b DD |
914 | select NR_CPUS_DEFAULT_64 |
915 | select MIPS_NR_CPU_NR_MAP_1024 | |
e326479f | 916 | select BUILTIN_DTB |
8c1e6b14 | 917 | select MTD_COMPLEX_MAPPINGS |
09230cbc | 918 | select SWIOTLB |
3ff72be4 | 919 | select SYS_SUPPORTS_RELOCATABLE |
a86c7f72 DD |
920 | help |
921 | This option supports all of the Octeon reference boards from Cavium | |
922 | Networks. It builds a kernel that dynamically determines the Octeon | |
923 | CPU type and supports all known board reference implementations. | |
924 | Some of the supported boards are: | |
925 | EBT3000 | |
926 | EBH3000 | |
927 | EBH3100 | |
928 | Thunder | |
929 | Kodama | |
930 | Hikari | |
931 | Say Y here for most Octeon reference boards. | |
932 | ||
7f058e85 J |
933 | config NLM_XLR_BOARD |
934 | bool "Netlogic XLR/XLS based systems" | |
7f058e85 J |
935 | select BOOT_ELF32 |
936 | select NLM_COMMON | |
7f058e85 J |
937 | select SYS_HAS_CPU_XLR |
938 | select SYS_SUPPORTS_SMP | |
939 | select HW_HAS_PCI | |
940 | select SWAP_IO_SPACE | |
941 | select SYS_SUPPORTS_32BIT_KERNEL | |
942 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 943 | select PHYS_ADDR_T_64BIT |
7f058e85 J |
944 | select SYS_SUPPORTS_BIG_ENDIAN |
945 | select SYS_SUPPORTS_HIGHMEM | |
7f058e85 J |
946 | select NR_CPUS_DEFAULT_32 |
947 | select CEVT_R4K | |
948 | select CSRC_R4K | |
67e38cf2 | 949 | select IRQ_MIPS_CPU |
b97215fd | 950 | select ZONE_DMA32 if 64BIT |
7f058e85 J |
951 | select SYNC_R4K |
952 | select SYS_HAS_EARLY_PRINTK | |
8f0b0430 J |
953 | select SYS_SUPPORTS_ZBOOT |
954 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
7f058e85 J |
955 | help |
956 | Support for systems based on Netlogic XLR and XLS processors. | |
957 | Say Y here if you have a XLR or XLS based board. | |
958 | ||
1c773ea4 J |
959 | config NLM_XLP_BOARD |
960 | bool "Netlogic XLP based systems" | |
1c773ea4 J |
961 | select BOOT_ELF32 |
962 | select NLM_COMMON | |
963 | select SYS_HAS_CPU_XLP | |
964 | select SYS_SUPPORTS_SMP | |
965 | select HW_HAS_PCI | |
1c773ea4 J |
966 | select SYS_SUPPORTS_32BIT_KERNEL |
967 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 968 | select PHYS_ADDR_T_64BIT |
d30a2b47 | 969 | select GPIOLIB |
1c773ea4 J |
970 | select SYS_SUPPORTS_BIG_ENDIAN |
971 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
972 | select SYS_SUPPORTS_HIGHMEM | |
1c773ea4 J |
973 | select NR_CPUS_DEFAULT_32 |
974 | select CEVT_R4K | |
975 | select CSRC_R4K | |
67e38cf2 | 976 | select IRQ_MIPS_CPU |
b97215fd | 977 | select ZONE_DMA32 if 64BIT |
1c773ea4 J |
978 | select SYNC_R4K |
979 | select SYS_HAS_EARLY_PRINTK | |
2f6528e1 | 980 | select USE_OF |
8f0b0430 J |
981 | select SYS_SUPPORTS_ZBOOT |
982 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
1c773ea4 J |
983 | help |
984 | This board is based on Netlogic XLP Processor. | |
985 | Say Y here if you have a XLP based board. | |
986 | ||
9bc463be DD |
987 | config MIPS_PARAVIRT |
988 | bool "Para-Virtualized guest system" | |
989 | select CEVT_R4K | |
990 | select CSRC_R4K | |
9bc463be DD |
991 | select SYS_SUPPORTS_64BIT_KERNEL |
992 | select SYS_SUPPORTS_32BIT_KERNEL | |
993 | select SYS_SUPPORTS_BIG_ENDIAN | |
994 | select SYS_SUPPORTS_SMP | |
995 | select NR_CPUS_DEFAULT_4 | |
996 | select SYS_HAS_EARLY_PRINTK | |
997 | select SYS_HAS_CPU_MIPS32_R2 | |
998 | select SYS_HAS_CPU_MIPS64_R2 | |
999 | select SYS_HAS_CPU_CAVIUM_OCTEON | |
1000 | select HW_HAS_PCI | |
1001 | select SWAP_IO_SPACE | |
1002 | help | |
1003 | This option supports guest running under ???? | |
1004 | ||
5e83d430 | 1005 | endchoice |
1da177e4 | 1006 | |
e8c7c482 | 1007 | source "arch/mips/alchemy/Kconfig" |
3b12308f | 1008 | source "arch/mips/ath25/Kconfig" |
d4a67d9d | 1009 | source "arch/mips/ath79/Kconfig" |
a656ffcb | 1010 | source "arch/mips/bcm47xx/Kconfig" |
e7300d04 | 1011 | source "arch/mips/bcm63xx/Kconfig" |
8945e37e | 1012 | source "arch/mips/bmips/Kconfig" |
eed0eabd | 1013 | source "arch/mips/generic/Kconfig" |
5e83d430 | 1014 | source "arch/mips/jazz/Kconfig" |
5ebabe59 | 1015 | source "arch/mips/jz4740/Kconfig" |
8ec6d935 | 1016 | source "arch/mips/lantiq/Kconfig" |
1f21d2bd | 1017 | source "arch/mips/lasat/Kconfig" |
2572f00d | 1018 | source "arch/mips/pic32/Kconfig" |
af0cfb2c | 1019 | source "arch/mips/pistachio/Kconfig" |
0f3a05cb | 1020 | source "arch/mips/pmcs-msp71xx/Kconfig" |
ae2b5bb6 | 1021 | source "arch/mips/ralink/Kconfig" |
29c48699 | 1022 | source "arch/mips/sgi-ip27/Kconfig" |
38b18f72 | 1023 | source "arch/mips/sibyte/Kconfig" |
22b1d707 | 1024 | source "arch/mips/txx9/Kconfig" |
5e83d430 | 1025 | source "arch/mips/vr41xx/Kconfig" |
a86c7f72 | 1026 | source "arch/mips/cavium-octeon/Kconfig" |
30ad29bb HC |
1027 | source "arch/mips/loongson32/Kconfig" |
1028 | source "arch/mips/loongson64/Kconfig" | |
7f058e85 | 1029 | source "arch/mips/netlogic/Kconfig" |
ae6e7e63 | 1030 | source "arch/mips/paravirt/Kconfig" |
38b18f72 | 1031 | |
5e83d430 RB |
1032 | endmenu |
1033 | ||
1da177e4 LT |
1034 | config RWSEM_GENERIC_SPINLOCK |
1035 | bool | |
1036 | default y | |
1037 | ||
1038 | config RWSEM_XCHGADD_ALGORITHM | |
1039 | bool | |
1040 | ||
3c9ee7ef AM |
1041 | config GENERIC_HWEIGHT |
1042 | bool | |
1043 | default y | |
1044 | ||
1da177e4 LT |
1045 | config GENERIC_CALIBRATE_DELAY |
1046 | bool | |
1047 | default y | |
1048 | ||
ae1e9130 | 1049 | config SCHED_OMIT_FRAME_POINTER |
1cc89038 AN |
1050 | bool |
1051 | default y | |
1052 | ||
1da177e4 LT |
1053 | # |
1054 | # Select some configuration options automatically based on user selections. | |
1055 | # | |
0e2794b0 | 1056 | config FW_ARC |
1da177e4 | 1057 | bool |
1da177e4 | 1058 | |
61ed242d RB |
1059 | config ARCH_MAY_HAVE_PC_FDC |
1060 | bool | |
1061 | ||
9267a30d MSJ |
1062 | config BOOT_RAW |
1063 | bool | |
1064 | ||
217dd11e RB |
1065 | config CEVT_BCM1480 |
1066 | bool | |
1067 | ||
6457d9fc YY |
1068 | config CEVT_DS1287 |
1069 | bool | |
1070 | ||
1097c6ac YY |
1071 | config CEVT_GT641XX |
1072 | bool | |
1073 | ||
42f77542 RB |
1074 | config CEVT_R4K |
1075 | bool | |
1076 | ||
217dd11e RB |
1077 | config CEVT_SB1250 |
1078 | bool | |
1079 | ||
229f773e AN |
1080 | config CEVT_TXX9 |
1081 | bool | |
1082 | ||
217dd11e RB |
1083 | config CSRC_BCM1480 |
1084 | bool | |
1085 | ||
4247417d YY |
1086 | config CSRC_IOASIC |
1087 | bool | |
1088 | ||
940f6b48 RB |
1089 | config CSRC_R4K |
1090 | bool | |
1091 | ||
217dd11e RB |
1092 | config CSRC_SB1250 |
1093 | bool | |
1094 | ||
a7f4df4e AS |
1095 | config MIPS_CLOCK_VSYSCALL |
1096 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC | |
1097 | ||
a9aec7fe | 1098 | config GPIO_TXX9 |
d30a2b47 | 1099 | select GPIOLIB |
a9aec7fe AN |
1100 | bool |
1101 | ||
0e2794b0 | 1102 | config FW_CFE |
df78b5c8 AJ |
1103 | bool |
1104 | ||
40e084a5 RB |
1105 | config ARCH_SUPPORTS_UPROBES |
1106 | bool | |
1107 | ||
885014bc | 1108 | config DMA_MAYBE_COHERENT |
f3ecc0ff | 1109 | select ARCH_HAS_DMA_COHERENCE_H |
885014bc FF |
1110 | select DMA_NONCOHERENT |
1111 | bool | |
1112 | ||
20d33064 PB |
1113 | config DMA_PERDEV_COHERENT |
1114 | bool | |
5748e1b3 | 1115 | select DMA_NONCOHERENT |
20d33064 | 1116 | |
4ce588cd RB |
1117 | config DMA_NONCOHERENT |
1118 | bool | |
58b04406 | 1119 | select ARCH_HAS_DMA_MMAP_PGPROT |
f8c55dc6 CH |
1120 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
1121 | select ARCH_HAS_SYNC_DMA_FOR_CPU | |
e1e02b32 | 1122 | select NEED_DMA_MAP_STATE |
58b04406 | 1123 | select ARCH_HAS_DMA_COHERENT_TO_PFN |
f8c55dc6 | 1124 | select DMA_NONCOHERENT_CACHE_SYNC |
4ce588cd | 1125 | |
36a88530 | 1126 | config SYS_HAS_EARLY_PRINTK |
1da177e4 | 1127 | bool |
1da177e4 | 1128 | |
1b2bc75c | 1129 | config SYS_SUPPORTS_HOTPLUG_CPU |
dbb74540 | 1130 | bool |
dbb74540 | 1131 | |
1da177e4 LT |
1132 | config MIPS_BONITO64 |
1133 | bool | |
1da177e4 LT |
1134 | |
1135 | config MIPS_MSC | |
1136 | bool | |
1da177e4 | 1137 | |
1f21d2bd BM |
1138 | config MIPS_NILE4 |
1139 | bool | |
1140 | ||
39b8d525 RB |
1141 | config SYNC_R4K |
1142 | bool | |
1143 | ||
487d70d0 GJ |
1144 | config MIPS_MACHINE |
1145 | def_bool n | |
1146 | ||
ce816fa8 | 1147 | config NO_IOPORT_MAP |
d388d685 MR |
1148 | def_bool n |
1149 | ||
4e0748f5 MC |
1150 | config GENERIC_CSUM |
1151 | bool | |
932afdee | 1152 | default y if !CPU_HAS_LOAD_STORE_LR |
4e0748f5 | 1153 | |
8313da30 RB |
1154 | config GENERIC_ISA_DMA |
1155 | bool | |
1156 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n | |
a35bee8a | 1157 | select ISA_DMA_API |
8313da30 | 1158 | |
aa414dff RB |
1159 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
1160 | bool | |
8313da30 | 1161 | select GENERIC_ISA_DMA |
aa414dff | 1162 | |
a35bee8a NK |
1163 | config ISA_DMA_API |
1164 | bool | |
1165 | ||
465aaed0 DD |
1166 | config HOLES_IN_ZONE |
1167 | bool | |
1168 | ||
8c530ea3 MR |
1169 | config SYS_SUPPORTS_RELOCATABLE |
1170 | bool | |
1171 | help | |
1172 | Selected if the platform supports relocating the kernel. | |
1173 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF | |
1174 | to allow access to command line and entropy sources. | |
1175 | ||
f381bf6d DD |
1176 | config MIPS_CBPF_JIT |
1177 | def_bool y | |
1178 | depends on BPF_JIT && HAVE_CBPF_JIT | |
1179 | ||
1180 | config MIPS_EBPF_JIT | |
1181 | def_bool y | |
1182 | depends on BPF_JIT && HAVE_EBPF_JIT | |
1183 | ||
1184 | ||
5e83d430 | 1185 | # |
6b2aac42 | 1186 | # Endianness selection. Sufficiently obscure so many users don't know what to |
5e83d430 RB |
1187 | # answer,so we try hard to limit the available choices. Also the use of a |
1188 | # choice statement should be more obvious to the user. | |
1189 | # | |
1190 | choice | |
6b2aac42 | 1191 | prompt "Endianness selection" |
1da177e4 LT |
1192 | help |
1193 | Some MIPS machines can be configured for either little or big endian | |
5e83d430 | 1194 | byte order. These modes require different kernels and a different |
3cb2fccc | 1195 | Linux distribution. In general there is one preferred byteorder for a |
5e83d430 | 1196 | particular system but some systems are just as commonly used in the |
3dde6ad8 | 1197 | one or the other endianness. |
5e83d430 RB |
1198 | |
1199 | config CPU_BIG_ENDIAN | |
1200 | bool "Big endian" | |
1201 | depends on SYS_SUPPORTS_BIG_ENDIAN | |
1202 | ||
1203 | config CPU_LITTLE_ENDIAN | |
1204 | bool "Little endian" | |
1205 | depends on SYS_SUPPORTS_LITTLE_ENDIAN | |
5e83d430 RB |
1206 | |
1207 | endchoice | |
1208 | ||
22b0763a DD |
1209 | config EXPORT_UASM |
1210 | bool | |
1211 | ||
2116245e RB |
1212 | config SYS_SUPPORTS_APM_EMULATION |
1213 | bool | |
1214 | ||
5e83d430 RB |
1215 | config SYS_SUPPORTS_BIG_ENDIAN |
1216 | bool | |
1217 | ||
1218 | config SYS_SUPPORTS_LITTLE_ENDIAN | |
1219 | bool | |
1da177e4 | 1220 | |
9cffd154 DD |
1221 | config SYS_SUPPORTS_HUGETLBFS |
1222 | bool | |
1223 | depends on CPU_SUPPORTS_HUGEPAGES && 64BIT | |
1224 | default y | |
1225 | ||
aa1762f4 DD |
1226 | config MIPS_HUGE_TLB_SUPPORT |
1227 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE | |
1228 | ||
1da177e4 LT |
1229 | config IRQ_CPU_RM7K |
1230 | bool | |
1231 | ||
9267a30d MSJ |
1232 | config IRQ_MSP_SLP |
1233 | bool | |
1234 | ||
1235 | config IRQ_MSP_CIC | |
1236 | bool | |
1237 | ||
8420fd00 AN |
1238 | config IRQ_TXX9 |
1239 | bool | |
1240 | ||
d5ab1a69 YY |
1241 | config IRQ_GT641XX |
1242 | bool | |
1243 | ||
252161ec | 1244 | config PCI_GT64XXX_PCI0 |
1da177e4 | 1245 | bool |
1da177e4 | 1246 | |
9267a30d MSJ |
1247 | config NO_EXCEPT_FILL |
1248 | bool | |
1249 | ||
a83860c2 RB |
1250 | config SOC_EMMA2RH |
1251 | bool | |
1252 | select CEVT_R4K | |
1253 | select CSRC_R4K | |
1254 | select DMA_NONCOHERENT | |
67e38cf2 | 1255 | select IRQ_MIPS_CPU |
a83860c2 RB |
1256 | select SWAP_IO_SPACE |
1257 | select SYS_HAS_CPU_R5500 | |
1258 | select SYS_SUPPORTS_32BIT_KERNEL | |
1259 | select SYS_SUPPORTS_64BIT_KERNEL | |
1260 | select SYS_SUPPORTS_BIG_ENDIAN | |
1261 | ||
edb6310a DL |
1262 | config SOC_PNX833X |
1263 | bool | |
1264 | select CEVT_R4K | |
1265 | select CSRC_R4K | |
67e38cf2 | 1266 | select IRQ_MIPS_CPU |
edb6310a DL |
1267 | select DMA_NONCOHERENT |
1268 | select SYS_HAS_CPU_MIPS32_R2 | |
1269 | select SYS_SUPPORTS_32BIT_KERNEL | |
1270 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1271 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 1272 | select SYS_SUPPORTS_MIPS16 |
edb6310a DL |
1273 | select CPU_MIPSR2_IRQ_VI |
1274 | ||
1275 | config SOC_PNX8335 | |
1276 | bool | |
1277 | select SOC_PNX833X | |
1278 | ||
a7e07b1a MC |
1279 | config MIPS_SPRAM |
1280 | bool | |
1281 | ||
1da177e4 LT |
1282 | config SWAP_IO_SPACE |
1283 | bool | |
1284 | ||
e2defae5 TB |
1285 | config SGI_HAS_INDYDOG |
1286 | bool | |
1287 | ||
5b438c44 TB |
1288 | config SGI_HAS_HAL2 |
1289 | bool | |
1290 | ||
e2defae5 TB |
1291 | config SGI_HAS_SEEQ |
1292 | bool | |
1293 | ||
1294 | config SGI_HAS_WD93 | |
1295 | bool | |
1296 | ||
1297 | config SGI_HAS_ZILOG | |
1298 | bool | |
1299 | ||
1300 | config SGI_HAS_I8042 | |
1301 | bool | |
1302 | ||
1303 | config DEFAULT_SGI_PARTITION | |
1304 | bool | |
1305 | ||
0e2794b0 | 1306 | config FW_ARC32 |
5e83d430 RB |
1307 | bool |
1308 | ||
aaa9fad3 | 1309 | config FW_SNIPROM |
231a35d3 TB |
1310 | bool |
1311 | ||
1da177e4 LT |
1312 | config BOOT_ELF32 |
1313 | bool | |
1da177e4 | 1314 | |
930beb5a FF |
1315 | config MIPS_L1_CACHE_SHIFT_4 |
1316 | bool | |
1317 | ||
1318 | config MIPS_L1_CACHE_SHIFT_5 | |
1319 | bool | |
1320 | ||
1321 | config MIPS_L1_CACHE_SHIFT_6 | |
1322 | bool | |
1323 | ||
1324 | config MIPS_L1_CACHE_SHIFT_7 | |
1325 | bool | |
1326 | ||
1da177e4 LT |
1327 | config MIPS_L1_CACHE_SHIFT |
1328 | int | |
a4c0201e | 1329 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
5432eeb6 KC |
1330 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
1331 | default "5" if MIPS_L1_CACHE_SHIFT_5 | |
1332 | default "4" if MIPS_L1_CACHE_SHIFT_4 | |
1da177e4 LT |
1333 | default "5" |
1334 | ||
1da177e4 LT |
1335 | config HAVE_STD_PC_SERIAL_PORT |
1336 | bool | |
1337 | ||
1da177e4 LT |
1338 | config ARC_CONSOLE |
1339 | bool "ARC console support" | |
e2defae5 | 1340 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
1da177e4 LT |
1341 | |
1342 | config ARC_MEMORY | |
1343 | bool | |
14b36af4 | 1344 | depends on MACH_JAZZ || SNI_RM || SGI_IP32 |
1da177e4 LT |
1345 | default y |
1346 | ||
1347 | config ARC_PROMLIB | |
1348 | bool | |
e2defae5 | 1349 | depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 |
1da177e4 LT |
1350 | default y |
1351 | ||
0e2794b0 | 1352 | config FW_ARC64 |
1da177e4 | 1353 | bool |
1da177e4 LT |
1354 | |
1355 | config BOOT_ELF64 | |
1356 | bool | |
1da177e4 | 1357 | |
1da177e4 LT |
1358 | menu "CPU selection" |
1359 | ||
1360 | choice | |
1361 | prompt "CPU type" | |
1362 | default CPU_R4X00 | |
1363 | ||
0e476d91 HC |
1364 | config CPU_LOONGSON3 |
1365 | bool "Loongson 3 CPU" | |
1366 | depends on SYS_HAS_CPU_LOONGSON3 | |
d3bc81be | 1367 | select ARCH_HAS_PHYS_TO_DMA |
0e476d91 HC |
1368 | select CPU_SUPPORTS_64BIT_KERNEL |
1369 | select CPU_SUPPORTS_HIGHMEM | |
1370 | select CPU_SUPPORTS_HUGEPAGES | |
932afdee | 1371 | select CPU_HAS_LOAD_STORE_LR |
0e476d91 HC |
1372 | select WEAK_ORDERING |
1373 | select WEAK_REORDERING_BEYOND_LLSC | |
b2edcfc8 | 1374 | select MIPS_PGD_C0_CONTEXT |
17c99d94 | 1375 | select MIPS_L1_CACHE_SHIFT_6 |
d30a2b47 | 1376 | select GPIOLIB |
09230cbc | 1377 | select SWIOTLB |
0e476d91 HC |
1378 | help |
1379 | The Loongson 3 processor implements the MIPS64R2 instruction | |
1380 | set with many extensions. | |
1381 | ||
1e820da3 HC |
1382 | config LOONGSON3_ENHANCEMENT |
1383 | bool "New Loongson 3 CPU Enhancements" | |
1384 | default n | |
1385 | select CPU_MIPSR2 | |
1386 | select CPU_HAS_PREFETCH | |
1387 | depends on CPU_LOONGSON3 | |
1388 | help | |
1389 | New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A | |
1390 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as | |
1391 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User | |
1392 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), | |
1393 | Fast TLB refill support, etc. | |
1394 | ||
1395 | This option enable those enhancements which are not probed at run | |
1396 | time. If you want a generic kernel to run on all Loongson 3 machines, | |
1397 | please say 'N' here. If you want a high-performance kernel to run on | |
1398 | new Loongson 3 machines only, please say 'Y' here. | |
1399 | ||
3702bba5 WZ |
1400 | config CPU_LOONGSON2E |
1401 | bool "Loongson 2E" | |
1402 | depends on SYS_HAS_CPU_LOONGSON2E | |
1403 | select CPU_LOONGSON2 | |
2a21c730 FZ |
1404 | help |
1405 | The Loongson 2E processor implements the MIPS III instruction set | |
1406 | with many extensions. | |
1407 | ||
25985edc | 1408 | It has an internal FPGA northbridge, which is compatible to |
6f7a251a WZ |
1409 | bonito64. |
1410 | ||
1411 | config CPU_LOONGSON2F | |
1412 | bool "Loongson 2F" | |
1413 | depends on SYS_HAS_CPU_LOONGSON2F | |
1414 | select CPU_LOONGSON2 | |
d30a2b47 | 1415 | select GPIOLIB |
6f7a251a WZ |
1416 | help |
1417 | The Loongson 2F processor implements the MIPS III instruction set | |
1418 | with many extensions. | |
1419 | ||
1420 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | |
1421 | have a similar programming interface with FPGA northbridge used in | |
1422 | Loongson2E. | |
1423 | ||
ca585cf9 KC |
1424 | config CPU_LOONGSON1B |
1425 | bool "Loongson 1B" | |
1426 | depends on SYS_HAS_CPU_LOONGSON1B | |
1427 | select CPU_LOONGSON1 | |
9ec88b60 | 1428 | select LEDS_GPIO_REGISTER |
ca585cf9 KC |
1429 | help |
1430 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1431 | Release 1 instruction set and part of the MIPS32 Release 2 |
1432 | instruction set. | |
ca585cf9 | 1433 | |
12e3280b YL |
1434 | config CPU_LOONGSON1C |
1435 | bool "Loongson 1C" | |
1436 | depends on SYS_HAS_CPU_LOONGSON1C | |
1437 | select CPU_LOONGSON1 | |
12e3280b YL |
1438 | select LEDS_GPIO_REGISTER |
1439 | help | |
1440 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1441 | Release 1 instruction set and part of the MIPS32 Release 2 |
1442 | instruction set. | |
12e3280b | 1443 | |
6e760c8d RB |
1444 | config CPU_MIPS32_R1 |
1445 | bool "MIPS32 Release 1" | |
7cf8053b | 1446 | depends on SYS_HAS_CPU_MIPS32_R1 |
6e760c8d | 1447 | select CPU_HAS_PREFETCH |
932afdee | 1448 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1449 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1450 | select CPU_SUPPORTS_HIGHMEM |
1e5f1caa | 1451 | help |
5e83d430 | 1452 | Choose this option to build a kernel for release 1 or later of the |
1e5f1caa RB |
1453 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1454 | MIPS processor are based on a MIPS32 processor. If you know the | |
1455 | specific type of processor in your system, choose those that one | |
1456 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1457 | Release 2 of the MIPS32 architecture is available since several | |
1458 | years so chances are you even have a MIPS32 Release 2 processor | |
1459 | in which case you should choose CPU_MIPS32_R2 instead for better | |
1460 | performance. | |
1461 | ||
1462 | config CPU_MIPS32_R2 | |
1463 | bool "MIPS32 Release 2" | |
7cf8053b | 1464 | depends on SYS_HAS_CPU_MIPS32_R2 |
1e5f1caa | 1465 | select CPU_HAS_PREFETCH |
932afdee | 1466 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1467 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1468 | select CPU_SUPPORTS_HIGHMEM |
a5e9a69e | 1469 | select CPU_SUPPORTS_MSA |
2235a54d | 1470 | select HAVE_KVM |
6e760c8d | 1471 | help |
5e83d430 | 1472 | Choose this option to build a kernel for release 2 or later of the |
6e760c8d RB |
1473 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1474 | MIPS processor are based on a MIPS32 processor. If you know the | |
1475 | specific type of processor in your system, choose those that one | |
1476 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1477 | ||
7fd08ca5 | 1478 | config CPU_MIPS32_R6 |
674d10e2 | 1479 | bool "MIPS32 Release 6" |
7fd08ca5 LY |
1480 | depends on SYS_HAS_CPU_MIPS32_R6 |
1481 | select CPU_HAS_PREFETCH | |
1482 | select CPU_SUPPORTS_32BIT_KERNEL | |
1483 | select CPU_SUPPORTS_HIGHMEM | |
1484 | select CPU_SUPPORTS_MSA | |
1485 | select HAVE_KVM | |
1486 | select MIPS_O32_FP64_SUPPORT | |
1487 | help | |
1488 | Choose this option to build a kernel for release 6 or later of the | |
1489 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1490 | family, are based on a MIPS32r6 processor. If you own an older | |
1491 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1492 | ||
6e760c8d RB |
1493 | config CPU_MIPS64_R1 |
1494 | bool "MIPS64 Release 1" | |
7cf8053b | 1495 | depends on SYS_HAS_CPU_MIPS64_R1 |
797798c1 | 1496 | select CPU_HAS_PREFETCH |
932afdee | 1497 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1498 | select CPU_SUPPORTS_32BIT_KERNEL |
1499 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1500 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1501 | select CPU_SUPPORTS_HUGEPAGES |
6e760c8d RB |
1502 | help |
1503 | Choose this option to build a kernel for release 1 or later of the | |
1504 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1505 | MIPS processor are based on a MIPS64 processor. If you know the | |
1506 | specific type of processor in your system, choose those that one | |
1507 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1e5f1caa RB |
1508 | Release 2 of the MIPS64 architecture is available since several |
1509 | years so chances are you even have a MIPS64 Release 2 processor | |
1510 | in which case you should choose CPU_MIPS64_R2 instead for better | |
1511 | performance. | |
1512 | ||
1513 | config CPU_MIPS64_R2 | |
1514 | bool "MIPS64 Release 2" | |
7cf8053b | 1515 | depends on SYS_HAS_CPU_MIPS64_R2 |
797798c1 | 1516 | select CPU_HAS_PREFETCH |
932afdee | 1517 | select CPU_HAS_LOAD_STORE_LR |
1e5f1caa RB |
1518 | select CPU_SUPPORTS_32BIT_KERNEL |
1519 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1520 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1521 | select CPU_SUPPORTS_HUGEPAGES |
a5e9a69e | 1522 | select CPU_SUPPORTS_MSA |
40a2df49 | 1523 | select HAVE_KVM |
1e5f1caa RB |
1524 | help |
1525 | Choose this option to build a kernel for release 2 or later of the | |
1526 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1527 | MIPS processor are based on a MIPS64 processor. If you know the | |
1528 | specific type of processor in your system, choose those that one | |
1529 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1da177e4 | 1530 | |
7fd08ca5 | 1531 | config CPU_MIPS64_R6 |
674d10e2 | 1532 | bool "MIPS64 Release 6" |
7fd08ca5 LY |
1533 | depends on SYS_HAS_CPU_MIPS64_R6 |
1534 | select CPU_HAS_PREFETCH | |
1535 | select CPU_SUPPORTS_32BIT_KERNEL | |
1536 | select CPU_SUPPORTS_64BIT_KERNEL | |
1537 | select CPU_SUPPORTS_HIGHMEM | |
1538 | select CPU_SUPPORTS_MSA | |
2e6c7747 | 1539 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
40a2df49 | 1540 | select HAVE_KVM |
7fd08ca5 LY |
1541 | help |
1542 | Choose this option to build a kernel for release 6 or later of the | |
1543 | MIPS64 architecture. New MIPS processors, starting with the Warrior | |
1544 | family, are based on a MIPS64r6 processor. If you own an older | |
1545 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. | |
1546 | ||
1da177e4 LT |
1547 | config CPU_R3000 |
1548 | bool "R3000" | |
7cf8053b | 1549 | depends on SYS_HAS_CPU_R3000 |
f7062ddb | 1550 | select CPU_HAS_WB |
932afdee | 1551 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb | 1552 | select CPU_SUPPORTS_32BIT_KERNEL |
797798c1 | 1553 | select CPU_SUPPORTS_HIGHMEM |
1da177e4 LT |
1554 | help |
1555 | Please make sure to pick the right CPU type. Linux/MIPS is not | |
1556 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will | |
1557 | *not* work on R4000 machines and vice versa. However, since most | |
1558 | of the supported machines have an R4000 (or similar) CPU, R4x00 | |
1559 | might be a safe bet. If the resulting kernel does not work, | |
1560 | try to recompile with R3000. | |
1561 | ||
1562 | config CPU_TX39XX | |
1563 | bool "R39XX" | |
7cf8053b | 1564 | depends on SYS_HAS_CPU_TX39XX |
ed5ba2fb | 1565 | select CPU_SUPPORTS_32BIT_KERNEL |
932afdee | 1566 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1567 | |
1568 | config CPU_VR41XX | |
1569 | bool "R41xx" | |
7cf8053b | 1570 | depends on SYS_HAS_CPU_VR41XX |
ed5ba2fb YY |
1571 | select CPU_SUPPORTS_32BIT_KERNEL |
1572 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1573 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1574 | help |
5e83d430 | 1575 | The options selects support for the NEC VR4100 series of processors. |
1da177e4 LT |
1576 | Only choose this option if you have one of these processors as a |
1577 | kernel built with this option will not run on any other type of | |
1578 | processor or vice versa. | |
1579 | ||
1580 | config CPU_R4300 | |
1581 | bool "R4300" | |
7cf8053b | 1582 | depends on SYS_HAS_CPU_R4300 |
ed5ba2fb YY |
1583 | select CPU_SUPPORTS_32BIT_KERNEL |
1584 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1585 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1586 | help |
1587 | MIPS Technologies R4300-series processors. | |
1588 | ||
1589 | config CPU_R4X00 | |
1590 | bool "R4x00" | |
7cf8053b | 1591 | depends on SYS_HAS_CPU_R4X00 |
ed5ba2fb YY |
1592 | select CPU_SUPPORTS_32BIT_KERNEL |
1593 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1594 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1595 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1596 | help |
1597 | MIPS Technologies R4000-series processors other than 4300, including | |
1598 | the R4000, R4400, R4600, and 4700. | |
1599 | ||
1600 | config CPU_TX49XX | |
1601 | bool "R49XX" | |
7cf8053b | 1602 | depends on SYS_HAS_CPU_TX49XX |
de862b48 | 1603 | select CPU_HAS_PREFETCH |
932afdee | 1604 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1605 | select CPU_SUPPORTS_32BIT_KERNEL |
1606 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1607 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1608 | |
1609 | config CPU_R5000 | |
1610 | bool "R5000" | |
7cf8053b | 1611 | depends on SYS_HAS_CPU_R5000 |
ed5ba2fb YY |
1612 | select CPU_SUPPORTS_32BIT_KERNEL |
1613 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1614 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1615 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1616 | help |
1617 | MIPS Technologies R5000-series processors other than the Nevada. | |
1618 | ||
1619 | config CPU_R5432 | |
1620 | bool "R5432" | |
7cf8053b | 1621 | depends on SYS_HAS_CPU_R5432 |
5e83d430 RB |
1622 | select CPU_SUPPORTS_32BIT_KERNEL |
1623 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1624 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1625 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1626 | |
542c1020 SK |
1627 | config CPU_R5500 |
1628 | bool "R5500" | |
1629 | depends on SYS_HAS_CPU_R5500 | |
542c1020 SK |
1630 | select CPU_SUPPORTS_32BIT_KERNEL |
1631 | select CPU_SUPPORTS_64BIT_KERNEL | |
9cffd154 | 1632 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1633 | select CPU_HAS_LOAD_STORE_LR |
542c1020 SK |
1634 | help |
1635 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV | |
1636 | instruction set. | |
1637 | ||
1da177e4 LT |
1638 | config CPU_NEVADA |
1639 | bool "RM52xx" | |
7cf8053b | 1640 | depends on SYS_HAS_CPU_NEVADA |
ed5ba2fb YY |
1641 | select CPU_SUPPORTS_32BIT_KERNEL |
1642 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1643 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1644 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1645 | help |
1646 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. | |
1647 | ||
1648 | config CPU_R8000 | |
1649 | bool "R8000" | |
7cf8053b | 1650 | depends on SYS_HAS_CPU_R8000 |
5e83d430 | 1651 | select CPU_HAS_PREFETCH |
932afdee | 1652 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb | 1653 | select CPU_SUPPORTS_64BIT_KERNEL |
1da177e4 LT |
1654 | help |
1655 | MIPS Technologies R8000 processors. Note these processors are | |
1656 | uncommon and the support for them is incomplete. | |
1657 | ||
1658 | config CPU_R10000 | |
1659 | bool "R10000" | |
7cf8053b | 1660 | depends on SYS_HAS_CPU_R10000 |
5e83d430 | 1661 | select CPU_HAS_PREFETCH |
932afdee | 1662 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1663 | select CPU_SUPPORTS_32BIT_KERNEL |
1664 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1665 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1666 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1667 | help |
1668 | MIPS Technologies R10000-series processors. | |
1669 | ||
1670 | config CPU_RM7000 | |
1671 | bool "RM7000" | |
7cf8053b | 1672 | depends on SYS_HAS_CPU_RM7000 |
5e83d430 | 1673 | select CPU_HAS_PREFETCH |
932afdee | 1674 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1675 | select CPU_SUPPORTS_32BIT_KERNEL |
1676 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1677 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1678 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1679 | |
1680 | config CPU_SB1 | |
1681 | bool "SB1" | |
7cf8053b | 1682 | depends on SYS_HAS_CPU_SB1 |
932afdee | 1683 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1684 | select CPU_SUPPORTS_32BIT_KERNEL |
1685 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1686 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1687 | select CPU_SUPPORTS_HUGEPAGES |
0004a9df | 1688 | select WEAK_ORDERING |
1da177e4 | 1689 | |
a86c7f72 DD |
1690 | config CPU_CAVIUM_OCTEON |
1691 | bool "Cavium Octeon processor" | |
5e683389 | 1692 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
a86c7f72 | 1693 | select CPU_HAS_PREFETCH |
932afdee | 1694 | select CPU_HAS_LOAD_STORE_LR |
a86c7f72 | 1695 | select CPU_SUPPORTS_64BIT_KERNEL |
a86c7f72 | 1696 | select WEAK_ORDERING |
a86c7f72 | 1697 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1698 | select CPU_SUPPORTS_HUGEPAGES |
df115f3e BH |
1699 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
1700 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
930beb5a | 1701 | select MIPS_L1_CACHE_SHIFT_7 |
0ae3abcd | 1702 | select HAVE_KVM |
a86c7f72 DD |
1703 | help |
1704 | The Cavium Octeon processor is a highly integrated chip containing | |
1705 | many ethernet hardware widgets for networking tasks. The processor | |
1706 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. | |
1707 | Full details can be found at http://www.caviumnetworks.com. | |
1708 | ||
cd746249 JG |
1709 | config CPU_BMIPS |
1710 | bool "Broadcom BMIPS" | |
1711 | depends on SYS_HAS_CPU_BMIPS | |
1712 | select CPU_MIPS32 | |
fe7f62c0 | 1713 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
cd746249 JG |
1714 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
1715 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 | |
1716 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 | |
1717 | select CPU_SUPPORTS_32BIT_KERNEL | |
1718 | select DMA_NONCOHERENT | |
67e38cf2 | 1719 | select IRQ_MIPS_CPU |
cd746249 JG |
1720 | select SWAP_IO_SPACE |
1721 | select WEAK_ORDERING | |
c1c0c461 | 1722 | select CPU_SUPPORTS_HIGHMEM |
69aaf9c8 | 1723 | select CPU_HAS_PREFETCH |
932afdee | 1724 | select CPU_HAS_LOAD_STORE_LR |
a8d709b0 MM |
1725 | select CPU_SUPPORTS_CPUFREQ |
1726 | select MIPS_EXTERNAL_TIMER | |
c1c0c461 | 1727 | help |
fe7f62c0 | 1728 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
c1c0c461 | 1729 | |
7f058e85 J |
1730 | config CPU_XLR |
1731 | bool "Netlogic XLR SoC" | |
1732 | depends on SYS_HAS_CPU_XLR | |
932afdee | 1733 | select CPU_HAS_LOAD_STORE_LR |
7f058e85 J |
1734 | select CPU_SUPPORTS_32BIT_KERNEL |
1735 | select CPU_SUPPORTS_64BIT_KERNEL | |
1736 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1737 | select CPU_SUPPORTS_HUGEPAGES |
7f058e85 J |
1738 | select WEAK_ORDERING |
1739 | select WEAK_REORDERING_BEYOND_LLSC | |
7f058e85 J |
1740 | help |
1741 | Netlogic Microsystems XLR/XLS processors. | |
1c773ea4 J |
1742 | |
1743 | config CPU_XLP | |
1744 | bool "Netlogic XLP SoC" | |
1745 | depends on SYS_HAS_CPU_XLP | |
1746 | select CPU_SUPPORTS_32BIT_KERNEL | |
1747 | select CPU_SUPPORTS_64BIT_KERNEL | |
1748 | select CPU_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1749 | select WEAK_ORDERING |
1750 | select WEAK_REORDERING_BEYOND_LLSC | |
1751 | select CPU_HAS_PREFETCH | |
932afdee | 1752 | select CPU_HAS_LOAD_STORE_LR |
d6504846 | 1753 | select CPU_MIPSR2 |
ddba6833 | 1754 | select CPU_SUPPORTS_HUGEPAGES |
2db003a5 | 1755 | select MIPS_ASID_BITS_VARIABLE |
1c773ea4 J |
1756 | help |
1757 | Netlogic Microsystems XLP processors. | |
1da177e4 LT |
1758 | endchoice |
1759 | ||
a6e18781 LY |
1760 | config CPU_MIPS32_3_5_FEATURES |
1761 | bool "MIPS32 Release 3.5 Features" | |
1762 | depends on SYS_HAS_CPU_MIPS32_R3_5 | |
7fd08ca5 | 1763 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 |
a6e18781 LY |
1764 | help |
1765 | Choose this option to build a kernel for release 2 or later of the | |
1766 | MIPS32 architecture including features from the 3.5 release such as | |
1767 | support for Enhanced Virtual Addressing (EVA). | |
1768 | ||
1769 | config CPU_MIPS32_3_5_EVA | |
1770 | bool "Enhanced Virtual Addressing (EVA)" | |
1771 | depends on CPU_MIPS32_3_5_FEATURES | |
1772 | select EVA | |
1773 | default y | |
1774 | help | |
1775 | Choose this option if you want to enable the Enhanced Virtual | |
1776 | Addressing (EVA) on your MIPS32 core (such as proAptiv). | |
1777 | One of its primary benefits is an increase in the maximum size | |
1778 | of lowmem (up to 3GB). If unsure, say 'N' here. | |
1779 | ||
c5b36783 SH |
1780 | config CPU_MIPS32_R5_FEATURES |
1781 | bool "MIPS32 Release 5 Features" | |
1782 | depends on SYS_HAS_CPU_MIPS32_R5 | |
1783 | depends on CPU_MIPS32_R2 | |
1784 | help | |
1785 | Choose this option to build a kernel for release 2 or later of the | |
1786 | MIPS32 architecture including features from release 5 such as | |
1787 | support for Extended Physical Addressing (XPA). | |
1788 | ||
1789 | config CPU_MIPS32_R5_XPA | |
1790 | bool "Extended Physical Addressing (XPA)" | |
1791 | depends on CPU_MIPS32_R5_FEATURES | |
1792 | depends on !EVA | |
1793 | depends on !PAGE_SIZE_4KB | |
1794 | depends on SYS_SUPPORTS_HIGHMEM | |
1795 | select XPA | |
1796 | select HIGHMEM | |
d4a451d5 | 1797 | select PHYS_ADDR_T_64BIT |
c5b36783 SH |
1798 | default n |
1799 | help | |
1800 | Choose this option if you want to enable the Extended Physical | |
1801 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The | |
1802 | benefit is to increase physical addressing equal to or greater | |
1803 | than 40 bits. Note that this has the side effect of turning on | |
1804 | 64-bit addressing which in turn makes the PTEs 64-bit in size. | |
1805 | If unsure, say 'N' here. | |
1806 | ||
622844bf WZ |
1807 | if CPU_LOONGSON2F |
1808 | config CPU_NOP_WORKAROUNDS | |
1809 | bool | |
1810 | ||
1811 | config CPU_JUMP_WORKAROUNDS | |
1812 | bool | |
1813 | ||
1814 | config CPU_LOONGSON2F_WORKAROUNDS | |
1815 | bool "Loongson 2F Workarounds" | |
1816 | default y | |
1817 | select CPU_NOP_WORKAROUNDS | |
1818 | select CPU_JUMP_WORKAROUNDS | |
1819 | help | |
1820 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which | |
1821 | require workarounds. Without workarounds the system may hang | |
1822 | unexpectedly. For more information please refer to the gas | |
1823 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. | |
1824 | ||
1825 | Loongson 2F03 and later have fixed these issues and no workarounds | |
1826 | are needed. The workarounds have no significant side effect on them | |
1827 | but may decrease the performance of the system so this option should | |
1828 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 | |
1829 | systems. | |
1830 | ||
1831 | If unsure, please say Y. | |
1832 | endif # CPU_LOONGSON2F | |
1833 | ||
1b93b3c3 WZ |
1834 | config SYS_SUPPORTS_ZBOOT |
1835 | bool | |
1836 | select HAVE_KERNEL_GZIP | |
1837 | select HAVE_KERNEL_BZIP2 | |
31c4867d | 1838 | select HAVE_KERNEL_LZ4 |
1b93b3c3 | 1839 | select HAVE_KERNEL_LZMA |
fe1d45e0 | 1840 | select HAVE_KERNEL_LZO |
4e23eb63 | 1841 | select HAVE_KERNEL_XZ |
1b93b3c3 WZ |
1842 | |
1843 | config SYS_SUPPORTS_ZBOOT_UART16550 | |
1844 | bool | |
1845 | select SYS_SUPPORTS_ZBOOT | |
1846 | ||
dbb98314 AB |
1847 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
1848 | bool | |
1849 | select SYS_SUPPORTS_ZBOOT | |
1850 | ||
3702bba5 WZ |
1851 | config CPU_LOONGSON2 |
1852 | bool | |
1853 | select CPU_SUPPORTS_32BIT_KERNEL | |
1854 | select CPU_SUPPORTS_64BIT_KERNEL | |
1855 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1856 | select CPU_SUPPORTS_HUGEPAGES |
e905086e | 1857 | select ARCH_HAS_PHYS_TO_DMA |
932afdee | 1858 | select CPU_HAS_LOAD_STORE_LR |
3702bba5 | 1859 | |
ca585cf9 KC |
1860 | config CPU_LOONGSON1 |
1861 | bool | |
1862 | select CPU_MIPS32 | |
968dc5a0 | 1863 | select CPU_MIPSR1 |
ca585cf9 | 1864 | select CPU_HAS_PREFETCH |
932afdee | 1865 | select CPU_HAS_LOAD_STORE_LR |
ca585cf9 KC |
1866 | select CPU_SUPPORTS_32BIT_KERNEL |
1867 | select CPU_SUPPORTS_HIGHMEM | |
f29ad10d | 1868 | select CPU_SUPPORTS_CPUFREQ |
ca585cf9 | 1869 | |
fe7f62c0 | 1870 | config CPU_BMIPS32_3300 |
04fa8bf7 | 1871 | select SMP_UP if SMP |
1bbb6c1b | 1872 | bool |
cd746249 JG |
1873 | |
1874 | config CPU_BMIPS4350 | |
1875 | bool | |
1876 | select SYS_SUPPORTS_SMP | |
1877 | select SYS_SUPPORTS_HOTPLUG_CPU | |
1878 | ||
1879 | config CPU_BMIPS4380 | |
1880 | bool | |
bbf2ba67 | 1881 | select MIPS_L1_CACHE_SHIFT_6 |
cd746249 JG |
1882 | select SYS_SUPPORTS_SMP |
1883 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1884 | select CPU_HAS_RIXI |
cd746249 JG |
1885 | |
1886 | config CPU_BMIPS5000 | |
1887 | bool | |
cd746249 | 1888 | select MIPS_CPU_SCACHE |
bbf2ba67 | 1889 | select MIPS_L1_CACHE_SHIFT_7 |
cd746249 JG |
1890 | select SYS_SUPPORTS_SMP |
1891 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1892 | select CPU_HAS_RIXI |
1bbb6c1b | 1893 | |
0e476d91 HC |
1894 | config SYS_HAS_CPU_LOONGSON3 |
1895 | bool | |
1896 | select CPU_SUPPORTS_CPUFREQ | |
b2edcfc8 | 1897 | select CPU_HAS_RIXI |
0e476d91 | 1898 | |
3702bba5 | 1899 | config SYS_HAS_CPU_LOONGSON2E |
2a21c730 FZ |
1900 | bool |
1901 | ||
6f7a251a WZ |
1902 | config SYS_HAS_CPU_LOONGSON2F |
1903 | bool | |
55045ff5 WZ |
1904 | select CPU_SUPPORTS_CPUFREQ |
1905 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | |
22f1fdfd | 1906 | select CPU_SUPPORTS_UNCACHED_ACCELERATED |
6f7a251a | 1907 | |
ca585cf9 KC |
1908 | config SYS_HAS_CPU_LOONGSON1B |
1909 | bool | |
1910 | ||
12e3280b YL |
1911 | config SYS_HAS_CPU_LOONGSON1C |
1912 | bool | |
1913 | ||
7cf8053b RB |
1914 | config SYS_HAS_CPU_MIPS32_R1 |
1915 | bool | |
1916 | ||
1917 | config SYS_HAS_CPU_MIPS32_R2 | |
1918 | bool | |
1919 | ||
a6e18781 LY |
1920 | config SYS_HAS_CPU_MIPS32_R3_5 |
1921 | bool | |
1922 | ||
c5b36783 SH |
1923 | config SYS_HAS_CPU_MIPS32_R5 |
1924 | bool | |
1925 | ||
7fd08ca5 LY |
1926 | config SYS_HAS_CPU_MIPS32_R6 |
1927 | bool | |
1928 | ||
7cf8053b RB |
1929 | config SYS_HAS_CPU_MIPS64_R1 |
1930 | bool | |
1931 | ||
1932 | config SYS_HAS_CPU_MIPS64_R2 | |
1933 | bool | |
1934 | ||
7fd08ca5 LY |
1935 | config SYS_HAS_CPU_MIPS64_R6 |
1936 | bool | |
1937 | ||
7cf8053b RB |
1938 | config SYS_HAS_CPU_R3000 |
1939 | bool | |
1940 | ||
1941 | config SYS_HAS_CPU_TX39XX | |
1942 | bool | |
1943 | ||
1944 | config SYS_HAS_CPU_VR41XX | |
1945 | bool | |
1946 | ||
1947 | config SYS_HAS_CPU_R4300 | |
1948 | bool | |
1949 | ||
1950 | config SYS_HAS_CPU_R4X00 | |
1951 | bool | |
1952 | ||
1953 | config SYS_HAS_CPU_TX49XX | |
1954 | bool | |
1955 | ||
1956 | config SYS_HAS_CPU_R5000 | |
1957 | bool | |
1958 | ||
1959 | config SYS_HAS_CPU_R5432 | |
1960 | bool | |
1961 | ||
542c1020 SK |
1962 | config SYS_HAS_CPU_R5500 |
1963 | bool | |
1964 | ||
7cf8053b RB |
1965 | config SYS_HAS_CPU_NEVADA |
1966 | bool | |
1967 | ||
1968 | config SYS_HAS_CPU_R8000 | |
1969 | bool | |
1970 | ||
1971 | config SYS_HAS_CPU_R10000 | |
1972 | bool | |
1973 | ||
1974 | config SYS_HAS_CPU_RM7000 | |
1975 | bool | |
1976 | ||
7cf8053b RB |
1977 | config SYS_HAS_CPU_SB1 |
1978 | bool | |
1979 | ||
5e683389 DD |
1980 | config SYS_HAS_CPU_CAVIUM_OCTEON |
1981 | bool | |
1982 | ||
cd746249 | 1983 | config SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1984 | bool |
1985 | ||
fe7f62c0 | 1986 | config SYS_HAS_CPU_BMIPS32_3300 |
c1c0c461 | 1987 | bool |
cd746249 | 1988 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1989 | |
1990 | config SYS_HAS_CPU_BMIPS4350 | |
1991 | bool | |
cd746249 | 1992 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1993 | |
1994 | config SYS_HAS_CPU_BMIPS4380 | |
1995 | bool | |
cd746249 | 1996 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1997 | |
1998 | config SYS_HAS_CPU_BMIPS5000 | |
1999 | bool | |
cd746249 | 2000 | select SYS_HAS_CPU_BMIPS |
c1c0c461 | 2001 | |
7f058e85 J |
2002 | config SYS_HAS_CPU_XLR |
2003 | bool | |
2004 | ||
1c773ea4 J |
2005 | config SYS_HAS_CPU_XLP |
2006 | bool | |
2007 | ||
17099b11 RB |
2008 | # |
2009 | # CPU may reorder R->R, R->W, W->R, W->W | |
2010 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | |
2011 | # | |
0004a9df RB |
2012 | config WEAK_ORDERING |
2013 | bool | |
17099b11 RB |
2014 | |
2015 | # | |
2016 | # CPU may reorder reads and writes beyond LL/SC | |
2017 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC | |
2018 | # | |
2019 | config WEAK_REORDERING_BEYOND_LLSC | |
2020 | bool | |
5e83d430 RB |
2021 | endmenu |
2022 | ||
2023 | # | |
c09b47d8 | 2024 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
5e83d430 RB |
2025 | # |
2026 | config CPU_MIPS32 | |
2027 | bool | |
7fd08ca5 | 2028 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 |
5e83d430 RB |
2029 | |
2030 | config CPU_MIPS64 | |
2031 | bool | |
7fd08ca5 | 2032 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 |
5e83d430 RB |
2033 | |
2034 | # | |
57eeaced | 2035 | # These indicate the revision of the architecture |
5e83d430 RB |
2036 | # |
2037 | config CPU_MIPSR1 | |
2038 | bool | |
2039 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 | |
2040 | ||
2041 | config CPU_MIPSR2 | |
2042 | bool | |
a86c7f72 | 2043 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
8256b17e | 2044 | select CPU_HAS_RIXI |
a7e07b1a | 2045 | select MIPS_SPRAM |
5e83d430 | 2046 | |
7fd08ca5 LY |
2047 | config CPU_MIPSR6 |
2048 | bool | |
2049 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 | |
8256b17e | 2050 | select CPU_HAS_RIXI |
87321fdd | 2051 | select HAVE_ARCH_BITREVERSE |
2db003a5 | 2052 | select MIPS_ASID_BITS_VARIABLE |
4a5dc51e | 2053 | select MIPS_CRC_SUPPORT |
a7e07b1a | 2054 | select MIPS_SPRAM |
5e83d430 | 2055 | |
57eeaced PB |
2056 | config TARGET_ISA_REV |
2057 | int | |
2058 | default 1 if CPU_MIPSR1 | |
2059 | default 2 if CPU_MIPSR2 | |
2060 | default 6 if CPU_MIPSR6 | |
2061 | default 0 | |
2062 | help | |
2063 | Reflects the ISA revision being targeted by the kernel build. This | |
2064 | is effectively the Kconfig equivalent of MIPS_ISA_REV. | |
2065 | ||
a6e18781 LY |
2066 | config EVA |
2067 | bool | |
2068 | ||
c5b36783 SH |
2069 | config XPA |
2070 | bool | |
2071 | ||
5e83d430 RB |
2072 | config SYS_SUPPORTS_32BIT_KERNEL |
2073 | bool | |
2074 | config SYS_SUPPORTS_64BIT_KERNEL | |
2075 | bool | |
2076 | config CPU_SUPPORTS_32BIT_KERNEL | |
2077 | bool | |
2078 | config CPU_SUPPORTS_64BIT_KERNEL | |
2079 | bool | |
55045ff5 WZ |
2080 | config CPU_SUPPORTS_CPUFREQ |
2081 | bool | |
2082 | config CPU_SUPPORTS_ADDRWINCFG | |
2083 | bool | |
9cffd154 DD |
2084 | config CPU_SUPPORTS_HUGEPAGES |
2085 | bool | |
22f1fdfd WZ |
2086 | config CPU_SUPPORTS_UNCACHED_ACCELERATED |
2087 | bool | |
82622284 DD |
2088 | config MIPS_PGD_C0_CONTEXT |
2089 | bool | |
cebf8c0f | 2090 | default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP |
5e83d430 | 2091 | |
8192c9ea DD |
2092 | # |
2093 | # Set to y for ptrace access to watch registers. | |
2094 | # | |
2095 | config HARDWARE_WATCHPOINTS | |
2096 | bool | |
679eb637 | 2097 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 |
8192c9ea | 2098 | |
5e83d430 RB |
2099 | menu "Kernel type" |
2100 | ||
2101 | choice | |
5e83d430 RB |
2102 | prompt "Kernel code model" |
2103 | help | |
2104 | You should only select this option if you have a workload that | |
2105 | actually benefits from 64-bit processing or if your machine has | |
2106 | large memory. You will only be presented a single option in this | |
2107 | menu if your system does not support both 32-bit and 64-bit kernels. | |
2108 | ||
2109 | config 32BIT | |
2110 | bool "32-bit kernel" | |
2111 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | |
2112 | select TRAD_SIGNALS | |
2113 | help | |
2114 | Select this option if you want to build a 32-bit kernel. | |
f17c4ca3 | 2115 | |
5e83d430 RB |
2116 | config 64BIT |
2117 | bool "64-bit kernel" | |
2118 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | |
2119 | help | |
2120 | Select this option if you want to build a 64-bit kernel. | |
2121 | ||
2122 | endchoice | |
2123 | ||
2235a54d SL |
2124 | config KVM_GUEST |
2125 | bool "KVM Guest Kernel" | |
f2a5b1d7 | 2126 | depends on BROKEN_ON_SMP |
2235a54d | 2127 | help |
caa1faa7 JH |
2128 | Select this option if building a guest kernel for KVM (Trap & Emulate) |
2129 | mode. | |
2235a54d | 2130 | |
eda3d33c JH |
2131 | config KVM_GUEST_TIMER_FREQ |
2132 | int "Count/Compare Timer Frequency (MHz)" | |
2235a54d | 2133 | depends on KVM_GUEST |
eda3d33c | 2134 | default 100 |
2235a54d | 2135 | help |
eda3d33c JH |
2136 | Set this to non-zero if building a guest kernel for KVM to skip RTC |
2137 | emulation when determining guest CPU Frequency. Instead, the guest's | |
2138 | timer frequency is specified directly. | |
2235a54d | 2139 | |
1e321fa9 LY |
2140 | config MIPS_VA_BITS_48 |
2141 | bool "48 bits virtual memory" | |
2142 | depends on 64BIT | |
2143 | help | |
3377e227 AB |
2144 | Support a maximum at least 48 bits of application virtual |
2145 | memory. Default is 40 bits or less, depending on the CPU. | |
2146 | For page sizes 16k and above, this option results in a small | |
2147 | memory overhead for page tables. For 4k page size, a fourth | |
2148 | level of page tables is added which imposes both a memory | |
2149 | overhead as well as slower TLB fault handling. | |
2150 | ||
1e321fa9 LY |
2151 | If unsure, say N. |
2152 | ||
1da177e4 LT |
2153 | choice |
2154 | prompt "Kernel page size" | |
2155 | default PAGE_SIZE_4KB | |
2156 | ||
2157 | config PAGE_SIZE_4KB | |
2158 | bool "4kB" | |
0e476d91 | 2159 | depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 |
1da177e4 LT |
2160 | help |
2161 | This option select the standard 4kB Linux page size. On some | |
2162 | R3000-family processors this is the only available page size. Using | |
2163 | 4kB page size will minimize memory consumption and is therefore | |
2164 | recommended for low memory systems. | |
2165 | ||
2166 | config PAGE_SIZE_8KB | |
2167 | bool "8kB" | |
7d60717e | 2168 | depends on CPU_R8000 || CPU_CAVIUM_OCTEON |
1e321fa9 | 2169 | depends on !MIPS_VA_BITS_48 |
1da177e4 LT |
2170 | help |
2171 | Using 8kB page size will result in higher performance kernel at | |
2172 | the price of higher memory consumption. This option is available | |
c52399be RB |
2173 | only on R8000 and cnMIPS processors. Note that you will need a |
2174 | suitable Linux distribution to support this. | |
1da177e4 LT |
2175 | |
2176 | config PAGE_SIZE_16KB | |
2177 | bool "16kB" | |
714bfad6 | 2178 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2179 | help |
2180 | Using 16kB page size will result in higher performance kernel at | |
2181 | the price of higher memory consumption. This option is available on | |
714bfad6 RB |
2182 | all non-R3000 family processors. Note that you will need a suitable |
2183 | Linux distribution to support this. | |
1da177e4 | 2184 | |
c52399be RB |
2185 | config PAGE_SIZE_32KB |
2186 | bool "32kB" | |
2187 | depends on CPU_CAVIUM_OCTEON | |
1e321fa9 | 2188 | depends on !MIPS_VA_BITS_48 |
c52399be RB |
2189 | help |
2190 | Using 32kB page size will result in higher performance kernel at | |
2191 | the price of higher memory consumption. This option is available | |
2192 | only on cnMIPS cores. Note that you will need a suitable Linux | |
2193 | distribution to support this. | |
2194 | ||
1da177e4 LT |
2195 | config PAGE_SIZE_64KB |
2196 | bool "64kB" | |
3b2db173 | 2197 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2198 | help |
2199 | Using 64kB page size will result in higher performance kernel at | |
2200 | the price of higher memory consumption. This option is available on | |
2201 | all non-R3000 family processor. Not that at the time of this | |
714bfad6 | 2202 | writing this option is still high experimental. |
1da177e4 LT |
2203 | |
2204 | endchoice | |
2205 | ||
c9bace7c DD |
2206 | config FORCE_MAX_ZONEORDER |
2207 | int "Maximum zone order" | |
e4362d1e AS |
2208 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
2209 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB | |
2210 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2211 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2212 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
2213 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
c9bace7c DD |
2214 | range 11 64 |
2215 | default "11" | |
2216 | help | |
2217 | The kernel memory allocator divides physically contiguous memory | |
2218 | blocks into "zones", where each zone is a power of two number of | |
2219 | pages. This option selects the largest power of two that the kernel | |
2220 | keeps in the memory allocator. If you need to allocate very large | |
2221 | blocks of physically contiguous memory, then you may need to | |
2222 | increase this value. | |
2223 | ||
2224 | This config option is actually maximum order plus one. For example, | |
2225 | a value of 11 means that the largest free memory block is 2^10 pages. | |
2226 | ||
2227 | The page size is not necessarily 4KB. Keep this in mind | |
2228 | when choosing a value for this option. | |
2229 | ||
1da177e4 LT |
2230 | config BOARD_SCACHE |
2231 | bool | |
2232 | ||
2233 | config IP22_CPU_SCACHE | |
2234 | bool | |
2235 | select BOARD_SCACHE | |
2236 | ||
9318c51a CD |
2237 | # |
2238 | # Support for a MIPS32 / MIPS64 style S-caches | |
2239 | # | |
2240 | config MIPS_CPU_SCACHE | |
2241 | bool | |
2242 | select BOARD_SCACHE | |
2243 | ||
1da177e4 LT |
2244 | config R5000_CPU_SCACHE |
2245 | bool | |
2246 | select BOARD_SCACHE | |
2247 | ||
2248 | config RM7000_CPU_SCACHE | |
2249 | bool | |
2250 | select BOARD_SCACHE | |
2251 | ||
2252 | config SIBYTE_DMA_PAGEOPS | |
2253 | bool "Use DMA to clear/copy pages" | |
2254 | depends on CPU_SB1 | |
2255 | help | |
2256 | Instead of using the CPU to zero and copy pages, use a Data Mover | |
2257 | channel. These DMA channels are otherwise unused by the standard | |
2258 | SiByte Linux port. Seems to give a small performance benefit. | |
2259 | ||
2260 | config CPU_HAS_PREFETCH | |
c8094b53 | 2261 | bool |
1da177e4 | 2262 | |
3165c846 FF |
2263 | config CPU_GENERIC_DUMP_TLB |
2264 | bool | |
3b2db173 | 2265 | default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) |
3165c846 | 2266 | |
c92e47e5 | 2267 | config MIPS_FP_SUPPORT |
183b40f9 PB |
2268 | bool "Floating Point support" if EXPERT |
2269 | default y | |
2270 | help | |
2271 | Select y to include support for floating point in the kernel | |
2272 | including initialization of FPU hardware, FP context save & restore | |
2273 | and emulation of an FPU where necessary. Without this support any | |
2274 | userland program attempting to use floating point instructions will | |
2275 | receive a SIGILL. | |
2276 | ||
2277 | If you know that your userland will not attempt to use floating point | |
2278 | instructions then you can say n here to shrink the kernel a little. | |
2279 | ||
2280 | If unsure, say y. | |
c92e47e5 | 2281 | |
97f7dcbf PB |
2282 | config CPU_R2300_FPU |
2283 | bool | |
c92e47e5 | 2284 | depends on MIPS_FP_SUPPORT |
97f7dcbf PB |
2285 | default y if CPU_R3000 || CPU_TX39XX |
2286 | ||
91405eb6 FF |
2287 | config CPU_R4K_FPU |
2288 | bool | |
c92e47e5 | 2289 | depends on MIPS_FP_SUPPORT |
97f7dcbf | 2290 | default y if !CPU_R2300_FPU |
91405eb6 | 2291 | |
62cedc4f FF |
2292 | config CPU_R4K_CACHE_TLB |
2293 | bool | |
2294 | default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) | |
2295 | ||
59d6ab86 | 2296 | config MIPS_MT_SMP |
a92b7f87 | 2297 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
5cbf9688 | 2298 | default y |
527f1028 | 2299 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
f7062ddb | 2300 | select CPU_MIPSR2_IRQ_VI |
d725cf38 | 2301 | select CPU_MIPSR2_IRQ_EI |
c080faa5 | 2302 | select SYNC_R4K |
f41ae0b2 | 2303 | select MIPS_MT |
41c594ab | 2304 | select SMP |
87353d8a | 2305 | select SMP_UP |
c080faa5 SH |
2306 | select SYS_SUPPORTS_SMP |
2307 | select SYS_SUPPORTS_SCHED_SMT | |
399aaa25 | 2308 | select MIPS_PERF_SHARED_TC_COUNTERS |
f41ae0b2 | 2309 | help |
c080faa5 SH |
2310 | This is a kernel model which is known as SMVP. This is supported |
2311 | on cores with the MT ASE and uses the available VPEs to implement | |
2312 | virtual processors which supports SMP. This is equivalent to the | |
2313 | Intel Hyperthreading feature. For further information go to | |
2314 | <http://www.imgtec.com/mips/mips-multithreading.asp>. | |
41c594ab | 2315 | |
f41ae0b2 RB |
2316 | config MIPS_MT |
2317 | bool | |
2318 | ||
0ab7aefc RB |
2319 | config SCHED_SMT |
2320 | bool "SMT (multithreading) scheduler support" | |
2321 | depends on SYS_SUPPORTS_SCHED_SMT | |
2322 | default n | |
2323 | help | |
2324 | SMT scheduler support improves the CPU scheduler's decision making | |
2325 | when dealing with MIPS MT enabled cores at a cost of slightly | |
2326 | increased overhead in some places. If unsure say N here. | |
2327 | ||
2328 | config SYS_SUPPORTS_SCHED_SMT | |
2329 | bool | |
2330 | ||
f41ae0b2 RB |
2331 | config SYS_SUPPORTS_MULTITHREADING |
2332 | bool | |
2333 | ||
f088fc84 RB |
2334 | config MIPS_MT_FPAFF |
2335 | bool "Dynamic FPU affinity for FP-intensive threads" | |
f088fc84 | 2336 | default y |
b633648c | 2337 | depends on MIPS_MT_SMP |
07cc0c9e | 2338 | |
b0a668fb LY |
2339 | config MIPSR2_TO_R6_EMULATOR |
2340 | bool "MIPS R2-to-R6 emulator" | |
9eaa9a82 | 2341 | depends on CPU_MIPSR6 |
c92e47e5 | 2342 | depends on MIPS_FP_SUPPORT |
b0a668fb LY |
2343 | default y |
2344 | help | |
2345 | Choose this option if you want to run non-R6 MIPS userland code. | |
2346 | Even if you say 'Y' here, the emulator will still be disabled by | |
07edf0d4 | 2347 | default. You can enable it using the 'mipsr2emu' kernel option. |
b0a668fb LY |
2348 | The only reason this is a build-time option is to save ~14K from the |
2349 | final kernel image. | |
b0a668fb | 2350 | |
f35764e7 JH |
2351 | config SYS_SUPPORTS_VPE_LOADER |
2352 | bool | |
2353 | depends on SYS_SUPPORTS_MULTITHREADING | |
2354 | help | |
2355 | Indicates that the platform supports the VPE loader, and provides | |
2356 | physical_memsize. | |
2357 | ||
07cc0c9e RB |
2358 | config MIPS_VPE_LOADER |
2359 | bool "VPE loader support." | |
f35764e7 | 2360 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
07cc0c9e RB |
2361 | select CPU_MIPSR2_IRQ_VI |
2362 | select CPU_MIPSR2_IRQ_EI | |
07cc0c9e RB |
2363 | select MIPS_MT |
2364 | help | |
2365 | Includes a loader for loading an elf relocatable object | |
2366 | onto another VPE and running it. | |
f088fc84 | 2367 | |
17a1d523 DCZ |
2368 | config MIPS_VPE_LOADER_CMP |
2369 | bool | |
2370 | default "y" | |
2371 | depends on MIPS_VPE_LOADER && MIPS_CMP | |
2372 | ||
1a2a6d7e DCZ |
2373 | config MIPS_VPE_LOADER_MT |
2374 | bool | |
2375 | default "y" | |
2376 | depends on MIPS_VPE_LOADER && !MIPS_CMP | |
2377 | ||
e01402b1 RB |
2378 | config MIPS_VPE_LOADER_TOM |
2379 | bool "Load VPE program into memory hidden from linux" | |
2380 | depends on MIPS_VPE_LOADER | |
2381 | default y | |
2382 | help | |
2383 | The loader can use memory that is present but has been hidden from | |
2384 | Linux using the kernel command line option "mem=xxMB". It's up to | |
2385 | you to ensure the amount you put in the option and the space your | |
2386 | program requires is less or equal to the amount physically present. | |
2387 | ||
e01402b1 | 2388 | config MIPS_VPE_APSP_API |
5e83d430 RB |
2389 | bool "Enable support for AP/SP API (RTLX)" |
2390 | depends on MIPS_VPE_LOADER | |
e01402b1 | 2391 | |
da615cf6 DCZ |
2392 | config MIPS_VPE_APSP_API_CMP |
2393 | bool | |
2394 | default "y" | |
2395 | depends on MIPS_VPE_APSP_API && MIPS_CMP | |
2396 | ||
2c973ef0 DCZ |
2397 | config MIPS_VPE_APSP_API_MT |
2398 | bool | |
2399 | default "y" | |
2400 | depends on MIPS_VPE_APSP_API && !MIPS_CMP | |
2401 | ||
4a16ff4c | 2402 | config MIPS_CMP |
5cac93b3 | 2403 | bool "MIPS CMP framework support (DEPRECATED)" |
5676319c | 2404 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
b10b43ba | 2405 | select SMP |
eb9b5141 | 2406 | select SYNC_R4K |
b10b43ba | 2407 | select SYS_SUPPORTS_SMP |
4a16ff4c RB |
2408 | select WEAK_ORDERING |
2409 | default n | |
2410 | help | |
044505c7 PB |
2411 | Select this if you are using a bootloader which implements the "CMP |
2412 | framework" protocol (ie. YAMON) and want your kernel to make use of | |
2413 | its ability to start secondary CPUs. | |
4a16ff4c | 2414 | |
5cac93b3 PB |
2415 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
2416 | instead of this. | |
2417 | ||
0ee958e1 PB |
2418 | config MIPS_CPS |
2419 | bool "MIPS Coherent Processing System support" | |
5a3e7c02 | 2420 | depends on SYS_SUPPORTS_MIPS_CPS |
0ee958e1 | 2421 | select MIPS_CM |
1d8f1f5a | 2422 | select MIPS_CPS_PM if HOTPLUG_CPU |
0ee958e1 PB |
2423 | select SMP |
2424 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) | |
1d8f1f5a | 2425 | select SYS_SUPPORTS_HOTPLUG_CPU |
c8b7712c | 2426 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
0ee958e1 PB |
2427 | select SYS_SUPPORTS_SMP |
2428 | select WEAK_ORDERING | |
2429 | help | |
2430 | Select this if you wish to run an SMP kernel across multiple cores | |
2431 | within a MIPS Coherent Processing System. When this option is | |
2432 | enabled the kernel will probe for other cores and boot them with | |
2433 | no external assistance. It is safe to enable this when hardware | |
2434 | support is unavailable. | |
2435 | ||
3179d37e | 2436 | config MIPS_CPS_PM |
39a59593 | 2437 | depends on MIPS_CPS |
3179d37e PB |
2438 | bool |
2439 | ||
9f98f3dd PB |
2440 | config MIPS_CM |
2441 | bool | |
3c9b4166 | 2442 | select MIPS_CPC |
9f98f3dd | 2443 | |
9c38cf44 PB |
2444 | config MIPS_CPC |
2445 | bool | |
4a16ff4c | 2446 | |
1da177e4 LT |
2447 | config SB1_PASS_2_WORKAROUNDS |
2448 | bool | |
2449 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | |
2450 | default y | |
2451 | ||
2452 | config SB1_PASS_2_1_WORKAROUNDS | |
2453 | bool | |
2454 | depends on CPU_SB1 && CPU_SB1_PASS_2 | |
2455 | default y | |
2456 | ||
2235a54d | 2457 | |
9e2b5372 MC |
2458 | choice |
2459 | prompt "SmartMIPS or microMIPS ASE support" | |
2460 | ||
2461 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2462 | bool "None" | |
2463 | help | |
2464 | Select this if you want neither microMIPS nor SmartMIPS support | |
2465 | ||
9693a853 FBH |
2466 | config CPU_HAS_SMARTMIPS |
2467 | depends on SYS_SUPPORTS_SMARTMIPS | |
9e2b5372 | 2468 | bool "SmartMIPS" |
9693a853 FBH |
2469 | help |
2470 | SmartMIPS is a extension of the MIPS32 architecture aimed at | |
2471 | increased security at both hardware and software level for | |
2472 | smartcards. Enabling this option will allow proper use of the | |
2473 | SmartMIPS instructions by Linux applications. However a kernel with | |
2474 | this option will not work on a MIPS core without SmartMIPS core. If | |
2475 | you don't know you probably don't have SmartMIPS and should say N | |
2476 | here. | |
2477 | ||
bce86083 | 2478 | config CPU_MICROMIPS |
7fd08ca5 | 2479 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
9e2b5372 | 2480 | bool "microMIPS" |
bce86083 SH |
2481 | help |
2482 | When this option is enabled the kernel will be built using the | |
2483 | microMIPS ISA | |
2484 | ||
9e2b5372 MC |
2485 | endchoice |
2486 | ||
a5e9a69e | 2487 | config CPU_HAS_MSA |
0ce3417e | 2488 | bool "Support for the MIPS SIMD Architecture" |
a5e9a69e | 2489 | depends on CPU_SUPPORTS_MSA |
c92e47e5 | 2490 | depends on MIPS_FP_SUPPORT |
2a6cb669 | 2491 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
a5e9a69e PB |
2492 | help |
2493 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers | |
2494 | and a set of SIMD instructions to operate on them. When this option | |
1db1af84 PB |
2495 | is enabled the kernel will support allocating & switching MSA |
2496 | vector register contexts. If you know that your kernel will only be | |
2497 | running on CPUs which do not support MSA or that your userland will | |
2498 | not be making use of it then you may wish to say N here to reduce | |
2499 | the size & complexity of your kernel. | |
a5e9a69e PB |
2500 | |
2501 | If unsure, say Y. | |
2502 | ||
1da177e4 | 2503 | config CPU_HAS_WB |
f7062ddb | 2504 | bool |
e01402b1 | 2505 | |
df0ac8a4 KC |
2506 | config XKS01 |
2507 | bool | |
2508 | ||
8256b17e FF |
2509 | config CPU_HAS_RIXI |
2510 | bool | |
2511 | ||
932afdee YC |
2512 | config CPU_HAS_LOAD_STORE_LR |
2513 | bool | |
2514 | help | |
2515 | CPU has support for unaligned load and store instructions: | |
2516 | LWL, LWR, SWL, SWR (Load/store word left/right). | |
2517 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems). | |
2518 | ||
f41ae0b2 RB |
2519 | # |
2520 | # Vectored interrupt mode is an R2 feature | |
2521 | # | |
e01402b1 | 2522 | config CPU_MIPSR2_IRQ_VI |
f41ae0b2 | 2523 | bool |
e01402b1 | 2524 | |
f41ae0b2 RB |
2525 | # |
2526 | # Extended interrupt mode is an R2 feature | |
2527 | # | |
e01402b1 | 2528 | config CPU_MIPSR2_IRQ_EI |
f41ae0b2 | 2529 | bool |
e01402b1 | 2530 | |
1da177e4 LT |
2531 | config CPU_HAS_SYNC |
2532 | bool | |
2533 | depends on !CPU_R3000 | |
2534 | default y | |
2535 | ||
20d60d99 MR |
2536 | # |
2537 | # CPU non-features | |
2538 | # | |
2539 | config CPU_DADDI_WORKAROUNDS | |
2540 | bool | |
2541 | ||
2542 | config CPU_R4000_WORKAROUNDS | |
2543 | bool | |
2544 | select CPU_R4400_WORKAROUNDS | |
2545 | ||
2546 | config CPU_R4400_WORKAROUNDS | |
2547 | bool | |
2548 | ||
4edf00a4 PB |
2549 | config MIPS_ASID_SHIFT |
2550 | int | |
2551 | default 6 if CPU_R3000 || CPU_TX39XX | |
2552 | default 4 if CPU_R8000 | |
2553 | default 0 | |
2554 | ||
2555 | config MIPS_ASID_BITS | |
2556 | int | |
2db003a5 | 2557 | default 0 if MIPS_ASID_BITS_VARIABLE |
4edf00a4 PB |
2558 | default 6 if CPU_R3000 || CPU_TX39XX |
2559 | default 8 | |
2560 | ||
2db003a5 PB |
2561 | config MIPS_ASID_BITS_VARIABLE |
2562 | bool | |
2563 | ||
4a5dc51e MN |
2564 | config MIPS_CRC_SUPPORT |
2565 | bool | |
2566 | ||
1da177e4 LT |
2567 | # |
2568 | # - Highmem only makes sense for the 32-bit kernel. | |
2569 | # - The current highmem code will only work properly on physically indexed | |
2570 | # caches such as R3000, SB1, R7000 or those that look like they're virtually | |
2571 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the | |
2572 | # moment we protect the user and offer the highmem option only on machines | |
2573 | # where it's known to be safe. This will not offer highmem on a few systems | |
2574 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically | |
2575 | # indexed CPUs but we're playing safe. | |
797798c1 RB |
2576 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
2577 | # know they might have memory configurations that could make use of highmem | |
2578 | # support. | |
1da177e4 LT |
2579 | # |
2580 | config HIGHMEM | |
2581 | bool "High Memory Support" | |
a6e18781 | 2582 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
797798c1 RB |
2583 | |
2584 | config CPU_SUPPORTS_HIGHMEM | |
2585 | bool | |
2586 | ||
2587 | config SYS_SUPPORTS_HIGHMEM | |
2588 | bool | |
1da177e4 | 2589 | |
9693a853 FBH |
2590 | config SYS_SUPPORTS_SMARTMIPS |
2591 | bool | |
2592 | ||
a6a4834c SH |
2593 | config SYS_SUPPORTS_MICROMIPS |
2594 | bool | |
2595 | ||
377cb1b6 RB |
2596 | config SYS_SUPPORTS_MIPS16 |
2597 | bool | |
2598 | help | |
2599 | This option must be set if a kernel might be executed on a MIPS16- | |
2600 | enabled CPU even if MIPS16 is not actually being used. In other | |
2601 | words, it makes the kernel MIPS16-tolerant. | |
2602 | ||
a5e9a69e PB |
2603 | config CPU_SUPPORTS_MSA |
2604 | bool | |
2605 | ||
b4819b59 YY |
2606 | config ARCH_FLATMEM_ENABLE |
2607 | def_bool y | |
f133f22d | 2608 | depends on !NUMA && !CPU_LOONGSON2 |
b4819b59 | 2609 | |
d8cb4e11 RB |
2610 | config ARCH_DISCONTIGMEM_ENABLE |
2611 | bool | |
2612 | default y if SGI_IP27 | |
2613 | help | |
3dde6ad8 | 2614 | Say Y to support efficient handling of discontiguous physical memory, |
d8cb4e11 RB |
2615 | for architectures which are either NUMA (Non-Uniform Memory Access) |
2616 | or have huge holes in the physical address space for other reasons. | |
ad56b738 | 2617 | See <file:Documentation/vm/numa.rst> for more. |
d8cb4e11 | 2618 | |
31473747 AN |
2619 | config ARCH_SPARSEMEM_ENABLE |
2620 | bool | |
7de58fab | 2621 | select SPARSEMEM_STATIC |
31473747 | 2622 | |
d8cb4e11 RB |
2623 | config NUMA |
2624 | bool "NUMA Support" | |
2625 | depends on SYS_SUPPORTS_NUMA | |
2626 | help | |
2627 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory | |
2628 | Access). This option improves performance on systems with more | |
2629 | than two nodes; on two node systems it is generally better to | |
2630 | leave it disabled; on single node systems disable this option | |
2631 | disabled. | |
2632 | ||
2633 | config SYS_SUPPORTS_NUMA | |
2634 | bool | |
2635 | ||
8c530ea3 MR |
2636 | config RELOCATABLE |
2637 | bool "Relocatable kernel" | |
3ff72be4 | 2638 | depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) |
8c530ea3 MR |
2639 | help |
2640 | This builds a kernel image that retains relocation information | |
2641 | so it can be loaded someplace besides the default 1MB. | |
2642 | The relocations make the kernel binary about 15% larger, | |
2643 | but are discarded at runtime | |
2644 | ||
069fd766 MR |
2645 | config RELOCATION_TABLE_SIZE |
2646 | hex "Relocation table size" | |
2647 | depends on RELOCATABLE | |
2648 | range 0x0 0x01000000 | |
2649 | default "0x00100000" | |
2650 | ---help--- | |
2651 | A table of relocation data will be appended to the kernel binary | |
2652 | and parsed at boot to fix up the relocated kernel. | |
2653 | ||
2654 | This option allows the amount of space reserved for the table to be | |
2655 | adjusted, although the default of 1Mb should be ok in most cases. | |
2656 | ||
2657 | The build will fail and a valid size suggested if this is too small. | |
2658 | ||
2659 | If unsure, leave at the default value. | |
2660 | ||
405bc8fd MR |
2661 | config RANDOMIZE_BASE |
2662 | bool "Randomize the address of the kernel image" | |
2663 | depends on RELOCATABLE | |
2664 | ---help--- | |
2665 | Randomizes the physical and virtual address at which the | |
2666 | kernel image is loaded, as a security feature that | |
2667 | deters exploit attempts relying on knowledge of the location | |
2668 | of kernel internals. | |
2669 | ||
2670 | Entropy is generated using any coprocessor 0 registers available. | |
2671 | ||
2672 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. | |
2673 | ||
2674 | If unsure, say N. | |
2675 | ||
2676 | config RANDOMIZE_BASE_MAX_OFFSET | |
2677 | hex "Maximum kASLR offset" if EXPERT | |
2678 | depends on RANDOMIZE_BASE | |
2679 | range 0x0 0x40000000 if EVA || 64BIT | |
2680 | range 0x0 0x08000000 | |
2681 | default "0x01000000" | |
2682 | ---help--- | |
2683 | When kASLR is active, this provides the maximum offset that will | |
2684 | be applied to the kernel image. It should be set according to the | |
2685 | amount of physical RAM available in the target system minus | |
2686 | PHYSICAL_START and must be a power of 2. | |
2687 | ||
2688 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with | |
2689 | EVA or 64-bit. The default is 16Mb. | |
2690 | ||
c80d79d7 YG |
2691 | config NODES_SHIFT |
2692 | int | |
2693 | default "6" | |
2694 | depends on NEED_MULTIPLE_NODES | |
2695 | ||
14f70012 DCZ |
2696 | config HW_PERF_EVENTS |
2697 | bool "Enable hardware performance counter support for perf events" | |
23021b2b | 2698 | depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) |
14f70012 DCZ |
2699 | default y |
2700 | help | |
2701 | Enable hardware performance counter support for perf events. If | |
2702 | disabled, perf events will use software events only. | |
2703 | ||
1da177e4 LT |
2704 | config SMP |
2705 | bool "Multi-Processing support" | |
e73ea273 RB |
2706 | depends on SYS_SUPPORTS_SMP |
2707 | help | |
1da177e4 | 2708 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
2709 | a system with only one CPU, say N. If you have a system with more |
2710 | than one CPU, say Y. | |
1da177e4 | 2711 | |
4a474157 | 2712 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
2713 | machines, but will use only one CPU of a multiprocessor machine. If |
2714 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 2715 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
2716 | will run faster if you say N here. |
2717 | ||
2718 | People using multiprocessor machines who say Y here should also say | |
2719 | Y to "Enhanced Real Time Clock Support", below. | |
2720 | ||
03502faa AB |
2721 | See also the SMP-HOWTO available at |
2722 | <http://www.tldp.org/docs.html#howto>. | |
1da177e4 LT |
2723 | |
2724 | If you don't know what to do here, say N. | |
2725 | ||
7840d618 MR |
2726 | config HOTPLUG_CPU |
2727 | bool "Support for hot-pluggable CPUs" | |
2728 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU | |
2729 | help | |
2730 | Say Y here to allow turning CPUs off and on. CPUs can be | |
2731 | controlled through /sys/devices/system/cpu. | |
2732 | (Note: power management support will enable this option | |
2733 | automatically on SMP systems. ) | |
2734 | Say N if you want to disable CPU hotplug. | |
2735 | ||
87353d8a RB |
2736 | config SMP_UP |
2737 | bool | |
2738 | ||
4a16ff4c RB |
2739 | config SYS_SUPPORTS_MIPS_CMP |
2740 | bool | |
2741 | ||
0ee958e1 PB |
2742 | config SYS_SUPPORTS_MIPS_CPS |
2743 | bool | |
2744 | ||
e73ea273 RB |
2745 | config SYS_SUPPORTS_SMP |
2746 | bool | |
2747 | ||
130e2fb7 RB |
2748 | config NR_CPUS_DEFAULT_4 |
2749 | bool | |
2750 | ||
2751 | config NR_CPUS_DEFAULT_8 | |
2752 | bool | |
2753 | ||
2754 | config NR_CPUS_DEFAULT_16 | |
2755 | bool | |
2756 | ||
2757 | config NR_CPUS_DEFAULT_32 | |
2758 | bool | |
2759 | ||
2760 | config NR_CPUS_DEFAULT_64 | |
2761 | bool | |
2762 | ||
1da177e4 | 2763 | config NR_CPUS |
a91796a9 J |
2764 | int "Maximum number of CPUs (2-256)" |
2765 | range 2 256 | |
1da177e4 | 2766 | depends on SMP |
130e2fb7 RB |
2767 | default "4" if NR_CPUS_DEFAULT_4 |
2768 | default "8" if NR_CPUS_DEFAULT_8 | |
2769 | default "16" if NR_CPUS_DEFAULT_16 | |
2770 | default "32" if NR_CPUS_DEFAULT_32 | |
2771 | default "64" if NR_CPUS_DEFAULT_64 | |
1da177e4 LT |
2772 | help |
2773 | This allows you to specify the maximum number of CPUs which this | |
2774 | kernel will support. The maximum supported value is 32 for 32-bit | |
2775 | kernel and 64 for 64-bit kernels; the minimum value which makes | |
72ede9b1 AN |
2776 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
2777 | and 2 for all others. | |
1da177e4 LT |
2778 | |
2779 | This is purely to save memory - each supported CPU adds | |
72ede9b1 AN |
2780 | approximately eight kilobytes to the kernel image. For best |
2781 | performance should round up your number of processors to the next | |
2782 | power of two. | |
1da177e4 | 2783 | |
399aaa25 AC |
2784 | config MIPS_PERF_SHARED_TC_COUNTERS |
2785 | bool | |
7820b84b DD |
2786 | |
2787 | config MIPS_NR_CPU_NR_MAP_1024 | |
2788 | bool | |
2789 | ||
2790 | config MIPS_NR_CPU_NR_MAP | |
2791 | int | |
2792 | depends on SMP | |
2793 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 | |
2794 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 | |
399aaa25 | 2795 | |
1723b4a3 AN |
2796 | # |
2797 | # Timer Interrupt Frequency Configuration | |
2798 | # | |
2799 | ||
2800 | choice | |
2801 | prompt "Timer frequency" | |
2802 | default HZ_250 | |
2803 | help | |
2804 | Allows the configuration of the timer frequency. | |
2805 | ||
67596573 PB |
2806 | config HZ_24 |
2807 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ | |
2808 | ||
1723b4a3 | 2809 | config HZ_48 |
0f873585 | 2810 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
1723b4a3 AN |
2811 | |
2812 | config HZ_100 | |
2813 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ | |
2814 | ||
2815 | config HZ_128 | |
2816 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ | |
2817 | ||
2818 | config HZ_250 | |
2819 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ | |
2820 | ||
2821 | config HZ_256 | |
2822 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ | |
2823 | ||
2824 | config HZ_1000 | |
2825 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ | |
2826 | ||
2827 | config HZ_1024 | |
2828 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ | |
2829 | ||
2830 | endchoice | |
2831 | ||
67596573 PB |
2832 | config SYS_SUPPORTS_24HZ |
2833 | bool | |
2834 | ||
1723b4a3 AN |
2835 | config SYS_SUPPORTS_48HZ |
2836 | bool | |
2837 | ||
2838 | config SYS_SUPPORTS_100HZ | |
2839 | bool | |
2840 | ||
2841 | config SYS_SUPPORTS_128HZ | |
2842 | bool | |
2843 | ||
2844 | config SYS_SUPPORTS_250HZ | |
2845 | bool | |
2846 | ||
2847 | config SYS_SUPPORTS_256HZ | |
2848 | bool | |
2849 | ||
2850 | config SYS_SUPPORTS_1000HZ | |
2851 | bool | |
2852 | ||
2853 | config SYS_SUPPORTS_1024HZ | |
2854 | bool | |
2855 | ||
2856 | config SYS_SUPPORTS_ARBIT_HZ | |
2857 | bool | |
67596573 PB |
2858 | default y if !SYS_SUPPORTS_24HZ && \ |
2859 | !SYS_SUPPORTS_48HZ && \ | |
2860 | !SYS_SUPPORTS_100HZ && \ | |
2861 | !SYS_SUPPORTS_128HZ && \ | |
2862 | !SYS_SUPPORTS_250HZ && \ | |
2863 | !SYS_SUPPORTS_256HZ && \ | |
2864 | !SYS_SUPPORTS_1000HZ && \ | |
1723b4a3 AN |
2865 | !SYS_SUPPORTS_1024HZ |
2866 | ||
2867 | config HZ | |
2868 | int | |
67596573 | 2869 | default 24 if HZ_24 |
1723b4a3 AN |
2870 | default 48 if HZ_48 |
2871 | default 100 if HZ_100 | |
2872 | default 128 if HZ_128 | |
2873 | default 250 if HZ_250 | |
2874 | default 256 if HZ_256 | |
2875 | default 1000 if HZ_1000 | |
2876 | default 1024 if HZ_1024 | |
2877 | ||
96685b17 DCZ |
2878 | config SCHED_HRTICK |
2879 | def_bool HIGH_RES_TIMERS | |
2880 | ||
ea6e942b | 2881 | config KEXEC |
7d60717e | 2882 | bool "Kexec system call" |
2965faa5 | 2883 | select KEXEC_CORE |
ea6e942b AN |
2884 | help |
2885 | kexec is a system call that implements the ability to shutdown your | |
2886 | current kernel, and to start another kernel. It is like a reboot | |
3dde6ad8 | 2887 | but it is independent of the system firmware. And like a reboot |
ea6e942b AN |
2888 | you can start any kernel with it, not just Linux. |
2889 | ||
01dd2fbf | 2890 | The name comes from the similarity to the exec system call. |
ea6e942b AN |
2891 | |
2892 | It is an ongoing process to be certain the hardware in a machine | |
2893 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
2894 | initially work for you. As of this writing the exact hardware |
2895 | interface is strongly in flux, so no good recommendation can be | |
2896 | made. | |
ea6e942b | 2897 | |
7aa1c8f4 | 2898 | config CRASH_DUMP |
bff323d5 MN |
2899 | bool "Kernel crash dumps" |
2900 | help | |
7aa1c8f4 RB |
2901 | Generate crash dump after being started by kexec. |
2902 | This should be normally only set in special crash dump kernels | |
2903 | which are loaded in the main kernel with kexec-tools into | |
2904 | a specially reserved region and then later executed after | |
2905 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
2906 | to a memory address not used by the main kernel or firmware using | |
2907 | PHYSICAL_START. | |
2908 | ||
2909 | config PHYSICAL_START | |
bff323d5 | 2910 | hex "Physical address where the kernel is loaded" |
8bda3e26 | 2911 | default "0xffffffff84000000" |
bff323d5 MN |
2912 | depends on CRASH_DUMP |
2913 | help | |
7aa1c8f4 RB |
2914 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
2915 | If you plan to use kernel for capturing the crash dump change | |
2916 | this value to start of the reserved region (the "X" value as | |
2917 | specified in the "crashkernel=YM@XM" command line boot parameter | |
2918 | passed to the panic-ed kernel). | |
2919 | ||
ea6e942b AN |
2920 | config SECCOMP |
2921 | bool "Enable seccomp to safely compute untrusted bytecode" | |
293c5bd1 | 2922 | depends on PROC_FS |
ea6e942b AN |
2923 | default y |
2924 | help | |
2925 | This kernel feature is useful for number crunching applications | |
2926 | that may need to compute untrusted bytecode during their | |
2927 | execution. By using pipes or other transports made available to | |
2928 | the process as file descriptors supporting the read/write | |
2929 | syscalls, it's possible to isolate those applications in | |
2930 | their own address space using seccomp. Once seccomp is | |
2931 | enabled via /proc/<pid>/seccomp, it cannot be disabled | |
2932 | and the task is only allowed to execute a few safe syscalls | |
2933 | defined by each seccomp mode. | |
2934 | ||
2935 | If unsure, say Y. Only embedded should say N here. | |
2936 | ||
597ce172 | 2937 | config MIPS_O32_FP64_SUPPORT |
b7f1e273 | 2938 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
597ce172 | 2939 | depends on 32BIT || MIPS32_O32 |
597ce172 PB |
2940 | help |
2941 | When this is enabled, the kernel will support use of 64-bit floating | |
2942 | point registers with binaries using the O32 ABI along with the | |
2943 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On | |
2944 | 32-bit MIPS systems this support is at the cost of increasing the | |
2945 | size and complexity of the compiled FPU emulator. Thus if you are | |
2946 | running a MIPS32 system and know that none of your userland binaries | |
2947 | will require 64-bit floating point, you may wish to reduce the size | |
2948 | of your kernel & potentially improve FP emulation performance by | |
2949 | saying N here. | |
2950 | ||
06e2e882 PB |
2951 | Although binutils currently supports use of this flag the details |
2952 | concerning its effect upon the O32 ABI in userland are still being | |
2953 | worked on. In order to avoid userland becoming dependant upon current | |
2954 | behaviour before the details have been finalised, this option should | |
2955 | be considered experimental and only enabled by those working upon | |
2956 | said details. | |
2957 | ||
2958 | If unsure, say N. | |
597ce172 | 2959 | |
f2ffa5ab | 2960 | config USE_OF |
0b3e06fd | 2961 | bool |
f2ffa5ab | 2962 | select OF |
e6ce1324 | 2963 | select OF_EARLY_FLATTREE |
abd2363f | 2964 | select IRQ_DOMAIN |
f2ffa5ab | 2965 | |
2fe8ea39 DZ |
2966 | config UHI_BOOT |
2967 | bool | |
2968 | ||
7fafb068 AB |
2969 | config BUILTIN_DTB |
2970 | bool | |
2971 | ||
1da8f179 | 2972 | choice |
5b24d52c | 2973 | prompt "Kernel appended dtb support" if USE_OF |
1da8f179 JG |
2974 | default MIPS_NO_APPENDED_DTB |
2975 | ||
2976 | config MIPS_NO_APPENDED_DTB | |
2977 | bool "None" | |
2978 | help | |
2979 | Do not enable appended dtb support. | |
2980 | ||
87db537d AK |
2981 | config MIPS_ELF_APPENDED_DTB |
2982 | bool "vmlinux" | |
2983 | help | |
2984 | With this option, the boot code will look for a device tree binary | |
2985 | DTB) included in the vmlinux ELF section .appended_dtb. By default | |
2986 | it is empty and the DTB can be appended using binutils command | |
2987 | objcopy: | |
2988 | ||
2989 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux | |
2990 | ||
2991 | This is meant as a backward compatiblity convenience for those | |
2992 | systems with a bootloader that can't be upgraded to accommodate | |
2993 | the documented boot protocol using a device tree. | |
2994 | ||
1da8f179 | 2995 | config MIPS_RAW_APPENDED_DTB |
b8f54f2c | 2996 | bool "vmlinux.bin or vmlinuz.bin" |
1da8f179 JG |
2997 | help |
2998 | With this option, the boot code will look for a device tree binary | |
b8f54f2c | 2999 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
1da8f179 JG |
3000 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
3001 | ||
3002 | This is meant as a backward compatibility convenience for those | |
3003 | systems with a bootloader that can't be upgraded to accommodate | |
3004 | the documented boot protocol using a device tree. | |
3005 | ||
3006 | Beware that there is very little in terms of protection against | |
3007 | this option being confused by leftover garbage in memory that might | |
3008 | look like a DTB header after a reboot if no actual DTB is appended | |
3009 | to vmlinux.bin. Do not leave this option active in a production kernel | |
3010 | if you don't intend to always append a DTB. | |
3011 | endchoice | |
3012 | ||
2024972e JG |
3013 | choice |
3014 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE | |
2bcef9b4 | 3015 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
3f5f0a44 | 3016 | !MIPS_MALTA && \ |
2bcef9b4 | 3017 | !CAVIUM_OCTEON_SOC |
2024972e JG |
3018 | default MIPS_CMDLINE_FROM_BOOTLOADER |
3019 | ||
3020 | config MIPS_CMDLINE_FROM_DTB | |
3021 | depends on USE_OF | |
3022 | bool "Dtb kernel arguments if available" | |
3023 | ||
3024 | config MIPS_CMDLINE_DTB_EXTEND | |
3025 | depends on USE_OF | |
3026 | bool "Extend dtb kernel arguments with bootloader arguments" | |
3027 | ||
3028 | config MIPS_CMDLINE_FROM_BOOTLOADER | |
3029 | bool "Bootloader kernel arguments if available" | |
ed47e153 RV |
3030 | |
3031 | config MIPS_CMDLINE_BUILTIN_EXTEND | |
3032 | depends on CMDLINE_BOOL | |
3033 | bool "Extend builtin kernel arguments with bootloader arguments" | |
2024972e JG |
3034 | endchoice |
3035 | ||
5e83d430 RB |
3036 | endmenu |
3037 | ||
1df0f0ff AN |
3038 | config LOCKDEP_SUPPORT |
3039 | bool | |
3040 | default y | |
3041 | ||
3042 | config STACKTRACE_SUPPORT | |
3043 | bool | |
3044 | default y | |
3045 | ||
e1e16115 AK |
3046 | config HAVE_LATENCYTOP_SUPPORT |
3047 | bool | |
3048 | default y | |
3049 | ||
a728ab52 KS |
3050 | config PGTABLE_LEVELS |
3051 | int | |
3377e227 | 3052 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
a728ab52 KS |
3053 | default 3 if 64BIT && !PAGE_SIZE_64KB |
3054 | default 2 | |
3055 | ||
6c359eb1 PB |
3056 | config MIPS_AUTO_PFN_OFFSET |
3057 | bool | |
3058 | ||
1da177e4 LT |
3059 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
3060 | ||
5e83d430 RB |
3061 | config HW_HAS_EISA |
3062 | bool | |
1da177e4 LT |
3063 | config HW_HAS_PCI |
3064 | bool | |
3065 | ||
3066 | config PCI | |
3067 | bool "Support for PCI controller" | |
3068 | depends on HW_HAS_PCI | |
abb4ae46 | 3069 | select PCI_DOMAINS |
1da177e4 LT |
3070 | help |
3071 | Find out whether you have a PCI motherboard. PCI is the name of a | |
3072 | bus system, i.e. the way the CPU talks to the other stuff inside | |
3073 | your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, | |
3074 | say Y, otherwise N. | |
3075 | ||
0e476d91 HC |
3076 | config HT_PCI |
3077 | bool "Support for HT-linked PCI" | |
3078 | default y | |
3079 | depends on CPU_LOONGSON3 | |
3080 | select PCI | |
3081 | select PCI_DOMAINS | |
3082 | help | |
3083 | Loongson family machines use Hyper-Transport bus for inter-core | |
3084 | connection and device connection. The PCI bus is a subordinate | |
3085 | linked at HT. Choose Y for Loongson-3 based machines. | |
3086 | ||
1da177e4 LT |
3087 | config PCI_DOMAINS |
3088 | bool | |
1da177e4 | 3089 | |
88555b48 PB |
3090 | config PCI_DOMAINS_GENERIC |
3091 | bool | |
3092 | ||
c5611df9 | 3093 | config PCI_DRIVERS_GENERIC |
87dd9a4d | 3094 | select PCI_DOMAINS_GENERIC if PCI_DOMAINS |
c5611df9 PB |
3095 | bool |
3096 | ||
3097 | config PCI_DRIVERS_LEGACY | |
3098 | def_bool !PCI_DRIVERS_GENERIC | |
3099 | select NO_GENERIC_PCI_IOPORT_MAP | |
3100 | ||
1da177e4 LT |
3101 | source "drivers/pci/Kconfig" |
3102 | ||
3103 | # | |
3104 | # ISA support is now enabled via select. Too many systems still have the one | |
3105 | # or other ISA chip on the board that users don't know about so don't expect | |
3106 | # users to choose the right thing ... | |
3107 | # | |
3108 | config ISA | |
3109 | bool | |
3110 | ||
3111 | config EISA | |
3112 | bool "EISA support" | |
5e83d430 | 3113 | depends on HW_HAS_EISA |
1da177e4 | 3114 | select ISA |
aa414dff | 3115 | select GENERIC_ISA_DMA |
1da177e4 LT |
3116 | ---help--- |
3117 | The Extended Industry Standard Architecture (EISA) bus was | |
3118 | developed as an open alternative to the IBM MicroChannel bus. | |
3119 | ||
3120 | The EISA bus provided some of the features of the IBM MicroChannel | |
3121 | bus while maintaining backward compatibility with cards made for | |
3122 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
3123 | 1995 when it was made obsolete by the PCI bus. | |
3124 | ||
3125 | Say Y here if you are building a kernel for an EISA-based machine. | |
3126 | ||
3127 | Otherwise, say N. | |
3128 | ||
3129 | source "drivers/eisa/Kconfig" | |
3130 | ||
3131 | config TC | |
3132 | bool "TURBOchannel support" | |
3133 | depends on MACH_DECSTATION | |
3134 | help | |
50a23e6e JM |
3135 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
3136 | processors. TURBOchannel programming specifications are available | |
3137 | at: | |
3138 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> | |
3139 | and: | |
3140 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> | |
3141 | Linux driver support status is documented at: | |
3142 | <http://www.linux-mips.org/wiki/DECstation> | |
1da177e4 | 3143 | |
1da177e4 LT |
3144 | config MMU |
3145 | bool | |
3146 | default y | |
3147 | ||
109c32ff MR |
3148 | config ARCH_MMAP_RND_BITS_MIN |
3149 | default 12 if 64BIT | |
3150 | default 8 | |
3151 | ||
3152 | config ARCH_MMAP_RND_BITS_MAX | |
3153 | default 18 if 64BIT | |
3154 | default 15 | |
3155 | ||
3156 | config ARCH_MMAP_RND_COMPAT_BITS_MIN | |
3157 | default 8 | |
3158 | ||
3159 | config ARCH_MMAP_RND_COMPAT_BITS_MAX | |
3160 | default 15 | |
3161 | ||
d865bea4 RB |
3162 | config I8253 |
3163 | bool | |
798778b8 | 3164 | select CLKSRC_I8253 |
2d02612f | 3165 | select CLKEVT_I8253 |
9726b43a | 3166 | select MIPS_EXTERNAL_TIMER |
d865bea4 | 3167 | |
e05eb3f8 RB |
3168 | config ZONE_DMA |
3169 | bool | |
3170 | ||
cce335ae RB |
3171 | config ZONE_DMA32 |
3172 | bool | |
3173 | ||
1da177e4 LT |
3174 | source "drivers/pcmcia/Kconfig" |
3175 | ||
fc5d9888 AS |
3176 | config HAS_RAPIDIO |
3177 | bool | |
3178 | default n | |
3179 | ||
388b78ad | 3180 | config RAPIDIO |
56abde72 | 3181 | tristate "RapidIO support" |
fc5d9888 | 3182 | depends on HAS_RAPIDIO || PCI |
388b78ad AB |
3183 | help |
3184 | If you say Y here, the kernel will include drivers and | |
3185 | infrastructure code to support RapidIO interconnect devices. | |
3186 | ||
3187 | source "drivers/rapidio/Kconfig" | |
3188 | ||
1da177e4 LT |
3189 | endmenu |
3190 | ||
1da177e4 LT |
3191 | config TRAD_SIGNALS |
3192 | bool | |
1da177e4 | 3193 | |
1da177e4 | 3194 | config MIPS32_COMPAT |
78aaf956 | 3195 | bool |
1da177e4 LT |
3196 | |
3197 | config COMPAT | |
3198 | bool | |
1da177e4 | 3199 | |
05e43966 AN |
3200 | config SYSVIPC_COMPAT |
3201 | bool | |
05e43966 | 3202 | |
1da177e4 LT |
3203 | config MIPS32_O32 |
3204 | bool "Kernel support for o32 binaries" | |
78aaf956 RB |
3205 | depends on 64BIT |
3206 | select ARCH_WANT_OLD_COMPAT_IPC | |
3207 | select COMPAT | |
3208 | select MIPS32_COMPAT | |
3209 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3210 | help |
3211 | Select this option if you want to run o32 binaries. These are pure | |
3212 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of | |
3213 | existing binaries are in this format. | |
3214 | ||
3215 | If unsure, say Y. | |
3216 | ||
3217 | config MIPS32_N32 | |
3218 | bool "Kernel support for n32 binaries" | |
c22eacfe | 3219 | depends on 64BIT |
78aaf956 RB |
3220 | select COMPAT |
3221 | select MIPS32_COMPAT | |
3222 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3223 | help |
3224 | Select this option if you want to run n32 binaries. These are | |
3225 | 64-bit binaries using 32-bit quantities for addressing and certain | |
3226 | data that would normally be 64-bit. They are used in special | |
3227 | cases. | |
3228 | ||
3229 | If unsure, say N. | |
3230 | ||
3231 | config BINFMT_ELF32 | |
3232 | bool | |
3233 | default y if MIPS32_O32 || MIPS32_N32 | |
f43edca7 | 3234 | select ELFCORE |
1da177e4 | 3235 | |
2116245e RB |
3236 | menu "Power management options" |
3237 | ||
363c55ca WZ |
3238 | config ARCH_HIBERNATION_POSSIBLE |
3239 | def_bool y | |
3f5b3e17 | 3240 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
363c55ca | 3241 | |
f4cb5700 JB |
3242 | config ARCH_SUSPEND_POSSIBLE |
3243 | def_bool y | |
3f5b3e17 | 3244 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
f4cb5700 | 3245 | |
2116245e | 3246 | source "kernel/power/Kconfig" |
952fa954 | 3247 | |
1da177e4 LT |
3248 | endmenu |
3249 | ||
7a998935 VK |
3250 | config MIPS_EXTERNAL_TIMER |
3251 | bool | |
3252 | ||
7a998935 | 3253 | menu "CPU Power Management" |
c095ebaf PB |
3254 | |
3255 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | |
7a998935 | 3256 | source "drivers/cpufreq/Kconfig" |
7a998935 | 3257 | endif |
9726b43a | 3258 | |
c095ebaf PB |
3259 | source "drivers/cpuidle/Kconfig" |
3260 | ||
3261 | endmenu | |
3262 | ||
98cdee0e RB |
3263 | source "drivers/firmware/Kconfig" |
3264 | ||
2235a54d | 3265 | source "arch/mips/kvm/Kconfig" |