projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'tracing-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / arch / blackfin / mach-bf537 / boards / minotaur.c
CommitLineData
471b9a6c
MS		 1/*
2 */
3
4#include <linux/device.h>
5#include <linux/platform_device.h>
6#include <linux/mtd/mtd.h>
7#include <linux/mtd/partitions.h>
8#include <linux/spi/spi.h>
9#include <linux/spi/flash.h>
10#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f950f605 11#include <linux/usb/isp1362.h>
471b9a6c 12#endif
0a87e3e9 13#include <linux/ata_platform.h>
471b9a6c
MS		 14#include <linux/irq.h>
15#include <linux/interrupt.h>
f950f605 16#include <linux/usb/sl811.h>
471b9a6c
MS		 17#include <asm/dma.h>
18#include <asm/bfin5xx_spi.h>
19#include <asm/reboot.h>
20#include <linux/spi/ad7877.h>
21
22/*
23 * Name the Board for the /proc/cpuinfo
24 */
25char *bfin_board_name = "CamSig Minotaur BF537";
26
27#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
28static struct resource bfin_pcmcia_cf_resources[] = {
29 {
30 .start = 0x20310000, /* IO PORT */
31 .end = 0x20312000,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = 0x20311000, /* Attribute Memory */
35 .end = 0x20311FFF,
36 .flags = IORESOURCE_MEM,
37 }, {
38 .start = IRQ_PF4,
39 .end = IRQ_PF4,
40 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
41 }, {
42 .start = IRQ_PF6, /* Card Detect PF6 */
43 .end = IRQ_PF6,
44 .flags = IORESOURCE_IRQ,
45 },
46};
47
48static struct platform_device bfin_pcmcia_cf_device = {
49 .name = "bfin_cf_pcmcia",
50 .id = -1,
51 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
52 .resource = bfin_pcmcia_cf_resources,
53};
54#endif
55
56#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
57static struct platform_device rtc_device = {
58 .name = "rtc-bfin",
59 .id = -1,
60};
61#endif
62
63#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 64static struct platform_device bfin_mii_bus = {
65 .name = "bfin_mii_bus",
66};
67
471b9a6c
MS		 68static struct platform_device bfin_mac_device = {
69 .name = "bfin_mac",
65319628 70 .dev.platform_data = &bfin_mii_bus,
471b9a6c
MS		 71};
72#endif
73
74#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
75static struct resource net2272_bfin_resources[] = {
76 {
77 .start = 0x20300000,
78 .end = 0x20300000 + 0x100,
79 .flags = IORESOURCE_MEM,
80 }, {
81 .start = IRQ_PF7,
82 .end = IRQ_PF7,
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
84 },
85};
86
87static struct platform_device net2272_bfin_device = {
88 .name = "net2272",
89 .id = -1,
90 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
91 .resource = net2272_bfin_resources,
92};
93#endif
94
95#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
96/* all SPI peripherals info goes here */
97
98#if defined(CONFIG_MTD_M25P80) \
99 || defined(CONFIG_MTD_M25P80_MODULE)
100
101/* Partition sizes */
102#define FLASH_SIZE 0x00400000
103#define PSIZE_UBOOT 0x00030000
104#define PSIZE_INITRAMFS 0x00240000
105
106static struct mtd_partition bfin_spi_flash_partitions[] = {
107 {
aa582977 108 .name = "bootloader(spi)",
471b9a6c
MS		 109 .size = PSIZE_UBOOT,
110 .offset = 0x000000,
111 .mask_flags = MTD_CAP_ROM
112 }, {
aa582977 113 .name = "initramfs(spi)",
471b9a6c
MS		 114 .size = PSIZE_INITRAMFS,
115 .offset = PSIZE_UBOOT
116 }, {
aa582977 117 .name = "opt(spi)",
471b9a6c
MS		 118 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
119 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
120 }
121};
122
123static struct flash_platform_data bfin_spi_flash_data = {
124 .name = "m25p80",
125 .parts = bfin_spi_flash_partitions,
126 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
127 .type = "m25p64",
128};
129
130/* SPI flash chip (m25p64) */
131static struct bfin5xx_spi_chip spi_flash_chip_info = {
132 .enable_dma = 0, /* use dma transfer with this chip*/
133 .bits_per_word = 8,
134};
135#endif
136
137#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
138static struct bfin5xx_spi_chip spi_mmc_chip_info = {
139 .enable_dma = 1,
140 .bits_per_word = 8,
141};
142#endif
143
144static struct spi_board_info bfin_spi_board_info[] __initdata = {
145#if defined(CONFIG_MTD_M25P80) \
146 || defined(CONFIG_MTD_M25P80_MODULE)
147 {
148 /* the modalias must be the same as spi device driver name */
149 .modalias = "m25p80", /* Name of spi_driver for this device */
150 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
151 .bus_num = 0, /* Framework bus number */
152 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
153 .platform_data = &bfin_spi_flash_data,
154 .controller_data = &spi_flash_chip_info,
155 .mode = SPI_MODE_3,
156 },
157#endif
158
159#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
160 {
161 .modalias = "spi_mmc_dummy",
162 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
163 .bus_num = 0,
164 .chip_select = 0,
165 .platform_data = NULL,
166 .controller_data = &spi_mmc_chip_info,
167 .mode = SPI_MODE_3,
168 },
169 {
170 .modalias = "spi_mmc",
171 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
172 .bus_num = 0,
173 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
174 .platform_data = NULL,
175 .controller_data = &spi_mmc_chip_info,
176 .mode = SPI_MODE_3,
177 },
178#endif
179};
180
181/* SPI controller data */
182static struct bfin5xx_spi_master bfin_spi0_info = {
183 .num_chipselect = 8,
184 .enable_dma = 1, /* master has the ability to do dma transfer */
185};
186
187/* SPI (0) */
188static struct resource bfin_spi0_resource[] = {
189 [0] = {
190 .start = SPI0_REGBASE,
191 .end = SPI0_REGBASE + 0xFF,
192 .flags = IORESOURCE_MEM,
193 },
194 [1] = {
195 .start = CH_SPI,
196 .end = CH_SPI,
197 .flags = IORESOURCE_IRQ,
198 },
199};
200
201static struct platform_device bfin_spi0_device = {
202 .name = "bfin-spi",
203 .id = 0, /* Bus number */
204 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
205 .resource = bfin_spi0_resource,
206 .dev = {
207 .platform_data = &bfin_spi0_info, /* Passed to driver */
208 },
209};
210#endif /* spi master and devices */
211
212#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
213static struct resource bfin_uart_resources[] = {
214 {
215 .start = 0xFFC00400,
216 .end = 0xFFC004FF,
217 .flags = IORESOURCE_MEM,
218 }, {
219 .start = 0xFFC02000,
220 .end = 0xFFC020FF,
221 .flags = IORESOURCE_MEM,
222 },
223};
224
225static struct platform_device bfin_uart_device = {
226 .name = "bfin-uart",
227 .id = 1,
228 .num_resources = ARRAY_SIZE(bfin_uart_resources),
229 .resource = bfin_uart_resources,
230};
231#endif
232
5be36d22 233#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 234#ifdef CONFIG_BFIN_SIR0
42bd8bcb 235static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 236 {
237 .start = 0xFFC00400,
238 .end = 0xFFC004FF,
239 .flags = IORESOURCE_MEM,
240 },
42bd8bcb
GY		 241 {
242 .start = IRQ_UART0_RX,
243 .end = IRQ_UART0_RX+1,
244 .flags = IORESOURCE_IRQ,
245 },
246 {
247 .start = CH_UART0_RX,
248 .end = CH_UART0_RX+1,
249 .flags = IORESOURCE_DMA,
250 },
251};
252
253static struct platform_device bfin_sir0_device = {
254 .name = "bfin_sir",
255 .id = 0,
256 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
257 .resource = bfin_sir0_resources,
258};
5be36d22
GY		 259#endif
260#ifdef CONFIG_BFIN_SIR1
42bd8bcb 261static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 262 {
263 .start = 0xFFC02000,
264 .end = 0xFFC020FF,
265 .flags = IORESOURCE_MEM,
266 },
42bd8bcb
GY		 267 {
268 .start = IRQ_UART1_RX,
269 .end = IRQ_UART1_RX+1,
270 .flags = IORESOURCE_IRQ,
271 },
272 {
273 .start = CH_UART1_RX,
274 .end = CH_UART1_RX+1,
275 .flags = IORESOURCE_DMA,
276 },
5be36d22
GY		 277};
278
42bd8bcb 279static struct platform_device bfin_sir1_device = {
5be36d22 280 .name = "bfin_sir",
42bd8bcb
GY		 281 .id = 1,
282 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
283 .resource = bfin_sir1_resources,
5be36d22
GY		 284};
285#endif
42bd8bcb 286#endif
5be36d22 287
471b9a6c
MS		 288#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
289static struct resource bfin_twi0_resource[] = {
290 [0] = {
291 .start = TWI0_REGBASE,
292 .end = TWI0_REGBASE + 0xFF,
293 .flags = IORESOURCE_MEM,
294 },
295 [1] = {
296 .start = IRQ_TWI,
297 .end = IRQ_TWI,
298 .flags = IORESOURCE_IRQ,
299 },
300};
301
302static struct platform_device i2c_bfin_twi_device = {
303 .name = "i2c-bfin-twi",
304 .id = 0,
305 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
306 .resource = bfin_twi0_resource,
307};
308#endif
309
310#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
311static struct platform_device bfin_sport0_uart_device = {
312 .name = "bfin-sport-uart",
313 .id = 0,
314};
315
316static struct platform_device bfin_sport1_uart_device = {
317 .name = "bfin-sport-uart",
318 .id = 1,
319};
320#endif
321
322static struct platform_device *minotaur_devices[] __initdata = {
323#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
324 &bfin_pcmcia_cf_device,
325#endif
326
327#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
328 &rtc_device,
329#endif
330
331#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 332 &bfin_mii_bus,
471b9a6c
MS		 333 &bfin_mac_device,
334#endif
335
336#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
337 &net2272_bfin_device,
338#endif
339
340#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
341 &bfin_spi0_device,
342#endif
343
344#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
345 &bfin_uart_device,
346#endif
347
5be36d22 348#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 349#ifdef CONFIG_BFIN_SIR0
350 &bfin_sir0_device,
351#endif
352#ifdef CONFIG_BFIN_SIR1
353 &bfin_sir1_device,
354#endif
5be36d22
GY		 355#endif
356
471b9a6c
MS		 357#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
358 &i2c_bfin_twi_device,
359#endif
360
361#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
362 &bfin_sport0_uart_device,
363 &bfin_sport1_uart_device,
364#endif
365
366};
367
368static int __init minotaur_init(void)
369{
b85d858b 370 printk(KERN_INFO "%s(): registering device resources\n", __func__);
471b9a6c
MS		 371 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
372#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
373 spi_register_board_info(bfin_spi_board_info,
374 ARRAY_SIZE(bfin_spi_board_info));
375#endif
376
377 return 0;
378}
379
380arch_initcall(minotaur_init);
381
382void native_machine_restart(char *cmd)
383{
384 /* workaround reboot hang when booting from SPI */
385 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 386 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
471b9a6c 387}
Linux 6.x block layer and io_uring tree(s)