[linux-block.git] / arch / blackfin / mach-bf537 / boards / minotaur.c

/*
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/usb/sl811.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <linux/spi/ad7877.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
char *bfin_board_name = "CamSig Minotaur BF537";

#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
static struct resource bfin_pcmcia_cf_resources[] = {
	{
		.start = 0x20310000, /* IO PORT */
		.end = 0x20312000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20311000, /* Attribute Memory */
		.end = 0x20311FFF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF4,
		.end = IRQ_PF4,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	}, {
		.start = IRQ_PF6, /* Card Detect PF6 */
		.end = IRQ_PF6,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pcmcia_cf_device = {
	.name = "bfin_cf_pcmcia",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	.resource = bfin_pcmcia_cf_resources,
};
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev.platform_data = &bfin_mii_bus,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)

/* Partition sizes */
#define FLASH_SIZE       0x00400000
#define PSIZE_UBOOT      0x00030000
#define PSIZE_INITRAMFS  0x00240000

static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name       = "bootloader(spi)",
		.size       = PSIZE_UBOOT,
		.offset     = 0x000000,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name       = "initramfs(spi)",
		.size       = PSIZE_INITRAMFS,
		.offset     = PSIZE_UBOOT
	}, {
		.name       = "opt(spi)",
		.size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
		.offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 5,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
static struct resource bfin_twi0_resource[] = {
	[0] = {
		.start = TWI0_REGBASE,
		.end   = TWI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_TWI,
		.end   = IRQ_TWI,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device i2c_bfin_twi_device = {
	.name = "i2c-bfin-twi",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	.resource = bfin_twi0_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

static struct platform_device *minotaur_devices[] __initdata = {
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	&bfin_pcmcia_cf_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	&i2c_bfin_twi_device,
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

};

static int __init minotaur_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info,
				ARRAY_SIZE(bfin_spi_board_info));
#endif

	return 0;
}

arch_initcall(minotaur_init);

void native_machine_restart(char *cmd)
{
	/* workaround reboot hang when booting from SPI */
	if ((bfin_read_SYSCR() & 0x7) == 0x3)
		bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
Commit	Line	Data
471b9a6c MS	1	/*
	2	*/
	3
	4	#include <linux/device.h>
	5	#include <linux/platform_device.h>
	6	#include <linux/mtd/mtd.h>
	7	#include <linux/mtd/partitions.h>
	8	#include <linux/spi/spi.h>
	9	#include <linux/spi/flash.h>
	10	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f950f605	11	#include <linux/usb/isp1362.h>
471b9a6c	12	#endif
0a87e3e9	13	#include <linux/ata_platform.h>
471b9a6c MS	14	#include <linux/irq.h>
471b9a6c MS	15	#include <linux/interrupt.h>
f950f605	16	#include <linux/usb/sl811.h>
471b9a6c MS	17	#include <asm/dma.h>
	18	#include <asm/bfin5xx_spi.h>
	19	#include <asm/reboot.h>
	20	#include <linux/spi/ad7877.h>
	21
	22	/*
	23	* Name the Board for the /proc/cpuinfo
	24	*/
	25	char *bfin_board_name = "CamSig Minotaur BF537";
	26
	27	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	28	static struct resource bfin_pcmcia_cf_resources[] = {
	29	{
	30	.start = 0x20310000, /* IO PORT */
	31	.end = 0x20312000,
	32	.flags = IORESOURCE_MEM,
	33	}, {
	34	.start = 0x20311000, /* Attribute Memory */
	35	.end = 0x20311FFF,
	36	.flags = IORESOURCE_MEM,
	37	}, {
	38	.start = IRQ_PF4,
	39	.end = IRQ_PF4,
	40	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	41	}, {
	42	.start = IRQ_PF6, /* Card Detect PF6 */
	43	.end = IRQ_PF6,
	44	.flags = IORESOURCE_IRQ,
	45	},
	46	};
	47
	48	static struct platform_device bfin_pcmcia_cf_device = {
	49	.name = "bfin_cf_pcmcia",
	50	.id = -1,
	51	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	52	.resource = bfin_pcmcia_cf_resources,
	53	};
	54	#endif
	55
	56	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	57	static struct platform_device rtc_device = {
	58	.name = "rtc-bfin",
	59	.id = -1,
	60	};
	61	#endif
	62
	63	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628 GY	64	static struct platform_device bfin_mii_bus = {
	65	.name = "bfin_mii_bus",
	66	};
	67
471b9a6c MS	68	static struct platform_device bfin_mac_device = {
471b9a6c MS	69	.name = "bfin_mac",
65319628	70	.dev.platform_data = &bfin_mii_bus,
471b9a6c MS	71	};
	72	#endif
	73
	74	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	75	static struct resource net2272_bfin_resources[] = {
	76	{
	77	.start = 0x20300000,
	78	.end = 0x20300000 + 0x100,
	79	.flags = IORESOURCE_MEM,
	80	}, {
	81	.start = IRQ_PF7,
	82	.end = IRQ_PF7,
	83	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	84	},
	85	};
	86
	87	static struct platform_device net2272_bfin_device = {
	88	.name = "net2272",
	89	.id = -1,
	90	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	91	.resource = net2272_bfin_resources,
	92	};
	93	#endif
	94
	95	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	96	/* all SPI peripherals info goes here */
	97
	98	#if defined(CONFIG_MTD_M25P80) \
	99	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	100
	101	/* Partition sizes */
	102	#define FLASH_SIZE 0x00400000
	103	#define PSIZE_UBOOT 0x00030000
	104	#define PSIZE_INITRAMFS 0x00240000
	105
	106	static struct mtd_partition bfin_spi_flash_partitions[] = {
	107	{
aa582977	108	.name = "bootloader(spi)",
471b9a6c MS	109	.size = PSIZE_UBOOT,
	110	.offset = 0x000000,
	111	.mask_flags = MTD_CAP_ROM
	112	}, {
aa582977	113	.name = "initramfs(spi)",
471b9a6c MS	114	.size = PSIZE_INITRAMFS,
	115	.offset = PSIZE_UBOOT
	116	}, {
aa582977	117	.name = "opt(spi)",
471b9a6c MS	118	.size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
	119	.offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
	120	}
	121	};
	122
	123	static struct flash_platform_data bfin_spi_flash_data = {
	124	.name = "m25p80",
	125	.parts = bfin_spi_flash_partitions,
	126	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	127	.type = "m25p64",
	128	};
	129
	130	/* SPI flash chip (m25p64) */
	131	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	132	.enable_dma = 0, /* use dma transfer with this chip*/
	133	.bits_per_word = 8,
	134	};
	135	#endif
	136
f3f704d3 MH	137	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	138	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	139	.enable_dma = 0,
471b9a6c MS	140	.bits_per_word = 8,
	141	};
	142	#endif
	143
	144	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	145	#if defined(CONFIG_MTD_M25P80) \
	146	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	147	{
	148	/* the modalias must be the same as spi device driver name */
	149	.modalias = "m25p80", /* Name of spi_driver for this device */
	150	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
	151	.bus_num = 0, /* Framework bus number */
	152	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	153	.platform_data = &bfin_spi_flash_data,
	154	.controller_data = &spi_flash_chip_info,
	155	.mode = SPI_MODE_3,
	156	},
	157	#endif
	158
f3f704d3	159	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
471b9a6c	160	{
f3f704d3	161	.modalias = "mmc_spi",
471b9a6c MS	162	.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
471b9a6c MS	163	.bus_num = 0,
f3f704d3 MH	164	.chip_select = 5,
f3f704d3 MH	165	.controller_data = &mmc_spi_chip_info,
471b9a6c MS	166	.mode = SPI_MODE_3,
	167	},
	168	#endif
	169	};
	170
	171	/* SPI controller data */
	172	static struct bfin5xx_spi_master bfin_spi0_info = {
	173	.num_chipselect = 8,
	174	.enable_dma = 1, /* master has the ability to do dma transfer */
	175	};
	176
	177	/* SPI (0) */
	178	static struct resource bfin_spi0_resource[] = {
	179	[0] = {
	180	.start = SPI0_REGBASE,
	181	.end = SPI0_REGBASE + 0xFF,
	182	.flags = IORESOURCE_MEM,
	183	},
	184	[1] = {
	185	.start = CH_SPI,
	186	.end = CH_SPI,
	187	.flags = IORESOURCE_IRQ,
	188	},
	189	};
	190
	191	static struct platform_device bfin_spi0_device = {
	192	.name = "bfin-spi",
	193	.id = 0, /* Bus number */
	194	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	195	.resource = bfin_spi0_resource,
	196	.dev = {
	197	.platform_data = &bfin_spi0_info, /* Passed to driver */
	198	},
	199	};
	200	#endif /* spi master and devices */
	201
	202	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	203	static struct resource bfin_uart_resources[] = {
	204	{
	205	.start = 0xFFC00400,
	206	.end = 0xFFC004FF,
	207	.flags = IORESOURCE_MEM,
	208	}, {
	209	.start = 0xFFC02000,
	210	.end = 0xFFC020FF,
	211	.flags = IORESOURCE_MEM,
	212	},
	213	};
	214
	215	static struct platform_device bfin_uart_device = {
	216	.name = "bfin-uart",
	217	.id = 1,
	218	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	219	.resource = bfin_uart_resources,
	220	};
	221	#endif
	222
5be36d22	223	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	224	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	225	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	226	{
	227	.start = 0xFFC00400,
	228	.end = 0xFFC004FF,
	229	.flags = IORESOURCE_MEM,
	230	},
42bd8bcb GY	231	{
	232	.start = IRQ_UART0_RX,
	233	.end = IRQ_UART0_RX+1,
	234	.flags = IORESOURCE_IRQ,
	235	},
	236	{
	237	.start = CH_UART0_RX,
	238	.end = CH_UART0_RX+1,
	239	.flags = IORESOURCE_DMA,
	240	},
	241	};
	242
	243	static struct platform_device bfin_sir0_device = {
	244	.name = "bfin_sir",
	245	.id = 0,
	246	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	247	.resource = bfin_sir0_resources,
	248	};
5be36d22 GY	249	#endif
5be36d22 GY	250	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	251	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	252	{
	253	.start = 0xFFC02000,
	254	.end = 0xFFC020FF,
	255	.flags = IORESOURCE_MEM,
	256	},
42bd8bcb GY	257	{
	258	.start = IRQ_UART1_RX,
	259	.end = IRQ_UART1_RX+1,
	260	.flags = IORESOURCE_IRQ,
	261	},
	262	{
	263	.start = CH_UART1_RX,
	264	.end = CH_UART1_RX+1,
	265	.flags = IORESOURCE_DMA,
	266	},
5be36d22 GY	267	};
5be36d22 GY	268
42bd8bcb	269	static struct platform_device bfin_sir1_device = {
5be36d22	270	.name = "bfin_sir",
42bd8bcb GY	271	.id = 1,
	272	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	273	.resource = bfin_sir1_resources,
5be36d22 GY	274	};
5be36d22 GY	275	#endif
42bd8bcb	276	#endif
5be36d22	277
471b9a6c MS	278	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	279	static struct resource bfin_twi0_resource[] = {
	280	[0] = {
	281	.start = TWI0_REGBASE,
	282	.end = TWI0_REGBASE + 0xFF,
	283	.flags = IORESOURCE_MEM,
	284	},
	285	[1] = {
	286	.start = IRQ_TWI,
	287	.end = IRQ_TWI,
	288	.flags = IORESOURCE_IRQ,
	289	},
	290	};
	291
	292	static struct platform_device i2c_bfin_twi_device = {
	293	.name = "i2c-bfin-twi",
	294	.id = 0,
	295	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	296	.resource = bfin_twi0_resource,
	297	};
	298	#endif
	299
	300	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	301	static struct platform_device bfin_sport0_uart_device = {
	302	.name = "bfin-sport-uart",
	303	.id = 0,
	304	};
	305
	306	static struct platform_device bfin_sport1_uart_device = {
	307	.name = "bfin-sport-uart",
	308	.id = 1,
	309	};
	310	#endif
	311
	312	static struct platform_device *minotaur_devices[] __initdata = {
	313	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	314	&bfin_pcmcia_cf_device,
	315	#endif
	316
	317	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	318	&rtc_device,
	319	#endif
	320
	321	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	322	&bfin_mii_bus,
471b9a6c MS	323	&bfin_mac_device,
	324	#endif
	325
	326	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	327	&net2272_bfin_device,
	328	#endif
	329
	330	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	331	&bfin_spi0_device,
	332	#endif
	333
	334	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	335	&bfin_uart_device,
	336	#endif
	337
5be36d22	338	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	339	#ifdef CONFIG_BFIN_SIR0
	340	&bfin_sir0_device,
	341	#endif
	342	#ifdef CONFIG_BFIN_SIR1
	343	&bfin_sir1_device,
	344	#endif
5be36d22 GY	345	#endif
5be36d22 GY	346
471b9a6c MS	347	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	348	&i2c_bfin_twi_device,
	349	#endif
	350
	351	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	352	&bfin_sport0_uart_device,
	353	&bfin_sport1_uart_device,
	354	#endif
	355
	356	};
	357
	358	static int __init minotaur_init(void)
	359	{
b85d858b	360	printk(KERN_INFO "%s(): registering device resources\n", __func__);
471b9a6c MS	361	platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
	362	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	363	spi_register_board_info(bfin_spi_board_info,
	364	ARRAY_SIZE(bfin_spi_board_info));
	365	#endif
	366
	367	return 0;
	368	}
	369
	370	arch_initcall(minotaur_init);
	371
	372	void native_machine_restart(char *cmd)
	373	{
	374	/* workaround reboot hang when booting from SPI */
	375	if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31	376	bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
471b9a6c	377	}