Commit | Line | Data |
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1394f032 | 1 | /* |
96f1050d | 2 | * Copyright 2004-2009 Analog Devices Inc. |
1394f032 | 3 | * |
96f1050d | 4 | * Licensed under the GPL-2 or later |
1394f032 BW |
5 | */ |
6 | ||
1394f032 BW |
7 | #include <asm-generic/vmlinux.lds.h> |
8 | #include <asm/mem_map.h> | |
520473b0 | 9 | #include <asm/page.h> |
0fa63ad7 | 10 | #include <asm/thread_info.h> |
1394f032 | 11 | |
1394f032 BW |
12 | OUTPUT_FORMAT("elf32-bfin") |
13 | ENTRY(__start) | |
14 | _jiffies = _jiffies_64; | |
15 | ||
1394f032 BW |
16 | SECTIONS |
17 | { | |
d86bfb16 | 18 | #ifdef CONFIG_RAMKERNEL |
1394f032 | 19 | . = CONFIG_BOOT_LOAD; |
d86bfb16 BS |
20 | #else |
21 | . = CONFIG_ROM_BASE; | |
22 | #endif | |
23 | ||
b7627acc MF |
24 | /* Neither the text, ro_data or bss section need to be aligned |
25 | * So pack them back to back | |
26 | */ | |
1394f032 BW |
27 | .text : |
28 | { | |
de6a9520 MF |
29 | __text = .; |
30 | _text = .; | |
31 | __stext = .; | |
7664709b | 32 | TEXT_TEXT |
b8d0c778 | 33 | #ifndef CONFIG_SCHEDULE_L1 |
1394f032 | 34 | SCHED_TEXT |
b8d0c778 | 35 | #endif |
de6a9520 | 36 | LOCK_TEXT |
1ee76d7e | 37 | IRQENTRY_TEXT |
27d875f2 | 38 | KPROBES_TEXT |
d86bfb16 BS |
39 | #ifdef CONFIG_ROMKERNEL |
40 | __sinittext = .; | |
41 | INIT_TEXT | |
42 | __einittext = .; | |
43 | EXIT_TEXT | |
44 | #endif | |
27d875f2 | 45 | *(.text.*) |
de6a9520 MF |
46 | *(.fixup) |
47 | ||
bc6e0fa1 MF |
48 | #if !L1_CODE_LENGTH |
49 | *(.l1.text) | |
50 | #endif | |
51 | ||
1394f032 | 52 | . = ALIGN(16); |
de6a9520 | 53 | ___start___ex_table = .; |
1394f032 | 54 | *(__ex_table) |
de6a9520 | 55 | ___stop___ex_table = .; |
1394f032 | 56 | |
1394f032 | 57 | __etext = .; |
de6a9520 MF |
58 | } |
59 | ||
6f985294 BS |
60 | NOTES |
61 | ||
b7627acc MF |
62 | /* Just in case the first read only is a 32-bit access */ |
63 | RO_DATA(4) | |
d86bfb16 | 64 | __rodata_end = .; |
b7627acc | 65 | |
d86bfb16 BS |
66 | #ifdef CONFIG_ROMKERNEL |
67 | . = CONFIG_BOOT_LOAD; | |
68 | .bss : AT(__rodata_end) | |
69 | #else | |
b7627acc | 70 | .bss : |
d86bfb16 | 71 | #endif |
b7627acc MF |
72 | { |
73 | . = ALIGN(4); | |
74 | ___bss_start = .; | |
75 | *(.bss .bss.*) | |
76 | *(COMMON) | |
bc6e0fa1 MF |
77 | #if !L1_DATA_A_LENGTH |
78 | *(.l1.bss) | |
79 | #endif | |
80 | #if !L1_DATA_B_LENGTH | |
81 | *(.l1.bss.B) | |
82 | #endif | |
13752046 | 83 | . = ALIGN(4); |
b7627acc MF |
84 | ___bss_stop = .; |
85 | } | |
de6a9520 | 86 | |
d86bfb16 BS |
87 | #if defined(CONFIG_ROMKERNEL) |
88 | .data : AT(LOADADDR(.bss) + SIZEOF(.bss)) | |
89 | #else | |
de6a9520 | 90 | .data : |
d86bfb16 | 91 | #endif |
de6a9520 MF |
92 | { |
93 | __sdata = .; | |
b7627acc | 94 | /* This gets done first, so the glob doesn't suck it in */ |
4a5e3513 | 95 | CACHELINE_ALIGNED_DATA(32) |
de6a9520 | 96 | |
b85b82d9 SZ |
97 | #if !L1_DATA_A_LENGTH |
98 | . = ALIGN(32); | |
99 | *(.data_l1.cacheline_aligned) | |
bc6e0fa1 MF |
100 | *(.l1.data) |
101 | #endif | |
102 | #if !L1_DATA_B_LENGTH | |
103 | *(.l1.data.B) | |
b85b82d9 | 104 | #endif |
07aa7be5 | 105 | #if !L2_LENGTH |
262c3825 SZ |
106 | . = ALIGN(32); |
107 | *(.data_l2.cacheline_aligned) | |
108 | *(.l2.data) | |
109 | #endif | |
b85b82d9 | 110 | |
27d875f2 | 111 | DATA_DATA |
27d875f2 MF |
112 | CONSTRUCTORS |
113 | ||
4a5e3513 | 114 | INIT_TASK_DATA(THREAD_SIZE) |
b7627acc | 115 | |
de6a9520 MF |
116 | __edata = .; |
117 | } | |
d86bfb16 BS |
118 | __data_lma = LOADADDR(.data); |
119 | __data_len = SIZEOF(.data); | |
1394f032 | 120 | |
b7627acc MF |
121 | /* The init section should be last, so when we free it, it goes into |
122 | * the general memory pool, and (hopefully) will decrease fragmentation | |
123 | * a tiny bit. The init section has a _requirement_ that it be | |
124 | * PAGE_SIZE aligned | |
125 | */ | |
126 | . = ALIGN(PAGE_SIZE); | |
de6a9520 | 127 | ___init_begin = .; |
27d875f2 | 128 | |
d86bfb16 | 129 | #ifdef CONFIG_RAMKERNEL |
4a5e3513 | 130 | INIT_TEXT_SECTION(PAGE_SIZE) |
70f12567 | 131 | |
0afc272c | 132 | /* We have to discard exit text and such at runtime, not link time, to |
70f12567 | 133 | * handle embedded cross-section references (alt instructions, bug |
0afc272c JZ |
134 | * table, eh_frame, etc...). We need all of our .text up front and |
135 | * .data after it for PCREL call issues. | |
70f12567 MF |
136 | */ |
137 | .exit.text : | |
138 | { | |
139 | EXIT_TEXT | |
140 | } | |
0afc272c JZ |
141 | |
142 | . = ALIGN(16); | |
143 | INIT_DATA_SECTION(16) | |
144 | PERCPU(4) | |
145 | ||
70f12567 MF |
146 | .exit.data : |
147 | { | |
148 | EXIT_DATA | |
149 | } | |
150 | ||
4a5e3513 | 151 | .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data)) |
d86bfb16 BS |
152 | #else |
153 | .init.data : AT(__data_lma + __data_len) | |
154 | { | |
155 | __sinitdata = .; | |
156 | INIT_DATA | |
157 | INIT_SETUP(16) | |
158 | INIT_CALLS | |
159 | CON_INITCALL | |
160 | SECURITY_INITCALL | |
161 | INIT_RAM_FS | |
162 | ||
163 | . = ALIGN(4); | |
164 | ___per_cpu_load = .; | |
165 | ___per_cpu_start = .; | |
166 | *(.data.percpu.first) | |
167 | *(.data.percpu.page_aligned) | |
168 | *(.data.percpu) | |
169 | *(.data.percpu.shared_aligned) | |
170 | ___per_cpu_end = .; | |
171 | ||
172 | EXIT_DATA | |
173 | __einitdata = .; | |
174 | } | |
175 | __init_data_lma = LOADADDR(.init.data); | |
176 | __init_data_len = SIZEOF(.init.data); | |
177 | __init_data_end = .; | |
178 | ||
179 | .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len) | |
180 | #endif | |
1394f032 BW |
181 | { |
182 | . = ALIGN(4); | |
de6a9520 | 183 | __stext_l1 = .; |
bc6e0fa1 | 184 | *(.l1.text) |
b8d0c778 RG |
185 | #ifdef CONFIG_SCHEDULE_L1 |
186 | SCHED_TEXT | |
187 | #endif | |
1394f032 | 188 | . = ALIGN(4); |
de6a9520 MF |
189 | __etext_l1 = .; |
190 | } | |
5cd82a6d MF |
191 | __text_l1_lma = LOADADDR(.text_l1); |
192 | __text_l1_len = SIZEOF(.text_l1); | |
193 | ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!") | |
1394f032 | 194 | |
5cd82a6d | 195 | .data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len) |
1394f032 BW |
196 | { |
197 | . = ALIGN(4); | |
de6a9520 | 198 | __sdata_l1 = .; |
bc6e0fa1 | 199 | *(.l1.data) |
de6a9520 | 200 | __edata_l1 = .; |
1394f032 | 201 | |
1394f032 | 202 | . = ALIGN(32); |
bc6e0fa1 | 203 | *(.data_l1.cacheline_aligned) |
1394f032 | 204 | |
262c3825 SZ |
205 | . = ALIGN(4); |
206 | __sbss_l1 = .; | |
207 | *(.l1.bss) | |
1394f032 | 208 | . = ALIGN(4); |
de6a9520 MF |
209 | __ebss_l1 = .; |
210 | } | |
5cd82a6d MF |
211 | __data_l1_lma = LOADADDR(.data_l1); |
212 | __data_l1_len = SIZEOF(.data_l1); | |
213 | ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!") | |
de6a9520 | 214 | |
5cd82a6d | 215 | .data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len) |
1394f032 BW |
216 | { |
217 | . = ALIGN(4); | |
218 | __sdata_b_l1 = .; | |
bc6e0fa1 | 219 | *(.l1.data.B) |
1394f032 BW |
220 | __edata_b_l1 = .; |
221 | ||
222 | . = ALIGN(4); | |
223 | __sbss_b_l1 = .; | |
bc6e0fa1 | 224 | *(.l1.bss.B) |
1394f032 BW |
225 | . = ALIGN(4); |
226 | __ebss_b_l1 = .; | |
de6a9520 | 227 | } |
5cd82a6d MF |
228 | __data_b_l1_lma = LOADADDR(.data_b_l1); |
229 | __data_b_l1_len = SIZEOF(.data_b_l1); | |
230 | ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!") | |
262c3825 | 231 | |
5cd82a6d | 232 | .text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len) |
262c3825 SZ |
233 | { |
234 | . = ALIGN(4); | |
235 | __stext_l2 = .; | |
07aa7be5 | 236 | *(.l2.text) |
262c3825 SZ |
237 | . = ALIGN(4); |
238 | __etext_l2 = .; | |
239 | ||
240 | . = ALIGN(4); | |
241 | __sdata_l2 = .; | |
07aa7be5 | 242 | *(.l2.data) |
262c3825 SZ |
243 | __edata_l2 = .; |
244 | ||
245 | . = ALIGN(32); | |
246 | *(.data_l2.cacheline_aligned) | |
247 | ||
248 | . = ALIGN(4); | |
249 | __sbss_l2 = .; | |
07aa7be5 | 250 | *(.l2.bss) |
262c3825 SZ |
251 | . = ALIGN(4); |
252 | __ebss_l2 = .; | |
253 | } | |
5cd82a6d MF |
254 | __l2_lma = LOADADDR(.text_data_l2); |
255 | __l2_len = SIZEOF(.text_data_l2); | |
256 | ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!") | |
6f985294 | 257 | |
36208059 MF |
258 | /* Force trailing alignment of our init section so that when we |
259 | * free our init memory, we don't leave behind a partial page. | |
260 | */ | |
d86bfb16 | 261 | #ifdef CONFIG_RAMKERNEL |
5cd82a6d | 262 | . = __l2_lma + __l2_len; |
d86bfb16 BS |
263 | #else |
264 | . = __init_data_end; | |
265 | #endif | |
36208059 MF |
266 | . = ALIGN(PAGE_SIZE); |
267 | ___init_end = .; | |
268 | ||
b7627acc | 269 | __end =.; |
de6a9520 | 270 | |
c11b5776 MF |
271 | STABS_DEBUG |
272 | ||
273 | DWARF_DEBUG | |
274 | ||
023bf6f1 | 275 | DISCARDS |
1394f032 | 276 | } |