[linux-2.6-block.git] / arch / arm64 / kernel / process.c

/*
 * Based on arch/arm/kernel/process.c
 *
 * Original Copyright (C) 1995  Linus Torvalds
 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <stdarg.h>

#include <linux/compat.h>
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/user.h>
#include <linux/delay.h>
#include <linux/reboot.h>
#include <linux/interrupt.h>
#include <linux/kallsyms.h>
#include <linux/init.h>
#include <linux/cpu.h>
#include <linux/elfcore.h>
#include <linux/pm.h>
#include <linux/tick.h>
#include <linux/utsname.h>
#include <linux/uaccess.h>
#include <linux/random.h>
#include <linux/hw_breakpoint.h>
#include <linux/personality.h>
#include <linux/notifier.h>

#include <asm/compat.h>
#include <asm/cacheflush.h>
#include <asm/fpsimd.h>
#include <asm/mmu_context.h>
#include <asm/processor.h>
#include <asm/stacktrace.h>

#ifdef CONFIG_CC_STACKPROTECTOR
#include <linux/stackprotector.h>
unsigned long __stack_chk_guard __read_mostly;
EXPORT_SYMBOL(__stack_chk_guard);
#endif

static void setup_restart(void)
{
	/*
	 * Tell the mm system that we are going to reboot -
	 * we may need it to insert some 1:1 mappings so that
	 * soft boot works.
	 */
	setup_mm_for_reboot();

	/* Clean and invalidate caches */
	flush_cache_all();

	/* Turn D-cache off */
	cpu_cache_off();

	/* Push out any further dirty data, and ensure cache is empty */
	flush_cache_all();
}

void soft_restart(unsigned long addr)
{
	typedef void (*phys_reset_t)(unsigned long);
	phys_reset_t phys_reset;

	setup_restart();

	/* Switch to the identity mapping */
	phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
	phys_reset(addr);

	/* Should never get here */
	BUG();
}

/*
 * Function pointers to optional machine specific functions
 */
void (*pm_power_off)(void);
EXPORT_SYMBOL_GPL(pm_power_off);

void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
EXPORT_SYMBOL_GPL(arm_pm_restart);

/*
 * This is our default idle handler.
 */
void arch_cpu_idle(void)
{
	/*
	 * This should do all the clock switching and wait for interrupt
	 * tricks
	 */
	cpu_do_idle();
	local_irq_enable();
}

#ifdef CONFIG_HOTPLUG_CPU
void arch_cpu_idle_dead(void)
{
       cpu_die();
}
#endif

/*
 * Called by kexec, immediately prior to machine_kexec().
 *
 * This must completely disable all secondary CPUs; simply causing those CPUs
 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
 * kexec'd kernel to use any and all RAM as it sees fit, without having to
 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
 * functionality embodied in disable_nonboot_cpus() to achieve this.
 */
void machine_shutdown(void)
{
	disable_nonboot_cpus();
}

/*
 * Halting simply requires that the secondary CPUs stop performing any
 * activity (executing tasks, handling interrupts). smp_send_stop()
 * achieves this.
 */
void machine_halt(void)
{
	local_irq_disable();
	smp_send_stop();
	while (1);
}

/*
 * Power-off simply requires that the secondary CPUs stop performing any
 * activity (executing tasks, handling interrupts). smp_send_stop()
 * achieves this. When the system power is turned off, it will take all CPUs
 * with it.
 */
void machine_power_off(void)
{
	local_irq_disable();
	smp_send_stop();
	if (pm_power_off)
		pm_power_off();
}

/*
 * Restart requires that the secondary CPUs stop performing any activity
 * while the primary CPU resets the system. Systems with a single CPU can
 * use soft_restart() as their machine descriptor's .restart hook, since that
 * will cause the only available CPU to reset. Systems with multiple CPUs must
 * provide a HW restart implementation, to ensure that all CPUs reset at once.
 * This is required so that any code running after reset on the primary CPU
 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
 * executing pre-reset code, and using RAM that the primary CPU's code wishes
 * to use. Implementing such co-ordination would be essentially impossible.
 */
void machine_restart(char *cmd)
{
	/* Disable interrupts first */
	local_irq_disable();
	smp_send_stop();

	/* Now call the architecture specific reboot code. */
	if (arm_pm_restart)
		arm_pm_restart(reboot_mode, cmd);

	/*
	 * Whoops - the architecture was unable to reboot.
	 */
	printk("Reboot failed -- System halted\n");
	while (1);
}

void __show_regs(struct pt_regs *regs)
{
	int i, top_reg;
	u64 lr, sp;

	if (compat_user_mode(regs)) {
		lr = regs->compat_lr;
		sp = regs->compat_sp;
		top_reg = 12;
	} else {
		lr = regs->regs[30];
		sp = regs->sp;
		top_reg = 29;
	}

	show_regs_print_info(KERN_DEFAULT);
	print_symbol("PC is at %s\n", instruction_pointer(regs));
	print_symbol("LR is at %s\n", lr);
	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
	       regs->pc, lr, regs->pstate);
	printk("sp : %016llx\n", sp);
	for (i = top_reg; i >= 0; i--) {
		printk("x%-2d: %016llx ", i, regs->regs[i]);
		if (i % 2 == 0)
			printk("\n");
	}
	printk("\n");
}

void show_regs(struct pt_regs * regs)
{
	printk("\n");
	__show_regs(regs);
}

/*
 * Free current thread data structures etc..
 */
void exit_thread(void)
{
}

void flush_thread(void)
{
	fpsimd_flush_thread();
	flush_ptrace_hw_breakpoint(current);
}

void release_thread(struct task_struct *dead_task)
{
}

int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
{
	fpsimd_preserve_current_state();
	*dst = *src;
	return 0;
}

asmlinkage void ret_from_fork(void) asm("ret_from_fork");

int copy_thread(unsigned long clone_flags, unsigned long stack_start,
		unsigned long stk_sz, struct task_struct *p)
{
	struct pt_regs *childregs = task_pt_regs(p);
	unsigned long tls = p->thread.tp_value;

	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));

	if (likely(!(p->flags & PF_KTHREAD))) {
		*childregs = *current_pt_regs();
		childregs->regs[0] = 0;
		if (is_compat_thread(task_thread_info(p))) {
			if (stack_start)
				childregs->compat_sp = stack_start;
		} else {
			/*
			 * Read the current TLS pointer from tpidr_el0 as it may be
			 * out-of-sync with the saved value.
			 */
			asm("mrs %0, tpidr_el0" : "=r" (tls));
			if (stack_start) {
				/* 16-byte aligned stack mandatory on AArch64 */
				if (stack_start & 15)
					return -EINVAL;
				childregs->sp = stack_start;
			}
		}
		/*
		 * If a TLS pointer was passed to clone (4th argument), use it
		 * for the new thread.
		 */
		if (clone_flags & CLONE_SETTLS)
			tls = childregs->regs[3];
	} else {
		memset(childregs, 0, sizeof(struct pt_regs));
		childregs->pstate = PSR_MODE_EL1h;
		p->thread.cpu_context.x19 = stack_start;
		p->thread.cpu_context.x20 = stk_sz;
	}
	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
	p->thread.cpu_context.sp = (unsigned long)childregs;
	p->thread.tp_value = tls;

	ptrace_hw_copy_thread(p);

	return 0;
}

static void tls_thread_switch(struct task_struct *next)
{
	unsigned long tpidr, tpidrro;

	if (!is_compat_task()) {
		asm("mrs %0, tpidr_el0" : "=r" (tpidr));
		current->thread.tp_value = tpidr;
	}

	if (is_compat_thread(task_thread_info(next))) {
		tpidr = 0;
		tpidrro = next->thread.tp_value;
	} else {
		tpidr = next->thread.tp_value;
		tpidrro = 0;
	}

	asm(
	"	msr	tpidr_el0, %0\n"
	"	msr	tpidrro_el0, %1"
	: : "r" (tpidr), "r" (tpidrro));
}

/*
 * Thread switching.
 */
struct task_struct *__switch_to(struct task_struct *prev,
				struct task_struct *next)
{
	struct task_struct *last;

	fpsimd_thread_switch(next);
	tls_thread_switch(next);
	hw_breakpoint_thread_switch(next);
	contextidr_thread_switch(next);

	/*
	 * Complete any pending TLB or cache maintenance on this CPU in case
	 * the thread migrates to a different CPU.
	 */
	dsb(ish);

	/* the actual thread switch */
	last = cpu_switch_to(prev, next);

	return last;
}

unsigned long get_wchan(struct task_struct *p)
{
	struct stackframe frame;
	unsigned long stack_page;
	int count = 0;
	if (!p || p == current || p->state == TASK_RUNNING)
		return 0;

	frame.fp = thread_saved_fp(p);
	frame.sp = thread_saved_sp(p);
	frame.pc = thread_saved_pc(p);
	stack_page = (unsigned long)task_stack_page(p);
	do {
		if (frame.sp < stack_page ||
		    frame.sp >= stack_page + THREAD_SIZE ||
		    unwind_frame(&frame))
			return 0;
		if (!in_sched_functions(frame.pc))
			return frame.pc;
	} while (count ++ < 16);
	return 0;
}

unsigned long arch_align_stack(unsigned long sp)
{
	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
		sp -= get_random_int() & ~PAGE_MASK;
	return sp & ~0xf;
}

static unsigned long randomize_base(unsigned long base)
{
	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
	return randomize_range(base, range_end, 0) ? : base;
}

unsigned long arch_randomize_brk(struct mm_struct *mm)
{
	return randomize_base(mm->brk);
}

unsigned long randomize_et_dyn(unsigned long base)
{
	return randomize_base(base);
}
Commit	Line	Data
b3901d54 CM	1	/*
	2	* Based on arch/arm/kernel/process.c
	3	*
	4	* Original Copyright (C) 1995 Linus Torvalds
	5	* Copyright (C) 1996-2000 Russell King - Converted to ARM.
	6	* Copyright (C) 2012 ARM Ltd.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <stdarg.h>
	22
fd92d4a5	23	#include <linux/compat.h>
b3901d54 CM	24	#include <linux/export.h>
	25	#include <linux/sched.h>
	26	#include <linux/kernel.h>
	27	#include <linux/mm.h>
	28	#include <linux/stddef.h>
	29	#include <linux/unistd.h>
	30	#include <linux/user.h>
	31	#include <linux/delay.h>
	32	#include <linux/reboot.h>
	33	#include <linux/interrupt.h>
	34	#include <linux/kallsyms.h>
	35	#include <linux/init.h>
	36	#include <linux/cpu.h>
	37	#include <linux/elfcore.h>
	38	#include <linux/pm.h>
	39	#include <linux/tick.h>
	40	#include <linux/utsname.h>
	41	#include <linux/uaccess.h>
	42	#include <linux/random.h>
	43	#include <linux/hw_breakpoint.h>
	44	#include <linux/personality.h>
	45	#include <linux/notifier.h>
	46
	47	#include <asm/compat.h>
	48	#include <asm/cacheflush.h>
ec45d1cf WD	49	#include <asm/fpsimd.h>
ec45d1cf WD	50	#include <asm/mmu_context.h>
b3901d54 CM	51	#include <asm/processor.h>
b3901d54 CM	52	#include <asm/stacktrace.h>
b3901d54	53
c0c264ae LA	54	#ifdef CONFIG_CC_STACKPROTECTOR
	55	#include <linux/stackprotector.h>
	56	unsigned long __stack_chk_guard __read_mostly;
	57	EXPORT_SYMBOL(__stack_chk_guard);
	58	#endif
	59
b3901d54 CM	60	static void setup_restart(void)
	61	{
	62	/*
	63	* Tell the mm system that we are going to reboot -
	64	* we may need it to insert some 1:1 mappings so that
	65	* soft boot works.
	66	*/
	67	setup_mm_for_reboot();
	68
	69	/* Clean and invalidate caches */
	70	flush_cache_all();
	71
	72	/* Turn D-cache off */
	73	cpu_cache_off();
	74
	75	/* Push out any further dirty data, and ensure cache is empty */
	76	flush_cache_all();
	77	}
	78
	79	void soft_restart(unsigned long addr)
	80	{
09024aa6 GL	81	typedef void (*phys_reset_t)(unsigned long);
	82	phys_reset_t phys_reset;
	83
b3901d54	84	setup_restart();
09024aa6 GL	85
	86	/* Switch to the identity mapping */
	87	phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
	88	phys_reset(addr);
	89
	90	/* Should never get here */
	91	BUG();
b3901d54 CM	92	}
	93
	94	/*
	95	* Function pointers to optional machine specific functions
	96	*/
	97	void (*pm_power_off)(void);
	98	EXPORT_SYMBOL_GPL(pm_power_off);
	99
b0946fc8	100	void (arm_pm_restart)(enum reboot_mode reboot_mode, const char cmd);
aa1e8ec1	101	EXPORT_SYMBOL_GPL(arm_pm_restart);
b3901d54	102
b3901d54 CM	103	/*
	104	* This is our default idle handler.
	105	*/
0087298f	106	void arch_cpu_idle(void)
b3901d54 CM	107	{
	108	/*
	109	* This should do all the clock switching and wait for interrupt
	110	* tricks
	111	*/
6990566b NP	112	cpu_do_idle();
6990566b NP	113	local_irq_enable();
b3901d54 CM	114	}
b3901d54 CM	115
9327e2c6 MR	116	#ifdef CONFIG_HOTPLUG_CPU
	117	void arch_cpu_idle_dead(void)
	118	{
	119	cpu_die();
	120	}
	121	#endif
	122
90f51a09 AK	123	/*
	124	* Called by kexec, immediately prior to machine_kexec().
	125	*
	126	* This must completely disable all secondary CPUs; simply causing those CPUs
	127	* to execute e.g. a RAM-based pin loop is not sufficient. This allows the
	128	* kexec'd kernel to use any and all RAM as it sees fit, without having to
	129	* avoid any code or data used by any SW CPU pin loop. The CPU hotplug
	130	* functionality embodied in disable_nonboot_cpus() to achieve this.
	131	*/
b3901d54 CM	132	void machine_shutdown(void)
b3901d54 CM	133	{
90f51a09	134	disable_nonboot_cpus();
b3901d54 CM	135	}
b3901d54 CM	136
90f51a09 AK	137	/*
	138	* Halting simply requires that the secondary CPUs stop performing any
	139	* activity (executing tasks, handling interrupts). smp_send_stop()
	140	* achieves this.
	141	*/
b3901d54 CM	142	void machine_halt(void)
b3901d54 CM	143	{
b9acc49e	144	local_irq_disable();
90f51a09	145	smp_send_stop();
b3901d54 CM	146	while (1);
	147	}
	148
90f51a09 AK	149	/*
	150	* Power-off simply requires that the secondary CPUs stop performing any
	151	* activity (executing tasks, handling interrupts). smp_send_stop()
	152	* achieves this. When the system power is turned off, it will take all CPUs
	153	* with it.
	154	*/
b3901d54 CM	155	void machine_power_off(void)
b3901d54 CM	156	{
b9acc49e	157	local_irq_disable();
90f51a09	158	smp_send_stop();
b3901d54 CM	159	if (pm_power_off)
	160	pm_power_off();
	161	}
	162
90f51a09 AK	163	/*
	164	* Restart requires that the secondary CPUs stop performing any activity
	165	* while the primary CPU resets the system. Systems with a single CPU can
	166	* use soft_restart() as their machine descriptor's .restart hook, since that
	167	* will cause the only available CPU to reset. Systems with multiple CPUs must
	168	* provide a HW restart implementation, to ensure that all CPUs reset at once.
	169	* This is required so that any code running after reset on the primary CPU
	170	* doesn't have to co-ordinate with other CPUs to ensure they aren't still
	171	* executing pre-reset code, and using RAM that the primary CPU's code wishes
	172	* to use. Implementing such co-ordination would be essentially impossible.
	173	*/
b3901d54 CM	174	void machine_restart(char *cmd)
b3901d54 CM	175	{
b3901d54 CM	176	/* Disable interrupts first */
b3901d54 CM	177	local_irq_disable();
b9acc49e	178	smp_send_stop();
b3901d54 CM	179
b3901d54 CM	180	/* Now call the architecture specific reboot code. */
aa1e8ec1	181	if (arm_pm_restart)
ff701306	182	arm_pm_restart(reboot_mode, cmd);
b3901d54 CM	183
	184	/*
	185	* Whoops - the architecture was unable to reboot.
	186	*/
	187	printk("Reboot failed -- System halted\n");
	188	while (1);
	189	}
	190
	191	void __show_regs(struct pt_regs *regs)
	192	{
6ca68e80 CM	193	int i, top_reg;
	194	u64 lr, sp;
	195
	196	if (compat_user_mode(regs)) {
	197	lr = regs->compat_lr;
	198	sp = regs->compat_sp;
	199	top_reg = 12;
	200	} else {
	201	lr = regs->regs[30];
	202	sp = regs->sp;
	203	top_reg = 29;
	204	}
b3901d54	205
a43cb95d	206	show_regs_print_info(KERN_DEFAULT);
b3901d54	207	print_symbol("PC is at %s\n", instruction_pointer(regs));
6ca68e80	208	print_symbol("LR is at %s\n", lr);
b3901d54	209	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
6ca68e80 CM	210	regs->pc, lr, regs->pstate);
	211	printk("sp : %016llx\n", sp);
	212	for (i = top_reg; i >= 0; i--) {
b3901d54 CM	213	printk("x%-2d: %016llx ", i, regs->regs[i]);
	214	if (i % 2 == 0)
	215	printk("\n");
	216	}
	217	printk("\n");
	218	}
	219
	220	void show_regs(struct pt_regs * regs)
	221	{
	222	printk("\n");
b3901d54 CM	223	__show_regs(regs);
	224	}
	225
	226	/*
	227	* Free current thread data structures etc..
	228	*/
	229	void exit_thread(void)
	230	{
	231	}
	232
	233	void flush_thread(void)
	234	{
	235	fpsimd_flush_thread();
	236	flush_ptrace_hw_breakpoint(current);
	237	}
	238
	239	void release_thread(struct task_struct *dead_task)
	240	{
	241	}
	242
	243	int arch_dup_task_struct(struct task_struct dst, struct task_struct src)
	244	{
c51f9269	245	fpsimd_preserve_current_state();
b3901d54 CM	246	dst = src;
	247	return 0;
	248	}
	249
	250	asmlinkage void ret_from_fork(void) asm("ret_from_fork");
	251
	252	int copy_thread(unsigned long clone_flags, unsigned long stack_start,
afa86fc4	253	unsigned long stk_sz, struct task_struct *p)
b3901d54 CM	254	{
	255	struct pt_regs *childregs = task_pt_regs(p);
	256	unsigned long tls = p->thread.tp_value;
	257
c34501d2	258	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
b3901d54	259
9ac08002 AV	260	if (likely(!(p->flags & PF_KTHREAD))) {
9ac08002 AV	261	childregs = current_pt_regs();
c34501d2 CM	262	childregs->regs[0] = 0;
c34501d2 CM	263	if (is_compat_thread(task_thread_info(p))) {
e0fd18ce AV	264	if (stack_start)
e0fd18ce AV	265	childregs->compat_sp = stack_start;
c34501d2 CM	266	} else {
	267	/*
	268	* Read the current TLS pointer from tpidr_el0 as it may be
	269	* out-of-sync with the saved value.
	270	*/
	271	asm("mrs %0, tpidr_el0" : "=r" (tls));
e0fd18ce AV	272	if (stack_start) {
	273	/* 16-byte aligned stack mandatory on AArch64 */
	274	if (stack_start & 15)
	275	return -EINVAL;
	276	childregs->sp = stack_start;
	277	}
c34501d2	278	}
b3901d54	279	/*
c34501d2 CM	280	* If a TLS pointer was passed to clone (4th argument), use it
c34501d2 CM	281	* for the new thread.
b3901d54	282	*/
c34501d2	283	if (clone_flags & CLONE_SETTLS)
9ac08002	284	tls = childregs->regs[3];
c34501d2 CM	285	} else {
	286	memset(childregs, 0, sizeof(struct pt_regs));
	287	childregs->pstate = PSR_MODE_EL1h;
	288	p->thread.cpu_context.x19 = stack_start;
	289	p->thread.cpu_context.x20 = stk_sz;
b3901d54	290	}
b3901d54	291	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
c34501d2	292	p->thread.cpu_context.sp = (unsigned long)childregs;
b3901d54 CM	293	p->thread.tp_value = tls;
	294
	295	ptrace_hw_copy_thread(p);
	296
	297	return 0;
	298	}
	299
	300	static void tls_thread_switch(struct task_struct *next)
	301	{
	302	unsigned long tpidr, tpidrro;
	303
	304	if (!is_compat_task()) {
	305	asm("mrs %0, tpidr_el0" : "=r" (tpidr));
	306	current->thread.tp_value = tpidr;
	307	}
	308
	309	if (is_compat_thread(task_thread_info(next))) {
	310	tpidr = 0;
	311	tpidrro = next->thread.tp_value;
	312	} else {
	313	tpidr = next->thread.tp_value;
	314	tpidrro = 0;
	315	}
	316
	317	asm(
	318	" msr tpidr_el0, %0\n"
	319	" msr tpidrro_el0, %1"
	320	: : "r" (tpidr), "r" (tpidrro));
	321	}
	322
	323	/*
	324	* Thread switching.
	325	*/
	326	struct task_struct __switch_to(struct task_struct prev,
	327	struct task_struct *next)
	328	{
	329	struct task_struct *last;
	330
	331	fpsimd_thread_switch(next);
	332	tls_thread_switch(next);
	333	hw_breakpoint_thread_switch(next);
3325732f	334	contextidr_thread_switch(next);
b3901d54	335
5108c67c CM	336	/*
	337	* Complete any pending TLB or cache maintenance on this CPU in case
	338	* the thread migrates to a different CPU.
	339	*/
98f7685e	340	dsb(ish);
b3901d54 CM	341
	342	/* the actual thread switch */
	343	last = cpu_switch_to(prev, next);
	344
	345	return last;
	346	}
	347
b3901d54 CM	348	unsigned long get_wchan(struct task_struct *p)
	349	{
	350	struct stackframe frame;
408c3658	351	unsigned long stack_page;
b3901d54 CM	352	int count = 0;
	353	if (!p \|\| p == current \|\| p->state == TASK_RUNNING)
	354	return 0;
	355
	356	frame.fp = thread_saved_fp(p);
	357	frame.sp = thread_saved_sp(p);
	358	frame.pc = thread_saved_pc(p);
408c3658	359	stack_page = (unsigned long)task_stack_page(p);
b3901d54	360	do {
408c3658 KK	361	if (frame.sp < stack_page \|\|
	362	frame.sp >= stack_page + THREAD_SIZE \|\|
	363	unwind_frame(&frame))
b3901d54 CM	364	return 0;
	365	if (!in_sched_functions(frame.pc))
	366	return frame.pc;
	367	} while (count ++ < 16);
	368	return 0;
	369	}
	370
	371	unsigned long arch_align_stack(unsigned long sp)
	372	{
	373	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
	374	sp -= get_random_int() & ~PAGE_MASK;
	375	return sp & ~0xf;
	376	}
	377
	378	static unsigned long randomize_base(unsigned long base)
	379	{
	380	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
	381	return randomize_range(base, range_end, 0) ? : base;
	382	}
	383
	384	unsigned long arch_randomize_brk(struct mm_struct *mm)
	385	{
	386	return randomize_base(mm->brk);
	387	}
	388
	389	unsigned long randomize_et_dyn(unsigned long base)
	390	{
	391	return randomize_base(base);
	392	}