arm64: Handle el1 synchronous instruction aborts cleanly
[linux-2.6-block.git] / arch / arm64 / kernel / hyp-stub.S
CommitLineData
712c6ff4
MZ
1/*
2 * Hypervisor stub
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/init.h>
21#include <linux/linkage.h>
021f6537 22#include <linux/irqchip/arm-gic-v3.h>
712c6ff4
MZ
23
24#include <asm/assembler.h>
ad72e59f 25#include <asm/kvm_arm.h>
c94b0cf2 26#include <asm/kvm_asm.h>
712c6ff4
MZ
27#include <asm/ptrace.h>
28#include <asm/virt.h>
29
30 .text
31 .align 11
32
33ENTRY(__hyp_stub_vectors)
34 ventry el2_sync_invalid // Synchronous EL2t
35 ventry el2_irq_invalid // IRQ EL2t
36 ventry el2_fiq_invalid // FIQ EL2t
37 ventry el2_error_invalid // Error EL2t
38
39 ventry el2_sync_invalid // Synchronous EL2h
40 ventry el2_irq_invalid // IRQ EL2h
41 ventry el2_fiq_invalid // FIQ EL2h
42 ventry el2_error_invalid // Error EL2h
43
44 ventry el1_sync // Synchronous 64-bit EL1
45 ventry el1_irq_invalid // IRQ 64-bit EL1
46 ventry el1_fiq_invalid // FIQ 64-bit EL1
47 ventry el1_error_invalid // Error 64-bit EL1
48
49 ventry el1_sync_invalid // Synchronous 32-bit EL1
50 ventry el1_irq_invalid // IRQ 32-bit EL1
51 ventry el1_fiq_invalid // FIQ 32-bit EL1
52 ventry el1_error_invalid // Error 32-bit EL1
53ENDPROC(__hyp_stub_vectors)
54
55 .align 11
56
57el1_sync:
ad72e59f
GL
58 mrs x30, esr_el2
59 lsr x30, x30, #ESR_ELx_EC_SHIFT
60
61 cmp x30, #ESR_ELx_EC_HVC64
62 b.ne 9f // Not an HVC trap
63
64 cmp x0, #HVC_GET_VECTORS
65 b.ne 1f
66 mrs x0, vbar_el2
67 b 9f
68
691: cmp x0, #HVC_SET_VECTORS
70 b.ne 2f
71 msr vbar_el2, x1
72 b 9f
73
f9076ecf
GL
742: cmp x0, #HVC_SOFT_RESTART
75 b.ne 3f
76 mov x0, x2
77 mov x2, x4
78 mov x4, x1
79 mov x1, x3
80 br x4 // no return
81
c94b0cf2 82 /* Someone called kvm_call_hyp() against the hyp-stub... */
f9076ecf 833: mov x0, #ARM_EXCEPTION_HYP_GONE
ad72e59f
GL
84
859: eret
712c6ff4
MZ
86ENDPROC(el1_sync)
87
88.macro invalid_vector label
89\label:
90 b \label
91ENDPROC(\label)
92.endm
93
94 invalid_vector el2_sync_invalid
95 invalid_vector el2_irq_invalid
96 invalid_vector el2_fiq_invalid
97 invalid_vector el2_error_invalid
98 invalid_vector el1_sync_invalid
99 invalid_vector el1_irq_invalid
100 invalid_vector el1_fiq_invalid
101 invalid_vector el1_error_invalid
102
103/*
104 * __hyp_set_vectors: Call this after boot to set the initial hypervisor
105 * vectors as part of hypervisor installation. On an SMP system, this should
106 * be called on each CPU.
107 *
108 * x0 must be the physical address of the new vector table, and must be
109 * 2KB aligned.
110 *
111 * Before calling this, you must check that the stub hypervisor is installed
112 * everywhere, by waiting for any secondary CPUs to be brought up and then
113 * checking that is_hyp_mode_available() is true.
114 *
115 * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or
116 * something else went wrong... in such cases, trying to install a new
117 * hypervisor is unlikely to work as desired.
118 *
119 * When you call into your shiny new hypervisor, sp_el2 will contain junk,
120 * so you will need to set that to something sensible at the new hypervisor's
121 * initialisation entry point.
122 */
123
124ENTRY(__hyp_get_vectors)
00a44cda 125 str lr, [sp, #-16]!
ad72e59f 126 mov x0, #HVC_GET_VECTORS
712c6ff4 127 hvc #0
00a44cda 128 ldr lr, [sp], #16
712c6ff4
MZ
129 ret
130ENDPROC(__hyp_get_vectors)
00a44cda
JM
131
132ENTRY(__hyp_set_vectors)
133 str lr, [sp, #-16]!
ad72e59f
GL
134 mov x1, x0
135 mov x0, #HVC_SET_VECTORS
00a44cda
JM
136 hvc #0
137 ldr lr, [sp], #16
138 ret
712c6ff4 139ENDPROC(__hyp_set_vectors)