Commit | Line | Data |
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f37a7767 YS |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
e18a31a7 | 3 | * Device Tree Source for the R-Car E3 (R8A77990) SoC |
f37a7767 YS |
4 | * |
5 | * Copyright (C) 2018 Renesas Electronics Corp. | |
6 | */ | |
7 | ||
83e7d2ec | 8 | #include <dt-bindings/clock/r8a77990-cpg-mssr.h> |
f37a7767 | 9 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
55697cbb | 10 | #include <dt-bindings/power/r8a77990-sysc.h> |
f37a7767 YS |
11 | |
12 | / { | |
13 | compatible = "renesas,r8a77990"; | |
14 | #address-cells = <2>; | |
15 | #size-cells = <2>; | |
16 | ||
bc011dfa TK |
17 | aliases { |
18 | i2c0 = &i2c0; | |
19 | i2c1 = &i2c1; | |
20 | i2c2 = &i2c2; | |
21 | i2c3 = &i2c3; | |
22 | i2c4 = &i2c4; | |
23 | i2c5 = &i2c5; | |
24 | i2c6 = &i2c6; | |
25 | i2c7 = &i2c7; | |
26 | }; | |
27 | ||
3b46fa57 YK |
28 | /* |
29 | * The external audio clocks are configured as 0 Hz fixed frequency | |
30 | * clocks by default. | |
31 | * Boards that provide audio clocks should override them. | |
32 | */ | |
33 | audio_clk_a: audio_clk_a { | |
34 | compatible = "fixed-clock"; | |
35 | #clock-cells = <0>; | |
36 | clock-frequency = <0>; | |
37 | }; | |
38 | ||
39 | audio_clk_b: audio_clk_b { | |
40 | compatible = "fixed-clock"; | |
41 | #clock-cells = <0>; | |
42 | clock-frequency = <0>; | |
43 | }; | |
44 | ||
45 | audio_clk_c: audio_clk_c { | |
46 | compatible = "fixed-clock"; | |
47 | #clock-cells = <0>; | |
48 | clock-frequency = <0>; | |
49 | }; | |
50 | ||
327d1f32 MV |
51 | /* External CAN clock - to be overridden by boards that provide it */ |
52 | can_clk: can { | |
53 | compatible = "fixed-clock"; | |
54 | #clock-cells = <0>; | |
55 | clock-frequency = <0>; | |
56 | }; | |
57 | ||
f37a7767 YS |
58 | cpus { |
59 | #address-cells = <1>; | |
60 | #size-cells = <0>; | |
61 | ||
f37a7767 YS |
62 | a53_0: cpu@0 { |
63 | compatible = "arm,cortex-a53", "arm,armv8"; | |
7085f5d9 | 64 | reg = <0>; |
f37a7767 | 65 | device_type = "cpu"; |
83e7d2ec | 66 | power-domains = <&sysc R8A77990_PD_CA53_CPU0>; |
f37a7767 YS |
67 | next-level-cache = <&L2_CA53>; |
68 | enable-method = "psci"; | |
69 | }; | |
70 | ||
7085f5d9 GU |
71 | a53_1: cpu@1 { |
72 | compatible = "arm,cortex-a53", "arm,armv8"; | |
73 | reg = <1>; | |
74 | device_type = "cpu"; | |
83e7d2ec | 75 | power-domains = <&sysc R8A77990_PD_CA53_CPU1>; |
7085f5d9 GU |
76 | next-level-cache = <&L2_CA53>; |
77 | enable-method = "psci"; | |
78 | }; | |
79 | ||
de1eb23c | 80 | L2_CA53: cache-controller-0 { |
f37a7767 | 81 | compatible = "cache"; |
83e7d2ec | 82 | power-domains = <&sysc R8A77990_PD_CA53_SCU>; |
f37a7767 YS |
83 | cache-unified; |
84 | cache-level = <2>; | |
85 | }; | |
86 | }; | |
87 | ||
88 | extal_clk: extal { | |
89 | compatible = "fixed-clock"; | |
90 | #clock-cells = <0>; | |
91 | /* This value must be overridden by the board */ | |
92 | clock-frequency = <0>; | |
93 | }; | |
94 | ||
ba3ac35b TK |
95 | /* External PCIe clock - can be overridden by the board */ |
96 | pcie_bus_clk: pcie_bus { | |
97 | compatible = "fixed-clock"; | |
98 | #clock-cells = <0>; | |
99 | clock-frequency = <0>; | |
100 | }; | |
101 | ||
f37a7767 YS |
102 | pmu_a53 { |
103 | compatible = "arm,cortex-a53-pmu"; | |
7085f5d9 GU |
104 | interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, |
105 | <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
106 | interrupt-affinity = <&a53_0>, <&a53_1>; | |
f37a7767 YS |
107 | }; |
108 | ||
109 | psci { | |
bc26b8f4 | 110 | compatible = "arm,psci-1.0", "arm,psci-0.2"; |
f37a7767 YS |
111 | method = "smc"; |
112 | }; | |
113 | ||
103db9b5 TK |
114 | /* External SCIF clock - to be overridden by boards that provide it */ |
115 | scif_clk: scif { | |
116 | compatible = "fixed-clock"; | |
117 | #clock-cells = <0>; | |
118 | clock-frequency = <0>; | |
119 | }; | |
120 | ||
f37a7767 YS |
121 | soc: soc { |
122 | compatible = "simple-bus"; | |
123 | interrupt-parent = <&gic>; | |
124 | #address-cells = <2>; | |
125 | #size-cells = <2>; | |
126 | ranges; | |
127 | ||
eb614d94 TK |
128 | rwdt: watchdog@e6020000 { |
129 | compatible = "renesas,r8a77990-wdt", | |
130 | "renesas,rcar-gen3-wdt"; | |
131 | reg = <0 0xe6020000 0 0x0c>; | |
132 | clocks = <&cpg CPG_MOD 402>; | |
83e7d2ec | 133 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
eb614d94 TK |
134 | resets = <&cpg 402>; |
135 | status = "disabled"; | |
136 | }; | |
137 | ||
0d292de1 YS |
138 | gpio0: gpio@e6050000 { |
139 | compatible = "renesas,gpio-r8a77990", | |
140 | "renesas,rcar-gen3-gpio"; | |
141 | reg = <0 0xe6050000 0 0x50>; | |
142 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
143 | #gpio-cells = <2>; | |
144 | gpio-controller; | |
145 | gpio-ranges = <&pfc 0 0 18>; | |
146 | #interrupt-cells = <2>; | |
147 | interrupt-controller; | |
148 | clocks = <&cpg CPG_MOD 912>; | |
83e7d2ec | 149 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
150 | resets = <&cpg 912>; |
151 | }; | |
152 | ||
153 | gpio1: gpio@e6051000 { | |
154 | compatible = "renesas,gpio-r8a77990", | |
155 | "renesas,rcar-gen3-gpio"; | |
156 | reg = <0 0xe6051000 0 0x50>; | |
157 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
158 | #gpio-cells = <2>; | |
159 | gpio-controller; | |
160 | gpio-ranges = <&pfc 0 32 23>; | |
161 | #interrupt-cells = <2>; | |
162 | interrupt-controller; | |
163 | clocks = <&cpg CPG_MOD 911>; | |
83e7d2ec | 164 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
165 | resets = <&cpg 911>; |
166 | }; | |
167 | ||
168 | gpio2: gpio@e6052000 { | |
169 | compatible = "renesas,gpio-r8a77990", | |
170 | "renesas,rcar-gen3-gpio"; | |
171 | reg = <0 0xe6052000 0 0x50>; | |
172 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
173 | #gpio-cells = <2>; | |
174 | gpio-controller; | |
175 | gpio-ranges = <&pfc 0 64 26>; | |
176 | #interrupt-cells = <2>; | |
177 | interrupt-controller; | |
178 | clocks = <&cpg CPG_MOD 910>; | |
83e7d2ec | 179 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
180 | resets = <&cpg 910>; |
181 | }; | |
182 | ||
183 | gpio3: gpio@e6053000 { | |
184 | compatible = "renesas,gpio-r8a77990", | |
185 | "renesas,rcar-gen3-gpio"; | |
186 | reg = <0 0xe6053000 0 0x50>; | |
187 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
188 | #gpio-cells = <2>; | |
189 | gpio-controller; | |
190 | gpio-ranges = <&pfc 0 96 16>; | |
191 | #interrupt-cells = <2>; | |
192 | interrupt-controller; | |
193 | clocks = <&cpg CPG_MOD 909>; | |
83e7d2ec | 194 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
195 | resets = <&cpg 909>; |
196 | }; | |
197 | ||
198 | gpio4: gpio@e6054000 { | |
199 | compatible = "renesas,gpio-r8a77990", | |
200 | "renesas,rcar-gen3-gpio"; | |
201 | reg = <0 0xe6054000 0 0x50>; | |
202 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
203 | #gpio-cells = <2>; | |
204 | gpio-controller; | |
205 | gpio-ranges = <&pfc 0 128 11>; | |
206 | #interrupt-cells = <2>; | |
207 | interrupt-controller; | |
208 | clocks = <&cpg CPG_MOD 908>; | |
83e7d2ec | 209 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
210 | resets = <&cpg 908>; |
211 | }; | |
212 | ||
213 | gpio5: gpio@e6055000 { | |
214 | compatible = "renesas,gpio-r8a77990", | |
215 | "renesas,rcar-gen3-gpio"; | |
216 | reg = <0 0xe6055000 0 0x50>; | |
217 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
218 | #gpio-cells = <2>; | |
219 | gpio-controller; | |
220 | gpio-ranges = <&pfc 0 160 20>; | |
221 | #interrupt-cells = <2>; | |
222 | interrupt-controller; | |
223 | clocks = <&cpg CPG_MOD 907>; | |
83e7d2ec | 224 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
225 | resets = <&cpg 907>; |
226 | }; | |
227 | ||
228 | gpio6: gpio@e6055400 { | |
229 | compatible = "renesas,gpio-r8a77990", | |
230 | "renesas,rcar-gen3-gpio"; | |
231 | reg = <0 0xe6055400 0 0x50>; | |
232 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
233 | #gpio-cells = <2>; | |
234 | gpio-controller; | |
235 | gpio-ranges = <&pfc 0 192 18>; | |
236 | #interrupt-cells = <2>; | |
237 | interrupt-controller; | |
238 | clocks = <&cpg CPG_MOD 906>; | |
83e7d2ec | 239 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
0d292de1 YS |
240 | resets = <&cpg 906>; |
241 | }; | |
242 | ||
bc011dfa TK |
243 | i2c0: i2c@e6500000 { |
244 | #address-cells = <1>; | |
245 | #size-cells = <0>; | |
246 | compatible = "renesas,i2c-r8a77990", | |
247 | "renesas,rcar-gen3-i2c"; | |
248 | reg = <0 0xe6500000 0 0x40>; | |
249 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
250 | clocks = <&cpg CPG_MOD 931>; | |
251 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
252 | resets = <&cpg 931>; | |
8fbe048b TK |
253 | dmas = <&dmac1 0x91>, <&dmac1 0x90>, |
254 | <&dmac2 0x91>, <&dmac2 0x90>; | |
255 | dma-names = "tx", "rx", "tx", "rx"; | |
bc011dfa TK |
256 | i2c-scl-internal-delay-ns = <110>; |
257 | status = "disabled"; | |
258 | }; | |
259 | ||
260 | i2c1: i2c@e6508000 { | |
261 | #address-cells = <1>; | |
262 | #size-cells = <0>; | |
263 | compatible = "renesas,i2c-r8a77990", | |
264 | "renesas,rcar-gen3-i2c"; | |
265 | reg = <0 0xe6508000 0 0x40>; | |
266 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
267 | clocks = <&cpg CPG_MOD 930>; | |
268 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
269 | resets = <&cpg 930>; | |
8fbe048b TK |
270 | dmas = <&dmac1 0x93>, <&dmac1 0x92>, |
271 | <&dmac2 0x93>, <&dmac2 0x92>; | |
272 | dma-names = "tx", "rx", "tx", "rx"; | |
bc011dfa TK |
273 | i2c-scl-internal-delay-ns = <6>; |
274 | status = "disabled"; | |
275 | }; | |
276 | ||
277 | i2c2: i2c@e6510000 { | |
278 | #address-cells = <1>; | |
279 | #size-cells = <0>; | |
280 | compatible = "renesas,i2c-r8a77990", | |
281 | "renesas,rcar-gen3-i2c"; | |
282 | reg = <0 0xe6510000 0 0x40>; | |
283 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
284 | clocks = <&cpg CPG_MOD 929>; | |
285 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
286 | resets = <&cpg 929>; | |
8fbe048b TK |
287 | dmas = <&dmac1 0x95>, <&dmac1 0x94>, |
288 | <&dmac2 0x95>, <&dmac2 0x94>; | |
289 | dma-names = "tx", "rx", "tx", "rx"; | |
bc011dfa TK |
290 | i2c-scl-internal-delay-ns = <6>; |
291 | status = "disabled"; | |
292 | }; | |
293 | ||
294 | i2c3: i2c@e66d0000 { | |
295 | #address-cells = <1>; | |
296 | #size-cells = <0>; | |
297 | compatible = "renesas,i2c-r8a77990", | |
298 | "renesas,rcar-gen3-i2c"; | |
299 | reg = <0 0xe66d0000 0 0x40>; | |
300 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
301 | clocks = <&cpg CPG_MOD 928>; | |
302 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
303 | resets = <&cpg 928>; | |
8fbe048b TK |
304 | dmas = <&dmac0 0x97>, <&dmac0 0x96>; |
305 | dma-names = "tx", "rx"; | |
bc011dfa TK |
306 | i2c-scl-internal-delay-ns = <110>; |
307 | status = "disabled"; | |
308 | }; | |
309 | ||
310 | i2c4: i2c@e66d8000 { | |
311 | #address-cells = <1>; | |
312 | #size-cells = <0>; | |
313 | compatible = "renesas,i2c-r8a77990", | |
314 | "renesas,rcar-gen3-i2c"; | |
315 | reg = <0 0xe66d8000 0 0x40>; | |
316 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
317 | clocks = <&cpg CPG_MOD 927>; | |
318 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
319 | resets = <&cpg 927>; | |
8fbe048b TK |
320 | dmas = <&dmac0 0x99>, <&dmac0 0x98>; |
321 | dma-names = "tx", "rx"; | |
bc011dfa TK |
322 | i2c-scl-internal-delay-ns = <6>; |
323 | status = "disabled"; | |
324 | }; | |
325 | ||
326 | i2c5: i2c@e66e0000 { | |
327 | #address-cells = <1>; | |
328 | #size-cells = <0>; | |
329 | compatible = "renesas,i2c-r8a77990", | |
330 | "renesas,rcar-gen3-i2c"; | |
331 | reg = <0 0xe66e0000 0 0x40>; | |
332 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
333 | clocks = <&cpg CPG_MOD 919>; | |
334 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
335 | resets = <&cpg 919>; | |
8fbe048b TK |
336 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; |
337 | dma-names = "tx", "rx"; | |
bc011dfa TK |
338 | i2c-scl-internal-delay-ns = <6>; |
339 | status = "disabled"; | |
340 | }; | |
341 | ||
342 | i2c6: i2c@e66e8000 { | |
343 | #address-cells = <1>; | |
344 | #size-cells = <0>; | |
345 | compatible = "renesas,i2c-r8a77990", | |
346 | "renesas,rcar-gen3-i2c"; | |
347 | reg = <0 0xe66e8000 0 0x40>; | |
348 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
349 | clocks = <&cpg CPG_MOD 918>; | |
350 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
351 | resets = <&cpg 918>; | |
8fbe048b TK |
352 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; |
353 | dma-names = "tx", "rx"; | |
bc011dfa TK |
354 | i2c-scl-internal-delay-ns = <6>; |
355 | status = "disabled"; | |
356 | }; | |
357 | ||
358 | i2c7: i2c@e6690000 { | |
359 | #address-cells = <1>; | |
360 | #size-cells = <0>; | |
361 | compatible = "renesas,i2c-r8a77990", | |
362 | "renesas,rcar-gen3-i2c"; | |
363 | reg = <0 0xe6690000 0 0x40>; | |
364 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | |
365 | clocks = <&cpg CPG_MOD 1003>; | |
366 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
367 | resets = <&cpg 1003>; | |
368 | i2c-scl-internal-delay-ns = <6>; | |
369 | status = "disabled"; | |
370 | }; | |
371 | ||
4ab0df33 YS |
372 | pfc: pin-controller@e6060000 { |
373 | compatible = "renesas,pfc-r8a77990"; | |
374 | reg = <0 0xe6060000 0 0x508>; | |
375 | }; | |
376 | ||
44ea652a TK |
377 | i2c_dvfs: i2c@e60b0000 { |
378 | #address-cells = <1>; | |
379 | #size-cells = <0>; | |
380 | compatible = "renesas,iic-r8a77990"; | |
381 | reg = <0 0xe60b0000 0 0x15>; | |
382 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
383 | clocks = <&cpg CPG_MOD 926>; | |
384 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
385 | resets = <&cpg 926>; | |
386 | dmas = <&dmac0 0x11>, <&dmac0 0x10>; | |
387 | dma-names = "tx", "rx"; | |
388 | status = "disabled"; | |
389 | }; | |
390 | ||
f37a7767 YS |
391 | cpg: clock-controller@e6150000 { |
392 | compatible = "renesas,r8a77990-cpg-mssr"; | |
393 | reg = <0 0xe6150000 0 0x1000>; | |
394 | clocks = <&extal_clk>; | |
395 | clock-names = "extal"; | |
396 | #clock-cells = <2>; | |
397 | #power-domain-cells = <0>; | |
398 | #reset-cells = <1>; | |
399 | }; | |
400 | ||
401 | rst: reset-controller@e6160000 { | |
402 | compatible = "renesas,r8a77990-rst"; | |
403 | reg = <0 0xe6160000 0 0x0200>; | |
404 | }; | |
405 | ||
406 | sysc: system-controller@e6180000 { | |
407 | compatible = "renesas,r8a77990-sysc"; | |
408 | reg = <0 0xe6180000 0 0x0400>; | |
409 | #power-domain-cells = <1>; | |
410 | }; | |
411 | ||
8f1ee2a1 YK |
412 | thermal: thermal@e6190000 { |
413 | compatible = "renesas,thermal-r8a77990"; | |
414 | reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; | |
415 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, | |
416 | <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, | |
417 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; | |
418 | clocks = <&cpg CPG_MOD 522>; | |
419 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
420 | resets = <&cpg 522>; | |
421 | #thermal-sensor-cells = <0>; | |
422 | }; | |
423 | ||
0c793a02 TK |
424 | intc_ex: interrupt-controller@e61c0000 { |
425 | compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; | |
426 | #interrupt-cells = <2>; | |
427 | interrupt-controller; | |
428 | reg = <0 0xe61c0000 0 0x200>; | |
429 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH | |
430 | GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH | |
431 | GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH | |
432 | GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; | |
435 | clocks = <&cpg CPG_MOD 407>; | |
436 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
437 | resets = <&cpg 407>; | |
438 | }; | |
439 | ||
b7a1da21 TK |
440 | hscif0: serial@e6540000 { |
441 | compatible = "renesas,hscif-r8a77990", | |
442 | "renesas,rcar-gen3-hscif", | |
443 | "renesas,hscif"; | |
444 | reg = <0 0xe6540000 0 0x60>; | |
445 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
446 | clocks = <&cpg CPG_MOD 520>, | |
447 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
448 | <&scif_clk>; | |
449 | clock-names = "fck", "brg_int", "scif_clk"; | |
450 | dmas = <&dmac1 0x31>, <&dmac1 0x30>, | |
451 | <&dmac2 0x31>, <&dmac2 0x30>; | |
452 | dma-names = "tx", "rx", "tx", "rx"; | |
453 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
454 | resets = <&cpg 520>; | |
455 | status = "disabled"; | |
456 | }; | |
457 | ||
458 | hscif1: serial@e6550000 { | |
459 | compatible = "renesas,hscif-r8a77990", | |
460 | "renesas,rcar-gen3-hscif", | |
461 | "renesas,hscif"; | |
462 | reg = <0 0xe6550000 0 0x60>; | |
463 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
464 | clocks = <&cpg CPG_MOD 519>, | |
465 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
466 | <&scif_clk>; | |
467 | clock-names = "fck", "brg_int", "scif_clk"; | |
468 | dmas = <&dmac1 0x33>, <&dmac1 0x32>, | |
469 | <&dmac2 0x33>, <&dmac2 0x32>; | |
470 | dma-names = "tx", "rx", "tx", "rx"; | |
471 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
472 | resets = <&cpg 519>; | |
473 | status = "disabled"; | |
474 | }; | |
475 | ||
476 | hscif2: serial@e6560000 { | |
477 | compatible = "renesas,hscif-r8a77990", | |
478 | "renesas,rcar-gen3-hscif", | |
479 | "renesas,hscif"; | |
480 | reg = <0 0xe6560000 0 0x60>; | |
481 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
482 | clocks = <&cpg CPG_MOD 518>, | |
483 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
484 | <&scif_clk>; | |
485 | clock-names = "fck", "brg_int", "scif_clk"; | |
486 | dmas = <&dmac1 0x35>, <&dmac1 0x34>, | |
487 | <&dmac2 0x35>, <&dmac2 0x34>; | |
488 | dma-names = "tx", "rx", "tx", "rx"; | |
489 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
490 | resets = <&cpg 518>; | |
491 | status = "disabled"; | |
492 | }; | |
493 | ||
494 | hscif3: serial@e66a0000 { | |
495 | compatible = "renesas,hscif-r8a77990", | |
496 | "renesas,rcar-gen3-hscif", | |
497 | "renesas,hscif"; | |
498 | reg = <0 0xe66a0000 0 0x60>; | |
499 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
500 | clocks = <&cpg CPG_MOD 517>, | |
501 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
502 | <&scif_clk>; | |
503 | clock-names = "fck", "brg_int", "scif_clk"; | |
504 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; | |
505 | dma-names = "tx", "rx"; | |
506 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
507 | resets = <&cpg 517>; | |
508 | status = "disabled"; | |
509 | }; | |
510 | ||
511 | hscif4: serial@e66b0000 { | |
512 | compatible = "renesas,hscif-r8a77990", | |
513 | "renesas,rcar-gen3-hscif", | |
514 | "renesas,hscif"; | |
515 | reg = <0 0xe66b0000 0 0x60>; | |
516 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
517 | clocks = <&cpg CPG_MOD 516>, | |
518 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
519 | <&scif_clk>; | |
520 | clock-names = "fck", "brg_int", "scif_clk"; | |
521 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; | |
522 | dma-names = "tx", "rx"; | |
523 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
524 | resets = <&cpg 516>; | |
525 | status = "disabled"; | |
526 | }; | |
527 | ||
5c6479d9 YS |
528 | hsusb: usb@e6590000 { |
529 | compatible = "renesas,usbhs-r8a77990", | |
530 | "renesas,rcar-gen3-usbhs"; | |
531 | reg = <0 0xe6590000 0 0x200>; | |
532 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
533 | clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; | |
534 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, | |
535 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
536 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
537 | renesas,buswait = <11>; | |
538 | phys = <&usb2_phy0>; | |
539 | phy-names = "usb"; | |
540 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
541 | resets = <&cpg 704>, <&cpg 703>; | |
542 | status = "disabled"; | |
543 | }; | |
544 | ||
545 | usb_dmac0: dma-controller@e65a0000 { | |
546 | compatible = "renesas,r8a77990-usb-dmac", | |
547 | "renesas,usb-dmac"; | |
548 | reg = <0 0xe65a0000 0 0x100>; | |
549 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
550 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
551 | interrupt-names = "ch0", "ch1"; | |
552 | clocks = <&cpg CPG_MOD 330>; | |
553 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
554 | resets = <&cpg 330>; | |
555 | #dma-cells = <1>; | |
556 | dma-channels = <2>; | |
557 | }; | |
558 | ||
559 | usb_dmac1: dma-controller@e65b0000 { | |
560 | compatible = "renesas,r8a77990-usb-dmac", | |
561 | "renesas,usb-dmac"; | |
562 | reg = <0 0xe65b0000 0 0x100>; | |
563 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
564 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
565 | interrupt-names = "ch0", "ch1"; | |
566 | clocks = <&cpg CPG_MOD 331>; | |
567 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
568 | resets = <&cpg 331>; | |
569 | #dma-cells = <1>; | |
570 | dma-channels = <2>; | |
571 | }; | |
572 | ||
3943e896 TK |
573 | dmac0: dma-controller@e6700000 { |
574 | compatible = "renesas,dmac-r8a77990", | |
575 | "renesas,rcar-dmac"; | |
576 | reg = <0 0xe6700000 0 0x10000>; | |
577 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
578 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
579 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
580 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
581 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
582 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
583 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
584 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
585 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
586 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
587 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
588 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
589 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
590 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
591 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
592 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
593 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
594 | interrupt-names = "error", | |
595 | "ch0", "ch1", "ch2", "ch3", | |
596 | "ch4", "ch5", "ch6", "ch7", | |
597 | "ch8", "ch9", "ch10", "ch11", | |
598 | "ch12", "ch13", "ch14", "ch15"; | |
599 | clocks = <&cpg CPG_MOD 219>; | |
600 | clock-names = "fck"; | |
601 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
602 | resets = <&cpg 219>; | |
603 | #dma-cells = <1>; | |
604 | dma-channels = <16>; | |
f0f9f7a6 MD |
605 | iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, |
606 | <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, | |
607 | <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, | |
608 | <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, | |
609 | <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, | |
610 | <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, | |
611 | <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, | |
612 | <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; | |
3943e896 TK |
613 | }; |
614 | ||
615 | dmac1: dma-controller@e7300000 { | |
616 | compatible = "renesas,dmac-r8a77990", | |
617 | "renesas,rcar-dmac"; | |
618 | reg = <0 0xe7300000 0 0x10000>; | |
619 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
620 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
621 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
622 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
623 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
624 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
625 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
626 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
627 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
628 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
629 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
630 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
631 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
632 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
633 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
634 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
635 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
636 | interrupt-names = "error", | |
637 | "ch0", "ch1", "ch2", "ch3", | |
638 | "ch4", "ch5", "ch6", "ch7", | |
639 | "ch8", "ch9", "ch10", "ch11", | |
640 | "ch12", "ch13", "ch14", "ch15"; | |
641 | clocks = <&cpg CPG_MOD 218>; | |
642 | clock-names = "fck"; | |
643 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
644 | resets = <&cpg 218>; | |
645 | #dma-cells = <1>; | |
646 | dma-channels = <16>; | |
f0f9f7a6 MD |
647 | iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, |
648 | <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, | |
649 | <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, | |
650 | <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, | |
651 | <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, | |
652 | <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, | |
653 | <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, | |
654 | <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; | |
3943e896 TK |
655 | }; |
656 | ||
657 | dmac2: dma-controller@e7310000 { | |
658 | compatible = "renesas,dmac-r8a77990", | |
659 | "renesas,rcar-dmac"; | |
660 | reg = <0 0xe7310000 0 0x10000>; | |
661 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
662 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
663 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
664 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
665 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
666 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
667 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
668 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
669 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
670 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
671 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
672 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
673 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
674 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
675 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
676 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
677 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
678 | interrupt-names = "error", | |
679 | "ch0", "ch1", "ch2", "ch3", | |
680 | "ch4", "ch5", "ch6", "ch7", | |
681 | "ch8", "ch9", "ch10", "ch11", | |
682 | "ch12", "ch13", "ch14", "ch15"; | |
683 | clocks = <&cpg CPG_MOD 217>; | |
684 | clock-names = "fck"; | |
685 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
686 | resets = <&cpg 217>; | |
687 | #dma-cells = <1>; | |
688 | dma-channels = <16>; | |
f0f9f7a6 MD |
689 | iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, |
690 | <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, | |
691 | <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, | |
692 | <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, | |
693 | <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, | |
694 | <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, | |
695 | <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, | |
696 | <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; | |
3943e896 TK |
697 | }; |
698 | ||
55697cbb MD |
699 | ipmmu_ds0: mmu@e6740000 { |
700 | compatible = "renesas,ipmmu-r8a77990"; | |
701 | reg = <0 0xe6740000 0 0x1000>; | |
702 | renesas,ipmmu-main = <&ipmmu_mm 0>; | |
703 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
704 | #iommu-cells = <1>; | |
705 | }; | |
706 | ||
707 | ipmmu_ds1: mmu@e7740000 { | |
708 | compatible = "renesas,ipmmu-r8a77990"; | |
709 | reg = <0 0xe7740000 0 0x1000>; | |
710 | renesas,ipmmu-main = <&ipmmu_mm 1>; | |
711 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
712 | #iommu-cells = <1>; | |
713 | }; | |
714 | ||
715 | ipmmu_hc: mmu@e6570000 { | |
716 | compatible = "renesas,ipmmu-r8a77990"; | |
717 | reg = <0 0xe6570000 0 0x1000>; | |
718 | renesas,ipmmu-main = <&ipmmu_mm 2>; | |
719 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
720 | #iommu-cells = <1>; | |
721 | }; | |
722 | ||
723 | ipmmu_mm: mmu@e67b0000 { | |
724 | compatible = "renesas,ipmmu-r8a77990"; | |
725 | reg = <0 0xe67b0000 0 0x1000>; | |
726 | interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, | |
727 | <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; | |
728 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
729 | #iommu-cells = <1>; | |
730 | }; | |
731 | ||
732 | ipmmu_mp: mmu@ec670000 { | |
733 | compatible = "renesas,ipmmu-r8a77990"; | |
734 | reg = <0 0xec670000 0 0x1000>; | |
735 | renesas,ipmmu-main = <&ipmmu_mm 4>; | |
736 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
737 | #iommu-cells = <1>; | |
738 | }; | |
739 | ||
740 | ipmmu_pv0: mmu@fd800000 { | |
741 | compatible = "renesas,ipmmu-r8a77990"; | |
742 | reg = <0 0xfd800000 0 0x1000>; | |
743 | renesas,ipmmu-main = <&ipmmu_mm 6>; | |
744 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
745 | #iommu-cells = <1>; | |
746 | }; | |
747 | ||
748 | ipmmu_rt: mmu@ffc80000 { | |
749 | compatible = "renesas,ipmmu-r8a77990"; | |
750 | reg = <0 0xffc80000 0 0x1000>; | |
751 | renesas,ipmmu-main = <&ipmmu_mm 10>; | |
752 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
753 | #iommu-cells = <1>; | |
754 | }; | |
755 | ||
756 | ipmmu_vc0: mmu@fe6b0000 { | |
757 | compatible = "renesas,ipmmu-r8a77990"; | |
758 | reg = <0 0xfe6b0000 0 0x1000>; | |
759 | renesas,ipmmu-main = <&ipmmu_mm 12>; | |
760 | power-domains = <&sysc R8A77990_PD_A3VC>; | |
761 | #iommu-cells = <1>; | |
762 | }; | |
763 | ||
764 | ipmmu_vi0: mmu@febd0000 { | |
765 | compatible = "renesas,ipmmu-r8a77990"; | |
766 | reg = <0 0xfebd0000 0 0x1000>; | |
767 | renesas,ipmmu-main = <&ipmmu_mm 14>; | |
768 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
769 | #iommu-cells = <1>; | |
770 | }; | |
771 | ||
772 | ipmmu_vp0: mmu@fe990000 { | |
773 | compatible = "renesas,ipmmu-r8a77990"; | |
774 | reg = <0 0xfe990000 0 0x1000>; | |
775 | renesas,ipmmu-main = <&ipmmu_mm 16>; | |
776 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
777 | #iommu-cells = <1>; | |
778 | }; | |
779 | ||
913a78b5 YS |
780 | avb: ethernet@e6800000 { |
781 | compatible = "renesas,etheravb-r8a77990", | |
782 | "renesas,etheravb-rcar-gen3"; | |
4b03df5f | 783 | reg = <0 0xe6800000 0 0x800>; |
913a78b5 YS |
784 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
785 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
786 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
787 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
788 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
789 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
790 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
791 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
792 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
793 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
794 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
795 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
796 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
797 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
798 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
799 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
800 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
801 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
802 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
803 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
804 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
805 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
806 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
807 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
808 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
809 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
810 | "ch4", "ch5", "ch6", "ch7", | |
811 | "ch8", "ch9", "ch10", "ch11", | |
812 | "ch12", "ch13", "ch14", "ch15", | |
813 | "ch16", "ch17", "ch18", "ch19", | |
814 | "ch20", "ch21", "ch22", "ch23", | |
815 | "ch24"; | |
816 | clocks = <&cpg CPG_MOD 812>; | |
83e7d2ec | 817 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
913a78b5 YS |
818 | resets = <&cpg 812>; |
819 | phy-mode = "rgmii"; | |
43021275 | 820 | iommus = <&ipmmu_ds0 16>; |
913a78b5 YS |
821 | #address-cells = <1>; |
822 | #size-cells = <0>; | |
823 | status = "disabled"; | |
824 | }; | |
825 | ||
327d1f32 MV |
826 | can0: can@e6c30000 { |
827 | compatible = "renesas,can-r8a77990", | |
828 | "renesas,rcar-gen3-can"; | |
829 | reg = <0 0xe6c30000 0 0x1000>; | |
830 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | |
831 | clocks = <&cpg CPG_MOD 916>, | |
832 | <&cpg CPG_CORE R8A77990_CLK_CANFD>, | |
833 | <&can_clk>; | |
834 | clock-names = "clkp1", "clkp2", "can_clk"; | |
835 | assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; | |
836 | assigned-clock-rates = <40000000>; | |
837 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
838 | resets = <&cpg 916>; | |
839 | status = "disabled"; | |
840 | }; | |
841 | ||
842 | can1: can@e6c38000 { | |
843 | compatible = "renesas,can-r8a77990", | |
844 | "renesas,rcar-gen3-can"; | |
845 | reg = <0 0xe6c38000 0 0x1000>; | |
846 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | |
847 | clocks = <&cpg CPG_MOD 915>, | |
848 | <&cpg CPG_CORE R8A77990_CLK_CANFD>, | |
849 | <&can_clk>; | |
850 | clock-names = "clkp1", "clkp2", "can_clk"; | |
851 | assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; | |
852 | assigned-clock-rates = <40000000>; | |
853 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
854 | resets = <&cpg 915>; | |
855 | status = "disabled"; | |
856 | }; | |
857 | ||
858 | canfd: can@e66c0000 { | |
859 | compatible = "renesas,r8a77990-canfd", | |
860 | "renesas,rcar-gen3-canfd"; | |
861 | reg = <0 0xe66c0000 0 0x8000>; | |
862 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, | |
863 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
864 | clocks = <&cpg CPG_MOD 914>, | |
865 | <&cpg CPG_CORE R8A77990_CLK_CANFD>, | |
866 | <&can_clk>; | |
867 | clock-names = "fck", "canfd", "can_clk"; | |
868 | assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; | |
869 | assigned-clock-rates = <40000000>; | |
870 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
871 | resets = <&cpg 914>; | |
872 | status = "disabled"; | |
873 | ||
874 | channel0 { | |
875 | status = "disabled"; | |
876 | }; | |
877 | ||
878 | channel1 { | |
879 | status = "disabled"; | |
880 | }; | |
881 | }; | |
882 | ||
18048556 YS |
883 | pwm0: pwm@e6e30000 { |
884 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
885 | reg = <0 0xe6e30000 0 0x8>; | |
886 | clocks = <&cpg CPG_MOD 523>; | |
887 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
888 | resets = <&cpg 523>; | |
889 | #pwm-cells = <2>; | |
890 | status = "disabled"; | |
891 | }; | |
892 | ||
893 | pwm1: pwm@e6e31000 { | |
894 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
895 | reg = <0 0xe6e31000 0 0x8>; | |
896 | clocks = <&cpg CPG_MOD 523>; | |
897 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
898 | resets = <&cpg 523>; | |
899 | #pwm-cells = <2>; | |
900 | status = "disabled"; | |
901 | }; | |
902 | ||
903 | pwm2: pwm@e6e32000 { | |
904 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
905 | reg = <0 0xe6e32000 0 0x8>; | |
906 | clocks = <&cpg CPG_MOD 523>; | |
907 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
908 | resets = <&cpg 523>; | |
909 | #pwm-cells = <2>; | |
910 | status = "disabled"; | |
911 | }; | |
912 | ||
913 | pwm3: pwm@e6e33000 { | |
914 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
915 | reg = <0 0xe6e33000 0 0x8>; | |
916 | clocks = <&cpg CPG_MOD 523>; | |
917 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
918 | resets = <&cpg 523>; | |
919 | #pwm-cells = <2>; | |
920 | status = "disabled"; | |
921 | }; | |
922 | ||
923 | pwm4: pwm@e6e34000 { | |
924 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
925 | reg = <0 0xe6e34000 0 0x8>; | |
926 | clocks = <&cpg CPG_MOD 523>; | |
927 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
928 | resets = <&cpg 523>; | |
929 | #pwm-cells = <2>; | |
930 | status = "disabled"; | |
931 | }; | |
932 | ||
933 | pwm5: pwm@e6e35000 { | |
934 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
935 | reg = <0 0xe6e35000 0 0x8>; | |
936 | clocks = <&cpg CPG_MOD 523>; | |
937 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
938 | resets = <&cpg 523>; | |
939 | #pwm-cells = <2>; | |
940 | status = "disabled"; | |
941 | }; | |
942 | ||
943 | pwm6: pwm@e6e36000 { | |
944 | compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; | |
945 | reg = <0 0xe6e36000 0 0x8>; | |
946 | clocks = <&cpg CPG_MOD 523>; | |
947 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
948 | resets = <&cpg 523>; | |
949 | #pwm-cells = <2>; | |
950 | status = "disabled"; | |
951 | }; | |
952 | ||
a5ebe5e4 TK |
953 | scif0: serial@e6e60000 { |
954 | compatible = "renesas,scif-r8a77990", | |
955 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
956 | reg = <0 0xe6e60000 0 64>; | |
957 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
958 | clocks = <&cpg CPG_MOD 207>, | |
959 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
960 | <&scif_clk>; | |
961 | clock-names = "fck", "brg_int", "scif_clk"; | |
962 | dmas = <&dmac1 0x51>, <&dmac1 0x50>, | |
963 | <&dmac2 0x51>, <&dmac2 0x50>; | |
964 | dma-names = "tx", "rx", "tx", "rx"; | |
965 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
966 | resets = <&cpg 207>; | |
967 | status = "disabled"; | |
968 | }; | |
969 | ||
970 | scif1: serial@e6e68000 { | |
971 | compatible = "renesas,scif-r8a77990", | |
972 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
973 | reg = <0 0xe6e68000 0 64>; | |
974 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
975 | clocks = <&cpg CPG_MOD 206>, | |
976 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
977 | <&scif_clk>; | |
978 | clock-names = "fck", "brg_int", "scif_clk"; | |
979 | dmas = <&dmac1 0x53>, <&dmac1 0x52>, | |
980 | <&dmac2 0x53>, <&dmac2 0x52>; | |
981 | dma-names = "tx", "rx", "tx", "rx"; | |
982 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
983 | resets = <&cpg 206>; | |
984 | status = "disabled"; | |
985 | }; | |
986 | ||
f37a7767 YS |
987 | scif2: serial@e6e88000 { |
988 | compatible = "renesas,scif-r8a77990", | |
989 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
990 | reg = <0 0xe6e88000 0 64>; | |
991 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
103db9b5 TK |
992 | clocks = <&cpg CPG_MOD 310>, |
993 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
994 | <&scif_clk>; | |
995 | clock-names = "fck", "brg_int", "scif_clk"; | |
996 | ||
83e7d2ec | 997 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
f37a7767 YS |
998 | resets = <&cpg 310>; |
999 | status = "disabled"; | |
1000 | }; | |
1001 | ||
a5ebe5e4 TK |
1002 | scif3: serial@e6c50000 { |
1003 | compatible = "renesas,scif-r8a77990", | |
1004 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1005 | reg = <0 0xe6c50000 0 64>; | |
1006 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
1007 | clocks = <&cpg CPG_MOD 204>, | |
1008 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
1009 | <&scif_clk>; | |
1010 | clock-names = "fck", "brg_int", "scif_clk"; | |
1011 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; | |
1012 | dma-names = "tx", "rx"; | |
1013 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1014 | resets = <&cpg 204>; | |
1015 | status = "disabled"; | |
1016 | }; | |
1017 | ||
1018 | scif4: serial@e6c40000 { | |
1019 | compatible = "renesas,scif-r8a77990", | |
1020 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1021 | reg = <0 0xe6c40000 0 64>; | |
1022 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
1023 | clocks = <&cpg CPG_MOD 203>, | |
1024 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
1025 | <&scif_clk>; | |
1026 | clock-names = "fck", "brg_int", "scif_clk"; | |
1027 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; | |
1028 | dma-names = "tx", "rx"; | |
1029 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1030 | resets = <&cpg 203>; | |
1031 | status = "disabled"; | |
1032 | }; | |
1033 | ||
1034 | scif5: serial@e6f30000 { | |
1035 | compatible = "renesas,scif-r8a77990", | |
1036 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
1037 | reg = <0 0xe6f30000 0 64>; | |
1038 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
1039 | clocks = <&cpg CPG_MOD 202>, | |
1040 | <&cpg CPG_CORE R8A77990_CLK_S3D1C>, | |
1041 | <&scif_clk>; | |
1042 | clock-names = "fck", "brg_int", "scif_clk"; | |
1043 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, | |
1044 | <&dmac2 0x5b>, <&dmac2 0x5a>; | |
1045 | dma-names = "tx", "rx", "tx", "rx"; | |
1046 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1047 | resets = <&cpg 202>; | |
1048 | status = "disabled"; | |
1049 | }; | |
1050 | ||
4b7e3ab1 GU |
1051 | msiof0: spi@e6e90000 { |
1052 | compatible = "renesas,msiof-r8a77990", | |
1053 | "renesas,rcar-gen3-msiof"; | |
1054 | reg = <0 0xe6e90000 0 0x0064>; | |
1055 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
1056 | clocks = <&cpg CPG_MOD 211>; | |
85170420 YK |
1057 | dmas = <&dmac1 0x41>, <&dmac1 0x40>, |
1058 | <&dmac2 0x41>, <&dmac2 0x40>; | |
1059 | dma-names = "tx", "rx", "tx", "rx"; | |
4b7e3ab1 GU |
1060 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
1061 | resets = <&cpg 211>; | |
1062 | #address-cells = <1>; | |
1063 | #size-cells = <0>; | |
1064 | status = "disabled"; | |
1065 | }; | |
1066 | ||
1067 | msiof1: spi@e6ea0000 { | |
1068 | compatible = "renesas,msiof-r8a77990", | |
1069 | "renesas,rcar-gen3-msiof"; | |
1070 | reg = <0 0xe6ea0000 0 0x0064>; | |
1071 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | |
1072 | clocks = <&cpg CPG_MOD 210>; | |
85170420 YK |
1073 | dmas = <&dmac1 0x43>, <&dmac1 0x42>, |
1074 | <&dmac2 0x43>, <&dmac2 0x42>; | |
1075 | dma-names = "tx", "rx", "tx", "rx"; | |
4b7e3ab1 GU |
1076 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
1077 | resets = <&cpg 210>; | |
1078 | #address-cells = <1>; | |
1079 | #size-cells = <0>; | |
1080 | status = "disabled"; | |
1081 | }; | |
1082 | ||
1083 | msiof2: spi@e6c00000 { | |
1084 | compatible = "renesas,msiof-r8a77990", | |
1085 | "renesas,rcar-gen3-msiof"; | |
1086 | reg = <0 0xe6c00000 0 0x0064>; | |
1087 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | |
1088 | clocks = <&cpg CPG_MOD 209>; | |
85170420 YK |
1089 | dmas = <&dmac0 0x45>, <&dmac0 0x44>; |
1090 | dma-names = "tx", "rx"; | |
4b7e3ab1 GU |
1091 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
1092 | resets = <&cpg 209>; | |
1093 | #address-cells = <1>; | |
1094 | #size-cells = <0>; | |
1095 | status = "disabled"; | |
1096 | }; | |
1097 | ||
1098 | msiof3: spi@e6c10000 { | |
1099 | compatible = "renesas,msiof-r8a77990", | |
1100 | "renesas,rcar-gen3-msiof"; | |
1101 | reg = <0 0xe6c10000 0 0x0064>; | |
1102 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
1103 | clocks = <&cpg CPG_MOD 208>; | |
85170420 YK |
1104 | dmas = <&dmac0 0x47>, <&dmac0 0x46>; |
1105 | dma-names = "tx", "rx"; | |
4b7e3ab1 GU |
1106 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
1107 | resets = <&cpg 208>; | |
1108 | #address-cells = <1>; | |
1109 | #size-cells = <0>; | |
1110 | status = "disabled"; | |
1111 | }; | |
1112 | ||
ec70407a KM |
1113 | vin4: video@e6ef4000 { |
1114 | compatible = "renesas,vin-r8a77990"; | |
1115 | reg = <0 0xe6ef4000 0 0x1000>; | |
1116 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; | |
1117 | clocks = <&cpg CPG_MOD 807>; | |
1118 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1119 | resets = <&cpg 807>; | |
1120 | renesas,id = <4>; | |
1121 | status = "disabled"; | |
1122 | ||
1123 | ports { | |
1124 | #address-cells = <1>; | |
1125 | #size-cells = <0>; | |
1126 | ||
1127 | port@1 { | |
5e53dbf4 JM |
1128 | #address-cells = <1>; |
1129 | #size-cells = <0>; | |
1130 | ||
ec70407a KM |
1131 | reg = <1>; |
1132 | ||
5e53dbf4 JM |
1133 | vin4csi40: endpoint@2 { |
1134 | reg = <2>; | |
ec70407a KM |
1135 | remote-endpoint= <&csi40vin4>; |
1136 | }; | |
1137 | }; | |
1138 | }; | |
1139 | }; | |
1140 | ||
1141 | vin5: video@e6ef5000 { | |
1142 | compatible = "renesas,vin-r8a77990"; | |
1143 | reg = <0 0xe6ef5000 0 0x1000>; | |
1144 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; | |
1145 | clocks = <&cpg CPG_MOD 806>; | |
1146 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1147 | resets = <&cpg 806>; | |
1148 | renesas,id = <5>; | |
1149 | status = "disabled"; | |
1150 | ||
1151 | ports { | |
1152 | #address-cells = <1>; | |
1153 | #size-cells = <0>; | |
1154 | ||
1155 | port@1 { | |
5e53dbf4 JM |
1156 | #address-cells = <1>; |
1157 | #size-cells = <0>; | |
1158 | ||
ec70407a KM |
1159 | reg = <1>; |
1160 | ||
5e53dbf4 JM |
1161 | vin5csi40: endpoint@2 { |
1162 | reg = <2>; | |
ec70407a KM |
1163 | remote-endpoint= <&csi40vin5>; |
1164 | }; | |
1165 | }; | |
1166 | }; | |
1167 | }; | |
1168 | ||
3b46fa57 YK |
1169 | rcar_sound: sound@ec500000 { |
1170 | /* | |
1171 | * #sound-dai-cells is required | |
1172 | * | |
1173 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1174 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1175 | */ | |
1176 | /* | |
1177 | * #clock-cells is required for audio_clkout0/1/2/3 | |
1178 | * | |
1179 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
1180 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
1181 | */ | |
1182 | compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; | |
1183 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
1184 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1185 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
1186 | <0 0xec541000 0 0x280>, /* SSI */ | |
1187 | <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ | |
1188 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
1189 | ||
1190 | clocks = <&cpg CPG_MOD 1005>, | |
1191 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
1192 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
1193 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
1194 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
1195 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
1196 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, | |
1197 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
1198 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
1199 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
1200 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
1201 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, | |
1202 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, | |
1203 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, | |
1204 | <&audio_clk_a>, <&audio_clk_b>, | |
1205 | <&audio_clk_c>, | |
1206 | <&cpg CPG_CORE R8A77990_CLK_ZA2>; | |
1207 | clock-names = "ssi-all", | |
1208 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1209 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1210 | "ssi.1", "ssi.0", | |
1211 | "src.9", "src.8", "src.7", "src.6", | |
1212 | "src.5", "src.4", "src.3", "src.2", | |
1213 | "src.1", "src.0", | |
1214 | "mix.1", "mix.0", | |
1215 | "ctu.1", "ctu.0", | |
1216 | "dvc.0", "dvc.1", | |
1217 | "clk_a", "clk_b", "clk_c", "clk_i"; | |
1218 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1219 | resets = <&cpg 1005>, | |
1220 | <&cpg 1006>, <&cpg 1007>, | |
1221 | <&cpg 1008>, <&cpg 1009>, | |
1222 | <&cpg 1010>, <&cpg 1011>, | |
1223 | <&cpg 1012>, <&cpg 1013>, | |
1224 | <&cpg 1014>, <&cpg 1015>; | |
1225 | reset-names = "ssi-all", | |
1226 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
1227 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
1228 | "ssi.1", "ssi.0"; | |
1229 | status = "disabled"; | |
1230 | ||
1231 | rcar_sound,dvc { | |
1232 | dvc0: dvc-0 { | |
1233 | dmas = <&audma0 0xbc>; | |
1234 | dma-names = "tx"; | |
1235 | }; | |
1236 | dvc1: dvc-1 { | |
1237 | dmas = <&audma0 0xbe>; | |
1238 | dma-names = "tx"; | |
1239 | }; | |
1240 | }; | |
1241 | ||
1242 | rcar_sound,mix { | |
1243 | mix0: mix-0 { }; | |
1244 | mix1: mix-1 { }; | |
1245 | }; | |
1246 | ||
1247 | rcar_sound,ctu { | |
1248 | ctu00: ctu-0 { }; | |
1249 | ctu01: ctu-1 { }; | |
1250 | ctu02: ctu-2 { }; | |
1251 | ctu03: ctu-3 { }; | |
1252 | ctu10: ctu-4 { }; | |
1253 | ctu11: ctu-5 { }; | |
1254 | ctu12: ctu-6 { }; | |
1255 | ctu13: ctu-7 { }; | |
1256 | }; | |
1257 | ||
1258 | rcar_sound,src { | |
1259 | src0: src-0 { | |
1260 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; | |
1261 | dmas = <&audma0 0x85>, <&audma0 0x9a>; | |
1262 | dma-names = "rx", "tx"; | |
1263 | }; | |
1264 | src1: src-1 { | |
1265 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; | |
1266 | dmas = <&audma0 0x87>, <&audma0 0x9c>; | |
1267 | dma-names = "rx", "tx"; | |
1268 | }; | |
1269 | src2: src-2 { | |
1270 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; | |
1271 | dmas = <&audma0 0x89>, <&audma0 0x9e>; | |
1272 | dma-names = "rx", "tx"; | |
1273 | }; | |
1274 | src3: src-3 { | |
1275 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; | |
1276 | dmas = <&audma0 0x8b>, <&audma0 0xa0>; | |
1277 | dma-names = "rx", "tx"; | |
1278 | }; | |
1279 | src4: src-4 { | |
1280 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; | |
1281 | dmas = <&audma0 0x8d>, <&audma0 0xb0>; | |
1282 | dma-names = "rx", "tx"; | |
1283 | }; | |
1284 | src5: src-5 { | |
1285 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; | |
1286 | dmas = <&audma0 0x8f>, <&audma0 0xb2>; | |
1287 | dma-names = "rx", "tx"; | |
1288 | }; | |
1289 | src6: src-6 { | |
1290 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; | |
1291 | dmas = <&audma0 0x91>, <&audma0 0xb4>; | |
1292 | dma-names = "rx", "tx"; | |
1293 | }; | |
1294 | src7: src-7 { | |
1295 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; | |
1296 | dmas = <&audma0 0x93>, <&audma0 0xb6>; | |
1297 | dma-names = "rx", "tx"; | |
1298 | }; | |
1299 | src8: src-8 { | |
1300 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; | |
1301 | dmas = <&audma0 0x95>, <&audma0 0xb8>; | |
1302 | dma-names = "rx", "tx"; | |
1303 | }; | |
1304 | src9: src-9 { | |
1305 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; | |
1306 | dmas = <&audma0 0x97>, <&audma0 0xba>; | |
1307 | dma-names = "rx", "tx"; | |
1308 | }; | |
1309 | }; | |
1310 | ||
1311 | rcar_sound,ssi { | |
1312 | ssi0: ssi-0 { | |
1313 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; | |
1314 | dmas = <&audma0 0x01>, <&audma0 0x02>, | |
1315 | <&audma0 0x15>, <&audma0 0x16>; | |
1316 | dma-names = "rx", "tx", "rxu", "txu"; | |
1317 | }; | |
1318 | ssi1: ssi-1 { | |
1319 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; | |
1320 | dmas = <&audma0 0x03>, <&audma0 0x04>, | |
1321 | <&audma0 0x49>, <&audma0 0x4a>; | |
1322 | dma-names = "rx", "tx", "rxu", "txu"; | |
1323 | }; | |
1324 | ssi2: ssi-2 { | |
1325 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | |
1326 | dmas = <&audma0 0x05>, <&audma0 0x06>, | |
1327 | <&audma0 0x63>, <&audma0 0x64>; | |
1328 | dma-names = "rx", "tx", "rxu", "txu"; | |
1329 | }; | |
1330 | ssi3: ssi-3 { | |
1331 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | |
1332 | dmas = <&audma0 0x07>, <&audma0 0x08>, | |
1333 | <&audma0 0x6f>, <&audma0 0x70>; | |
1334 | dma-names = "rx", "tx", "rxu", "txu"; | |
1335 | }; | |
1336 | ssi4: ssi-4 { | |
1337 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | |
1338 | dmas = <&audma0 0x09>, <&audma0 0x0a>, | |
1339 | <&audma0 0x71>, <&audma0 0x72>; | |
1340 | dma-names = "rx", "tx", "rxu", "txu"; | |
1341 | }; | |
1342 | ssi5: ssi-5 { | |
1343 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | |
1344 | dmas = <&audma0 0x0b>, <&audma0 0x0c>, | |
1345 | <&audma0 0x73>, <&audma0 0x74>; | |
1346 | dma-names = "rx", "tx", "rxu", "txu"; | |
1347 | }; | |
1348 | ssi6: ssi-6 { | |
1349 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | |
1350 | dmas = <&audma0 0x0d>, <&audma0 0x0e>, | |
1351 | <&audma0 0x75>, <&audma0 0x76>; | |
1352 | dma-names = "rx", "tx", "rxu", "txu"; | |
1353 | }; | |
1354 | ssi7: ssi-7 { | |
1355 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | |
1356 | dmas = <&audma0 0x0f>, <&audma0 0x10>, | |
1357 | <&audma0 0x79>, <&audma0 0x7a>; | |
1358 | dma-names = "rx", "tx", "rxu", "txu"; | |
1359 | }; | |
1360 | ssi8: ssi-8 { | |
1361 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | |
1362 | dmas = <&audma0 0x11>, <&audma0 0x12>, | |
1363 | <&audma0 0x7b>, <&audma0 0x7c>; | |
1364 | dma-names = "rx", "tx", "rxu", "txu"; | |
1365 | }; | |
1366 | ssi9: ssi-9 { | |
1367 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | |
1368 | dmas = <&audma0 0x13>, <&audma0 0x14>, | |
1369 | <&audma0 0x7d>, <&audma0 0x7e>; | |
1370 | dma-names = "rx", "tx", "rxu", "txu"; | |
1371 | }; | |
1372 | }; | |
1373 | }; | |
1374 | ||
1375 | audma0: dma-controller@ec700000 { | |
1376 | compatible = "renesas,dmac-r8a77990", | |
1377 | "renesas,rcar-dmac"; | |
1378 | reg = <0 0xec700000 0 0x10000>; | |
1379 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH | |
1380 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
1381 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
1382 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
1383 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
1384 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
1385 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
1386 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
1387 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
1388 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
1389 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
1390 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
1391 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
1392 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH | |
1393 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
1394 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
1395 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; | |
1396 | interrupt-names = "error", | |
1397 | "ch0", "ch1", "ch2", "ch3", | |
1398 | "ch4", "ch5", "ch6", "ch7", | |
1399 | "ch8", "ch9", "ch10", "ch11", | |
1400 | "ch12", "ch13", "ch14", "ch15"; | |
1401 | clocks = <&cpg CPG_MOD 502>; | |
1402 | clock-names = "fck"; | |
1403 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1404 | resets = <&cpg 502>; | |
1405 | #dma-cells = <1>; | |
1406 | dma-channels = <16>; | |
1407 | iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, | |
1408 | <&ipmmu_mp 2>, <&ipmmu_mp 3>, | |
1409 | <&ipmmu_mp 4>, <&ipmmu_mp 5>, | |
1410 | <&ipmmu_mp 6>, <&ipmmu_mp 7>, | |
1411 | <&ipmmu_mp 8>, <&ipmmu_mp 9>, | |
1412 | <&ipmmu_mp 10>, <&ipmmu_mp 11>, | |
1413 | <&ipmmu_mp 12>, <&ipmmu_mp 13>, | |
1414 | <&ipmmu_mp 14>, <&ipmmu_mp 15>; | |
1415 | }; | |
1416 | ||
fe1bc94a YS |
1417 | xhci0: usb@ee000000 { |
1418 | compatible = "renesas,xhci-r8a77990", | |
1419 | "renesas,rcar-gen3-xhci"; | |
1420 | reg = <0 0xee000000 0 0xc00>; | |
1421 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
1422 | clocks = <&cpg CPG_MOD 328>; | |
1423 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1424 | resets = <&cpg 328>; | |
1425 | status = "disabled"; | |
1426 | }; | |
1427 | ||
8dae1d2b YS |
1428 | usb3_peri0: usb@ee020000 { |
1429 | compatible = "renesas,r8a77990-usb3-peri", | |
1430 | "renesas,rcar-gen3-usb3-peri"; | |
1431 | reg = <0 0xee020000 0 0x400>; | |
1432 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
1433 | clocks = <&cpg CPG_MOD 328>; | |
1434 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1435 | resets = <&cpg 328>; | |
1436 | status = "disabled"; | |
1437 | }; | |
1438 | ||
6dd72b4d YS |
1439 | ohci0: usb@ee080000 { |
1440 | compatible = "generic-ohci"; | |
1441 | reg = <0 0xee080000 0 0x100>; | |
1442 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
737e05bf | 1443 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
6dd72b4d YS |
1444 | phys = <&usb2_phy0>; |
1445 | phy-names = "usb"; | |
83e7d2ec | 1446 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
737e05bf | 1447 | resets = <&cpg 703>, <&cpg 704>; |
6dd72b4d YS |
1448 | status = "disabled"; |
1449 | }; | |
1450 | ||
1451 | ehci0: usb@ee080100 { | |
1452 | compatible = "generic-ehci"; | |
1453 | reg = <0 0xee080100 0 0x100>; | |
1454 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
737e05bf | 1455 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
6dd72b4d YS |
1456 | phys = <&usb2_phy0>; |
1457 | phy-names = "usb"; | |
1458 | companion = <&ohci0>; | |
83e7d2ec | 1459 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
737e05bf | 1460 | resets = <&cpg 703>, <&cpg 704>; |
6dd72b4d YS |
1461 | status = "disabled"; |
1462 | }; | |
1463 | ||
1464 | usb2_phy0: usb-phy@ee080200 { | |
1465 | compatible = "renesas,usb2-phy-r8a77990", | |
1466 | "renesas,rcar-gen3-usb2-phy"; | |
1467 | reg = <0 0xee080200 0 0x700>; | |
1468 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
737e05bf | 1469 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
83e7d2ec | 1470 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
737e05bf | 1471 | resets = <&cpg 703>, <&cpg 704>; |
6dd72b4d YS |
1472 | #phy-cells = <0>; |
1473 | status = "disabled"; | |
1474 | }; | |
1475 | ||
9aa3558a TK |
1476 | sdhi0: sd@ee100000 { |
1477 | compatible = "renesas,sdhi-r8a77990", | |
1478 | "renesas,rcar-gen3-sdhi"; | |
1479 | reg = <0 0xee100000 0 0x2000>; | |
1480 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; | |
1481 | clocks = <&cpg CPG_MOD 314>; | |
1482 | max-frequency = <200000000>; | |
1483 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1484 | resets = <&cpg 314>; | |
1485 | status = "disabled"; | |
1486 | }; | |
1487 | ||
1488 | sdhi1: sd@ee120000 { | |
1489 | compatible = "renesas,sdhi-r8a77990", | |
1490 | "renesas,rcar-gen3-sdhi"; | |
1491 | reg = <0 0xee120000 0 0x2000>; | |
1492 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; | |
1493 | clocks = <&cpg CPG_MOD 313>; | |
1494 | max-frequency = <200000000>; | |
1495 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1496 | resets = <&cpg 313>; | |
1497 | status = "disabled"; | |
1498 | }; | |
1499 | ||
1500 | sdhi3: sd@ee160000 { | |
1501 | compatible = "renesas,sdhi-r8a77990", | |
1502 | "renesas,rcar-gen3-sdhi"; | |
1503 | reg = <0 0xee160000 0 0x2000>; | |
1504 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; | |
1505 | clocks = <&cpg CPG_MOD 311>; | |
1506 | max-frequency = <200000000>; | |
1507 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1508 | resets = <&cpg 311>; | |
1509 | status = "disabled"; | |
1510 | }; | |
1511 | ||
f37a7767 YS |
1512 | gic: interrupt-controller@f1010000 { |
1513 | compatible = "arm,gic-400"; | |
1514 | #interrupt-cells = <3>; | |
1515 | #address-cells = <0>; | |
1516 | interrupt-controller; | |
1517 | reg = <0x0 0xf1010000 0 0x1000>, | |
1518 | <0x0 0xf1020000 0 0x20000>, | |
1519 | <0x0 0xf1040000 0 0x20000>, | |
1520 | <0x0 0xf1060000 0 0x20000>; | |
1521 | interrupts = <GIC_PPI 9 | |
7085f5d9 | 1522 | (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; |
f37a7767 YS |
1523 | clocks = <&cpg CPG_MOD 408>; |
1524 | clock-names = "clk"; | |
83e7d2ec | 1525 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; |
f37a7767 YS |
1526 | resets = <&cpg 408>; |
1527 | }; | |
1528 | ||
13ee2bfc LP |
1529 | vspb0: vsp@fe960000 { |
1530 | compatible = "renesas,vsp2"; | |
1531 | reg = <0 0xfe960000 0 0x8000>; | |
1532 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; | |
1533 | clocks = <&cpg CPG_MOD 626>; | |
1534 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1535 | resets = <&cpg 626>; | |
1536 | renesas,fcp = <&fcpvb0>; | |
1537 | }; | |
1538 | ||
1539 | fcpvb0: fcp@fe96f000 { | |
1540 | compatible = "renesas,fcpv"; | |
1541 | reg = <0 0xfe96f000 0 0x200>; | |
1542 | clocks = <&cpg CPG_MOD 607>; | |
1543 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1544 | resets = <&cpg 607>; | |
1545 | iommus = <&ipmmu_vp0 5>; | |
1546 | }; | |
1547 | ||
1548 | vspi0: vsp@fe9a0000 { | |
1549 | compatible = "renesas,vsp2"; | |
1550 | reg = <0 0xfe9a0000 0 0x8000>; | |
1551 | interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; | |
1552 | clocks = <&cpg CPG_MOD 631>; | |
1553 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1554 | resets = <&cpg 631>; | |
1555 | renesas,fcp = <&fcpvi0>; | |
1556 | }; | |
1557 | ||
1558 | fcpvi0: fcp@fe9af000 { | |
1559 | compatible = "renesas,fcpv"; | |
1560 | reg = <0 0xfe9af000 0 0x200>; | |
1561 | clocks = <&cpg CPG_MOD 611>; | |
1562 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1563 | resets = <&cpg 611>; | |
1564 | iommus = <&ipmmu_vp0 8>; | |
1565 | }; | |
1566 | ||
1567 | vspd0: vsp@fea20000 { | |
1568 | compatible = "renesas,vsp2"; | |
1569 | reg = <0 0xfea20000 0 0x7000>; | |
1570 | interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; | |
1571 | clocks = <&cpg CPG_MOD 623>; | |
1572 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1573 | resets = <&cpg 623>; | |
1574 | renesas,fcp = <&fcpvd0>; | |
1575 | }; | |
1576 | ||
1577 | fcpvd0: fcp@fea27000 { | |
1578 | compatible = "renesas,fcpv"; | |
1579 | reg = <0 0xfea27000 0 0x200>; | |
1580 | clocks = <&cpg CPG_MOD 603>; | |
1581 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1582 | resets = <&cpg 603>; | |
1583 | iommus = <&ipmmu_vi0 8>; | |
1584 | }; | |
1585 | ||
1586 | vspd1: vsp@fea28000 { | |
1587 | compatible = "renesas,vsp2"; | |
1588 | reg = <0 0xfea28000 0 0x7000>; | |
1589 | interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; | |
1590 | clocks = <&cpg CPG_MOD 622>; | |
1591 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1592 | resets = <&cpg 622>; | |
1593 | renesas,fcp = <&fcpvd1>; | |
1594 | }; | |
1595 | ||
1596 | fcpvd1: fcp@fea2f000 { | |
1597 | compatible = "renesas,fcpv"; | |
1598 | reg = <0 0xfea2f000 0 0x200>; | |
1599 | clocks = <&cpg CPG_MOD 602>; | |
1600 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1601 | resets = <&cpg 602>; | |
1602 | iommus = <&ipmmu_vi0 9>; | |
1603 | }; | |
1604 | ||
ec70407a KM |
1605 | csi40: csi2@feaa0000 { |
1606 | compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; | |
1607 | reg = <0 0xfeaa0000 0 0x10000>; | |
1608 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; | |
1609 | clocks = <&cpg CPG_MOD 716>; | |
1610 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1611 | resets = <&cpg 716>; | |
1612 | status = "disabled"; | |
1613 | ||
1614 | ports { | |
1615 | #address-cells = <1>; | |
1616 | #size-cells = <0>; | |
1617 | ||
1618 | port@1 { | |
1619 | #address-cells = <1>; | |
1620 | #size-cells = <0>; | |
1621 | ||
1622 | reg = <1>; | |
1623 | ||
1624 | csi40vin4: endpoint@0 { | |
1625 | reg = <0>; | |
1626 | remote-endpoint = <&vin4csi40>; | |
1627 | }; | |
1628 | csi40vin5: endpoint@1 { | |
1629 | reg = <1>; | |
1630 | remote-endpoint = <&vin5csi40>; | |
1631 | }; | |
1632 | }; | |
1633 | }; | |
1634 | }; | |
1635 | ||
13ee2bfc LP |
1636 | du: display@feb00000 { |
1637 | compatible = "renesas,du-r8a77990"; | |
1638 | reg = <0 0xfeb00000 0 0x80000>; | |
1639 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, | |
1640 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; | |
1641 | clocks = <&cpg CPG_MOD 724>, | |
1642 | <&cpg CPG_MOD 723>; | |
1643 | clock-names = "du.0", "du.1"; | |
1644 | vsps = <&vspd0 0 &vspd1 0>; | |
1645 | status = "disabled"; | |
1646 | ||
1647 | ports { | |
1648 | #address-cells = <1>; | |
1649 | #size-cells = <0>; | |
1650 | ||
1651 | port@0 { | |
1652 | reg = <0>; | |
1653 | du_out_rgb: endpoint { | |
1654 | }; | |
1655 | }; | |
1656 | ||
1657 | port@1 { | |
1658 | reg = <1>; | |
1659 | du_out_lvds0: endpoint { | |
1660 | remote-endpoint = <&lvds0_in>; | |
1661 | }; | |
1662 | }; | |
1663 | ||
1664 | port@2 { | |
1665 | reg = <2>; | |
1666 | du_out_lvds1: endpoint { | |
1667 | remote-endpoint = <&lvds1_in>; | |
1668 | }; | |
1669 | }; | |
1670 | }; | |
1671 | }; | |
1672 | ||
1673 | lvds0: lvds-encoder@feb90000 { | |
1674 | compatible = "renesas,r8a77990-lvds"; | |
1675 | reg = <0 0xfeb90000 0 0x20>; | |
1676 | clocks = <&cpg CPG_MOD 727>; | |
1677 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1678 | resets = <&cpg 727>; | |
1679 | status = "disabled"; | |
1680 | ||
1681 | ports { | |
1682 | #address-cells = <1>; | |
1683 | #size-cells = <0>; | |
1684 | ||
1685 | port@0 { | |
1686 | reg = <0>; | |
1687 | lvds0_in: endpoint { | |
1688 | remote-endpoint = <&du_out_lvds0>; | |
1689 | }; | |
1690 | }; | |
1691 | ||
1692 | port@1 { | |
1693 | reg = <1>; | |
1694 | lvds0_out: endpoint { | |
1695 | }; | |
1696 | }; | |
1697 | }; | |
1698 | }; | |
1699 | ||
1700 | lvds1: lvds-encoder@feb90100 { | |
1701 | compatible = "renesas,r8a77990-lvds"; | |
1702 | reg = <0 0xfeb90100 0 0x20>; | |
1703 | clocks = <&cpg CPG_MOD 727>; | |
1704 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1705 | resets = <&cpg 726>; | |
1706 | status = "disabled"; | |
1707 | ||
1708 | ports { | |
1709 | #address-cells = <1>; | |
1710 | #size-cells = <0>; | |
1711 | ||
1712 | port@0 { | |
1713 | reg = <0>; | |
1714 | lvds1_in: endpoint { | |
1715 | remote-endpoint = <&du_out_lvds1>; | |
1716 | }; | |
1717 | }; | |
1718 | ||
1719 | port@1 { | |
1720 | reg = <1>; | |
1721 | lvds1_out: endpoint { | |
1722 | }; | |
1723 | }; | |
1724 | }; | |
1725 | }; | |
1726 | ||
ba3ac35b TK |
1727 | pciec0: pcie@fe000000 { |
1728 | compatible = "renesas,pcie-r8a77990", | |
1729 | "renesas,pcie-rcar-gen3"; | |
1730 | reg = <0 0xfe000000 0 0x80000>; | |
1731 | #address-cells = <3>; | |
1732 | #size-cells = <2>; | |
1733 | bus-range = <0x00 0xff>; | |
1734 | device_type = "pci"; | |
1735 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1736 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1737 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1738 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1739 | /* Map all possible DDR as inbound ranges */ | |
1740 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; | |
1741 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, | |
1742 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1743 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
1744 | #interrupt-cells = <1>; | |
1745 | interrupt-map-mask = <0 0 0 0>; | |
1746 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; | |
1747 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; | |
1748 | clock-names = "pcie", "pcie_bus"; | |
1749 | power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; | |
1750 | resets = <&cpg 319>; | |
1751 | status = "disabled"; | |
1752 | }; | |
1753 | ||
f37a7767 YS |
1754 | prr: chipid@fff00044 { |
1755 | compatible = "renesas,prr"; | |
1756 | reg = <0 0xfff00044 0 4>; | |
1757 | }; | |
1758 | }; | |
1759 | ||
8f1ee2a1 YK |
1760 | thermal-zones { |
1761 | cpu-thermal { | |
1762 | polling-delay-passive = <250>; | |
1763 | polling-delay = <1000>; | |
1764 | thermal-sensors = <&thermal>; | |
1765 | ||
1766 | trips { | |
1767 | cpu-crit { | |
1768 | temperature = <120000>; | |
1769 | hysteresis = <2000>; | |
1770 | type = "critical"; | |
1771 | }; | |
1772 | }; | |
1773 | ||
1774 | cooling-maps { | |
1775 | }; | |
1776 | }; | |
1777 | }; | |
1778 | ||
f37a7767 YS |
1779 | timer { |
1780 | compatible = "arm,armv8-timer"; | |
7085f5d9 GU |
1781 | interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
1782 | <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1783 | <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
1784 | <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
f37a7767 YS |
1785 | }; |
1786 | }; |