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arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
[linux-2.6-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH		 1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d
SH		 12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14/ {
15 compatible = "renesas,r8a7795";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
32bc0c51
KM		 19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 };
28
12e51557
GI		 29 psci {
30 compatible = "arm,psci-0.2";
31 method = "smc";
32 };
33
26a7e06d
SH		 34 cpus {
35 #address-cells = <1>;
36 #size-cells = <0>;
37
26a7e06d
SH		 38 a57_0: cpu@0 {
39 compatible = "arm,cortex-a57", "arm,armv8";
40 reg = <0x0>;
41 device_type = "cpu";
7b337e61 42 next-level-cache = <&L2_CA57>;
12e51557 43 enable-method = "psci";
26a7e06d 44 };
0ed1a79e
GI		 45
46 a57_1: cpu@1 {
47 compatible = "arm,cortex-a57","arm,armv8";
48 reg = <0x1>;
49 device_type = "cpu";
7b337e61 50 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 51 enable-method = "psci";
52 };
53 a57_2: cpu@2 {
54 compatible = "arm,cortex-a57","arm,armv8";
55 reg = <0x2>;
56 device_type = "cpu";
7b337e61 57 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 58 enable-method = "psci";
59 };
60 a57_3: cpu@3 {
61 compatible = "arm,cortex-a57","arm,armv8";
62 reg = <0x3>;
63 device_type = "cpu";
7b337e61 64 next-level-cache = <&L2_CA57>;
0ed1a79e
GI		 65 enable-method = "psci";
66 };
26a7e06d
SH		 67 };
68
7b337e61
GU		 69 L2_CA57: cache-controller@0 {
70 compatible = "cache";
a528b4bf
GU		 71 cache-unified;
72 cache-level = <2>;
7b337e61
GU		 73 };
74
26a7e06d
SH		 75 extal_clk: extal {
76 compatible = "fixed-clock";
77 #clock-cells = <0>;
78 /* This value must be overridden by the board */
79 clock-frequency = <0>;
80 };
81
82 extalr_clk: extalr {
83 compatible = "fixed-clock";
84 #clock-cells = <0>;
85 /* This value must be overridden by the board */
86 clock-frequency = <0>;
87 };
88
623197b9
KM		 89 /*
90 * The external audio clocks are configured as 0 Hz fixed frequency
91 * clocks by default.
92 * Boards that provide audio clocks should override them.
93 */
94 audio_clk_a: audio_clk_a {
95 compatible = "fixed-clock";
96 #clock-cells = <0>;
97 clock-frequency = <0>;
98 };
99
100 audio_clk_b: audio_clk_b {
101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 clock-frequency = <0>;
104 };
105
106 audio_clk_c: audio_clk_c {
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 clock-frequency = <0>;
110 };
111
3da41e4c
GU		 112 /* External SCIF clock - to be overridden by boards that provide it */
113 scif_clk: scif {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
116 clock-frequency = <0>;
117 status = "disabled";
118 };
119
26a7e06d
SH		 120 soc {
121 compatible = "simple-bus";
122 interrupt-parent = <&gic>;
0ed1a79e 123
26a7e06d
SH		 124 #address-cells = <2>;
125 #size-cells = <2>;
126 ranges;
127
128 gic: interrupt-controller@0xf1010000 {
129 compatible = "arm,gic-400";
130 #interrupt-cells = <3>;
131 #address-cells = <0>;
132 interrupt-controller;
133 reg = <0x0 0xf1010000 0 0x1000>,
134 <0x0 0xf1020000 0 0x2000>;
135 interrupts = <GIC_PPI 9
0ed1a79e 136 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
26a7e06d
SH		 137 };
138
7b08623a
TK		 139 gpio0: gpio@e6050000 {
140 compatible = "renesas,gpio-r8a7795",
141 "renesas,gpio-rcar";
142 reg = <0 0xe6050000 0 0x50>;
143 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
144 #gpio-cells = <2>;
145 gpio-controller;
146 gpio-ranges = <&pfc 0 0 16>;
147 #interrupt-cells = <2>;
148 interrupt-controller;
149 clocks = <&cpg CPG_MOD 912>;
150 power-domains = <&cpg>;
151 };
152
153 gpio1: gpio@e6051000 {
154 compatible = "renesas,gpio-r8a7795",
155 "renesas,gpio-rcar";
156 reg = <0 0xe6051000 0 0x50>;
157 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
158 #gpio-cells = <2>;
159 gpio-controller;
160 gpio-ranges = <&pfc 0 32 28>;
161 #interrupt-cells = <2>;
162 interrupt-controller;
163 clocks = <&cpg CPG_MOD 911>;
164 power-domains = <&cpg>;
165 };
166
167 gpio2: gpio@e6052000 {
168 compatible = "renesas,gpio-r8a7795",
169 "renesas,gpio-rcar";
170 reg = <0 0xe6052000 0 0x50>;
171 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
172 #gpio-cells = <2>;
173 gpio-controller;
174 gpio-ranges = <&pfc 0 64 15>;
175 #interrupt-cells = <2>;
176 interrupt-controller;
177 clocks = <&cpg CPG_MOD 910>;
178 power-domains = <&cpg>;
179 };
180
181 gpio3: gpio@e6053000 {
182 compatible = "renesas,gpio-r8a7795",
183 "renesas,gpio-rcar";
184 reg = <0 0xe6053000 0 0x50>;
185 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
186 #gpio-cells = <2>;
187 gpio-controller;
188 gpio-ranges = <&pfc 0 96 16>;
189 #interrupt-cells = <2>;
190 interrupt-controller;
191 clocks = <&cpg CPG_MOD 909>;
192 power-domains = <&cpg>;
193 };
194
195 gpio4: gpio@e6054000 {
196 compatible = "renesas,gpio-r8a7795",
197 "renesas,gpio-rcar";
198 reg = <0 0xe6054000 0 0x50>;
199 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
200 #gpio-cells = <2>;
201 gpio-controller;
202 gpio-ranges = <&pfc 0 128 18>;
203 #interrupt-cells = <2>;
204 interrupt-controller;
205 clocks = <&cpg CPG_MOD 908>;
206 power-domains = <&cpg>;
207 };
208
209 gpio5: gpio@e6055000 {
210 compatible = "renesas,gpio-r8a7795",
211 "renesas,gpio-rcar";
212 reg = <0 0xe6055000 0 0x50>;
213 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
214 #gpio-cells = <2>;
215 gpio-controller;
216 gpio-ranges = <&pfc 0 160 26>;
217 #interrupt-cells = <2>;
218 interrupt-controller;
219 clocks = <&cpg CPG_MOD 907>;
220 power-domains = <&cpg>;
221 };
222
223 gpio6: gpio@e6055400 {
224 compatible = "renesas,gpio-r8a7795",
225 "renesas,gpio-rcar";
226 reg = <0 0xe6055400 0 0x50>;
227 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
228 #gpio-cells = <2>;
229 gpio-controller;
230 gpio-ranges = <&pfc 0 192 32>;
231 #interrupt-cells = <2>;
232 interrupt-controller;
233 clocks = <&cpg CPG_MOD 906>;
234 power-domains = <&cpg>;
235 };
236
237 gpio7: gpio@e6055800 {
238 compatible = "renesas,gpio-r8a7795",
239 "renesas,gpio-rcar";
240 reg = <0 0xe6055800 0 0x50>;
241 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
242 #gpio-cells = <2>;
243 gpio-controller;
244 gpio-ranges = <&pfc 0 224 4>;
245 #interrupt-cells = <2>;
246 interrupt-controller;
247 clocks = <&cpg CPG_MOD 905>;
248 power-domains = <&cpg>;
249 };
250
3d0cd468
DB		 251 pmu_a57 {
252 compatible = "arm,cortex-a57-pmu";
a6b6b478
YH		 253 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
256 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
257 interrupt-affinity = <&a57_0>,
258 <&a57_1>,
259 <&a57_2>,
260 <&a57_3>;
261 };
262
26a7e06d
SH		 263 timer {
264 compatible = "arm,armv8-timer";
265 interrupts = <GIC_PPI 13
0ed1a79e 266 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 267 <GIC_PPI 14
0ed1a79e 268 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 269 <GIC_PPI 11
0ed1a79e 270 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 271 <GIC_PPI 10
0ed1a79e 272 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
26a7e06d
SH		 273 };
274
275 cpg: clock-controller@e6150000 {
276 compatible = "renesas,r8a7795-cpg-mssr";
277 reg = <0 0xe6150000 0 0x1000>;
278 clocks = <&extal_clk>, <&extalr_clk>;
279 clock-names = "extal", "extalr";
280 #clock-cells = <2>;
281 #power-domain-cells = <0>;
282 };
d9202126 283
b281f4c8
KM		 284 audma0: dma-controller@ec700000 {
285 compatible = "renesas,rcar-dmac";
286 reg = <0 0xec700000 0 0x10000>;
52b541ab
SH		 287 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
288 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
289 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
290 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
291 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
292 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
293 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
294 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
295 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
296 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
297 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
298 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
299 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
300 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
301 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
302 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
b281f4c8
KM		 304 interrupt-names = "error",
305 "ch0", "ch1", "ch2", "ch3",
306 "ch4", "ch5", "ch6", "ch7",
307 "ch8", "ch9", "ch10", "ch11",
308 "ch12", "ch13", "ch14", "ch15";
309 clocks = <&cpg CPG_MOD 502>;
310 clock-names = "fck";
311 power-domains = <&cpg>;
312 #dma-cells = <1>;
313 dma-channels = <16>;
314 };
315
316 audma1: dma-controller@ec720000 {
317 compatible = "renesas,rcar-dmac";
318 reg = <0 0xec720000 0 0x10000>;
52b541ab
SH		 319 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
320 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
321 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
333 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
334 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
b281f4c8
KM		 336 interrupt-names = "error",
337 "ch0", "ch1", "ch2", "ch3",
338 "ch4", "ch5", "ch6", "ch7",
339 "ch8", "ch9", "ch10", "ch11",
340 "ch12", "ch13", "ch14", "ch15";
341 clocks = <&cpg CPG_MOD 501>;
342 clock-names = "fck";
343 power-domains = <&cpg>;
344 #dma-cells = <1>;
345 dma-channels = <16>;
346 };
347
9241844a
KM		 348 pfc: pfc@e6060000 {
349 compatible = "renesas,pfc-r8a7795";
350 reg = <0 0xe6060000 0 0x50c>;
351 };
352
d9202126 353 dmac0: dma-controller@e6700000 {
e2102cea
GU		 354 compatible = "renesas,dmac-r8a7795",
355 "renesas,rcar-dmac";
356 reg = <0 0xe6700000 0 0x10000>;
357 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
366 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
367 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
368 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
369 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
370 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
371 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
372 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
373 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
374 interrupt-names = "error",
375 "ch0", "ch1", "ch2", "ch3",
376 "ch4", "ch5", "ch6", "ch7",
377 "ch8", "ch9", "ch10", "ch11",
378 "ch12", "ch13", "ch14", "ch15";
379 clocks = <&cpg CPG_MOD 219>;
380 clock-names = "fck";
381 power-domains = <&cpg>;
382 #dma-cells = <1>;
383 dma-channels = <16>;
d9202126
GU		 384 };
385
386 dmac1: dma-controller@e7300000 {
e2102cea
GU		 387 compatible = "renesas,dmac-r8a7795",
388 "renesas,rcar-dmac";
389 reg = <0 0xe7300000 0 0x10000>;
390 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
400 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
407 interrupt-names = "error",
408 "ch0", "ch1", "ch2", "ch3",
409 "ch4", "ch5", "ch6", "ch7",
410 "ch8", "ch9", "ch10", "ch11",
411 "ch12", "ch13", "ch14", "ch15";
412 clocks = <&cpg CPG_MOD 218>;
413 clock-names = "fck";
414 power-domains = <&cpg>;
415 #dma-cells = <1>;
416 dma-channels = <16>;
d9202126
GU		 417 };
418
419 dmac2: dma-controller@e7310000 {
e2102cea
GU		 420 compatible = "renesas,dmac-r8a7795",
421 "renesas,rcar-dmac";
422 reg = <0 0xe7310000 0 0x10000>;
423 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
427 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
428 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
430 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
440 interrupt-names = "error",
441 "ch0", "ch1", "ch2", "ch3",
442 "ch4", "ch5", "ch6", "ch7",
443 "ch8", "ch9", "ch10", "ch11",
444 "ch12", "ch13", "ch14", "ch15";
445 clocks = <&cpg CPG_MOD 217>;
446 clock-names = "fck";
447 power-domains = <&cpg>;
448 #dma-cells = <1>;
449 dma-channels = <16>;
d9202126 450 };
49af46b4 451
a92843c8
KM		 452 avb: ethernet@e6800000 {
453 compatible = "renesas,etheravb-r8a7795";
454 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
455 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
457 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
458 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
459 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
461 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
463 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
466 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
467 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
468 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
469 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
470 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
471 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
474 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
476 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
477 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
480 interrupt-names = "ch0", "ch1", "ch2", "ch3",
481 "ch4", "ch5", "ch6", "ch7",
482 "ch8", "ch9", "ch10", "ch11",
483 "ch12", "ch13", "ch14", "ch15",
484 "ch16", "ch17", "ch18", "ch19",
485 "ch20", "ch21", "ch22", "ch23",
486 "ch24";
487 clocks = <&cpg CPG_MOD 812>;
488 power-domains = <&cpg>;
489 phy-mode = "rgmii-id";
490 #address-cells = <1>;
491 #size-cells = <0>;
492 };
493
4fa04299 494 hscif0: serial@e6540000 {
653f502d
GU		 495 compatible = "renesas,hscif-r8a7795",
496 "renesas,rcar-gen3-hscif",
497 "renesas,hscif";
4fa04299
GU		 498 reg = <0 0xe6540000 0 96>;
499 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 500 clocks = <&cpg CPG_MOD 520>,
501 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
502 <&scif_clk>;
503 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 504 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
505 dma-names = "tx", "rx";
506 power-domains = <&cpg>;
507 status = "disabled";
508 };
509
510 hscif1: serial@e6550000 {
653f502d
GU		 511 compatible = "renesas,hscif-r8a7795",
512 "renesas,rcar-gen3-hscif",
513 "renesas,hscif";
4fa04299
GU		 514 reg = <0 0xe6550000 0 96>;
515 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 516 clocks = <&cpg CPG_MOD 519>,
517 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
518 <&scif_clk>;
519 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 520 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
521 dma-names = "tx", "rx";
522 power-domains = <&cpg>;
523 status = "disabled";
524 };
525
526 hscif2: serial@e6560000 {
653f502d
GU		 527 compatible = "renesas,hscif-r8a7795",
528 "renesas,rcar-gen3-hscif",
529 "renesas,hscif";
4fa04299
GU		 530 reg = <0 0xe6560000 0 96>;
531 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 532 clocks = <&cpg CPG_MOD 518>,
533 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
534 <&scif_clk>;
535 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 536 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
537 dma-names = "tx", "rx";
538 power-domains = <&cpg>;
539 status = "disabled";
540 };
541
542 hscif3: serial@e66a0000 {
653f502d
GU		 543 compatible = "renesas,hscif-r8a7795",
544 "renesas,rcar-gen3-hscif",
545 "renesas,hscif";
4fa04299
GU		 546 reg = <0 0xe66a0000 0 96>;
547 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 548 clocks = <&cpg CPG_MOD 517>,
549 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
550 <&scif_clk>;
551 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 552 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
553 dma-names = "tx", "rx";
554 power-domains = <&cpg>;
555 status = "disabled";
556 };
557
558 hscif4: serial@e66b0000 {
653f502d
GU		 559 compatible = "renesas,hscif-r8a7795",
560 "renesas,rcar-gen3-hscif",
561 "renesas,hscif";
4fa04299
GU		 562 reg = <0 0xe66b0000 0 96>;
563 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 564 clocks = <&cpg CPG_MOD 516>,
565 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
566 <&scif_clk>;
567 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 568 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
569 dma-names = "tx", "rx";
570 power-domains = <&cpg>;
571 status = "disabled";
572 };
573
49af46b4 574 scif0: serial@e6e60000 {
653f502d
GU		 575 compatible = "renesas,scif-r8a7795",
576 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 577 reg = <0 0xe6e60000 0 64>;
578 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 579 clocks = <&cpg CPG_MOD 207>,
580 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
581 <&scif_clk>;
582 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 583 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
584 dma-names = "tx", "rx";
585 power-domains = <&cpg>;
586 status = "disabled";
587 };
588
589 scif1: serial@e6e68000 {
653f502d
GU		 590 compatible = "renesas,scif-r8a7795",
591 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 592 reg = <0 0xe6e68000 0 64>;
593 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 594 clocks = <&cpg CPG_MOD 206>,
595 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
596 <&scif_clk>;
597 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 598 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
599 dma-names = "tx", "rx";
600 power-domains = <&cpg>;
601 status = "disabled";
602 };
603
604 scif2: serial@e6e88000 {
653f502d
GU		 605 compatible = "renesas,scif-r8a7795",
606 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 607 reg = <0 0xe6e88000 0 64>;
608 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 609 clocks = <&cpg CPG_MOD 310>,
610 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
611 <&scif_clk>;
612 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 613 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
614 dma-names = "tx", "rx";
615 power-domains = <&cpg>;
616 status = "disabled";
617 };
618
619 scif3: serial@e6c50000 {
653f502d
GU		 620 compatible = "renesas,scif-r8a7795",
621 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 622 reg = <0 0xe6c50000 0 64>;
623 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 624 clocks = <&cpg CPG_MOD 204>,
625 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
626 <&scif_clk>;
627 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 628 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
629 dma-names = "tx", "rx";
630 power-domains = <&cpg>;
631 status = "disabled";
632 };
633
634 scif4: serial@e6c40000 {
653f502d
GU		 635 compatible = "renesas,scif-r8a7795",
636 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 637 reg = <0 0xe6c40000 0 64>;
638 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 639 clocks = <&cpg CPG_MOD 203>,
640 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
641 <&scif_clk>;
642 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 643 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
644 dma-names = "tx", "rx";
645 power-domains = <&cpg>;
646 status = "disabled";
647 };
648
649 scif5: serial@e6f30000 {
653f502d
GU		 650 compatible = "renesas,scif-r8a7795",
651 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 652 reg = <0 0xe6f30000 0 64>;
653 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 654 clocks = <&cpg CPG_MOD 202>,
655 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
656 <&scif_clk>;
657 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 658 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
659 dma-names = "tx", "rx";
660 power-domains = <&cpg>;
661 status = "disabled";
662 };
32bc0c51
KM		 663
664 i2c0: i2c@e6500000 {
665 #address-cells = <1>;
666 #size-cells = <0>;
667 compatible = "renesas,i2c-r8a7795";
668 reg = <0 0xe6500000 0 0x40>;
669 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
670 clocks = <&cpg CPG_MOD 931>;
671 power-domains = <&cpg>;
9036a730 672 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 673 status = "disabled";
674 };
675
676 i2c1: i2c@e6508000 {
677 #address-cells = <1>;
678 #size-cells = <0>;
679 compatible = "renesas,i2c-r8a7795";
680 reg = <0 0xe6508000 0 0x40>;
681 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
682 clocks = <&cpg CPG_MOD 930>;
683 power-domains = <&cpg>;
9036a730 684 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 685 status = "disabled";
686 };
687
688 i2c2: i2c@e6510000 {
689 #address-cells = <1>;
690 #size-cells = <0>;
691 compatible = "renesas,i2c-r8a7795";
692 reg = <0 0xe6510000 0 0x40>;
693 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&cpg CPG_MOD 929>;
695 power-domains = <&cpg>;
9036a730 696 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 697 status = "disabled";
698 };
699
700 i2c3: i2c@e66d0000 {
701 #address-cells = <1>;
702 #size-cells = <0>;
703 compatible = "renesas,i2c-r8a7795";
704 reg = <0 0xe66d0000 0 0x40>;
705 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cpg CPG_MOD 928>;
707 power-domains = <&cpg>;
9036a730 708 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 709 status = "disabled";
710 };
711
712 i2c4: i2c@e66d8000 {
713 #address-cells = <1>;
714 #size-cells = <0>;
715 compatible = "renesas,i2c-r8a7795";
716 reg = <0 0xe66d8000 0 0x40>;
717 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&cpg CPG_MOD 927>;
719 power-domains = <&cpg>;
9036a730 720 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 721 status = "disabled";
722 };
723
724 i2c5: i2c@e66e0000 {
725 #address-cells = <1>;
726 #size-cells = <0>;
727 compatible = "renesas,i2c-r8a7795";
728 reg = <0 0xe66e0000 0 0x40>;
729 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&cpg CPG_MOD 919>;
731 power-domains = <&cpg>;
9036a730 732 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 733 status = "disabled";
734 };
735
736 i2c6: i2c@e66e8000 {
737 #address-cells = <1>;
738 #size-cells = <0>;
739 compatible = "renesas,i2c-r8a7795";
740 reg = <0 0xe66e8000 0 0x40>;
741 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 918>;
743 power-domains = <&cpg>;
9036a730 744 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 745 status = "disabled";
746 };
623197b9
KM		 747
748 rcar_sound: sound@ec500000 {
749 /*
750 * #sound-dai-cells is required
751 *
752 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
753 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
754 */
755 /*
756 * #clock-cells is required for audio_clkout0/1/2/3
757 *
758 * clkout : #clock-cells = <0>; <&rcar_sound>;
759 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
760 */
761 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
762 reg = <0 0xec500000 0 0x1000>, /* SCU */
763 <0 0xec5a0000 0 0x100>, /* ADG */
764 <0 0xec540000 0 0x1000>, /* SSIU */
765 <0 0xec541000 0 0x280>, /* SSI */
766 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
767 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
768
769 clocks = <&cpg CPG_MOD 1005>,
770 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
771 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
772 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
773 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
774 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 775 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
776 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
777 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
778 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
779 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
b9dd9450 780 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 781 <&audio_clk_a>, <&audio_clk_b>,
782 <&audio_clk_c>,
783 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
784 clock-names = "ssi-all",
785 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
786 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
787 "ssi.1", "ssi.0",
b868ff51
KM		 788 "src.9", "src.8", "src.7", "src.6",
789 "src.5", "src.4", "src.3", "src.2",
790 "src.1", "src.0",
b9dd9450 791 "dvc.0", "dvc.1",
623197b9
KM		 792 "clk_a", "clk_b", "clk_c", "clk_i";
793 power-domains = <&cpg>;
794 status = "disabled";
795
b9dd9450
KM		 796 rcar_sound,dvc {
797 dvc0: dvc@0 {
798 dmas = <&audma0 0xbc>;
799 dma-names = "tx";
800 };
801 dvc1: dvc@1 {
802 dmas = <&audma0 0xbe>;
803 dma-names = "tx";
804 };
805 };
806
b868ff51
KM		 807 rcar_sound,src {
808 src0: src@0 {
52b541ab 809 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 810 dmas = <&audma0 0x85>, <&audma1 0x9a>;
811 dma-names = "rx", "tx";
812 };
813 src1: src@1 {
52b541ab 814 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 815 dmas = <&audma0 0x87>, <&audma1 0x9c>;
816 dma-names = "rx", "tx";
817 };
818 src2: src@2 {
52b541ab 819 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 820 dmas = <&audma0 0x89>, <&audma1 0x9e>;
821 dma-names = "rx", "tx";
822 };
823 src3: src@3 {
52b541ab 824 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 825 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
826 dma-names = "rx", "tx";
827 };
828 src4: src@4 {
52b541ab 829 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 830 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
831 dma-names = "rx", "tx";
832 };
833 src5: src@5 {
52b541ab 834 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 835 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
836 dma-names = "rx", "tx";
837 };
838 src6: src@6 {
52b541ab 839 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 840 dmas = <&audma0 0x91>, <&audma1 0xb4>;
841 dma-names = "rx", "tx";
842 };
843 src7: src@7 {
52b541ab 844 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 845 dmas = <&audma0 0x93>, <&audma1 0xb6>;
846 dma-names = "rx", "tx";
847 };
848 src8: src@8 {
52b541ab 849 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 850 dmas = <&audma0 0x95>, <&audma1 0xb8>;
851 dma-names = "rx", "tx";
852 };
853 src9: src@9 {
52b541ab 854 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
b868ff51
KM		 855 dmas = <&audma0 0x97>, <&audma1 0xba>;
856 dma-names = "rx", "tx";
857 };
858 };
859
623197b9
KM		 860 rcar_sound,ssi {
861 ssi0: ssi@0 {
52b541ab 862 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 863 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
864 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 865 };
866 ssi1: ssi@1 {
52b541ab 867 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 868 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
869 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 870 };
871 ssi2: ssi@2 {
52b541ab 872 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 873 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
874 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 875 };
876 ssi3: ssi@3 {
52b541ab 877 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 878 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
879 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 880 };
881 ssi4: ssi@4 {
52b541ab 882 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 883 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
884 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 885 };
886 ssi5: ssi@5 {
52b541ab 887 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 888 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
889 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 890 };
891 ssi6: ssi@6 {
52b541ab 892 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 893 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
894 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 895 };
896 ssi7: ssi@7 {
52b541ab 897 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 898 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
899 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 900 };
901 ssi8: ssi@8 {
52b541ab 902 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 903 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
904 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 905 };
906 ssi9: ssi@9 {
52b541ab 907 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 908 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
909 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 910 };
911 };
912 };
4c13472b
KA		 913
914 sata: sata@ee300000 {
915 compatible = "renesas,sata-r8a7795";
916 reg = <0 0xee300000 0 0x1fff>;
917 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 918 clocks = <&cpg CPG_MOD 815>;
4c13472b
KA		 919 status = "disabled";
920 };
171f2ef8
YS		 921
922 xhci0: usb@ee000000 {
923 compatible = "renesas,xhci-r8a7795";
924 reg = <0 0xee000000 0 0xc00>;
925 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
926 clocks = <&cpg CPG_MOD 328>;
927 power-domains = <&cpg>;
928 status = "disabled";
929 };
930
931 xhci1: usb@ee0400000 {
932 compatible = "renesas,xhci-r8a7795";
933 reg = <0 0xee040000 0 0xc00>;
934 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
935 clocks = <&cpg CPG_MOD 327>;
936 power-domains = <&cpg>;
937 status = "disabled";
938 };
652a4306
YS		 939
940 usb_dmac0: dma-controller@e65a0000 {
941 compatible = "renesas,r8a7795-usb-dmac",
942 "renesas,usb-dmac";
943 reg = <0 0xe65a0000 0 0x100>;
944 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
945 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
946 interrupt-names = "ch0", "ch1";
947 clocks = <&cpg CPG_MOD 330>;
948 power-domains = <&cpg>;
949 #dma-cells = <1>;
950 dma-channels = <2>;
951 };
952
953 usb_dmac1: dma-controller@e65b0000 {
954 compatible = "renesas,r8a7795-usb-dmac",
955 "renesas,usb-dmac";
956 reg = <0 0xe65b0000 0 0x100>;
957 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
958 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
959 interrupt-names = "ch0", "ch1";
960 clocks = <&cpg CPG_MOD 331>;
961 power-domains = <&cpg>;
962 #dma-cells = <1>;
963 dma-channels = <2>;
964 };
26a7e06d
SH		 965 };
966};
Linux 6.x block layer and io_uring tree(s)