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arm64: dts: salvator-x: Enable SCIF_CLK frequency and pins
[linux-2.6-block.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
CommitLineData
26a7e06d
SH		 1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
49af46b4 11#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
26a7e06d
SH		 12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14/ {
15 compatible = "renesas,r8a7795";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
32bc0c51
KM		 19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 };
28
12e51557
GI		 29 psci {
30 compatible = "arm,psci-0.2";
31 method = "smc";
32 };
33
26a7e06d
SH		 34 cpus {
35 #address-cells = <1>;
36 #size-cells = <0>;
37
26a7e06d
SH		 38 a57_0: cpu@0 {
39 compatible = "arm,cortex-a57", "arm,armv8";
40 reg = <0x0>;
41 device_type = "cpu";
12e51557 42 enable-method = "psci";
26a7e06d 43 };
0ed1a79e
GI		 44
45 a57_1: cpu@1 {
46 compatible = "arm,cortex-a57","arm,armv8";
47 reg = <0x1>;
48 device_type = "cpu";
49 enable-method = "psci";
50 };
51 a57_2: cpu@2 {
52 compatible = "arm,cortex-a57","arm,armv8";
53 reg = <0x2>;
54 device_type = "cpu";
55 enable-method = "psci";
56 };
57 a57_3: cpu@3 {
58 compatible = "arm,cortex-a57","arm,armv8";
59 reg = <0x3>;
60 device_type = "cpu";
61 enable-method = "psci";
62 };
26a7e06d
SH		 63 };
64
65 extal_clk: extal {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 /* This value must be overridden by the board */
69 clock-frequency = <0>;
70 };
71
72 extalr_clk: extalr {
73 compatible = "fixed-clock";
74 #clock-cells = <0>;
75 /* This value must be overridden by the board */
76 clock-frequency = <0>;
77 };
78
623197b9
KM		 79 /*
80 * The external audio clocks are configured as 0 Hz fixed frequency
81 * clocks by default.
82 * Boards that provide audio clocks should override them.
83 */
84 audio_clk_a: audio_clk_a {
85 compatible = "fixed-clock";
86 #clock-cells = <0>;
87 clock-frequency = <0>;
88 };
89
90 audio_clk_b: audio_clk_b {
91 compatible = "fixed-clock";
92 #clock-cells = <0>;
93 clock-frequency = <0>;
94 };
95
96 audio_clk_c: audio_clk_c {
97 compatible = "fixed-clock";
98 #clock-cells = <0>;
99 clock-frequency = <0>;
100 };
101
3da41e4c
GU		 102 /* External SCIF clock - to be overridden by boards that provide it */
103 scif_clk: scif {
104 compatible = "fixed-clock";
105 #clock-cells = <0>;
106 clock-frequency = <0>;
107 status = "disabled";
108 };
109
26a7e06d
SH		 110 soc {
111 compatible = "simple-bus";
112 interrupt-parent = <&gic>;
0ed1a79e 113
26a7e06d
SH		 114 #address-cells = <2>;
115 #size-cells = <2>;
116 ranges;
117
118 gic: interrupt-controller@0xf1010000 {
119 compatible = "arm,gic-400";
120 #interrupt-cells = <3>;
121 #address-cells = <0>;
122 interrupt-controller;
123 reg = <0x0 0xf1010000 0 0x1000>,
124 <0x0 0xf1020000 0 0x2000>;
125 interrupts = <GIC_PPI 9
0ed1a79e 126 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
26a7e06d
SH		 127 };
128
7b08623a
TK		 129 gpio0: gpio@e6050000 {
130 compatible = "renesas,gpio-r8a7795",
131 "renesas,gpio-rcar";
132 reg = <0 0xe6050000 0 0x50>;
133 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
134 #gpio-cells = <2>;
135 gpio-controller;
136 gpio-ranges = <&pfc 0 0 16>;
137 #interrupt-cells = <2>;
138 interrupt-controller;
139 clocks = <&cpg CPG_MOD 912>;
140 power-domains = <&cpg>;
141 };
142
143 gpio1: gpio@e6051000 {
144 compatible = "renesas,gpio-r8a7795",
145 "renesas,gpio-rcar";
146 reg = <0 0xe6051000 0 0x50>;
147 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
148 #gpio-cells = <2>;
149 gpio-controller;
150 gpio-ranges = <&pfc 0 32 28>;
151 #interrupt-cells = <2>;
152 interrupt-controller;
153 clocks = <&cpg CPG_MOD 911>;
154 power-domains = <&cpg>;
155 };
156
157 gpio2: gpio@e6052000 {
158 compatible = "renesas,gpio-r8a7795",
159 "renesas,gpio-rcar";
160 reg = <0 0xe6052000 0 0x50>;
161 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
162 #gpio-cells = <2>;
163 gpio-controller;
164 gpio-ranges = <&pfc 0 64 15>;
165 #interrupt-cells = <2>;
166 interrupt-controller;
167 clocks = <&cpg CPG_MOD 910>;
168 power-domains = <&cpg>;
169 };
170
171 gpio3: gpio@e6053000 {
172 compatible = "renesas,gpio-r8a7795",
173 "renesas,gpio-rcar";
174 reg = <0 0xe6053000 0 0x50>;
175 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
176 #gpio-cells = <2>;
177 gpio-controller;
178 gpio-ranges = <&pfc 0 96 16>;
179 #interrupt-cells = <2>;
180 interrupt-controller;
181 clocks = <&cpg CPG_MOD 909>;
182 power-domains = <&cpg>;
183 };
184
185 gpio4: gpio@e6054000 {
186 compatible = "renesas,gpio-r8a7795",
187 "renesas,gpio-rcar";
188 reg = <0 0xe6054000 0 0x50>;
189 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
190 #gpio-cells = <2>;
191 gpio-controller;
192 gpio-ranges = <&pfc 0 128 18>;
193 #interrupt-cells = <2>;
194 interrupt-controller;
195 clocks = <&cpg CPG_MOD 908>;
196 power-domains = <&cpg>;
197 };
198
199 gpio5: gpio@e6055000 {
200 compatible = "renesas,gpio-r8a7795",
201 "renesas,gpio-rcar";
202 reg = <0 0xe6055000 0 0x50>;
203 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
204 #gpio-cells = <2>;
205 gpio-controller;
206 gpio-ranges = <&pfc 0 160 26>;
207 #interrupt-cells = <2>;
208 interrupt-controller;
209 clocks = <&cpg CPG_MOD 907>;
210 power-domains = <&cpg>;
211 };
212
213 gpio6: gpio@e6055400 {
214 compatible = "renesas,gpio-r8a7795",
215 "renesas,gpio-rcar";
216 reg = <0 0xe6055400 0 0x50>;
217 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
218 #gpio-cells = <2>;
219 gpio-controller;
220 gpio-ranges = <&pfc 0 192 32>;
221 #interrupt-cells = <2>;
222 interrupt-controller;
223 clocks = <&cpg CPG_MOD 906>;
224 power-domains = <&cpg>;
225 };
226
227 gpio7: gpio@e6055800 {
228 compatible = "renesas,gpio-r8a7795",
229 "renesas,gpio-rcar";
230 reg = <0 0xe6055800 0 0x50>;
231 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>;
233 gpio-controller;
234 gpio-ranges = <&pfc 0 224 4>;
235 #interrupt-cells = <2>;
236 interrupt-controller;
237 clocks = <&cpg CPG_MOD 905>;
238 power-domains = <&cpg>;
239 };
240
a6b6b478
YH		 241 pmu {
242 compatible = "arm,armv8-pmuv3";
243 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
246 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
247 interrupt-affinity = <&a57_0>,
248 <&a57_1>,
249 <&a57_2>,
250 <&a57_3>;
251 };
252
26a7e06d
SH		 253 timer {
254 compatible = "arm,armv8-timer";
255 interrupts = <GIC_PPI 13
0ed1a79e 256 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 257 <GIC_PPI 14
0ed1a79e 258 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 259 <GIC_PPI 11
0ed1a79e 260 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
26a7e06d 261 <GIC_PPI 10
0ed1a79e 262 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
26a7e06d
SH		 263 };
264
265 cpg: clock-controller@e6150000 {
266 compatible = "renesas,r8a7795-cpg-mssr";
267 reg = <0 0xe6150000 0 0x1000>;
268 clocks = <&extal_clk>, <&extalr_clk>;
269 clock-names = "extal", "extalr";
270 #clock-cells = <2>;
271 #power-domain-cells = <0>;
272 };
d9202126 273
b281f4c8
KM		 274 audma0: dma-controller@ec700000 {
275 compatible = "renesas,rcar-dmac";
276 reg = <0 0xec700000 0 0x10000>;
277 interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH
278 0 320 IRQ_TYPE_LEVEL_HIGH
279 0 321 IRQ_TYPE_LEVEL_HIGH
280 0 322 IRQ_TYPE_LEVEL_HIGH
281 0 323 IRQ_TYPE_LEVEL_HIGH
282 0 324 IRQ_TYPE_LEVEL_HIGH
283 0 325 IRQ_TYPE_LEVEL_HIGH
284 0 326 IRQ_TYPE_LEVEL_HIGH
285 0 327 IRQ_TYPE_LEVEL_HIGH
286 0 328 IRQ_TYPE_LEVEL_HIGH
287 0 329 IRQ_TYPE_LEVEL_HIGH
288 0 330 IRQ_TYPE_LEVEL_HIGH
289 0 331 IRQ_TYPE_LEVEL_HIGH
290 0 332 IRQ_TYPE_LEVEL_HIGH
291 0 333 IRQ_TYPE_LEVEL_HIGH
292 0 334 IRQ_TYPE_LEVEL_HIGH
293 0 335 IRQ_TYPE_LEVEL_HIGH>;
294 interrupt-names = "error",
295 "ch0", "ch1", "ch2", "ch3",
296 "ch4", "ch5", "ch6", "ch7",
297 "ch8", "ch9", "ch10", "ch11",
298 "ch12", "ch13", "ch14", "ch15";
299 clocks = <&cpg CPG_MOD 502>;
300 clock-names = "fck";
301 power-domains = <&cpg>;
302 #dma-cells = <1>;
303 dma-channels = <16>;
304 };
305
306 audma1: dma-controller@ec720000 {
307 compatible = "renesas,rcar-dmac";
308 reg = <0 0xec720000 0 0x10000>;
309 interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH
310 0 336 IRQ_TYPE_LEVEL_HIGH
311 0 337 IRQ_TYPE_LEVEL_HIGH
312 0 338 IRQ_TYPE_LEVEL_HIGH
313 0 339 IRQ_TYPE_LEVEL_HIGH
314 0 340 IRQ_TYPE_LEVEL_HIGH
315 0 341 IRQ_TYPE_LEVEL_HIGH
316 0 342 IRQ_TYPE_LEVEL_HIGH
317 0 343 IRQ_TYPE_LEVEL_HIGH
318 0 344 IRQ_TYPE_LEVEL_HIGH
319 0 345 IRQ_TYPE_LEVEL_HIGH
320 0 346 IRQ_TYPE_LEVEL_HIGH
321 0 347 IRQ_TYPE_LEVEL_HIGH
322 0 348 IRQ_TYPE_LEVEL_HIGH
323 0 349 IRQ_TYPE_LEVEL_HIGH
324 0 382 IRQ_TYPE_LEVEL_HIGH
325 0 383 IRQ_TYPE_LEVEL_HIGH>;
326 interrupt-names = "error",
327 "ch0", "ch1", "ch2", "ch3",
328 "ch4", "ch5", "ch6", "ch7",
329 "ch8", "ch9", "ch10", "ch11",
330 "ch12", "ch13", "ch14", "ch15";
331 clocks = <&cpg CPG_MOD 501>;
332 clock-names = "fck";
333 power-domains = <&cpg>;
334 #dma-cells = <1>;
335 dma-channels = <16>;
336 };
337
9241844a
KM		 338 pfc: pfc@e6060000 {
339 compatible = "renesas,pfc-r8a7795";
340 reg = <0 0xe6060000 0 0x50c>;
341 };
342
d9202126 343 dmac0: dma-controller@e6700000 {
e2102cea
GU		 344 compatible = "renesas,dmac-r8a7795",
345 "renesas,rcar-dmac";
346 reg = <0 0xe6700000 0 0x10000>;
347 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
364 interrupt-names = "error",
365 "ch0", "ch1", "ch2", "ch3",
366 "ch4", "ch5", "ch6", "ch7",
367 "ch8", "ch9", "ch10", "ch11",
368 "ch12", "ch13", "ch14", "ch15";
369 clocks = <&cpg CPG_MOD 219>;
370 clock-names = "fck";
371 power-domains = <&cpg>;
372 #dma-cells = <1>;
373 dma-channels = <16>;
d9202126
GU		 374 };
375
376 dmac1: dma-controller@e7300000 {
e2102cea
GU		 377 compatible = "renesas,dmac-r8a7795",
378 "renesas,rcar-dmac";
379 reg = <0 0xe7300000 0 0x10000>;
380 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
397 interrupt-names = "error",
398 "ch0", "ch1", "ch2", "ch3",
399 "ch4", "ch5", "ch6", "ch7",
400 "ch8", "ch9", "ch10", "ch11",
401 "ch12", "ch13", "ch14", "ch15";
402 clocks = <&cpg CPG_MOD 218>;
403 clock-names = "fck";
404 power-domains = <&cpg>;
405 #dma-cells = <1>;
406 dma-channels = <16>;
d9202126
GU		 407 };
408
409 dmac2: dma-controller@e7310000 {
e2102cea
GU		 410 compatible = "renesas,dmac-r8a7795",
411 "renesas,rcar-dmac";
412 reg = <0 0xe7310000 0 0x10000>;
413 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
415 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
416 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
419 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
420 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
427 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
428 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
430 interrupt-names = "error",
431 "ch0", "ch1", "ch2", "ch3",
432 "ch4", "ch5", "ch6", "ch7",
433 "ch8", "ch9", "ch10", "ch11",
434 "ch12", "ch13", "ch14", "ch15";
435 clocks = <&cpg CPG_MOD 217>;
436 clock-names = "fck";
437 power-domains = <&cpg>;
438 #dma-cells = <1>;
439 dma-channels = <16>;
d9202126 440 };
49af46b4 441
a92843c8
KM		 442 avb: ethernet@e6800000 {
443 compatible = "renesas,etheravb-r8a7795";
444 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
445 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
446 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
447 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
448 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
449 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
452 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
453 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
455 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
457 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
458 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
459 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
461 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
463 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
465 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
466 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
467 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
468 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
469 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
470 interrupt-names = "ch0", "ch1", "ch2", "ch3",
471 "ch4", "ch5", "ch6", "ch7",
472 "ch8", "ch9", "ch10", "ch11",
473 "ch12", "ch13", "ch14", "ch15",
474 "ch16", "ch17", "ch18", "ch19",
475 "ch20", "ch21", "ch22", "ch23",
476 "ch24";
477 clocks = <&cpg CPG_MOD 812>;
478 power-domains = <&cpg>;
479 phy-mode = "rgmii-id";
480 #address-cells = <1>;
481 #size-cells = <0>;
482 };
483
4fa04299 484 hscif0: serial@e6540000 {
653f502d
GU		 485 compatible = "renesas,hscif-r8a7795",
486 "renesas,rcar-gen3-hscif",
487 "renesas,hscif";
4fa04299
GU		 488 reg = <0 0xe6540000 0 96>;
489 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 490 clocks = <&cpg CPG_MOD 520>,
491 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
492 <&scif_clk>;
493 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 494 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
495 dma-names = "tx", "rx";
496 power-domains = <&cpg>;
497 status = "disabled";
498 };
499
500 hscif1: serial@e6550000 {
653f502d
GU		 501 compatible = "renesas,hscif-r8a7795",
502 "renesas,rcar-gen3-hscif",
503 "renesas,hscif";
4fa04299
GU		 504 reg = <0 0xe6550000 0 96>;
505 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 506 clocks = <&cpg CPG_MOD 519>,
507 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
508 <&scif_clk>;
509 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 510 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
511 dma-names = "tx", "rx";
512 power-domains = <&cpg>;
513 status = "disabled";
514 };
515
516 hscif2: serial@e6560000 {
653f502d
GU		 517 compatible = "renesas,hscif-r8a7795",
518 "renesas,rcar-gen3-hscif",
519 "renesas,hscif";
4fa04299
GU		 520 reg = <0 0xe6560000 0 96>;
521 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 522 clocks = <&cpg CPG_MOD 518>,
523 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
524 <&scif_clk>;
525 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 526 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
527 dma-names = "tx", "rx";
528 power-domains = <&cpg>;
529 status = "disabled";
530 };
531
532 hscif3: serial@e66a0000 {
653f502d
GU		 533 compatible = "renesas,hscif-r8a7795",
534 "renesas,rcar-gen3-hscif",
535 "renesas,hscif";
4fa04299
GU		 536 reg = <0 0xe66a0000 0 96>;
537 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 538 clocks = <&cpg CPG_MOD 517>,
539 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
540 <&scif_clk>;
541 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 542 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
543 dma-names = "tx", "rx";
544 power-domains = <&cpg>;
545 status = "disabled";
546 };
547
548 hscif4: serial@e66b0000 {
653f502d
GU		 549 compatible = "renesas,hscif-r8a7795",
550 "renesas,rcar-gen3-hscif",
551 "renesas,hscif";
4fa04299
GU		 552 reg = <0 0xe66b0000 0 96>;
553 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 554 clocks = <&cpg CPG_MOD 516>,
555 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
556 <&scif_clk>;
557 clock-names = "fck", "brg_int", "scif_clk";
4fa04299
GU		 558 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
559 dma-names = "tx", "rx";
560 power-domains = <&cpg>;
561 status = "disabled";
562 };
563
49af46b4 564 scif0: serial@e6e60000 {
653f502d
GU		 565 compatible = "renesas,scif-r8a7795",
566 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 567 reg = <0 0xe6e60000 0 64>;
568 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 569 clocks = <&cpg CPG_MOD 207>,
570 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
571 <&scif_clk>;
572 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 573 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
574 dma-names = "tx", "rx";
575 power-domains = <&cpg>;
576 status = "disabled";
577 };
578
579 scif1: serial@e6e68000 {
653f502d
GU		 580 compatible = "renesas,scif-r8a7795",
581 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 582 reg = <0 0xe6e68000 0 64>;
583 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 584 clocks = <&cpg CPG_MOD 206>,
585 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
586 <&scif_clk>;
587 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 588 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
589 dma-names = "tx", "rx";
590 power-domains = <&cpg>;
591 status = "disabled";
592 };
593
594 scif2: serial@e6e88000 {
653f502d
GU		 595 compatible = "renesas,scif-r8a7795",
596 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 597 reg = <0 0xe6e88000 0 64>;
598 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 599 clocks = <&cpg CPG_MOD 310>,
600 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
601 <&scif_clk>;
602 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 603 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
604 dma-names = "tx", "rx";
605 power-domains = <&cpg>;
606 status = "disabled";
607 };
608
609 scif3: serial@e6c50000 {
653f502d
GU		 610 compatible = "renesas,scif-r8a7795",
611 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 612 reg = <0 0xe6c50000 0 64>;
613 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 614 clocks = <&cpg CPG_MOD 204>,
615 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
616 <&scif_clk>;
617 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 618 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
619 dma-names = "tx", "rx";
620 power-domains = <&cpg>;
621 status = "disabled";
622 };
623
624 scif4: serial@e6c40000 {
653f502d
GU		 625 compatible = "renesas,scif-r8a7795",
626 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 627 reg = <0 0xe6c40000 0 64>;
628 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 629 clocks = <&cpg CPG_MOD 203>,
630 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
631 <&scif_clk>;
632 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 633 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
634 dma-names = "tx", "rx";
635 power-domains = <&cpg>;
636 status = "disabled";
637 };
638
639 scif5: serial@e6f30000 {
653f502d
GU		 640 compatible = "renesas,scif-r8a7795",
641 "renesas,rcar-gen3-scif", "renesas,scif";
49af46b4
GU		 642 reg = <0 0xe6f30000 0 64>;
643 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
3da41e4c
GU		 644 clocks = <&cpg CPG_MOD 202>,
645 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
646 <&scif_clk>;
647 clock-names = "fck", "brg_int", "scif_clk";
49af46b4
GU		 648 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
649 dma-names = "tx", "rx";
650 power-domains = <&cpg>;
651 status = "disabled";
652 };
32bc0c51
KM		 653
654 i2c0: i2c@e6500000 {
655 #address-cells = <1>;
656 #size-cells = <0>;
657 compatible = "renesas,i2c-r8a7795";
658 reg = <0 0xe6500000 0 0x40>;
659 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
660 clocks = <&cpg CPG_MOD 931>;
661 power-domains = <&cpg>;
9036a730 662 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 663 status = "disabled";
664 };
665
666 i2c1: i2c@e6508000 {
667 #address-cells = <1>;
668 #size-cells = <0>;
669 compatible = "renesas,i2c-r8a7795";
670 reg = <0 0xe6508000 0 0x40>;
671 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&cpg CPG_MOD 930>;
673 power-domains = <&cpg>;
9036a730 674 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 675 status = "disabled";
676 };
677
678 i2c2: i2c@e6510000 {
679 #address-cells = <1>;
680 #size-cells = <0>;
681 compatible = "renesas,i2c-r8a7795";
682 reg = <0 0xe6510000 0 0x40>;
683 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
684 clocks = <&cpg CPG_MOD 929>;
685 power-domains = <&cpg>;
9036a730 686 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 687 status = "disabled";
688 };
689
690 i2c3: i2c@e66d0000 {
691 #address-cells = <1>;
692 #size-cells = <0>;
693 compatible = "renesas,i2c-r8a7795";
694 reg = <0 0xe66d0000 0 0x40>;
695 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
696 clocks = <&cpg CPG_MOD 928>;
697 power-domains = <&cpg>;
9036a730 698 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 699 status = "disabled";
700 };
701
702 i2c4: i2c@e66d8000 {
703 #address-cells = <1>;
704 #size-cells = <0>;
705 compatible = "renesas,i2c-r8a7795";
706 reg = <0 0xe66d8000 0 0x40>;
707 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
708 clocks = <&cpg CPG_MOD 927>;
709 power-domains = <&cpg>;
9036a730 710 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 711 status = "disabled";
712 };
713
714 i2c5: i2c@e66e0000 {
715 #address-cells = <1>;
716 #size-cells = <0>;
717 compatible = "renesas,i2c-r8a7795";
718 reg = <0 0xe66e0000 0 0x40>;
719 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
720 clocks = <&cpg CPG_MOD 919>;
721 power-domains = <&cpg>;
9036a730 722 i2c-scl-internal-delay-ns = <110>;
32bc0c51
KM		 723 status = "disabled";
724 };
725
726 i2c6: i2c@e66e8000 {
727 #address-cells = <1>;
728 #size-cells = <0>;
729 compatible = "renesas,i2c-r8a7795";
730 reg = <0 0xe66e8000 0 0x40>;
731 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
732 clocks = <&cpg CPG_MOD 918>;
733 power-domains = <&cpg>;
9036a730 734 i2c-scl-internal-delay-ns = <6>;
32bc0c51
KM		 735 status = "disabled";
736 };
623197b9
KM		 737
738 rcar_sound: sound@ec500000 {
739 /*
740 * #sound-dai-cells is required
741 *
742 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
743 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
744 */
745 /*
746 * #clock-cells is required for audio_clkout0/1/2/3
747 *
748 * clkout : #clock-cells = <0>; <&rcar_sound>;
749 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
750 */
751 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
752 reg = <0 0xec500000 0 0x1000>, /* SCU */
753 <0 0xec5a0000 0 0x100>, /* ADG */
754 <0 0xec540000 0 0x1000>, /* SSIU */
755 <0 0xec541000 0 0x280>, /* SSI */
756 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
757 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
758
759 clocks = <&cpg CPG_MOD 1005>,
760 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
761 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
762 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
763 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
764 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
b868ff51
KM		 765 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
766 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
767 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
768 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
769 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
b9dd9450 770 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
623197b9
KM		 771 <&audio_clk_a>, <&audio_clk_b>,
772 <&audio_clk_c>,
773 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
774 clock-names = "ssi-all",
775 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
776 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
777 "ssi.1", "ssi.0",
b868ff51
KM		 778 "src.9", "src.8", "src.7", "src.6",
779 "src.5", "src.4", "src.3", "src.2",
780 "src.1", "src.0",
b9dd9450 781 "dvc.0", "dvc.1",
623197b9
KM		 782 "clk_a", "clk_b", "clk_c", "clk_i";
783 power-domains = <&cpg>;
784 status = "disabled";
785
b9dd9450
KM		 786 rcar_sound,dvc {
787 dvc0: dvc@0 {
788 dmas = <&audma0 0xbc>;
789 dma-names = "tx";
790 };
791 dvc1: dvc@1 {
792 dmas = <&audma0 0xbe>;
793 dma-names = "tx";
794 };
795 };
796
b868ff51
KM		 797 rcar_sound,src {
798 src0: src@0 {
799 interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
800 dmas = <&audma0 0x85>, <&audma1 0x9a>;
801 dma-names = "rx", "tx";
802 };
803 src1: src@1 {
804 interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>;
805 dmas = <&audma0 0x87>, <&audma1 0x9c>;
806 dma-names = "rx", "tx";
807 };
808 src2: src@2 {
809 interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>;
810 dmas = <&audma0 0x89>, <&audma1 0x9e>;
811 dma-names = "rx", "tx";
812 };
813 src3: src@3 {
814 interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>;
815 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
816 dma-names = "rx", "tx";
817 };
818 src4: src@4 {
819 interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>;
820 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
821 dma-names = "rx", "tx";
822 };
823 src5: src@5 {
824 interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>;
825 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
826 dma-names = "rx", "tx";
827 };
828 src6: src@6 {
829 interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>;
830 dmas = <&audma0 0x91>, <&audma1 0xb4>;
831 dma-names = "rx", "tx";
832 };
833 src7: src@7 {
834 interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>;
835 dmas = <&audma0 0x93>, <&audma1 0xb6>;
836 dma-names = "rx", "tx";
837 };
838 src8: src@8 {
839 interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>;
840 dmas = <&audma0 0x95>, <&audma1 0xb8>;
841 dma-names = "rx", "tx";
842 };
843 src9: src@9 {
844 interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>;
845 dmas = <&audma0 0x97>, <&audma1 0xba>;
846 dma-names = "rx", "tx";
847 };
848 };
849
623197b9
KM		 850 rcar_sound,ssi {
851 ssi0: ssi@0 {
852 interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 853 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
854 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 855 };
856 ssi1: ssi@1 {
857 interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 858 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
859 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 860 };
861 ssi2: ssi@2 {
862 interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 863 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
864 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 865 };
866 ssi3: ssi@3 {
867 interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 868 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
869 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 870 };
871 ssi4: ssi@4 {
872 interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 873 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
874 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 875 };
876 ssi5: ssi@5 {
877 interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 878 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
879 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 880 };
881 ssi6: ssi@6 {
882 interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 883 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
884 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 885 };
886 ssi7: ssi@7 {
887 interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 888 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
889 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 890 };
891 ssi8: ssi@8 {
892 interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 893 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
894 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 895 };
896 ssi9: ssi@9 {
897 interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
10d18ab8
KM		 898 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
899 dma-names = "rx", "tx", "rxu", "txu";
623197b9
KM		 900 };
901 };
902 };
4c13472b
KA		 903
904 sata: sata@ee300000 {
905 compatible = "renesas,sata-r8a7795";
906 reg = <0 0xee300000 0 0x1fff>;
907 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2eb2b506 908 clocks = <&cpg CPG_MOD 815>;
4c13472b
KA		 909 status = "disabled";
910 };
171f2ef8
YS		 911
912 xhci0: usb@ee000000 {
913 compatible = "renesas,xhci-r8a7795";
914 reg = <0 0xee000000 0 0xc00>;
915 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&cpg CPG_MOD 328>;
917 power-domains = <&cpg>;
918 status = "disabled";
919 };
920
921 xhci1: usb@ee0400000 {
922 compatible = "renesas,xhci-r8a7795";
923 reg = <0 0xee040000 0 0xc00>;
924 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
925 clocks = <&cpg CPG_MOD 327>;
926 power-domains = <&cpg>;
927 status = "disabled";
928 };
652a4306
YS		 929
930 usb_dmac0: dma-controller@e65a0000 {
931 compatible = "renesas,r8a7795-usb-dmac",
932 "renesas,usb-dmac";
933 reg = <0 0xe65a0000 0 0x100>;
934 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
935 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
936 interrupt-names = "ch0", "ch1";
937 clocks = <&cpg CPG_MOD 330>;
938 power-domains = <&cpg>;
939 #dma-cells = <1>;
940 dma-channels = <2>;
941 };
942
943 usb_dmac1: dma-controller@e65b0000 {
944 compatible = "renesas,r8a7795-usb-dmac",
945 "renesas,usb-dmac";
946 reg = <0 0xe65b0000 0 0x100>;
947 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
948 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
949 interrupt-names = "ch0", "ch1";
950 clocks = <&cpg CPG_MOD 331>;
951 power-domains = <&cpg>;
952 #dma-cells = <1>;
953 dma-channels = <2>;
954 };
26a7e06d
SH		 955 };
956};
Linux 6.x block layer and io_uring tree(s)