projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 26a7e06d SH |
1 | /* |
| 2 | * Device Tree Source for the r8a7795 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
| 26a7e06d SH |
12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 13 | ||
| 14 | / { | |
| 15 | compatible = "renesas,r8a7795"; | |
| 16 | #address-cells = <2>; | |
| 17 | #size-cells = <2>; | |
| 18 | ||
| 32bc0c51 KM |
19 | aliases { |
| 20 | i2c0 = &i2c0; | |
| 21 | i2c1 = &i2c1; | |
| 22 | i2c2 = &i2c2; | |
| 23 | i2c3 = &i2c3; | |
| 24 | i2c4 = &i2c4; | |
| 25 | i2c5 = &i2c5; | |
| 26 | i2c6 = &i2c6; | |
| 27 | }; | |
| 28 | ||
| 12e51557 GI |
29 | psci { |
| 30 | compatible = "arm,psci-0.2"; | |
| 31 | method = "smc"; | |
| 32 | }; | |
| 33 | ||
| 26a7e06d SH |
34 | cpus { |
| 35 | #address-cells = <1>; | |
| 36 | #size-cells = <0>; | |
| 37 | ||
| 26a7e06d SH |
38 | a57_0: cpu@0 { |
| 39 | compatible = "arm,cortex-a57", "arm,armv8"; | |
| 40 | reg = <0x0>; | |
| 41 | device_type = "cpu"; | |
| 12e51557 | 42 | enable-method = "psci"; |
| 26a7e06d | 43 | }; |
| 0ed1a79e GI |
44 | |
| 45 | a57_1: cpu@1 { | |
| 46 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 47 | reg = <0x1>; | |
| 48 | device_type = "cpu"; | |
| 49 | enable-method = "psci"; | |
| 50 | }; | |
| 51 | a57_2: cpu@2 { | |
| 52 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 53 | reg = <0x2>; | |
| 54 | device_type = "cpu"; | |
| 55 | enable-method = "psci"; | |
| 56 | }; | |
| 57 | a57_3: cpu@3 { | |
| 58 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 59 | reg = <0x3>; | |
| 60 | device_type = "cpu"; | |
| 61 | enable-method = "psci"; | |
| 62 | }; | |
| 26a7e06d SH |
63 | }; |
| 64 | ||
| 65 | extal_clk: extal { | |
| 66 | compatible = "fixed-clock"; | |
| 67 | #clock-cells = <0>; | |
| 68 | /* This value must be overridden by the board */ | |
| 69 | clock-frequency = <0>; | |
| 70 | }; | |
| 71 | ||
| 72 | extalr_clk: extalr { | |
| 73 | compatible = "fixed-clock"; | |
| 74 | #clock-cells = <0>; | |
| 75 | /* This value must be overridden by the board */ | |
| 76 | clock-frequency = <0>; | |
| 77 | }; | |
| 78 | ||
| 623197b9 KM |
79 | /* |
| 80 | * The external audio clocks are configured as 0 Hz fixed frequency | |
| 81 | * clocks by default. | |
| 82 | * Boards that provide audio clocks should override them. | |
| 83 | */ | |
| 84 | audio_clk_a: audio_clk_a { | |
| 85 | compatible = "fixed-clock"; | |
| 86 | #clock-cells = <0>; | |
| 87 | clock-frequency = <0>; | |
| 88 | }; | |
| 89 | ||
| 90 | audio_clk_b: audio_clk_b { | |
| 91 | compatible = "fixed-clock"; | |
| 92 | #clock-cells = <0>; | |
| 93 | clock-frequency = <0>; | |
| 94 | }; | |
| 95 | ||
| 96 | audio_clk_c: audio_clk_c { | |
| 97 | compatible = "fixed-clock"; | |
| 98 | #clock-cells = <0>; | |
| 99 | clock-frequency = <0>; | |
| 100 | }; | |
| 101 | ||
| 26a7e06d SH |
102 | soc { |
| 103 | compatible = "simple-bus"; | |
| 104 | interrupt-parent = <&gic>; | |
| 0ed1a79e | 105 | |
| 26a7e06d SH |
106 | #address-cells = <2>; |
| 107 | #size-cells = <2>; | |
| 108 | ranges; | |
| 109 | ||
| 110 | gic: interrupt-controller@0xf1010000 { | |
| 111 | compatible = "arm,gic-400"; | |
| 112 | #interrupt-cells = <3>; | |
| 113 | #address-cells = <0>; | |
| 114 | interrupt-controller; | |
| 115 | reg = <0x0 0xf1010000 0 0x1000>, | |
| 116 | <0x0 0xf1020000 0 0x2000>; | |
| 117 | interrupts = <GIC_PPI 9 | |
| 0ed1a79e | 118 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| 26a7e06d SH |
119 | }; |
| 120 | ||
| 7b08623a TK |
121 | gpio0: gpio@e6050000 { |
| 122 | compatible = "renesas,gpio-r8a7795", | |
| 123 | "renesas,gpio-rcar"; | |
| 124 | reg = <0 0xe6050000 0 0x50>; | |
| 125 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
| 126 | #gpio-cells = <2>; | |
| 127 | gpio-controller; | |
| 128 | gpio-ranges = <&pfc 0 0 16>; | |
| 129 | #interrupt-cells = <2>; | |
| 130 | interrupt-controller; | |
| 131 | clocks = <&cpg CPG_MOD 912>; | |
| 132 | power-domains = <&cpg>; | |
| 133 | }; | |
| 134 | ||
| 135 | gpio1: gpio@e6051000 { | |
| 136 | compatible = "renesas,gpio-r8a7795", | |
| 137 | "renesas,gpio-rcar"; | |
| 138 | reg = <0 0xe6051000 0 0x50>; | |
| 139 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
| 140 | #gpio-cells = <2>; | |
| 141 | gpio-controller; | |
| 142 | gpio-ranges = <&pfc 0 32 28>; | |
| 143 | #interrupt-cells = <2>; | |
| 144 | interrupt-controller; | |
| 145 | clocks = <&cpg CPG_MOD 911>; | |
| 146 | power-domains = <&cpg>; | |
| 147 | }; | |
| 148 | ||
| 149 | gpio2: gpio@e6052000 { | |
| 150 | compatible = "renesas,gpio-r8a7795", | |
| 151 | "renesas,gpio-rcar"; | |
| 152 | reg = <0 0xe6052000 0 0x50>; | |
| 153 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| 154 | #gpio-cells = <2>; | |
| 155 | gpio-controller; | |
| 156 | gpio-ranges = <&pfc 0 64 15>; | |
| 157 | #interrupt-cells = <2>; | |
| 158 | interrupt-controller; | |
| 159 | clocks = <&cpg CPG_MOD 910>; | |
| 160 | power-domains = <&cpg>; | |
| 161 | }; | |
| 162 | ||
| 163 | gpio3: gpio@e6053000 { | |
| 164 | compatible = "renesas,gpio-r8a7795", | |
| 165 | "renesas,gpio-rcar"; | |
| 166 | reg = <0 0xe6053000 0 0x50>; | |
| 167 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 168 | #gpio-cells = <2>; | |
| 169 | gpio-controller; | |
| 170 | gpio-ranges = <&pfc 0 96 16>; | |
| 171 | #interrupt-cells = <2>; | |
| 172 | interrupt-controller; | |
| 173 | clocks = <&cpg CPG_MOD 909>; | |
| 174 | power-domains = <&cpg>; | |
| 175 | }; | |
| 176 | ||
| 177 | gpio4: gpio@e6054000 { | |
| 178 | compatible = "renesas,gpio-r8a7795", | |
| 179 | "renesas,gpio-rcar"; | |
| 180 | reg = <0 0xe6054000 0 0x50>; | |
| 181 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
| 182 | #gpio-cells = <2>; | |
| 183 | gpio-controller; | |
| 184 | gpio-ranges = <&pfc 0 128 18>; | |
| 185 | #interrupt-cells = <2>; | |
| 186 | interrupt-controller; | |
| 187 | clocks = <&cpg CPG_MOD 908>; | |
| 188 | power-domains = <&cpg>; | |
| 189 | }; | |
| 190 | ||
| 191 | gpio5: gpio@e6055000 { | |
| 192 | compatible = "renesas,gpio-r8a7795", | |
| 193 | "renesas,gpio-rcar"; | |
| 194 | reg = <0 0xe6055000 0 0x50>; | |
| 195 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| 196 | #gpio-cells = <2>; | |
| 197 | gpio-controller; | |
| 198 | gpio-ranges = <&pfc 0 160 26>; | |
| 199 | #interrupt-cells = <2>; | |
| 200 | interrupt-controller; | |
| 201 | clocks = <&cpg CPG_MOD 907>; | |
| 202 | power-domains = <&cpg>; | |
| 203 | }; | |
| 204 | ||
| 205 | gpio6: gpio@e6055400 { | |
| 206 | compatible = "renesas,gpio-r8a7795", | |
| 207 | "renesas,gpio-rcar"; | |
| 208 | reg = <0 0xe6055400 0 0x50>; | |
| 209 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 210 | #gpio-cells = <2>; | |
| 211 | gpio-controller; | |
| 212 | gpio-ranges = <&pfc 0 192 32>; | |
| 213 | #interrupt-cells = <2>; | |
| 214 | interrupt-controller; | |
| 215 | clocks = <&cpg CPG_MOD 906>; | |
| 216 | power-domains = <&cpg>; | |
| 217 | }; | |
| 218 | ||
| 219 | gpio7: gpio@e6055800 { | |
| 220 | compatible = "renesas,gpio-r8a7795", | |
| 221 | "renesas,gpio-rcar"; | |
| 222 | reg = <0 0xe6055800 0 0x50>; | |
| 223 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 224 | #gpio-cells = <2>; | |
| 225 | gpio-controller; | |
| 226 | gpio-ranges = <&pfc 0 224 4>; | |
| 227 | #interrupt-cells = <2>; | |
| 228 | interrupt-controller; | |
| 229 | clocks = <&cpg CPG_MOD 905>; | |
| 230 | power-domains = <&cpg>; | |
| 231 | }; | |
| 232 | ||
| a6b6b478 YH |
233 | pmu { |
| 234 | compatible = "arm,armv8-pmuv3"; | |
| 235 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, | |
| 236 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, | |
| 237 | <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | |
| 238 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
| 239 | interrupt-affinity = <&a57_0>, | |
| 240 | <&a57_1>, | |
| 241 | <&a57_2>, | |
| 242 | <&a57_3>; | |
| 243 | }; | |
| 244 | ||
| 26a7e06d SH |
245 | timer { |
| 246 | compatible = "arm,armv8-timer"; | |
| 247 | interrupts = <GIC_PPI 13 | |
| 0ed1a79e | 248 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 249 | <GIC_PPI 14 |
| 0ed1a79e | 250 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 251 | <GIC_PPI 11 |
| 0ed1a79e | 252 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 253 | <GIC_PPI 10 |
| 0ed1a79e | 254 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| 26a7e06d SH |
255 | }; |
| 256 | ||
| 257 | cpg: clock-controller@e6150000 { | |
| 258 | compatible = "renesas,r8a7795-cpg-mssr"; | |
| 259 | reg = <0 0xe6150000 0 0x1000>; | |
| 260 | clocks = <&extal_clk>, <&extalr_clk>; | |
| 261 | clock-names = "extal", "extalr"; | |
| 262 | #clock-cells = <2>; | |
| 263 | #power-domain-cells = <0>; | |
| 264 | }; | |
| d9202126 | 265 | |
| b281f4c8 KM |
266 | audma0: dma-controller@ec700000 { |
| 267 | compatible = "renesas,rcar-dmac"; | |
| 268 | reg = <0 0xec700000 0 0x10000>; | |
| 269 | interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH | |
| 270 | 0 320 IRQ_TYPE_LEVEL_HIGH | |
| 271 | 0 321 IRQ_TYPE_LEVEL_HIGH | |
| 272 | 0 322 IRQ_TYPE_LEVEL_HIGH | |
| 273 | 0 323 IRQ_TYPE_LEVEL_HIGH | |
| 274 | 0 324 IRQ_TYPE_LEVEL_HIGH | |
| 275 | 0 325 IRQ_TYPE_LEVEL_HIGH | |
| 276 | 0 326 IRQ_TYPE_LEVEL_HIGH | |
| 277 | 0 327 IRQ_TYPE_LEVEL_HIGH | |
| 278 | 0 328 IRQ_TYPE_LEVEL_HIGH | |
| 279 | 0 329 IRQ_TYPE_LEVEL_HIGH | |
| 280 | 0 330 IRQ_TYPE_LEVEL_HIGH | |
| 281 | 0 331 IRQ_TYPE_LEVEL_HIGH | |
| 282 | 0 332 IRQ_TYPE_LEVEL_HIGH | |
| 283 | 0 333 IRQ_TYPE_LEVEL_HIGH | |
| 284 | 0 334 IRQ_TYPE_LEVEL_HIGH | |
| 285 | 0 335 IRQ_TYPE_LEVEL_HIGH>; | |
| 286 | interrupt-names = "error", | |
| 287 | "ch0", "ch1", "ch2", "ch3", | |
| 288 | "ch4", "ch5", "ch6", "ch7", | |
| 289 | "ch8", "ch9", "ch10", "ch11", | |
| 290 | "ch12", "ch13", "ch14", "ch15"; | |
| 291 | clocks = <&cpg CPG_MOD 502>; | |
| 292 | clock-names = "fck"; | |
| 293 | power-domains = <&cpg>; | |
| 294 | #dma-cells = <1>; | |
| 295 | dma-channels = <16>; | |
| 296 | }; | |
| 297 | ||
| 298 | audma1: dma-controller@ec720000 { | |
| 299 | compatible = "renesas,rcar-dmac"; | |
| 300 | reg = <0 0xec720000 0 0x10000>; | |
| 301 | interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH | |
| 302 | 0 336 IRQ_TYPE_LEVEL_HIGH | |
| 303 | 0 337 IRQ_TYPE_LEVEL_HIGH | |
| 304 | 0 338 IRQ_TYPE_LEVEL_HIGH | |
| 305 | 0 339 IRQ_TYPE_LEVEL_HIGH | |
| 306 | 0 340 IRQ_TYPE_LEVEL_HIGH | |
| 307 | 0 341 IRQ_TYPE_LEVEL_HIGH | |
| 308 | 0 342 IRQ_TYPE_LEVEL_HIGH | |
| 309 | 0 343 IRQ_TYPE_LEVEL_HIGH | |
| 310 | 0 344 IRQ_TYPE_LEVEL_HIGH | |
| 311 | 0 345 IRQ_TYPE_LEVEL_HIGH | |
| 312 | 0 346 IRQ_TYPE_LEVEL_HIGH | |
| 313 | 0 347 IRQ_TYPE_LEVEL_HIGH | |
| 314 | 0 348 IRQ_TYPE_LEVEL_HIGH | |
| 315 | 0 349 IRQ_TYPE_LEVEL_HIGH | |
| 316 | 0 382 IRQ_TYPE_LEVEL_HIGH | |
| 317 | 0 383 IRQ_TYPE_LEVEL_HIGH>; | |
| 318 | interrupt-names = "error", | |
| 319 | "ch0", "ch1", "ch2", "ch3", | |
| 320 | "ch4", "ch5", "ch6", "ch7", | |
| 321 | "ch8", "ch9", "ch10", "ch11", | |
| 322 | "ch12", "ch13", "ch14", "ch15"; | |
| 323 | clocks = <&cpg CPG_MOD 501>; | |
| 324 | clock-names = "fck"; | |
| 325 | power-domains = <&cpg>; | |
| 326 | #dma-cells = <1>; | |
| 327 | dma-channels = <16>; | |
| 328 | }; | |
| 329 | ||
| 9241844a KM |
330 | pfc: pfc@e6060000 { |
| 331 | compatible = "renesas,pfc-r8a7795"; | |
| 332 | reg = <0 0xe6060000 0 0x50c>; | |
| 333 | }; | |
| 334 | ||
| d9202126 | 335 | dmac0: dma-controller@e6700000 { |
| e2102cea GU |
336 | compatible = "renesas,dmac-r8a7795", |
| 337 | "renesas,rcar-dmac"; | |
| 338 | reg = <0 0xe6700000 0 0x10000>; | |
| 339 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
| 340 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
| 341 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
| 342 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
| 343 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
| 344 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
| 345 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
| 346 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
| 347 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
| 348 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
| 349 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
| 350 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
| 351 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
| 352 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
| 353 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
| 354 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
| 355 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
| 356 | interrupt-names = "error", | |
| 357 | "ch0", "ch1", "ch2", "ch3", | |
| 358 | "ch4", "ch5", "ch6", "ch7", | |
| 359 | "ch8", "ch9", "ch10", "ch11", | |
| 360 | "ch12", "ch13", "ch14", "ch15"; | |
| 361 | clocks = <&cpg CPG_MOD 219>; | |
| 362 | clock-names = "fck"; | |
| 363 | power-domains = <&cpg>; | |
| 364 | #dma-cells = <1>; | |
| 365 | dma-channels = <16>; | |
| d9202126 GU |
366 | }; |
| 367 | ||
| 368 | dmac1: dma-controller@e7300000 { | |
| e2102cea GU |
369 | compatible = "renesas,dmac-r8a7795", |
| 370 | "renesas,rcar-dmac"; | |
| 371 | reg = <0 0xe7300000 0 0x10000>; | |
| 372 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
| 373 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
| 374 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
| 375 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
| 376 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
| 377 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
| 378 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
| 379 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
| 380 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
| 381 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
| 382 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
| 383 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
| 384 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
| 385 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
| 386 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
| 387 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
| 388 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
| 389 | interrupt-names = "error", | |
| 390 | "ch0", "ch1", "ch2", "ch3", | |
| 391 | "ch4", "ch5", "ch6", "ch7", | |
| 392 | "ch8", "ch9", "ch10", "ch11", | |
| 393 | "ch12", "ch13", "ch14", "ch15"; | |
| 394 | clocks = <&cpg CPG_MOD 218>; | |
| 395 | clock-names = "fck"; | |
| 396 | power-domains = <&cpg>; | |
| 397 | #dma-cells = <1>; | |
| 398 | dma-channels = <16>; | |
| d9202126 GU |
399 | }; |
| 400 | ||
| 401 | dmac2: dma-controller@e7310000 { | |
| e2102cea GU |
402 | compatible = "renesas,dmac-r8a7795", |
| 403 | "renesas,rcar-dmac"; | |
| 404 | reg = <0 0xe7310000 0 0x10000>; | |
| 405 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
| 406 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
| 407 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
| 408 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
| 409 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
| 410 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
| 411 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
| 412 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
| 413 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
| 414 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
| 415 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
| 416 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
| 417 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
| 418 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
| 419 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
| 420 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
| 421 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
| 422 | interrupt-names = "error", | |
| 423 | "ch0", "ch1", "ch2", "ch3", | |
| 424 | "ch4", "ch5", "ch6", "ch7", | |
| 425 | "ch8", "ch9", "ch10", "ch11", | |
| 426 | "ch12", "ch13", "ch14", "ch15"; | |
| 427 | clocks = <&cpg CPG_MOD 217>; | |
| 428 | clock-names = "fck"; | |
| 429 | power-domains = <&cpg>; | |
| 430 | #dma-cells = <1>; | |
| 431 | dma-channels = <16>; | |
| d9202126 | 432 | }; |
| 49af46b4 | 433 | |
| a92843c8 KM |
434 | avb: ethernet@e6800000 { |
| 435 | compatible = "renesas,etheravb-r8a7795"; | |
| 436 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
| 437 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
| 438 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
| 439 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
| 440 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
| 441 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
| 442 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
| 443 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
| 444 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
| 445 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
| 446 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
| 447 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
| 448 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
| 449 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
| 450 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
| 451 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
| 452 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
| 453 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
| 454 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
| 455 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
| 456 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
| 457 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
| 458 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
| 459 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
| 460 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
| 461 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
| 462 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
| 463 | "ch4", "ch5", "ch6", "ch7", | |
| 464 | "ch8", "ch9", "ch10", "ch11", | |
| 465 | "ch12", "ch13", "ch14", "ch15", | |
| 466 | "ch16", "ch17", "ch18", "ch19", | |
| 467 | "ch20", "ch21", "ch22", "ch23", | |
| 468 | "ch24"; | |
| 469 | clocks = <&cpg CPG_MOD 812>; | |
| 470 | power-domains = <&cpg>; | |
| 471 | phy-mode = "rgmii-id"; | |
| 472 | #address-cells = <1>; | |
| 473 | #size-cells = <0>; | |
| 474 | }; | |
| 475 | ||
| 4fa04299 GU |
476 | hscif0: serial@e6540000 { |
| 477 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 478 | reg = <0 0xe6540000 0 96>; | |
| 479 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
| 480 | clocks = <&cpg CPG_MOD 520>; | |
| 481 | clock-names = "sci_ick"; | |
| 482 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; | |
| 483 | dma-names = "tx", "rx"; | |
| 484 | power-domains = <&cpg>; | |
| 485 | status = "disabled"; | |
| 486 | }; | |
| 487 | ||
| 488 | hscif1: serial@e6550000 { | |
| 489 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 490 | reg = <0 0xe6550000 0 96>; | |
| 491 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
| 492 | clocks = <&cpg CPG_MOD 519>; | |
| 493 | clock-names = "sci_ick"; | |
| 494 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; | |
| 495 | dma-names = "tx", "rx"; | |
| 496 | power-domains = <&cpg>; | |
| 497 | status = "disabled"; | |
| 498 | }; | |
| 499 | ||
| 500 | hscif2: serial@e6560000 { | |
| 501 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 502 | reg = <0 0xe6560000 0 96>; | |
| 503 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 504 | clocks = <&cpg CPG_MOD 518>; | |
| 505 | clock-names = "sci_ick"; | |
| 506 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; | |
| 507 | dma-names = "tx", "rx"; | |
| 508 | power-domains = <&cpg>; | |
| 509 | status = "disabled"; | |
| 510 | }; | |
| 511 | ||
| 512 | hscif3: serial@e66a0000 { | |
| 513 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 514 | reg = <0 0xe66a0000 0 96>; | |
| 515 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
| 516 | clocks = <&cpg CPG_MOD 517>; | |
| 517 | clock-names = "sci_ick"; | |
| 518 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; | |
| 519 | dma-names = "tx", "rx"; | |
| 520 | power-domains = <&cpg>; | |
| 521 | status = "disabled"; | |
| 522 | }; | |
| 523 | ||
| 524 | hscif4: serial@e66b0000 { | |
| 525 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 526 | reg = <0 0xe66b0000 0 96>; | |
| 527 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
| 528 | clocks = <&cpg CPG_MOD 516>; | |
| 529 | clock-names = "sci_ick"; | |
| 530 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; | |
| 531 | dma-names = "tx", "rx"; | |
| 532 | power-domains = <&cpg>; | |
| 533 | status = "disabled"; | |
| 534 | }; | |
| 535 | ||
| 49af46b4 GU |
536 | scif0: serial@e6e60000 { |
| 537 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 538 | reg = <0 0xe6e60000 0 64>; | |
| 539 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
| 540 | clocks = <&cpg CPG_MOD 207>; | |
| 541 | clock-names = "sci_ick"; | |
| 542 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; | |
| 543 | dma-names = "tx", "rx"; | |
| 544 | power-domains = <&cpg>; | |
| 545 | status = "disabled"; | |
| 546 | }; | |
| 547 | ||
| 548 | scif1: serial@e6e68000 { | |
| 549 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 550 | reg = <0 0xe6e68000 0 64>; | |
| 551 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
| 552 | clocks = <&cpg CPG_MOD 206>; | |
| 553 | clock-names = "sci_ick"; | |
| 554 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; | |
| 555 | dma-names = "tx", "rx"; | |
| 556 | power-domains = <&cpg>; | |
| 557 | status = "disabled"; | |
| 558 | }; | |
| 559 | ||
| 560 | scif2: serial@e6e88000 { | |
| 561 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 562 | reg = <0 0xe6e88000 0 64>; | |
| 563 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 564 | clocks = <&cpg CPG_MOD 310>; | |
| 565 | clock-names = "sci_ick"; | |
| 566 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; | |
| 567 | dma-names = "tx", "rx"; | |
| 568 | power-domains = <&cpg>; | |
| 569 | status = "disabled"; | |
| 570 | }; | |
| 571 | ||
| 572 | scif3: serial@e6c50000 { | |
| 573 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 574 | reg = <0 0xe6c50000 0 64>; | |
| 575 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
| 576 | clocks = <&cpg CPG_MOD 204>; | |
| 577 | clock-names = "sci_ick"; | |
| 578 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; | |
| 579 | dma-names = "tx", "rx"; | |
| 580 | power-domains = <&cpg>; | |
| 581 | status = "disabled"; | |
| 582 | }; | |
| 583 | ||
| 584 | scif4: serial@e6c40000 { | |
| 585 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 586 | reg = <0 0xe6c40000 0 64>; | |
| 587 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
| 588 | clocks = <&cpg CPG_MOD 203>; | |
| 589 | clock-names = "sci_ick"; | |
| 590 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; | |
| 591 | dma-names = "tx", "rx"; | |
| 592 | power-domains = <&cpg>; | |
| 593 | status = "disabled"; | |
| 594 | }; | |
| 595 | ||
| 596 | scif5: serial@e6f30000 { | |
| 597 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 598 | reg = <0 0xe6f30000 0 64>; | |
| 599 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
| 600 | clocks = <&cpg CPG_MOD 202>; | |
| 601 | clock-names = "sci_ick"; | |
| 602 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; | |
| 603 | dma-names = "tx", "rx"; | |
| 604 | power-domains = <&cpg>; | |
| 605 | status = "disabled"; | |
| 606 | }; | |
| 32bc0c51 KM |
607 | |
| 608 | i2c0: i2c@e6500000 { | |
| 609 | #address-cells = <1>; | |
| 610 | #size-cells = <0>; | |
| 611 | compatible = "renesas,i2c-r8a7795"; | |
| 612 | reg = <0 0xe6500000 0 0x40>; | |
| 613 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
| 614 | clocks = <&cpg CPG_MOD 931>; | |
| 615 | power-domains = <&cpg>; | |
| 9036a730 | 616 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
617 | status = "disabled"; |
| 618 | }; | |
| 619 | ||
| 620 | i2c1: i2c@e6508000 { | |
| 621 | #address-cells = <1>; | |
| 622 | #size-cells = <0>; | |
| 623 | compatible = "renesas,i2c-r8a7795"; | |
| 624 | reg = <0 0xe6508000 0 0x40>; | |
| 625 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
| 626 | clocks = <&cpg CPG_MOD 930>; | |
| 627 | power-domains = <&cpg>; | |
| 9036a730 | 628 | i2c-scl-internal-delay-ns = <6>; |
| 32bc0c51 KM |
629 | status = "disabled"; |
| 630 | }; | |
| 631 | ||
| 632 | i2c2: i2c@e6510000 { | |
| 633 | #address-cells = <1>; | |
| 634 | #size-cells = <0>; | |
| 635 | compatible = "renesas,i2c-r8a7795"; | |
| 636 | reg = <0 0xe6510000 0 0x40>; | |
| 637 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
| 638 | clocks = <&cpg CPG_MOD 929>; | |
| 639 | power-domains = <&cpg>; | |
| 9036a730 | 640 | i2c-scl-internal-delay-ns = <6>; |
| 32bc0c51 KM |
641 | status = "disabled"; |
| 642 | }; | |
| 643 | ||
| 644 | i2c3: i2c@e66d0000 { | |
| 645 | #address-cells = <1>; | |
| 646 | #size-cells = <0>; | |
| 647 | compatible = "renesas,i2c-r8a7795"; | |
| 648 | reg = <0 0xe66d0000 0 0x40>; | |
| 649 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
| 650 | clocks = <&cpg CPG_MOD 928>; | |
| 651 | power-domains = <&cpg>; | |
| 9036a730 | 652 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
653 | status = "disabled"; |
| 654 | }; | |
| 655 | ||
| 656 | i2c4: i2c@e66d8000 { | |
| 657 | #address-cells = <1>; | |
| 658 | #size-cells = <0>; | |
| 659 | compatible = "renesas,i2c-r8a7795"; | |
| 660 | reg = <0 0xe66d8000 0 0x40>; | |
| 661 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
| 662 | clocks = <&cpg CPG_MOD 927>; | |
| 663 | power-domains = <&cpg>; | |
| 9036a730 | 664 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
665 | status = "disabled"; |
| 666 | }; | |
| 667 | ||
| 668 | i2c5: i2c@e66e0000 { | |
| 669 | #address-cells = <1>; | |
| 670 | #size-cells = <0>; | |
| 671 | compatible = "renesas,i2c-r8a7795"; | |
| 672 | reg = <0 0xe66e0000 0 0x40>; | |
| 673 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
| 674 | clocks = <&cpg CPG_MOD 919>; | |
| 675 | power-domains = <&cpg>; | |
| 9036a730 | 676 | i2c-scl-internal-delay-ns = <110>; |
| 32bc0c51 KM |
677 | status = "disabled"; |
| 678 | }; | |
| 679 | ||
| 680 | i2c6: i2c@e66e8000 { | |
| 681 | #address-cells = <1>; | |
| 682 | #size-cells = <0>; | |
| 683 | compatible = "renesas,i2c-r8a7795"; | |
| 684 | reg = <0 0xe66e8000 0 0x40>; | |
| 685 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
| 686 | clocks = <&cpg CPG_MOD 918>; | |
| 687 | power-domains = <&cpg>; | |
| 9036a730 | 688 | i2c-scl-internal-delay-ns = <6>; |
| 32bc0c51 KM |
689 | status = "disabled"; |
| 690 | }; | |
| 623197b9 KM |
691 | |
| 692 | rcar_sound: sound@ec500000 { | |
| 693 | /* | |
| 694 | * #sound-dai-cells is required | |
| 695 | * | |
| 696 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 697 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 698 | */ | |
| 699 | /* | |
| 700 | * #clock-cells is required for audio_clkout0/1/2/3 | |
| 701 | * | |
| 702 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
| 703 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
| 704 | */ | |
| 705 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
| 706 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
| 707 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 708 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 709 | <0 0xec541000 0 0x280>, /* SSI */ | |
| 710 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
| 711 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 712 | ||
| 713 | clocks = <&cpg CPG_MOD 1005>, | |
| 714 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
| 715 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
| 716 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
| 717 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
| 718 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
| b868ff51 KM |
719 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 720 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
| 721 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
| 722 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
| 723 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
| b9dd9450 | 724 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 623197b9 KM |
725 | <&audio_clk_a>, <&audio_clk_b>, |
| 726 | <&audio_clk_c>, | |
| 727 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
| 728 | clock-names = "ssi-all", | |
| 729 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
| 730 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
| 731 | "ssi.1", "ssi.0", | |
| b868ff51 KM |
732 | "src.9", "src.8", "src.7", "src.6", |
| 733 | "src.5", "src.4", "src.3", "src.2", | |
| 734 | "src.1", "src.0", | |
| b9dd9450 | 735 | "dvc.0", "dvc.1", |
| 623197b9 KM |
736 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 737 | power-domains = <&cpg>; | |
| 738 | status = "disabled"; | |
| 739 | ||
| b9dd9450 KM |
740 | rcar_sound,dvc { |
| 741 | dvc0: dvc@0 { | |
| 742 | dmas = <&audma0 0xbc>; | |
| 743 | dma-names = "tx"; | |
| 744 | }; | |
| 745 | dvc1: dvc@1 { | |
| 746 | dmas = <&audma0 0xbe>; | |
| 747 | dma-names = "tx"; | |
| 748 | }; | |
| 749 | }; | |
| 750 | ||
| b868ff51 KM |
751 | rcar_sound,src { |
| 752 | src0: src@0 { | |
| 753 | interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; | |
| 754 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
| 755 | dma-names = "rx", "tx"; | |
| 756 | }; | |
| 757 | src1: src@1 { | |
| 758 | interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; | |
| 759 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
| 760 | dma-names = "rx", "tx"; | |
| 761 | }; | |
| 762 | src2: src@2 { | |
| 763 | interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; | |
| 764 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
| 765 | dma-names = "rx", "tx"; | |
| 766 | }; | |
| 767 | src3: src@3 { | |
| 768 | interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; | |
| 769 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
| 770 | dma-names = "rx", "tx"; | |
| 771 | }; | |
| 772 | src4: src@4 { | |
| 773 | interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; | |
| 774 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
| 775 | dma-names = "rx", "tx"; | |
| 776 | }; | |
| 777 | src5: src@5 { | |
| 778 | interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; | |
| 779 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
| 780 | dma-names = "rx", "tx"; | |
| 781 | }; | |
| 782 | src6: src@6 { | |
| 783 | interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; | |
| 784 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
| 785 | dma-names = "rx", "tx"; | |
| 786 | }; | |
| 787 | src7: src@7 { | |
| 788 | interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; | |
| 789 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
| 790 | dma-names = "rx", "tx"; | |
| 791 | }; | |
| 792 | src8: src@8 { | |
| 793 | interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; | |
| 794 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
| 795 | dma-names = "rx", "tx"; | |
| 796 | }; | |
| 797 | src9: src@9 { | |
| 798 | interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; | |
| 799 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
| 800 | dma-names = "rx", "tx"; | |
| 801 | }; | |
| 802 | }; | |
| 803 | ||
| 623197b9 KM |
804 | rcar_sound,ssi { |
| 805 | ssi0: ssi@0 { | |
| 806 | interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
807 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
| 808 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
809 | }; |
| 810 | ssi1: ssi@1 { | |
| 811 | interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
812 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
| 813 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
814 | }; |
| 815 | ssi2: ssi@2 { | |
| 816 | interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
817 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
| 818 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
819 | }; |
| 820 | ssi3: ssi@3 { | |
| 821 | interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
822 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
| 823 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
824 | }; |
| 825 | ssi4: ssi@4 { | |
| 826 | interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
827 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
| 828 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
829 | }; |
| 830 | ssi5: ssi@5 { | |
| 831 | interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
832 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
| 833 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
834 | }; |
| 835 | ssi6: ssi@6 { | |
| 836 | interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
837 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
| 838 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
839 | }; |
| 840 | ssi7: ssi@7 { | |
| 841 | interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
842 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
| 843 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
844 | }; |
| 845 | ssi8: ssi@8 { | |
| 846 | interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
847 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
| 848 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
849 | }; |
| 850 | ssi9: ssi@9 { | |
| 851 | interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
852 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
| 853 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
854 | }; |
| 855 | }; | |
| 856 | }; | |
| 4c13472b KA |
857 | |
| 858 | sata: sata@ee300000 { | |
| 859 | compatible = "renesas,sata-r8a7795"; | |
| 860 | reg = <0 0xee300000 0 0x1fff>; | |
| 861 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
| 2eb2b506 | 862 | clocks = <&cpg CPG_MOD 815>; |
| 4c13472b KA |
863 | status = "disabled"; |
| 864 | }; | |
| 171f2ef8 YS |
865 | |
| 866 | xhci0: usb@ee000000 { | |
| 867 | compatible = "renesas,xhci-r8a7795"; | |
| 868 | reg = <0 0xee000000 0 0xc00>; | |
| 869 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
| 870 | clocks = <&cpg CPG_MOD 328>; | |
| 871 | power-domains = <&cpg>; | |
| 872 | status = "disabled"; | |
| 873 | }; | |
| 874 | ||
| 875 | xhci1: usb@ee0400000 { | |
| 876 | compatible = "renesas,xhci-r8a7795"; | |
| 877 | reg = <0 0xee040000 0 0xc00>; | |
| 878 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
| 879 | clocks = <&cpg CPG_MOD 327>; | |
| 880 | power-domains = <&cpg>; | |
| 881 | status = "disabled"; | |
| 882 | }; | |
| 26a7e06d SH |
883 | }; |
| 884 | }; |