projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 26a7e06d SH |
1 | /* |
| 2 | * Device Tree Source for the r8a7795 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
| 26a7e06d SH |
12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 13 | ||
| 14 | / { | |
| 15 | compatible = "renesas,r8a7795"; | |
| 16 | #address-cells = <2>; | |
| 17 | #size-cells = <2>; | |
| 18 | ||
| 32bc0c51 KM |
19 | aliases { |
| 20 | i2c0 = &i2c0; | |
| 21 | i2c1 = &i2c1; | |
| 22 | i2c2 = &i2c2; | |
| 23 | i2c3 = &i2c3; | |
| 24 | i2c4 = &i2c4; | |
| 25 | i2c5 = &i2c5; | |
| 26 | i2c6 = &i2c6; | |
| 27 | }; | |
| 28 | ||
| 26a7e06d SH |
29 | cpus { |
| 30 | #address-cells = <1>; | |
| 31 | #size-cells = <0>; | |
| 32 | ||
| 33 | /* 1 core only at this point */ | |
| 34 | a57_0: cpu@0 { | |
| 35 | compatible = "arm,cortex-a57", "arm,armv8"; | |
| 36 | reg = <0x0>; | |
| 37 | device_type = "cpu"; | |
| 38 | }; | |
| 39 | }; | |
| 40 | ||
| 41 | extal_clk: extal { | |
| 42 | compatible = "fixed-clock"; | |
| 43 | #clock-cells = <0>; | |
| 44 | /* This value must be overridden by the board */ | |
| 45 | clock-frequency = <0>; | |
| 46 | }; | |
| 47 | ||
| 48 | extalr_clk: extalr { | |
| 49 | compatible = "fixed-clock"; | |
| 50 | #clock-cells = <0>; | |
| 51 | /* This value must be overridden by the board */ | |
| 52 | clock-frequency = <0>; | |
| 53 | }; | |
| 54 | ||
| 623197b9 KM |
55 | /* |
| 56 | * The external audio clocks are configured as 0 Hz fixed frequency | |
| 57 | * clocks by default. | |
| 58 | * Boards that provide audio clocks should override them. | |
| 59 | */ | |
| 60 | audio_clk_a: audio_clk_a { | |
| 61 | compatible = "fixed-clock"; | |
| 62 | #clock-cells = <0>; | |
| 63 | clock-frequency = <0>; | |
| 64 | }; | |
| 65 | ||
| 66 | audio_clk_b: audio_clk_b { | |
| 67 | compatible = "fixed-clock"; | |
| 68 | #clock-cells = <0>; | |
| 69 | clock-frequency = <0>; | |
| 70 | }; | |
| 71 | ||
| 72 | audio_clk_c: audio_clk_c { | |
| 73 | compatible = "fixed-clock"; | |
| 74 | #clock-cells = <0>; | |
| 75 | clock-frequency = <0>; | |
| 76 | }; | |
| 77 | ||
| 26a7e06d SH |
78 | soc { |
| 79 | compatible = "simple-bus"; | |
| 80 | interrupt-parent = <&gic>; | |
| 81 | #address-cells = <2>; | |
| 82 | #size-cells = <2>; | |
| 83 | ranges; | |
| 84 | ||
| 85 | gic: interrupt-controller@0xf1010000 { | |
| 86 | compatible = "arm,gic-400"; | |
| 87 | #interrupt-cells = <3>; | |
| 88 | #address-cells = <0>; | |
| 89 | interrupt-controller; | |
| 90 | reg = <0x0 0xf1010000 0 0x1000>, | |
| 91 | <0x0 0xf1020000 0 0x2000>; | |
| 92 | interrupts = <GIC_PPI 9 | |
| 93 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; | |
| 94 | }; | |
| 95 | ||
| 7b08623a TK |
96 | gpio0: gpio@e6050000 { |
| 97 | compatible = "renesas,gpio-r8a7795", | |
| 98 | "renesas,gpio-rcar"; | |
| 99 | reg = <0 0xe6050000 0 0x50>; | |
| 100 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
| 101 | #gpio-cells = <2>; | |
| 102 | gpio-controller; | |
| 103 | gpio-ranges = <&pfc 0 0 16>; | |
| 104 | #interrupt-cells = <2>; | |
| 105 | interrupt-controller; | |
| 106 | clocks = <&cpg CPG_MOD 912>; | |
| 107 | power-domains = <&cpg>; | |
| 108 | }; | |
| 109 | ||
| 110 | gpio1: gpio@e6051000 { | |
| 111 | compatible = "renesas,gpio-r8a7795", | |
| 112 | "renesas,gpio-rcar"; | |
| 113 | reg = <0 0xe6051000 0 0x50>; | |
| 114 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
| 115 | #gpio-cells = <2>; | |
| 116 | gpio-controller; | |
| 117 | gpio-ranges = <&pfc 0 32 28>; | |
| 118 | #interrupt-cells = <2>; | |
| 119 | interrupt-controller; | |
| 120 | clocks = <&cpg CPG_MOD 911>; | |
| 121 | power-domains = <&cpg>; | |
| 122 | }; | |
| 123 | ||
| 124 | gpio2: gpio@e6052000 { | |
| 125 | compatible = "renesas,gpio-r8a7795", | |
| 126 | "renesas,gpio-rcar"; | |
| 127 | reg = <0 0xe6052000 0 0x50>; | |
| 128 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| 129 | #gpio-cells = <2>; | |
| 130 | gpio-controller; | |
| 131 | gpio-ranges = <&pfc 0 64 15>; | |
| 132 | #interrupt-cells = <2>; | |
| 133 | interrupt-controller; | |
| 134 | clocks = <&cpg CPG_MOD 910>; | |
| 135 | power-domains = <&cpg>; | |
| 136 | }; | |
| 137 | ||
| 138 | gpio3: gpio@e6053000 { | |
| 139 | compatible = "renesas,gpio-r8a7795", | |
| 140 | "renesas,gpio-rcar"; | |
| 141 | reg = <0 0xe6053000 0 0x50>; | |
| 142 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 143 | #gpio-cells = <2>; | |
| 144 | gpio-controller; | |
| 145 | gpio-ranges = <&pfc 0 96 16>; | |
| 146 | #interrupt-cells = <2>; | |
| 147 | interrupt-controller; | |
| 148 | clocks = <&cpg CPG_MOD 909>; | |
| 149 | power-domains = <&cpg>; | |
| 150 | }; | |
| 151 | ||
| 152 | gpio4: gpio@e6054000 { | |
| 153 | compatible = "renesas,gpio-r8a7795", | |
| 154 | "renesas,gpio-rcar"; | |
| 155 | reg = <0 0xe6054000 0 0x50>; | |
| 156 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
| 157 | #gpio-cells = <2>; | |
| 158 | gpio-controller; | |
| 159 | gpio-ranges = <&pfc 0 128 18>; | |
| 160 | #interrupt-cells = <2>; | |
| 161 | interrupt-controller; | |
| 162 | clocks = <&cpg CPG_MOD 908>; | |
| 163 | power-domains = <&cpg>; | |
| 164 | }; | |
| 165 | ||
| 166 | gpio5: gpio@e6055000 { | |
| 167 | compatible = "renesas,gpio-r8a7795", | |
| 168 | "renesas,gpio-rcar"; | |
| 169 | reg = <0 0xe6055000 0 0x50>; | |
| 170 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| 171 | #gpio-cells = <2>; | |
| 172 | gpio-controller; | |
| 173 | gpio-ranges = <&pfc 0 160 26>; | |
| 174 | #interrupt-cells = <2>; | |
| 175 | interrupt-controller; | |
| 176 | clocks = <&cpg CPG_MOD 907>; | |
| 177 | power-domains = <&cpg>; | |
| 178 | }; | |
| 179 | ||
| 180 | gpio6: gpio@e6055400 { | |
| 181 | compatible = "renesas,gpio-r8a7795", | |
| 182 | "renesas,gpio-rcar"; | |
| 183 | reg = <0 0xe6055400 0 0x50>; | |
| 184 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 185 | #gpio-cells = <2>; | |
| 186 | gpio-controller; | |
| 187 | gpio-ranges = <&pfc 0 192 32>; | |
| 188 | #interrupt-cells = <2>; | |
| 189 | interrupt-controller; | |
| 190 | clocks = <&cpg CPG_MOD 906>; | |
| 191 | power-domains = <&cpg>; | |
| 192 | }; | |
| 193 | ||
| 194 | gpio7: gpio@e6055800 { | |
| 195 | compatible = "renesas,gpio-r8a7795", | |
| 196 | "renesas,gpio-rcar"; | |
| 197 | reg = <0 0xe6055800 0 0x50>; | |
| 198 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 199 | #gpio-cells = <2>; | |
| 200 | gpio-controller; | |
| 201 | gpio-ranges = <&pfc 0 224 4>; | |
| 202 | #interrupt-cells = <2>; | |
| 203 | interrupt-controller; | |
| 204 | clocks = <&cpg CPG_MOD 905>; | |
| 205 | power-domains = <&cpg>; | |
| 206 | }; | |
| 207 | ||
| 26a7e06d SH |
208 | timer { |
| 209 | compatible = "arm,armv8-timer"; | |
| 210 | interrupts = <GIC_PPI 13 | |
| 211 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
| 212 | <GIC_PPI 14 | |
| 213 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
| 214 | <GIC_PPI 11 | |
| 215 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
| 216 | <GIC_PPI 10 | |
| 217 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; | |
| 218 | }; | |
| 219 | ||
| 220 | cpg: clock-controller@e6150000 { | |
| 221 | compatible = "renesas,r8a7795-cpg-mssr"; | |
| 222 | reg = <0 0xe6150000 0 0x1000>; | |
| 223 | clocks = <&extal_clk>, <&extalr_clk>; | |
| 224 | clock-names = "extal", "extalr"; | |
| 225 | #clock-cells = <2>; | |
| 226 | #power-domain-cells = <0>; | |
| 227 | }; | |
| d9202126 | 228 | |
| b281f4c8 KM |
229 | audma0: dma-controller@ec700000 { |
| 230 | compatible = "renesas,rcar-dmac"; | |
| 231 | reg = <0 0xec700000 0 0x10000>; | |
| 232 | interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH | |
| 233 | 0 320 IRQ_TYPE_LEVEL_HIGH | |
| 234 | 0 321 IRQ_TYPE_LEVEL_HIGH | |
| 235 | 0 322 IRQ_TYPE_LEVEL_HIGH | |
| 236 | 0 323 IRQ_TYPE_LEVEL_HIGH | |
| 237 | 0 324 IRQ_TYPE_LEVEL_HIGH | |
| 238 | 0 325 IRQ_TYPE_LEVEL_HIGH | |
| 239 | 0 326 IRQ_TYPE_LEVEL_HIGH | |
| 240 | 0 327 IRQ_TYPE_LEVEL_HIGH | |
| 241 | 0 328 IRQ_TYPE_LEVEL_HIGH | |
| 242 | 0 329 IRQ_TYPE_LEVEL_HIGH | |
| 243 | 0 330 IRQ_TYPE_LEVEL_HIGH | |
| 244 | 0 331 IRQ_TYPE_LEVEL_HIGH | |
| 245 | 0 332 IRQ_TYPE_LEVEL_HIGH | |
| 246 | 0 333 IRQ_TYPE_LEVEL_HIGH | |
| 247 | 0 334 IRQ_TYPE_LEVEL_HIGH | |
| 248 | 0 335 IRQ_TYPE_LEVEL_HIGH>; | |
| 249 | interrupt-names = "error", | |
| 250 | "ch0", "ch1", "ch2", "ch3", | |
| 251 | "ch4", "ch5", "ch6", "ch7", | |
| 252 | "ch8", "ch9", "ch10", "ch11", | |
| 253 | "ch12", "ch13", "ch14", "ch15"; | |
| 254 | clocks = <&cpg CPG_MOD 502>; | |
| 255 | clock-names = "fck"; | |
| 256 | power-domains = <&cpg>; | |
| 257 | #dma-cells = <1>; | |
| 258 | dma-channels = <16>; | |
| 259 | }; | |
| 260 | ||
| 261 | audma1: dma-controller@ec720000 { | |
| 262 | compatible = "renesas,rcar-dmac"; | |
| 263 | reg = <0 0xec720000 0 0x10000>; | |
| 264 | interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH | |
| 265 | 0 336 IRQ_TYPE_LEVEL_HIGH | |
| 266 | 0 337 IRQ_TYPE_LEVEL_HIGH | |
| 267 | 0 338 IRQ_TYPE_LEVEL_HIGH | |
| 268 | 0 339 IRQ_TYPE_LEVEL_HIGH | |
| 269 | 0 340 IRQ_TYPE_LEVEL_HIGH | |
| 270 | 0 341 IRQ_TYPE_LEVEL_HIGH | |
| 271 | 0 342 IRQ_TYPE_LEVEL_HIGH | |
| 272 | 0 343 IRQ_TYPE_LEVEL_HIGH | |
| 273 | 0 344 IRQ_TYPE_LEVEL_HIGH | |
| 274 | 0 345 IRQ_TYPE_LEVEL_HIGH | |
| 275 | 0 346 IRQ_TYPE_LEVEL_HIGH | |
| 276 | 0 347 IRQ_TYPE_LEVEL_HIGH | |
| 277 | 0 348 IRQ_TYPE_LEVEL_HIGH | |
| 278 | 0 349 IRQ_TYPE_LEVEL_HIGH | |
| 279 | 0 382 IRQ_TYPE_LEVEL_HIGH | |
| 280 | 0 383 IRQ_TYPE_LEVEL_HIGH>; | |
| 281 | interrupt-names = "error", | |
| 282 | "ch0", "ch1", "ch2", "ch3", | |
| 283 | "ch4", "ch5", "ch6", "ch7", | |
| 284 | "ch8", "ch9", "ch10", "ch11", | |
| 285 | "ch12", "ch13", "ch14", "ch15"; | |
| 286 | clocks = <&cpg CPG_MOD 501>; | |
| 287 | clock-names = "fck"; | |
| 288 | power-domains = <&cpg>; | |
| 289 | #dma-cells = <1>; | |
| 290 | dma-channels = <16>; | |
| 291 | }; | |
| 292 | ||
| 9241844a KM |
293 | pfc: pfc@e6060000 { |
| 294 | compatible = "renesas,pfc-r8a7795"; | |
| 295 | reg = <0 0xe6060000 0 0x50c>; | |
| 296 | }; | |
| 297 | ||
| d9202126 GU |
298 | dmac0: dma-controller@e6700000 { |
| 299 | /* Empty node for now */ | |
| 300 | }; | |
| 301 | ||
| 302 | dmac1: dma-controller@e7300000 { | |
| 303 | /* Empty node for now */ | |
| 304 | }; | |
| 305 | ||
| 306 | dmac2: dma-controller@e7310000 { | |
| 307 | /* Empty node for now */ | |
| 308 | }; | |
| 49af46b4 | 309 | |
| a92843c8 KM |
310 | avb: ethernet@e6800000 { |
| 311 | compatible = "renesas,etheravb-r8a7795"; | |
| 312 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
| 313 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
| 314 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
| 315 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
| 316 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
| 317 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
| 318 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
| 319 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
| 320 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
| 321 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
| 322 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
| 323 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
| 324 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
| 325 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
| 326 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
| 327 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
| 328 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
| 329 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
| 330 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
| 331 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
| 332 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
| 333 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
| 334 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
| 335 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
| 336 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
| 337 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
| 338 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
| 339 | "ch4", "ch5", "ch6", "ch7", | |
| 340 | "ch8", "ch9", "ch10", "ch11", | |
| 341 | "ch12", "ch13", "ch14", "ch15", | |
| 342 | "ch16", "ch17", "ch18", "ch19", | |
| 343 | "ch20", "ch21", "ch22", "ch23", | |
| 344 | "ch24"; | |
| 345 | clocks = <&cpg CPG_MOD 812>; | |
| 346 | power-domains = <&cpg>; | |
| 347 | phy-mode = "rgmii-id"; | |
| 348 | #address-cells = <1>; | |
| 349 | #size-cells = <0>; | |
| 350 | }; | |
| 351 | ||
| 4fa04299 GU |
352 | hscif0: serial@e6540000 { |
| 353 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 354 | reg = <0 0xe6540000 0 96>; | |
| 355 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
| 356 | clocks = <&cpg CPG_MOD 520>; | |
| 357 | clock-names = "sci_ick"; | |
| 358 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; | |
| 359 | dma-names = "tx", "rx"; | |
| 360 | power-domains = <&cpg>; | |
| 361 | status = "disabled"; | |
| 362 | }; | |
| 363 | ||
| 364 | hscif1: serial@e6550000 { | |
| 365 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 366 | reg = <0 0xe6550000 0 96>; | |
| 367 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
| 368 | clocks = <&cpg CPG_MOD 519>; | |
| 369 | clock-names = "sci_ick"; | |
| 370 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; | |
| 371 | dma-names = "tx", "rx"; | |
| 372 | power-domains = <&cpg>; | |
| 373 | status = "disabled"; | |
| 374 | }; | |
| 375 | ||
| 376 | hscif2: serial@e6560000 { | |
| 377 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 378 | reg = <0 0xe6560000 0 96>; | |
| 379 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 380 | clocks = <&cpg CPG_MOD 518>; | |
| 381 | clock-names = "sci_ick"; | |
| 382 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; | |
| 383 | dma-names = "tx", "rx"; | |
| 384 | power-domains = <&cpg>; | |
| 385 | status = "disabled"; | |
| 386 | }; | |
| 387 | ||
| 388 | hscif3: serial@e66a0000 { | |
| 389 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 390 | reg = <0 0xe66a0000 0 96>; | |
| 391 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
| 392 | clocks = <&cpg CPG_MOD 517>; | |
| 393 | clock-names = "sci_ick"; | |
| 394 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; | |
| 395 | dma-names = "tx", "rx"; | |
| 396 | power-domains = <&cpg>; | |
| 397 | status = "disabled"; | |
| 398 | }; | |
| 399 | ||
| 400 | hscif4: serial@e66b0000 { | |
| 401 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 402 | reg = <0 0xe66b0000 0 96>; | |
| 403 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
| 404 | clocks = <&cpg CPG_MOD 516>; | |
| 405 | clock-names = "sci_ick"; | |
| 406 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; | |
| 407 | dma-names = "tx", "rx"; | |
| 408 | power-domains = <&cpg>; | |
| 409 | status = "disabled"; | |
| 410 | }; | |
| 411 | ||
| 49af46b4 GU |
412 | scif0: serial@e6e60000 { |
| 413 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 414 | reg = <0 0xe6e60000 0 64>; | |
| 415 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
| 416 | clocks = <&cpg CPG_MOD 207>; | |
| 417 | clock-names = "sci_ick"; | |
| 418 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; | |
| 419 | dma-names = "tx", "rx"; | |
| 420 | power-domains = <&cpg>; | |
| 421 | status = "disabled"; | |
| 422 | }; | |
| 423 | ||
| 424 | scif1: serial@e6e68000 { | |
| 425 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 426 | reg = <0 0xe6e68000 0 64>; | |
| 427 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
| 428 | clocks = <&cpg CPG_MOD 206>; | |
| 429 | clock-names = "sci_ick"; | |
| 430 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; | |
| 431 | dma-names = "tx", "rx"; | |
| 432 | power-domains = <&cpg>; | |
| 433 | status = "disabled"; | |
| 434 | }; | |
| 435 | ||
| 436 | scif2: serial@e6e88000 { | |
| 437 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 438 | reg = <0 0xe6e88000 0 64>; | |
| 439 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 440 | clocks = <&cpg CPG_MOD 310>; | |
| 441 | clock-names = "sci_ick"; | |
| 442 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; | |
| 443 | dma-names = "tx", "rx"; | |
| 444 | power-domains = <&cpg>; | |
| 445 | status = "disabled"; | |
| 446 | }; | |
| 447 | ||
| 448 | scif3: serial@e6c50000 { | |
| 449 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 450 | reg = <0 0xe6c50000 0 64>; | |
| 451 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
| 452 | clocks = <&cpg CPG_MOD 204>; | |
| 453 | clock-names = "sci_ick"; | |
| 454 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; | |
| 455 | dma-names = "tx", "rx"; | |
| 456 | power-domains = <&cpg>; | |
| 457 | status = "disabled"; | |
| 458 | }; | |
| 459 | ||
| 460 | scif4: serial@e6c40000 { | |
| 461 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 462 | reg = <0 0xe6c40000 0 64>; | |
| 463 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
| 464 | clocks = <&cpg CPG_MOD 203>; | |
| 465 | clock-names = "sci_ick"; | |
| 466 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; | |
| 467 | dma-names = "tx", "rx"; | |
| 468 | power-domains = <&cpg>; | |
| 469 | status = "disabled"; | |
| 470 | }; | |
| 471 | ||
| 472 | scif5: serial@e6f30000 { | |
| 473 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 474 | reg = <0 0xe6f30000 0 64>; | |
| 475 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
| 476 | clocks = <&cpg CPG_MOD 202>; | |
| 477 | clock-names = "sci_ick"; | |
| 478 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; | |
| 479 | dma-names = "tx", "rx"; | |
| 480 | power-domains = <&cpg>; | |
| 481 | status = "disabled"; | |
| 482 | }; | |
| 32bc0c51 KM |
483 | |
| 484 | i2c0: i2c@e6500000 { | |
| 485 | #address-cells = <1>; | |
| 486 | #size-cells = <0>; | |
| 487 | compatible = "renesas,i2c-r8a7795"; | |
| 488 | reg = <0 0xe6500000 0 0x40>; | |
| 489 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
| 490 | clocks = <&cpg CPG_MOD 931>; | |
| 491 | power-domains = <&cpg>; | |
| 492 | status = "disabled"; | |
| 493 | }; | |
| 494 | ||
| 495 | i2c1: i2c@e6508000 { | |
| 496 | #address-cells = <1>; | |
| 497 | #size-cells = <0>; | |
| 498 | compatible = "renesas,i2c-r8a7795"; | |
| 499 | reg = <0 0xe6508000 0 0x40>; | |
| 500 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
| 501 | clocks = <&cpg CPG_MOD 930>; | |
| 502 | power-domains = <&cpg>; | |
| 503 | status = "disabled"; | |
| 504 | }; | |
| 505 | ||
| 506 | i2c2: i2c@e6510000 { | |
| 507 | #address-cells = <1>; | |
| 508 | #size-cells = <0>; | |
| 509 | compatible = "renesas,i2c-r8a7795"; | |
| 510 | reg = <0 0xe6510000 0 0x40>; | |
| 511 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
| 512 | clocks = <&cpg CPG_MOD 929>; | |
| 513 | power-domains = <&cpg>; | |
| 514 | status = "disabled"; | |
| 515 | }; | |
| 516 | ||
| 517 | i2c3: i2c@e66d0000 { | |
| 518 | #address-cells = <1>; | |
| 519 | #size-cells = <0>; | |
| 520 | compatible = "renesas,i2c-r8a7795"; | |
| 521 | reg = <0 0xe66d0000 0 0x40>; | |
| 522 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
| 523 | clocks = <&cpg CPG_MOD 928>; | |
| 524 | power-domains = <&cpg>; | |
| 525 | status = "disabled"; | |
| 526 | }; | |
| 527 | ||
| 528 | i2c4: i2c@e66d8000 { | |
| 529 | #address-cells = <1>; | |
| 530 | #size-cells = <0>; | |
| 531 | compatible = "renesas,i2c-r8a7795"; | |
| 532 | reg = <0 0xe66d8000 0 0x40>; | |
| 533 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
| 534 | clocks = <&cpg CPG_MOD 927>; | |
| 535 | power-domains = <&cpg>; | |
| 536 | status = "disabled"; | |
| 537 | }; | |
| 538 | ||
| 539 | i2c5: i2c@e66e0000 { | |
| 540 | #address-cells = <1>; | |
| 541 | #size-cells = <0>; | |
| 542 | compatible = "renesas,i2c-r8a7795"; | |
| 543 | reg = <0 0xe66e0000 0 0x40>; | |
| 544 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
| 545 | clocks = <&cpg CPG_MOD 919>; | |
| 546 | power-domains = <&cpg>; | |
| 547 | status = "disabled"; | |
| 548 | }; | |
| 549 | ||
| 550 | i2c6: i2c@e66e8000 { | |
| 551 | #address-cells = <1>; | |
| 552 | #size-cells = <0>; | |
| 553 | compatible = "renesas,i2c-r8a7795"; | |
| 554 | reg = <0 0xe66e8000 0 0x40>; | |
| 555 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
| 556 | clocks = <&cpg CPG_MOD 918>; | |
| 557 | power-domains = <&cpg>; | |
| 558 | status = "disabled"; | |
| 559 | }; | |
| 623197b9 KM |
560 | |
| 561 | rcar_sound: sound@ec500000 { | |
| 562 | /* | |
| 563 | * #sound-dai-cells is required | |
| 564 | * | |
| 565 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 566 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 567 | */ | |
| 568 | /* | |
| 569 | * #clock-cells is required for audio_clkout0/1/2/3 | |
| 570 | * | |
| 571 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
| 572 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
| 573 | */ | |
| 574 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
| 575 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
| 576 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 577 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 578 | <0 0xec541000 0 0x280>, /* SSI */ | |
| 579 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
| 580 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 581 | ||
| 582 | clocks = <&cpg CPG_MOD 1005>, | |
| 583 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
| 584 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
| 585 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
| 586 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
| 587 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
| 588 | <&audio_clk_a>, <&audio_clk_b>, | |
| 589 | <&audio_clk_c>, | |
| 590 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
| 591 | clock-names = "ssi-all", | |
| 592 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
| 593 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
| 594 | "ssi.1", "ssi.0", | |
| 595 | "clk_a", "clk_b", "clk_c", "clk_i"; | |
| 596 | power-domains = <&cpg>; | |
| 597 | status = "disabled"; | |
| 598 | ||
| 599 | rcar_sound,ssi { | |
| 600 | ssi0: ssi@0 { | |
| 601 | interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; | |
| 602 | }; | |
| 603 | ssi1: ssi@1 { | |
| 604 | interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; | |
| 605 | }; | |
| 606 | ssi2: ssi@2 { | |
| 607 | interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; | |
| 608 | }; | |
| 609 | ssi3: ssi@3 { | |
| 610 | interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; | |
| 611 | }; | |
| 612 | ssi4: ssi@4 { | |
| 613 | interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; | |
| 614 | }; | |
| 615 | ssi5: ssi@5 { | |
| 616 | interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; | |
| 617 | }; | |
| 618 | ssi6: ssi@6 { | |
| 619 | interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; | |
| 620 | }; | |
| 621 | ssi7: ssi@7 { | |
| 622 | interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; | |
| 623 | }; | |
| 624 | ssi8: ssi@8 { | |
| 625 | interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; | |
| 626 | }; | |
| 627 | ssi9: ssi@9 { | |
| 628 | interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; | |
| 629 | }; | |
| 630 | }; | |
| 631 | }; | |
| 26a7e06d SH |
632 | }; |
| 633 | }; |