projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 26a7e06d SH |
1 | /* |
| 2 | * Device Tree Source for the r8a7795 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
| 26a7e06d SH |
12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 13 | ||
| 14 | / { | |
| 15 | compatible = "renesas,r8a7795"; | |
| 16 | #address-cells = <2>; | |
| 17 | #size-cells = <2>; | |
| 18 | ||
| 32bc0c51 KM |
19 | aliases { |
| 20 | i2c0 = &i2c0; | |
| 21 | i2c1 = &i2c1; | |
| 22 | i2c2 = &i2c2; | |
| 23 | i2c3 = &i2c3; | |
| 24 | i2c4 = &i2c4; | |
| 25 | i2c5 = &i2c5; | |
| 26 | i2c6 = &i2c6; | |
| 27 | }; | |
| 28 | ||
| 12e51557 GI |
29 | psci { |
| 30 | compatible = "arm,psci-0.2"; | |
| 31 | method = "smc"; | |
| 32 | }; | |
| 33 | ||
| 26a7e06d SH |
34 | cpus { |
| 35 | #address-cells = <1>; | |
| 36 | #size-cells = <0>; | |
| 37 | ||
| 26a7e06d SH |
38 | a57_0: cpu@0 { |
| 39 | compatible = "arm,cortex-a57", "arm,armv8"; | |
| 40 | reg = <0x0>; | |
| 41 | device_type = "cpu"; | |
| 12e51557 | 42 | enable-method = "psci"; |
| 26a7e06d | 43 | }; |
| 0ed1a79e GI |
44 | |
| 45 | a57_1: cpu@1 { | |
| 46 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 47 | reg = <0x1>; | |
| 48 | device_type = "cpu"; | |
| 49 | enable-method = "psci"; | |
| 50 | }; | |
| 51 | a57_2: cpu@2 { | |
| 52 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 53 | reg = <0x2>; | |
| 54 | device_type = "cpu"; | |
| 55 | enable-method = "psci"; | |
| 56 | }; | |
| 57 | a57_3: cpu@3 { | |
| 58 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 59 | reg = <0x3>; | |
| 60 | device_type = "cpu"; | |
| 61 | enable-method = "psci"; | |
| 62 | }; | |
| 26a7e06d SH |
63 | }; |
| 64 | ||
| 65 | extal_clk: extal { | |
| 66 | compatible = "fixed-clock"; | |
| 67 | #clock-cells = <0>; | |
| 68 | /* This value must be overridden by the board */ | |
| 69 | clock-frequency = <0>; | |
| 70 | }; | |
| 71 | ||
| 72 | extalr_clk: extalr { | |
| 73 | compatible = "fixed-clock"; | |
| 74 | #clock-cells = <0>; | |
| 75 | /* This value must be overridden by the board */ | |
| 76 | clock-frequency = <0>; | |
| 77 | }; | |
| 78 | ||
| 623197b9 KM |
79 | /* |
| 80 | * The external audio clocks are configured as 0 Hz fixed frequency | |
| 81 | * clocks by default. | |
| 82 | * Boards that provide audio clocks should override them. | |
| 83 | */ | |
| 84 | audio_clk_a: audio_clk_a { | |
| 85 | compatible = "fixed-clock"; | |
| 86 | #clock-cells = <0>; | |
| 87 | clock-frequency = <0>; | |
| 88 | }; | |
| 89 | ||
| 90 | audio_clk_b: audio_clk_b { | |
| 91 | compatible = "fixed-clock"; | |
| 92 | #clock-cells = <0>; | |
| 93 | clock-frequency = <0>; | |
| 94 | }; | |
| 95 | ||
| 96 | audio_clk_c: audio_clk_c { | |
| 97 | compatible = "fixed-clock"; | |
| 98 | #clock-cells = <0>; | |
| 99 | clock-frequency = <0>; | |
| 100 | }; | |
| 101 | ||
| 26a7e06d SH |
102 | soc { |
| 103 | compatible = "simple-bus"; | |
| 104 | interrupt-parent = <&gic>; | |
| 0ed1a79e | 105 | |
| 26a7e06d SH |
106 | #address-cells = <2>; |
| 107 | #size-cells = <2>; | |
| 108 | ranges; | |
| 109 | ||
| 110 | gic: interrupt-controller@0xf1010000 { | |
| 111 | compatible = "arm,gic-400"; | |
| 112 | #interrupt-cells = <3>; | |
| 113 | #address-cells = <0>; | |
| 114 | interrupt-controller; | |
| 115 | reg = <0x0 0xf1010000 0 0x1000>, | |
| 116 | <0x0 0xf1020000 0 0x2000>; | |
| 117 | interrupts = <GIC_PPI 9 | |
| 0ed1a79e | 118 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| 26a7e06d SH |
119 | }; |
| 120 | ||
| 7b08623a TK |
121 | gpio0: gpio@e6050000 { |
| 122 | compatible = "renesas,gpio-r8a7795", | |
| 123 | "renesas,gpio-rcar"; | |
| 124 | reg = <0 0xe6050000 0 0x50>; | |
| 125 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
| 126 | #gpio-cells = <2>; | |
| 127 | gpio-controller; | |
| 128 | gpio-ranges = <&pfc 0 0 16>; | |
| 129 | #interrupt-cells = <2>; | |
| 130 | interrupt-controller; | |
| 131 | clocks = <&cpg CPG_MOD 912>; | |
| 132 | power-domains = <&cpg>; | |
| 133 | }; | |
| 134 | ||
| 135 | gpio1: gpio@e6051000 { | |
| 136 | compatible = "renesas,gpio-r8a7795", | |
| 137 | "renesas,gpio-rcar"; | |
| 138 | reg = <0 0xe6051000 0 0x50>; | |
| 139 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
| 140 | #gpio-cells = <2>; | |
| 141 | gpio-controller; | |
| 142 | gpio-ranges = <&pfc 0 32 28>; | |
| 143 | #interrupt-cells = <2>; | |
| 144 | interrupt-controller; | |
| 145 | clocks = <&cpg CPG_MOD 911>; | |
| 146 | power-domains = <&cpg>; | |
| 147 | }; | |
| 148 | ||
| 149 | gpio2: gpio@e6052000 { | |
| 150 | compatible = "renesas,gpio-r8a7795", | |
| 151 | "renesas,gpio-rcar"; | |
| 152 | reg = <0 0xe6052000 0 0x50>; | |
| 153 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| 154 | #gpio-cells = <2>; | |
| 155 | gpio-controller; | |
| 156 | gpio-ranges = <&pfc 0 64 15>; | |
| 157 | #interrupt-cells = <2>; | |
| 158 | interrupt-controller; | |
| 159 | clocks = <&cpg CPG_MOD 910>; | |
| 160 | power-domains = <&cpg>; | |
| 161 | }; | |
| 162 | ||
| 163 | gpio3: gpio@e6053000 { | |
| 164 | compatible = "renesas,gpio-r8a7795", | |
| 165 | "renesas,gpio-rcar"; | |
| 166 | reg = <0 0xe6053000 0 0x50>; | |
| 167 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 168 | #gpio-cells = <2>; | |
| 169 | gpio-controller; | |
| 170 | gpio-ranges = <&pfc 0 96 16>; | |
| 171 | #interrupt-cells = <2>; | |
| 172 | interrupt-controller; | |
| 173 | clocks = <&cpg CPG_MOD 909>; | |
| 174 | power-domains = <&cpg>; | |
| 175 | }; | |
| 176 | ||
| 177 | gpio4: gpio@e6054000 { | |
| 178 | compatible = "renesas,gpio-r8a7795", | |
| 179 | "renesas,gpio-rcar"; | |
| 180 | reg = <0 0xe6054000 0 0x50>; | |
| 181 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
| 182 | #gpio-cells = <2>; | |
| 183 | gpio-controller; | |
| 184 | gpio-ranges = <&pfc 0 128 18>; | |
| 185 | #interrupt-cells = <2>; | |
| 186 | interrupt-controller; | |
| 187 | clocks = <&cpg CPG_MOD 908>; | |
| 188 | power-domains = <&cpg>; | |
| 189 | }; | |
| 190 | ||
| 191 | gpio5: gpio@e6055000 { | |
| 192 | compatible = "renesas,gpio-r8a7795", | |
| 193 | "renesas,gpio-rcar"; | |
| 194 | reg = <0 0xe6055000 0 0x50>; | |
| 195 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| 196 | #gpio-cells = <2>; | |
| 197 | gpio-controller; | |
| 198 | gpio-ranges = <&pfc 0 160 26>; | |
| 199 | #interrupt-cells = <2>; | |
| 200 | interrupt-controller; | |
| 201 | clocks = <&cpg CPG_MOD 907>; | |
| 202 | power-domains = <&cpg>; | |
| 203 | }; | |
| 204 | ||
| 205 | gpio6: gpio@e6055400 { | |
| 206 | compatible = "renesas,gpio-r8a7795", | |
| 207 | "renesas,gpio-rcar"; | |
| 208 | reg = <0 0xe6055400 0 0x50>; | |
| 209 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 210 | #gpio-cells = <2>; | |
| 211 | gpio-controller; | |
| 212 | gpio-ranges = <&pfc 0 192 32>; | |
| 213 | #interrupt-cells = <2>; | |
| 214 | interrupt-controller; | |
| 215 | clocks = <&cpg CPG_MOD 906>; | |
| 216 | power-domains = <&cpg>; | |
| 217 | }; | |
| 218 | ||
| 219 | gpio7: gpio@e6055800 { | |
| 220 | compatible = "renesas,gpio-r8a7795", | |
| 221 | "renesas,gpio-rcar"; | |
| 222 | reg = <0 0xe6055800 0 0x50>; | |
| 223 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 224 | #gpio-cells = <2>; | |
| 225 | gpio-controller; | |
| 226 | gpio-ranges = <&pfc 0 224 4>; | |
| 227 | #interrupt-cells = <2>; | |
| 228 | interrupt-controller; | |
| 229 | clocks = <&cpg CPG_MOD 905>; | |
| 230 | power-domains = <&cpg>; | |
| 231 | }; | |
| 232 | ||
| 26a7e06d SH |
233 | timer { |
| 234 | compatible = "arm,armv8-timer"; | |
| 235 | interrupts = <GIC_PPI 13 | |
| 0ed1a79e | 236 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 237 | <GIC_PPI 14 |
| 0ed1a79e | 238 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 239 | <GIC_PPI 11 |
| 0ed1a79e | 240 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 26a7e06d | 241 | <GIC_PPI 10 |
| 0ed1a79e | 242 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| 26a7e06d SH |
243 | }; |
| 244 | ||
| 245 | cpg: clock-controller@e6150000 { | |
| 246 | compatible = "renesas,r8a7795-cpg-mssr"; | |
| 247 | reg = <0 0xe6150000 0 0x1000>; | |
| 248 | clocks = <&extal_clk>, <&extalr_clk>; | |
| 249 | clock-names = "extal", "extalr"; | |
| 250 | #clock-cells = <2>; | |
| 251 | #power-domain-cells = <0>; | |
| 252 | }; | |
| d9202126 | 253 | |
| b281f4c8 KM |
254 | audma0: dma-controller@ec700000 { |
| 255 | compatible = "renesas,rcar-dmac"; | |
| 256 | reg = <0 0xec700000 0 0x10000>; | |
| 257 | interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH | |
| 258 | 0 320 IRQ_TYPE_LEVEL_HIGH | |
| 259 | 0 321 IRQ_TYPE_LEVEL_HIGH | |
| 260 | 0 322 IRQ_TYPE_LEVEL_HIGH | |
| 261 | 0 323 IRQ_TYPE_LEVEL_HIGH | |
| 262 | 0 324 IRQ_TYPE_LEVEL_HIGH | |
| 263 | 0 325 IRQ_TYPE_LEVEL_HIGH | |
| 264 | 0 326 IRQ_TYPE_LEVEL_HIGH | |
| 265 | 0 327 IRQ_TYPE_LEVEL_HIGH | |
| 266 | 0 328 IRQ_TYPE_LEVEL_HIGH | |
| 267 | 0 329 IRQ_TYPE_LEVEL_HIGH | |
| 268 | 0 330 IRQ_TYPE_LEVEL_HIGH | |
| 269 | 0 331 IRQ_TYPE_LEVEL_HIGH | |
| 270 | 0 332 IRQ_TYPE_LEVEL_HIGH | |
| 271 | 0 333 IRQ_TYPE_LEVEL_HIGH | |
| 272 | 0 334 IRQ_TYPE_LEVEL_HIGH | |
| 273 | 0 335 IRQ_TYPE_LEVEL_HIGH>; | |
| 274 | interrupt-names = "error", | |
| 275 | "ch0", "ch1", "ch2", "ch3", | |
| 276 | "ch4", "ch5", "ch6", "ch7", | |
| 277 | "ch8", "ch9", "ch10", "ch11", | |
| 278 | "ch12", "ch13", "ch14", "ch15"; | |
| 279 | clocks = <&cpg CPG_MOD 502>; | |
| 280 | clock-names = "fck"; | |
| 281 | power-domains = <&cpg>; | |
| 282 | #dma-cells = <1>; | |
| 283 | dma-channels = <16>; | |
| 284 | }; | |
| 285 | ||
| 286 | audma1: dma-controller@ec720000 { | |
| 287 | compatible = "renesas,rcar-dmac"; | |
| 288 | reg = <0 0xec720000 0 0x10000>; | |
| 289 | interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH | |
| 290 | 0 336 IRQ_TYPE_LEVEL_HIGH | |
| 291 | 0 337 IRQ_TYPE_LEVEL_HIGH | |
| 292 | 0 338 IRQ_TYPE_LEVEL_HIGH | |
| 293 | 0 339 IRQ_TYPE_LEVEL_HIGH | |
| 294 | 0 340 IRQ_TYPE_LEVEL_HIGH | |
| 295 | 0 341 IRQ_TYPE_LEVEL_HIGH | |
| 296 | 0 342 IRQ_TYPE_LEVEL_HIGH | |
| 297 | 0 343 IRQ_TYPE_LEVEL_HIGH | |
| 298 | 0 344 IRQ_TYPE_LEVEL_HIGH | |
| 299 | 0 345 IRQ_TYPE_LEVEL_HIGH | |
| 300 | 0 346 IRQ_TYPE_LEVEL_HIGH | |
| 301 | 0 347 IRQ_TYPE_LEVEL_HIGH | |
| 302 | 0 348 IRQ_TYPE_LEVEL_HIGH | |
| 303 | 0 349 IRQ_TYPE_LEVEL_HIGH | |
| 304 | 0 382 IRQ_TYPE_LEVEL_HIGH | |
| 305 | 0 383 IRQ_TYPE_LEVEL_HIGH>; | |
| 306 | interrupt-names = "error", | |
| 307 | "ch0", "ch1", "ch2", "ch3", | |
| 308 | "ch4", "ch5", "ch6", "ch7", | |
| 309 | "ch8", "ch9", "ch10", "ch11", | |
| 310 | "ch12", "ch13", "ch14", "ch15"; | |
| 311 | clocks = <&cpg CPG_MOD 501>; | |
| 312 | clock-names = "fck"; | |
| 313 | power-domains = <&cpg>; | |
| 314 | #dma-cells = <1>; | |
| 315 | dma-channels = <16>; | |
| 316 | }; | |
| 317 | ||
| 9241844a KM |
318 | pfc: pfc@e6060000 { |
| 319 | compatible = "renesas,pfc-r8a7795"; | |
| 320 | reg = <0 0xe6060000 0 0x50c>; | |
| 321 | }; | |
| 322 | ||
| d9202126 GU |
323 | dmac0: dma-controller@e6700000 { |
| 324 | /* Empty node for now */ | |
| 325 | }; | |
| 326 | ||
| 327 | dmac1: dma-controller@e7300000 { | |
| 328 | /* Empty node for now */ | |
| 329 | }; | |
| 330 | ||
| 331 | dmac2: dma-controller@e7310000 { | |
| 332 | /* Empty node for now */ | |
| 333 | }; | |
| 49af46b4 | 334 | |
| a92843c8 KM |
335 | avb: ethernet@e6800000 { |
| 336 | compatible = "renesas,etheravb-r8a7795"; | |
| 337 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
| 338 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
| 339 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
| 340 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
| 341 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
| 342 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
| 343 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
| 344 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
| 345 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
| 346 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
| 347 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
| 348 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
| 349 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
| 350 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
| 351 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
| 352 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
| 353 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
| 354 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
| 355 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
| 356 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
| 357 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
| 358 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
| 359 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
| 360 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
| 361 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
| 362 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
| 363 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
| 364 | "ch4", "ch5", "ch6", "ch7", | |
| 365 | "ch8", "ch9", "ch10", "ch11", | |
| 366 | "ch12", "ch13", "ch14", "ch15", | |
| 367 | "ch16", "ch17", "ch18", "ch19", | |
| 368 | "ch20", "ch21", "ch22", "ch23", | |
| 369 | "ch24"; | |
| 370 | clocks = <&cpg CPG_MOD 812>; | |
| 371 | power-domains = <&cpg>; | |
| 372 | phy-mode = "rgmii-id"; | |
| 373 | #address-cells = <1>; | |
| 374 | #size-cells = <0>; | |
| 375 | }; | |
| 376 | ||
| 4fa04299 GU |
377 | hscif0: serial@e6540000 { |
| 378 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 379 | reg = <0 0xe6540000 0 96>; | |
| 380 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
| 381 | clocks = <&cpg CPG_MOD 520>; | |
| 382 | clock-names = "sci_ick"; | |
| 383 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; | |
| 384 | dma-names = "tx", "rx"; | |
| 385 | power-domains = <&cpg>; | |
| 386 | status = "disabled"; | |
| 387 | }; | |
| 388 | ||
| 389 | hscif1: serial@e6550000 { | |
| 390 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 391 | reg = <0 0xe6550000 0 96>; | |
| 392 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
| 393 | clocks = <&cpg CPG_MOD 519>; | |
| 394 | clock-names = "sci_ick"; | |
| 395 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; | |
| 396 | dma-names = "tx", "rx"; | |
| 397 | power-domains = <&cpg>; | |
| 398 | status = "disabled"; | |
| 399 | }; | |
| 400 | ||
| 401 | hscif2: serial@e6560000 { | |
| 402 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 403 | reg = <0 0xe6560000 0 96>; | |
| 404 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 405 | clocks = <&cpg CPG_MOD 518>; | |
| 406 | clock-names = "sci_ick"; | |
| 407 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; | |
| 408 | dma-names = "tx", "rx"; | |
| 409 | power-domains = <&cpg>; | |
| 410 | status = "disabled"; | |
| 411 | }; | |
| 412 | ||
| 413 | hscif3: serial@e66a0000 { | |
| 414 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 415 | reg = <0 0xe66a0000 0 96>; | |
| 416 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
| 417 | clocks = <&cpg CPG_MOD 517>; | |
| 418 | clock-names = "sci_ick"; | |
| 419 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; | |
| 420 | dma-names = "tx", "rx"; | |
| 421 | power-domains = <&cpg>; | |
| 422 | status = "disabled"; | |
| 423 | }; | |
| 424 | ||
| 425 | hscif4: serial@e66b0000 { | |
| 426 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
| 427 | reg = <0 0xe66b0000 0 96>; | |
| 428 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
| 429 | clocks = <&cpg CPG_MOD 516>; | |
| 430 | clock-names = "sci_ick"; | |
| 431 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; | |
| 432 | dma-names = "tx", "rx"; | |
| 433 | power-domains = <&cpg>; | |
| 434 | status = "disabled"; | |
| 435 | }; | |
| 436 | ||
| 49af46b4 GU |
437 | scif0: serial@e6e60000 { |
| 438 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 439 | reg = <0 0xe6e60000 0 64>; | |
| 440 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
| 441 | clocks = <&cpg CPG_MOD 207>; | |
| 442 | clock-names = "sci_ick"; | |
| 443 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; | |
| 444 | dma-names = "tx", "rx"; | |
| 445 | power-domains = <&cpg>; | |
| 446 | status = "disabled"; | |
| 447 | }; | |
| 448 | ||
| 449 | scif1: serial@e6e68000 { | |
| 450 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 451 | reg = <0 0xe6e68000 0 64>; | |
| 452 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
| 453 | clocks = <&cpg CPG_MOD 206>; | |
| 454 | clock-names = "sci_ick"; | |
| 455 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; | |
| 456 | dma-names = "tx", "rx"; | |
| 457 | power-domains = <&cpg>; | |
| 458 | status = "disabled"; | |
| 459 | }; | |
| 460 | ||
| 461 | scif2: serial@e6e88000 { | |
| 462 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 463 | reg = <0 0xe6e88000 0 64>; | |
| 464 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 465 | clocks = <&cpg CPG_MOD 310>; | |
| 466 | clock-names = "sci_ick"; | |
| 467 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; | |
| 468 | dma-names = "tx", "rx"; | |
| 469 | power-domains = <&cpg>; | |
| 470 | status = "disabled"; | |
| 471 | }; | |
| 472 | ||
| 473 | scif3: serial@e6c50000 { | |
| 474 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 475 | reg = <0 0xe6c50000 0 64>; | |
| 476 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
| 477 | clocks = <&cpg CPG_MOD 204>; | |
| 478 | clock-names = "sci_ick"; | |
| 479 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; | |
| 480 | dma-names = "tx", "rx"; | |
| 481 | power-domains = <&cpg>; | |
| 482 | status = "disabled"; | |
| 483 | }; | |
| 484 | ||
| 485 | scif4: serial@e6c40000 { | |
| 486 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 487 | reg = <0 0xe6c40000 0 64>; | |
| 488 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
| 489 | clocks = <&cpg CPG_MOD 203>; | |
| 490 | clock-names = "sci_ick"; | |
| 491 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; | |
| 492 | dma-names = "tx", "rx"; | |
| 493 | power-domains = <&cpg>; | |
| 494 | status = "disabled"; | |
| 495 | }; | |
| 496 | ||
| 497 | scif5: serial@e6f30000 { | |
| 498 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
| 499 | reg = <0 0xe6f30000 0 64>; | |
| 500 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
| 501 | clocks = <&cpg CPG_MOD 202>; | |
| 502 | clock-names = "sci_ick"; | |
| 503 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; | |
| 504 | dma-names = "tx", "rx"; | |
| 505 | power-domains = <&cpg>; | |
| 506 | status = "disabled"; | |
| 507 | }; | |
| 32bc0c51 KM |
508 | |
| 509 | i2c0: i2c@e6500000 { | |
| 510 | #address-cells = <1>; | |
| 511 | #size-cells = <0>; | |
| 512 | compatible = "renesas,i2c-r8a7795"; | |
| 513 | reg = <0 0xe6500000 0 0x40>; | |
| 514 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
| 515 | clocks = <&cpg CPG_MOD 931>; | |
| 516 | power-domains = <&cpg>; | |
| 517 | status = "disabled"; | |
| 518 | }; | |
| 519 | ||
| 520 | i2c1: i2c@e6508000 { | |
| 521 | #address-cells = <1>; | |
| 522 | #size-cells = <0>; | |
| 523 | compatible = "renesas,i2c-r8a7795"; | |
| 524 | reg = <0 0xe6508000 0 0x40>; | |
| 525 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
| 526 | clocks = <&cpg CPG_MOD 930>; | |
| 527 | power-domains = <&cpg>; | |
| 528 | status = "disabled"; | |
| 529 | }; | |
| 530 | ||
| 531 | i2c2: i2c@e6510000 { | |
| 532 | #address-cells = <1>; | |
| 533 | #size-cells = <0>; | |
| 534 | compatible = "renesas,i2c-r8a7795"; | |
| 535 | reg = <0 0xe6510000 0 0x40>; | |
| 536 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
| 537 | clocks = <&cpg CPG_MOD 929>; | |
| 538 | power-domains = <&cpg>; | |
| 539 | status = "disabled"; | |
| 540 | }; | |
| 541 | ||
| 542 | i2c3: i2c@e66d0000 { | |
| 543 | #address-cells = <1>; | |
| 544 | #size-cells = <0>; | |
| 545 | compatible = "renesas,i2c-r8a7795"; | |
| 546 | reg = <0 0xe66d0000 0 0x40>; | |
| 547 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
| 548 | clocks = <&cpg CPG_MOD 928>; | |
| 549 | power-domains = <&cpg>; | |
| 550 | status = "disabled"; | |
| 551 | }; | |
| 552 | ||
| 553 | i2c4: i2c@e66d8000 { | |
| 554 | #address-cells = <1>; | |
| 555 | #size-cells = <0>; | |
| 556 | compatible = "renesas,i2c-r8a7795"; | |
| 557 | reg = <0 0xe66d8000 0 0x40>; | |
| 558 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
| 559 | clocks = <&cpg CPG_MOD 927>; | |
| 560 | power-domains = <&cpg>; | |
| 561 | status = "disabled"; | |
| 562 | }; | |
| 563 | ||
| 564 | i2c5: i2c@e66e0000 { | |
| 565 | #address-cells = <1>; | |
| 566 | #size-cells = <0>; | |
| 567 | compatible = "renesas,i2c-r8a7795"; | |
| 568 | reg = <0 0xe66e0000 0 0x40>; | |
| 569 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
| 570 | clocks = <&cpg CPG_MOD 919>; | |
| 571 | power-domains = <&cpg>; | |
| 572 | status = "disabled"; | |
| 573 | }; | |
| 574 | ||
| 575 | i2c6: i2c@e66e8000 { | |
| 576 | #address-cells = <1>; | |
| 577 | #size-cells = <0>; | |
| 578 | compatible = "renesas,i2c-r8a7795"; | |
| 579 | reg = <0 0xe66e8000 0 0x40>; | |
| 580 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
| 581 | clocks = <&cpg CPG_MOD 918>; | |
| 582 | power-domains = <&cpg>; | |
| 583 | status = "disabled"; | |
| 584 | }; | |
| 623197b9 KM |
585 | |
| 586 | rcar_sound: sound@ec500000 { | |
| 587 | /* | |
| 588 | * #sound-dai-cells is required | |
| 589 | * | |
| 590 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 591 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 592 | */ | |
| 593 | /* | |
| 594 | * #clock-cells is required for audio_clkout0/1/2/3 | |
| 595 | * | |
| 596 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
| 597 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
| 598 | */ | |
| 599 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
| 600 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
| 601 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 602 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 603 | <0 0xec541000 0 0x280>, /* SSI */ | |
| 604 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
| 605 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 606 | ||
| 607 | clocks = <&cpg CPG_MOD 1005>, | |
| 608 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
| 609 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
| 610 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
| 611 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
| 612 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
| b868ff51 KM |
613 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 614 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
| 615 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
| 616 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
| 617 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
| b9dd9450 | 618 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 623197b9 KM |
619 | <&audio_clk_a>, <&audio_clk_b>, |
| 620 | <&audio_clk_c>, | |
| 621 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
| 622 | clock-names = "ssi-all", | |
| 623 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
| 624 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
| 625 | "ssi.1", "ssi.0", | |
| b868ff51 KM |
626 | "src.9", "src.8", "src.7", "src.6", |
| 627 | "src.5", "src.4", "src.3", "src.2", | |
| 628 | "src.1", "src.0", | |
| b9dd9450 | 629 | "dvc.0", "dvc.1", |
| 623197b9 KM |
630 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 631 | power-domains = <&cpg>; | |
| 632 | status = "disabled"; | |
| 633 | ||
| b9dd9450 KM |
634 | rcar_sound,dvc { |
| 635 | dvc0: dvc@0 { | |
| 636 | dmas = <&audma0 0xbc>; | |
| 637 | dma-names = "tx"; | |
| 638 | }; | |
| 639 | dvc1: dvc@1 { | |
| 640 | dmas = <&audma0 0xbe>; | |
| 641 | dma-names = "tx"; | |
| 642 | }; | |
| 643 | }; | |
| 644 | ||
| b868ff51 KM |
645 | rcar_sound,src { |
| 646 | src0: src@0 { | |
| 647 | interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; | |
| 648 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
| 649 | dma-names = "rx", "tx"; | |
| 650 | }; | |
| 651 | src1: src@1 { | |
| 652 | interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; | |
| 653 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
| 654 | dma-names = "rx", "tx"; | |
| 655 | }; | |
| 656 | src2: src@2 { | |
| 657 | interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; | |
| 658 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
| 659 | dma-names = "rx", "tx"; | |
| 660 | }; | |
| 661 | src3: src@3 { | |
| 662 | interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; | |
| 663 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
| 664 | dma-names = "rx", "tx"; | |
| 665 | }; | |
| 666 | src4: src@4 { | |
| 667 | interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; | |
| 668 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
| 669 | dma-names = "rx", "tx"; | |
| 670 | }; | |
| 671 | src5: src@5 { | |
| 672 | interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; | |
| 673 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
| 674 | dma-names = "rx", "tx"; | |
| 675 | }; | |
| 676 | src6: src@6 { | |
| 677 | interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; | |
| 678 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
| 679 | dma-names = "rx", "tx"; | |
| 680 | }; | |
| 681 | src7: src@7 { | |
| 682 | interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; | |
| 683 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
| 684 | dma-names = "rx", "tx"; | |
| 685 | }; | |
| 686 | src8: src@8 { | |
| 687 | interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; | |
| 688 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
| 689 | dma-names = "rx", "tx"; | |
| 690 | }; | |
| 691 | src9: src@9 { | |
| 692 | interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; | |
| 693 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
| 694 | dma-names = "rx", "tx"; | |
| 695 | }; | |
| 696 | }; | |
| 697 | ||
| 623197b9 KM |
698 | rcar_sound,ssi { |
| 699 | ssi0: ssi@0 { | |
| 700 | interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
701 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
| 702 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
703 | }; |
| 704 | ssi1: ssi@1 { | |
| 705 | interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
706 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
| 707 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
708 | }; |
| 709 | ssi2: ssi@2 { | |
| 710 | interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
711 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
| 712 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
713 | }; |
| 714 | ssi3: ssi@3 { | |
| 715 | interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
716 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
| 717 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
718 | }; |
| 719 | ssi4: ssi@4 { | |
| 720 | interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
721 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
| 722 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
723 | }; |
| 724 | ssi5: ssi@5 { | |
| 725 | interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
726 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
| 727 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
728 | }; |
| 729 | ssi6: ssi@6 { | |
| 730 | interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
731 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
| 732 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
733 | }; |
| 734 | ssi7: ssi@7 { | |
| 735 | interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
736 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
| 737 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
738 | }; |
| 739 | ssi8: ssi@8 { | |
| 740 | interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
741 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
| 742 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
743 | }; |
| 744 | ssi9: ssi@9 { | |
| 745 | interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; | |
| 10d18ab8 KM |
746 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
| 747 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 623197b9 KM |
748 | }; |
| 749 | }; | |
| 750 | }; | |
| 26a7e06d SH |
751 | }; |
| 752 | }; |