kexec: remove unnecessary KERN_ERR from kexec.c
[linux-2.6-block.git] / arch / arm64 / Kconfig
CommitLineData
8c2c3df3
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1config ARM64
2 def_bool y
92980405 3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
8c2c3df3 4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
308c09f1 5 select ARCH_HAS_SG_CHAIN
1f85008e 6 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
c63c8700 7 select ARCH_USE_CMPXCHG_LOCKREF
4badad35 8 select ARCH_SUPPORTS_ATOMIC_RMW
9170100e 9 select ARCH_WANT_OPTIONAL_GPIOLIB
6212a512 10 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
b6f35981 11 select ARCH_WANT_FRAME_POINTERS
25c92a37 12 select ARM_AMBA
1aee5d7a 13 select ARM_ARCH_TIMER
c4188edc 14 select ARM_GIC
875cbf3e 15 select AUDIT_ARCH_COMPAT_GENERIC
021f6537 16 select ARM_GIC_V3
adace895 17 select BUILDTIME_EXTABLE_SORT
db2789b5 18 select CLONE_BACKWARDS
7ca2ef33 19 select COMMON_CLK
166936ba 20 select CPU_PM if (SUSPEND || CPU_IDLE)
7bc13fd3 21 select DCACHE_WORD_ACCESS
d4932f9e 22 select GENERIC_ALLOCATOR
8c2c3df3 23 select GENERIC_CLOCKEVENTS
1f85008e 24 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
3be1a5c4 25 select GENERIC_CPU_AUTOPROBE
bf4b558e 26 select GENERIC_EARLY_IOREMAP
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27 select GENERIC_IRQ_PROBE
28 select GENERIC_IRQ_SHOW
cb61f676 29 select GENERIC_PCI_IOMAP
65cd4f6c 30 select GENERIC_SCHED_CLOCK
8c2c3df3 31 select GENERIC_SMP_IDLE_THREAD
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32 select GENERIC_STRNCPY_FROM_USER
33 select GENERIC_STRNLEN_USER
8c2c3df3 34 select GENERIC_TIME_VSYSCALL
a1ddc74a 35 select HANDLE_DOMAIN_IRQ
8c2c3df3 36 select HARDIRQS_SW_RESEND
5284e1b4 37 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
875cbf3e 38 select HAVE_ARCH_AUDITSYSCALL
9732cafd 39 select HAVE_ARCH_JUMP_LABEL
9529247d 40 select HAVE_ARCH_KGDB
a1ae65b2 41 select HAVE_ARCH_SECCOMP_FILTER
8c2c3df3 42 select HAVE_ARCH_TRACEHOOK
e54bcde3 43 select HAVE_BPF_JIT
af64d2aa 44 select HAVE_C_RECORDMCOUNT
c0c264ae 45 select HAVE_CC_STACKPROTECTOR
5284e1b4 46 select HAVE_CMPXCHG_DOUBLE
9b2a60c4 47 select HAVE_DEBUG_BUGVERBOSE
b69ec42b 48 select HAVE_DEBUG_KMEMLEAK
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49 select HAVE_DMA_API_DEBUG
50 select HAVE_DMA_ATTRS
6ac2104d 51 select HAVE_DMA_CONTIGUOUS
bd7d38db 52 select HAVE_DYNAMIC_FTRACE
50afc33a 53 select HAVE_EFFICIENT_UNALIGNED_ACCESS
af64d2aa 54 select HAVE_FTRACE_MCOUNT_RECORD
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55 select HAVE_FUNCTION_TRACER
56 select HAVE_FUNCTION_GRAPH_TRACER
8c2c3df3 57 select HAVE_GENERIC_DMA_COHERENT
8c2c3df3 58 select HAVE_HW_BREAKPOINT if PERF_EVENTS
8c2c3df3 59 select HAVE_MEMBLOCK
55834a77 60 select HAVE_PATA_PLATFORM
8c2c3df3 61 select HAVE_PERF_EVENTS
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62 select HAVE_PERF_REGS
63 select HAVE_PERF_USER_STACK_DUMP
5e5f6dc1 64 select HAVE_RCU_TABLE_FREE
055b1212 65 select HAVE_SYSCALL_TRACEPOINTS
8c2c3df3 66 select IRQ_DOMAIN
fea2acaa 67 select MODULES_USE_ELF_RELA
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68 select NO_BOOTMEM
69 select OF
70 select OF_EARLY_FLATTREE
9bf14b7c 71 select OF_RESERVED_MEM
8c2c3df3 72 select PERF_USE_VMALLOC
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73 select POWER_RESET
74 select POWER_SUPPLY
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75 select RTC_LIB
76 select SPARSE_IRQ
7ac57a89 77 select SYSCTL_EXCEPTION_TRACE
6c81fe79 78 select HAVE_CONTEXT_TRACKING
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79 help
80 ARM 64-bit (AArch64) Linux support.
81
82config 64BIT
83 def_bool y
84
85config ARCH_PHYS_ADDR_T_64BIT
86 def_bool y
87
88config MMU
89 def_bool y
90
ce816fa8 91config NO_IOPORT_MAP
d1e6dc91 92 def_bool y if !PCI
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93
94config STACKTRACE_SUPPORT
95 def_bool y
96
97config LOCKDEP_SUPPORT
98 def_bool y
99
100config TRACE_IRQFLAGS_SUPPORT
101 def_bool y
102
c209f799 103config RWSEM_XCHGADD_ALGORITHM
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104 def_bool y
105
106config GENERIC_HWEIGHT
107 def_bool y
108
109config GENERIC_CSUM
110 def_bool y
111
112config GENERIC_CALIBRATE_DELAY
113 def_bool y
114
19e7640d 115config ZONE_DMA
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116 def_bool y
117
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118config HAVE_GENERIC_RCU_GUP
119 def_bool y
120
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121config ARCH_DMA_ADDR_T_64BIT
122 def_bool y
123
124config NEED_DMA_MAP_STATE
125 def_bool y
126
127config NEED_SG_DMA_LENGTH
128 def_bool y
129
130config SWIOTLB
131 def_bool y
132
133config IOMMU_HELPER
134 def_bool SWIOTLB
135
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136config KERNEL_MODE_NEON
137 def_bool y
138
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139config FIX_EARLYCON_MEM
140 def_bool y
141
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142source "init/Kconfig"
143
144source "kernel/Kconfig.freezer"
145
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146menu "Platform selection"
147
41904360
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148config ARCH_SEATTLE
149 bool "AMD Seattle SoC Family"
150 help
151 This enables support for AMD Seattle SOC Family
152
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153config ARCH_THUNDER
154 bool "Cavium Inc. Thunder SoC Family"
155 help
156 This enables support for Cavium's Thunder Family of SoCs.
157
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158config ARCH_VEXPRESS
159 bool "ARMv8 software model (Versatile Express)"
160 select ARCH_REQUIRE_GPIOLIB
161 select COMMON_CLK_VERSATILE
aa1e8ec1 162 select POWER_RESET_VEXPRESS
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163 select VEXPRESS_CONFIG
164 help
165 This enables support for the ARMv8 software model (Versatile
166 Express).
8c2c3df3 167
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168config ARCH_XGENE
169 bool "AppliedMicro X-Gene SOC Family"
170 help
171 This enables support for AppliedMicro X-Gene SOC Family
172
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173endmenu
174
175menu "Bus support"
176
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177config PCI
178 bool "PCI support"
179 help
180 This feature enables support for PCI bus system. If you say Y
181 here, the kernel will include drivers and infrastructure code
182 to support PCI bus devices.
183
184config PCI_DOMAINS
185 def_bool PCI
186
187config PCI_DOMAINS_GENERIC
188 def_bool PCI
189
190config PCI_SYSCALL
191 def_bool PCI
192
193source "drivers/pci/Kconfig"
194source "drivers/pci/pcie/Kconfig"
195source "drivers/pci/hotplug/Kconfig"
196
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197endmenu
198
199menu "Kernel Features"
200
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201menu "ARM errata workarounds via the alternatives framework"
202
203config ARM64_ERRATUM_826319
204 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
205 default y
206 help
207 This option adds an alternative code sequence to work around ARM
208 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
209 AXI master interface and an L2 cache.
210
211 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
212 and is unable to accept a certain write via this interface, it will
213 not progress on read data presented on the read data channel and the
214 system can deadlock.
215
216 The workaround promotes data cache clean instructions to
217 data cache clean-and-invalidate.
218 Please note that this does not necessarily enable the workaround,
219 as it depends on the alternative framework, which will only patch
220 the kernel if an affected CPU is detected.
221
222 If unsure, say Y.
223
224config ARM64_ERRATUM_827319
225 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
226 default y
227 help
228 This option adds an alternative code sequence to work around ARM
229 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
230 master interface and an L2 cache.
231
232 Under certain conditions this erratum can cause a clean line eviction
233 to occur at the same time as another transaction to the same address
234 on the AMBA 5 CHI interface, which can cause data corruption if the
235 interconnect reorders the two transactions.
236
237 The workaround promotes data cache clean instructions to
238 data cache clean-and-invalidate.
239 Please note that this does not necessarily enable the workaround,
240 as it depends on the alternative framework, which will only patch
241 the kernel if an affected CPU is detected.
242
243 If unsure, say Y.
244
245config ARM64_ERRATUM_824069
246 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
247 default y
248 help
249 This option adds an alternative code sequence to work around ARM
250 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
251 to a coherent interconnect.
252
253 If a Cortex-A53 processor is executing a store or prefetch for
254 write instruction at the same time as a processor in another
255 cluster is executing a cache maintenance operation to the same
256 address, then this erratum might cause a clean cache line to be
257 incorrectly marked as dirty.
258
259 The workaround promotes data cache clean instructions to
260 data cache clean-and-invalidate.
261 Please note that this option does not necessarily enable the
262 workaround, as it depends on the alternative framework, which will
263 only patch the kernel if an affected CPU is detected.
264
265 If unsure, say Y.
266
267config ARM64_ERRATUM_819472
268 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
269 default y
270 help
271 This option adds an alternative code sequence to work around ARM
272 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
273 present when it is connected to a coherent interconnect.
274
275 If the processor is executing a load and store exclusive sequence at
276 the same time as a processor in another cluster is executing a cache
277 maintenance operation to the same address, then this erratum might
278 cause data corruption.
279
280 The workaround promotes data cache clean instructions to
281 data cache clean-and-invalidate.
282 Please note that this does not necessarily enable the workaround,
283 as it depends on the alternative framework, which will only patch
284 the kernel if an affected CPU is detected.
285
286 If unsure, say Y.
287
288config ARM64_ERRATUM_832075
289 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
290 default y
291 help
292 This option adds an alternative code sequence to work around ARM
293 erratum 832075 on Cortex-A57 parts up to r1p2.
294
295 Affected Cortex-A57 parts might deadlock when exclusive load/store
296 instructions to Write-Back memory are mixed with Device loads.
297
298 The workaround is to promote device loads to use Load-Acquire
299 semantics.
300 Please note that this does not necessarily enable the workaround,
301 as it depends on the alternative framework, which will only patch
302 the kernel if an affected CPU is detected.
303
304 If unsure, say Y.
305
306endmenu
307
308
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309choice
310 prompt "Page size"
311 default ARM64_4K_PAGES
312 help
313 Page size (translation granule) configuration.
314
315config ARM64_4K_PAGES
316 bool "4KB"
317 help
318 This feature enables 4KB pages support.
319
8c2c3df3 320config ARM64_64K_PAGES
e41ceed0 321 bool "64KB"
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322 help
323 This feature enables 64KB pages support (4KB by default)
324 allowing only two levels of page tables and faster TLB
325 look-up. AArch32 emulation is not available when this feature
326 is enabled.
327
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328endchoice
329
330choice
331 prompt "Virtual address space size"
332 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
333 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
334 help
335 Allows choosing one of multiple possible virtual address
336 space sizes. The level of translation table is determined by
337 a combination of page size and virtual address space size.
338
339config ARM64_VA_BITS_39
340 bool "39-bit"
341 depends on ARM64_4K_PAGES
342
343config ARM64_VA_BITS_42
344 bool "42-bit"
345 depends on ARM64_64K_PAGES
346
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347config ARM64_VA_BITS_48
348 bool "48-bit"
04f905a9 349 depends on !ARM_SMMU
c79b954b 350
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351endchoice
352
353config ARM64_VA_BITS
354 int
355 default 39 if ARM64_VA_BITS_39
356 default 42 if ARM64_VA_BITS_42
c79b954b 357 default 48 if ARM64_VA_BITS_48
e41ceed0 358
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359config ARM64_PGTABLE_LEVELS
360 int
361 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
383c2799 362 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
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363 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
364 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
c79b954b 365
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366config CPU_BIG_ENDIAN
367 bool "Build big-endian kernel"
368 help
369 Say Y if you plan on running a kernel in big-endian mode.
370
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371config SMP
372 bool "Symmetric Multi-Processing"
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373 help
374 This enables support for systems with more than one CPU. If
375 you say N here, the kernel will run on single and
376 multiprocessor machines, but will use only one CPU of a
377 multiprocessor machine. If you say Y here, the kernel will run
378 on many, but not all, single processor machines. On a single
379 processor machine, the kernel will run faster if you say N
380 here.
381
382 If you don't know what to do here, say N.
383
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384config SCHED_MC
385 bool "Multi-core scheduler support"
386 depends on SMP
387 help
388 Multi-core scheduler support improves the CPU scheduler's decision
389 making when dealing with multi-core CPU chips at a cost of slightly
390 increased overhead in some places. If unsure say N here.
391
392config SCHED_SMT
393 bool "SMT scheduler support"
394 depends on SMP
395 help
396 Improves the CPU scheduler's decision making when dealing with
397 MultiThreading at a cost of slightly increased overhead in some
398 places. If unsure say N here.
399
8c2c3df3 400config NR_CPUS
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401 int "Maximum number of CPUs (2-64)"
402 range 2 64
8c2c3df3 403 depends on SMP
15942853 404 # These have to remain sorted largest to smallest
e3672649 405 default "64"
8c2c3df3 406
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407config HOTPLUG_CPU
408 bool "Support for hot-pluggable CPUs"
409 depends on SMP
410 help
411 Say Y here to experiment with turning CPUs off and on. CPUs
412 can be controlled through /sys/devices/system/cpu.
413
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414source kernel/Kconfig.preempt
415
416config HZ
417 int
418 default 100
419
420config ARCH_HAS_HOLES_MEMORYMODEL
421 def_bool y if SPARSEMEM
422
423config ARCH_SPARSEMEM_ENABLE
424 def_bool y
425 select SPARSEMEM_VMEMMAP_ENABLE
426
427config ARCH_SPARSEMEM_DEFAULT
428 def_bool ARCH_SPARSEMEM_ENABLE
429
430config ARCH_SELECT_MEMORY_MODEL
431 def_bool ARCH_SPARSEMEM_ENABLE
432
433config HAVE_ARCH_PFN_VALID
434 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
435
436config HW_PERF_EVENTS
437 bool "Enable hardware performance counter support for perf events"
438 depends on PERF_EVENTS
439 default y
440 help
441 Enable hardware performance counter support for perf events. If
442 disabled, perf events will use software events only.
443
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444config SYS_SUPPORTS_HUGETLBFS
445 def_bool y
446
447config ARCH_WANT_GENERAL_HUGETLB
448 def_bool y
449
450config ARCH_WANT_HUGE_PMD_SHARE
451 def_bool y if !ARM64_64K_PAGES
452
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453config HAVE_ARCH_TRANSPARENT_HUGEPAGE
454 def_bool y
455
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456config ARCH_HAS_CACHE_LINE_SIZE
457 def_bool y
458
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459source "mm/Kconfig"
460
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461config SECCOMP
462 bool "Enable seccomp to safely compute untrusted bytecode"
463 ---help---
464 This kernel feature is useful for number crunching applications
465 that may need to compute untrusted bytecode during their
466 execution. By using pipes or other transports made available to
467 the process as file descriptors supporting the read/write
468 syscalls, it's possible to isolate those applications in
469 their own address space using seccomp. Once seccomp is
470 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
471 and the task is only allowed to execute a few safe syscalls
472 defined by each seccomp mode.
473
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474config XEN_DOM0
475 def_bool y
476 depends on XEN
477
478config XEN
c2ba1f7d 479 bool "Xen guest support on ARM64"
aa42aa13 480 depends on ARM64 && OF
83862ccf 481 select SWIOTLB_XEN
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482 help
483 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
484
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485config FORCE_MAX_ZONEORDER
486 int
487 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
488 default "11"
489
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490menuconfig ARMV8_DEPRECATED
491 bool "Emulate deprecated/obsolete ARMv8 instructions"
492 depends on COMPAT
493 help
494 Legacy software support may require certain instructions
495 that have been deprecated or obsoleted in the architecture.
496
497 Enable this config to enable selective emulation of these
498 features.
499
500 If unsure, say Y
501
502if ARMV8_DEPRECATED
503
504config SWP_EMULATION
505 bool "Emulate SWP/SWPB instructions"
506 help
507 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
508 they are always undefined. Say Y here to enable software
509 emulation of these instructions for userspace using LDXR/STXR.
510
511 In some older versions of glibc [<=2.8] SWP is used during futex
512 trylock() operations with the assumption that the code will not
513 be preempted. This invalid assumption may be more likely to fail
514 with SWP emulation enabled, leading to deadlock of the user
515 application.
516
517 NOTE: when accessing uncached shared regions, LDXR/STXR rely
518 on an external transaction monitoring block called a global
519 monitor to maintain update atomicity. If your system does not
520 implement a global monitor, this option can cause programs that
521 perform SWP operations to uncached memory to deadlock.
522
523 If unsure, say Y
524
525config CP15_BARRIER_EMULATION
526 bool "Emulate CP15 Barrier instructions"
527 help
528 The CP15 barrier instructions - CP15ISB, CP15DSB, and
529 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
530 strongly recommended to use the ISB, DSB, and DMB
531 instructions instead.
532
533 Say Y here to enable software emulation of these
534 instructions for AArch32 userspace code. When this option is
535 enabled, CP15 barrier usage is traced which can help
536 identify software that needs updating.
537
538 If unsure, say Y
539
540endif
541
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542endmenu
543
544menu "Boot options"
545
546config CMDLINE
547 string "Default kernel command string"
548 default ""
549 help
550 Provide a set of default command-line options at build time by
551 entering them here. As a minimum, you should specify the the
552 root device (e.g. root=/dev/nfs).
553
554config CMDLINE_FORCE
555 bool "Always use the default kernel command string"
556 help
557 Always use the default kernel command string, even if the boot
558 loader passes other arguments to the kernel.
559 This is useful if you cannot or don't want to change the
560 command-line options your boot loader passes to the kernel.
561
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562config EFI_STUB
563 bool
564
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565config EFI
566 bool "UEFI runtime support"
567 depends on OF && !CPU_BIG_ENDIAN
568 select LIBFDT
569 select UCS2_STRING
570 select EFI_PARAMS_FROM_FDT
e15dd494 571 select EFI_RUNTIME_WRAPPERS
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572 select EFI_STUB
573 select EFI_ARMSTUB
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574 default y
575 help
576 This option provides support for runtime services provided
577 by UEFI firmware (such as non-volatile variables, realtime
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578 clock, and platform reset). A UEFI stub is also provided to
579 allow the kernel to be booted as an EFI application. This
580 is only useful on systems that have UEFI firmware.
f84d0275 581
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582config DMI
583 bool "Enable support for SMBIOS (DMI) tables"
584 depends on EFI
585 default y
586 help
587 This enables SMBIOS/DMI feature for systems.
588
589 This option is only useful on systems that have UEFI firmware.
590 However, even with this option, the resultant kernel should
591 continue to boot on existing non-UEFI platforms.
592
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593endmenu
594
595menu "Userspace binary formats"
596
597source "fs/Kconfig.binfmt"
598
599config COMPAT
600 bool "Kernel support for 32-bit EL0"
601 depends on !ARM64_64K_PAGES
602 select COMPAT_BINFMT_ELF
af1839eb 603 select HAVE_UID16
84b9e9b4 604 select OLD_SIGSUSPEND3
51682036 605 select COMPAT_OLD_SIGACTION
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606 help
607 This option enables support for a 32-bit EL0 running under a 64-bit
608 kernel at EL1. AArch32-specific components such as system calls,
609 the user helper functions, VFP support and the ptrace interface are
610 handled appropriately by the kernel.
611
612 If you want to execute 32-bit userspace applications, say Y.
613
614config SYSVIPC_COMPAT
615 def_bool y
616 depends on COMPAT && SYSVIPC
617
618endmenu
619
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620menu "Power management options"
621
622source "kernel/power/Kconfig"
623
624config ARCH_SUSPEND_POSSIBLE
625 def_bool y
626
627config ARM64_CPU_SUSPEND
628 def_bool PM_SLEEP
629
630endmenu
631
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632menu "CPU Power Management"
633
634source "drivers/cpuidle/Kconfig"
635
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636source "drivers/cpufreq/Kconfig"
637
638endmenu
639
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640source "net/Kconfig"
641
642source "drivers/Kconfig"
643
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644source "drivers/firmware/Kconfig"
645
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646source "fs/Kconfig"
647
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648source "arch/arm64/kvm/Kconfig"
649
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650source "arch/arm64/Kconfig.debug"
651
652source "security/Kconfig"
653
654source "crypto/Kconfig"
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655if CRYPTO
656source "arch/arm64/crypto/Kconfig"
657endif
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658
659source "lib/Kconfig"