Commit | Line | Data |
---|---|---|
8c2c3df3 CM |
1 | config ARM64 |
2 | def_bool y | |
92980405 | 3 | select ARCH_BINFMT_ELF_RANDOMIZE_PIE |
8c2c3df3 | 4 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE |
308c09f1 | 5 | select ARCH_HAS_SG_CHAIN |
1f85008e | 6 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
c63c8700 | 7 | select ARCH_USE_CMPXCHG_LOCKREF |
4badad35 | 8 | select ARCH_SUPPORTS_ATOMIC_RMW |
9170100e | 9 | select ARCH_WANT_OPTIONAL_GPIOLIB |
6212a512 | 10 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
b6f35981 | 11 | select ARCH_WANT_FRAME_POINTERS |
25c92a37 | 12 | select ARM_AMBA |
1aee5d7a | 13 | select ARM_ARCH_TIMER |
c4188edc | 14 | select ARM_GIC |
875cbf3e | 15 | select AUDIT_ARCH_COMPAT_GENERIC |
021f6537 | 16 | select ARM_GIC_V3 |
adace895 | 17 | select BUILDTIME_EXTABLE_SORT |
db2789b5 | 18 | select CLONE_BACKWARDS |
7ca2ef33 | 19 | select COMMON_CLK |
166936ba | 20 | select CPU_PM if (SUSPEND || CPU_IDLE) |
7bc13fd3 | 21 | select DCACHE_WORD_ACCESS |
d4932f9e | 22 | select GENERIC_ALLOCATOR |
8c2c3df3 | 23 | select GENERIC_CLOCKEVENTS |
1f85008e | 24 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
3be1a5c4 | 25 | select GENERIC_CPU_AUTOPROBE |
bf4b558e | 26 | select GENERIC_EARLY_IOREMAP |
8c2c3df3 CM |
27 | select GENERIC_IOMAP |
28 | select GENERIC_IRQ_PROBE | |
29 | select GENERIC_IRQ_SHOW | |
65cd4f6c | 30 | select GENERIC_SCHED_CLOCK |
8c2c3df3 | 31 | select GENERIC_SMP_IDLE_THREAD |
12a0ef7b WD |
32 | select GENERIC_STRNCPY_FROM_USER |
33 | select GENERIC_STRNLEN_USER | |
8c2c3df3 | 34 | select GENERIC_TIME_VSYSCALL |
a1ddc74a | 35 | select HANDLE_DOMAIN_IRQ |
8c2c3df3 | 36 | select HARDIRQS_SW_RESEND |
5284e1b4 | 37 | select HAVE_ALIGNED_STRUCT_PAGE if SLUB |
875cbf3e | 38 | select HAVE_ARCH_AUDITSYSCALL |
9732cafd | 39 | select HAVE_ARCH_JUMP_LABEL |
9529247d | 40 | select HAVE_ARCH_KGDB |
8c2c3df3 | 41 | select HAVE_ARCH_TRACEHOOK |
e54bcde3 | 42 | select HAVE_BPF_JIT |
af64d2aa | 43 | select HAVE_C_RECORDMCOUNT |
c0c264ae | 44 | select HAVE_CC_STACKPROTECTOR |
5284e1b4 | 45 | select HAVE_CMPXCHG_DOUBLE |
9b2a60c4 | 46 | select HAVE_DEBUG_BUGVERBOSE |
b69ec42b | 47 | select HAVE_DEBUG_KMEMLEAK |
8c2c3df3 CM |
48 | select HAVE_DMA_API_DEBUG |
49 | select HAVE_DMA_ATTRS | |
6ac2104d | 50 | select HAVE_DMA_CONTIGUOUS |
bd7d38db | 51 | select HAVE_DYNAMIC_FTRACE |
50afc33a | 52 | select HAVE_EFFICIENT_UNALIGNED_ACCESS |
af64d2aa | 53 | select HAVE_FTRACE_MCOUNT_RECORD |
819e50e2 AT |
54 | select HAVE_FUNCTION_TRACER |
55 | select HAVE_FUNCTION_GRAPH_TRACER | |
8c2c3df3 | 56 | select HAVE_GENERIC_DMA_COHERENT |
8c2c3df3 | 57 | select HAVE_HW_BREAKPOINT if PERF_EVENTS |
8c2c3df3 | 58 | select HAVE_MEMBLOCK |
55834a77 | 59 | select HAVE_PATA_PLATFORM |
8c2c3df3 | 60 | select HAVE_PERF_EVENTS |
2ee0d7fd JP |
61 | select HAVE_PERF_REGS |
62 | select HAVE_PERF_USER_STACK_DUMP | |
5e5f6dc1 | 63 | select HAVE_RCU_TABLE_FREE |
055b1212 | 64 | select HAVE_SYSCALL_TRACEPOINTS |
8c2c3df3 | 65 | select IRQ_DOMAIN |
fea2acaa | 66 | select MODULES_USE_ELF_RELA |
8c2c3df3 CM |
67 | select NO_BOOTMEM |
68 | select OF | |
69 | select OF_EARLY_FLATTREE | |
9bf14b7c | 70 | select OF_RESERVED_MEM |
8c2c3df3 | 71 | select PERF_USE_VMALLOC |
aa1e8ec1 CM |
72 | select POWER_RESET |
73 | select POWER_SUPPLY | |
8c2c3df3 CM |
74 | select RTC_LIB |
75 | select SPARSE_IRQ | |
7ac57a89 | 76 | select SYSCTL_EXCEPTION_TRACE |
6c81fe79 | 77 | select HAVE_CONTEXT_TRACKING |
8c2c3df3 CM |
78 | help |
79 | ARM 64-bit (AArch64) Linux support. | |
80 | ||
81 | config 64BIT | |
82 | def_bool y | |
83 | ||
84 | config ARCH_PHYS_ADDR_T_64BIT | |
85 | def_bool y | |
86 | ||
87 | config MMU | |
88 | def_bool y | |
89 | ||
ce816fa8 | 90 | config NO_IOPORT_MAP |
d1e6dc91 | 91 | def_bool y if !PCI |
8c2c3df3 CM |
92 | |
93 | config STACKTRACE_SUPPORT | |
94 | def_bool y | |
95 | ||
96 | config LOCKDEP_SUPPORT | |
97 | def_bool y | |
98 | ||
99 | config TRACE_IRQFLAGS_SUPPORT | |
100 | def_bool y | |
101 | ||
c209f799 | 102 | config RWSEM_XCHGADD_ALGORITHM |
8c2c3df3 CM |
103 | def_bool y |
104 | ||
105 | config GENERIC_HWEIGHT | |
106 | def_bool y | |
107 | ||
108 | config GENERIC_CSUM | |
109 | def_bool y | |
110 | ||
111 | config GENERIC_CALIBRATE_DELAY | |
112 | def_bool y | |
113 | ||
19e7640d | 114 | config ZONE_DMA |
8c2c3df3 CM |
115 | def_bool y |
116 | ||
29e56940 SC |
117 | config HAVE_GENERIC_RCU_GUP |
118 | def_bool y | |
119 | ||
8c2c3df3 CM |
120 | config ARCH_DMA_ADDR_T_64BIT |
121 | def_bool y | |
122 | ||
123 | config NEED_DMA_MAP_STATE | |
124 | def_bool y | |
125 | ||
126 | config NEED_SG_DMA_LENGTH | |
127 | def_bool y | |
128 | ||
129 | config SWIOTLB | |
130 | def_bool y | |
131 | ||
132 | config IOMMU_HELPER | |
133 | def_bool SWIOTLB | |
134 | ||
4cfb3613 AB |
135 | config KERNEL_MODE_NEON |
136 | def_bool y | |
137 | ||
92cc15fc RH |
138 | config FIX_EARLYCON_MEM |
139 | def_bool y | |
140 | ||
8c2c3df3 CM |
141 | source "init/Kconfig" |
142 | ||
143 | source "kernel/Kconfig.freezer" | |
144 | ||
1ae90e79 CM |
145 | menu "Platform selection" |
146 | ||
28f7420d RMC |
147 | config ARCH_THUNDER |
148 | bool "Cavium Inc. Thunder SoC Family" | |
149 | help | |
150 | This enables support for Cavium's Thunder Family of SoCs. | |
151 | ||
1ae90e79 CM |
152 | config ARCH_VEXPRESS |
153 | bool "ARMv8 software model (Versatile Express)" | |
154 | select ARCH_REQUIRE_GPIOLIB | |
155 | select COMMON_CLK_VERSATILE | |
aa1e8ec1 | 156 | select POWER_RESET_VEXPRESS |
1ae90e79 CM |
157 | select VEXPRESS_CONFIG |
158 | help | |
159 | This enables support for the ARMv8 software model (Versatile | |
160 | Express). | |
8c2c3df3 | 161 | |
15942853 VK |
162 | config ARCH_XGENE |
163 | bool "AppliedMicro X-Gene SOC Family" | |
164 | help | |
165 | This enables support for AppliedMicro X-Gene SOC Family | |
166 | ||
8c2c3df3 CM |
167 | endmenu |
168 | ||
169 | menu "Bus support" | |
170 | ||
171 | config ARM_AMBA | |
172 | bool | |
173 | ||
d1e6dc91 LD |
174 | config PCI |
175 | bool "PCI support" | |
176 | help | |
177 | This feature enables support for PCI bus system. If you say Y | |
178 | here, the kernel will include drivers and infrastructure code | |
179 | to support PCI bus devices. | |
180 | ||
181 | config PCI_DOMAINS | |
182 | def_bool PCI | |
183 | ||
184 | config PCI_DOMAINS_GENERIC | |
185 | def_bool PCI | |
186 | ||
187 | config PCI_SYSCALL | |
188 | def_bool PCI | |
189 | ||
190 | source "drivers/pci/Kconfig" | |
191 | source "drivers/pci/pcie/Kconfig" | |
192 | source "drivers/pci/hotplug/Kconfig" | |
193 | ||
8c2c3df3 CM |
194 | endmenu |
195 | ||
196 | menu "Kernel Features" | |
197 | ||
c0a01b84 AP |
198 | menu "ARM errata workarounds via the alternatives framework" |
199 | ||
200 | config ARM64_ERRATUM_826319 | |
201 | bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted" | |
202 | default y | |
203 | help | |
204 | This option adds an alternative code sequence to work around ARM | |
205 | erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or | |
206 | AXI master interface and an L2 cache. | |
207 | ||
208 | If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors | |
209 | and is unable to accept a certain write via this interface, it will | |
210 | not progress on read data presented on the read data channel and the | |
211 | system can deadlock. | |
212 | ||
213 | The workaround promotes data cache clean instructions to | |
214 | data cache clean-and-invalidate. | |
215 | Please note that this does not necessarily enable the workaround, | |
216 | as it depends on the alternative framework, which will only patch | |
217 | the kernel if an affected CPU is detected. | |
218 | ||
219 | If unsure, say Y. | |
220 | ||
221 | config ARM64_ERRATUM_827319 | |
222 | bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect" | |
223 | default y | |
224 | help | |
225 | This option adds an alternative code sequence to work around ARM | |
226 | erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI | |
227 | master interface and an L2 cache. | |
228 | ||
229 | Under certain conditions this erratum can cause a clean line eviction | |
230 | to occur at the same time as another transaction to the same address | |
231 | on the AMBA 5 CHI interface, which can cause data corruption if the | |
232 | interconnect reorders the two transactions. | |
233 | ||
234 | The workaround promotes data cache clean instructions to | |
235 | data cache clean-and-invalidate. | |
236 | Please note that this does not necessarily enable the workaround, | |
237 | as it depends on the alternative framework, which will only patch | |
238 | the kernel if an affected CPU is detected. | |
239 | ||
240 | If unsure, say Y. | |
241 | ||
242 | config ARM64_ERRATUM_824069 | |
243 | bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop" | |
244 | default y | |
245 | help | |
246 | This option adds an alternative code sequence to work around ARM | |
247 | erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected | |
248 | to a coherent interconnect. | |
249 | ||
250 | If a Cortex-A53 processor is executing a store or prefetch for | |
251 | write instruction at the same time as a processor in another | |
252 | cluster is executing a cache maintenance operation to the same | |
253 | address, then this erratum might cause a clean cache line to be | |
254 | incorrectly marked as dirty. | |
255 | ||
256 | The workaround promotes data cache clean instructions to | |
257 | data cache clean-and-invalidate. | |
258 | Please note that this option does not necessarily enable the | |
259 | workaround, as it depends on the alternative framework, which will | |
260 | only patch the kernel if an affected CPU is detected. | |
261 | ||
262 | If unsure, say Y. | |
263 | ||
264 | config ARM64_ERRATUM_819472 | |
265 | bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption" | |
266 | default y | |
267 | help | |
268 | This option adds an alternative code sequence to work around ARM | |
269 | erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache | |
270 | present when it is connected to a coherent interconnect. | |
271 | ||
272 | If the processor is executing a load and store exclusive sequence at | |
273 | the same time as a processor in another cluster is executing a cache | |
274 | maintenance operation to the same address, then this erratum might | |
275 | cause data corruption. | |
276 | ||
277 | The workaround promotes data cache clean instructions to | |
278 | data cache clean-and-invalidate. | |
279 | Please note that this does not necessarily enable the workaround, | |
280 | as it depends on the alternative framework, which will only patch | |
281 | the kernel if an affected CPU is detected. | |
282 | ||
283 | If unsure, say Y. | |
284 | ||
285 | config ARM64_ERRATUM_832075 | |
286 | bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads" | |
287 | default y | |
288 | help | |
289 | This option adds an alternative code sequence to work around ARM | |
290 | erratum 832075 on Cortex-A57 parts up to r1p2. | |
291 | ||
292 | Affected Cortex-A57 parts might deadlock when exclusive load/store | |
293 | instructions to Write-Back memory are mixed with Device loads. | |
294 | ||
295 | The workaround is to promote device loads to use Load-Acquire | |
296 | semantics. | |
297 | Please note that this does not necessarily enable the workaround, | |
298 | as it depends on the alternative framework, which will only patch | |
299 | the kernel if an affected CPU is detected. | |
300 | ||
301 | If unsure, say Y. | |
302 | ||
303 | endmenu | |
304 | ||
305 | ||
e41ceed0 JL |
306 | choice |
307 | prompt "Page size" | |
308 | default ARM64_4K_PAGES | |
309 | help | |
310 | Page size (translation granule) configuration. | |
311 | ||
312 | config ARM64_4K_PAGES | |
313 | bool "4KB" | |
314 | help | |
315 | This feature enables 4KB pages support. | |
316 | ||
8c2c3df3 | 317 | config ARM64_64K_PAGES |
e41ceed0 | 318 | bool "64KB" |
8c2c3df3 CM |
319 | help |
320 | This feature enables 64KB pages support (4KB by default) | |
321 | allowing only two levels of page tables and faster TLB | |
322 | look-up. AArch32 emulation is not available when this feature | |
323 | is enabled. | |
324 | ||
e41ceed0 JL |
325 | endchoice |
326 | ||
327 | choice | |
328 | prompt "Virtual address space size" | |
329 | default ARM64_VA_BITS_39 if ARM64_4K_PAGES | |
330 | default ARM64_VA_BITS_42 if ARM64_64K_PAGES | |
331 | help | |
332 | Allows choosing one of multiple possible virtual address | |
333 | space sizes. The level of translation table is determined by | |
334 | a combination of page size and virtual address space size. | |
335 | ||
336 | config ARM64_VA_BITS_39 | |
337 | bool "39-bit" | |
338 | depends on ARM64_4K_PAGES | |
339 | ||
340 | config ARM64_VA_BITS_42 | |
341 | bool "42-bit" | |
342 | depends on ARM64_64K_PAGES | |
343 | ||
c79b954b JL |
344 | config ARM64_VA_BITS_48 |
345 | bool "48-bit" | |
04f905a9 | 346 | depends on !ARM_SMMU |
c79b954b | 347 | |
e41ceed0 JL |
348 | endchoice |
349 | ||
350 | config ARM64_VA_BITS | |
351 | int | |
352 | default 39 if ARM64_VA_BITS_39 | |
353 | default 42 if ARM64_VA_BITS_42 | |
c79b954b | 354 | default 48 if ARM64_VA_BITS_48 |
e41ceed0 | 355 | |
abe669d7 CM |
356 | config ARM64_PGTABLE_LEVELS |
357 | int | |
358 | default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42 | |
383c2799 | 359 | default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48 |
abe669d7 CM |
360 | default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39 |
361 | default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48 | |
c79b954b | 362 | |
a872013d WD |
363 | config CPU_BIG_ENDIAN |
364 | bool "Build big-endian kernel" | |
365 | help | |
366 | Say Y if you plan on running a kernel in big-endian mode. | |
367 | ||
8c2c3df3 CM |
368 | config SMP |
369 | bool "Symmetric Multi-Processing" | |
8c2c3df3 CM |
370 | help |
371 | This enables support for systems with more than one CPU. If | |
372 | you say N here, the kernel will run on single and | |
373 | multiprocessor machines, but will use only one CPU of a | |
374 | multiprocessor machine. If you say Y here, the kernel will run | |
375 | on many, but not all, single processor machines. On a single | |
376 | processor machine, the kernel will run faster if you say N | |
377 | here. | |
378 | ||
379 | If you don't know what to do here, say N. | |
380 | ||
f6e763b9 MB |
381 | config SCHED_MC |
382 | bool "Multi-core scheduler support" | |
383 | depends on SMP | |
384 | help | |
385 | Multi-core scheduler support improves the CPU scheduler's decision | |
386 | making when dealing with multi-core CPU chips at a cost of slightly | |
387 | increased overhead in some places. If unsure say N here. | |
388 | ||
389 | config SCHED_SMT | |
390 | bool "SMT scheduler support" | |
391 | depends on SMP | |
392 | help | |
393 | Improves the CPU scheduler's decision making when dealing with | |
394 | MultiThreading at a cost of slightly increased overhead in some | |
395 | places. If unsure say N here. | |
396 | ||
8c2c3df3 | 397 | config NR_CPUS |
e3672649 RR |
398 | int "Maximum number of CPUs (2-64)" |
399 | range 2 64 | |
8c2c3df3 | 400 | depends on SMP |
15942853 | 401 | # These have to remain sorted largest to smallest |
e3672649 | 402 | default "64" |
8c2c3df3 | 403 | |
9327e2c6 MR |
404 | config HOTPLUG_CPU |
405 | bool "Support for hot-pluggable CPUs" | |
406 | depends on SMP | |
407 | help | |
408 | Say Y here to experiment with turning CPUs off and on. CPUs | |
409 | can be controlled through /sys/devices/system/cpu. | |
410 | ||
8c2c3df3 CM |
411 | source kernel/Kconfig.preempt |
412 | ||
413 | config HZ | |
414 | int | |
415 | default 100 | |
416 | ||
417 | config ARCH_HAS_HOLES_MEMORYMODEL | |
418 | def_bool y if SPARSEMEM | |
419 | ||
420 | config ARCH_SPARSEMEM_ENABLE | |
421 | def_bool y | |
422 | select SPARSEMEM_VMEMMAP_ENABLE | |
423 | ||
424 | config ARCH_SPARSEMEM_DEFAULT | |
425 | def_bool ARCH_SPARSEMEM_ENABLE | |
426 | ||
427 | config ARCH_SELECT_MEMORY_MODEL | |
428 | def_bool ARCH_SPARSEMEM_ENABLE | |
429 | ||
430 | config HAVE_ARCH_PFN_VALID | |
431 | def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM | |
432 | ||
433 | config HW_PERF_EVENTS | |
434 | bool "Enable hardware performance counter support for perf events" | |
435 | depends on PERF_EVENTS | |
436 | default y | |
437 | help | |
438 | Enable hardware performance counter support for perf events. If | |
439 | disabled, perf events will use software events only. | |
440 | ||
084bd298 SC |
441 | config SYS_SUPPORTS_HUGETLBFS |
442 | def_bool y | |
443 | ||
444 | config ARCH_WANT_GENERAL_HUGETLB | |
445 | def_bool y | |
446 | ||
447 | config ARCH_WANT_HUGE_PMD_SHARE | |
448 | def_bool y if !ARM64_64K_PAGES | |
449 | ||
af074848 SC |
450 | config HAVE_ARCH_TRANSPARENT_HUGEPAGE |
451 | def_bool y | |
452 | ||
a41dc0e8 CM |
453 | config ARCH_HAS_CACHE_LINE_SIZE |
454 | def_bool y | |
455 | ||
8c2c3df3 CM |
456 | source "mm/Kconfig" |
457 | ||
aa42aa13 SS |
458 | config XEN_DOM0 |
459 | def_bool y | |
460 | depends on XEN | |
461 | ||
462 | config XEN | |
c2ba1f7d | 463 | bool "Xen guest support on ARM64" |
aa42aa13 | 464 | depends on ARM64 && OF |
83862ccf | 465 | select SWIOTLB_XEN |
aa42aa13 SS |
466 | help |
467 | Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64. | |
468 | ||
d03bb145 SC |
469 | config FORCE_MAX_ZONEORDER |
470 | int | |
471 | default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) | |
472 | default "11" | |
473 | ||
1b907f46 WD |
474 | menuconfig ARMV8_DEPRECATED |
475 | bool "Emulate deprecated/obsolete ARMv8 instructions" | |
476 | depends on COMPAT | |
477 | help | |
478 | Legacy software support may require certain instructions | |
479 | that have been deprecated or obsoleted in the architecture. | |
480 | ||
481 | Enable this config to enable selective emulation of these | |
482 | features. | |
483 | ||
484 | If unsure, say Y | |
485 | ||
486 | if ARMV8_DEPRECATED | |
487 | ||
488 | config SWP_EMULATION | |
489 | bool "Emulate SWP/SWPB instructions" | |
490 | help | |
491 | ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that | |
492 | they are always undefined. Say Y here to enable software | |
493 | emulation of these instructions for userspace using LDXR/STXR. | |
494 | ||
495 | In some older versions of glibc [<=2.8] SWP is used during futex | |
496 | trylock() operations with the assumption that the code will not | |
497 | be preempted. This invalid assumption may be more likely to fail | |
498 | with SWP emulation enabled, leading to deadlock of the user | |
499 | application. | |
500 | ||
501 | NOTE: when accessing uncached shared regions, LDXR/STXR rely | |
502 | on an external transaction monitoring block called a global | |
503 | monitor to maintain update atomicity. If your system does not | |
504 | implement a global monitor, this option can cause programs that | |
505 | perform SWP operations to uncached memory to deadlock. | |
506 | ||
507 | If unsure, say Y | |
508 | ||
509 | config CP15_BARRIER_EMULATION | |
510 | bool "Emulate CP15 Barrier instructions" | |
511 | help | |
512 | The CP15 barrier instructions - CP15ISB, CP15DSB, and | |
513 | CP15DMB - are deprecated in ARMv8 (and ARMv7). It is | |
514 | strongly recommended to use the ISB, DSB, and DMB | |
515 | instructions instead. | |
516 | ||
517 | Say Y here to enable software emulation of these | |
518 | instructions for AArch32 userspace code. When this option is | |
519 | enabled, CP15 barrier usage is traced which can help | |
520 | identify software that needs updating. | |
521 | ||
522 | If unsure, say Y | |
523 | ||
524 | endif | |
525 | ||
8c2c3df3 CM |
526 | endmenu |
527 | ||
528 | menu "Boot options" | |
529 | ||
530 | config CMDLINE | |
531 | string "Default kernel command string" | |
532 | default "" | |
533 | help | |
534 | Provide a set of default command-line options at build time by | |
535 | entering them here. As a minimum, you should specify the the | |
536 | root device (e.g. root=/dev/nfs). | |
537 | ||
538 | config CMDLINE_FORCE | |
539 | bool "Always use the default kernel command string" | |
540 | help | |
541 | Always use the default kernel command string, even if the boot | |
542 | loader passes other arguments to the kernel. | |
543 | This is useful if you cannot or don't want to change the | |
544 | command-line options your boot loader passes to the kernel. | |
545 | ||
f4f75ad5 AB |
546 | config EFI_STUB |
547 | bool | |
548 | ||
f84d0275 MS |
549 | config EFI |
550 | bool "UEFI runtime support" | |
551 | depends on OF && !CPU_BIG_ENDIAN | |
552 | select LIBFDT | |
553 | select UCS2_STRING | |
554 | select EFI_PARAMS_FROM_FDT | |
e15dd494 | 555 | select EFI_RUNTIME_WRAPPERS |
f4f75ad5 AB |
556 | select EFI_STUB |
557 | select EFI_ARMSTUB | |
f84d0275 MS |
558 | default y |
559 | help | |
560 | This option provides support for runtime services provided | |
561 | by UEFI firmware (such as non-volatile variables, realtime | |
3c7f2550 MS |
562 | clock, and platform reset). A UEFI stub is also provided to |
563 | allow the kernel to be booted as an EFI application. This | |
564 | is only useful on systems that have UEFI firmware. | |
f84d0275 | 565 | |
d1ae8c00 YL |
566 | config DMI |
567 | bool "Enable support for SMBIOS (DMI) tables" | |
568 | depends on EFI | |
569 | default y | |
570 | help | |
571 | This enables SMBIOS/DMI feature for systems. | |
572 | ||
573 | This option is only useful on systems that have UEFI firmware. | |
574 | However, even with this option, the resultant kernel should | |
575 | continue to boot on existing non-UEFI platforms. | |
576 | ||
8c2c3df3 CM |
577 | endmenu |
578 | ||
579 | menu "Userspace binary formats" | |
580 | ||
581 | source "fs/Kconfig.binfmt" | |
582 | ||
583 | config COMPAT | |
584 | bool "Kernel support for 32-bit EL0" | |
585 | depends on !ARM64_64K_PAGES | |
586 | select COMPAT_BINFMT_ELF | |
af1839eb | 587 | select HAVE_UID16 |
84b9e9b4 | 588 | select OLD_SIGSUSPEND3 |
51682036 | 589 | select COMPAT_OLD_SIGACTION |
8c2c3df3 CM |
590 | help |
591 | This option enables support for a 32-bit EL0 running under a 64-bit | |
592 | kernel at EL1. AArch32-specific components such as system calls, | |
593 | the user helper functions, VFP support and the ptrace interface are | |
594 | handled appropriately by the kernel. | |
595 | ||
596 | If you want to execute 32-bit userspace applications, say Y. | |
597 | ||
598 | config SYSVIPC_COMPAT | |
599 | def_bool y | |
600 | depends on COMPAT && SYSVIPC | |
601 | ||
602 | endmenu | |
603 | ||
166936ba LP |
604 | menu "Power management options" |
605 | ||
606 | source "kernel/power/Kconfig" | |
607 | ||
608 | config ARCH_SUSPEND_POSSIBLE | |
609 | def_bool y | |
610 | ||
611 | config ARM64_CPU_SUSPEND | |
612 | def_bool PM_SLEEP | |
613 | ||
614 | endmenu | |
615 | ||
1307220d LP |
616 | menu "CPU Power Management" |
617 | ||
618 | source "drivers/cpuidle/Kconfig" | |
619 | ||
52e7e816 RH |
620 | source "drivers/cpufreq/Kconfig" |
621 | ||
622 | endmenu | |
623 | ||
8c2c3df3 CM |
624 | source "net/Kconfig" |
625 | ||
626 | source "drivers/Kconfig" | |
627 | ||
f84d0275 MS |
628 | source "drivers/firmware/Kconfig" |
629 | ||
8c2c3df3 CM |
630 | source "fs/Kconfig" |
631 | ||
c3eb5b14 MZ |
632 | source "arch/arm64/kvm/Kconfig" |
633 | ||
8c2c3df3 CM |
634 | source "arch/arm64/Kconfig.debug" |
635 | ||
636 | source "security/Kconfig" | |
637 | ||
638 | source "crypto/Kconfig" | |
2c98833a AB |
639 | if CRYPTO |
640 | source "arch/arm64/crypto/Kconfig" | |
641 | endif | |
8c2c3df3 CM |
642 | |
643 | source "lib/Kconfig" |