arm64: Add __exception_irq_entry definition for function graph
[linux-2.6-block.git] / arch / arm64 / Kconfig
CommitLineData
8c2c3df3
CM
1config ARM64
2 def_bool y
b6197b93 3 select ACPI_CCA_REQUIRED if ACPI
d8f4f161 4 select ACPI_GENERIC_GSI if ACPI
6933de0c 5 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
8c2c3df3 6 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
2b68f6ca 7 select ARCH_HAS_ELF_RANDOMIZE
957e3fac 8 select ARCH_HAS_GCOV_PROFILE_ALL
308c09f1 9 select ARCH_HAS_SG_CHAIN
1f85008e 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
c63c8700 11 select ARCH_USE_CMPXCHG_LOCKREF
4badad35 12 select ARCH_SUPPORTS_ATOMIC_RMW
9170100e 13 select ARCH_WANT_OPTIONAL_GPIOLIB
6212a512 14 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
b6f35981 15 select ARCH_WANT_FRAME_POINTERS
25c92a37 16 select ARM_AMBA
1aee5d7a 17 select ARM_ARCH_TIMER
c4188edc 18 select ARM_GIC
875cbf3e 19 select AUDIT_ARCH_COMPAT_GENERIC
853a33ce 20 select ARM_GIC_V2M if PCI_MSI
021f6537 21 select ARM_GIC_V3
19812729 22 select ARM_GIC_V3_ITS if PCI_MSI
bff60792 23 select ARM_PSCI_FW
adace895 24 select BUILDTIME_EXTABLE_SORT
db2789b5 25 select CLONE_BACKWARDS
7ca2ef33 26 select COMMON_CLK
166936ba 27 select CPU_PM if (SUSPEND || CPU_IDLE)
7bc13fd3 28 select DCACHE_WORD_ACCESS
ef37566c 29 select EDAC_SUPPORT
d4932f9e 30 select GENERIC_ALLOCATOR
8c2c3df3 31 select GENERIC_CLOCKEVENTS
4b3dc967 32 select GENERIC_CLOCKEVENTS_BROADCAST
3be1a5c4 33 select GENERIC_CPU_AUTOPROBE
bf4b558e 34 select GENERIC_EARLY_IOREMAP
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35 select GENERIC_IRQ_PROBE
36 select GENERIC_IRQ_SHOW
6544e67b 37 select GENERIC_IRQ_SHOW_LEVEL
cb61f676 38 select GENERIC_PCI_IOMAP
65cd4f6c 39 select GENERIC_SCHED_CLOCK
8c2c3df3 40 select GENERIC_SMP_IDLE_THREAD
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WD
41 select GENERIC_STRNCPY_FROM_USER
42 select GENERIC_STRNLEN_USER
8c2c3df3 43 select GENERIC_TIME_VSYSCALL
a1ddc74a 44 select HANDLE_DOMAIN_IRQ
8c2c3df3 45 select HARDIRQS_SW_RESEND
5284e1b4 46 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
875cbf3e 47 select HAVE_ARCH_AUDITSYSCALL
8e7a4cef 48 select HAVE_ARCH_BITREVERSE
9732cafd 49 select HAVE_ARCH_JUMP_LABEL
9529247d 50 select HAVE_ARCH_KGDB
a1ae65b2 51 select HAVE_ARCH_SECCOMP_FILTER
8c2c3df3 52 select HAVE_ARCH_TRACEHOOK
e54bcde3 53 select HAVE_BPF_JIT
af64d2aa 54 select HAVE_C_RECORDMCOUNT
c0c264ae 55 select HAVE_CC_STACKPROTECTOR
5284e1b4 56 select HAVE_CMPXCHG_DOUBLE
95eff6b2 57 select HAVE_CMPXCHG_LOCAL
9b2a60c4 58 select HAVE_DEBUG_BUGVERBOSE
b69ec42b 59 select HAVE_DEBUG_KMEMLEAK
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60 select HAVE_DMA_API_DEBUG
61 select HAVE_DMA_ATTRS
6ac2104d 62 select HAVE_DMA_CONTIGUOUS
bd7d38db 63 select HAVE_DYNAMIC_FTRACE
50afc33a 64 select HAVE_EFFICIENT_UNALIGNED_ACCESS
af64d2aa 65 select HAVE_FTRACE_MCOUNT_RECORD
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66 select HAVE_FUNCTION_TRACER
67 select HAVE_FUNCTION_GRAPH_TRACER
8c2c3df3 68 select HAVE_GENERIC_DMA_COHERENT
8c2c3df3 69 select HAVE_HW_BREAKPOINT if PERF_EVENTS
8c2c3df3 70 select HAVE_MEMBLOCK
55834a77 71 select HAVE_PATA_PLATFORM
8c2c3df3 72 select HAVE_PERF_EVENTS
2ee0d7fd
JP
73 select HAVE_PERF_REGS
74 select HAVE_PERF_USER_STACK_DUMP
5e5f6dc1 75 select HAVE_RCU_TABLE_FREE
055b1212 76 select HAVE_SYSCALL_TRACEPOINTS
8c2c3df3 77 select IRQ_DOMAIN
e8557d1f 78 select IRQ_FORCED_THREADING
fea2acaa 79 select MODULES_USE_ELF_RELA
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80 select NO_BOOTMEM
81 select OF
82 select OF_EARLY_FLATTREE
9bf14b7c 83 select OF_RESERVED_MEM
8c2c3df3 84 select PERF_USE_VMALLOC
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85 select POWER_RESET
86 select POWER_SUPPLY
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87 select RTC_LIB
88 select SPARSE_IRQ
7ac57a89 89 select SYSCTL_EXCEPTION_TRACE
6c81fe79 90 select HAVE_CONTEXT_TRACKING
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91 help
92 ARM 64-bit (AArch64) Linux support.
93
94config 64BIT
95 def_bool y
96
97config ARCH_PHYS_ADDR_T_64BIT
98 def_bool y
99
100config MMU
101 def_bool y
102
ce816fa8 103config NO_IOPORT_MAP
d1e6dc91 104 def_bool y if !PCI
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105
106config STACKTRACE_SUPPORT
107 def_bool y
108
109config LOCKDEP_SUPPORT
110 def_bool y
111
112config TRACE_IRQFLAGS_SUPPORT
113 def_bool y
114
c209f799 115config RWSEM_XCHGADD_ALGORITHM
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116 def_bool y
117
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118config GENERIC_BUG
119 def_bool y
120 depends on BUG
121
122config GENERIC_BUG_RELATIVE_POINTERS
123 def_bool y
124 depends on GENERIC_BUG
125
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126config GENERIC_HWEIGHT
127 def_bool y
128
129config GENERIC_CSUM
130 def_bool y
131
132config GENERIC_CALIBRATE_DELAY
133 def_bool y
134
19e7640d 135config ZONE_DMA
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136 def_bool y
137
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138config HAVE_GENERIC_RCU_GUP
139 def_bool y
140
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141config ARCH_DMA_ADDR_T_64BIT
142 def_bool y
143
144config NEED_DMA_MAP_STATE
145 def_bool y
146
147config NEED_SG_DMA_LENGTH
148 def_bool y
149
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150config SMP
151 def_bool y
152
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153config SWIOTLB
154 def_bool y
155
156config IOMMU_HELPER
157 def_bool SWIOTLB
158
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159config KERNEL_MODE_NEON
160 def_bool y
161
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162config FIX_EARLYCON_MEM
163 def_bool y
164
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165config PGTABLE_LEVELS
166 int
167 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
168 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
169 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
170 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
171
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172source "init/Kconfig"
173
174source "kernel/Kconfig.freezer"
175
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176menu "Platform selection"
177
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178config ARCH_EXYNOS
179 bool
180 help
181 This enables support for Samsung Exynos SoC family
182
183config ARCH_EXYNOS7
184 bool "ARMv8 based Samsung Exynos7"
185 select ARCH_EXYNOS
186 select COMMON_CLK_SAMSUNG
187 select HAVE_S3C2410_WATCHDOG if WATCHDOG
188 select HAVE_S3C_RTC if RTC_CLASS
189 select PINCTRL
190 select PINCTRL_EXYNOS
191
192 help
193 This enables support for Samsung Exynos7 SoC family
194
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195config ARCH_FSL_LS2085A
196 bool "Freescale LS2085A SOC"
197 help
198 This enables support for Freescale LS2085A SOC.
199
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200config ARCH_HISI
201 bool "Hisilicon SoC Family"
202 help
203 This enables support for Hisilicon ARMv8 SoC family
204
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205config ARCH_MEDIATEK
206 bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
207 select ARM_GIC
0a233cdf 208 select PINCTRL
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209 help
210 Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
211
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212config ARCH_QCOM
213 bool "Qualcomm Platforms"
214 select PINCTRL
215 help
216 This enables support for the ARMv8 based Qualcomm chipsets.
217
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218config ARCH_SEATTLE
219 bool "AMD Seattle SoC Family"
220 help
221 This enables support for AMD Seattle SOC Family
222
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223config ARCH_TEGRA
224 bool "NVIDIA Tegra SoC Family"
225 select ARCH_HAS_RESET_CONTROLLER
226 select ARCH_REQUIRE_GPIOLIB
227 select CLKDEV_LOOKUP
228 select CLKSRC_MMIO
229 select CLKSRC_OF
230 select GENERIC_CLOCKEVENTS
231 select HAVE_CLK
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232 select PINCTRL
233 select RESET_CONTROLLER
234 help
235 This enables support for the NVIDIA Tegra SoC family.
236
237config ARCH_TEGRA_132_SOC
238 bool "NVIDIA Tegra132 SoC"
239 depends on ARCH_TEGRA
240 select PINCTRL_TEGRA124
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241 select USB_ULPI if USB_PHY
242 select USB_ULPI_VIEWPORT if USB_PHY
243 help
244 Enable support for NVIDIA Tegra132 SoC, based on the Denver
245 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
246 but contains an NVIDIA Denver CPU complex in place of
247 Tegra124's "4+1" Cortex-A15 CPU complex.
248
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249config ARCH_SPRD
250 bool "Spreadtrum SoC platform"
251 help
252 Support for Spreadtrum ARM based SoCs
253
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254config ARCH_THUNDER
255 bool "Cavium Inc. Thunder SoC Family"
256 help
257 This enables support for Cavium's Thunder Family of SoCs.
258
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259config ARCH_VEXPRESS
260 bool "ARMv8 software model (Versatile Express)"
261 select ARCH_REQUIRE_GPIOLIB
262 select COMMON_CLK_VERSATILE
aa1e8ec1 263 select POWER_RESET_VEXPRESS
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264 select VEXPRESS_CONFIG
265 help
266 This enables support for the ARMv8 software model (Versatile
267 Express).
8c2c3df3 268
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269config ARCH_XGENE
270 bool "AppliedMicro X-Gene SOC Family"
271 help
272 This enables support for AppliedMicro X-Gene SOC Family
273
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274config ARCH_ZYNQMP
275 bool "Xilinx ZynqMP Family"
276 help
277 This enables support for Xilinx ZynqMP Family
278
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279endmenu
280
281menu "Bus support"
282
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283config PCI
284 bool "PCI support"
285 help
286 This feature enables support for PCI bus system. If you say Y
287 here, the kernel will include drivers and infrastructure code
288 to support PCI bus devices.
289
290config PCI_DOMAINS
291 def_bool PCI
292
293config PCI_DOMAINS_GENERIC
294 def_bool PCI
295
296config PCI_SYSCALL
297 def_bool PCI
298
299source "drivers/pci/Kconfig"
300source "drivers/pci/pcie/Kconfig"
301source "drivers/pci/hotplug/Kconfig"
302
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303endmenu
304
305menu "Kernel Features"
306
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307menu "ARM errata workarounds via the alternatives framework"
308
309config ARM64_ERRATUM_826319
310 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
311 default y
312 help
313 This option adds an alternative code sequence to work around ARM
314 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
315 AXI master interface and an L2 cache.
316
317 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
318 and is unable to accept a certain write via this interface, it will
319 not progress on read data presented on the read data channel and the
320 system can deadlock.
321
322 The workaround promotes data cache clean instructions to
323 data cache clean-and-invalidate.
324 Please note that this does not necessarily enable the workaround,
325 as it depends on the alternative framework, which will only patch
326 the kernel if an affected CPU is detected.
327
328 If unsure, say Y.
329
330config ARM64_ERRATUM_827319
331 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
332 default y
333 help
334 This option adds an alternative code sequence to work around ARM
335 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
336 master interface and an L2 cache.
337
338 Under certain conditions this erratum can cause a clean line eviction
339 to occur at the same time as another transaction to the same address
340 on the AMBA 5 CHI interface, which can cause data corruption if the
341 interconnect reorders the two transactions.
342
343 The workaround promotes data cache clean instructions to
344 data cache clean-and-invalidate.
345 Please note that this does not necessarily enable the workaround,
346 as it depends on the alternative framework, which will only patch
347 the kernel if an affected CPU is detected.
348
349 If unsure, say Y.
350
351config ARM64_ERRATUM_824069
352 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
353 default y
354 help
355 This option adds an alternative code sequence to work around ARM
356 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
357 to a coherent interconnect.
358
359 If a Cortex-A53 processor is executing a store or prefetch for
360 write instruction at the same time as a processor in another
361 cluster is executing a cache maintenance operation to the same
362 address, then this erratum might cause a clean cache line to be
363 incorrectly marked as dirty.
364
365 The workaround promotes data cache clean instructions to
366 data cache clean-and-invalidate.
367 Please note that this option does not necessarily enable the
368 workaround, as it depends on the alternative framework, which will
369 only patch the kernel if an affected CPU is detected.
370
371 If unsure, say Y.
372
373config ARM64_ERRATUM_819472
374 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
375 default y
376 help
377 This option adds an alternative code sequence to work around ARM
378 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
379 present when it is connected to a coherent interconnect.
380
381 If the processor is executing a load and store exclusive sequence at
382 the same time as a processor in another cluster is executing a cache
383 maintenance operation to the same address, then this erratum might
384 cause data corruption.
385
386 The workaround promotes data cache clean instructions to
387 data cache clean-and-invalidate.
388 Please note that this does not necessarily enable the workaround,
389 as it depends on the alternative framework, which will only patch
390 the kernel if an affected CPU is detected.
391
392 If unsure, say Y.
393
394config ARM64_ERRATUM_832075
395 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
396 default y
397 help
398 This option adds an alternative code sequence to work around ARM
399 erratum 832075 on Cortex-A57 parts up to r1p2.
400
401 Affected Cortex-A57 parts might deadlock when exclusive load/store
402 instructions to Write-Back memory are mixed with Device loads.
403
404 The workaround is to promote device loads to use Load-Acquire
405 semantics.
406 Please note that this does not necessarily enable the workaround,
407 as it depends on the alternative framework, which will only patch
408 the kernel if an affected CPU is detected.
409
410 If unsure, say Y.
411
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412config ARM64_ERRATUM_845719
413 bool "Cortex-A53: 845719: a load might read incorrect data"
414 depends on COMPAT
415 default y
416 help
417 This option adds an alternative code sequence to work around ARM
418 erratum 845719 on Cortex-A53 parts up to r0p4.
419
420 When running a compat (AArch32) userspace on an affected Cortex-A53
421 part, a load at EL0 from a virtual address that matches the bottom 32
422 bits of the virtual address used by a recent load at (AArch64) EL1
423 might return incorrect data.
424
425 The workaround is to write the contextidr_el1 register on exception
426 return to a 32-bit task.
427 Please note that this does not necessarily enable the workaround,
428 as it depends on the alternative framework, which will only patch
429 the kernel if an affected CPU is detected.
430
431 If unsure, say Y.
432
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433endmenu
434
435
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JL
436choice
437 prompt "Page size"
438 default ARM64_4K_PAGES
439 help
440 Page size (translation granule) configuration.
441
442config ARM64_4K_PAGES
443 bool "4KB"
444 help
445 This feature enables 4KB pages support.
446
8c2c3df3 447config ARM64_64K_PAGES
e41ceed0 448 bool "64KB"
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449 help
450 This feature enables 64KB pages support (4KB by default)
451 allowing only two levels of page tables and faster TLB
452 look-up. AArch32 emulation is not available when this feature
453 is enabled.
454
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JL
455endchoice
456
457choice
458 prompt "Virtual address space size"
459 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
460 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
461 help
462 Allows choosing one of multiple possible virtual address
463 space sizes. The level of translation table is determined by
464 a combination of page size and virtual address space size.
465
466config ARM64_VA_BITS_39
467 bool "39-bit"
468 depends on ARM64_4K_PAGES
469
470config ARM64_VA_BITS_42
471 bool "42-bit"
472 depends on ARM64_64K_PAGES
473
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474config ARM64_VA_BITS_48
475 bool "48-bit"
c79b954b 476
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477endchoice
478
479config ARM64_VA_BITS
480 int
481 default 39 if ARM64_VA_BITS_39
482 default 42 if ARM64_VA_BITS_42
c79b954b 483 default 48 if ARM64_VA_BITS_48
e41ceed0 484
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485config CPU_BIG_ENDIAN
486 bool "Build big-endian kernel"
487 help
488 Say Y if you plan on running a kernel in big-endian mode.
489
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490config SCHED_MC
491 bool "Multi-core scheduler support"
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492 help
493 Multi-core scheduler support improves the CPU scheduler's decision
494 making when dealing with multi-core CPU chips at a cost of slightly
495 increased overhead in some places. If unsure say N here.
496
497config SCHED_SMT
498 bool "SMT scheduler support"
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499 help
500 Improves the CPU scheduler's decision making when dealing with
501 MultiThreading at a cost of slightly increased overhead in some
502 places. If unsure say N here.
503
8c2c3df3 504config NR_CPUS
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505 int "Maximum number of CPUs (2-4096)"
506 range 2 4096
15942853 507 # These have to remain sorted largest to smallest
e3672649 508 default "64"
8c2c3df3 509
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510config HOTPLUG_CPU
511 bool "Support for hot-pluggable CPUs"
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512 help
513 Say Y here to experiment with turning CPUs off and on. CPUs
514 can be controlled through /sys/devices/system/cpu.
515
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516source kernel/Kconfig.preempt
517
518config HZ
519 int
520 default 100
521
522config ARCH_HAS_HOLES_MEMORYMODEL
523 def_bool y if SPARSEMEM
524
525config ARCH_SPARSEMEM_ENABLE
526 def_bool y
527 select SPARSEMEM_VMEMMAP_ENABLE
528
529config ARCH_SPARSEMEM_DEFAULT
530 def_bool ARCH_SPARSEMEM_ENABLE
531
532config ARCH_SELECT_MEMORY_MODEL
533 def_bool ARCH_SPARSEMEM_ENABLE
534
535config HAVE_ARCH_PFN_VALID
536 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
537
538config HW_PERF_EVENTS
539 bool "Enable hardware performance counter support for perf events"
540 depends on PERF_EVENTS
541 default y
542 help
543 Enable hardware performance counter support for perf events. If
544 disabled, perf events will use software events only.
545
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546config SYS_SUPPORTS_HUGETLBFS
547 def_bool y
548
549config ARCH_WANT_GENERAL_HUGETLB
550 def_bool y
551
552config ARCH_WANT_HUGE_PMD_SHARE
553 def_bool y if !ARM64_64K_PAGES
554
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555config HAVE_ARCH_TRANSPARENT_HUGEPAGE
556 def_bool y
557
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558config ARCH_HAS_CACHE_LINE_SIZE
559 def_bool y
560
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561source "mm/Kconfig"
562
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563config SECCOMP
564 bool "Enable seccomp to safely compute untrusted bytecode"
565 ---help---
566 This kernel feature is useful for number crunching applications
567 that may need to compute untrusted bytecode during their
568 execution. By using pipes or other transports made available to
569 the process as file descriptors supporting the read/write
570 syscalls, it's possible to isolate those applications in
571 their own address space using seccomp. Once seccomp is
572 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
573 and the task is only allowed to execute a few safe syscalls
574 defined by each seccomp mode.
575
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576config XEN_DOM0
577 def_bool y
578 depends on XEN
579
580config XEN
c2ba1f7d 581 bool "Xen guest support on ARM64"
aa42aa13 582 depends on ARM64 && OF
83862ccf 583 select SWIOTLB_XEN
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584 help
585 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
586
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587config FORCE_MAX_ZONEORDER
588 int
589 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
590 default "11"
591
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592menuconfig ARMV8_DEPRECATED
593 bool "Emulate deprecated/obsolete ARMv8 instructions"
594 depends on COMPAT
595 help
596 Legacy software support may require certain instructions
597 that have been deprecated or obsoleted in the architecture.
598
599 Enable this config to enable selective emulation of these
600 features.
601
602 If unsure, say Y
603
604if ARMV8_DEPRECATED
605
606config SWP_EMULATION
607 bool "Emulate SWP/SWPB instructions"
608 help
609 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
610 they are always undefined. Say Y here to enable software
611 emulation of these instructions for userspace using LDXR/STXR.
612
613 In some older versions of glibc [<=2.8] SWP is used during futex
614 trylock() operations with the assumption that the code will not
615 be preempted. This invalid assumption may be more likely to fail
616 with SWP emulation enabled, leading to deadlock of the user
617 application.
618
619 NOTE: when accessing uncached shared regions, LDXR/STXR rely
620 on an external transaction monitoring block called a global
621 monitor to maintain update atomicity. If your system does not
622 implement a global monitor, this option can cause programs that
623 perform SWP operations to uncached memory to deadlock.
624
625 If unsure, say Y
626
627config CP15_BARRIER_EMULATION
628 bool "Emulate CP15 Barrier instructions"
629 help
630 The CP15 barrier instructions - CP15ISB, CP15DSB, and
631 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
632 strongly recommended to use the ISB, DSB, and DMB
633 instructions instead.
634
635 Say Y here to enable software emulation of these
636 instructions for AArch32 userspace code. When this option is
637 enabled, CP15 barrier usage is traced which can help
638 identify software that needs updating.
639
640 If unsure, say Y
641
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642config SETEND_EMULATION
643 bool "Emulate SETEND instruction"
644 help
645 The SETEND instruction alters the data-endianness of the
646 AArch32 EL0, and is deprecated in ARMv8.
647
648 Say Y here to enable software emulation of the instruction
649 for AArch32 userspace code.
650
651 Note: All the cpus on the system must have mixed endian support at EL0
652 for this feature to be enabled. If a new CPU - which doesn't support mixed
653 endian - is hotplugged in after this feature has been enabled, there could
654 be unexpected results in the applications.
655
656 If unsure, say Y
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657endif
658
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659menu "ARMv8.1 architectural features"
660
661config ARM64_HW_AFDBM
662 bool "Support for hardware updates of the Access and Dirty page flags"
663 default y
664 help
665 The ARMv8.1 architecture extensions introduce support for
666 hardware updates of the access and dirty information in page
667 table entries. When enabled in TCR_EL1 (HA and HD bits) on
668 capable processors, accesses to pages with PTE_AF cleared will
669 set this bit instead of raising an access flag fault.
670 Similarly, writes to read-only pages with the DBM bit set will
671 clear the read-only bit (AP[2]) instead of raising a
672 permission fault.
673
674 Kernels built with this configuration option enabled continue
675 to work on pre-ARMv8.1 hardware and the performance impact is
676 minimal. If unsure, say Y.
677
678config ARM64_PAN
679 bool "Enable support for Privileged Access Never (PAN)"
680 default y
681 help
682 Privileged Access Never (PAN; part of the ARMv8.1 Extensions)
683 prevents the kernel or hypervisor from accessing user-space (EL0)
684 memory directly.
685
686 Choosing this option will cause any unprotected (not using
687 copy_to_user et al) memory access to fail with a permission fault.
688
689 The feature is detected at runtime, and will remain as a 'nop'
690 instruction if the cpu does not implement the feature.
691
692config ARM64_LSE_ATOMICS
693 bool "Atomic instructions"
694 help
695 As part of the Large System Extensions, ARMv8.1 introduces new
696 atomic instructions that are designed specifically to scale in
697 very large systems.
698
699 Say Y here to make use of these instructions for the in-kernel
700 atomic routines. This incurs a small overhead on CPUs that do
701 not support these instructions and requires the kernel to be
702 built with binutils >= 2.25.
703
704endmenu
705
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706endmenu
707
708menu "Boot options"
709
710config CMDLINE
711 string "Default kernel command string"
712 default ""
713 help
714 Provide a set of default command-line options at build time by
715 entering them here. As a minimum, you should specify the the
716 root device (e.g. root=/dev/nfs).
717
718config CMDLINE_FORCE
719 bool "Always use the default kernel command string"
720 help
721 Always use the default kernel command string, even if the boot
722 loader passes other arguments to the kernel.
723 This is useful if you cannot or don't want to change the
724 command-line options your boot loader passes to the kernel.
725
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726config EFI_STUB
727 bool
728
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729config EFI
730 bool "UEFI runtime support"
731 depends on OF && !CPU_BIG_ENDIAN
732 select LIBFDT
733 select UCS2_STRING
734 select EFI_PARAMS_FROM_FDT
e15dd494 735 select EFI_RUNTIME_WRAPPERS
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736 select EFI_STUB
737 select EFI_ARMSTUB
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738 default y
739 help
740 This option provides support for runtime services provided
741 by UEFI firmware (such as non-volatile variables, realtime
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742 clock, and platform reset). A UEFI stub is also provided to
743 allow the kernel to be booted as an EFI application. This
744 is only useful on systems that have UEFI firmware.
f84d0275 745
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746config DMI
747 bool "Enable support for SMBIOS (DMI) tables"
748 depends on EFI
749 default y
750 help
751 This enables SMBIOS/DMI feature for systems.
752
753 This option is only useful on systems that have UEFI firmware.
754 However, even with this option, the resultant kernel should
755 continue to boot on existing non-UEFI platforms.
756
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757endmenu
758
759menu "Userspace binary formats"
760
761source "fs/Kconfig.binfmt"
762
763config COMPAT
764 bool "Kernel support for 32-bit EL0"
a8fcd8b1 765 depends on !ARM64_64K_PAGES || EXPERT
8c2c3df3 766 select COMPAT_BINFMT_ELF
af1839eb 767 select HAVE_UID16
84b9e9b4 768 select OLD_SIGSUSPEND3
51682036 769 select COMPAT_OLD_SIGACTION
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770 help
771 This option enables support for a 32-bit EL0 running under a 64-bit
772 kernel at EL1. AArch32-specific components such as system calls,
773 the user helper functions, VFP support and the ptrace interface are
774 handled appropriately by the kernel.
775
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776 If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
777 will only be able to execute AArch32 binaries that were compiled with
778 64k aligned segments.
779
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780 If you want to execute 32-bit userspace applications, say Y.
781
782config SYSVIPC_COMPAT
783 def_bool y
784 depends on COMPAT && SYSVIPC
785
786endmenu
787
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788menu "Power management options"
789
790source "kernel/power/Kconfig"
791
792config ARCH_SUSPEND_POSSIBLE
793 def_bool y
794
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795endmenu
796
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797menu "CPU Power Management"
798
799source "drivers/cpuidle/Kconfig"
800
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801source "drivers/cpufreq/Kconfig"
802
803endmenu
804
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805source "net/Kconfig"
806
807source "drivers/Kconfig"
808
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809source "drivers/firmware/Kconfig"
810
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811source "drivers/acpi/Kconfig"
812
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813source "fs/Kconfig"
814
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815source "arch/arm64/kvm/Kconfig"
816
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817source "arch/arm64/Kconfig.debug"
818
819source "security/Kconfig"
820
821source "crypto/Kconfig"
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822if CRYPTO
823source "arch/arm64/crypto/Kconfig"
824endif
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825
826source "lib/Kconfig"