Commit | Line | Data |
---|---|---|
3cba5ef8 BD |
1 | /* arch/arm/plat-s3c/include/plat/watchdog-reset.h |
2 | * | |
3 | * Copyright (c) 2008 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * S3C2410 - System define for arch_reset() function | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <plat/regs-watchdog.h> | |
543899f6 | 14 | #include <mach/map.h> |
3cba5ef8 BD |
15 | |
16 | #include <linux/clk.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/io.h> | |
19 | ||
20 | static inline void arch_wdt_reset(void) | |
21 | { | |
22 | struct clk *wdtclk; | |
23 | ||
24 | printk("arch_reset: attempting watchdog reset\n"); | |
25 | ||
26 | __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ | |
27 | ||
28 | wdtclk = clk_get(NULL, "watchdog"); | |
29 | if (!IS_ERR(wdtclk)) { | |
30 | clk_enable(wdtclk); | |
31 | } else | |
32 | printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); | |
33 | ||
34 | /* put initial values into count and data */ | |
35 | __raw_writel(0x80, S3C2410_WTCNT); | |
36 | __raw_writel(0x80, S3C2410_WTDAT); | |
37 | ||
38 | /* set the watchdog to go and reset... */ | |
39 | __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN | | |
40 | S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON); | |
41 | ||
42 | /* wait for reset to assert... */ | |
43 | mdelay(500); | |
44 | ||
45 | printk(KERN_ERR "Watchdog reset failed to assert reset\n"); | |
46 | ||
47 | /* delay to allow the serial port to show the message */ | |
48 | mdelay(50); | |
49 | } |