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1 | # Copyright 2007 Simtec Electronics |
2 | # | |
3 | # Licensed under GPLv2 | |
4 | ||
5 | config PLAT_S3C | |
6 | bool | |
a08ab637 | 7 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX |
bcae8aeb | 8 | default y |
d58153d8 BD |
9 | select NO_IOPORT |
10 | help | |
11 | Base platform code for any Samsung S3C device | |
12 | ||
b2627588 BD |
13 | # low-level serial option nodes |
14 | ||
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15 | if PLAT_S3C |
16 | ||
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17 | config CPU_LLSERIAL_S3C2410_ONLY |
18 | bool | |
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19 | default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440 |
20 | ||
21 | config CPU_LLSERIAL_S3C2440_ONLY | |
22 | bool | |
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23 | default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410 |
24 | ||
25 | config CPU_LLSERIAL_S3C2410 | |
26 | bool | |
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27 | help |
28 | Selected if there is an S3C2410 (or register compatible) serial | |
29 | low-level implementation needed | |
30 | ||
31 | config CPU_LLSERIAL_S3C2440 | |
32 | bool | |
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33 | help |
34 | Selected if there is an S3C2440 (or register compatible) serial | |
35 | low-level implementation needed | |
36 | ||
37 | # boot configurations | |
38 | ||
d58153d8 BD |
39 | comment "Boot options" |
40 | ||
a45f8261 BD |
41 | config S3C_BOOT_WATCHDOG |
42 | bool "S3C Initialisation watchdog" | |
d83a12a4 | 43 | depends on S3C2410_WATCHDOG |
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44 | help |
45 | Say y to enable the watchdog during the kernel decompression | |
46 | stage. If the kernel fails to uncompress, then the watchdog | |
47 | will trigger a reset and the system should restart. | |
48 | ||
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49 | config S3C_BOOT_ERROR_RESET |
50 | bool "S3C Reboot on decompression error" | |
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51 | help |
52 | Say y here to use the watchdog to reset the system if the | |
53 | kernel decompressor detects an error during decompression. | |
54 | ||
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55 | config S3C_BOOT_UART_FORCE_FIFO |
56 | bool "Force UART FIFO on during boot process" | |
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57 | default y |
58 | help | |
59 | Say Y here to force the UART FIFOs on during the kernel | |
60 | uncompressor | |
61 | ||
d58153d8 BD |
62 | comment "Power management" |
63 | ||
64 | config S3C2410_PM_DEBUG | |
65 | bool "S3C2410 PM Suspend debug" | |
d83a12a4 | 66 | depends on PM |
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67 | help |
68 | Say Y here if you want verbose debugging from the PM Suspend and | |
69 | Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
70 | for more information. | |
71 | ||
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72 | config S3C_PM_DEBUG_LED_SMDK |
73 | bool "SMDK LED suspend/resume debugging" | |
74 | depends on PM && (MACH_SMDK6410) | |
75 | help | |
76 | Say Y here to enable the use of the SMDK LEDs on the baseboard | |
77 | for debugging of the state of the suspend and resume process. | |
78 | ||
79 | Note, this currently only works for S3C64XX based SMDK boards. | |
80 | ||
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81 | config S3C2410_PM_CHECK |
82 | bool "S3C2410 PM Suspend Memory CRC" | |
d83a12a4 | 83 | depends on PM && CRC32 |
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84 | help |
85 | Enable the PM code's memory area checksum over sleep. This option | |
86 | will generate CRCs of all blocks of memory, and store them before | |
87 | going to sleep. The blocks are then checked on resume for any | |
88 | errors. | |
89 | ||
90 | Note, this can take several seconds depending on memory size | |
91 | and CPU speed. | |
92 | ||
93 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
94 | ||
95 | config S3C2410_PM_CHECK_CHUNKSIZE | |
96 | int "S3C2410 PM Suspend CRC Chunksize (KiB)" | |
d83a12a4 | 97 | depends on PM && S3C2410_PM_CHECK |
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98 | default 64 |
99 | help | |
100 | Set the chunksize in Kilobytes of the CRC for checking memory | |
101 | corruption over suspend and resume. A smaller value will mean that | |
102 | the CRC data block will take more memory, but wil identify any | |
103 | faults with better precision. | |
104 | ||
105 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
106 | ||
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107 | config S3C_LOWLEVEL_UART_PORT |
108 | int "S3C UART to use for low-level messages" | |
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109 | default 0 |
110 | help | |
111 | Choice of which UART port to use for the low-level messages, | |
112 | such as the `Uncompressing...` at start time. The value of | |
113 | this configuration should be between zero and two. The port | |
114 | must have been initialised by the boot-loader before use. | |
5b323c7b | 115 | |
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116 | # options for gpiolib support |
117 | ||
118 | config S3C_GPIO_SPACE | |
119 | int "Space between gpio banks" | |
120 | default 0 | |
121 | help | |
122 | Add a number of spare GPIO entries between each bank for debugging | |
123 | purposes. This allows any problems where an counter overflows from | |
124 | one bank to another to be caught, at the expense of using a little | |
125 | more memory. | |
126 | ||
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127 | config S3C_GPIO_TRACK |
128 | bool | |
129 | help | |
130 | Internal configuration option to enable the s3c specific gpio | |
131 | chip tracking if the platform requires it. | |
132 | ||
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133 | config S3C_GPIO_PULL_UPDOWN |
134 | bool | |
135 | help | |
136 | Internal configuration to enable the correct GPIO pull helper | |
137 | ||
138 | config S3C_GPIO_PULL_DOWN | |
139 | bool | |
140 | help | |
141 | Internal configuration to enable the correct GPIO pull helper | |
142 | ||
143 | config S3C_GPIO_PULL_UP | |
144 | bool | |
145 | help | |
146 | Internal configuration to enable the correct GPIO pull helper | |
147 | ||
148 | config S3C_GPIO_CFG_S3C24XX | |
149 | bool | |
150 | help | |
151 | Internal configuration to enable S3C24XX style GPIO configuration | |
152 | functions. | |
153 | ||
154 | config S3C_GPIO_CFG_S3C64XX | |
155 | bool | |
156 | help | |
157 | Internal configuration to enable S3C64XX style GPIO configuration | |
158 | functions. | |
159 | ||
b0d5217c KP |
160 | config S5P_GPIO_CFG_S5PC1XX |
161 | bool | |
162 | help | |
163 | Internal configuration to enable S5PC1XX style GPIO configuration | |
164 | functions. | |
165 | ||
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166 | # DMA |
167 | ||
168 | config S3C_DMA | |
169 | bool | |
170 | help | |
171 | Internal configuration for S3C DMA core | |
172 | ||
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173 | # device definitions to compile in |
174 | ||
175 | config S3C_DEV_HSMMC | |
176 | bool | |
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177 | help |
178 | Compile in platform device definitions for HSMMC code | |
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179 | |
180 | config S3C_DEV_HSMMC1 | |
181 | bool | |
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182 | help |
183 | Compile in platform device definitions for HSMMC channel 1 | |
1aba834d | 184 | |
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185 | config S3C_DEV_HSMMC2 |
186 | bool | |
187 | help | |
188 | Compile in platform device definitions for HSMMC channel 2 | |
189 | ||
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190 | config S3C_DEV_I2C1 |
191 | bool | |
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192 | help |
193 | Compile in platform device definitions for I2C channel 1 | |
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194 | |
195 | config S3C_DEV_FB | |
196 | bool | |
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197 | help |
198 | Compile in platform device definition for framebuffer | |
d83a12a4 | 199 | |
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200 | config S3C_DEV_USB_HOST |
201 | bool | |
202 | help | |
203 | Compile in platform device definition for USB host. | |
204 | ||
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205 | config S3C_DEV_USB_HSOTG |
206 | bool | |
207 | help | |
208 | Compile in platform device definition for USB high-speed OtG | |
209 | ||
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210 | config S3C_DEV_NAND |
211 | bool | |
212 | help | |
213 | Compile in platform device definition for NAND controller | |
214 | ||
d83a12a4 | 215 | endif |