[linux-2.6-block.git] / arch / arm / plat-omap / common.c

/*
 * linux/arch/arm/plat-omap/common.c
 *
 * Code common to all OMAP machines.
 * The file is created by Tony Lindgren <tony@atomide.com>
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/setup.h>

#include <plat/common.h>
#include <plat/board.h>
#include <plat/control.h>
#include <plat/mux.h>
#include <plat/fpga.h>
#include <plat/serial.h>

#include <plat/clock.h>

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
# include "../mach-omap2/sdrc.h"
#endif

#define NO_LENGTH_CHECK 0xffffffff

unsigned char omap_bootloader_tag[512];
int omap_bootloader_tag_len;

struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size;

/* used by omap-smp.c and board-4430sdp.c */
void __iomem *gic_cpu_base_addr;

static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
{
	struct omap_board_config_kernel *kinfo = NULL;
	int i;

	/* Try to find the config from the board-specific structures
	 * in the kernel. */
	for (i = 0; i < omap_board_config_size; i++) {
		if (omap_board_config[i].tag == tag) {
			if (skip == 0) {
				kinfo = &omap_board_config[i];
				break;
			} else {
				skip--;
			}
		}
	}
	if (kinfo == NULL)
		return NULL;
	return kinfo->data;
}

const void *__omap_get_config(u16 tag, size_t len, int nr)
{
        return get_config(tag, len, nr, NULL);
}
EXPORT_SYMBOL(__omap_get_config);

const void *omap_get_var_config(u16 tag, size_t *len)
{
        return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
EXPORT_SYMBOL(omap_get_var_config);

/*
 * 32KHz clocksource ... always available, on pretty most chips except
 * OMAP 730 and 1510.  Other timers could be used as clocksources, with
 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
 * but systems won't necessarily want to spend resources that way.
 */

#define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410

#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))

#include <linux/clocksource.h>

#ifdef CONFIG_ARCH_OMAP16XX
static cycle_t omap16xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED);
}
#else
#define omap16xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2420
static cycle_t omap2420_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10);
}
#else
#define omap2420_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2430
static cycle_t omap2430_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10);
}
#else
#define omap2430_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP3
static cycle_t omap34xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10);
}
#else
#define omap34xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP4
static cycle_t omap44xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10);
}
#else
#define omap44xx_32k_read	NULL
#endif

/*
 * Kernel assumes that sched_clock can be called early but may not have
 * things ready yet.
 */
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
{
	return 0;
}

static struct clocksource clocksource_32k = {
	.name		= "32k_counter",
	.rating		= 250,
	.read		= omap_32k_read_dummy,
	.mask		= CLOCKSOURCE_MASK(32),
	.shift		= 10,
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};

/*
 * Returns current time from boot in nsecs. It's OK for this to wrap
 * around for now, as it's just a relative time stamp.
 */
unsigned long long sched_clock(void)
{
	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
				  clocksource_32k.mult, clocksource_32k.shift);
}

/**
 * read_persistent_clock -  Return time from a persistent clock.
 *
 * Reads the time from a source which isn't disabled during PM, the
 * 32k sync timer.  Convert the cycles elapsed since last read into
 * nsecs and adds to a monotonically increasing timespec.
 */
static struct timespec persistent_ts;
static cycles_t cycles, last_cycles;
void read_persistent_clock(struct timespec *ts)
{
	unsigned long long nsecs;
	cycles_t delta;
	struct timespec *tsp = &persistent_ts;

	last_cycles = cycles;
	cycles = clocksource_32k.read(&clocksource_32k);
	delta = cycles - last_cycles;

	nsecs = clocksource_cyc2ns(delta,
				   clocksource_32k.mult, clocksource_32k.shift);

	timespec_add_ns(tsp, nsecs);
	*ts = *tsp;
}

static int __init omap_init_clocksource_32k(void)
{
	static char err[] __initdata = KERN_ERR
			"%s: can't register clocksource!\n";

	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
		struct clk *sync_32k_ick;

		if (cpu_is_omap16xx())
			clocksource_32k.read = omap16xx_32k_read;
		else if (cpu_is_omap2420())
			clocksource_32k.read = omap2420_32k_read;
		else if (cpu_is_omap2430())
			clocksource_32k.read = omap2430_32k_read;
		else if (cpu_is_omap34xx())
			clocksource_32k.read = omap34xx_32k_read;
		else if (cpu_is_omap44xx())
			clocksource_32k.read = omap44xx_32k_read;
		else
			return -ENODEV;

		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
		if (sync_32k_ick)
			clk_enable(sync_32k_ick);

		clocksource_32k.mult = clocksource_hz2mult(32768,
					    clocksource_32k.shift);

		if (clocksource_register(&clocksource_32k))
			printk(err, clocksource_32k.name);
	}
	return 0;
}
arch_initcall(omap_init_clocksource_32k);

#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */

/* Global address base setup code */

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
{
	omap2_set_globals_tap(omap2_globals);
	omap2_set_globals_sdrc(omap2_globals);
	omap2_set_globals_control(omap2_globals);
	omap2_set_globals_prcm(omap2_globals);
	omap2_set_globals_uart(omap2_globals);
}

#endif

#if defined(CONFIG_ARCH_OMAP2420)

static struct omap_globals omap242x_globals = {
	.class	= OMAP242X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
	.sdrc	= OMAP2420_SDRC_BASE,
	.sms	= OMAP2420_SMS_BASE,
	.ctrl	= OMAP2420_CTRL_BASE,
	.prm	= OMAP2420_PRM_BASE,
	.cm	= OMAP2420_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_242x(void)
{
	__omap2_set_globals(&omap242x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP2430)

static struct omap_globals omap243x_globals = {
	.class	= OMAP243X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
	.sdrc	= OMAP243X_SDRC_BASE,
	.sms	= OMAP243X_SMS_BASE,
	.ctrl	= OMAP243X_CTRL_BASE,
	.prm	= OMAP2430_PRM_BASE,
	.cm	= OMAP2430_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_243x(void)
{
	__omap2_set_globals(&omap243x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP3)

static struct omap_globals omap3_globals = {
	.class	= OMAP343X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
	.sdrc	= OMAP343X_SDRC_BASE,
	.sms	= OMAP343X_SMS_BASE,
	.ctrl	= OMAP343X_CTRL_BASE,
	.prm	= OMAP3430_PRM_BASE,
	.cm	= OMAP3430_CM_BASE,
	.uart1_phys	= OMAP3_UART1_BASE,
	.uart2_phys	= OMAP3_UART2_BASE,
	.uart3_phys	= OMAP3_UART3_BASE,
};

void __init omap2_set_globals_343x(void)
{
	__omap2_set_globals(&omap3_globals);
}

void __init omap2_set_globals_36xx(void)
{
	omap3_globals.uart4_phys = OMAP3_UART4_BASE;

	__omap2_set_globals(&omap3_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP4)
static struct omap_globals omap4_globals = {
	.class	= OMAP443X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
	.ctrl	= OMAP443X_CTRL_BASE,
	.prm	= OMAP4430_PRM_BASE,
	.cm	= OMAP4430_CM_BASE,
	.cm2	= OMAP4430_CM2_BASE,
	.uart1_phys	= OMAP4_UART1_BASE,
	.uart2_phys	= OMAP4_UART2_BASE,
	.uart3_phys	= OMAP4_UART3_BASE,
	.uart4_phys	= OMAP4_UART4_BASE,
};

void __init omap2_set_globals_443x(void)
{
	omap2_set_globals_tap(&omap4_globals);
	omap2_set_globals_control(&omap4_globals);
	omap2_set_globals_prcm(&omap4_globals);
	omap2_set_globals_uart(&omap4_globals);
}
#endif
Commit	Line	Data
5e1c5ff4 TL	1	/*
	2	* linux/arch/arm/plat-omap/common.c
	3	*
	4	* Code common to all OMAP machines.
44169075 SS	5	* The file is created by Tony Lindgren <tony@atomide.com>
	6	*
	7	* Copyright (C) 2009 Texas Instruments
	8	* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
5e1c5ff4 TL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
5e1c5ff4 TL	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
5e1c5ff4 TL	18	#include <linux/console.h>
	19	#include <linux/serial.h>
	20	#include <linux/tty.h>
	21	#include <linux/serial_8250.h>
	22	#include <linux/serial_reg.h>
f8ce2547	23	#include <linux/clk.h>
fced80c7	24	#include <linux/io.h>
5e1c5ff4	25
a09e64fb	26	#include <mach/hardware.h>
5e1c5ff4 TL	27	#include <asm/system.h>
	28	#include <asm/pgtable.h>
	29	#include <asm/mach/map.h>
92105bb7	30	#include <asm/setup.h>
5e1c5ff4	31
ce491cf8 TL	32	#include <plat/common.h>
	33	#include <plat/board.h>
	34	#include <plat/control.h>
	35	#include <plat/mux.h>
	36	#include <plat/fpga.h>
4f2c49fe	37	#include <plat/serial.h>
5e1c5ff4	38
ce491cf8	39	#include <plat/clock.h>
5e1c5ff4	40
44595982 PW	41	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
	42	# include "../mach-omap2/sdrc.h"
	43	#endif
	44
5e1c5ff4 TL	45	#define NO_LENGTH_CHECK 0xffffffff
5e1c5ff4 TL	46
92105bb7 TL	47	unsigned char omap_bootloader_tag[512];
92105bb7 TL	48	int omap_bootloader_tag_len;
5e1c5ff4 TL	49
5e1c5ff4 TL	50	struct omap_board_config_kernel *omap_board_config;
92105bb7	51	int omap_board_config_size;
5e1c5ff4	52
e4e7a13a TL	53	/* used by omap-smp.c and board-4430sdp.c */
	54	void __iomem *gic_cpu_base_addr;
	55
5e1c5ff4 TL	56	static const void get_config(u16 tag, size_t len, int skip, size_t len_out)
	57	{
	58	struct omap_board_config_kernel *kinfo = NULL;
	59	int i;
	60
5e1c5ff4 TL	61	/* Try to find the config from the board-specific structures
	62	* in the kernel. */
	63	for (i = 0; i < omap_board_config_size; i++) {
	64	if (omap_board_config[i].tag == tag) {
c40fae95 TL	65	if (skip == 0) {
	66	kinfo = &omap_board_config[i];
	67	break;
	68	} else {
	69	skip--;
	70	}
5e1c5ff4 TL	71	}
	72	}
	73	if (kinfo == NULL)
	74	return NULL;
	75	return kinfo->data;
	76	}
	77
	78	const void *__omap_get_config(u16 tag, size_t len, int nr)
	79	{
	80	return get_config(tag, len, nr, NULL);
	81	}
	82	EXPORT_SYMBOL(__omap_get_config);
	83
	84	const void omap_get_var_config(u16 tag, size_t len)
	85	{
	86	return get_config(tag, NO_LENGTH_CHECK, 0, len);
	87	}
	88	EXPORT_SYMBOL(omap_get_var_config);
	89
075192ae KH	90	/*
	91	* 32KHz clocksource ... always available, on pretty most chips except
	92	* OMAP 730 and 1510. Other timers could be used as clocksources, with
	93	* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
	94	* but systems won't necessarily want to spend resources that way.
	95	*/
	96
a4ab0d83	97	#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
075192ae	98
a4ab0d83	99	#if !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX))
075192ae KH	100
	101	#include <linux/clocksource.h>
	102
a4ab0d83 TL	103	#ifdef CONFIG_ARCH_OMAP16XX
	104	static cycle_t omap16xx_32k_read(struct clocksource *cs)
	105	{
	106	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED);
	107	}
	108	#else
	109	#define omap16xx_32k_read NULL
	110	#endif
	111
	112	#ifdef CONFIG_ARCH_OMAP2420
	113	static cycle_t omap2420_32k_read(struct clocksource *cs)
	114	{
	115	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10);
	116	}
	117	#else
	118	#define omap2420_32k_read NULL
	119	#endif
	120
	121	#ifdef CONFIG_ARCH_OMAP2430
	122	static cycle_t omap2430_32k_read(struct clocksource *cs)
	123	{
	124	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10);
	125	}
	126	#else
	127	#define omap2430_32k_read NULL
	128	#endif
	129
a8eb7ca0	130	#ifdef CONFIG_ARCH_OMAP3
a4ab0d83	131	static cycle_t omap34xx_32k_read(struct clocksource *cs)
075192ae	132	{
a4ab0d83 TL	133	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10);
	134	}
	135	#else
	136	#define omap34xx_32k_read NULL
	137	#endif
	138
44169075 SS	139	#ifdef CONFIG_ARCH_OMAP4
	140	static cycle_t omap44xx_32k_read(struct clocksource *cs)
	141	{
	142	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10);
	143	}
	144	#else
	145	#define omap44xx_32k_read NULL
	146	#endif
	147
a4ab0d83 TL	148	/*
	149	* Kernel assumes that sched_clock can be called early but may not have
	150	* things ready yet.
	151	*/
	152	static cycle_t omap_32k_read_dummy(struct clocksource *cs)
	153	{
	154	return 0;
075192ae KH	155	}
	156
	157	static struct clocksource clocksource_32k = {
	158	.name = "32k_counter",
	159	.rating = 250,
a4ab0d83	160	.read = omap_32k_read_dummy,
075192ae KH	161	.mask = CLOCKSOURCE_MASK(32),
	162	.shift = 10,
	163	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	164	};
	165
f258b0c6 KH	166	/*
	167	* Returns current time from boot in nsecs. It's OK for this to wrap
	168	* around for now, as it's just a relative time stamp.
	169	*/
	170	unsigned long long sched_clock(void)
	171	{
0a544198 MS	172	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
0a544198 MS	173	clocksource_32k.mult, clocksource_32k.shift);
f258b0c6 KH	174	}
f258b0c6 KH	175
d92cfcbe KH	176	/**
	177	* read_persistent_clock - Return time from a persistent clock.
	178	*
	179	* Reads the time from a source which isn't disabled during PM, the
	180	* 32k sync timer. Convert the cycles elapsed since last read into
	181	* nsecs and adds to a monotonically increasing timespec.
	182	*/
	183	static struct timespec persistent_ts;
	184	static cycles_t cycles, last_cycles;
	185	void read_persistent_clock(struct timespec *ts)
	186	{
	187	unsigned long long nsecs;
	188	cycles_t delta;
	189	struct timespec *tsp = &persistent_ts;
	190
	191	last_cycles = cycles;
	192	cycles = clocksource_32k.read(&clocksource_32k);
	193	delta = cycles - last_cycles;
	194
	195	nsecs = clocksource_cyc2ns(delta,
	196	clocksource_32k.mult, clocksource_32k.shift);
	197
	198	timespec_add_ns(tsp, nsecs);
	199	ts = tsp;
	200	}
	201
075192ae KH	202	static int __init omap_init_clocksource_32k(void)
	203	{
	204	static char err[] __initdata = KERN_ERR
	205	"%s: can't register clocksource!\n";
	206
44595982 PW	207	if (cpu_is_omap16xx() \|\| cpu_class_is_omap2()) {
	208	struct clk *sync_32k_ick;
	209
a4ab0d83 TL	210	if (cpu_is_omap16xx())
	211	clocksource_32k.read = omap16xx_32k_read;
	212	else if (cpu_is_omap2420())
	213	clocksource_32k.read = omap2420_32k_read;
	214	else if (cpu_is_omap2430())
	215	clocksource_32k.read = omap2430_32k_read;
	216	else if (cpu_is_omap34xx())
	217	clocksource_32k.read = omap34xx_32k_read;
44169075 SS	218	else if (cpu_is_omap44xx())
44169075 SS	219	clocksource_32k.read = omap44xx_32k_read;
a4ab0d83 TL	220	else
	221	return -ENODEV;
	222
44595982 PW	223	sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
	224	if (sync_32k_ick)
	225	clk_enable(sync_32k_ick);
	226
075192ae KH	227	clocksource_32k.mult = clocksource_hz2mult(32768,
	228	clocksource_32k.shift);
	229
	230	if (clocksource_register(&clocksource_32k))
	231	printk(err, clocksource_32k.name);
	232	}
	233	return 0;
	234	}
	235	arch_initcall(omap_init_clocksource_32k);
	236
a4ab0d83	237	#endif /* !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX)) */
44595982 PW	238
	239	/* Global address base setup code */
	240
a58caad1 TL	241	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
a58caad1 TL	242
8f9ccfee	243	static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
a58caad1	244	{
0e564848	245	omap2_set_globals_tap(omap2_globals);
f2ab9977	246	omap2_set_globals_sdrc(omap2_globals);
a58caad1 TL	247	omap2_set_globals_control(omap2_globals);
a58caad1 TL	248	omap2_set_globals_prcm(omap2_globals);
4f2c49fe	249	omap2_set_globals_uart(omap2_globals);
a58caad1 TL	250	}
	251
	252	#endif
	253
44595982	254	#if defined(CONFIG_ARCH_OMAP2420)
a58caad1 TL	255
a58caad1 TL	256	static struct omap_globals omap242x_globals = {
0e564848	257	.class = OMAP242X_CLASS,
233fd64e	258	.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
b7ebb10b SS	259	.sdrc = OMAP2420_SDRC_BASE,
	260	.sms = OMAP2420_SMS_BASE,
	261	.ctrl = OMAP2420_CTRL_BASE,
	262	.prm = OMAP2420_PRM_BASE,
	263	.cm = OMAP2420_CM_BASE,
4f2c49fe TL	264	.uart1_phys = OMAP2_UART1_BASE,
	265	.uart2_phys = OMAP2_UART2_BASE,
	266	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	267	};
a58caad1 TL	268
44595982 PW	269	void __init omap2_set_globals_242x(void)
44595982 PW	270	{
8f9ccfee	271	__omap2_set_globals(&omap242x_globals);
44595982 PW	272	}
	273	#endif
	274
	275	#if defined(CONFIG_ARCH_OMAP2430)
a58caad1 TL	276
a58caad1 TL	277	static struct omap_globals omap243x_globals = {
0e564848	278	.class = OMAP243X_CLASS,
233fd64e	279	.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
b7ebb10b SS	280	.sdrc = OMAP243X_SDRC_BASE,
	281	.sms = OMAP243X_SMS_BASE,
	282	.ctrl = OMAP243X_CTRL_BASE,
	283	.prm = OMAP2430_PRM_BASE,
	284	.cm = OMAP2430_CM_BASE,
4f2c49fe TL	285	.uart1_phys = OMAP2_UART1_BASE,
	286	.uart2_phys = OMAP2_UART2_BASE,
	287	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	288	};
a58caad1 TL	289
44595982 PW	290	void __init omap2_set_globals_243x(void)
44595982 PW	291	{
8f9ccfee	292	__omap2_set_globals(&omap243x_globals);
44595982 PW	293	}
	294	#endif
	295
4f2c49fe	296	#if defined(CONFIG_ARCH_OMAP3)
a58caad1	297
4f2c49fe	298	static struct omap_globals omap3_globals = {
0e564848	299	.class = OMAP343X_CLASS,
233fd64e	300	.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
b7ebb10b SS	301	.sdrc = OMAP343X_SDRC_BASE,
	302	.sms = OMAP343X_SMS_BASE,
	303	.ctrl = OMAP343X_CTRL_BASE,
	304	.prm = OMAP3430_PRM_BASE,
	305	.cm = OMAP3430_CM_BASE,
4f2c49fe TL	306	.uart1_phys = OMAP3_UART1_BASE,
	307	.uart2_phys = OMAP3_UART2_BASE,
	308	.uart3_phys = OMAP3_UART3_BASE,
a58caad1 TL	309	};
a58caad1 TL	310
44595982 PW	311	void __init omap2_set_globals_343x(void)
44595982 PW	312	{
4f2c49fe TL	313	__omap2_set_globals(&omap3_globals);
	314	}
	315
	316	void __init omap2_set_globals_36xx(void)
	317	{
	318	omap3_globals.uart4_phys = OMAP3_UART4_BASE;
	319
	320	__omap2_set_globals(&omap3_globals);
44595982 PW	321	}
	322	#endif
	323
44169075 SS	324	#if defined(CONFIG_ARCH_OMAP4)
	325	static struct omap_globals omap4_globals = {
	326	.class = OMAP443X_CLASS,
b570e0ec	327	.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
b7ebb10b SS	328	.ctrl = OMAP443X_CTRL_BASE,
	329	.prm = OMAP4430_PRM_BASE,
	330	.cm = OMAP4430_CM_BASE,
	331	.cm2 = OMAP4430_CM2_BASE,
4f2c49fe TL	332	.uart1_phys = OMAP4_UART1_BASE,
	333	.uart2_phys = OMAP4_UART2_BASE,
	334	.uart3_phys = OMAP4_UART3_BASE,
	335	.uart4_phys = OMAP4_UART4_BASE,
44169075 SS	336	};
	337
	338	void __init omap2_set_globals_443x(void)
	339	{
	340	omap2_set_globals_tap(&omap4_globals);
	341	omap2_set_globals_control(&omap4_globals);
9ef89150	342	omap2_set_globals_prcm(&omap4_globals);
4f2c49fe	343	omap2_set_globals_uart(&omap4_globals);
44169075 SS	344	}
	345	#endif
	346