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1 | /* |
2 | * arch/arm/mach-tegra/cpu-tegra.c | |
3 | * | |
4 | * Copyright (C) 2010 Google, Inc. | |
5 | * | |
6 | * Author: | |
7 | * Colin Cross <ccross@google.com> | |
8 | * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation | |
9 | * | |
10 | * This software is licensed under the terms of the GNU General Public | |
11 | * License version 2, as published by the Free Software Foundation, and | |
12 | * may be copied, distributed, and modified under those terms. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/cpufreq.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/err.h> | |
29 | #include <linux/clk.h> | |
30 | #include <linux/io.h> | |
1eb2ecf1 | 31 | #include <linux/suspend.h> |
7056d423 CC |
32 | |
33 | #include <asm/system.h> | |
34 | ||
35 | #include <mach/hardware.h> | |
36 | #include <mach/clk.h> | |
37 | ||
38 | /* Frequency table index must be sequential starting at 0 */ | |
39 | static struct cpufreq_frequency_table freq_table[] = { | |
1eb2ecf1 CC |
40 | { 0, 216000 }, |
41 | { 1, 312000 }, | |
42 | { 2, 456000 }, | |
43 | { 3, 608000 }, | |
44 | { 4, 760000 }, | |
45 | { 5, 816000 }, | |
46 | { 6, 912000 }, | |
47 | { 7, 1000000 }, | |
48 | { 8, CPUFREQ_TABLE_END }, | |
7056d423 CC |
49 | }; |
50 | ||
51 | #define NUM_CPUS 2 | |
52 | ||
53 | static struct clk *cpu_clk; | |
54 | ||
55 | static unsigned long target_cpu_speed[NUM_CPUS]; | |
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56 | static DEFINE_MUTEX(tegra_cpu_lock); |
57 | static bool is_suspended; | |
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58 | |
59 | int tegra_verify_speed(struct cpufreq_policy *policy) | |
60 | { | |
61 | return cpufreq_frequency_table_verify(policy, freq_table); | |
62 | } | |
63 | ||
64 | unsigned int tegra_getspeed(unsigned int cpu) | |
65 | { | |
66 | unsigned long rate; | |
67 | ||
68 | if (cpu >= NUM_CPUS) | |
69 | return 0; | |
70 | ||
71 | rate = clk_get_rate(cpu_clk) / 1000; | |
72 | return rate; | |
73 | } | |
74 | ||
1eb2ecf1 | 75 | static int tegra_update_cpu_speed(unsigned long rate) |
7056d423 | 76 | { |
7056d423 CC |
77 | int ret = 0; |
78 | struct cpufreq_freqs freqs; | |
79 | ||
7056d423 CC |
80 | freqs.old = tegra_getspeed(0); |
81 | freqs.new = rate; | |
82 | ||
83 | if (freqs.old == freqs.new) | |
84 | return ret; | |
85 | ||
86 | for_each_online_cpu(freqs.cpu) | |
87 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
88 | ||
89 | #ifdef CONFIG_CPU_FREQ_DEBUG | |
90 | printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n", | |
91 | freqs.old, freqs.new); | |
92 | #endif | |
93 | ||
41cfe367 | 94 | ret = clk_set_rate(cpu_clk, freqs.new * 1000); |
7056d423 CC |
95 | if (ret) { |
96 | pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n", | |
97 | freqs.new); | |
98 | return ret; | |
99 | } | |
100 | ||
101 | for_each_online_cpu(freqs.cpu) | |
102 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
103 | ||
104 | return 0; | |
105 | } | |
106 | ||
1eb2ecf1 CC |
107 | static unsigned long tegra_cpu_highest_speed(void) |
108 | { | |
109 | unsigned long rate = 0; | |
110 | int i; | |
111 | ||
112 | for_each_online_cpu(i) | |
113 | rate = max(rate, target_cpu_speed[i]); | |
114 | return rate; | |
115 | } | |
116 | ||
7056d423 CC |
117 | static int tegra_target(struct cpufreq_policy *policy, |
118 | unsigned int target_freq, | |
119 | unsigned int relation) | |
120 | { | |
121 | int idx; | |
122 | unsigned int freq; | |
1eb2ecf1 CC |
123 | int ret = 0; |
124 | ||
125 | mutex_lock(&tegra_cpu_lock); | |
126 | ||
127 | if (is_suspended) { | |
128 | ret = -EBUSY; | |
129 | goto out; | |
130 | } | |
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131 | |
132 | cpufreq_frequency_table_target(policy, freq_table, target_freq, | |
133 | relation, &idx); | |
134 | ||
135 | freq = freq_table[idx].frequency; | |
136 | ||
137 | target_cpu_speed[policy->cpu] = freq; | |
138 | ||
1eb2ecf1 CC |
139 | ret = tegra_update_cpu_speed(tegra_cpu_highest_speed()); |
140 | ||
141 | out: | |
142 | mutex_unlock(&tegra_cpu_lock); | |
143 | return ret; | |
7056d423 CC |
144 | } |
145 | ||
1eb2ecf1 CC |
146 | static int tegra_pm_notify(struct notifier_block *nb, unsigned long event, |
147 | void *dummy) | |
148 | { | |
149 | mutex_lock(&tegra_cpu_lock); | |
150 | if (event == PM_SUSPEND_PREPARE) { | |
151 | is_suspended = true; | |
152 | pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n", | |
153 | freq_table[0].frequency); | |
154 | tegra_update_cpu_speed(freq_table[0].frequency); | |
155 | } else if (event == PM_POST_SUSPEND) { | |
156 | is_suspended = false; | |
157 | } | |
158 | mutex_unlock(&tegra_cpu_lock); | |
159 | ||
160 | return NOTIFY_OK; | |
161 | } | |
162 | ||
163 | static struct notifier_block tegra_cpu_pm_notifier = { | |
164 | .notifier_call = tegra_pm_notify, | |
165 | }; | |
166 | ||
7056d423 CC |
167 | static int tegra_cpu_init(struct cpufreq_policy *policy) |
168 | { | |
169 | if (policy->cpu >= NUM_CPUS) | |
170 | return -EINVAL; | |
171 | ||
172 | cpu_clk = clk_get_sys(NULL, "cpu"); | |
173 | if (IS_ERR(cpu_clk)) | |
174 | return PTR_ERR(cpu_clk); | |
175 | ||
176 | cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
177 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | |
178 | policy->cur = tegra_getspeed(policy->cpu); | |
179 | target_cpu_speed[policy->cpu] = policy->cur; | |
180 | ||
181 | /* FIXME: what's the actual transition time? */ | |
182 | policy->cpuinfo.transition_latency = 300 * 1000; | |
183 | ||
184 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
185 | cpumask_copy(policy->related_cpus, cpu_possible_mask); | |
186 | ||
1eb2ecf1 CC |
187 | if (policy->cpu == 0) |
188 | register_pm_notifier(&tegra_cpu_pm_notifier); | |
189 | ||
7056d423 CC |
190 | return 0; |
191 | } | |
192 | ||
193 | static int tegra_cpu_exit(struct cpufreq_policy *policy) | |
194 | { | |
195 | cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
196 | clk_put(cpu_clk); | |
197 | return 0; | |
198 | } | |
199 | ||
200 | static struct freq_attr *tegra_cpufreq_attr[] = { | |
201 | &cpufreq_freq_attr_scaling_available_freqs, | |
202 | NULL, | |
203 | }; | |
204 | ||
205 | static struct cpufreq_driver tegra_cpufreq_driver = { | |
206 | .verify = tegra_verify_speed, | |
207 | .target = tegra_target, | |
208 | .get = tegra_getspeed, | |
209 | .init = tegra_cpu_init, | |
210 | .exit = tegra_cpu_exit, | |
211 | .name = "tegra", | |
212 | .attr = tegra_cpufreq_attr, | |
213 | }; | |
214 | ||
215 | static int __init tegra_cpufreq_init(void) | |
216 | { | |
217 | return cpufreq_register_driver(&tegra_cpufreq_driver); | |
218 | } | |
219 | ||
220 | static void __exit tegra_cpufreq_exit(void) | |
221 | { | |
222 | cpufreq_unregister_driver(&tegra_cpufreq_driver); | |
223 | } | |
224 | ||
225 | ||
226 | MODULE_AUTHOR("Colin Cross <ccross@android.com>"); | |
227 | MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2"); | |
228 | MODULE_LICENSE("GPL"); | |
229 | module_init(tegra_cpufreq_init); | |
230 | module_exit(tegra_cpufreq_exit); |