[linux-2.6-block.git] / arch / arm / mach-sa1100 / neponset.c

/*
 * linux/arch/arm/mach-sa1100/neponset.c
 */
#include <linux/err.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_data/sa11x0-serial.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/serial_core.h>
#include <linux/slab.h>
#include <linux/smc91x.h>

#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/hardware/sa1111.h>
#include <asm/sizes.h>

#include <mach/hardware.h>
#include <mach/assabet.h>
#include <mach/neponset.h>
#include <mach/irqs.h>

#define NEP_IRQ_SMC91X	0
#define NEP_IRQ_USAR	1
#define NEP_IRQ_SA1111	2
#define NEP_IRQ_NR	3

#define WHOAMI		0x00
#define LEDS		0x10
#define SWPK		0x20
#define IRR		0x24
#define KP_Y_IN		0x80
#define KP_X_OUT	0x90
#define NCR_0		0xa0
#define MDM_CTL_0	0xb0
#define MDM_CTL_1	0xb4
#define AUD_CTL		0xc0

#define IRR_ETHERNET	(1 << 0)
#define IRR_USAR	(1 << 1)
#define IRR_SA1111	(1 << 2)

#define MDM_CTL0_RTS1	(1 << 0)
#define MDM_CTL0_DTR1	(1 << 1)
#define MDM_CTL0_RTS2	(1 << 2)
#define MDM_CTL0_DTR2	(1 << 3)

#define MDM_CTL1_CTS1	(1 << 0)
#define MDM_CTL1_DSR1	(1 << 1)
#define MDM_CTL1_DCD1	(1 << 2)
#define MDM_CTL1_CTS2	(1 << 3)
#define MDM_CTL1_DSR2	(1 << 4)
#define MDM_CTL1_DCD2	(1 << 5)

#define AUD_SEL_1341	(1 << 0)
#define AUD_MUTE_1341	(1 << 1)

extern void sa1110_mb_disable(void);

struct neponset_drvdata {
	void __iomem *base;
	struct platform_device *sa1111;
	struct platform_device *smc91x;
	unsigned irq_base;
#ifdef CONFIG_PM_SLEEP
	u32 ncr0;
	u32 mdm_ctl_0;
#endif
};

static void __iomem *nep_base;

void neponset_ncr_frob(unsigned int mask, unsigned int val)
{
	void __iomem *base = nep_base;

	if (base) {
		unsigned long flags;
		unsigned v;

		local_irq_save(flags);
		v = readb_relaxed(base + NCR_0);
		writeb_relaxed((v & ~mask) | val, base + NCR_0);
		local_irq_restore(flags);
	} else {
		WARN(1, "nep_base unset\n");
	}
}
EXPORT_SYMBOL(neponset_ncr_frob);

static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
{
	void __iomem *base = nep_base;
	u_int mdm_ctl0;

	if (!base)
		return;

	mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
	if (port->mapbase == _Ser1UTCR0) {
		if (mctrl & TIOCM_RTS)
			mdm_ctl0 &= ~MDM_CTL0_RTS2;
		else
			mdm_ctl0 |= MDM_CTL0_RTS2;

		if (mctrl & TIOCM_DTR)
			mdm_ctl0 &= ~MDM_CTL0_DTR2;
		else
			mdm_ctl0 |= MDM_CTL0_DTR2;
	} else if (port->mapbase == _Ser3UTCR0) {
		if (mctrl & TIOCM_RTS)
			mdm_ctl0 &= ~MDM_CTL0_RTS1;
		else
			mdm_ctl0 |= MDM_CTL0_RTS1;

		if (mctrl & TIOCM_DTR)
			mdm_ctl0 &= ~MDM_CTL0_DTR1;
		else
			mdm_ctl0 |= MDM_CTL0_DTR1;
	}

	writeb_relaxed(mdm_ctl0, base + MDM_CTL_0);
}

static u_int neponset_get_mctrl(struct uart_port *port)
{
	void __iomem *base = nep_base;
	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
	u_int mdm_ctl1;

	if (!base)
		return ret;

	mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
	if (port->mapbase == _Ser1UTCR0) {
		if (mdm_ctl1 & MDM_CTL1_DCD2)
			ret &= ~TIOCM_CD;
		if (mdm_ctl1 & MDM_CTL1_CTS2)
			ret &= ~TIOCM_CTS;
		if (mdm_ctl1 & MDM_CTL1_DSR2)
			ret &= ~TIOCM_DSR;
	} else if (port->mapbase == _Ser3UTCR0) {
		if (mdm_ctl1 & MDM_CTL1_DCD1)
			ret &= ~TIOCM_CD;
		if (mdm_ctl1 & MDM_CTL1_CTS1)
			ret &= ~TIOCM_CTS;
		if (mdm_ctl1 & MDM_CTL1_DSR1)
			ret &= ~TIOCM_DSR;
	}

	return ret;
}

static struct sa1100_port_fns neponset_port_fns = {
	.set_mctrl	= neponset_set_mctrl,
	.get_mctrl	= neponset_get_mctrl,
};

/*
 * Install handler for Neponset IRQ.  Note that we have to loop here
 * since the ETHERNET and USAR IRQs are level based, and we need to
 * ensure that the IRQ signal is deasserted before returning.  This
 * is rather unfortunate.
 */
static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
	unsigned int irr;

	while (1) {
		/*
		 * Acknowledge the parent IRQ.
		 */
		desc->irq_data.chip->irq_ack(&desc->irq_data);

		/*
		 * Read the interrupt reason register.  Let's have all
		 * active IRQ bits high.  Note: there is a typo in the
		 * Neponset user's guide for the SA1111 IRR level.
		 */
		irr = readb_relaxed(d->base + IRR);
		irr ^= IRR_ETHERNET | IRR_USAR;

		if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
			break;

		/*
		 * Since there is no individual mask, we have to
		 * mask the parent IRQ.  This is safe, since we'll
		 * recheck the register for any pending IRQs.
		 */
		if (irr & (IRR_ETHERNET | IRR_USAR)) {
			desc->irq_data.chip->irq_mask(&desc->irq_data);

			/*
			 * Ack the interrupt now to prevent re-entering
			 * this neponset handler.  Again, this is safe
			 * since we'll check the IRR register prior to
			 * leaving.
			 */
			desc->irq_data.chip->irq_ack(&desc->irq_data);

			if (irr & IRR_ETHERNET)
				generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);

			if (irr & IRR_USAR)
				generic_handle_irq(d->irq_base + NEP_IRQ_USAR);

			desc->irq_data.chip->irq_unmask(&desc->irq_data);
		}

		if (irr & IRR_SA1111)
			generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
	}
}

/* Yes, we really do not have any kind of masking or unmasking */
static void nochip_noop(struct irq_data *irq)
{
}

static struct irq_chip nochip = {
	.name = "neponset",
	.irq_ack = nochip_noop,
	.irq_mask = nochip_noop,
	.irq_unmask = nochip_noop,
};

static struct sa1111_platform_data sa1111_info = {
	.disable_devs	= SA1111_DEVID_PS2_MSE,
};

static int neponset_probe(struct platform_device *dev)
{
	struct neponset_drvdata *d;
	struct resource *nep_res, *sa1111_res, *smc91x_res;
	struct resource sa1111_resources[] = {
		DEFINE_RES_MEM(0x40000000, SZ_8K),
		{ .flags = IORESOURCE_IRQ },
	};
	struct platform_device_info sa1111_devinfo = {
		.parent = &dev->dev,
		.name = "sa1111",
		.id = 0,
		.res = sa1111_resources,
		.num_res = ARRAY_SIZE(sa1111_resources),
		.data = &sa1111_info,
		.size_data = sizeof(sa1111_info),
		.dma_mask = 0xffffffffUL,
	};
	struct resource smc91x_resources[] = {
		DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
			0x02000000, "smc91x-regs"),
		DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
			0x02000000, "smc91x-attrib"),
		{ .flags = IORESOURCE_IRQ },
	};
	struct smc91x_platdata smc91x_platdata = {
		.flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
	};
	struct platform_device_info smc91x_devinfo = {
		.parent = &dev->dev,
		.name = "smc91x",
		.id = 0,
		.res = smc91x_resources,
		.num_res = ARRAY_SIZE(smc91x_resources),
		.data = &smc91x_platdata,
		.size_data = sizeof(smc91x_platdata),
	};
	int ret, irq;

	if (nep_base)
		return -EBUSY;

	irq = ret = platform_get_irq(dev, 0);
	if (ret < 0)
		goto err_alloc;

	nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
	sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
	if (!nep_res || !smc91x_res || !sa1111_res) {
		ret = -ENXIO;
		goto err_alloc;
	}

	d = kzalloc(sizeof(*d), GFP_KERNEL);
	if (!d) {
		ret = -ENOMEM;
		goto err_alloc;
	}

	d->base = ioremap(nep_res->start, SZ_4K);
	if (!d->base) {
		ret = -ENOMEM;
		goto err_ioremap;
	}

	if (readb_relaxed(d->base + WHOAMI) != 0x11) {
		dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
			 readb_relaxed(d->base + WHOAMI));
		ret = -ENODEV;
		goto err_id;
	}

	ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
	if (ret <= 0) {
		dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
			NEP_IRQ_NR, ret);
		if (ret == 0)
			ret = -ENOMEM;
		goto err_irq_alloc;
	}

	d->irq_base = ret;

	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
		handle_simple_irq);
	irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE);
	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
		handle_simple_irq);
	irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE);
	irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);

	irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
	irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);

	/*
	 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
	 * something on the Neponset activates this IRQ on sleep (eth?)
	 */
#if 0
	enable_irq_wake(irq);
#endif

	dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
		 d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
	nep_base = d->base;

	sa1100_register_uart_fns(&neponset_port_fns);

	/* Ensure that the memory bus request/grant signals are setup */
	sa1110_mb_disable();

	/* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
	writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);

	sa1111_resources[0].parent = sa1111_res;
	sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
	sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
	d->sa1111 = platform_device_register_full(&sa1111_devinfo);

	smc91x_resources[0].parent = smc91x_res;
	smc91x_resources[1].parent = smc91x_res;
	smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
	smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
	d->smc91x = platform_device_register_full(&smc91x_devinfo);

	platform_set_drvdata(dev, d);

	return 0;

 err_irq_alloc:
 err_id:
	iounmap(d->base);
 err_ioremap:
	kfree(d);
 err_alloc:
	return ret;
}

static int neponset_remove(struct platform_device *dev)
{
	struct neponset_drvdata *d = platform_get_drvdata(dev);
	int irq = platform_get_irq(dev, 0);

	if (!IS_ERR(d->sa1111))
		platform_device_unregister(d->sa1111);
	if (!IS_ERR(d->smc91x))
		platform_device_unregister(d->smc91x);
	irq_set_chained_handler(irq, NULL);
	irq_free_descs(d->irq_base, NEP_IRQ_NR);
	nep_base = NULL;
	iounmap(d->base);
	kfree(d);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int neponset_suspend(struct device *dev)
{
	struct neponset_drvdata *d = dev_get_drvdata(dev);

	d->ncr0 = readb_relaxed(d->base + NCR_0);
	d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0);

	return 0;
}

static int neponset_resume(struct device *dev)
{
	struct neponset_drvdata *d = dev_get_drvdata(dev);

	writeb_relaxed(d->ncr0, d->base + NCR_0);
	writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0);

	return 0;
}

static const struct dev_pm_ops neponset_pm_ops = {
	.suspend_noirq = neponset_suspend,
	.resume_noirq = neponset_resume,
	.freeze_noirq = neponset_suspend,
	.restore_noirq = neponset_resume,
};
#define PM_OPS &neponset_pm_ops
#else
#define PM_OPS NULL
#endif

static struct platform_driver neponset_device_driver = {
	.probe		= neponset_probe,
	.remove		= neponset_remove,
	.driver		= {
		.name	= "neponset",
		.pm	= PM_OPS,
	},
};

static int __init neponset_init(void)
{
	return platform_driver_register(&neponset_device_driver);
}

subsys_initcall(neponset_init);
Commit	Line	Data
1da177e4 LT	1	/*
1da177e4 LT	2	* linux/arch/arm/mach-sa1100/neponset.c
1da177e4	3	*/
9590e898	4	#include <linux/err.h>
1da177e4	5	#include <linux/init.h>
1da177e4	6	#include <linux/ioport.h>
ced8d21c	7	#include <linux/irq.h>
92e617d9	8	#include <linux/kernel.h>
ae14c2e2	9	#include <linux/module.h>
6920b5a7	10	#include <linux/platform_data/sa11x0-serial.h>
d052d1be	11	#include <linux/platform_device.h>
51f93390	12	#include <linux/pm.h>
92e617d9	13	#include <linux/serial_core.h>
ae14c2e2	14	#include <linux/slab.h>
b70661c7	15	#include <linux/smc91x.h>
1da177e4	16
1da177e4	17	#include <asm/mach-types.h>
1da177e4	18	#include <asm/mach/map.h>
1da177e4 LT	19	#include <asm/hardware/sa1111.h>
	20	#include <asm/sizes.h>
	21
92e617d9 RK	22	#include <mach/hardware.h>
	23	#include <mach/assabet.h>
	24	#include <mach/neponset.h>
f314f33b	25	#include <mach/irqs.h>
92e617d9	26
ced8d21c RK	27	#define NEP_IRQ_SMC91X 0
	28	#define NEP_IRQ_USAR 1
	29	#define NEP_IRQ_SA1111 2
	30	#define NEP_IRQ_NR 3
	31
f942b0fd RK	32	#define WHOAMI 0x00
	33	#define LEDS 0x10
	34	#define SWPK 0x20
	35	#define IRR 0x24
	36	#define KP_Y_IN 0x80
	37	#define KP_X_OUT 0x90
	38	#define NCR_0 0xa0
	39	#define MDM_CTL_0 0xb0
	40	#define MDM_CTL_1 0xb4
	41	#define AUD_CTL 0xc0
	42
	43	#define IRR_ETHERNET (1 << 0)
	44	#define IRR_USAR (1 << 1)
	45	#define IRR_SA1111 (1 << 2)
	46
	47	#define MDM_CTL0_RTS1 (1 << 0)
	48	#define MDM_CTL0_DTR1 (1 << 1)
	49	#define MDM_CTL0_RTS2 (1 << 2)
	50	#define MDM_CTL0_DTR2 (1 << 3)
	51
	52	#define MDM_CTL1_CTS1 (1 << 0)
	53	#define MDM_CTL1_DSR1 (1 << 1)
	54	#define MDM_CTL1_DCD1 (1 << 2)
	55	#define MDM_CTL1_CTS2 (1 << 3)
	56	#define MDM_CTL1_DSR2 (1 << 4)
	57	#define MDM_CTL1_DCD2 (1 << 5)
	58
	59	#define AUD_SEL_1341 (1 << 0)
	60	#define AUD_MUTE_1341 (1 << 1)
	61
bab50a35 RK	62	extern void sa1110_mb_disable(void);
bab50a35 RK	63
ae14c2e2	64	struct neponset_drvdata {
f942b0fd	65	void __iomem *base;
9590e898 RK	66	struct platform_device *sa1111;
9590e898 RK	67	struct platform_device *smc91x;
ced8d21c	68	unsigned irq_base;
ae14c2e2 RK	69	#ifdef CONFIG_PM_SLEEP
	70	u32 ncr0;
	71	u32 mdm_ctl_0;
	72	#endif
	73	};
	74
f942b0fd RK	75	static void __iomem *nep_base;
f942b0fd RK	76
6ad1b614 RK	77	void neponset_ncr_frob(unsigned int mask, unsigned int val)
6ad1b614 RK	78	{
f942b0fd RK	79	void __iomem *base = nep_base;
	80
	81	if (base) {
	82	unsigned long flags;
	83	unsigned v;
	84
	85	local_irq_save(flags);
	86	v = readb_relaxed(base + NCR_0);
	87	writeb_relaxed((v & ~mask) \| val, base + NCR_0);
	88	local_irq_restore(flags);
	89	} else {
	90	WARN(1, "nep_base unset\n");
	91	}
6ad1b614	92	}
ef0c1484	93	EXPORT_SYMBOL(neponset_ncr_frob);
6ad1b614	94
92e617d9 RK	95	static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
92e617d9 RK	96	{
f942b0fd RK	97	void __iomem *base = nep_base;
	98	u_int mdm_ctl0;
	99
	100	if (!base)
	101	return;
92e617d9	102
f942b0fd	103	mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
92e617d9 RK	104	if (port->mapbase == _Ser1UTCR0) {
	105	if (mctrl & TIOCM_RTS)
	106	mdm_ctl0 &= ~MDM_CTL0_RTS2;
	107	else
	108	mdm_ctl0 \|= MDM_CTL0_RTS2;
	109
	110	if (mctrl & TIOCM_DTR)
	111	mdm_ctl0 &= ~MDM_CTL0_DTR2;
	112	else
	113	mdm_ctl0 \|= MDM_CTL0_DTR2;
	114	} else if (port->mapbase == _Ser3UTCR0) {
	115	if (mctrl & TIOCM_RTS)
	116	mdm_ctl0 &= ~MDM_CTL0_RTS1;
	117	else
	118	mdm_ctl0 \|= MDM_CTL0_RTS1;
	119
	120	if (mctrl & TIOCM_DTR)
	121	mdm_ctl0 &= ~MDM_CTL0_DTR1;
	122	else
	123	mdm_ctl0 \|= MDM_CTL0_DTR1;
	124	}
	125
f942b0fd	126	writeb_relaxed(mdm_ctl0, base + MDM_CTL_0);
92e617d9 RK	127	}
	128
	129	static u_int neponset_get_mctrl(struct uart_port *port)
	130	{
f942b0fd	131	void __iomem *base = nep_base;
92e617d9	132	u_int ret = TIOCM_CD \| TIOCM_CTS \| TIOCM_DSR;
f942b0fd	133	u_int mdm_ctl1;
92e617d9	134
f942b0fd RK	135	if (!base)
	136	return ret;
	137
	138	mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
92e617d9 RK	139	if (port->mapbase == _Ser1UTCR0) {
	140	if (mdm_ctl1 & MDM_CTL1_DCD2)
	141	ret &= ~TIOCM_CD;
	142	if (mdm_ctl1 & MDM_CTL1_CTS2)
	143	ret &= ~TIOCM_CTS;
	144	if (mdm_ctl1 & MDM_CTL1_DSR2)
	145	ret &= ~TIOCM_DSR;
	146	} else if (port->mapbase == _Ser3UTCR0) {
	147	if (mdm_ctl1 & MDM_CTL1_DCD1)
	148	ret &= ~TIOCM_CD;
	149	if (mdm_ctl1 & MDM_CTL1_CTS1)
	150	ret &= ~TIOCM_CTS;
	151	if (mdm_ctl1 & MDM_CTL1_DSR1)
	152	ret &= ~TIOCM_DSR;
	153	}
	154
	155	return ret;
	156	}
	157
351a102d	158	static struct sa1100_port_fns neponset_port_fns = {
92e617d9 RK	159	.set_mctrl = neponset_set_mctrl,
	160	.get_mctrl = neponset_get_mctrl,
	161	};
	162
1da177e4 LT	163	/*
	164	* Install handler for Neponset IRQ. Note that we have to loop here
	165	* since the ETHERNET and USAR IRQs are level based, and we need to
	166	* ensure that the IRQ signal is deasserted before returning. This
	167	* is rather unfortunate.
	168	*/
ced8d21c	169	static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4	170	{
ced8d21c	171	struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
1da177e4 LT	172	unsigned int irr;
	173
	174	while (1) {
1da177e4 LT	175	/*
	176	* Acknowledge the parent IRQ.
	177	*/
c4e8964e	178	desc->irq_data.chip->irq_ack(&desc->irq_data);
1da177e4 LT	179
	180	/*
	181	* Read the interrupt reason register. Let's have all
	182	* active IRQ bits high. Note: there is a typo in the
	183	* Neponset user's guide for the SA1111 IRR level.
	184	*/
f942b0fd RK	185	irr = readb_relaxed(d->base + IRR);
f942b0fd RK	186	irr ^= IRR_ETHERNET \| IRR_USAR;
1da177e4 LT	187
	188	if ((irr & (IRR_ETHERNET \| IRR_USAR \| IRR_SA1111)) == 0)
	189	break;
	190
	191	/*
	192	* Since there is no individual mask, we have to
	193	* mask the parent IRQ. This is safe, since we'll
	194	* recheck the register for any pending IRQs.
	195	*/
	196	if (irr & (IRR_ETHERNET \| IRR_USAR)) {
c4e8964e	197	desc->irq_data.chip->irq_mask(&desc->irq_data);
1da177e4	198
d782f33d RK	199	/*
	200	* Ack the interrupt now to prevent re-entering
	201	* this neponset handler. Again, this is safe
	202	* since we'll check the IRR register prior to
	203	* leaving.
	204	*/
c4e8964e	205	desc->irq_data.chip->irq_ack(&desc->irq_data);
d782f33d	206
ced8d21c RK	207	if (irr & IRR_ETHERNET)
ced8d21c RK	208	generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
1da177e4	209
ced8d21c RK	210	if (irr & IRR_USAR)
ced8d21c RK	211	generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
1da177e4	212
c4e8964e	213	desc->irq_data.chip->irq_unmask(&desc->irq_data);
1da177e4 LT	214	}
1da177e4 LT	215
ced8d21c RK	216	if (irr & IRR_SA1111)
ced8d21c RK	217	generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
1da177e4 LT	218	}
	219	}
	220
ced8d21c	221	/* Yes, we really do not have any kind of masking or unmasking */
71045520 RK	222	static void nochip_noop(struct irq_data *irq)
	223	{
	224	}
	225
	226	static struct irq_chip nochip = {
	227	.name = "neponset",
	228	.irq_ack = nochip_noop,
	229	.irq_mask = nochip_noop,
	230	.irq_unmask = nochip_noop,
	231	};
	232
92e617d9	233	static struct sa1111_platform_data sa1111_info = {
07be45f5	234	.disable_devs = SA1111_DEVID_PS2_MSE,
92e617d9 RK	235	};
92e617d9 RK	236
351a102d	237	static int neponset_probe(struct platform_device *dev)
1da177e4	238	{
ae14c2e2	239	struct neponset_drvdata *d;
f942b0fd	240	struct resource nep_res, sa1111_res, *smc91x_res;
ced8d21c RK	241	struct resource sa1111_resources[] = {
	242	DEFINE_RES_MEM(0x40000000, SZ_8K),
	243	{ .flags = IORESOURCE_IRQ },
	244	};
9590e898 RK	245	struct platform_device_info sa1111_devinfo = {
	246	.parent = &dev->dev,
	247	.name = "sa1111",
	248	.id = 0,
	249	.res = sa1111_resources,
	250	.num_res = ARRAY_SIZE(sa1111_resources),
	251	.data = &sa1111_info,
	252	.size_data = sizeof(sa1111_info),
	253	.dma_mask = 0xffffffffUL,
	254	};
ced8d21c RK	255	struct resource smc91x_resources[] = {
	256	DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
	257	0x02000000, "smc91x-regs"),
	258	DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
	259	0x02000000, "smc91x-attrib"),
	260	{ .flags = IORESOURCE_IRQ },
	261	};
b70661c7 AB	262	struct smc91x_platdata smc91x_platdata = {
	263	.flags = SMC91X_USE_8BIT \| SMC91X_IO_SHIFT_2 \| SMC91X_NOWAIT,
	264	};
9590e898 RK	265	struct platform_device_info smc91x_devinfo = {
	266	.parent = &dev->dev,
	267	.name = "smc91x",
	268	.id = 0,
	269	.res = smc91x_resources,
	270	.num_res = ARRAY_SIZE(smc91x_resources),
04b91701 AB	271	.data = &smc91x_platdata,
04b91701 AB	272	.size_data = sizeof(smc91x_platdata),
9590e898	273	};
b6bdfcf5 RK	274	int ret, irq;
b6bdfcf5 RK	275
f942b0fd RK	276	if (nep_base)
	277	return -EBUSY;
	278
b6bdfcf5 RK	279	irq = ret = platform_get_irq(dev, 0);
	280	if (ret < 0)
	281	goto err_alloc;
ae14c2e2	282
f942b0fd	283	nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
d2e539a5 RK	284	smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
d2e539a5 RK	285	sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
f942b0fd	286	if (!nep_res \|\| !smc91x_res \|\| !sa1111_res) {
d2e539a5 RK	287	ret = -ENXIO;
	288	goto err_alloc;
	289	}
	290
ae14c2e2 RK	291	d = kzalloc(sizeof(*d), GFP_KERNEL);
	292	if (!d) {
	293	ret = -ENOMEM;
	294	goto err_alloc;
	295	}
	296
f942b0fd RK	297	d->base = ioremap(nep_res->start, SZ_4K);
	298	if (!d->base) {
	299	ret = -ENOMEM;
	300	goto err_ioremap;
	301	}
	302
	303	if (readb_relaxed(d->base + WHOAMI) != 0x11) {
	304	dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
	305	readb_relaxed(d->base + WHOAMI));
	306	ret = -ENODEV;
	307	goto err_id;
	308	}
	309
ced8d21c RK	310	ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
	311	if (ret <= 0) {
	312	dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
	313	NEP_IRQ_NR, ret);
	314	if (ret == 0)
	315	ret = -ENOMEM;
	316	goto err_irq_alloc;
	317	}
	318
	319	d->irq_base = ret;
	320
	321	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
	322	handle_simple_irq);
e8d36d5d	323	irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST \| IRQ_NOPROBE);
ced8d21c RK	324	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
ced8d21c RK	325	handle_simple_irq);
e8d36d5d	326	irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST \| IRQ_NOPROBE);
ced8d21c	327	irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
1da177e4	328
b6bdfcf5	329	irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
056c0acf	330	irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);
1da177e4 LT	331
1da177e4 LT	332	/*
ced8d21c RK	333	* We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
ced8d21c RK	334	* something on the Neponset activates this IRQ on sleep (eth?)
1da177e4 LT	335	*/
1da177e4 LT	336	#if 0
b6bdfcf5	337	enable_irq_wake(irq);
1da177e4 LT	338	#endif
1da177e4 LT	339
ced8d21c RK	340	dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
ced8d21c RK	341	d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
f942b0fd	342	nep_base = d->base;
1da177e4	343
ced8d21c RK	344	sa1100_register_uart_fns(&neponset_port_fns);
ced8d21c RK	345
bab50a35 RK	346	/* Ensure that the memory bus request/grant signals are setup */
	347	sa1110_mb_disable();
	348
ced8d21c	349	/* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
f942b0fd	350	writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
1da177e4	351
d2e539a5	352	sa1111_resources[0].parent = sa1111_res;
ced8d21c RK	353	sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
ced8d21c RK	354	sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
9590e898	355	d->sa1111 = platform_device_register_full(&sa1111_devinfo);
ced8d21c	356
d2e539a5 RK	357	smc91x_resources[0].parent = smc91x_res;
d2e539a5 RK	358	smc91x_resources[1].parent = smc91x_res;
ced8d21c RK	359	smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
ced8d21c RK	360	smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
9590e898 RK	361	d->smc91x = platform_device_register_full(&smc91x_devinfo);
9590e898 RK	362
ae14c2e2 RK	363	platform_set_drvdata(dev, d);
ae14c2e2 RK	364
1da177e4	365	return 0;
ae14c2e2	366
ced8d21c	367	err_irq_alloc:
f942b0fd RK	368	err_id:
	369	iounmap(d->base);
	370	err_ioremap:
ced8d21c	371	kfree(d);
ae14c2e2 RK	372	err_alloc:
ae14c2e2 RK	373	return ret;
1da177e4 LT	374	}
1da177e4 LT	375
351a102d	376	static int neponset_remove(struct platform_device *dev)
ae14c2e2 RK	377	{
ae14c2e2 RK	378	struct neponset_drvdata *d = platform_get_drvdata(dev);
b6bdfcf5	379	int irq = platform_get_irq(dev, 0);
1da177e4	380
9590e898 RK	381	if (!IS_ERR(d->sa1111))
	382	platform_device_unregister(d->sa1111);
	383	if (!IS_ERR(d->smc91x))
	384	platform_device_unregister(d->smc91x);
b6bdfcf5	385	irq_set_chained_handler(irq, NULL);
ced8d21c	386	irq_free_descs(d->irq_base, NEP_IRQ_NR);
f942b0fd RK	387	nep_base = NULL;
f942b0fd RK	388	iounmap(d->base);
ae14c2e2 RK	389	kfree(d);
	390
	391	return 0;
	392	}
93160c63	393
51f93390 RK	394	#ifdef CONFIG_PM_SLEEP
51f93390 RK	395	static int neponset_suspend(struct device *dev)
1da177e4	396	{
51f93390	397	struct neponset_drvdata *d = dev_get_drvdata(dev);
ae14c2e2	398
f942b0fd RK	399	d->ncr0 = readb_relaxed(d->base + NCR_0);
f942b0fd RK	400	d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0);
1da177e4 LT	401
	402	return 0;
	403	}
	404
51f93390	405	static int neponset_resume(struct device *dev)
1da177e4	406	{
51f93390	407	struct neponset_drvdata *d = dev_get_drvdata(dev);
ae14c2e2	408
f942b0fd RK	409	writeb_relaxed(d->ncr0, d->base + NCR_0);
f942b0fd RK	410	writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0);
1da177e4 LT	411
	412	return 0;
	413	}
	414
51f93390 RK	415	static const struct dev_pm_ops neponset_pm_ops = {
	416	.suspend_noirq = neponset_suspend,
	417	.resume_noirq = neponset_resume,
	418	.freeze_noirq = neponset_suspend,
	419	.restore_noirq = neponset_resume,
	420	};
	421	#define PM_OPS &neponset_pm_ops
1da177e4	422	#else
51f93390	423	#define PM_OPS NULL
1da177e4 LT	424	#endif
1da177e4 LT	425
3ae5eaec	426	static struct platform_driver neponset_device_driver = {
1da177e4	427	.probe = neponset_probe,
351a102d	428	.remove = neponset_remove,
3ae5eaec RK	429	.driver = {
3ae5eaec RK	430	.name = "neponset",
51f93390	431	.pm = PM_OPS,
3ae5eaec	432	},
1da177e4 LT	433	};
1da177e4 LT	434
1da177e4 LT	435	static int __init neponset_init(void)
1da177e4 LT	436	{
bab50a35	437	return platform_driver_register(&neponset_device_driver);
1da177e4 LT	438	}
	439
	440	subsys_initcall(neponset_init);