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[ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs
[linux-2.6-block.git] / arch / arm / mach-pxa / lubbock.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/arm/mach-pxa/lubbock.c
3 *
4 * Support for the Intel DBPXA250 Development Platform.
5 *
6 * Author: Nicolas Pitre
7 * Created: Jun 15, 2001
8 * Copyright: MontaVista Software Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
d052d1be 17#include <linux/platform_device.h>
22f11c4e 18#include <linux/sysdev.h>
1da177e4
LT		 19#include <linux/major.h>
20#include <linux/fb.h>
21#include <linux/interrupt.h>
74ec71e1
TP		 22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h>
1da177e4 24
9df5db80
DB		 25#include <linux/spi/spi.h>
26#include <linux/spi/ads7846.h>
27#include <asm/arch/pxa2xx_spi.h>
28
1da177e4
LT		 29#include <asm/setup.h>
30#include <asm/memory.h>
31#include <asm/mach-types.h>
32#include <asm/hardware.h>
33#include <asm/irq.h>
74ec71e1 34#include <asm/sizes.h>
1da177e4
LT		 35
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/irq.h>
74ec71e1 39#include <asm/mach/flash.h>
1da177e4
LT		 40
41#include <asm/hardware/sa1111.h>
42
43#include <asm/arch/pxa-regs.h>
44#include <asm/arch/lubbock.h>
45#include <asm/arch/udc.h>
6f475c01 46#include <asm/arch/irda.h>
1da177e4
LT		 47#include <asm/arch/pxafb.h>
48#include <asm/arch/mmc.h>
49
50#include "generic.h"
51
52
53#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080)
54
55void lubbock_set_misc_wr(unsigned int mask, unsigned int set)
56{
57 unsigned long flags;
58
59 local_irq_save(flags);
60 LUB_MISC_WR = (LUB_MISC_WR & ~mask) | (set & mask);
61 local_irq_restore(flags);
62}
63EXPORT_SYMBOL(lubbock_set_misc_wr);
64
65static unsigned long lubbock_irq_enabled;
66
67static void lubbock_mask_irq(unsigned int irq)
68{
69 int lubbock_irq = (irq - LUBBOCK_IRQ(0));
70 LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
71}
72
73static void lubbock_unmask_irq(unsigned int irq)
74{
75 int lubbock_irq = (irq - LUBBOCK_IRQ(0));
76 /* the irq can be acknowledged only if deasserted, so it's done here */
77 LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
78 LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
79}
80
38c677cb
DB		 81static struct irq_chip lubbock_irq_chip = {
82 .name = "FPGA",
1da177e4
LT		 83 .ack = lubbock_mask_irq,
84 .mask = lubbock_mask_irq,
85 .unmask = lubbock_unmask_irq,
86};
87
10dd5ce2 88static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4
LT		 89{
90 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
91 do {
92 GEDR(0) = GPIO_bit(0); /* clear our parent irq */
93 if (likely(pending)) {
94 irq = LUBBOCK_IRQ(0) + __ffs(pending);
95 desc = irq_desc + irq;
0cd61b68 96 desc_handle_irq(irq, desc);
1da177e4
LT		 97 }
98 pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
99 } while (pending);
100}
101
102static void __init lubbock_init_irq(void)
103{
104 int irq;
105
106 pxa_init_irq();
107
108 /* setup extra lubbock irqs */
109 for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
110 set_irq_chip(irq, &lubbock_irq_chip);
10dd5ce2 111 set_irq_handler(irq, handle_level_irq);
1da177e4
LT		 112 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
113 }
114
115 set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
116 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
117}
118
22f11c4e
NP		 119#ifdef CONFIG_PM
120
121static int lubbock_irq_resume(struct sys_device *dev)
122{
123 LUB_IRQ_MASK_EN = lubbock_irq_enabled;
124 return 0;
125}
126
127static struct sysdev_class lubbock_irq_sysclass = {
128 set_kset_name("cpld_irq"),
129 .resume = lubbock_irq_resume,
130};
131
132static struct sys_device lubbock_irq_device = {
133 .cls = &lubbock_irq_sysclass,
134};
135
136static int __init lubbock_irq_device_init(void)
137{
138 int ret = sysdev_class_register(&lubbock_irq_sysclass);
139 if (ret == 0)
140 ret = sysdev_register(&lubbock_irq_device);
141 return ret;
142}
143
144device_initcall(lubbock_irq_device_init);
145
146#endif
147
1da177e4
LT		 148static int lubbock_udc_is_connected(void)
149{
150 return (LUB_MISC_RD & (1 << 9)) == 0;
151}
152
153static struct pxa2xx_udc_mach_info udc_info __initdata = {
154 .udc_is_connected = lubbock_udc_is_connected,
155 // no D+ pullup; lubbock can't connect/disconnect in software
156};
157
2cef2d55
NP		 158static struct platform_device lub_audio_device = {
159 .name = "pxa2xx-ac97",
160 .id = -1,
161};
162
1da177e4
LT		 163static struct resource sa1111_resources[] = {
164 [0] = {
165 .start = 0x10000000,
166 .end = 0x10001fff,
167 .flags = IORESOURCE_MEM,
168 },
169 [1] = {
170 .start = LUBBOCK_SA1111_IRQ,
171 .end = LUBBOCK_SA1111_IRQ,
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176static struct platform_device sa1111_device = {
177 .name = "sa1111",
178 .id = -1,
179 .num_resources = ARRAY_SIZE(sa1111_resources),
180 .resource = sa1111_resources,
181};
182
183static struct resource smc91x_resources[] = {
184 [0] = {
185 .name = "smc91x-regs",
85eb226c 186 .start = 0x0c000c00,
1da177e4
LT		 187 .end = 0x0c0fffff,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = LUBBOCK_ETH_IRQ,
192 .end = LUBBOCK_ETH_IRQ,
193 .flags = IORESOURCE_IRQ,
194 },
195 [2] = {
196 .name = "smc91x-attrib",
197 .start = 0x0e000000,
198 .end = 0x0e0fffff,
199 .flags = IORESOURCE_MEM,
200 },
201};
202
9df5db80
DB		 203/* ADS7846 is connected through SSP ... and if your board has J5 populated,
204 * you can select it to replace the ucb1400 by switching the touchscreen cable
205 * (to J5) and poking board registers (as done below). Else it's only useful
206 * for the temperature sensors.
207 */
208static struct resource pxa_ssp_resources[] = {
209 [0] = {
210 .start = __PREG(SSCR0_P(1)),
211 .end = __PREG(SSCR0_P(1)) + 0x14,
212 .flags = IORESOURCE_MEM,
213 },
214 [1] = {
215 .start = IRQ_SSP,
216 .end = IRQ_SSP,
217 .flags = IORESOURCE_IRQ,
218 },
219};
220
221static struct pxa2xx_spi_master pxa_ssp_master_info = {
222 .ssp_type = PXA25x_SSP,
7053acbd 223 .clock_enable = CKEN_SSP,
9df5db80
DB		 224 .num_chipselect = 0,
225};
226
227static struct platform_device pxa_ssp = {
228 .name = "pxa2xx-spi",
229 .id = 1,
230 .resource = pxa_ssp_resources,
231 .num_resources = ARRAY_SIZE(pxa_ssp_resources),
232 .dev = {
233 .platform_data = &pxa_ssp_master_info,
234 },
235};
236
237static int lubbock_ads7846_pendown_state(void)
238{
239 /* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */
240 return 0;
241}
242
243static struct ads7846_platform_data ads_info = {
244 .model = 7846,
245 .vref_delay_usecs = 100, /* internal, no cap */
246 .get_pendown_state = lubbock_ads7846_pendown_state,
247 // .x_plate_ohms = 500, /* GUESS! */
248 // .y_plate_ohms = 500, /* GUESS! */
249};
250
251static void ads7846_cs(u32 command)
252{
253 static const unsigned TS_nCS = 1 << 11;
254 lubbock_set_misc_wr(TS_nCS, (command == PXA2XX_CS_ASSERT) ? 0 : TS_nCS);
255}
256
257static struct pxa2xx_spi_chip ads_hw = {
258 .tx_threshold = 1,
259 .rx_threshold = 2,
260 .cs_control = ads7846_cs,
261};
262
263static struct spi_board_info spi_board_info[] __initdata = { {
264 .modalias = "ads7846",
265 .platform_data = &ads_info,
266 .controller_data = &ads_hw,
267 .irq = LUBBOCK_BB_IRQ,
268 .max_speed_hz = 120000 /* max sample rate at 3V */
269 * 26 /* command + data + overhead */,
270 .bus_num = 1,
271 .chip_select = 0,
272},
273};
274
1da177e4
LT		 275static struct platform_device smc91x_device = {
276 .name = "smc91x",
277 .id = -1,
278 .num_resources = ARRAY_SIZE(smc91x_resources),
279 .resource = smc91x_resources,
280};
281
74ec71e1
TP		 282static struct resource flash_resources[] = {
283 [0] = {
284 .start = 0x00000000,
285 .end = SZ_64M - 1,
286 .flags = IORESOURCE_MEM,
287 },
288 [1] = {
289 .start = 0x04000000,
290 .end = 0x04000000 + SZ_64M - 1,
291 .flags = IORESOURCE_MEM,
292 },
293};
294
295static struct mtd_partition lubbock_partitions[] = {
296 {
297 .name = "Bootloader",
298 .size = 0x00040000,
299 .offset = 0,
300 .mask_flags = MTD_WRITEABLE /* force read-only */
301 },{
302 .name = "Kernel",
303 .size = 0x00100000,
304 .offset = 0x00040000,
305 },{
306 .name = "Filesystem",
307 .size = MTDPART_SIZ_FULL,
308 .offset = 0x00140000
309 }
310};
311
312static struct flash_platform_data lubbock_flash_data[2] = {
313 {
314 .map_name = "cfi_probe",
315 .parts = lubbock_partitions,
316 .nr_parts = ARRAY_SIZE(lubbock_partitions),
317 }, {
318 .map_name = "cfi_probe",
319 .parts = NULL,
320 .nr_parts = 0,
321 }
322};
323
324static struct platform_device lubbock_flash_device[2] = {
325 {
326 .name = "pxa2xx-flash",
327 .id = 0,
328 .dev = {
329 .platform_data = &lubbock_flash_data[0],
330 },
331 .resource = &flash_resources[0],
332 .num_resources = 1,
333 },
334 {
335 .name = "pxa2xx-flash",
336 .id = 1,
337 .dev = {
338 .platform_data = &lubbock_flash_data[1],
339 },
340 .resource = &flash_resources[1],
341 .num_resources = 1,
342 },
343};
344
1da177e4
LT		 345static struct platform_device *devices[] __initdata = {
346 &sa1111_device,
2cef2d55 347 &lub_audio_device,
1da177e4 348 &smc91x_device,
74ec71e1
TP		 349 &lubbock_flash_device[0],
350 &lubbock_flash_device[1],
9df5db80 351 &pxa_ssp,
1da177e4
LT		 352};
353
d14b272b 354static struct pxafb_mode_info sharp_lm8v31_mode = {
1da177e4
LT		 355 .pixclock = 270000,
356 .xres = 640,
357 .yres = 480,
358 .bpp = 16,
359 .hsync_len = 1,
360 .left_margin = 3,
361 .right_margin = 3,
362 .vsync_len = 1,
363 .upper_margin = 0,
364 .lower_margin = 0,
365 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
366 .cmap_greyscale = 0,
d14b272b
RP		 367};
368
369static struct pxafb_mach_info sharp_lm8v31 = {
370 .modes = &sharp_lm8v31_mode,
371 .num_modes = 1,
1da177e4
LT		 372 .cmap_inverse = 0,
373 .cmap_static = 0,
374 .lccr0 = LCCR0_SDS,
375 .lccr3 = LCCR3_PCP | LCCR3_Acb(255),
376};
377
85eb226c
DB		 378#define MMC_POLL_RATE msecs_to_jiffies(1000)
379
380static void lubbock_mmc_poll(unsigned long);
40220c1a 381static irq_handler_t mmc_detect_int;
85eb226c
DB		 382
383static struct timer_list mmc_timer = {
384 .function = lubbock_mmc_poll,
385};
386
387static void lubbock_mmc_poll(unsigned long data)
388{
389 unsigned long flags;
390
391 /* clear any previous irq state, then ... */
392 local_irq_save(flags);
393 LUB_IRQ_SET_CLR &= ~(1 << 0);
394 local_irq_restore(flags);
395
396 /* poll until mmc/sd card is removed */
397 if (LUB_IRQ_SET_CLR & (1 << 0))
398 mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE);
399 else {
2326eb98 400 (void) mmc_detect_int(LUBBOCK_SD_IRQ, (void *)data);
85eb226c
DB		 401 enable_irq(LUBBOCK_SD_IRQ);
402 }
403}
404
0cd61b68 405static irqreturn_t lubbock_detect_int(int irq, void *data)
85eb226c
DB		 406{
407 /* IRQ is level triggered; disable, and poll for removal */
408 disable_irq(irq);
409 mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE);
410
0cd61b68 411 return mmc_detect_int(irq, data);
85eb226c
DB		 412}
413
414static int lubbock_mci_init(struct device *dev,
40220c1a 415 irq_handler_t detect_int,
85eb226c 416 void *data)
1da177e4
LT		 417{
418 /* setup GPIO for PXA25x MMC controller */
419 pxa_gpio_mode(GPIO6_MMCCLK_MD);
420 pxa_gpio_mode(GPIO8_MMCCS0_MD);
421
85eb226c
DB		 422 /* detect card insert/eject */
423 mmc_detect_int = detect_int;
424 init_timer(&mmc_timer);
425 mmc_timer.data = (unsigned long) data;
426 return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int,
52e405ea 427 IRQF_SAMPLE_RANDOM, "lubbock-sd-detect", data);
85eb226c
DB		 428}
429
430static int lubbock_mci_get_ro(struct device *dev)
431{
432 return (LUB_MISC_RD & (1 << 2)) != 0;
433}
434
435static void lubbock_mci_exit(struct device *dev, void *data)
436{
437 free_irq(LUBBOCK_SD_IRQ, data);
438 del_timer_sync(&mmc_timer);
1da177e4
LT		 439}
440
441static struct pxamci_platform_data lubbock_mci_platform_data = {
442 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
85eb226c 443 .detect_delay = 1,
1da177e4 444 .init = lubbock_mci_init,
85eb226c
DB		 445 .get_ro = lubbock_mci_get_ro,
446 .exit = lubbock_mci_exit,
1da177e4
LT		 447};
448
6f475c01
NP		 449static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
450{
451 unsigned long flags;
452
453 local_irq_save(flags);
454 if (mode & IR_SIRMODE) {
455 LUB_MISC_WR &= ~(1 << 4);
456 } else if (mode & IR_FIRMODE) {
457 LUB_MISC_WR |= 1 << 4;
458 }
459 local_irq_restore(flags);
460}
461
462static struct pxaficp_platform_data lubbock_ficp_platform_data = {
463 .transceiver_cap = IR_SIRMODE | IR_FIRMODE,
464 .transceiver_mode = lubbock_irda_transceiver_mode,
465};
466
1da177e4
LT		 467static void __init lubbock_init(void)
468{
74ec71e1
TP		 469 int flashboot = (LUB_CONF_SWITCHES & 1);
470
1da177e4
LT		 471 pxa_set_udc_info(&udc_info);
472 set_pxa_fb_info(&sharp_lm8v31);
473 pxa_set_mci_info(&lubbock_mci_platform_data);
6f475c01 474 pxa_set_ficp_info(&lubbock_ficp_platform_data);
74ec71e1
TP		 475
476 lubbock_flash_data[0].width = lubbock_flash_data[1].width =
477 (BOOT_DEF & 1) ? 2 : 4;
478 /* Compensate for the nROMBT switch which swaps the flash banks */
479 printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
480 flashboot?"Flash":"ROM", flashboot);
481
482 lubbock_flash_data[flashboot^1].name = "application-flash";
483 lubbock_flash_data[flashboot].name = "boot-rom";
1da177e4 484 (void) platform_add_devices(devices, ARRAY_SIZE(devices));
9df5db80
DB		 485
486 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
1da177e4
LT		 487}
488
489static struct map_desc lubbock_io_desc[] __initdata = {
6f9182eb
DS		 490 { /* CPLD */
491 .virtual = LUBBOCK_FPGA_VIRT,
492 .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS),
493 .length = 0x00100000,
494 .type = MT_DEVICE
495 }
1da177e4
LT		 496};
497
498static void __init lubbock_map_io(void)
499{
500 pxa_map_io();
501 iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
502
9df5db80
DB		 503 /* SSP data pins */
504 pxa_gpio_mode(GPIO23_SCLK_MD);
505 pxa_gpio_mode(GPIO25_STXD_MD);
506 pxa_gpio_mode(GPIO26_SRXD_MD);
507
1da177e4
LT		 508 /* This enables the BTUART */
509 pxa_gpio_mode(GPIO42_BTRXD_MD);
510 pxa_gpio_mode(GPIO43_BTTXD_MD);
511 pxa_gpio_mode(GPIO44_BTCTS_MD);
512 pxa_gpio_mode(GPIO45_BTRTS_MD);
513
514 /* This is for the SMC chip select */
515 pxa_gpio_mode(GPIO79_nCS_3_MD);
516
517 /* setup sleep mode values */
518 PWER = 0x00000002;
519 PFER = 0x00000000;
520 PRER = 0x00000002;
521 PGSR0 = 0x00008000;
522 PGSR1 = 0x003F0202;
523 PGSR2 = 0x0001C000;
524 PCFR |= PCFR_OPDE;
525}
526
527MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
e9dea0c6 528 /* Maintainer: MontaVista Software Inc. */
e9dea0c6 529 .phys_io = 0x40000000,
68070bde 530 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
e9dea0c6
RK		 531 .map_io = lubbock_map_io,
532 .init_irq = lubbock_init_irq,
1da177e4 533 .timer = &pxa_timer,
e9dea0c6 534 .init_machine = lubbock_init,
1da177e4 535MACHINE_END
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