OMAP4: PM: Declare idle modules as functional too
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
db2a60bf 4 * Copyright (C) 2009-2010 Nokia Corporation
63c85238 5 *
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
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16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
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27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
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112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - pin mux handling
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
63c85238 138
6f8b7ff5 139#include <plat/common.h>
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140#include <plat/cpu.h>
141#include <plat/clockdomain.h>
142#include <plat/powerdomain.h>
143#include <plat/clock.h>
144#include <plat/omap_hwmod.h>
5365efbe 145#include <plat/prcm.h>
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146
147#include "cm.h"
5365efbe 148#include "prm.h"
63c85238 149
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150/* Maximum microseconds to wait for OMAP module to softreset */
151#define MAX_MODULE_SOFTRESET_WAIT 10000
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152
153/* Name of the OMAP hwmod for the MPU */
5c2c0296 154#define MPU_INITIATOR_NAME "mpu"
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155
156/* omap_hwmod_list contains all registered struct omap_hwmods */
157static LIST_HEAD(omap_hwmod_list);
158
159static DEFINE_MUTEX(omap_hwmod_mutex);
160
161/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
162static struct omap_hwmod *mpu_oh;
163
164/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
165static u8 inited;
166
167
168/* Private functions */
169
170/**
171 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
172 * @oh: struct omap_hwmod *
173 *
174 * Load the current value of the hwmod OCP_SYSCONFIG register into the
175 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
176 * OCP_SYSCONFIG register or 0 upon success.
177 */
178static int _update_sysc_cache(struct omap_hwmod *oh)
179{
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180 if (!oh->class->sysc) {
181 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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182 return -EINVAL;
183 }
184
185 /* XXX ensure module interface clock is up */
186
43b40992 187 oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238 188
43b40992 189 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 190 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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191
192 return 0;
193}
194
195/**
196 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
197 * @v: OCP_SYSCONFIG value to write
198 * @oh: struct omap_hwmod *
199 *
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200 * Write @v into the module class' OCP_SYSCONFIG register, if it has
201 * one. No return value.
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202 */
203static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
204{
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205 if (!oh->class->sysc) {
206 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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207 return;
208 }
209
210 /* XXX ensure module interface clock is up */
211
212 if (oh->_sysc_cache != v) {
213 oh->_sysc_cache = v;
43b40992 214 omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs);
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215 }
216}
217
218/**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
228static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230{
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231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
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234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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236 return -EINVAL;
237
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238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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240 return -EINVAL;
241 }
242
43b40992 243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
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248
249 return 0;
250}
251
252/**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
262static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263{
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264 u32 sidle_mask;
265 u8 sidle_shift;
266
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267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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269 return -EINVAL;
270
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271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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273 return -EINVAL;
274 }
275
43b40992 276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
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281
282 return 0;
283}
284
285/**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
296static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297{
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298 u32 clkact_mask;
299 u8 clkact_shift;
300
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301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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303 return -EINVAL;
304
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305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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307 return -EINVAL;
308 }
309
43b40992 310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
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315
316 return 0;
317}
318
319/**
320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
327static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328{
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329 u32 softrst_mask;
330
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331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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333 return -EINVAL;
334
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335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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337 return -EINVAL;
338 }
339
43b40992 340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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341
342 *v |= softrst_mask;
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343
344 return 0;
345}
346
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347/**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
360static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362{
358f0e63
TG
363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
43b40992
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366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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368 return -EINVAL;
369
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370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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372 return -EINVAL;
373 }
374
43b40992 375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
358f0e63
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376 autoidle_mask = (0x3 << autoidle_shift);
377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
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380
381 return 0;
382}
383
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384/**
385 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
386 * @oh: struct omap_hwmod *
387 *
388 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
389 * upon error or 0 upon success.
390 */
391static int _enable_wakeup(struct omap_hwmod *oh)
392{
358f0e63 393 u32 v, wakeup_mask;
63c85238 394
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395 if (!oh->class->sysc ||
396 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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397 return -EINVAL;
398
43b40992
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399 if (!oh->class->sysc->sysc_fields) {
400 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
401 return -EINVAL;
402 }
403
43b40992 404 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 405
63c85238 406 v = oh->_sysc_cache;
358f0e63 407 v |= wakeup_mask;
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408 _write_sysconfig(v, oh);
409
410 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
411
412 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
413
414 return 0;
415}
416
417/**
418 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
419 * @oh: struct omap_hwmod *
420 *
421 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
422 * upon error or 0 upon success.
423 */
424static int _disable_wakeup(struct omap_hwmod *oh)
425{
358f0e63 426 u32 v, wakeup_mask;
63c85238 427
43b40992
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428 if (!oh->class->sysc ||
429 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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430 return -EINVAL;
431
43b40992
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432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
43b40992 437 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 438
63c85238 439 v = oh->_sysc_cache;
358f0e63 440 v &= ~wakeup_mask;
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441 _write_sysconfig(v, oh);
442
443 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
444
445 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
446
447 return 0;
448}
449
450/**
451 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
452 * @oh: struct omap_hwmod *
453 *
454 * Prevent the hardware module @oh from entering idle while the
455 * hardare module initiator @init_oh is active. Useful when a module
456 * will be accessed by a particular initiator (e.g., if a module will
457 * be accessed by the IVA, there should be a sleepdep between the IVA
458 * initiator and the module). Only applies to modules in smart-idle
459 * mode. Returns -EINVAL upon error or passes along
55ed9694 460 * clkdm_add_sleepdep() value upon success.
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461 */
462static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
463{
464 if (!oh->_clk)
465 return -EINVAL;
466
55ed9694 467 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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468}
469
470/**
471 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
472 * @oh: struct omap_hwmod *
473 *
474 * Allow the hardware module @oh to enter idle while the hardare
475 * module initiator @init_oh is active. Useful when a module will not
476 * be accessed by a particular initiator (e.g., if a module will not
477 * be accessed by the IVA, there should be no sleepdep between the IVA
478 * initiator and the module). Only applies to modules in smart-idle
479 * mode. Returns -EINVAL upon error or passes along
55ed9694 480 * clkdm_del_sleepdep() value upon success.
63c85238
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481 */
482static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
483{
484 if (!oh->_clk)
485 return -EINVAL;
486
55ed9694 487 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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488}
489
490/**
491 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
492 * @oh: struct omap_hwmod *
493 *
494 * Called from _init_clocks(). Populates the @oh _clk (main
495 * functional clock pointer) if a main_clk is present. Returns 0 on
496 * success or -EINVAL on error.
497 */
498static int _init_main_clk(struct omap_hwmod *oh)
499{
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500 int ret = 0;
501
50ebdac2 502 if (!oh->main_clk)
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503 return 0;
504
63403384 505 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 506 if (!oh->_clk) {
20383d82
BC
507 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
508 oh->name, oh->main_clk);
63403384 509 return -EINVAL;
dc75925d 510 }
63c85238 511
63403384
BC
512 if (!oh->_clk->clkdm)
513 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
514 oh->main_clk, oh->_clk->name);
81d7c6ff 515
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516 return ret;
517}
518
519/**
887adeac 520 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
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521 * @oh: struct omap_hwmod *
522 *
523 * Called from _init_clocks(). Populates the @oh OCP slave interface
524 * clock pointers. Returns 0 on success or -EINVAL on error.
525 */
526static int _init_interface_clks(struct omap_hwmod *oh)
527{
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528 struct clk *c;
529 int i;
530 int ret = 0;
531
532 if (oh->slaves_cnt == 0)
533 return 0;
534
682fdc96
BC
535 for (i = 0; i < oh->slaves_cnt; i++) {
536 struct omap_hwmod_ocp_if *os = oh->slaves[i];
537
50ebdac2 538 if (!os->clk)
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539 continue;
540
50ebdac2 541 c = omap_clk_get_by_name(os->clk);
dc75925d 542 if (!c) {
20383d82
BC
543 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
544 oh->name, os->clk);
63c85238 545 ret = -EINVAL;
dc75925d 546 }
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547 os->_clk = c;
548 }
549
550 return ret;
551}
552
553/**
554 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
555 * @oh: struct omap_hwmod *
556 *
557 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
558 * clock pointers. Returns 0 on success or -EINVAL on error.
559 */
560static int _init_opt_clks(struct omap_hwmod *oh)
561{
562 struct omap_hwmod_opt_clk *oc;
563 struct clk *c;
564 int i;
565 int ret = 0;
566
567 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 568 c = omap_clk_get_by_name(oc->clk);
dc75925d 569 if (!c) {
20383d82
BC
570 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
571 oh->name, oc->clk);
63c85238 572 ret = -EINVAL;
dc75925d 573 }
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574 oc->_clk = c;
575 }
576
577 return ret;
578}
579
580/**
581 * _enable_clocks - enable hwmod main clock and interface clocks
582 * @oh: struct omap_hwmod *
583 *
584 * Enables all clocks necessary for register reads and writes to succeed
585 * on the hwmod @oh. Returns 0.
586 */
587static int _enable_clocks(struct omap_hwmod *oh)
588{
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589 int i;
590
591 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
592
4d3ae5a9 593 if (oh->_clk)
63c85238
PW
594 clk_enable(oh->_clk);
595
596 if (oh->slaves_cnt > 0) {
682fdc96
BC
597 for (i = 0; i < oh->slaves_cnt; i++) {
598 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
599 struct clk *c = os->_clk;
600
4d3ae5a9 601 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
602 clk_enable(c);
603 }
604 }
605
606 /* The opt clocks are controlled by the device driver. */
607
608 return 0;
609}
610
611/**
612 * _disable_clocks - disable hwmod main clock and interface clocks
613 * @oh: struct omap_hwmod *
614 *
615 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
616 */
617static int _disable_clocks(struct omap_hwmod *oh)
618{
63c85238
PW
619 int i;
620
621 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
622
4d3ae5a9 623 if (oh->_clk)
63c85238
PW
624 clk_disable(oh->_clk);
625
626 if (oh->slaves_cnt > 0) {
682fdc96
BC
627 for (i = 0; i < oh->slaves_cnt; i++) {
628 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
629 struct clk *c = os->_clk;
630
4d3ae5a9 631 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
632 clk_disable(c);
633 }
634 }
635
636 /* The opt clocks are controlled by the device driver. */
637
638 return 0;
639}
640
96835af9
BC
641static void _enable_optional_clocks(struct omap_hwmod *oh)
642{
643 struct omap_hwmod_opt_clk *oc;
644 int i;
645
646 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
647
648 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
649 if (oc->_clk) {
650 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
651 oc->_clk->name);
652 clk_enable(oc->_clk);
653 }
654}
655
656static void _disable_optional_clocks(struct omap_hwmod *oh)
657{
658 struct omap_hwmod_opt_clk *oc;
659 int i;
660
661 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
662
663 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
664 if (oc->_clk) {
665 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
666 oc->_clk->name);
667 clk_disable(oc->_clk);
668 }
669}
670
63c85238
PW
671/**
672 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
673 * @oh: struct omap_hwmod *
674 *
675 * Returns the array index of the OCP slave port that the MPU
676 * addresses the device on, or -EINVAL upon error or not found.
677 */
678static int _find_mpu_port_index(struct omap_hwmod *oh)
679{
63c85238
PW
680 int i;
681 int found = 0;
682
683 if (!oh || oh->slaves_cnt == 0)
684 return -EINVAL;
685
682fdc96
BC
686 for (i = 0; i < oh->slaves_cnt; i++) {
687 struct omap_hwmod_ocp_if *os = oh->slaves[i];
688
63c85238
PW
689 if (os->user & OCP_USER_MPU) {
690 found = 1;
691 break;
692 }
693 }
694
695 if (found)
696 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
697 oh->name, i);
698 else
699 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
700 oh->name);
701
702 return (found) ? i : -EINVAL;
703}
704
705/**
706 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
707 * @oh: struct omap_hwmod *
708 *
709 * Return the virtual address of the base of the register target of
710 * device @oh, or NULL on error.
711 */
712static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
713{
714 struct omap_hwmod_ocp_if *os;
715 struct omap_hwmod_addr_space *mem;
716 int i;
717 int found = 0;
986a13f5 718 void __iomem *va_start;
63c85238
PW
719
720 if (!oh || oh->slaves_cnt == 0)
721 return NULL;
722
682fdc96 723 os = oh->slaves[index];
63c85238
PW
724
725 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
726 if (mem->flags & ADDR_TYPE_RT) {
727 found = 1;
728 break;
729 }
730 }
731
986a13f5
TL
732 if (found) {
733 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
734 if (!va_start) {
735 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
736 return NULL;
737 }
63c85238 738 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
739 oh->name, va_start);
740 } else {
63c85238
PW
741 pr_debug("omap_hwmod: %s: no MPU register target found\n",
742 oh->name);
986a13f5 743 }
63c85238 744
986a13f5 745 return (found) ? va_start : NULL;
63c85238
PW
746}
747
748/**
74ff3a68 749 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
750 * @oh: struct omap_hwmod *
751 *
752 * If module is marked as SWSUP_SIDLE, force the module out of slave
753 * idle; otherwise, configure it for smart-idle. If module is marked
754 * as SWSUP_MSUSPEND, force the module out of master standby;
755 * otherwise, configure it for smart-standby. No return value.
756 */
74ff3a68 757static void _enable_sysc(struct omap_hwmod *oh)
63c85238 758{
43b40992 759 u8 idlemode, sf;
63c85238
PW
760 u32 v;
761
43b40992 762 if (!oh->class->sysc)
63c85238
PW
763 return;
764
765 v = oh->_sysc_cache;
43b40992 766 sf = oh->class->sysc->sysc_flags;
63c85238 767
43b40992 768 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
769 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
770 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
771 _set_slave_idlemode(oh, idlemode, &v);
772 }
773
43b40992 774 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
775 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
776 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
777 _set_master_standbymode(oh, idlemode, &v);
778 }
779
43b40992 780 if (sf & SYSC_HAS_AUTOIDLE) {
726072e5
PW
781 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
782 0 : 1;
783 _set_module_autoidle(oh, idlemode, &v);
784 }
785
a16b1f7f
PW
786 /*
787 * XXX The clock framework should handle this, by
788 * calling into this code. But this must wait until the
789 * clock structures are tagged with omap_hwmod entries
790 */
43b40992
PW
791 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
792 (sf & SYSC_HAS_CLOCKACTIVITY))
793 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238
PW
794
795 _write_sysconfig(v, oh);
9980ce53
RN
796
797 /* If slave is in SMARTIDLE, also enable wakeup */
798 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
799 _enable_wakeup(oh);
63c85238
PW
800}
801
802/**
74ff3a68 803 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
804 * @oh: struct omap_hwmod *
805 *
806 * If module is marked as SWSUP_SIDLE, force the module into slave
807 * idle; otherwise, configure it for smart-idle. If module is marked
808 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
809 * configure it for smart-standby. No return value.
810 */
74ff3a68 811static void _idle_sysc(struct omap_hwmod *oh)
63c85238 812{
43b40992 813 u8 idlemode, sf;
63c85238
PW
814 u32 v;
815
43b40992 816 if (!oh->class->sysc)
63c85238
PW
817 return;
818
819 v = oh->_sysc_cache;
43b40992 820 sf = oh->class->sysc->sysc_flags;
63c85238 821
43b40992 822 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
823 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
824 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
825 _set_slave_idlemode(oh, idlemode, &v);
826 }
827
43b40992 828 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
829 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
830 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
831 _set_master_standbymode(oh, idlemode, &v);
832 }
833
834 _write_sysconfig(v, oh);
835}
836
837/**
74ff3a68 838 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
839 * @oh: struct omap_hwmod *
840 *
841 * Force the module into slave idle and master suspend. No return
842 * value.
843 */
74ff3a68 844static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
845{
846 u32 v;
43b40992 847 u8 sf;
63c85238 848
43b40992 849 if (!oh->class->sysc)
63c85238
PW
850 return;
851
852 v = oh->_sysc_cache;
43b40992 853 sf = oh->class->sysc->sysc_flags;
63c85238 854
43b40992 855 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
856 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
857
43b40992 858 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
859 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
860
43b40992 861 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 862 _set_module_autoidle(oh, 1, &v);
63c85238
PW
863
864 _write_sysconfig(v, oh);
865}
866
867/**
868 * _lookup - find an omap_hwmod by name
869 * @name: find an omap_hwmod by name
870 *
871 * Return a pointer to an omap_hwmod by name, or NULL if not found.
872 * Caller must hold omap_hwmod_mutex.
873 */
874static struct omap_hwmod *_lookup(const char *name)
875{
876 struct omap_hwmod *oh, *temp_oh;
877
878 oh = NULL;
879
880 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
881 if (!strcmp(name, temp_oh->name)) {
882 oh = temp_oh;
883 break;
884 }
885 }
886
887 return oh;
888}
889
890/**
891 * _init_clocks - clk_get() all clocks associated with this hwmod
892 * @oh: struct omap_hwmod *
97d60162 893 * @data: not used; pass NULL
63c85238
PW
894 *
895 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
12b1fdb4
KH
896 * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
897 * the omap_hwmod has not yet been registered or if the clocks have
898 * already been initialized, 0 on success, or a non-zero error on
899 * failure.
63c85238 900 */
97d60162 901static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
902{
903 int ret = 0;
904
905 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
906 return -EINVAL;
907
908 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
909
910 ret |= _init_main_clk(oh);
911 ret |= _init_interface_clks(oh);
912 ret |= _init_opt_clks(oh);
913
f5c1f84b
BC
914 if (!ret)
915 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 916
f5c1f84b 917 return 0;
63c85238
PW
918}
919
920/**
921 * _wait_target_ready - wait for a module to leave slave idle
922 * @oh: struct omap_hwmod *
923 *
924 * Wait for a module @oh to leave slave idle. Returns 0 if the module
925 * does not have an IDLEST bit or if the module successfully leaves
926 * slave idle; otherwise, pass along the return value of the
927 * appropriate *_cm_wait_module_ready() function.
928 */
929static int _wait_target_ready(struct omap_hwmod *oh)
930{
931 struct omap_hwmod_ocp_if *os;
932 int ret;
933
934 if (!oh)
935 return -EINVAL;
936
937 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
938 return 0;
939
682fdc96 940 os = oh->slaves[oh->_mpu_port_index];
63c85238 941
33f7ec81 942 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
943 return 0;
944
945 /* XXX check module SIDLEMODE */
946
947 /* XXX check clock enable states */
948
949 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
950 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
951 oh->prcm.omap2.idlest_reg_id,
952 oh->prcm.omap2.idlest_idle_bit);
63c85238 953 } else if (cpu_is_omap44xx()) {
9a23dfe1 954 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
955 } else {
956 BUG();
957 };
958
959 return ret;
960}
961
5365efbe
BC
962/**
963 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
964 * @oh: struct omap_hwmod *
965 * @name: name of the reset line in the context of this hwmod
966 *
967 * Return the bit position of the reset line that match the
968 * input name. Return -ENOENT if not found.
969 */
970static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
971{
972 int i;
973
974 for (i = 0; i < oh->rst_lines_cnt; i++) {
975 const char *rst_line = oh->rst_lines[i].name;
976 if (!strcmp(rst_line, name)) {
977 u8 shift = oh->rst_lines[i].rst_shift;
978 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
979 oh->name, rst_line, shift);
980
981 return shift;
982 }
983 }
984
985 return -ENOENT;
986}
987
988/**
989 * _assert_hardreset - assert the HW reset line of submodules
990 * contained in the hwmod module.
991 * @oh: struct omap_hwmod *
992 * @name: name of the reset line to lookup and assert
993 *
994 * Some IP like dsp, ipu or iva contain processor that require
995 * an HW reset line to be assert / deassert in order to enable fully
996 * the IP.
997 */
998static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
999{
1000 u8 shift;
1001
1002 if (!oh)
1003 return -EINVAL;
1004
1005 shift = _lookup_hardreset(oh, name);
1006 if (IS_ERR_VALUE(shift))
1007 return shift;
1008
1009 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1010 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1011 shift);
1012 else if (cpu_is_omap44xx())
1013 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1014 shift);
1015 else
1016 return -EINVAL;
1017}
1018
1019/**
1020 * _deassert_hardreset - deassert the HW reset line of submodules contained
1021 * in the hwmod module.
1022 * @oh: struct omap_hwmod *
1023 * @name: name of the reset line to look up and deassert
1024 *
1025 * Some IP like dsp, ipu or iva contain processor that require
1026 * an HW reset line to be assert / deassert in order to enable fully
1027 * the IP.
1028 */
1029static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1030{
1031 u8 shift;
1032 int r;
1033
1034 if (!oh)
1035 return -EINVAL;
1036
1037 shift = _lookup_hardreset(oh, name);
1038 if (IS_ERR_VALUE(shift))
1039 return shift;
1040
1041 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1042 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1043 shift);
1044 else if (cpu_is_omap44xx())
1045 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1046 shift);
1047 else
1048 return -EINVAL;
1049
1050 if (r == -EBUSY)
1051 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1052
1053 return r;
1054}
1055
1056/**
1057 * _read_hardreset - read the HW reset line state of submodules
1058 * contained in the hwmod module
1059 * @oh: struct omap_hwmod *
1060 * @name: name of the reset line to look up and read
1061 *
1062 * Return the state of the reset line.
1063 */
1064static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1065{
1066 u8 shift;
1067
1068 if (!oh)
1069 return -EINVAL;
1070
1071 shift = _lookup_hardreset(oh, name);
1072 if (IS_ERR_VALUE(shift))
1073 return shift;
1074
1075 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1076 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1077 shift);
1078 } else if (cpu_is_omap44xx()) {
1079 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1080 shift);
1081 } else {
1082 return -EINVAL;
1083 }
1084}
1085
63c85238
PW
1086/**
1087 * _reset - reset an omap_hwmod
1088 * @oh: struct omap_hwmod *
1089 *
1090 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1091 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1092 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1093 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1094 *
1095 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1096 * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
1097 * use the SYSCONFIG softreset bit to provide the status.
1098 *
1099 * Note that some IP like McBSP does have a reset control but no reset status.
63c85238
PW
1100 */
1101static int _reset(struct omap_hwmod *oh)
1102{
96835af9 1103 u32 v;
6f8b7ff5 1104 int c = 0;
96835af9 1105 int ret = 0;
63c85238 1106
43b40992 1107 if (!oh->class->sysc ||
2cb06814 1108 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1109 return -EINVAL;
1110
1111 /* clocks must be on for this operation */
1112 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1113 pr_warning("omap_hwmod: %s: reset can only be entered from "
1114 "enabled state\n", oh->name);
63c85238
PW
1115 return -EINVAL;
1116 }
1117
96835af9
BC
1118 /* For some modules, all optionnal clocks need to be enabled as well */
1119 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1120 _enable_optional_clocks(oh);
1121
63c85238
PW
1122 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1123
1124 v = oh->_sysc_cache;
96835af9
BC
1125 ret = _set_softreset(oh, &v);
1126 if (ret)
1127 goto dis_opt_clks;
63c85238
PW
1128 _write_sysconfig(v, oh);
1129
2cb06814
BC
1130 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1131 omap_test_timeout((omap_hwmod_readl(oh,
1132 oh->class->sysc->syss_offs)
1133 & SYSS_RESETDONE_MASK),
1134 MAX_MODULE_SOFTRESET_WAIT, c);
1135 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1136 omap_test_timeout(!(omap_hwmod_readl(oh,
1137 oh->class->sysc->sysc_offs)
1138 & SYSC_TYPE2_SOFTRESET_MASK),
1139 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1140
5365efbe 1141 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1142 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1143 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1144 else
5365efbe 1145 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1146
1147 /*
1148 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1149 * _wait_target_ready() or _reset()
1150 */
1151
96835af9
BC
1152 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1153
1154dis_opt_clks:
1155 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1156 _disable_optional_clocks(oh);
1157
1158 return ret;
63c85238
PW
1159}
1160
1161/**
84824022 1162 * _omap_hwmod_enable - enable an omap_hwmod
63c85238
PW
1163 * @oh: struct omap_hwmod *
1164 *
1165 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
74ff3a68
PW
1166 * register target. (This function has a full name --
1167 * _omap_hwmod_enable() rather than simply _enable() -- because it is
1168 * currently required by the pm34xx.c idle loop.) Returns -EINVAL if
1169 * the hwmod is in the wrong state or passes along the return value of
1170 * _wait_target_ready().
63c85238 1171 */
84824022 1172int _omap_hwmod_enable(struct omap_hwmod *oh)
63c85238
PW
1173{
1174 int r;
1175
1176 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1177 oh->_state != _HWMOD_STATE_IDLE &&
1178 oh->_state != _HWMOD_STATE_DISABLED) {
1179 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1180 "from initialized, idle, or disabled state\n", oh->name);
1181 return -EINVAL;
1182 }
1183
1184 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1185
5365efbe
BC
1186 /*
1187 * If an IP contains only one HW reset line, then de-assert it in order
1188 * to allow to enable the clocks. Otherwise the PRCM will return
1189 * Intransition status, and the init will failed.
1190 */
1191 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1192 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1193 _deassert_hardreset(oh, oh->rst_lines[0].name);
1194
63c85238
PW
1195 /* XXX mux balls */
1196
1197 _add_initiator_dep(oh, mpu_oh);
1198 _enable_clocks(oh);
1199
63c85238 1200 r = _wait_target_ready(oh);
9a23dfe1 1201 if (!r) {
63c85238
PW
1202 oh->_state = _HWMOD_STATE_ENABLED;
1203
9a23dfe1
BC
1204 /* Access the sysconfig only if the target is ready */
1205 if (oh->class->sysc) {
1206 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1207 _update_sysc_cache(oh);
74ff3a68 1208 _enable_sysc(oh);
9a23dfe1
BC
1209 }
1210 } else {
1211 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1212 oh->name, r);
1213 }
1214
63c85238
PW
1215 return r;
1216}
1217
1218/**
74ff3a68 1219 * _omap_hwmod_idle - idle an omap_hwmod
63c85238
PW
1220 * @oh: struct omap_hwmod *
1221 *
1222 * Idles an omap_hwmod @oh. This should be called once the hwmod has
74ff3a68
PW
1223 * no further work. (This function has a full name --
1224 * _omap_hwmod_idle() rather than simply _idle() -- because it is
1225 * currently required by the pm34xx.c idle loop.) Returns -EINVAL if
1226 * the hwmod is in the wrong state or returns 0.
63c85238 1227 */
84824022 1228int _omap_hwmod_idle(struct omap_hwmod *oh)
63c85238
PW
1229{
1230 if (oh->_state != _HWMOD_STATE_ENABLED) {
1231 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1232 "enabled state\n", oh->name);
1233 return -EINVAL;
1234 }
1235
1236 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1237
43b40992 1238 if (oh->class->sysc)
74ff3a68 1239 _idle_sysc(oh);
63c85238
PW
1240 _del_initiator_dep(oh, mpu_oh);
1241 _disable_clocks(oh);
1242
1243 oh->_state = _HWMOD_STATE_IDLE;
1244
1245 return 0;
1246}
1247
1248/**
1249 * _shutdown - shutdown an omap_hwmod
1250 * @oh: struct omap_hwmod *
1251 *
1252 * Shut down an omap_hwmod @oh. This should be called when the driver
1253 * used for the hwmod is removed or unloaded or if the driver is not
1254 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1255 * state or returns 0.
1256 */
1257static int _shutdown(struct omap_hwmod *oh)
1258{
1259 if (oh->_state != _HWMOD_STATE_IDLE &&
1260 oh->_state != _HWMOD_STATE_ENABLED) {
1261 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1262 "from idle, or enabled state\n", oh->name);
1263 return -EINVAL;
1264 }
1265
1266 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1267
43b40992 1268 if (oh->class->sysc)
74ff3a68 1269 _shutdown_sysc(oh);
3827f949 1270
5365efbe
BC
1271 /*
1272 * If an IP contains only one HW reset line, then assert it
1273 * before disabling the clocks and shutting down the IP.
1274 */
1275 if (oh->rst_lines_cnt == 1)
1276 _assert_hardreset(oh, oh->rst_lines[0].name);
1277
3827f949
BC
1278 /* clocks and deps are already disabled in idle */
1279 if (oh->_state == _HWMOD_STATE_ENABLED) {
1280 _del_initiator_dep(oh, mpu_oh);
1281 /* XXX what about the other system initiators here? dma, dsp */
1282 _disable_clocks(oh);
1283 }
63c85238
PW
1284 /* XXX Should this code also force-disable the optional clocks? */
1285
1286 /* XXX mux any associated balls to safe mode */
1287
1288 oh->_state = _HWMOD_STATE_DISABLED;
1289
1290 return 0;
1291}
1292
63c85238
PW
1293/**
1294 * _setup - do initial configuration of omap_hwmod
1295 * @oh: struct omap_hwmod *
97d60162 1296 * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
63c85238
PW
1297 *
1298 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
12b1fdb4
KH
1299 * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
1300 * a system that will not call omap_hwmod_enable() to enable devices
1301 * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
1302 * is in the wrong state or returns 0.
63c85238 1303 */
97d60162 1304static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1305{
9a23dfe1 1306 int i, r;
97d60162 1307 u8 skip_setup_idle;
63c85238 1308
97d60162 1309 if (!oh || !data)
63c85238
PW
1310 return -EINVAL;
1311
97d60162
PW
1312 skip_setup_idle = *(u8 *)data;
1313
63c85238
PW
1314 /* Set iclk autoidle mode */
1315 if (oh->slaves_cnt > 0) {
682fdc96
BC
1316 for (i = 0; i < oh->slaves_cnt; i++) {
1317 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1318 struct clk *c = os->_clk;
1319
4d3ae5a9 1320 if (!c)
63c85238
PW
1321 continue;
1322
1323 if (os->flags & OCPIF_SWSUP_IDLE) {
1324 /* XXX omap_iclk_deny_idle(c); */
1325 } else {
1326 /* XXX omap_iclk_allow_idle(c); */
1327 clk_enable(c);
1328 }
1329 }
1330 }
1331
12b1fdb4 1332 mutex_init(&oh->_mutex);
63c85238
PW
1333 oh->_state = _HWMOD_STATE_INITIALIZED;
1334
5365efbe
BC
1335 /*
1336 * In the case of hwmod with hardreset that should not be
1337 * de-assert at boot time, we have to keep the module
1338 * initialized, because we cannot enable it properly with the
1339 * reset asserted. Exit without warning because that behavior is
1340 * expected.
1341 */
1342 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1343 return 0;
1344
84824022 1345 r = _omap_hwmod_enable(oh);
9a23dfe1
BC
1346 if (r) {
1347 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1348 oh->name, oh->_state);
1349 return 0;
1350 }
63c85238 1351
b835d014 1352 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1353 _reset(oh);
1354
b835d014 1355 /*
76e5589e
BC
1356 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1357 * The _omap_hwmod_enable() function should be split to
1358 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1359 */
43b40992 1360 if (oh->class->sysc) {
b835d014 1361 _update_sysc_cache(oh);
74ff3a68 1362 _enable_sysc(oh);
b835d014
PW
1363 }
1364 }
63c85238 1365
97d60162 1366 if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle)
84824022 1367 _omap_hwmod_idle(oh);
63c85238
PW
1368
1369 return 0;
1370}
1371
1372
1373
1374/* Public functions */
1375
1376u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
1377{
db2a60bf 1378 return __raw_readl(oh->_mpu_rt_va + reg_offs);
63c85238
PW
1379}
1380
1381void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1382{
db2a60bf 1383 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
63c85238
PW
1384}
1385
887adeac
PW
1386/**
1387 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1388 * @oh: struct omap_hwmod *
1389 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1390 *
1391 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1392 * local copy. Intended to be used by drivers that have some erratum
1393 * that requires direct manipulation of the SIDLEMODE bits. Returns
1394 * -EINVAL if @oh is null, or passes along the return value from
1395 * _set_slave_idlemode().
1396 *
1397 * XXX Does this function have any current users? If not, we should
1398 * remove it; it is better to let the rest of the hwmod code handle this.
1399 * Any users of this function should be scrutinized carefully.
1400 */
46273e6f
KH
1401int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1402{
1403 u32 v;
1404 int retval = 0;
1405
1406 if (!oh)
1407 return -EINVAL;
1408
1409 v = oh->_sysc_cache;
1410
1411 retval = _set_slave_idlemode(oh, idlemode, &v);
1412 if (!retval)
1413 _write_sysconfig(v, oh);
1414
1415 return retval;
1416}
1417
63c85238
PW
1418/**
1419 * omap_hwmod_register - register a struct omap_hwmod
1420 * @oh: struct omap_hwmod *
1421 *
43b40992
PW
1422 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1423 * already has been registered by the same name; -EINVAL if the
1424 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1425 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1426 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1427 * success.
63c85238
PW
1428 *
1429 * XXX The data should be copied into bootmem, so the original data
1430 * should be marked __initdata and freed after init. This would allow
1431 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1432 * that the copy process would be relatively complex due to the large number
1433 * of substructures.
1434 */
1435int omap_hwmod_register(struct omap_hwmod *oh)
1436{
1437 int ret, ms_id;
1438
43b40992
PW
1439 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1440 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1441 return -EINVAL;
1442
1443 mutex_lock(&omap_hwmod_mutex);
1444
1445 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1446
1447 if (_lookup(oh->name)) {
1448 ret = -EEXIST;
1449 goto ohr_unlock;
1450 }
1451
1452 ms_id = _find_mpu_port_index(oh);
1453 if (!IS_ERR_VALUE(ms_id)) {
1454 oh->_mpu_port_index = ms_id;
db2a60bf 1455 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
63c85238
PW
1456 } else {
1457 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1458 }
1459
1460 list_add_tail(&oh->node, &omap_hwmod_list);
1461
1462 oh->_state = _HWMOD_STATE_REGISTERED;
1463
1464 ret = 0;
1465
1466ohr_unlock:
1467 mutex_unlock(&omap_hwmod_mutex);
1468 return ret;
1469}
1470
1471/**
1472 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1473 * @name: name of the omap_hwmod to look up
1474 *
1475 * Given a @name of an omap_hwmod, return a pointer to the registered
1476 * struct omap_hwmod *, or NULL upon error.
1477 */
1478struct omap_hwmod *omap_hwmod_lookup(const char *name)
1479{
1480 struct omap_hwmod *oh;
1481
1482 if (!name)
1483 return NULL;
1484
1485 mutex_lock(&omap_hwmod_mutex);
1486 oh = _lookup(name);
1487 mutex_unlock(&omap_hwmod_mutex);
1488
1489 return oh;
1490}
1491
1492/**
1493 * omap_hwmod_for_each - call function for each registered omap_hwmod
1494 * @fn: pointer to a callback function
97d60162 1495 * @data: void * data to pass to callback function
63c85238
PW
1496 *
1497 * Call @fn for each registered omap_hwmod, passing @data to each
1498 * function. @fn must return 0 for success or any other value for
1499 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1500 * will stop and the non-zero return value will be passed to the
1501 * caller of omap_hwmod_for_each(). @fn is called with
1502 * omap_hwmod_for_each() held.
1503 */
97d60162
PW
1504int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1505 void *data)
63c85238
PW
1506{
1507 struct omap_hwmod *temp_oh;
1508 int ret;
1509
1510 if (!fn)
1511 return -EINVAL;
1512
1513 mutex_lock(&omap_hwmod_mutex);
1514 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1515 ret = (*fn)(temp_oh, data);
63c85238
PW
1516 if (ret)
1517 break;
1518 }
1519 mutex_unlock(&omap_hwmod_mutex);
1520
1521 return ret;
1522}
1523
1524
1525/**
1526 * omap_hwmod_init - init omap_hwmod code and register hwmods
1527 * @ohs: pointer to an array of omap_hwmods to register
1528 *
1529 * Intended to be called early in boot before the clock framework is
1530 * initialized. If @ohs is not null, will register all omap_hwmods
1531 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1532 * omap_hwmod_init() has already been called or 0 otherwise.
1533 */
1534int omap_hwmod_init(struct omap_hwmod **ohs)
1535{
1536 struct omap_hwmod *oh;
1537 int r;
1538
1539 if (inited)
1540 return -EINVAL;
1541
1542 inited = 1;
1543
1544 if (!ohs)
1545 return 0;
1546
1547 oh = *ohs;
1548 while (oh) {
1549 if (omap_chip_is(oh->omap_chip)) {
1550 r = omap_hwmod_register(oh);
1551 WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
1552 "%d\n", oh->name, r);
1553 }
1554 oh = *++ohs;
1555 }
1556
1557 return 0;
1558}
1559
1560/**
1561 * omap_hwmod_late_init - do some post-clock framework initialization
97d60162 1562 * @skip_setup_idle: if 1, do not idle hwmods in _setup()
63c85238
PW
1563 *
1564 * Must be called after omap2_clk_init(). Resolves the struct clk names
1565 * to struct clk pointers for each registered omap_hwmod. Also calls
1566 * _setup() on each hwmod. Returns 0.
1567 */
97d60162 1568int omap_hwmod_late_init(u8 skip_setup_idle)
63c85238
PW
1569{
1570 int r;
1571
1572 /* XXX check return value */
97d60162 1573 r = omap_hwmod_for_each(_init_clocks, NULL);
63c85238
PW
1574 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1575
1576 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1577 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1578 MPU_INITIATOR_NAME);
1579
97d60162
PW
1580 if (skip_setup_idle)
1581 pr_debug("omap_hwmod: will leave hwmods enabled during setup\n");
1582
1583 omap_hwmod_for_each(_setup, &skip_setup_idle);
63c85238
PW
1584
1585 return 0;
1586}
1587
1588/**
1589 * omap_hwmod_unregister - unregister an omap_hwmod
1590 * @oh: struct omap_hwmod *
1591 *
1592 * Unregisters a previously-registered omap_hwmod @oh. There's probably
1593 * no use case for this, so it is likely to be removed in a later version.
1594 *
1595 * XXX Free all of the bootmem-allocated structures here when that is
1596 * implemented. Make it clear that core code is the only code that is
1597 * expected to unregister modules.
1598 */
1599int omap_hwmod_unregister(struct omap_hwmod *oh)
1600{
1601 if (!oh)
1602 return -EINVAL;
1603
1604 pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
1605
1606 mutex_lock(&omap_hwmod_mutex);
db2a60bf 1607 iounmap(oh->_mpu_rt_va);
63c85238
PW
1608 list_del(&oh->node);
1609 mutex_unlock(&omap_hwmod_mutex);
1610
1611 return 0;
1612}
1613
1614/**
1615 * omap_hwmod_enable - enable an omap_hwmod
1616 * @oh: struct omap_hwmod *
1617 *
74ff3a68 1618 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1619 * Returns -EINVAL on error or passes along the return value from _enable().
1620 */
1621int omap_hwmod_enable(struct omap_hwmod *oh)
1622{
1623 int r;
1624
1625 if (!oh)
1626 return -EINVAL;
1627
12b1fdb4 1628 mutex_lock(&oh->_mutex);
84824022 1629 r = _omap_hwmod_enable(oh);
12b1fdb4 1630 mutex_unlock(&oh->_mutex);
63c85238
PW
1631
1632 return r;
1633}
1634
84824022 1635
63c85238
PW
1636/**
1637 * omap_hwmod_idle - idle an omap_hwmod
1638 * @oh: struct omap_hwmod *
1639 *
74ff3a68 1640 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1641 * Returns -EINVAL on error or passes along the return value from _idle().
1642 */
1643int omap_hwmod_idle(struct omap_hwmod *oh)
1644{
1645 if (!oh)
1646 return -EINVAL;
1647
12b1fdb4 1648 mutex_lock(&oh->_mutex);
84824022 1649 _omap_hwmod_idle(oh);
12b1fdb4 1650 mutex_unlock(&oh->_mutex);
63c85238
PW
1651
1652 return 0;
1653}
1654
1655/**
1656 * omap_hwmod_shutdown - shutdown an omap_hwmod
1657 * @oh: struct omap_hwmod *
1658 *
74ff3a68 1659 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1660 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1661 * the return value from _shutdown().
1662 */
1663int omap_hwmod_shutdown(struct omap_hwmod *oh)
1664{
1665 if (!oh)
1666 return -EINVAL;
1667
12b1fdb4 1668 mutex_lock(&oh->_mutex);
63c85238 1669 _shutdown(oh);
12b1fdb4 1670 mutex_unlock(&oh->_mutex);
63c85238
PW
1671
1672 return 0;
1673}
1674
1675/**
1676 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1677 * @oh: struct omap_hwmod *oh
1678 *
1679 * Intended to be called by the omap_device code.
1680 */
1681int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1682{
12b1fdb4 1683 mutex_lock(&oh->_mutex);
63c85238 1684 _enable_clocks(oh);
12b1fdb4 1685 mutex_unlock(&oh->_mutex);
63c85238
PW
1686
1687 return 0;
1688}
1689
1690/**
1691 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1692 * @oh: struct omap_hwmod *oh
1693 *
1694 * Intended to be called by the omap_device code.
1695 */
1696int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1697{
12b1fdb4 1698 mutex_lock(&oh->_mutex);
63c85238 1699 _disable_clocks(oh);
12b1fdb4 1700 mutex_unlock(&oh->_mutex);
63c85238
PW
1701
1702 return 0;
1703}
1704
1705/**
1706 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1707 * @oh: struct omap_hwmod *oh
1708 *
1709 * Intended to be called by drivers and core code when all posted
1710 * writes to a device must complete before continuing further
1711 * execution (for example, after clearing some device IRQSTATUS
1712 * register bits)
1713 *
1714 * XXX what about targets with multiple OCP threads?
1715 */
1716void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1717{
1718 BUG_ON(!oh);
1719
43b40992 1720 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1721 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1722 "device configuration\n", oh->name);
1723 return;
1724 }
1725
1726 /*
1727 * Forces posted writes to complete on the OCP thread handling
1728 * register writes
1729 */
43b40992 1730 omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1731}
1732
1733/**
1734 * omap_hwmod_reset - reset the hwmod
1735 * @oh: struct omap_hwmod *
1736 *
1737 * Under some conditions, a driver may wish to reset the entire device.
1738 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1739 * the return value from _reset().
63c85238
PW
1740 */
1741int omap_hwmod_reset(struct omap_hwmod *oh)
1742{
1743 int r;
1744
9b579114 1745 if (!oh)
63c85238
PW
1746 return -EINVAL;
1747
12b1fdb4 1748 mutex_lock(&oh->_mutex);
63c85238 1749 r = _reset(oh);
12b1fdb4 1750 mutex_unlock(&oh->_mutex);
63c85238
PW
1751
1752 return r;
1753}
1754
1755/**
1756 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1757 * @oh: struct omap_hwmod *
1758 * @res: pointer to the first element of an array of struct resource to fill
1759 *
1760 * Count the number of struct resource array elements necessary to
1761 * contain omap_hwmod @oh resources. Intended to be called by code
1762 * that registers omap_devices. Intended to be used to determine the
1763 * size of a dynamically-allocated struct resource array, before
1764 * calling omap_hwmod_fill_resources(). Returns the number of struct
1765 * resource array elements needed.
1766 *
1767 * XXX This code is not optimized. It could attempt to merge adjacent
1768 * resource IDs.
1769 *
1770 */
1771int omap_hwmod_count_resources(struct omap_hwmod *oh)
1772{
1773 int ret, i;
1774
9ee9fff9 1775 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1776
1777 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1778 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1779
1780 return ret;
1781}
1782
1783/**
1784 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1785 * @oh: struct omap_hwmod *
1786 * @res: pointer to the first element of an array of struct resource to fill
1787 *
1788 * Fill the struct resource array @res with resource data from the
1789 * omap_hwmod @oh. Intended to be called by code that registers
1790 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1791 * number of array elements filled.
1792 */
1793int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1794{
1795 int i, j;
1796 int r = 0;
1797
1798 /* For each IRQ, DMA, memory area, fill in array.*/
1799
1800 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
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1801 (res + r)->name = (oh->mpu_irqs + i)->name;
1802 (res + r)->start = (oh->mpu_irqs + i)->irq;
1803 (res + r)->end = (oh->mpu_irqs + i)->irq;
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1804 (res + r)->flags = IORESOURCE_IRQ;
1805 r++;
1806 }
1807
9ee9fff9
BC
1808 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1809 (res + r)->name = (oh->sdma_reqs + i)->name;
1810 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1811 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
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1812 (res + r)->flags = IORESOURCE_DMA;
1813 r++;
1814 }
1815
1816 for (i = 0; i < oh->slaves_cnt; i++) {
1817 struct omap_hwmod_ocp_if *os;
1818
682fdc96 1819 os = oh->slaves[i];
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1820
1821 for (j = 0; j < os->addr_cnt; j++) {
1822 (res + r)->start = (os->addr + j)->pa_start;
1823 (res + r)->end = (os->addr + j)->pa_end;
1824 (res + r)->flags = IORESOURCE_MEM;
1825 r++;
1826 }
1827 }
1828
1829 return r;
1830}
1831
1832/**
1833 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1834 * @oh: struct omap_hwmod *
1835 *
1836 * Return the powerdomain pointer associated with the OMAP module
1837 * @oh's main clock. If @oh does not have a main clk, return the
1838 * powerdomain associated with the interface clock associated with the
1839 * module's MPU port. (XXX Perhaps this should use the SDMA port
1840 * instead?) Returns NULL on error, or a struct powerdomain * on
1841 * success.
1842 */
1843struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1844{
1845 struct clk *c;
1846
1847 if (!oh)
1848 return NULL;
1849
1850 if (oh->_clk) {
1851 c = oh->_clk;
1852 } else {
1853 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1854 return NULL;
1855 c = oh->slaves[oh->_mpu_port_index]->_clk;
1856 }
1857
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1858 if (!c->clkdm)
1859 return NULL;
1860
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1861 return c->clkdm->pwrdm.ptr;
1862
1863}
1864
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1865/**
1866 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1867 * @oh: struct omap_hwmod *
1868 *
1869 * Returns the virtual address corresponding to the beginning of the
1870 * module's register target, in the address range that is intended to
1871 * be used by the MPU. Returns the virtual address upon success or NULL
1872 * upon error.
1873 */
1874void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1875{
1876 if (!oh)
1877 return NULL;
1878
1879 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1880 return NULL;
1881
1882 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1883 return NULL;
1884
1885 return oh->_mpu_rt_va;
1886}
1887
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1888/**
1889 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1890 * @oh: struct omap_hwmod *
1891 * @init_oh: struct omap_hwmod * (initiator)
1892 *
1893 * Add a sleep dependency between the initiator @init_oh and @oh.
1894 * Intended to be called by DSP/Bridge code via platform_data for the
1895 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1896 * code needs to add/del initiator dependencies dynamically
1897 * before/after accessing a device. Returns the return value from
1898 * _add_initiator_dep().
1899 *
1900 * XXX Keep a usecount in the clockdomain code
1901 */
1902int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1903 struct omap_hwmod *init_oh)
1904{
1905 return _add_initiator_dep(oh, init_oh);
1906}
1907
1908/*
1909 * XXX what about functions for drivers to save/restore ocp_sysconfig
1910 * for context save/restore operations?
1911 */
1912
1913/**
1914 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1915 * @oh: struct omap_hwmod *
1916 * @init_oh: struct omap_hwmod * (initiator)
1917 *
1918 * Remove a sleep dependency between the initiator @init_oh and @oh.
1919 * Intended to be called by DSP/Bridge code via platform_data for the
1920 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1921 * code needs to add/del initiator dependencies dynamically
1922 * before/after accessing a device. Returns the return value from
1923 * _del_initiator_dep().
1924 *
1925 * XXX Keep a usecount in the clockdomain code
1926 */
1927int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1928 struct omap_hwmod *init_oh)
1929{
1930 return _del_initiator_dep(oh, init_oh);
1931}
1932
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1933/**
1934 * omap_hwmod_enable_wakeup - allow device to wake up the system
1935 * @oh: struct omap_hwmod *
1936 *
1937 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1938 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
1939 * registers to cause the PRCM to receive wakeup events from the
1940 * module. Does not set any wakeup routing registers beyond this
1941 * point - if the module is to wake up any other module or subsystem,
1942 * that must be set separately. Called by omap_device code. Returns
1943 * -EINVAL on error or 0 upon success.
1944 */
1945int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1946{
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1947 if (!oh->class->sysc ||
1948 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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1949 return -EINVAL;
1950
12b1fdb4 1951 mutex_lock(&oh->_mutex);
63c85238 1952 _enable_wakeup(oh);
12b1fdb4 1953 mutex_unlock(&oh->_mutex);
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1954
1955 return 0;
1956}
1957
1958/**
1959 * omap_hwmod_disable_wakeup - prevent device from waking the system
1960 * @oh: struct omap_hwmod *
1961 *
1962 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
1963 * from sending wakeups to the PRCM. Eventually this should clear
1964 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
1965 * from the module. Does not set any wakeup routing registers beyond
1966 * this point - if the module is to wake up any other module or
1967 * subsystem, that must be set separately. Called by omap_device
1968 * code. Returns -EINVAL on error or 0 upon success.
1969 */
1970int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
1971{
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1972 if (!oh->class->sysc ||
1973 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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1974 return -EINVAL;
1975
12b1fdb4 1976 mutex_lock(&oh->_mutex);
63c85238 1977 _disable_wakeup(oh);
12b1fdb4 1978 mutex_unlock(&oh->_mutex);
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1979
1980 return 0;
1981}
43b40992 1982
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1983/**
1984 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
1985 * contained in the hwmod module.
1986 * @oh: struct omap_hwmod *
1987 * @name: name of the reset line to lookup and assert
1988 *
1989 * Some IP like dsp, ipu or iva contain processor that require
1990 * an HW reset line to be assert / deassert in order to enable fully
1991 * the IP. Returns -EINVAL if @oh is null or if the operation is not
1992 * yet supported on this OMAP; otherwise, passes along the return value
1993 * from _assert_hardreset().
1994 */
1995int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
1996{
1997 int ret;
1998
1999 if (!oh)
2000 return -EINVAL;
2001
2002 mutex_lock(&oh->_mutex);
2003 ret = _assert_hardreset(oh, name);
2004 mutex_unlock(&oh->_mutex);
2005
2006 return ret;
2007}
2008
2009/**
2010 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2011 * contained in the hwmod module.
2012 * @oh: struct omap_hwmod *
2013 * @name: name of the reset line to look up and deassert
2014 *
2015 * Some IP like dsp, ipu or iva contain processor that require
2016 * an HW reset line to be assert / deassert in order to enable fully
2017 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2018 * yet supported on this OMAP; otherwise, passes along the return value
2019 * from _deassert_hardreset().
2020 */
2021int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2022{
2023 int ret;
2024
2025 if (!oh)
2026 return -EINVAL;
2027
2028 mutex_lock(&oh->_mutex);
2029 ret = _deassert_hardreset(oh, name);
2030 mutex_unlock(&oh->_mutex);
2031
2032 return ret;
2033}
2034
2035/**
2036 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2037 * contained in the hwmod module
2038 * @oh: struct omap_hwmod *
2039 * @name: name of the reset line to look up and read
2040 *
2041 * Return the current state of the hwmod @oh's reset line named @name:
2042 * returns -EINVAL upon parameter error or if this operation
2043 * is unsupported on the current OMAP; otherwise, passes along the return
2044 * value from _read_hardreset().
2045 */
2046int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2047{
2048 int ret;
2049
2050 if (!oh)
2051 return -EINVAL;
2052
2053 mutex_lock(&oh->_mutex);
2054 ret = _read_hardreset(oh, name);
2055 mutex_unlock(&oh->_mutex);
2056
2057 return ret;
2058}
2059
2060
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2061/**
2062 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2063 * @classname: struct omap_hwmod_class name to search for
2064 * @fn: callback function pointer to call for each hwmod in class @classname
2065 * @user: arbitrary context data to pass to the callback function
2066 *
2067 * For each omap_hwmod of class @classname, call @fn. Takes
2068 * omap_hwmod_mutex to prevent the hwmod list from changing during the
2069 * iteration. If the callback function returns something other than
2070 * zero, the iterator is terminated, and the callback function's return
2071 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2072 * if @classname or @fn are NULL, or passes back the error code from @fn.
2073 */
2074int omap_hwmod_for_each_by_class(const char *classname,
2075 int (*fn)(struct omap_hwmod *oh,
2076 void *user),
2077 void *user)
2078{
2079 struct omap_hwmod *temp_oh;
2080 int ret = 0;
2081
2082 if (!classname || !fn)
2083 return -EINVAL;
2084
2085 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2086 __func__, classname);
2087
2088 mutex_lock(&omap_hwmod_mutex);
2089
2090 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2091 if (!strcmp(temp_oh->class->name, classname)) {
2092 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2093 __func__, temp_oh->name);
2094 ret = (*fn)(temp_oh, user);
2095 if (ret)
2096 break;
2097 }
2098 }
2099
2100 mutex_unlock(&omap_hwmod_mutex);
2101
2102 if (ret)
2103 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2104 __func__, ret);
2105
2106 return ret;
2107}
2108