OMAP3: control/PRCM: move CONTROL_PADCONF_SYS_NIRQ save/restore to SCM code
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
db2a60bf 4 * Copyright (C) 2009-2010 Nokia Corporation
63c85238 5 *
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
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16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
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27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
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112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - pin mux handling
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
63c85238 139
6f8b7ff5 140#include <plat/common.h>
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141#include <plat/cpu.h>
142#include <plat/clockdomain.h>
143#include <plat/powerdomain.h>
144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
5365efbe 146#include <plat/prcm.h>
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147
148#include "cm.h"
5365efbe 149#include "prm.h"
63c85238 150
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151/* Maximum microseconds to wait for OMAP module to softreset */
152#define MAX_MODULE_SOFTRESET_WAIT 10000
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153
154/* Name of the OMAP hwmod for the MPU */
5c2c0296 155#define MPU_INITIATOR_NAME "mpu"
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156
157/* omap_hwmod_list contains all registered struct omap_hwmods */
158static LIST_HEAD(omap_hwmod_list);
159
160static DEFINE_MUTEX(omap_hwmod_mutex);
161
162/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163static struct omap_hwmod *mpu_oh;
164
165/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
166static u8 inited;
167
168
169/* Private functions */
170
171/**
172 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
173 * @oh: struct omap_hwmod *
174 *
175 * Load the current value of the hwmod OCP_SYSCONFIG register into the
176 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
177 * OCP_SYSCONFIG register or 0 upon success.
178 */
179static int _update_sysc_cache(struct omap_hwmod *oh)
180{
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181 if (!oh->class->sysc) {
182 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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183 return -EINVAL;
184 }
185
186 /* XXX ensure module interface clock is up */
187
cc7a1d2a 188 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 189
43b40992 190 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 191 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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192
193 return 0;
194}
195
196/**
197 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
198 * @v: OCP_SYSCONFIG value to write
199 * @oh: struct omap_hwmod *
200 *
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201 * Write @v into the module class' OCP_SYSCONFIG register, if it has
202 * one. No return value.
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203 */
204static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
205{
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206 if (!oh->class->sysc) {
207 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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208 return;
209 }
210
211 /* XXX ensure module interface clock is up */
212
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213 /* Module might have lost context, always update cache and register */
214 oh->_sysc_cache = v;
215 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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216}
217
218/**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
228static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230{
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231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
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234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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236 return -EINVAL;
237
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238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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240 return -EINVAL;
241 }
242
43b40992 243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
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248
249 return 0;
250}
251
252/**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
262static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263{
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264 u32 sidle_mask;
265 u8 sidle_shift;
266
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267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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269 return -EINVAL;
270
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271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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273 return -EINVAL;
274 }
275
43b40992 276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
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281
282 return 0;
283}
284
285/**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
296static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297{
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298 u32 clkact_mask;
299 u8 clkact_shift;
300
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301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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303 return -EINVAL;
304
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305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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307 return -EINVAL;
308 }
309
43b40992 310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
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315
316 return 0;
317}
318
319/**
320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
327static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328{
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329 u32 softrst_mask;
330
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331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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333 return -EINVAL;
334
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335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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337 return -EINVAL;
338 }
339
43b40992 340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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341
342 *v |= softrst_mask;
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343
344 return 0;
345}
346
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347/**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
360static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362{
358f0e63
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363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
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366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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368 return -EINVAL;
369
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370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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372 return -EINVAL;
373 }
374
43b40992 375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
358f0e63
TG
376 autoidle_mask = (0x3 << autoidle_shift);
377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
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380
381 return 0;
382}
383
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384/**
385 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
386 * @oh: struct omap_hwmod *
387 *
388 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
389 * upon error or 0 upon success.
390 */
391static int _enable_wakeup(struct omap_hwmod *oh)
392{
358f0e63 393 u32 v, wakeup_mask;
63c85238 394
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395 if (!oh->class->sysc ||
396 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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397 return -EINVAL;
398
43b40992
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399 if (!oh->class->sysc->sysc_fields) {
400 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
401 return -EINVAL;
402 }
403
43b40992 404 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 405
63c85238 406 v = oh->_sysc_cache;
358f0e63 407 v |= wakeup_mask;
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408 _write_sysconfig(v, oh);
409
410 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
411
412 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
413
414 return 0;
415}
416
417/**
418 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
419 * @oh: struct omap_hwmod *
420 *
421 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
422 * upon error or 0 upon success.
423 */
424static int _disable_wakeup(struct omap_hwmod *oh)
425{
358f0e63 426 u32 v, wakeup_mask;
63c85238 427
43b40992
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428 if (!oh->class->sysc ||
429 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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430 return -EINVAL;
431
43b40992
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432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
43b40992 437 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 438
63c85238 439 v = oh->_sysc_cache;
358f0e63 440 v &= ~wakeup_mask;
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441 _write_sysconfig(v, oh);
442
443 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
444
445 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
446
447 return 0;
448}
449
450/**
451 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
452 * @oh: struct omap_hwmod *
453 *
454 * Prevent the hardware module @oh from entering idle while the
455 * hardare module initiator @init_oh is active. Useful when a module
456 * will be accessed by a particular initiator (e.g., if a module will
457 * be accessed by the IVA, there should be a sleepdep between the IVA
458 * initiator and the module). Only applies to modules in smart-idle
459 * mode. Returns -EINVAL upon error or passes along
55ed9694 460 * clkdm_add_sleepdep() value upon success.
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461 */
462static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
463{
464 if (!oh->_clk)
465 return -EINVAL;
466
55ed9694 467 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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468}
469
470/**
471 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
472 * @oh: struct omap_hwmod *
473 *
474 * Allow the hardware module @oh to enter idle while the hardare
475 * module initiator @init_oh is active. Useful when a module will not
476 * be accessed by a particular initiator (e.g., if a module will not
477 * be accessed by the IVA, there should be no sleepdep between the IVA
478 * initiator and the module). Only applies to modules in smart-idle
479 * mode. Returns -EINVAL upon error or passes along
55ed9694 480 * clkdm_del_sleepdep() value upon success.
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481 */
482static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
483{
484 if (!oh->_clk)
485 return -EINVAL;
486
55ed9694 487 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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488}
489
490/**
491 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
492 * @oh: struct omap_hwmod *
493 *
494 * Called from _init_clocks(). Populates the @oh _clk (main
495 * functional clock pointer) if a main_clk is present. Returns 0 on
496 * success or -EINVAL on error.
497 */
498static int _init_main_clk(struct omap_hwmod *oh)
499{
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500 int ret = 0;
501
50ebdac2 502 if (!oh->main_clk)
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503 return 0;
504
63403384 505 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 506 if (!oh->_clk) {
20383d82
BC
507 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
508 oh->name, oh->main_clk);
63403384 509 return -EINVAL;
dc75925d 510 }
63c85238 511
63403384
BC
512 if (!oh->_clk->clkdm)
513 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
514 oh->main_clk, oh->_clk->name);
81d7c6ff 515
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516 return ret;
517}
518
519/**
887adeac 520 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
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521 * @oh: struct omap_hwmod *
522 *
523 * Called from _init_clocks(). Populates the @oh OCP slave interface
524 * clock pointers. Returns 0 on success or -EINVAL on error.
525 */
526static int _init_interface_clks(struct omap_hwmod *oh)
527{
63c85238
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528 struct clk *c;
529 int i;
530 int ret = 0;
531
532 if (oh->slaves_cnt == 0)
533 return 0;
534
682fdc96
BC
535 for (i = 0; i < oh->slaves_cnt; i++) {
536 struct omap_hwmod_ocp_if *os = oh->slaves[i];
537
50ebdac2 538 if (!os->clk)
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539 continue;
540
50ebdac2 541 c = omap_clk_get_by_name(os->clk);
dc75925d 542 if (!c) {
20383d82
BC
543 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
544 oh->name, os->clk);
63c85238 545 ret = -EINVAL;
dc75925d 546 }
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547 os->_clk = c;
548 }
549
550 return ret;
551}
552
553/**
554 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
555 * @oh: struct omap_hwmod *
556 *
557 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
558 * clock pointers. Returns 0 on success or -EINVAL on error.
559 */
560static int _init_opt_clks(struct omap_hwmod *oh)
561{
562 struct omap_hwmod_opt_clk *oc;
563 struct clk *c;
564 int i;
565 int ret = 0;
566
567 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 568 c = omap_clk_get_by_name(oc->clk);
dc75925d 569 if (!c) {
20383d82
BC
570 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
571 oh->name, oc->clk);
63c85238 572 ret = -EINVAL;
dc75925d 573 }
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574 oc->_clk = c;
575 }
576
577 return ret;
578}
579
580/**
581 * _enable_clocks - enable hwmod main clock and interface clocks
582 * @oh: struct omap_hwmod *
583 *
584 * Enables all clocks necessary for register reads and writes to succeed
585 * on the hwmod @oh. Returns 0.
586 */
587static int _enable_clocks(struct omap_hwmod *oh)
588{
63c85238
PW
589 int i;
590
591 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
592
4d3ae5a9 593 if (oh->_clk)
63c85238
PW
594 clk_enable(oh->_clk);
595
596 if (oh->slaves_cnt > 0) {
682fdc96
BC
597 for (i = 0; i < oh->slaves_cnt; i++) {
598 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
599 struct clk *c = os->_clk;
600
4d3ae5a9 601 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
602 clk_enable(c);
603 }
604 }
605
606 /* The opt clocks are controlled by the device driver. */
607
608 return 0;
609}
610
611/**
612 * _disable_clocks - disable hwmod main clock and interface clocks
613 * @oh: struct omap_hwmod *
614 *
615 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
616 */
617static int _disable_clocks(struct omap_hwmod *oh)
618{
63c85238
PW
619 int i;
620
621 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
622
4d3ae5a9 623 if (oh->_clk)
63c85238
PW
624 clk_disable(oh->_clk);
625
626 if (oh->slaves_cnt > 0) {
682fdc96
BC
627 for (i = 0; i < oh->slaves_cnt; i++) {
628 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
629 struct clk *c = os->_clk;
630
4d3ae5a9 631 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
632 clk_disable(c);
633 }
634 }
635
636 /* The opt clocks are controlled by the device driver. */
637
638 return 0;
639}
640
96835af9
BC
641static void _enable_optional_clocks(struct omap_hwmod *oh)
642{
643 struct omap_hwmod_opt_clk *oc;
644 int i;
645
646 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
647
648 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
649 if (oc->_clk) {
650 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
651 oc->_clk->name);
652 clk_enable(oc->_clk);
653 }
654}
655
656static void _disable_optional_clocks(struct omap_hwmod *oh)
657{
658 struct omap_hwmod_opt_clk *oc;
659 int i;
660
661 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
662
663 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
664 if (oc->_clk) {
665 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
666 oc->_clk->name);
667 clk_disable(oc->_clk);
668 }
669}
670
63c85238
PW
671/**
672 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
673 * @oh: struct omap_hwmod *
674 *
675 * Returns the array index of the OCP slave port that the MPU
676 * addresses the device on, or -EINVAL upon error or not found.
677 */
678static int _find_mpu_port_index(struct omap_hwmod *oh)
679{
63c85238
PW
680 int i;
681 int found = 0;
682
683 if (!oh || oh->slaves_cnt == 0)
684 return -EINVAL;
685
682fdc96
BC
686 for (i = 0; i < oh->slaves_cnt; i++) {
687 struct omap_hwmod_ocp_if *os = oh->slaves[i];
688
63c85238
PW
689 if (os->user & OCP_USER_MPU) {
690 found = 1;
691 break;
692 }
693 }
694
695 if (found)
696 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
697 oh->name, i);
698 else
699 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
700 oh->name);
701
702 return (found) ? i : -EINVAL;
703}
704
705/**
706 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
707 * @oh: struct omap_hwmod *
708 *
709 * Return the virtual address of the base of the register target of
710 * device @oh, or NULL on error.
711 */
712static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
713{
714 struct omap_hwmod_ocp_if *os;
715 struct omap_hwmod_addr_space *mem;
716 int i;
717 int found = 0;
986a13f5 718 void __iomem *va_start;
63c85238
PW
719
720 if (!oh || oh->slaves_cnt == 0)
721 return NULL;
722
682fdc96 723 os = oh->slaves[index];
63c85238
PW
724
725 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
726 if (mem->flags & ADDR_TYPE_RT) {
727 found = 1;
728 break;
729 }
730 }
731
986a13f5
TL
732 if (found) {
733 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
734 if (!va_start) {
735 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
736 return NULL;
737 }
63c85238 738 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
739 oh->name, va_start);
740 } else {
63c85238
PW
741 pr_debug("omap_hwmod: %s: no MPU register target found\n",
742 oh->name);
986a13f5 743 }
63c85238 744
986a13f5 745 return (found) ? va_start : NULL;
63c85238
PW
746}
747
748/**
74ff3a68 749 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
750 * @oh: struct omap_hwmod *
751 *
752 * If module is marked as SWSUP_SIDLE, force the module out of slave
753 * idle; otherwise, configure it for smart-idle. If module is marked
754 * as SWSUP_MSUSPEND, force the module out of master standby;
755 * otherwise, configure it for smart-standby. No return value.
756 */
74ff3a68 757static void _enable_sysc(struct omap_hwmod *oh)
63c85238 758{
43b40992 759 u8 idlemode, sf;
63c85238
PW
760 u32 v;
761
43b40992 762 if (!oh->class->sysc)
63c85238
PW
763 return;
764
765 v = oh->_sysc_cache;
43b40992 766 sf = oh->class->sysc->sysc_flags;
63c85238 767
43b40992 768 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
769 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
770 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
771 _set_slave_idlemode(oh, idlemode, &v);
772 }
773
43b40992 774 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
775 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
776 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
777 _set_master_standbymode(oh, idlemode, &v);
778 }
779
a16b1f7f
PW
780 /*
781 * XXX The clock framework should handle this, by
782 * calling into this code. But this must wait until the
783 * clock structures are tagged with omap_hwmod entries
784 */
43b40992
PW
785 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
786 (sf & SYSC_HAS_CLOCKACTIVITY))
787 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238
PW
788
789 _write_sysconfig(v, oh);
9980ce53
RN
790
791 /* If slave is in SMARTIDLE, also enable wakeup */
792 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
793 _enable_wakeup(oh);
78f26e87
HH
794
795 /*
796 * Set the autoidle bit only after setting the smartidle bit
797 * Setting this will not have any impact on the other modules.
798 */
799 if (sf & SYSC_HAS_AUTOIDLE) {
800 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
801 0 : 1;
802 _set_module_autoidle(oh, idlemode, &v);
803 _write_sysconfig(v, oh);
804 }
63c85238
PW
805}
806
807/**
74ff3a68 808 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
809 * @oh: struct omap_hwmod *
810 *
811 * If module is marked as SWSUP_SIDLE, force the module into slave
812 * idle; otherwise, configure it for smart-idle. If module is marked
813 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
814 * configure it for smart-standby. No return value.
815 */
74ff3a68 816static void _idle_sysc(struct omap_hwmod *oh)
63c85238 817{
43b40992 818 u8 idlemode, sf;
63c85238
PW
819 u32 v;
820
43b40992 821 if (!oh->class->sysc)
63c85238
PW
822 return;
823
824 v = oh->_sysc_cache;
43b40992 825 sf = oh->class->sysc->sysc_flags;
63c85238 826
43b40992 827 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
828 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
829 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
830 _set_slave_idlemode(oh, idlemode, &v);
831 }
832
43b40992 833 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
834 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
835 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
836 _set_master_standbymode(oh, idlemode, &v);
837 }
838
839 _write_sysconfig(v, oh);
840}
841
842/**
74ff3a68 843 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
844 * @oh: struct omap_hwmod *
845 *
846 * Force the module into slave idle and master suspend. No return
847 * value.
848 */
74ff3a68 849static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
850{
851 u32 v;
43b40992 852 u8 sf;
63c85238 853
43b40992 854 if (!oh->class->sysc)
63c85238
PW
855 return;
856
857 v = oh->_sysc_cache;
43b40992 858 sf = oh->class->sysc->sysc_flags;
63c85238 859
43b40992 860 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
861 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
862
43b40992 863 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
864 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
865
43b40992 866 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 867 _set_module_autoidle(oh, 1, &v);
63c85238
PW
868
869 _write_sysconfig(v, oh);
870}
871
872/**
873 * _lookup - find an omap_hwmod by name
874 * @name: find an omap_hwmod by name
875 *
876 * Return a pointer to an omap_hwmod by name, or NULL if not found.
877 * Caller must hold omap_hwmod_mutex.
878 */
879static struct omap_hwmod *_lookup(const char *name)
880{
881 struct omap_hwmod *oh, *temp_oh;
882
883 oh = NULL;
884
885 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
886 if (!strcmp(name, temp_oh->name)) {
887 oh = temp_oh;
888 break;
889 }
890 }
891
892 return oh;
893}
894
895/**
896 * _init_clocks - clk_get() all clocks associated with this hwmod
897 * @oh: struct omap_hwmod *
97d60162 898 * @data: not used; pass NULL
63c85238
PW
899 *
900 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
12b1fdb4
KH
901 * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
902 * the omap_hwmod has not yet been registered or if the clocks have
903 * already been initialized, 0 on success, or a non-zero error on
904 * failure.
63c85238 905 */
97d60162 906static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
907{
908 int ret = 0;
909
910 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
911 return -EINVAL;
912
913 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
914
915 ret |= _init_main_clk(oh);
916 ret |= _init_interface_clks(oh);
917 ret |= _init_opt_clks(oh);
918
f5c1f84b
BC
919 if (!ret)
920 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 921
f5c1f84b 922 return 0;
63c85238
PW
923}
924
925/**
926 * _wait_target_ready - wait for a module to leave slave idle
927 * @oh: struct omap_hwmod *
928 *
929 * Wait for a module @oh to leave slave idle. Returns 0 if the module
930 * does not have an IDLEST bit or if the module successfully leaves
931 * slave idle; otherwise, pass along the return value of the
932 * appropriate *_cm_wait_module_ready() function.
933 */
934static int _wait_target_ready(struct omap_hwmod *oh)
935{
936 struct omap_hwmod_ocp_if *os;
937 int ret;
938
939 if (!oh)
940 return -EINVAL;
941
942 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
943 return 0;
944
682fdc96 945 os = oh->slaves[oh->_mpu_port_index];
63c85238 946
33f7ec81 947 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
948 return 0;
949
950 /* XXX check module SIDLEMODE */
951
952 /* XXX check clock enable states */
953
954 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
955 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
956 oh->prcm.omap2.idlest_reg_id,
957 oh->prcm.omap2.idlest_idle_bit);
63c85238 958 } else if (cpu_is_omap44xx()) {
9a23dfe1 959 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
960 } else {
961 BUG();
962 };
963
964 return ret;
965}
966
5365efbe
BC
967/**
968 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
969 * @oh: struct omap_hwmod *
970 * @name: name of the reset line in the context of this hwmod
971 *
972 * Return the bit position of the reset line that match the
973 * input name. Return -ENOENT if not found.
974 */
975static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
976{
977 int i;
978
979 for (i = 0; i < oh->rst_lines_cnt; i++) {
980 const char *rst_line = oh->rst_lines[i].name;
981 if (!strcmp(rst_line, name)) {
982 u8 shift = oh->rst_lines[i].rst_shift;
983 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
984 oh->name, rst_line, shift);
985
986 return shift;
987 }
988 }
989
990 return -ENOENT;
991}
992
993/**
994 * _assert_hardreset - assert the HW reset line of submodules
995 * contained in the hwmod module.
996 * @oh: struct omap_hwmod *
997 * @name: name of the reset line to lookup and assert
998 *
999 * Some IP like dsp, ipu or iva contain processor that require
1000 * an HW reset line to be assert / deassert in order to enable fully
1001 * the IP.
1002 */
1003static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1004{
1005 u8 shift;
1006
1007 if (!oh)
1008 return -EINVAL;
1009
1010 shift = _lookup_hardreset(oh, name);
1011 if (IS_ERR_VALUE(shift))
1012 return shift;
1013
1014 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1015 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1016 shift);
1017 else if (cpu_is_omap44xx())
1018 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1019 shift);
1020 else
1021 return -EINVAL;
1022}
1023
1024/**
1025 * _deassert_hardreset - deassert the HW reset line of submodules contained
1026 * in the hwmod module.
1027 * @oh: struct omap_hwmod *
1028 * @name: name of the reset line to look up and deassert
1029 *
1030 * Some IP like dsp, ipu or iva contain processor that require
1031 * an HW reset line to be assert / deassert in order to enable fully
1032 * the IP.
1033 */
1034static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1035{
1036 u8 shift;
1037 int r;
1038
1039 if (!oh)
1040 return -EINVAL;
1041
1042 shift = _lookup_hardreset(oh, name);
1043 if (IS_ERR_VALUE(shift))
1044 return shift;
1045
1046 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1047 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1048 shift);
1049 else if (cpu_is_omap44xx())
1050 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1051 shift);
1052 else
1053 return -EINVAL;
1054
1055 if (r == -EBUSY)
1056 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1057
1058 return r;
1059}
1060
1061/**
1062 * _read_hardreset - read the HW reset line state of submodules
1063 * contained in the hwmod module
1064 * @oh: struct omap_hwmod *
1065 * @name: name of the reset line to look up and read
1066 *
1067 * Return the state of the reset line.
1068 */
1069static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1070{
1071 u8 shift;
1072
1073 if (!oh)
1074 return -EINVAL;
1075
1076 shift = _lookup_hardreset(oh, name);
1077 if (IS_ERR_VALUE(shift))
1078 return shift;
1079
1080 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1081 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1082 shift);
1083 } else if (cpu_is_omap44xx()) {
1084 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1085 shift);
1086 } else {
1087 return -EINVAL;
1088 }
1089}
1090
63c85238 1091/**
bd36179e 1092 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1093 * @oh: struct omap_hwmod *
1094 *
1095 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1096 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1097 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1098 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1099 *
1100 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1101 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1102 * use the SYSCONFIG softreset bit to provide the status.
1103 *
bd36179e
PW
1104 * Note that some IP like McBSP do have reset control but don't have
1105 * reset status.
63c85238 1106 */
bd36179e 1107static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1108{
96835af9 1109 u32 v;
6f8b7ff5 1110 int c = 0;
96835af9 1111 int ret = 0;
63c85238 1112
43b40992 1113 if (!oh->class->sysc ||
2cb06814 1114 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1115 return -EINVAL;
1116
1117 /* clocks must be on for this operation */
1118 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1119 pr_warning("omap_hwmod: %s: reset can only be entered from "
1120 "enabled state\n", oh->name);
63c85238
PW
1121 return -EINVAL;
1122 }
1123
96835af9
BC
1124 /* For some modules, all optionnal clocks need to be enabled as well */
1125 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1126 _enable_optional_clocks(oh);
1127
bd36179e 1128 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1129
1130 v = oh->_sysc_cache;
96835af9
BC
1131 ret = _set_softreset(oh, &v);
1132 if (ret)
1133 goto dis_opt_clks;
63c85238
PW
1134 _write_sysconfig(v, oh);
1135
2cb06814 1136 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1137 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1138 oh->class->sysc->syss_offs)
1139 & SYSS_RESETDONE_MASK),
1140 MAX_MODULE_SOFTRESET_WAIT, c);
1141 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1142 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1143 oh->class->sysc->sysc_offs)
1144 & SYSC_TYPE2_SOFTRESET_MASK),
1145 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1146
5365efbe 1147 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1148 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1149 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1150 else
5365efbe 1151 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1152
1153 /*
1154 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1155 * _wait_target_ready() or _reset()
1156 */
1157
96835af9
BC
1158 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1159
1160dis_opt_clks:
1161 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1162 _disable_optional_clocks(oh);
1163
1164 return ret;
63c85238
PW
1165}
1166
bd36179e
PW
1167/**
1168 * _reset - reset an omap_hwmod
1169 * @oh: struct omap_hwmod *
1170 *
1171 * Resets an omap_hwmod @oh. The default software reset mechanism for
1172 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1173 * bit. However, some hwmods cannot be reset via this method: some
1174 * are not targets and therefore have no OCP header registers to
1175 * access; others (like the IVA) have idiosyncratic reset sequences.
1176 * So for these relatively rare cases, custom reset code can be
1177 * supplied in the struct omap_hwmod_class .reset function pointer.
1178 * Passes along the return value from either _reset() or the custom
1179 * reset function - these must return -EINVAL if the hwmod cannot be
1180 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1181 * the module did not reset in time, or 0 upon success.
1182 */
1183static int _reset(struct omap_hwmod *oh)
1184{
1185 int ret;
1186
1187 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1188
1189 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1190
1191 return ret;
1192}
1193
63c85238 1194/**
dc6d1cda 1195 * _enable - enable an omap_hwmod
63c85238
PW
1196 * @oh: struct omap_hwmod *
1197 *
1198 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1199 * register target. Returns -EINVAL if the hwmod is in the wrong
1200 * state or passes along the return value of _wait_target_ready().
63c85238 1201 */
dc6d1cda 1202static int _enable(struct omap_hwmod *oh)
63c85238
PW
1203{
1204 int r;
1205
1206 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1207 oh->_state != _HWMOD_STATE_IDLE &&
1208 oh->_state != _HWMOD_STATE_DISABLED) {
1209 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1210 "from initialized, idle, or disabled state\n", oh->name);
1211 return -EINVAL;
1212 }
1213
1214 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1215
5365efbe
BC
1216 /*
1217 * If an IP contains only one HW reset line, then de-assert it in order
1218 * to allow to enable the clocks. Otherwise the PRCM will return
1219 * Intransition status, and the init will failed.
1220 */
1221 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1222 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1223 _deassert_hardreset(oh, oh->rst_lines[0].name);
1224
63c85238
PW
1225 /* XXX mux balls */
1226
1227 _add_initiator_dep(oh, mpu_oh);
1228 _enable_clocks(oh);
1229
63c85238 1230 r = _wait_target_ready(oh);
9a23dfe1 1231 if (!r) {
63c85238
PW
1232 oh->_state = _HWMOD_STATE_ENABLED;
1233
9a23dfe1
BC
1234 /* Access the sysconfig only if the target is ready */
1235 if (oh->class->sysc) {
1236 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1237 _update_sysc_cache(oh);
74ff3a68 1238 _enable_sysc(oh);
9a23dfe1
BC
1239 }
1240 } else {
1241 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1242 oh->name, r);
1243 }
1244
63c85238
PW
1245 return r;
1246}
1247
1248/**
dc6d1cda 1249 * _idle - idle an omap_hwmod
63c85238
PW
1250 * @oh: struct omap_hwmod *
1251 *
1252 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1253 * no further work. Returns -EINVAL if the hwmod is in the wrong
1254 * state or returns 0.
63c85238 1255 */
dc6d1cda 1256static int _idle(struct omap_hwmod *oh)
63c85238
PW
1257{
1258 if (oh->_state != _HWMOD_STATE_ENABLED) {
1259 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1260 "enabled state\n", oh->name);
1261 return -EINVAL;
1262 }
1263
1264 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1265
43b40992 1266 if (oh->class->sysc)
74ff3a68 1267 _idle_sysc(oh);
63c85238
PW
1268 _del_initiator_dep(oh, mpu_oh);
1269 _disable_clocks(oh);
1270
1271 oh->_state = _HWMOD_STATE_IDLE;
1272
1273 return 0;
1274}
1275
1276/**
1277 * _shutdown - shutdown an omap_hwmod
1278 * @oh: struct omap_hwmod *
1279 *
1280 * Shut down an omap_hwmod @oh. This should be called when the driver
1281 * used for the hwmod is removed or unloaded or if the driver is not
1282 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1283 * state or returns 0.
1284 */
1285static int _shutdown(struct omap_hwmod *oh)
1286{
e4dc8f50
PW
1287 int ret;
1288 u8 prev_state;
1289
63c85238
PW
1290 if (oh->_state != _HWMOD_STATE_IDLE &&
1291 oh->_state != _HWMOD_STATE_ENABLED) {
1292 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1293 "from idle, or enabled state\n", oh->name);
1294 return -EINVAL;
1295 }
1296
1297 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1298
e4dc8f50
PW
1299 if (oh->class->pre_shutdown) {
1300 prev_state = oh->_state;
1301 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1302 _enable(oh);
e4dc8f50
PW
1303 ret = oh->class->pre_shutdown(oh);
1304 if (ret) {
1305 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1306 _idle(oh);
e4dc8f50
PW
1307 return ret;
1308 }
1309 }
1310
43b40992 1311 if (oh->class->sysc)
74ff3a68 1312 _shutdown_sysc(oh);
3827f949 1313
5365efbe
BC
1314 /*
1315 * If an IP contains only one HW reset line, then assert it
1316 * before disabling the clocks and shutting down the IP.
1317 */
1318 if (oh->rst_lines_cnt == 1)
1319 _assert_hardreset(oh, oh->rst_lines[0].name);
1320
3827f949
BC
1321 /* clocks and deps are already disabled in idle */
1322 if (oh->_state == _HWMOD_STATE_ENABLED) {
1323 _del_initiator_dep(oh, mpu_oh);
1324 /* XXX what about the other system initiators here? dma, dsp */
1325 _disable_clocks(oh);
1326 }
63c85238
PW
1327 /* XXX Should this code also force-disable the optional clocks? */
1328
1329 /* XXX mux any associated balls to safe mode */
1330
1331 oh->_state = _HWMOD_STATE_DISABLED;
1332
1333 return 0;
1334}
1335
63c85238
PW
1336/**
1337 * _setup - do initial configuration of omap_hwmod
1338 * @oh: struct omap_hwmod *
1339 *
1340 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
2092e5cc
PW
1341 * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
1342 * wrong state or returns 0.
63c85238 1343 */
97d60162 1344static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1345{
9a23dfe1 1346 int i, r;
2092e5cc 1347 u8 postsetup_state;
97d60162 1348
63c85238
PW
1349 /* Set iclk autoidle mode */
1350 if (oh->slaves_cnt > 0) {
682fdc96
BC
1351 for (i = 0; i < oh->slaves_cnt; i++) {
1352 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1353 struct clk *c = os->_clk;
1354
4d3ae5a9 1355 if (!c)
63c85238
PW
1356 continue;
1357
1358 if (os->flags & OCPIF_SWSUP_IDLE) {
1359 /* XXX omap_iclk_deny_idle(c); */
1360 } else {
1361 /* XXX omap_iclk_allow_idle(c); */
1362 clk_enable(c);
1363 }
1364 }
1365 }
1366
1367 oh->_state = _HWMOD_STATE_INITIALIZED;
1368
5365efbe
BC
1369 /*
1370 * In the case of hwmod with hardreset that should not be
1371 * de-assert at boot time, we have to keep the module
1372 * initialized, because we cannot enable it properly with the
1373 * reset asserted. Exit without warning because that behavior is
1374 * expected.
1375 */
1376 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1377 return 0;
1378
dc6d1cda 1379 r = _enable(oh);
9a23dfe1
BC
1380 if (r) {
1381 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1382 oh->name, oh->_state);
1383 return 0;
1384 }
63c85238 1385
b835d014 1386 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1387 _reset(oh);
1388
b835d014 1389 /*
76e5589e 1390 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1391 * The _enable() function should be split to
76e5589e 1392 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1393 */
43b40992 1394 if (oh->class->sysc) {
b835d014 1395 _update_sysc_cache(oh);
74ff3a68 1396 _enable_sysc(oh);
b835d014
PW
1397 }
1398 }
63c85238 1399
2092e5cc
PW
1400 postsetup_state = oh->_postsetup_state;
1401 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1402 postsetup_state = _HWMOD_STATE_ENABLED;
1403
1404 /*
1405 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1406 * it should be set by the core code as a runtime flag during startup
1407 */
1408 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1409 (postsetup_state == _HWMOD_STATE_IDLE))
1410 postsetup_state = _HWMOD_STATE_ENABLED;
1411
1412 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1413 _idle(oh);
2092e5cc
PW
1414 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1415 _shutdown(oh);
1416 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1417 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1418 oh->name, postsetup_state);
63c85238
PW
1419
1420 return 0;
1421}
1422
1423
1424
1425/* Public functions */
1426
cc7a1d2a 1427u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
63c85238 1428{
cc7a1d2a
RN
1429 if (oh->flags & HWMOD_16BIT_REG)
1430 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1431 else
1432 return __raw_readl(oh->_mpu_rt_va + reg_offs);
63c85238
PW
1433}
1434
cc7a1d2a 1435void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
63c85238 1436{
cc7a1d2a
RN
1437 if (oh->flags & HWMOD_16BIT_REG)
1438 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1439 else
1440 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
63c85238
PW
1441}
1442
887adeac
PW
1443/**
1444 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1445 * @oh: struct omap_hwmod *
1446 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1447 *
1448 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1449 * local copy. Intended to be used by drivers that have some erratum
1450 * that requires direct manipulation of the SIDLEMODE bits. Returns
1451 * -EINVAL if @oh is null, or passes along the return value from
1452 * _set_slave_idlemode().
1453 *
1454 * XXX Does this function have any current users? If not, we should
1455 * remove it; it is better to let the rest of the hwmod code handle this.
1456 * Any users of this function should be scrutinized carefully.
1457 */
46273e6f
KH
1458int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1459{
1460 u32 v;
1461 int retval = 0;
1462
1463 if (!oh)
1464 return -EINVAL;
1465
1466 v = oh->_sysc_cache;
1467
1468 retval = _set_slave_idlemode(oh, idlemode, &v);
1469 if (!retval)
1470 _write_sysconfig(v, oh);
1471
1472 return retval;
1473}
1474
63c85238
PW
1475/**
1476 * omap_hwmod_register - register a struct omap_hwmod
1477 * @oh: struct omap_hwmod *
1478 *
43b40992
PW
1479 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1480 * already has been registered by the same name; -EINVAL if the
1481 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1482 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1483 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1484 * success.
63c85238
PW
1485 *
1486 * XXX The data should be copied into bootmem, so the original data
1487 * should be marked __initdata and freed after init. This would allow
1488 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1489 * that the copy process would be relatively complex due to the large number
1490 * of substructures.
1491 */
1492int omap_hwmod_register(struct omap_hwmod *oh)
1493{
1494 int ret, ms_id;
1495
43b40992
PW
1496 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1497 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1498 return -EINVAL;
1499
1500 mutex_lock(&omap_hwmod_mutex);
1501
1502 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1503
1504 if (_lookup(oh->name)) {
1505 ret = -EEXIST;
1506 goto ohr_unlock;
1507 }
1508
1509 ms_id = _find_mpu_port_index(oh);
1510 if (!IS_ERR_VALUE(ms_id)) {
1511 oh->_mpu_port_index = ms_id;
db2a60bf 1512 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
63c85238
PW
1513 } else {
1514 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1515 }
1516
1517 list_add_tail(&oh->node, &omap_hwmod_list);
1518
dc6d1cda 1519 spin_lock_init(&oh->_lock);
2092e5cc 1520
63c85238
PW
1521 oh->_state = _HWMOD_STATE_REGISTERED;
1522
1523 ret = 0;
1524
1525ohr_unlock:
1526 mutex_unlock(&omap_hwmod_mutex);
1527 return ret;
1528}
1529
1530/**
1531 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1532 * @name: name of the omap_hwmod to look up
1533 *
1534 * Given a @name of an omap_hwmod, return a pointer to the registered
1535 * struct omap_hwmod *, or NULL upon error.
1536 */
1537struct omap_hwmod *omap_hwmod_lookup(const char *name)
1538{
1539 struct omap_hwmod *oh;
1540
1541 if (!name)
1542 return NULL;
1543
1544 mutex_lock(&omap_hwmod_mutex);
1545 oh = _lookup(name);
1546 mutex_unlock(&omap_hwmod_mutex);
1547
1548 return oh;
1549}
1550
1551/**
1552 * omap_hwmod_for_each - call function for each registered omap_hwmod
1553 * @fn: pointer to a callback function
97d60162 1554 * @data: void * data to pass to callback function
63c85238
PW
1555 *
1556 * Call @fn for each registered omap_hwmod, passing @data to each
1557 * function. @fn must return 0 for success or any other value for
1558 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1559 * will stop and the non-zero return value will be passed to the
1560 * caller of omap_hwmod_for_each(). @fn is called with
1561 * omap_hwmod_for_each() held.
1562 */
97d60162
PW
1563int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1564 void *data)
63c85238
PW
1565{
1566 struct omap_hwmod *temp_oh;
1567 int ret;
1568
1569 if (!fn)
1570 return -EINVAL;
1571
1572 mutex_lock(&omap_hwmod_mutex);
1573 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1574 ret = (*fn)(temp_oh, data);
63c85238
PW
1575 if (ret)
1576 break;
1577 }
1578 mutex_unlock(&omap_hwmod_mutex);
1579
1580 return ret;
1581}
1582
1583
1584/**
1585 * omap_hwmod_init - init omap_hwmod code and register hwmods
1586 * @ohs: pointer to an array of omap_hwmods to register
1587 *
1588 * Intended to be called early in boot before the clock framework is
1589 * initialized. If @ohs is not null, will register all omap_hwmods
1590 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1591 * omap_hwmod_init() has already been called or 0 otherwise.
1592 */
1593int omap_hwmod_init(struct omap_hwmod **ohs)
1594{
1595 struct omap_hwmod *oh;
1596 int r;
1597
1598 if (inited)
1599 return -EINVAL;
1600
1601 inited = 1;
1602
1603 if (!ohs)
1604 return 0;
1605
1606 oh = *ohs;
1607 while (oh) {
1608 if (omap_chip_is(oh->omap_chip)) {
1609 r = omap_hwmod_register(oh);
1610 WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
1611 "%d\n", oh->name, r);
1612 }
1613 oh = *++ohs;
1614 }
1615
1616 return 0;
1617}
1618
1619/**
1620 * omap_hwmod_late_init - do some post-clock framework initialization
1621 *
1622 * Must be called after omap2_clk_init(). Resolves the struct clk names
1623 * to struct clk pointers for each registered omap_hwmod. Also calls
1624 * _setup() on each hwmod. Returns 0.
1625 */
2092e5cc 1626int omap_hwmod_late_init(void)
63c85238
PW
1627{
1628 int r;
1629
1630 /* XXX check return value */
97d60162 1631 r = omap_hwmod_for_each(_init_clocks, NULL);
63c85238
PW
1632 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1633
1634 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1635 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1636 MPU_INITIATOR_NAME);
1637
2092e5cc 1638 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1639
1640 return 0;
1641}
1642
1643/**
1644 * omap_hwmod_unregister - unregister an omap_hwmod
1645 * @oh: struct omap_hwmod *
1646 *
1647 * Unregisters a previously-registered omap_hwmod @oh. There's probably
1648 * no use case for this, so it is likely to be removed in a later version.
1649 *
1650 * XXX Free all of the bootmem-allocated structures here when that is
1651 * implemented. Make it clear that core code is the only code that is
1652 * expected to unregister modules.
1653 */
1654int omap_hwmod_unregister(struct omap_hwmod *oh)
1655{
1656 if (!oh)
1657 return -EINVAL;
1658
1659 pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
1660
1661 mutex_lock(&omap_hwmod_mutex);
db2a60bf 1662 iounmap(oh->_mpu_rt_va);
63c85238
PW
1663 list_del(&oh->node);
1664 mutex_unlock(&omap_hwmod_mutex);
1665
1666 return 0;
1667}
1668
1669/**
1670 * omap_hwmod_enable - enable an omap_hwmod
1671 * @oh: struct omap_hwmod *
1672 *
74ff3a68 1673 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1674 * Returns -EINVAL on error or passes along the return value from _enable().
1675 */
1676int omap_hwmod_enable(struct omap_hwmod *oh)
1677{
1678 int r;
dc6d1cda 1679 unsigned long flags;
63c85238
PW
1680
1681 if (!oh)
1682 return -EINVAL;
1683
dc6d1cda
PW
1684 spin_lock_irqsave(&oh->_lock, flags);
1685 r = _enable(oh);
1686 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1687
1688 return r;
1689}
1690
1691/**
1692 * omap_hwmod_idle - idle an omap_hwmod
1693 * @oh: struct omap_hwmod *
1694 *
74ff3a68 1695 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1696 * Returns -EINVAL on error or passes along the return value from _idle().
1697 */
1698int omap_hwmod_idle(struct omap_hwmod *oh)
1699{
dc6d1cda
PW
1700 unsigned long flags;
1701
63c85238
PW
1702 if (!oh)
1703 return -EINVAL;
1704
dc6d1cda
PW
1705 spin_lock_irqsave(&oh->_lock, flags);
1706 _idle(oh);
1707 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1708
1709 return 0;
1710}
1711
1712/**
1713 * omap_hwmod_shutdown - shutdown an omap_hwmod
1714 * @oh: struct omap_hwmod *
1715 *
74ff3a68 1716 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1717 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1718 * the return value from _shutdown().
1719 */
1720int omap_hwmod_shutdown(struct omap_hwmod *oh)
1721{
dc6d1cda
PW
1722 unsigned long flags;
1723
63c85238
PW
1724 if (!oh)
1725 return -EINVAL;
1726
dc6d1cda 1727 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1728 _shutdown(oh);
dc6d1cda 1729 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1730
1731 return 0;
1732}
1733
1734/**
1735 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1736 * @oh: struct omap_hwmod *oh
1737 *
1738 * Intended to be called by the omap_device code.
1739 */
1740int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1741{
dc6d1cda
PW
1742 unsigned long flags;
1743
1744 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1745 _enable_clocks(oh);
dc6d1cda 1746 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1747
1748 return 0;
1749}
1750
1751/**
1752 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1753 * @oh: struct omap_hwmod *oh
1754 *
1755 * Intended to be called by the omap_device code.
1756 */
1757int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1758{
dc6d1cda
PW
1759 unsigned long flags;
1760
1761 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1762 _disable_clocks(oh);
dc6d1cda 1763 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1764
1765 return 0;
1766}
1767
1768/**
1769 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1770 * @oh: struct omap_hwmod *oh
1771 *
1772 * Intended to be called by drivers and core code when all posted
1773 * writes to a device must complete before continuing further
1774 * execution (for example, after clearing some device IRQSTATUS
1775 * register bits)
1776 *
1777 * XXX what about targets with multiple OCP threads?
1778 */
1779void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1780{
1781 BUG_ON(!oh);
1782
43b40992 1783 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1784 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1785 "device configuration\n", oh->name);
1786 return;
1787 }
1788
1789 /*
1790 * Forces posted writes to complete on the OCP thread handling
1791 * register writes
1792 */
cc7a1d2a 1793 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1794}
1795
1796/**
1797 * omap_hwmod_reset - reset the hwmod
1798 * @oh: struct omap_hwmod *
1799 *
1800 * Under some conditions, a driver may wish to reset the entire device.
1801 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1802 * the return value from _reset().
63c85238
PW
1803 */
1804int omap_hwmod_reset(struct omap_hwmod *oh)
1805{
1806 int r;
dc6d1cda 1807 unsigned long flags;
63c85238 1808
9b579114 1809 if (!oh)
63c85238
PW
1810 return -EINVAL;
1811
dc6d1cda 1812 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1813 r = _reset(oh);
dc6d1cda 1814 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1815
1816 return r;
1817}
1818
1819/**
1820 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1821 * @oh: struct omap_hwmod *
1822 * @res: pointer to the first element of an array of struct resource to fill
1823 *
1824 * Count the number of struct resource array elements necessary to
1825 * contain omap_hwmod @oh resources. Intended to be called by code
1826 * that registers omap_devices. Intended to be used to determine the
1827 * size of a dynamically-allocated struct resource array, before
1828 * calling omap_hwmod_fill_resources(). Returns the number of struct
1829 * resource array elements needed.
1830 *
1831 * XXX This code is not optimized. It could attempt to merge adjacent
1832 * resource IDs.
1833 *
1834 */
1835int omap_hwmod_count_resources(struct omap_hwmod *oh)
1836{
1837 int ret, i;
1838
9ee9fff9 1839 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1840
1841 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1842 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1843
1844 return ret;
1845}
1846
1847/**
1848 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1849 * @oh: struct omap_hwmod *
1850 * @res: pointer to the first element of an array of struct resource to fill
1851 *
1852 * Fill the struct resource array @res with resource data from the
1853 * omap_hwmod @oh. Intended to be called by code that registers
1854 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1855 * number of array elements filled.
1856 */
1857int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1858{
1859 int i, j;
1860 int r = 0;
1861
1862 /* For each IRQ, DMA, memory area, fill in array.*/
1863
1864 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1865 (res + r)->name = (oh->mpu_irqs + i)->name;
1866 (res + r)->start = (oh->mpu_irqs + i)->irq;
1867 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1868 (res + r)->flags = IORESOURCE_IRQ;
1869 r++;
1870 }
1871
9ee9fff9
BC
1872 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1873 (res + r)->name = (oh->sdma_reqs + i)->name;
1874 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1875 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
1876 (res + r)->flags = IORESOURCE_DMA;
1877 r++;
1878 }
1879
1880 for (i = 0; i < oh->slaves_cnt; i++) {
1881 struct omap_hwmod_ocp_if *os;
1882
682fdc96 1883 os = oh->slaves[i];
63c85238
PW
1884
1885 for (j = 0; j < os->addr_cnt; j++) {
1886 (res + r)->start = (os->addr + j)->pa_start;
1887 (res + r)->end = (os->addr + j)->pa_end;
1888 (res + r)->flags = IORESOURCE_MEM;
1889 r++;
1890 }
1891 }
1892
1893 return r;
1894}
1895
1896/**
1897 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1898 * @oh: struct omap_hwmod *
1899 *
1900 * Return the powerdomain pointer associated with the OMAP module
1901 * @oh's main clock. If @oh does not have a main clk, return the
1902 * powerdomain associated with the interface clock associated with the
1903 * module's MPU port. (XXX Perhaps this should use the SDMA port
1904 * instead?) Returns NULL on error, or a struct powerdomain * on
1905 * success.
1906 */
1907struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1908{
1909 struct clk *c;
1910
1911 if (!oh)
1912 return NULL;
1913
1914 if (oh->_clk) {
1915 c = oh->_clk;
1916 } else {
1917 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1918 return NULL;
1919 c = oh->slaves[oh->_mpu_port_index]->_clk;
1920 }
1921
d5647c18
TG
1922 if (!c->clkdm)
1923 return NULL;
1924
63c85238
PW
1925 return c->clkdm->pwrdm.ptr;
1926
1927}
1928
db2a60bf
PW
1929/**
1930 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1931 * @oh: struct omap_hwmod *
1932 *
1933 * Returns the virtual address corresponding to the beginning of the
1934 * module's register target, in the address range that is intended to
1935 * be used by the MPU. Returns the virtual address upon success or NULL
1936 * upon error.
1937 */
1938void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1939{
1940 if (!oh)
1941 return NULL;
1942
1943 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1944 return NULL;
1945
1946 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1947 return NULL;
1948
1949 return oh->_mpu_rt_va;
1950}
1951
63c85238
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1952/**
1953 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1954 * @oh: struct omap_hwmod *
1955 * @init_oh: struct omap_hwmod * (initiator)
1956 *
1957 * Add a sleep dependency between the initiator @init_oh and @oh.
1958 * Intended to be called by DSP/Bridge code via platform_data for the
1959 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1960 * code needs to add/del initiator dependencies dynamically
1961 * before/after accessing a device. Returns the return value from
1962 * _add_initiator_dep().
1963 *
1964 * XXX Keep a usecount in the clockdomain code
1965 */
1966int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1967 struct omap_hwmod *init_oh)
1968{
1969 return _add_initiator_dep(oh, init_oh);
1970}
1971
1972/*
1973 * XXX what about functions for drivers to save/restore ocp_sysconfig
1974 * for context save/restore operations?
1975 */
1976
1977/**
1978 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1979 * @oh: struct omap_hwmod *
1980 * @init_oh: struct omap_hwmod * (initiator)
1981 *
1982 * Remove a sleep dependency between the initiator @init_oh and @oh.
1983 * Intended to be called by DSP/Bridge code via platform_data for the
1984 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1985 * code needs to add/del initiator dependencies dynamically
1986 * before/after accessing a device. Returns the return value from
1987 * _del_initiator_dep().
1988 *
1989 * XXX Keep a usecount in the clockdomain code
1990 */
1991int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1992 struct omap_hwmod *init_oh)
1993{
1994 return _del_initiator_dep(oh, init_oh);
1995}
1996
63c85238
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1997/**
1998 * omap_hwmod_enable_wakeup - allow device to wake up the system
1999 * @oh: struct omap_hwmod *
2000 *
2001 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2002 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2003 * registers to cause the PRCM to receive wakeup events from the
2004 * module. Does not set any wakeup routing registers beyond this
2005 * point - if the module is to wake up any other module or subsystem,
2006 * that must be set separately. Called by omap_device code. Returns
2007 * -EINVAL on error or 0 upon success.
2008 */
2009int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2010{
dc6d1cda
PW
2011 unsigned long flags;
2012
43b40992
PW
2013 if (!oh->class->sysc ||
2014 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2015 return -EINVAL;
2016
dc6d1cda 2017 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2018 _enable_wakeup(oh);
dc6d1cda 2019 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2020
2021 return 0;
2022}
2023
2024/**
2025 * omap_hwmod_disable_wakeup - prevent device from waking the system
2026 * @oh: struct omap_hwmod *
2027 *
2028 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2029 * from sending wakeups to the PRCM. Eventually this should clear
2030 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2031 * from the module. Does not set any wakeup routing registers beyond
2032 * this point - if the module is to wake up any other module or
2033 * subsystem, that must be set separately. Called by omap_device
2034 * code. Returns -EINVAL on error or 0 upon success.
2035 */
2036int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2037{
dc6d1cda
PW
2038 unsigned long flags;
2039
43b40992
PW
2040 if (!oh->class->sysc ||
2041 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2042 return -EINVAL;
2043
dc6d1cda 2044 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2045 _disable_wakeup(oh);
dc6d1cda 2046 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2047
2048 return 0;
2049}
43b40992 2050
aee48e3c
PW
2051/**
2052 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2053 * contained in the hwmod module.
2054 * @oh: struct omap_hwmod *
2055 * @name: name of the reset line to lookup and assert
2056 *
2057 * Some IP like dsp, ipu or iva contain processor that require
2058 * an HW reset line to be assert / deassert in order to enable fully
2059 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2060 * yet supported on this OMAP; otherwise, passes along the return value
2061 * from _assert_hardreset().
2062 */
2063int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2064{
2065 int ret;
dc6d1cda 2066 unsigned long flags;
aee48e3c
PW
2067
2068 if (!oh)
2069 return -EINVAL;
2070
dc6d1cda 2071 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2072 ret = _assert_hardreset(oh, name);
dc6d1cda 2073 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2074
2075 return ret;
2076}
2077
2078/**
2079 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2080 * contained in the hwmod module.
2081 * @oh: struct omap_hwmod *
2082 * @name: name of the reset line to look up and deassert
2083 *
2084 * Some IP like dsp, ipu or iva contain processor that require
2085 * an HW reset line to be assert / deassert in order to enable fully
2086 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2087 * yet supported on this OMAP; otherwise, passes along the return value
2088 * from _deassert_hardreset().
2089 */
2090int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2091{
2092 int ret;
dc6d1cda 2093 unsigned long flags;
aee48e3c
PW
2094
2095 if (!oh)
2096 return -EINVAL;
2097
dc6d1cda 2098 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2099 ret = _deassert_hardreset(oh, name);
dc6d1cda 2100 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2101
2102 return ret;
2103}
2104
2105/**
2106 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2107 * contained in the hwmod module
2108 * @oh: struct omap_hwmod *
2109 * @name: name of the reset line to look up and read
2110 *
2111 * Return the current state of the hwmod @oh's reset line named @name:
2112 * returns -EINVAL upon parameter error or if this operation
2113 * is unsupported on the current OMAP; otherwise, passes along the return
2114 * value from _read_hardreset().
2115 */
2116int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2117{
2118 int ret;
dc6d1cda 2119 unsigned long flags;
aee48e3c
PW
2120
2121 if (!oh)
2122 return -EINVAL;
2123
dc6d1cda 2124 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2125 ret = _read_hardreset(oh, name);
dc6d1cda 2126 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2127
2128 return ret;
2129}
2130
2131
43b40992
PW
2132/**
2133 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2134 * @classname: struct omap_hwmod_class name to search for
2135 * @fn: callback function pointer to call for each hwmod in class @classname
2136 * @user: arbitrary context data to pass to the callback function
2137 *
2138 * For each omap_hwmod of class @classname, call @fn. Takes
2139 * omap_hwmod_mutex to prevent the hwmod list from changing during the
2140 * iteration. If the callback function returns something other than
2141 * zero, the iterator is terminated, and the callback function's return
2142 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2143 * if @classname or @fn are NULL, or passes back the error code from @fn.
2144 */
2145int omap_hwmod_for_each_by_class(const char *classname,
2146 int (*fn)(struct omap_hwmod *oh,
2147 void *user),
2148 void *user)
2149{
2150 struct omap_hwmod *temp_oh;
2151 int ret = 0;
2152
2153 if (!classname || !fn)
2154 return -EINVAL;
2155
2156 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2157 __func__, classname);
2158
2159 mutex_lock(&omap_hwmod_mutex);
2160
2161 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2162 if (!strcmp(temp_oh->class->name, classname)) {
2163 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2164 __func__, temp_oh->name);
2165 ret = (*fn)(temp_oh, user);
2166 if (ret)
2167 break;
2168 }
2169 }
2170
2171 mutex_unlock(&omap_hwmod_mutex);
2172
2173 if (ret)
2174 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2175 __func__, ret);
2176
2177 return ret;
2178}
2179
2092e5cc
PW
2180/**
2181 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2182 * @oh: struct omap_hwmod *
2183 * @state: state that _setup() should leave the hwmod in
2184 *
2185 * Sets the hwmod state that @oh will enter at the end of _setup() (called by
2186 * omap_hwmod_late_init()). Only valid to call between calls to
2187 * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
2188 * -EINVAL if there is a problem with the arguments or if the hwmod is
2189 * in the wrong state.
2190 */
2191int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2192{
2193 int ret;
dc6d1cda 2194 unsigned long flags;
2092e5cc
PW
2195
2196 if (!oh)
2197 return -EINVAL;
2198
2199 if (state != _HWMOD_STATE_DISABLED &&
2200 state != _HWMOD_STATE_ENABLED &&
2201 state != _HWMOD_STATE_IDLE)
2202 return -EINVAL;
2203
dc6d1cda 2204 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2205
2206 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2207 ret = -EINVAL;
2208 goto ohsps_unlock;
2209 }
2210
2211 oh->_postsetup_state = state;
2212 ret = 0;
2213
2214ohsps_unlock:
dc6d1cda 2215 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2216
2217 return ret;
2218}