arm/omap: remove duplicated include
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
db2a60bf 4 * Copyright (C) 2009-2010 Nokia Corporation
63c85238 5 *
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
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16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
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27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
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112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - pin mux handling
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
63c85238 138
6f8b7ff5 139#include <plat/common.h>
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140#include <plat/cpu.h>
141#include <plat/clockdomain.h>
142#include <plat/powerdomain.h>
143#include <plat/clock.h>
144#include <plat/omap_hwmod.h>
5365efbe 145#include <plat/prcm.h>
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146
147#include "cm.h"
5365efbe 148#include "prm.h"
63c85238 149
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150/* Maximum microseconds to wait for OMAP module to softreset */
151#define MAX_MODULE_SOFTRESET_WAIT 10000
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152
153/* Name of the OMAP hwmod for the MPU */
5c2c0296 154#define MPU_INITIATOR_NAME "mpu"
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155
156/* omap_hwmod_list contains all registered struct omap_hwmods */
157static LIST_HEAD(omap_hwmod_list);
158
159static DEFINE_MUTEX(omap_hwmod_mutex);
160
161/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
162static struct omap_hwmod *mpu_oh;
163
164/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
165static u8 inited;
166
167
168/* Private functions */
169
170/**
171 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
172 * @oh: struct omap_hwmod *
173 *
174 * Load the current value of the hwmod OCP_SYSCONFIG register into the
175 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
176 * OCP_SYSCONFIG register or 0 upon success.
177 */
178static int _update_sysc_cache(struct omap_hwmod *oh)
179{
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180 if (!oh->class->sysc) {
181 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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182 return -EINVAL;
183 }
184
185 /* XXX ensure module interface clock is up */
186
43b40992 187 oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238 188
43b40992 189 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 190 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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191
192 return 0;
193}
194
195/**
196 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
197 * @v: OCP_SYSCONFIG value to write
198 * @oh: struct omap_hwmod *
199 *
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200 * Write @v into the module class' OCP_SYSCONFIG register, if it has
201 * one. No return value.
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202 */
203static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
204{
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205 if (!oh->class->sysc) {
206 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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207 return;
208 }
209
210 /* XXX ensure module interface clock is up */
211
212 if (oh->_sysc_cache != v) {
213 oh->_sysc_cache = v;
43b40992 214 omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs);
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215 }
216}
217
218/**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
228static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230{
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231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
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234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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236 return -EINVAL;
237
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238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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240 return -EINVAL;
241 }
242
43b40992 243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
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248
249 return 0;
250}
251
252/**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
262static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263{
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264 u32 sidle_mask;
265 u8 sidle_shift;
266
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267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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269 return -EINVAL;
270
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271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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273 return -EINVAL;
274 }
275
43b40992 276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
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281
282 return 0;
283}
284
285/**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
296static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297{
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298 u32 clkact_mask;
299 u8 clkact_shift;
300
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301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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303 return -EINVAL;
304
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305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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307 return -EINVAL;
308 }
309
43b40992 310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
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315
316 return 0;
317}
318
319/**
320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
327static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328{
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329 u32 softrst_mask;
330
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331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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333 return -EINVAL;
334
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335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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337 return -EINVAL;
338 }
339
43b40992 340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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341
342 *v |= softrst_mask;
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343
344 return 0;
345}
346
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347/**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
360static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362{
358f0e63
TG
363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
43b40992
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366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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368 return -EINVAL;
369
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370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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372 return -EINVAL;
373 }
374
43b40992 375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
358f0e63
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376 autoidle_mask = (0x3 << autoidle_shift);
377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
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380
381 return 0;
382}
383
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384/**
385 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
386 * @oh: struct omap_hwmod *
387 *
388 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
389 * upon error or 0 upon success.
390 */
391static int _enable_wakeup(struct omap_hwmod *oh)
392{
358f0e63 393 u32 v, wakeup_mask;
63c85238 394
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395 if (!oh->class->sysc ||
396 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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397 return -EINVAL;
398
43b40992
PW
399 if (!oh->class->sysc->sysc_fields) {
400 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
401 return -EINVAL;
402 }
403
43b40992 404 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 405
63c85238 406 v = oh->_sysc_cache;
358f0e63 407 v |= wakeup_mask;
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408 _write_sysconfig(v, oh);
409
410 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
411
412 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
413
414 return 0;
415}
416
417/**
418 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
419 * @oh: struct omap_hwmod *
420 *
421 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
422 * upon error or 0 upon success.
423 */
424static int _disable_wakeup(struct omap_hwmod *oh)
425{
358f0e63 426 u32 v, wakeup_mask;
63c85238 427
43b40992
PW
428 if (!oh->class->sysc ||
429 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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430 return -EINVAL;
431
43b40992
PW
432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
43b40992 437 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 438
63c85238 439 v = oh->_sysc_cache;
358f0e63 440 v &= ~wakeup_mask;
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441 _write_sysconfig(v, oh);
442
443 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
444
445 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
446
447 return 0;
448}
449
450/**
451 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
452 * @oh: struct omap_hwmod *
453 *
454 * Prevent the hardware module @oh from entering idle while the
455 * hardare module initiator @init_oh is active. Useful when a module
456 * will be accessed by a particular initiator (e.g., if a module will
457 * be accessed by the IVA, there should be a sleepdep between the IVA
458 * initiator and the module). Only applies to modules in smart-idle
459 * mode. Returns -EINVAL upon error or passes along
55ed9694 460 * clkdm_add_sleepdep() value upon success.
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461 */
462static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
463{
464 if (!oh->_clk)
465 return -EINVAL;
466
55ed9694 467 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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468}
469
470/**
471 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
472 * @oh: struct omap_hwmod *
473 *
474 * Allow the hardware module @oh to enter idle while the hardare
475 * module initiator @init_oh is active. Useful when a module will not
476 * be accessed by a particular initiator (e.g., if a module will not
477 * be accessed by the IVA, there should be no sleepdep between the IVA
478 * initiator and the module). Only applies to modules in smart-idle
479 * mode. Returns -EINVAL upon error or passes along
55ed9694 480 * clkdm_del_sleepdep() value upon success.
63c85238
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481 */
482static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
483{
484 if (!oh->_clk)
485 return -EINVAL;
486
55ed9694 487 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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488}
489
490/**
491 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
492 * @oh: struct omap_hwmod *
493 *
494 * Called from _init_clocks(). Populates the @oh _clk (main
495 * functional clock pointer) if a main_clk is present. Returns 0 on
496 * success or -EINVAL on error.
497 */
498static int _init_main_clk(struct omap_hwmod *oh)
499{
63c85238
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500 int ret = 0;
501
50ebdac2 502 if (!oh->main_clk)
63c85238
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503 return 0;
504
63403384 505 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 506 if (!oh->_clk) {
20383d82
BC
507 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
508 oh->name, oh->main_clk);
63403384 509 return -EINVAL;
dc75925d 510 }
63c85238 511
63403384
BC
512 if (!oh->_clk->clkdm)
513 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
514 oh->main_clk, oh->_clk->name);
81d7c6ff 515
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516 return ret;
517}
518
519/**
887adeac 520 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
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521 * @oh: struct omap_hwmod *
522 *
523 * Called from _init_clocks(). Populates the @oh OCP slave interface
524 * clock pointers. Returns 0 on success or -EINVAL on error.
525 */
526static int _init_interface_clks(struct omap_hwmod *oh)
527{
63c85238
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528 struct clk *c;
529 int i;
530 int ret = 0;
531
532 if (oh->slaves_cnt == 0)
533 return 0;
534
682fdc96
BC
535 for (i = 0; i < oh->slaves_cnt; i++) {
536 struct omap_hwmod_ocp_if *os = oh->slaves[i];
537
50ebdac2 538 if (!os->clk)
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539 continue;
540
50ebdac2 541 c = omap_clk_get_by_name(os->clk);
dc75925d 542 if (!c) {
20383d82
BC
543 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
544 oh->name, os->clk);
63c85238 545 ret = -EINVAL;
dc75925d 546 }
63c85238
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547 os->_clk = c;
548 }
549
550 return ret;
551}
552
553/**
554 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
555 * @oh: struct omap_hwmod *
556 *
557 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
558 * clock pointers. Returns 0 on success or -EINVAL on error.
559 */
560static int _init_opt_clks(struct omap_hwmod *oh)
561{
562 struct omap_hwmod_opt_clk *oc;
563 struct clk *c;
564 int i;
565 int ret = 0;
566
567 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 568 c = omap_clk_get_by_name(oc->clk);
dc75925d 569 if (!c) {
20383d82
BC
570 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
571 oh->name, oc->clk);
63c85238 572 ret = -EINVAL;
dc75925d 573 }
63c85238
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574 oc->_clk = c;
575 }
576
577 return ret;
578}
579
580/**
581 * _enable_clocks - enable hwmod main clock and interface clocks
582 * @oh: struct omap_hwmod *
583 *
584 * Enables all clocks necessary for register reads and writes to succeed
585 * on the hwmod @oh. Returns 0.
586 */
587static int _enable_clocks(struct omap_hwmod *oh)
588{
63c85238
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589 int i;
590
591 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
592
4d3ae5a9 593 if (oh->_clk)
63c85238
PW
594 clk_enable(oh->_clk);
595
596 if (oh->slaves_cnt > 0) {
682fdc96
BC
597 for (i = 0; i < oh->slaves_cnt; i++) {
598 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
599 struct clk *c = os->_clk;
600
4d3ae5a9 601 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
602 clk_enable(c);
603 }
604 }
605
606 /* The opt clocks are controlled by the device driver. */
607
608 return 0;
609}
610
611/**
612 * _disable_clocks - disable hwmod main clock and interface clocks
613 * @oh: struct omap_hwmod *
614 *
615 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
616 */
617static int _disable_clocks(struct omap_hwmod *oh)
618{
63c85238
PW
619 int i;
620
621 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
622
4d3ae5a9 623 if (oh->_clk)
63c85238
PW
624 clk_disable(oh->_clk);
625
626 if (oh->slaves_cnt > 0) {
682fdc96
BC
627 for (i = 0; i < oh->slaves_cnt; i++) {
628 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
629 struct clk *c = os->_clk;
630
4d3ae5a9 631 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
632 clk_disable(c);
633 }
634 }
635
636 /* The opt clocks are controlled by the device driver. */
637
638 return 0;
639}
640
96835af9
BC
641static void _enable_optional_clocks(struct omap_hwmod *oh)
642{
643 struct omap_hwmod_opt_clk *oc;
644 int i;
645
646 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
647
648 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
649 if (oc->_clk) {
650 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
651 oc->_clk->name);
652 clk_enable(oc->_clk);
653 }
654}
655
656static void _disable_optional_clocks(struct omap_hwmod *oh)
657{
658 struct omap_hwmod_opt_clk *oc;
659 int i;
660
661 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
662
663 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
664 if (oc->_clk) {
665 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
666 oc->_clk->name);
667 clk_disable(oc->_clk);
668 }
669}
670
63c85238
PW
671/**
672 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
673 * @oh: struct omap_hwmod *
674 *
675 * Returns the array index of the OCP slave port that the MPU
676 * addresses the device on, or -EINVAL upon error or not found.
677 */
678static int _find_mpu_port_index(struct omap_hwmod *oh)
679{
63c85238
PW
680 int i;
681 int found = 0;
682
683 if (!oh || oh->slaves_cnt == 0)
684 return -EINVAL;
685
682fdc96
BC
686 for (i = 0; i < oh->slaves_cnt; i++) {
687 struct omap_hwmod_ocp_if *os = oh->slaves[i];
688
63c85238
PW
689 if (os->user & OCP_USER_MPU) {
690 found = 1;
691 break;
692 }
693 }
694
695 if (found)
696 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
697 oh->name, i);
698 else
699 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
700 oh->name);
701
702 return (found) ? i : -EINVAL;
703}
704
705/**
706 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
707 * @oh: struct omap_hwmod *
708 *
709 * Return the virtual address of the base of the register target of
710 * device @oh, or NULL on error.
711 */
712static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
713{
714 struct omap_hwmod_ocp_if *os;
715 struct omap_hwmod_addr_space *mem;
716 int i;
717 int found = 0;
986a13f5 718 void __iomem *va_start;
63c85238
PW
719
720 if (!oh || oh->slaves_cnt == 0)
721 return NULL;
722
682fdc96 723 os = oh->slaves[index];
63c85238
PW
724
725 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
726 if (mem->flags & ADDR_TYPE_RT) {
727 found = 1;
728 break;
729 }
730 }
731
986a13f5
TL
732 if (found) {
733 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
734 if (!va_start) {
735 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
736 return NULL;
737 }
63c85238 738 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
739 oh->name, va_start);
740 } else {
63c85238
PW
741 pr_debug("omap_hwmod: %s: no MPU register target found\n",
742 oh->name);
986a13f5 743 }
63c85238 744
986a13f5 745 return (found) ? va_start : NULL;
63c85238
PW
746}
747
748/**
74ff3a68 749 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
750 * @oh: struct omap_hwmod *
751 *
752 * If module is marked as SWSUP_SIDLE, force the module out of slave
753 * idle; otherwise, configure it for smart-idle. If module is marked
754 * as SWSUP_MSUSPEND, force the module out of master standby;
755 * otherwise, configure it for smart-standby. No return value.
756 */
74ff3a68 757static void _enable_sysc(struct omap_hwmod *oh)
63c85238 758{
43b40992 759 u8 idlemode, sf;
63c85238
PW
760 u32 v;
761
43b40992 762 if (!oh->class->sysc)
63c85238
PW
763 return;
764
765 v = oh->_sysc_cache;
43b40992 766 sf = oh->class->sysc->sysc_flags;
63c85238 767
43b40992 768 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
769 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
770 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
771 _set_slave_idlemode(oh, idlemode, &v);
772 }
773
43b40992 774 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
775 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
776 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
777 _set_master_standbymode(oh, idlemode, &v);
778 }
779
a16b1f7f
PW
780 /*
781 * XXX The clock framework should handle this, by
782 * calling into this code. But this must wait until the
783 * clock structures are tagged with omap_hwmod entries
784 */
43b40992
PW
785 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
786 (sf & SYSC_HAS_CLOCKACTIVITY))
787 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238
PW
788
789 _write_sysconfig(v, oh);
9980ce53
RN
790
791 /* If slave is in SMARTIDLE, also enable wakeup */
792 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
793 _enable_wakeup(oh);
78f26e87
HH
794
795 /*
796 * Set the autoidle bit only after setting the smartidle bit
797 * Setting this will not have any impact on the other modules.
798 */
799 if (sf & SYSC_HAS_AUTOIDLE) {
800 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
801 0 : 1;
802 _set_module_autoidle(oh, idlemode, &v);
803 _write_sysconfig(v, oh);
804 }
63c85238
PW
805}
806
807/**
74ff3a68 808 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
809 * @oh: struct omap_hwmod *
810 *
811 * If module is marked as SWSUP_SIDLE, force the module into slave
812 * idle; otherwise, configure it for smart-idle. If module is marked
813 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
814 * configure it for smart-standby. No return value.
815 */
74ff3a68 816static void _idle_sysc(struct omap_hwmod *oh)
63c85238 817{
43b40992 818 u8 idlemode, sf;
63c85238
PW
819 u32 v;
820
43b40992 821 if (!oh->class->sysc)
63c85238
PW
822 return;
823
824 v = oh->_sysc_cache;
43b40992 825 sf = oh->class->sysc->sysc_flags;
63c85238 826
43b40992 827 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
828 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
829 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
830 _set_slave_idlemode(oh, idlemode, &v);
831 }
832
43b40992 833 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
834 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
835 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
836 _set_master_standbymode(oh, idlemode, &v);
837 }
838
839 _write_sysconfig(v, oh);
840}
841
842/**
74ff3a68 843 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
844 * @oh: struct omap_hwmod *
845 *
846 * Force the module into slave idle and master suspend. No return
847 * value.
848 */
74ff3a68 849static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
850{
851 u32 v;
43b40992 852 u8 sf;
63c85238 853
43b40992 854 if (!oh->class->sysc)
63c85238
PW
855 return;
856
857 v = oh->_sysc_cache;
43b40992 858 sf = oh->class->sysc->sysc_flags;
63c85238 859
43b40992 860 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
861 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
862
43b40992 863 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
864 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
865
43b40992 866 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 867 _set_module_autoidle(oh, 1, &v);
63c85238
PW
868
869 _write_sysconfig(v, oh);
870}
871
872/**
873 * _lookup - find an omap_hwmod by name
874 * @name: find an omap_hwmod by name
875 *
876 * Return a pointer to an omap_hwmod by name, or NULL if not found.
877 * Caller must hold omap_hwmod_mutex.
878 */
879static struct omap_hwmod *_lookup(const char *name)
880{
881 struct omap_hwmod *oh, *temp_oh;
882
883 oh = NULL;
884
885 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
886 if (!strcmp(name, temp_oh->name)) {
887 oh = temp_oh;
888 break;
889 }
890 }
891
892 return oh;
893}
894
895/**
896 * _init_clocks - clk_get() all clocks associated with this hwmod
897 * @oh: struct omap_hwmod *
97d60162 898 * @data: not used; pass NULL
63c85238
PW
899 *
900 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
12b1fdb4
KH
901 * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
902 * the omap_hwmod has not yet been registered or if the clocks have
903 * already been initialized, 0 on success, or a non-zero error on
904 * failure.
63c85238 905 */
97d60162 906static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
907{
908 int ret = 0;
909
910 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
911 return -EINVAL;
912
913 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
914
915 ret |= _init_main_clk(oh);
916 ret |= _init_interface_clks(oh);
917 ret |= _init_opt_clks(oh);
918
f5c1f84b
BC
919 if (!ret)
920 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 921
f5c1f84b 922 return 0;
63c85238
PW
923}
924
925/**
926 * _wait_target_ready - wait for a module to leave slave idle
927 * @oh: struct omap_hwmod *
928 *
929 * Wait for a module @oh to leave slave idle. Returns 0 if the module
930 * does not have an IDLEST bit or if the module successfully leaves
931 * slave idle; otherwise, pass along the return value of the
932 * appropriate *_cm_wait_module_ready() function.
933 */
934static int _wait_target_ready(struct omap_hwmod *oh)
935{
936 struct omap_hwmod_ocp_if *os;
937 int ret;
938
939 if (!oh)
940 return -EINVAL;
941
942 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
943 return 0;
944
682fdc96 945 os = oh->slaves[oh->_mpu_port_index];
63c85238 946
33f7ec81 947 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
948 return 0;
949
950 /* XXX check module SIDLEMODE */
951
952 /* XXX check clock enable states */
953
954 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
955 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
956 oh->prcm.omap2.idlest_reg_id,
957 oh->prcm.omap2.idlest_idle_bit);
63c85238 958 } else if (cpu_is_omap44xx()) {
9a23dfe1 959 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
960 } else {
961 BUG();
962 };
963
964 return ret;
965}
966
5365efbe
BC
967/**
968 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
969 * @oh: struct omap_hwmod *
970 * @name: name of the reset line in the context of this hwmod
971 *
972 * Return the bit position of the reset line that match the
973 * input name. Return -ENOENT if not found.
974 */
975static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
976{
977 int i;
978
979 for (i = 0; i < oh->rst_lines_cnt; i++) {
980 const char *rst_line = oh->rst_lines[i].name;
981 if (!strcmp(rst_line, name)) {
982 u8 shift = oh->rst_lines[i].rst_shift;
983 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
984 oh->name, rst_line, shift);
985
986 return shift;
987 }
988 }
989
990 return -ENOENT;
991}
992
993/**
994 * _assert_hardreset - assert the HW reset line of submodules
995 * contained in the hwmod module.
996 * @oh: struct omap_hwmod *
997 * @name: name of the reset line to lookup and assert
998 *
999 * Some IP like dsp, ipu or iva contain processor that require
1000 * an HW reset line to be assert / deassert in order to enable fully
1001 * the IP.
1002 */
1003static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1004{
1005 u8 shift;
1006
1007 if (!oh)
1008 return -EINVAL;
1009
1010 shift = _lookup_hardreset(oh, name);
1011 if (IS_ERR_VALUE(shift))
1012 return shift;
1013
1014 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1015 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1016 shift);
1017 else if (cpu_is_omap44xx())
1018 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1019 shift);
1020 else
1021 return -EINVAL;
1022}
1023
1024/**
1025 * _deassert_hardreset - deassert the HW reset line of submodules contained
1026 * in the hwmod module.
1027 * @oh: struct omap_hwmod *
1028 * @name: name of the reset line to look up and deassert
1029 *
1030 * Some IP like dsp, ipu or iva contain processor that require
1031 * an HW reset line to be assert / deassert in order to enable fully
1032 * the IP.
1033 */
1034static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1035{
1036 u8 shift;
1037 int r;
1038
1039 if (!oh)
1040 return -EINVAL;
1041
1042 shift = _lookup_hardreset(oh, name);
1043 if (IS_ERR_VALUE(shift))
1044 return shift;
1045
1046 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1047 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1048 shift);
1049 else if (cpu_is_omap44xx())
1050 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1051 shift);
1052 else
1053 return -EINVAL;
1054
1055 if (r == -EBUSY)
1056 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1057
1058 return r;
1059}
1060
1061/**
1062 * _read_hardreset - read the HW reset line state of submodules
1063 * contained in the hwmod module
1064 * @oh: struct omap_hwmod *
1065 * @name: name of the reset line to look up and read
1066 *
1067 * Return the state of the reset line.
1068 */
1069static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1070{
1071 u8 shift;
1072
1073 if (!oh)
1074 return -EINVAL;
1075
1076 shift = _lookup_hardreset(oh, name);
1077 if (IS_ERR_VALUE(shift))
1078 return shift;
1079
1080 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1081 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1082 shift);
1083 } else if (cpu_is_omap44xx()) {
1084 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1085 shift);
1086 } else {
1087 return -EINVAL;
1088 }
1089}
1090
63c85238
PW
1091/**
1092 * _reset - reset an omap_hwmod
1093 * @oh: struct omap_hwmod *
1094 *
1095 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1096 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1097 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1098 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1099 *
1100 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1101 * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
1102 * use the SYSCONFIG softreset bit to provide the status.
1103 *
1104 * Note that some IP like McBSP does have a reset control but no reset status.
63c85238
PW
1105 */
1106static int _reset(struct omap_hwmod *oh)
1107{
96835af9 1108 u32 v;
6f8b7ff5 1109 int c = 0;
96835af9 1110 int ret = 0;
63c85238 1111
43b40992 1112 if (!oh->class->sysc ||
2cb06814 1113 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1114 return -EINVAL;
1115
1116 /* clocks must be on for this operation */
1117 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1118 pr_warning("omap_hwmod: %s: reset can only be entered from "
1119 "enabled state\n", oh->name);
63c85238
PW
1120 return -EINVAL;
1121 }
1122
96835af9
BC
1123 /* For some modules, all optionnal clocks need to be enabled as well */
1124 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1125 _enable_optional_clocks(oh);
1126
63c85238
PW
1127 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1128
1129 v = oh->_sysc_cache;
96835af9
BC
1130 ret = _set_softreset(oh, &v);
1131 if (ret)
1132 goto dis_opt_clks;
63c85238
PW
1133 _write_sysconfig(v, oh);
1134
2cb06814
BC
1135 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1136 omap_test_timeout((omap_hwmod_readl(oh,
1137 oh->class->sysc->syss_offs)
1138 & SYSS_RESETDONE_MASK),
1139 MAX_MODULE_SOFTRESET_WAIT, c);
1140 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1141 omap_test_timeout(!(omap_hwmod_readl(oh,
1142 oh->class->sysc->sysc_offs)
1143 & SYSC_TYPE2_SOFTRESET_MASK),
1144 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1145
5365efbe 1146 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1147 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1148 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1149 else
5365efbe 1150 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1151
1152 /*
1153 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1154 * _wait_target_ready() or _reset()
1155 */
1156
96835af9
BC
1157 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1158
1159dis_opt_clks:
1160 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1161 _disable_optional_clocks(oh);
1162
1163 return ret;
63c85238
PW
1164}
1165
1166/**
84824022 1167 * _omap_hwmod_enable - enable an omap_hwmod
63c85238
PW
1168 * @oh: struct omap_hwmod *
1169 *
1170 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
74ff3a68
PW
1171 * register target. (This function has a full name --
1172 * _omap_hwmod_enable() rather than simply _enable() -- because it is
1173 * currently required by the pm34xx.c idle loop.) Returns -EINVAL if
1174 * the hwmod is in the wrong state or passes along the return value of
1175 * _wait_target_ready().
63c85238 1176 */
84824022 1177int _omap_hwmod_enable(struct omap_hwmod *oh)
63c85238
PW
1178{
1179 int r;
1180
1181 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1182 oh->_state != _HWMOD_STATE_IDLE &&
1183 oh->_state != _HWMOD_STATE_DISABLED) {
1184 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1185 "from initialized, idle, or disabled state\n", oh->name);
1186 return -EINVAL;
1187 }
1188
1189 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1190
5365efbe
BC
1191 /*
1192 * If an IP contains only one HW reset line, then de-assert it in order
1193 * to allow to enable the clocks. Otherwise the PRCM will return
1194 * Intransition status, and the init will failed.
1195 */
1196 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1197 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1198 _deassert_hardreset(oh, oh->rst_lines[0].name);
1199
63c85238
PW
1200 /* XXX mux balls */
1201
1202 _add_initiator_dep(oh, mpu_oh);
1203 _enable_clocks(oh);
1204
63c85238 1205 r = _wait_target_ready(oh);
9a23dfe1 1206 if (!r) {
63c85238
PW
1207 oh->_state = _HWMOD_STATE_ENABLED;
1208
9a23dfe1
BC
1209 /* Access the sysconfig only if the target is ready */
1210 if (oh->class->sysc) {
1211 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1212 _update_sysc_cache(oh);
74ff3a68 1213 _enable_sysc(oh);
9a23dfe1
BC
1214 }
1215 } else {
1216 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1217 oh->name, r);
1218 }
1219
63c85238
PW
1220 return r;
1221}
1222
1223/**
74ff3a68 1224 * _omap_hwmod_idle - idle an omap_hwmod
63c85238
PW
1225 * @oh: struct omap_hwmod *
1226 *
1227 * Idles an omap_hwmod @oh. This should be called once the hwmod has
74ff3a68
PW
1228 * no further work. (This function has a full name --
1229 * _omap_hwmod_idle() rather than simply _idle() -- because it is
1230 * currently required by the pm34xx.c idle loop.) Returns -EINVAL if
1231 * the hwmod is in the wrong state or returns 0.
63c85238 1232 */
84824022 1233int _omap_hwmod_idle(struct omap_hwmod *oh)
63c85238
PW
1234{
1235 if (oh->_state != _HWMOD_STATE_ENABLED) {
1236 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1237 "enabled state\n", oh->name);
1238 return -EINVAL;
1239 }
1240
1241 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1242
43b40992 1243 if (oh->class->sysc)
74ff3a68 1244 _idle_sysc(oh);
63c85238
PW
1245 _del_initiator_dep(oh, mpu_oh);
1246 _disable_clocks(oh);
1247
1248 oh->_state = _HWMOD_STATE_IDLE;
1249
1250 return 0;
1251}
1252
1253/**
1254 * _shutdown - shutdown an omap_hwmod
1255 * @oh: struct omap_hwmod *
1256 *
1257 * Shut down an omap_hwmod @oh. This should be called when the driver
1258 * used for the hwmod is removed or unloaded or if the driver is not
1259 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1260 * state or returns 0.
1261 */
1262static int _shutdown(struct omap_hwmod *oh)
1263{
1264 if (oh->_state != _HWMOD_STATE_IDLE &&
1265 oh->_state != _HWMOD_STATE_ENABLED) {
1266 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1267 "from idle, or enabled state\n", oh->name);
1268 return -EINVAL;
1269 }
1270
1271 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1272
43b40992 1273 if (oh->class->sysc)
74ff3a68 1274 _shutdown_sysc(oh);
3827f949 1275
5365efbe
BC
1276 /*
1277 * If an IP contains only one HW reset line, then assert it
1278 * before disabling the clocks and shutting down the IP.
1279 */
1280 if (oh->rst_lines_cnt == 1)
1281 _assert_hardreset(oh, oh->rst_lines[0].name);
1282
3827f949
BC
1283 /* clocks and deps are already disabled in idle */
1284 if (oh->_state == _HWMOD_STATE_ENABLED) {
1285 _del_initiator_dep(oh, mpu_oh);
1286 /* XXX what about the other system initiators here? dma, dsp */
1287 _disable_clocks(oh);
1288 }
63c85238
PW
1289 /* XXX Should this code also force-disable the optional clocks? */
1290
1291 /* XXX mux any associated balls to safe mode */
1292
1293 oh->_state = _HWMOD_STATE_DISABLED;
1294
1295 return 0;
1296}
1297
63c85238
PW
1298/**
1299 * _setup - do initial configuration of omap_hwmod
1300 * @oh: struct omap_hwmod *
97d60162 1301 * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
63c85238
PW
1302 *
1303 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
12b1fdb4
KH
1304 * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
1305 * a system that will not call omap_hwmod_enable() to enable devices
1306 * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
1307 * is in the wrong state or returns 0.
63c85238 1308 */
97d60162 1309static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1310{
9a23dfe1 1311 int i, r;
97d60162 1312 u8 skip_setup_idle;
63c85238 1313
97d60162 1314 if (!oh || !data)
63c85238
PW
1315 return -EINVAL;
1316
97d60162
PW
1317 skip_setup_idle = *(u8 *)data;
1318
63c85238
PW
1319 /* Set iclk autoidle mode */
1320 if (oh->slaves_cnt > 0) {
682fdc96
BC
1321 for (i = 0; i < oh->slaves_cnt; i++) {
1322 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1323 struct clk *c = os->_clk;
1324
4d3ae5a9 1325 if (!c)
63c85238
PW
1326 continue;
1327
1328 if (os->flags & OCPIF_SWSUP_IDLE) {
1329 /* XXX omap_iclk_deny_idle(c); */
1330 } else {
1331 /* XXX omap_iclk_allow_idle(c); */
1332 clk_enable(c);
1333 }
1334 }
1335 }
1336
12b1fdb4 1337 mutex_init(&oh->_mutex);
63c85238
PW
1338 oh->_state = _HWMOD_STATE_INITIALIZED;
1339
5365efbe
BC
1340 /*
1341 * In the case of hwmod with hardreset that should not be
1342 * de-assert at boot time, we have to keep the module
1343 * initialized, because we cannot enable it properly with the
1344 * reset asserted. Exit without warning because that behavior is
1345 * expected.
1346 */
1347 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1348 return 0;
1349
84824022 1350 r = _omap_hwmod_enable(oh);
9a23dfe1
BC
1351 if (r) {
1352 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1353 oh->name, oh->_state);
1354 return 0;
1355 }
63c85238 1356
b835d014 1357 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1358 _reset(oh);
1359
b835d014 1360 /*
76e5589e
BC
1361 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1362 * The _omap_hwmod_enable() function should be split to
1363 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1364 */
43b40992 1365 if (oh->class->sysc) {
b835d014 1366 _update_sysc_cache(oh);
74ff3a68 1367 _enable_sysc(oh);
b835d014
PW
1368 }
1369 }
63c85238 1370
97d60162 1371 if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle)
84824022 1372 _omap_hwmod_idle(oh);
63c85238
PW
1373
1374 return 0;
1375}
1376
1377
1378
1379/* Public functions */
1380
1381u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
1382{
db2a60bf 1383 return __raw_readl(oh->_mpu_rt_va + reg_offs);
63c85238
PW
1384}
1385
1386void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1387{
db2a60bf 1388 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
63c85238
PW
1389}
1390
887adeac
PW
1391/**
1392 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1393 * @oh: struct omap_hwmod *
1394 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1395 *
1396 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1397 * local copy. Intended to be used by drivers that have some erratum
1398 * that requires direct manipulation of the SIDLEMODE bits. Returns
1399 * -EINVAL if @oh is null, or passes along the return value from
1400 * _set_slave_idlemode().
1401 *
1402 * XXX Does this function have any current users? If not, we should
1403 * remove it; it is better to let the rest of the hwmod code handle this.
1404 * Any users of this function should be scrutinized carefully.
1405 */
46273e6f
KH
1406int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1407{
1408 u32 v;
1409 int retval = 0;
1410
1411 if (!oh)
1412 return -EINVAL;
1413
1414 v = oh->_sysc_cache;
1415
1416 retval = _set_slave_idlemode(oh, idlemode, &v);
1417 if (!retval)
1418 _write_sysconfig(v, oh);
1419
1420 return retval;
1421}
1422
63c85238
PW
1423/**
1424 * omap_hwmod_register - register a struct omap_hwmod
1425 * @oh: struct omap_hwmod *
1426 *
43b40992
PW
1427 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1428 * already has been registered by the same name; -EINVAL if the
1429 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1430 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1431 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1432 * success.
63c85238
PW
1433 *
1434 * XXX The data should be copied into bootmem, so the original data
1435 * should be marked __initdata and freed after init. This would allow
1436 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1437 * that the copy process would be relatively complex due to the large number
1438 * of substructures.
1439 */
1440int omap_hwmod_register(struct omap_hwmod *oh)
1441{
1442 int ret, ms_id;
1443
43b40992
PW
1444 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1445 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1446 return -EINVAL;
1447
1448 mutex_lock(&omap_hwmod_mutex);
1449
1450 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1451
1452 if (_lookup(oh->name)) {
1453 ret = -EEXIST;
1454 goto ohr_unlock;
1455 }
1456
1457 ms_id = _find_mpu_port_index(oh);
1458 if (!IS_ERR_VALUE(ms_id)) {
1459 oh->_mpu_port_index = ms_id;
db2a60bf 1460 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
63c85238
PW
1461 } else {
1462 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1463 }
1464
1465 list_add_tail(&oh->node, &omap_hwmod_list);
1466
1467 oh->_state = _HWMOD_STATE_REGISTERED;
1468
1469 ret = 0;
1470
1471ohr_unlock:
1472 mutex_unlock(&omap_hwmod_mutex);
1473 return ret;
1474}
1475
1476/**
1477 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1478 * @name: name of the omap_hwmod to look up
1479 *
1480 * Given a @name of an omap_hwmod, return a pointer to the registered
1481 * struct omap_hwmod *, or NULL upon error.
1482 */
1483struct omap_hwmod *omap_hwmod_lookup(const char *name)
1484{
1485 struct omap_hwmod *oh;
1486
1487 if (!name)
1488 return NULL;
1489
1490 mutex_lock(&omap_hwmod_mutex);
1491 oh = _lookup(name);
1492 mutex_unlock(&omap_hwmod_mutex);
1493
1494 return oh;
1495}
1496
1497/**
1498 * omap_hwmod_for_each - call function for each registered omap_hwmod
1499 * @fn: pointer to a callback function
97d60162 1500 * @data: void * data to pass to callback function
63c85238
PW
1501 *
1502 * Call @fn for each registered omap_hwmod, passing @data to each
1503 * function. @fn must return 0 for success or any other value for
1504 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1505 * will stop and the non-zero return value will be passed to the
1506 * caller of omap_hwmod_for_each(). @fn is called with
1507 * omap_hwmod_for_each() held.
1508 */
97d60162
PW
1509int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1510 void *data)
63c85238
PW
1511{
1512 struct omap_hwmod *temp_oh;
1513 int ret;
1514
1515 if (!fn)
1516 return -EINVAL;
1517
1518 mutex_lock(&omap_hwmod_mutex);
1519 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1520 ret = (*fn)(temp_oh, data);
63c85238
PW
1521 if (ret)
1522 break;
1523 }
1524 mutex_unlock(&omap_hwmod_mutex);
1525
1526 return ret;
1527}
1528
1529
1530/**
1531 * omap_hwmod_init - init omap_hwmod code and register hwmods
1532 * @ohs: pointer to an array of omap_hwmods to register
1533 *
1534 * Intended to be called early in boot before the clock framework is
1535 * initialized. If @ohs is not null, will register all omap_hwmods
1536 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1537 * omap_hwmod_init() has already been called or 0 otherwise.
1538 */
1539int omap_hwmod_init(struct omap_hwmod **ohs)
1540{
1541 struct omap_hwmod *oh;
1542 int r;
1543
1544 if (inited)
1545 return -EINVAL;
1546
1547 inited = 1;
1548
1549 if (!ohs)
1550 return 0;
1551
1552 oh = *ohs;
1553 while (oh) {
1554 if (omap_chip_is(oh->omap_chip)) {
1555 r = omap_hwmod_register(oh);
1556 WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
1557 "%d\n", oh->name, r);
1558 }
1559 oh = *++ohs;
1560 }
1561
1562 return 0;
1563}
1564
1565/**
1566 * omap_hwmod_late_init - do some post-clock framework initialization
97d60162 1567 * @skip_setup_idle: if 1, do not idle hwmods in _setup()
63c85238
PW
1568 *
1569 * Must be called after omap2_clk_init(). Resolves the struct clk names
1570 * to struct clk pointers for each registered omap_hwmod. Also calls
1571 * _setup() on each hwmod. Returns 0.
1572 */
97d60162 1573int omap_hwmod_late_init(u8 skip_setup_idle)
63c85238
PW
1574{
1575 int r;
1576
1577 /* XXX check return value */
97d60162 1578 r = omap_hwmod_for_each(_init_clocks, NULL);
63c85238
PW
1579 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1580
1581 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1582 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1583 MPU_INITIATOR_NAME);
1584
97d60162
PW
1585 if (skip_setup_idle)
1586 pr_debug("omap_hwmod: will leave hwmods enabled during setup\n");
1587
1588 omap_hwmod_for_each(_setup, &skip_setup_idle);
63c85238
PW
1589
1590 return 0;
1591}
1592
1593/**
1594 * omap_hwmod_unregister - unregister an omap_hwmod
1595 * @oh: struct omap_hwmod *
1596 *
1597 * Unregisters a previously-registered omap_hwmod @oh. There's probably
1598 * no use case for this, so it is likely to be removed in a later version.
1599 *
1600 * XXX Free all of the bootmem-allocated structures here when that is
1601 * implemented. Make it clear that core code is the only code that is
1602 * expected to unregister modules.
1603 */
1604int omap_hwmod_unregister(struct omap_hwmod *oh)
1605{
1606 if (!oh)
1607 return -EINVAL;
1608
1609 pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
1610
1611 mutex_lock(&omap_hwmod_mutex);
db2a60bf 1612 iounmap(oh->_mpu_rt_va);
63c85238
PW
1613 list_del(&oh->node);
1614 mutex_unlock(&omap_hwmod_mutex);
1615
1616 return 0;
1617}
1618
1619/**
1620 * omap_hwmod_enable - enable an omap_hwmod
1621 * @oh: struct omap_hwmod *
1622 *
74ff3a68 1623 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1624 * Returns -EINVAL on error or passes along the return value from _enable().
1625 */
1626int omap_hwmod_enable(struct omap_hwmod *oh)
1627{
1628 int r;
1629
1630 if (!oh)
1631 return -EINVAL;
1632
12b1fdb4 1633 mutex_lock(&oh->_mutex);
84824022 1634 r = _omap_hwmod_enable(oh);
12b1fdb4 1635 mutex_unlock(&oh->_mutex);
63c85238
PW
1636
1637 return r;
1638}
1639
84824022 1640
63c85238
PW
1641/**
1642 * omap_hwmod_idle - idle an omap_hwmod
1643 * @oh: struct omap_hwmod *
1644 *
74ff3a68 1645 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1646 * Returns -EINVAL on error or passes along the return value from _idle().
1647 */
1648int omap_hwmod_idle(struct omap_hwmod *oh)
1649{
1650 if (!oh)
1651 return -EINVAL;
1652
12b1fdb4 1653 mutex_lock(&oh->_mutex);
84824022 1654 _omap_hwmod_idle(oh);
12b1fdb4 1655 mutex_unlock(&oh->_mutex);
63c85238
PW
1656
1657 return 0;
1658}
1659
1660/**
1661 * omap_hwmod_shutdown - shutdown an omap_hwmod
1662 * @oh: struct omap_hwmod *
1663 *
74ff3a68 1664 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1665 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1666 * the return value from _shutdown().
1667 */
1668int omap_hwmod_shutdown(struct omap_hwmod *oh)
1669{
1670 if (!oh)
1671 return -EINVAL;
1672
12b1fdb4 1673 mutex_lock(&oh->_mutex);
63c85238 1674 _shutdown(oh);
12b1fdb4 1675 mutex_unlock(&oh->_mutex);
63c85238
PW
1676
1677 return 0;
1678}
1679
1680/**
1681 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1682 * @oh: struct omap_hwmod *oh
1683 *
1684 * Intended to be called by the omap_device code.
1685 */
1686int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1687{
12b1fdb4 1688 mutex_lock(&oh->_mutex);
63c85238 1689 _enable_clocks(oh);
12b1fdb4 1690 mutex_unlock(&oh->_mutex);
63c85238
PW
1691
1692 return 0;
1693}
1694
1695/**
1696 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1697 * @oh: struct omap_hwmod *oh
1698 *
1699 * Intended to be called by the omap_device code.
1700 */
1701int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1702{
12b1fdb4 1703 mutex_lock(&oh->_mutex);
63c85238 1704 _disable_clocks(oh);
12b1fdb4 1705 mutex_unlock(&oh->_mutex);
63c85238
PW
1706
1707 return 0;
1708}
1709
1710/**
1711 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1712 * @oh: struct omap_hwmod *oh
1713 *
1714 * Intended to be called by drivers and core code when all posted
1715 * writes to a device must complete before continuing further
1716 * execution (for example, after clearing some device IRQSTATUS
1717 * register bits)
1718 *
1719 * XXX what about targets with multiple OCP threads?
1720 */
1721void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1722{
1723 BUG_ON(!oh);
1724
43b40992 1725 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1726 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1727 "device configuration\n", oh->name);
1728 return;
1729 }
1730
1731 /*
1732 * Forces posted writes to complete on the OCP thread handling
1733 * register writes
1734 */
43b40992 1735 omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1736}
1737
1738/**
1739 * omap_hwmod_reset - reset the hwmod
1740 * @oh: struct omap_hwmod *
1741 *
1742 * Under some conditions, a driver may wish to reset the entire device.
1743 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1744 * the return value from _reset().
63c85238
PW
1745 */
1746int omap_hwmod_reset(struct omap_hwmod *oh)
1747{
1748 int r;
1749
9b579114 1750 if (!oh)
63c85238
PW
1751 return -EINVAL;
1752
12b1fdb4 1753 mutex_lock(&oh->_mutex);
63c85238 1754 r = _reset(oh);
12b1fdb4 1755 mutex_unlock(&oh->_mutex);
63c85238
PW
1756
1757 return r;
1758}
1759
1760/**
1761 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1762 * @oh: struct omap_hwmod *
1763 * @res: pointer to the first element of an array of struct resource to fill
1764 *
1765 * Count the number of struct resource array elements necessary to
1766 * contain omap_hwmod @oh resources. Intended to be called by code
1767 * that registers omap_devices. Intended to be used to determine the
1768 * size of a dynamically-allocated struct resource array, before
1769 * calling omap_hwmod_fill_resources(). Returns the number of struct
1770 * resource array elements needed.
1771 *
1772 * XXX This code is not optimized. It could attempt to merge adjacent
1773 * resource IDs.
1774 *
1775 */
1776int omap_hwmod_count_resources(struct omap_hwmod *oh)
1777{
1778 int ret, i;
1779
9ee9fff9 1780 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1781
1782 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1783 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1784
1785 return ret;
1786}
1787
1788/**
1789 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1790 * @oh: struct omap_hwmod *
1791 * @res: pointer to the first element of an array of struct resource to fill
1792 *
1793 * Fill the struct resource array @res with resource data from the
1794 * omap_hwmod @oh. Intended to be called by code that registers
1795 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1796 * number of array elements filled.
1797 */
1798int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1799{
1800 int i, j;
1801 int r = 0;
1802
1803 /* For each IRQ, DMA, memory area, fill in array.*/
1804
1805 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
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1806 (res + r)->name = (oh->mpu_irqs + i)->name;
1807 (res + r)->start = (oh->mpu_irqs + i)->irq;
1808 (res + r)->end = (oh->mpu_irqs + i)->irq;
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1809 (res + r)->flags = IORESOURCE_IRQ;
1810 r++;
1811 }
1812
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BC
1813 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1814 (res + r)->name = (oh->sdma_reqs + i)->name;
1815 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1816 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
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1817 (res + r)->flags = IORESOURCE_DMA;
1818 r++;
1819 }
1820
1821 for (i = 0; i < oh->slaves_cnt; i++) {
1822 struct omap_hwmod_ocp_if *os;
1823
682fdc96 1824 os = oh->slaves[i];
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1825
1826 for (j = 0; j < os->addr_cnt; j++) {
1827 (res + r)->start = (os->addr + j)->pa_start;
1828 (res + r)->end = (os->addr + j)->pa_end;
1829 (res + r)->flags = IORESOURCE_MEM;
1830 r++;
1831 }
1832 }
1833
1834 return r;
1835}
1836
1837/**
1838 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1839 * @oh: struct omap_hwmod *
1840 *
1841 * Return the powerdomain pointer associated with the OMAP module
1842 * @oh's main clock. If @oh does not have a main clk, return the
1843 * powerdomain associated with the interface clock associated with the
1844 * module's MPU port. (XXX Perhaps this should use the SDMA port
1845 * instead?) Returns NULL on error, or a struct powerdomain * on
1846 * success.
1847 */
1848struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1849{
1850 struct clk *c;
1851
1852 if (!oh)
1853 return NULL;
1854
1855 if (oh->_clk) {
1856 c = oh->_clk;
1857 } else {
1858 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1859 return NULL;
1860 c = oh->slaves[oh->_mpu_port_index]->_clk;
1861 }
1862
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1863 if (!c->clkdm)
1864 return NULL;
1865
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1866 return c->clkdm->pwrdm.ptr;
1867
1868}
1869
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1870/**
1871 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1872 * @oh: struct omap_hwmod *
1873 *
1874 * Returns the virtual address corresponding to the beginning of the
1875 * module's register target, in the address range that is intended to
1876 * be used by the MPU. Returns the virtual address upon success or NULL
1877 * upon error.
1878 */
1879void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1880{
1881 if (!oh)
1882 return NULL;
1883
1884 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1885 return NULL;
1886
1887 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1888 return NULL;
1889
1890 return oh->_mpu_rt_va;
1891}
1892
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1893/**
1894 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1895 * @oh: struct omap_hwmod *
1896 * @init_oh: struct omap_hwmod * (initiator)
1897 *
1898 * Add a sleep dependency between the initiator @init_oh and @oh.
1899 * Intended to be called by DSP/Bridge code via platform_data for the
1900 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1901 * code needs to add/del initiator dependencies dynamically
1902 * before/after accessing a device. Returns the return value from
1903 * _add_initiator_dep().
1904 *
1905 * XXX Keep a usecount in the clockdomain code
1906 */
1907int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1908 struct omap_hwmod *init_oh)
1909{
1910 return _add_initiator_dep(oh, init_oh);
1911}
1912
1913/*
1914 * XXX what about functions for drivers to save/restore ocp_sysconfig
1915 * for context save/restore operations?
1916 */
1917
1918/**
1919 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1920 * @oh: struct omap_hwmod *
1921 * @init_oh: struct omap_hwmod * (initiator)
1922 *
1923 * Remove a sleep dependency between the initiator @init_oh and @oh.
1924 * Intended to be called by DSP/Bridge code via platform_data for the
1925 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1926 * code needs to add/del initiator dependencies dynamically
1927 * before/after accessing a device. Returns the return value from
1928 * _del_initiator_dep().
1929 *
1930 * XXX Keep a usecount in the clockdomain code
1931 */
1932int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1933 struct omap_hwmod *init_oh)
1934{
1935 return _del_initiator_dep(oh, init_oh);
1936}
1937
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1938/**
1939 * omap_hwmod_enable_wakeup - allow device to wake up the system
1940 * @oh: struct omap_hwmod *
1941 *
1942 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1943 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
1944 * registers to cause the PRCM to receive wakeup events from the
1945 * module. Does not set any wakeup routing registers beyond this
1946 * point - if the module is to wake up any other module or subsystem,
1947 * that must be set separately. Called by omap_device code. Returns
1948 * -EINVAL on error or 0 upon success.
1949 */
1950int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1951{
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1952 if (!oh->class->sysc ||
1953 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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1954 return -EINVAL;
1955
12b1fdb4 1956 mutex_lock(&oh->_mutex);
63c85238 1957 _enable_wakeup(oh);
12b1fdb4 1958 mutex_unlock(&oh->_mutex);
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1959
1960 return 0;
1961}
1962
1963/**
1964 * omap_hwmod_disable_wakeup - prevent device from waking the system
1965 * @oh: struct omap_hwmod *
1966 *
1967 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
1968 * from sending wakeups to the PRCM. Eventually this should clear
1969 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
1970 * from the module. Does not set any wakeup routing registers beyond
1971 * this point - if the module is to wake up any other module or
1972 * subsystem, that must be set separately. Called by omap_device
1973 * code. Returns -EINVAL on error or 0 upon success.
1974 */
1975int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
1976{
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1977 if (!oh->class->sysc ||
1978 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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1979 return -EINVAL;
1980
12b1fdb4 1981 mutex_lock(&oh->_mutex);
63c85238 1982 _disable_wakeup(oh);
12b1fdb4 1983 mutex_unlock(&oh->_mutex);
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1984
1985 return 0;
1986}
43b40992 1987
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1988/**
1989 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
1990 * contained in the hwmod module.
1991 * @oh: struct omap_hwmod *
1992 * @name: name of the reset line to lookup and assert
1993 *
1994 * Some IP like dsp, ipu or iva contain processor that require
1995 * an HW reset line to be assert / deassert in order to enable fully
1996 * the IP. Returns -EINVAL if @oh is null or if the operation is not
1997 * yet supported on this OMAP; otherwise, passes along the return value
1998 * from _assert_hardreset().
1999 */
2000int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2001{
2002 int ret;
2003
2004 if (!oh)
2005 return -EINVAL;
2006
2007 mutex_lock(&oh->_mutex);
2008 ret = _assert_hardreset(oh, name);
2009 mutex_unlock(&oh->_mutex);
2010
2011 return ret;
2012}
2013
2014/**
2015 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2016 * contained in the hwmod module.
2017 * @oh: struct omap_hwmod *
2018 * @name: name of the reset line to look up and deassert
2019 *
2020 * Some IP like dsp, ipu or iva contain processor that require
2021 * an HW reset line to be assert / deassert in order to enable fully
2022 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2023 * yet supported on this OMAP; otherwise, passes along the return value
2024 * from _deassert_hardreset().
2025 */
2026int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2027{
2028 int ret;
2029
2030 if (!oh)
2031 return -EINVAL;
2032
2033 mutex_lock(&oh->_mutex);
2034 ret = _deassert_hardreset(oh, name);
2035 mutex_unlock(&oh->_mutex);
2036
2037 return ret;
2038}
2039
2040/**
2041 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2042 * contained in the hwmod module
2043 * @oh: struct omap_hwmod *
2044 * @name: name of the reset line to look up and read
2045 *
2046 * Return the current state of the hwmod @oh's reset line named @name:
2047 * returns -EINVAL upon parameter error or if this operation
2048 * is unsupported on the current OMAP; otherwise, passes along the return
2049 * value from _read_hardreset().
2050 */
2051int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2052{
2053 int ret;
2054
2055 if (!oh)
2056 return -EINVAL;
2057
2058 mutex_lock(&oh->_mutex);
2059 ret = _read_hardreset(oh, name);
2060 mutex_unlock(&oh->_mutex);
2061
2062 return ret;
2063}
2064
2065
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2066/**
2067 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2068 * @classname: struct omap_hwmod_class name to search for
2069 * @fn: callback function pointer to call for each hwmod in class @classname
2070 * @user: arbitrary context data to pass to the callback function
2071 *
2072 * For each omap_hwmod of class @classname, call @fn. Takes
2073 * omap_hwmod_mutex to prevent the hwmod list from changing during the
2074 * iteration. If the callback function returns something other than
2075 * zero, the iterator is terminated, and the callback function's return
2076 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2077 * if @classname or @fn are NULL, or passes back the error code from @fn.
2078 */
2079int omap_hwmod_for_each_by_class(const char *classname,
2080 int (*fn)(struct omap_hwmod *oh,
2081 void *user),
2082 void *user)
2083{
2084 struct omap_hwmod *temp_oh;
2085 int ret = 0;
2086
2087 if (!classname || !fn)
2088 return -EINVAL;
2089
2090 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2091 __func__, classname);
2092
2093 mutex_lock(&omap_hwmod_mutex);
2094
2095 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2096 if (!strcmp(temp_oh->class->name, classname)) {
2097 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2098 __func__, temp_oh->name);
2099 ret = (*fn)(temp_oh, user);
2100 if (ret)
2101 break;
2102 }
2103 }
2104
2105 mutex_unlock(&omap_hwmod_mutex);
2106
2107 if (ret)
2108 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2109 __func__, ret);
2110
2111 return ret;
2112}
2113