OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
63c85238 5 *
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
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16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
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27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
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112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
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119 * - handle IO mapping
120 * - bus throughput & module latency measurement code
121 *
122 * XXX add tests at the beginning of each function to ensure the hwmod is
123 * in the appropriate state
124 * XXX error return values should be checked to ensure that they are
125 * appropriate
126 */
127#undef DEBUG
128
129#include <linux/kernel.h>
130#include <linux/errno.h>
131#include <linux/io.h>
132#include <linux/clk.h>
133#include <linux/delay.h>
134#include <linux/err.h>
135#include <linux/list.h>
136#include <linux/mutex.h>
dc6d1cda 137#include <linux/spinlock.h>
63c85238 138
6f8b7ff5 139#include <plat/common.h>
ce491cf8 140#include <plat/cpu.h>
1540f214 141#include "clockdomain.h"
72e06d08 142#include "powerdomain.h"
ce491cf8
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143#include <plat/clock.h>
144#include <plat/omap_hwmod.h>
5365efbe 145#include <plat/prcm.h>
63c85238 146
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147#include "cm2xxx_3xxx.h"
148#include "cm44xx.h"
149#include "prm2xxx_3xxx.h"
d198b514 150#include "prm44xx.h"
8d9af88f 151#include "mux.h"
63c85238 152
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153/* Maximum microseconds to wait for OMAP module to softreset */
154#define MAX_MODULE_SOFTRESET_WAIT 10000
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155
156/* Name of the OMAP hwmod for the MPU */
5c2c0296 157#define MPU_INITIATOR_NAME "mpu"
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158
159/* omap_hwmod_list contains all registered struct omap_hwmods */
160static LIST_HEAD(omap_hwmod_list);
161
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162/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163static struct omap_hwmod *mpu_oh;
164
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165
166/* Private functions */
167
168/**
169 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
170 * @oh: struct omap_hwmod *
171 *
172 * Load the current value of the hwmod OCP_SYSCONFIG register into the
173 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
174 * OCP_SYSCONFIG register or 0 upon success.
175 */
176static int _update_sysc_cache(struct omap_hwmod *oh)
177{
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178 if (!oh->class->sysc) {
179 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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180 return -EINVAL;
181 }
182
183 /* XXX ensure module interface clock is up */
184
cc7a1d2a 185 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 186
43b40992 187 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 188 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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189
190 return 0;
191}
192
193/**
194 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
195 * @v: OCP_SYSCONFIG value to write
196 * @oh: struct omap_hwmod *
197 *
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198 * Write @v into the module class' OCP_SYSCONFIG register, if it has
199 * one. No return value.
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200 */
201static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
202{
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203 if (!oh->class->sysc) {
204 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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205 return;
206 }
207
208 /* XXX ensure module interface clock is up */
209
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210 /* Module might have lost context, always update cache and register */
211 oh->_sysc_cache = v;
212 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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213}
214
215/**
216 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
217 * @oh: struct omap_hwmod *
218 * @standbymode: MIDLEMODE field bits
219 * @v: pointer to register contents to modify
220 *
221 * Update the master standby mode bits in @v to be @standbymode for
222 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
223 * upon error or 0 upon success.
224 */
225static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
226 u32 *v)
227{
358f0e63
TG
228 u32 mstandby_mask;
229 u8 mstandby_shift;
230
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231 if (!oh->class->sysc ||
232 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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233 return -EINVAL;
234
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235 if (!oh->class->sysc->sysc_fields) {
236 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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237 return -EINVAL;
238 }
239
43b40992 240 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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241 mstandby_mask = (0x3 << mstandby_shift);
242
243 *v &= ~mstandby_mask;
244 *v |= __ffs(standbymode) << mstandby_shift;
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245
246 return 0;
247}
248
249/**
250 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
251 * @oh: struct omap_hwmod *
252 * @idlemode: SIDLEMODE field bits
253 * @v: pointer to register contents to modify
254 *
255 * Update the slave idle mode bits in @v to be @idlemode for the @oh
256 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
257 * or 0 upon success.
258 */
259static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
260{
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261 u32 sidle_mask;
262 u8 sidle_shift;
263
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264 if (!oh->class->sysc ||
265 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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266 return -EINVAL;
267
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268 if (!oh->class->sysc->sysc_fields) {
269 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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270 return -EINVAL;
271 }
272
43b40992 273 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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274 sidle_mask = (0x3 << sidle_shift);
275
276 *v &= ~sidle_mask;
277 *v |= __ffs(idlemode) << sidle_shift;
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278
279 return 0;
280}
281
282/**
283 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
284 * @oh: struct omap_hwmod *
285 * @clockact: CLOCKACTIVITY field bits
286 * @v: pointer to register contents to modify
287 *
288 * Update the clockactivity mode bits in @v to be @clockact for the
289 * @oh hwmod. Used for additional powersaving on some modules. Does
290 * not write to the hardware. Returns -EINVAL upon error or 0 upon
291 * success.
292 */
293static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
294{
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295 u32 clkact_mask;
296 u8 clkact_shift;
297
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298 if (!oh->class->sysc ||
299 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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300 return -EINVAL;
301
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302 if (!oh->class->sysc->sysc_fields) {
303 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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304 return -EINVAL;
305 }
306
43b40992 307 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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308 clkact_mask = (0x3 << clkact_shift);
309
310 *v &= ~clkact_mask;
311 *v |= clockact << clkact_shift;
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312
313 return 0;
314}
315
316/**
317 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
318 * @oh: struct omap_hwmod *
319 * @v: pointer to register contents to modify
320 *
321 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
322 * error or 0 upon success.
323 */
324static int _set_softreset(struct omap_hwmod *oh, u32 *v)
325{
358f0e63
TG
326 u32 softrst_mask;
327
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328 if (!oh->class->sysc ||
329 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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330 return -EINVAL;
331
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332 if (!oh->class->sysc->sysc_fields) {
333 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
334 return -EINVAL;
335 }
336
43b40992 337 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
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338
339 *v |= softrst_mask;
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340
341 return 0;
342}
343
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344/**
345 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
346 * @oh: struct omap_hwmod *
347 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
348 * @v: pointer to register contents to modify
349 *
350 * Update the module autoidle bit in @v to be @autoidle for the @oh
351 * hwmod. The autoidle bit controls whether the module can gate
352 * internal clocks automatically when it isn't doing anything; the
353 * exact function of this bit varies on a per-module basis. This
354 * function does not write to the hardware. Returns -EINVAL upon
355 * error or 0 upon success.
356 */
357static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
358 u32 *v)
359{
358f0e63
TG
360 u32 autoidle_mask;
361 u8 autoidle_shift;
362
43b40992
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363 if (!oh->class->sysc ||
364 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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365 return -EINVAL;
366
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367 if (!oh->class->sysc->sysc_fields) {
368 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
369 return -EINVAL;
370 }
371
43b40992 372 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 373 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
374
375 *v &= ~autoidle_mask;
376 *v |= autoidle << autoidle_shift;
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377
378 return 0;
379}
380
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381/**
382 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
383 * @oh: struct omap_hwmod *
384 *
385 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
386 * upon error or 0 upon success.
387 */
5a7ddcbd 388static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 389{
5a7ddcbd 390 u32 wakeup_mask;
63c85238 391
43b40992 392 if (!oh->class->sysc ||
86009eb3 393 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
394 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
395 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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396 return -EINVAL;
397
43b40992
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398 if (!oh->class->sysc->sysc_fields) {
399 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
400 return -EINVAL;
401 }
402
43b40992 403 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 404
5a7ddcbd 405 *v |= wakeup_mask;
63c85238 406
86009eb3
BC
407 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
408 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
409 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
410 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 411
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412 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
413
414 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
415
416 return 0;
417}
418
419/**
420 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
421 * @oh: struct omap_hwmod *
422 *
423 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
424 * upon error or 0 upon success.
425 */
5a7ddcbd 426static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 427{
5a7ddcbd 428 u32 wakeup_mask;
63c85238 429
43b40992 430 if (!oh->class->sysc ||
86009eb3 431 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
432 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
433 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
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434 return -EINVAL;
435
43b40992
PW
436 if (!oh->class->sysc->sysc_fields) {
437 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
438 return -EINVAL;
439 }
440
43b40992 441 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 442
5a7ddcbd 443 *v &= ~wakeup_mask;
63c85238 444
86009eb3
BC
445 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
446 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
447 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
448 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 449
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450 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
451
452 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
453
454 return 0;
455}
456
457/**
458 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
459 * @oh: struct omap_hwmod *
460 *
461 * Prevent the hardware module @oh from entering idle while the
462 * hardare module initiator @init_oh is active. Useful when a module
463 * will be accessed by a particular initiator (e.g., if a module will
464 * be accessed by the IVA, there should be a sleepdep between the IVA
465 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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466 * mode. If the clockdomain is marked as not needing autodeps, return
467 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
468 * passes along clkdm_add_sleepdep() value upon success.
63c85238
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469 */
470static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
471{
472 if (!oh->_clk)
473 return -EINVAL;
474
570b54c7
PW
475 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
476 return 0;
477
55ed9694 478 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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479}
480
481/**
482 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
483 * @oh: struct omap_hwmod *
484 *
485 * Allow the hardware module @oh to enter idle while the hardare
486 * module initiator @init_oh is active. Useful when a module will not
487 * be accessed by a particular initiator (e.g., if a module will not
488 * be accessed by the IVA, there should be no sleepdep between the IVA
489 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
490 * mode. If the clockdomain is marked as not needing autodeps, return
491 * 0 without doing anything. Returns -EINVAL upon error or passes
492 * along clkdm_del_sleepdep() value upon success.
63c85238
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493 */
494static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
495{
496 if (!oh->_clk)
497 return -EINVAL;
498
570b54c7
PW
499 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
500 return 0;
501
55ed9694 502 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
503}
504
505/**
506 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
507 * @oh: struct omap_hwmod *
508 *
509 * Called from _init_clocks(). Populates the @oh _clk (main
510 * functional clock pointer) if a main_clk is present. Returns 0 on
511 * success or -EINVAL on error.
512 */
513static int _init_main_clk(struct omap_hwmod *oh)
514{
63c85238
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515 int ret = 0;
516
50ebdac2 517 if (!oh->main_clk)
63c85238
PW
518 return 0;
519
63403384 520 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 521 if (!oh->_clk) {
20383d82
BC
522 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
523 oh->name, oh->main_clk);
63403384 524 return -EINVAL;
dc75925d 525 }
63c85238 526
63403384
BC
527 if (!oh->_clk->clkdm)
528 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
529 oh->main_clk, oh->_clk->name);
81d7c6ff 530
63c85238
PW
531 return ret;
532}
533
534/**
887adeac 535 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
536 * @oh: struct omap_hwmod *
537 *
538 * Called from _init_clocks(). Populates the @oh OCP slave interface
539 * clock pointers. Returns 0 on success or -EINVAL on error.
540 */
541static int _init_interface_clks(struct omap_hwmod *oh)
542{
63c85238
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543 struct clk *c;
544 int i;
545 int ret = 0;
546
547 if (oh->slaves_cnt == 0)
548 return 0;
549
682fdc96
BC
550 for (i = 0; i < oh->slaves_cnt; i++) {
551 struct omap_hwmod_ocp_if *os = oh->slaves[i];
552
50ebdac2 553 if (!os->clk)
63c85238
PW
554 continue;
555
50ebdac2 556 c = omap_clk_get_by_name(os->clk);
dc75925d 557 if (!c) {
20383d82
BC
558 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
559 oh->name, os->clk);
63c85238 560 ret = -EINVAL;
dc75925d 561 }
63c85238
PW
562 os->_clk = c;
563 }
564
565 return ret;
566}
567
568/**
569 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
570 * @oh: struct omap_hwmod *
571 *
572 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
573 * clock pointers. Returns 0 on success or -EINVAL on error.
574 */
575static int _init_opt_clks(struct omap_hwmod *oh)
576{
577 struct omap_hwmod_opt_clk *oc;
578 struct clk *c;
579 int i;
580 int ret = 0;
581
582 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 583 c = omap_clk_get_by_name(oc->clk);
dc75925d 584 if (!c) {
20383d82
BC
585 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
586 oh->name, oc->clk);
63c85238 587 ret = -EINVAL;
dc75925d 588 }
63c85238
PW
589 oc->_clk = c;
590 }
591
592 return ret;
593}
594
595/**
596 * _enable_clocks - enable hwmod main clock and interface clocks
597 * @oh: struct omap_hwmod *
598 *
599 * Enables all clocks necessary for register reads and writes to succeed
600 * on the hwmod @oh. Returns 0.
601 */
602static int _enable_clocks(struct omap_hwmod *oh)
603{
63c85238
PW
604 int i;
605
606 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
607
4d3ae5a9 608 if (oh->_clk)
63c85238
PW
609 clk_enable(oh->_clk);
610
611 if (oh->slaves_cnt > 0) {
682fdc96
BC
612 for (i = 0; i < oh->slaves_cnt; i++) {
613 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
614 struct clk *c = os->_clk;
615
4d3ae5a9 616 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
617 clk_enable(c);
618 }
619 }
620
621 /* The opt clocks are controlled by the device driver. */
622
623 return 0;
624}
625
626/**
627 * _disable_clocks - disable hwmod main clock and interface clocks
628 * @oh: struct omap_hwmod *
629 *
630 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
631 */
632static int _disable_clocks(struct omap_hwmod *oh)
633{
63c85238
PW
634 int i;
635
636 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
637
4d3ae5a9 638 if (oh->_clk)
63c85238
PW
639 clk_disable(oh->_clk);
640
641 if (oh->slaves_cnt > 0) {
682fdc96
BC
642 for (i = 0; i < oh->slaves_cnt; i++) {
643 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
644 struct clk *c = os->_clk;
645
4d3ae5a9 646 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
647 clk_disable(c);
648 }
649 }
650
651 /* The opt clocks are controlled by the device driver. */
652
653 return 0;
654}
655
96835af9
BC
656static void _enable_optional_clocks(struct omap_hwmod *oh)
657{
658 struct omap_hwmod_opt_clk *oc;
659 int i;
660
661 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
662
663 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
664 if (oc->_clk) {
665 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
666 oc->_clk->name);
667 clk_enable(oc->_clk);
668 }
669}
670
671static void _disable_optional_clocks(struct omap_hwmod *oh)
672{
673 struct omap_hwmod_opt_clk *oc;
674 int i;
675
676 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
677
678 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
679 if (oc->_clk) {
680 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
681 oc->_clk->name);
682 clk_disable(oc->_clk);
683 }
684}
685
63c85238
PW
686/**
687 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
688 * @oh: struct omap_hwmod *
689 *
690 * Returns the array index of the OCP slave port that the MPU
691 * addresses the device on, or -EINVAL upon error or not found.
692 */
01592df9 693static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 694{
63c85238
PW
695 int i;
696 int found = 0;
697
698 if (!oh || oh->slaves_cnt == 0)
699 return -EINVAL;
700
682fdc96
BC
701 for (i = 0; i < oh->slaves_cnt; i++) {
702 struct omap_hwmod_ocp_if *os = oh->slaves[i];
703
63c85238
PW
704 if (os->user & OCP_USER_MPU) {
705 found = 1;
706 break;
707 }
708 }
709
710 if (found)
711 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
712 oh->name, i);
713 else
714 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
715 oh->name);
716
717 return (found) ? i : -EINVAL;
718}
719
720/**
721 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
722 * @oh: struct omap_hwmod *
723 *
724 * Return the virtual address of the base of the register target of
725 * device @oh, or NULL on error.
726 */
01592df9 727static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
728{
729 struct omap_hwmod_ocp_if *os;
730 struct omap_hwmod_addr_space *mem;
731 int i;
732 int found = 0;
986a13f5 733 void __iomem *va_start;
63c85238
PW
734
735 if (!oh || oh->slaves_cnt == 0)
736 return NULL;
737
682fdc96 738 os = oh->slaves[index];
63c85238
PW
739
740 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
741 if (mem->flags & ADDR_TYPE_RT) {
742 found = 1;
743 break;
744 }
745 }
746
986a13f5
TL
747 if (found) {
748 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
749 if (!va_start) {
750 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
751 return NULL;
752 }
63c85238 753 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
754 oh->name, va_start);
755 } else {
63c85238
PW
756 pr_debug("omap_hwmod: %s: no MPU register target found\n",
757 oh->name);
986a13f5 758 }
63c85238 759
986a13f5 760 return (found) ? va_start : NULL;
63c85238
PW
761}
762
763/**
74ff3a68 764 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
765 * @oh: struct omap_hwmod *
766 *
767 * If module is marked as SWSUP_SIDLE, force the module out of slave
768 * idle; otherwise, configure it for smart-idle. If module is marked
769 * as SWSUP_MSUSPEND, force the module out of master standby;
770 * otherwise, configure it for smart-standby. No return value.
771 */
74ff3a68 772static void _enable_sysc(struct omap_hwmod *oh)
63c85238 773{
43b40992 774 u8 idlemode, sf;
63c85238
PW
775 u32 v;
776
43b40992 777 if (!oh->class->sysc)
63c85238
PW
778 return;
779
780 v = oh->_sysc_cache;
43b40992 781 sf = oh->class->sysc->sysc_flags;
63c85238 782
43b40992 783 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
784 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
785 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
786 _set_slave_idlemode(oh, idlemode, &v);
787 }
788
43b40992 789 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
790 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
791 idlemode = HWMOD_IDLEMODE_NO;
792 } else {
793 if (sf & SYSC_HAS_ENAWAKEUP)
794 _enable_wakeup(oh, &v);
795 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
796 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
797 else
798 idlemode = HWMOD_IDLEMODE_SMART;
799 }
63c85238
PW
800 _set_master_standbymode(oh, idlemode, &v);
801 }
802
a16b1f7f
PW
803 /*
804 * XXX The clock framework should handle this, by
805 * calling into this code. But this must wait until the
806 * clock structures are tagged with omap_hwmod entries
807 */
43b40992
PW
808 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
809 (sf & SYSC_HAS_CLOCKACTIVITY))
810 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 811
9980ce53
RN
812 /* If slave is in SMARTIDLE, also enable wakeup */
813 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
814 _enable_wakeup(oh, &v);
815
816 _write_sysconfig(v, oh);
78f26e87
HH
817
818 /*
819 * Set the autoidle bit only after setting the smartidle bit
820 * Setting this will not have any impact on the other modules.
821 */
822 if (sf & SYSC_HAS_AUTOIDLE) {
823 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
824 0 : 1;
825 _set_module_autoidle(oh, idlemode, &v);
826 _write_sysconfig(v, oh);
827 }
63c85238
PW
828}
829
830/**
74ff3a68 831 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
832 * @oh: struct omap_hwmod *
833 *
834 * If module is marked as SWSUP_SIDLE, force the module into slave
835 * idle; otherwise, configure it for smart-idle. If module is marked
836 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
837 * configure it for smart-standby. No return value.
838 */
74ff3a68 839static void _idle_sysc(struct omap_hwmod *oh)
63c85238 840{
43b40992 841 u8 idlemode, sf;
63c85238
PW
842 u32 v;
843
43b40992 844 if (!oh->class->sysc)
63c85238
PW
845 return;
846
847 v = oh->_sysc_cache;
43b40992 848 sf = oh->class->sysc->sysc_flags;
63c85238 849
43b40992 850 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
851 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
852 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
853 _set_slave_idlemode(oh, idlemode, &v);
854 }
855
43b40992 856 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
857 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
858 idlemode = HWMOD_IDLEMODE_FORCE;
859 } else {
860 if (sf & SYSC_HAS_ENAWAKEUP)
861 _enable_wakeup(oh, &v);
862 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
863 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
864 else
865 idlemode = HWMOD_IDLEMODE_SMART;
866 }
63c85238
PW
867 _set_master_standbymode(oh, idlemode, &v);
868 }
869
86009eb3
BC
870 /* If slave is in SMARTIDLE, also enable wakeup */
871 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
872 _enable_wakeup(oh, &v);
873
63c85238
PW
874 _write_sysconfig(v, oh);
875}
876
877/**
74ff3a68 878 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
879 * @oh: struct omap_hwmod *
880 *
881 * Force the module into slave idle and master suspend. No return
882 * value.
883 */
74ff3a68 884static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
885{
886 u32 v;
43b40992 887 u8 sf;
63c85238 888
43b40992 889 if (!oh->class->sysc)
63c85238
PW
890 return;
891
892 v = oh->_sysc_cache;
43b40992 893 sf = oh->class->sysc->sysc_flags;
63c85238 894
43b40992 895 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
896 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
897
43b40992 898 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
899 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
900
43b40992 901 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 902 _set_module_autoidle(oh, 1, &v);
63c85238
PW
903
904 _write_sysconfig(v, oh);
905}
906
907/**
908 * _lookup - find an omap_hwmod by name
909 * @name: find an omap_hwmod by name
910 *
911 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
912 */
913static struct omap_hwmod *_lookup(const char *name)
914{
915 struct omap_hwmod *oh, *temp_oh;
916
917 oh = NULL;
918
919 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
920 if (!strcmp(name, temp_oh->name)) {
921 oh = temp_oh;
922 break;
923 }
924 }
925
926 return oh;
927}
928
929/**
930 * _init_clocks - clk_get() all clocks associated with this hwmod
931 * @oh: struct omap_hwmod *
97d60162 932 * @data: not used; pass NULL
63c85238 933 *
a2debdbd 934 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
935 * Resolves all clock names embedded in the hwmod. Returns 0 on
936 * success, or a negative error code on failure.
63c85238 937 */
97d60162 938static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
939{
940 int ret = 0;
941
48d54f3f
PW
942 if (oh->_state != _HWMOD_STATE_REGISTERED)
943 return 0;
63c85238
PW
944
945 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
946
947 ret |= _init_main_clk(oh);
948 ret |= _init_interface_clks(oh);
949 ret |= _init_opt_clks(oh);
950
f5c1f84b
BC
951 if (!ret)
952 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 953
09c35f2f 954 return ret;
63c85238
PW
955}
956
957/**
958 * _wait_target_ready - wait for a module to leave slave idle
959 * @oh: struct omap_hwmod *
960 *
961 * Wait for a module @oh to leave slave idle. Returns 0 if the module
962 * does not have an IDLEST bit or if the module successfully leaves
963 * slave idle; otherwise, pass along the return value of the
964 * appropriate *_cm_wait_module_ready() function.
965 */
966static int _wait_target_ready(struct omap_hwmod *oh)
967{
968 struct omap_hwmod_ocp_if *os;
969 int ret;
970
971 if (!oh)
972 return -EINVAL;
973
974 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
975 return 0;
976
682fdc96 977 os = oh->slaves[oh->_mpu_port_index];
63c85238 978
33f7ec81 979 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
980 return 0;
981
982 /* XXX check module SIDLEMODE */
983
984 /* XXX check clock enable states */
985
986 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
987 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
988 oh->prcm.omap2.idlest_reg_id,
989 oh->prcm.omap2.idlest_idle_bit);
63c85238 990 } else if (cpu_is_omap44xx()) {
9a23dfe1 991 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
992 } else {
993 BUG();
994 };
995
996 return ret;
997}
998
5365efbe 999/**
cc1226e7 1000 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1001 * @oh: struct omap_hwmod *
1002 * @name: name of the reset line in the context of this hwmod
cc1226e7 1003 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1004 *
1005 * Return the bit position of the reset line that match the
1006 * input name. Return -ENOENT if not found.
1007 */
cc1226e7 1008static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1009 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1010{
1011 int i;
1012
1013 for (i = 0; i < oh->rst_lines_cnt; i++) {
1014 const char *rst_line = oh->rst_lines[i].name;
1015 if (!strcmp(rst_line, name)) {
cc1226e7 1016 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1017 ohri->st_shift = oh->rst_lines[i].st_shift;
1018 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1019 oh->name, __func__, rst_line, ohri->rst_shift,
1020 ohri->st_shift);
5365efbe 1021
cc1226e7 1022 return 0;
5365efbe
BC
1023 }
1024 }
1025
1026 return -ENOENT;
1027}
1028
1029/**
1030 * _assert_hardreset - assert the HW reset line of submodules
1031 * contained in the hwmod module.
1032 * @oh: struct omap_hwmod *
1033 * @name: name of the reset line to lookup and assert
1034 *
1035 * Some IP like dsp, ipu or iva contain processor that require
1036 * an HW reset line to be assert / deassert in order to enable fully
1037 * the IP.
1038 */
1039static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1040{
cc1226e7 1041 struct omap_hwmod_rst_info ohri;
1042 u8 ret;
5365efbe
BC
1043
1044 if (!oh)
1045 return -EINVAL;
1046
cc1226e7 1047 ret = _lookup_hardreset(oh, name, &ohri);
1048 if (IS_ERR_VALUE(ret))
1049 return ret;
5365efbe
BC
1050
1051 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1052 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1053 ohri.rst_shift);
5365efbe
BC
1054 else if (cpu_is_omap44xx())
1055 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1056 ohri.rst_shift);
5365efbe
BC
1057 else
1058 return -EINVAL;
1059}
1060
1061/**
1062 * _deassert_hardreset - deassert the HW reset line of submodules contained
1063 * in the hwmod module.
1064 * @oh: struct omap_hwmod *
1065 * @name: name of the reset line to look up and deassert
1066 *
1067 * Some IP like dsp, ipu or iva contain processor that require
1068 * an HW reset line to be assert / deassert in order to enable fully
1069 * the IP.
1070 */
1071static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1072{
cc1226e7 1073 struct omap_hwmod_rst_info ohri;
1074 int ret;
5365efbe
BC
1075
1076 if (!oh)
1077 return -EINVAL;
1078
cc1226e7 1079 ret = _lookup_hardreset(oh, name, &ohri);
1080 if (IS_ERR_VALUE(ret))
1081 return ret;
5365efbe 1082
cc1226e7 1083 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1084 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1085 ohri.rst_shift,
1086 ohri.st_shift);
1087 } else if (cpu_is_omap44xx()) {
1088 if (ohri.st_shift)
1089 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1090 oh->name, name);
1091 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1092 ohri.rst_shift);
1093 } else {
5365efbe 1094 return -EINVAL;
cc1226e7 1095 }
5365efbe 1096
cc1226e7 1097 if (ret == -EBUSY)
5365efbe
BC
1098 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1099
cc1226e7 1100 return ret;
5365efbe
BC
1101}
1102
1103/**
1104 * _read_hardreset - read the HW reset line state of submodules
1105 * contained in the hwmod module
1106 * @oh: struct omap_hwmod *
1107 * @name: name of the reset line to look up and read
1108 *
1109 * Return the state of the reset line.
1110 */
1111static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1112{
cc1226e7 1113 struct omap_hwmod_rst_info ohri;
1114 u8 ret;
5365efbe
BC
1115
1116 if (!oh)
1117 return -EINVAL;
1118
cc1226e7 1119 ret = _lookup_hardreset(oh, name, &ohri);
1120 if (IS_ERR_VALUE(ret))
1121 return ret;
5365efbe
BC
1122
1123 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1124 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1125 ohri.st_shift);
5365efbe
BC
1126 } else if (cpu_is_omap44xx()) {
1127 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1128 ohri.rst_shift);
5365efbe
BC
1129 } else {
1130 return -EINVAL;
1131 }
1132}
1133
63c85238 1134/**
bd36179e 1135 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1136 * @oh: struct omap_hwmod *
1137 *
1138 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1139 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1140 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1141 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1142 *
1143 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1144 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1145 * use the SYSCONFIG softreset bit to provide the status.
1146 *
bd36179e
PW
1147 * Note that some IP like McBSP do have reset control but don't have
1148 * reset status.
63c85238 1149 */
bd36179e 1150static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1151{
96835af9 1152 u32 v;
6f8b7ff5 1153 int c = 0;
96835af9 1154 int ret = 0;
63c85238 1155
43b40992 1156 if (!oh->class->sysc ||
2cb06814 1157 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1158 return -EINVAL;
1159
1160 /* clocks must be on for this operation */
1161 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1162 pr_warning("omap_hwmod: %s: reset can only be entered from "
1163 "enabled state\n", oh->name);
63c85238
PW
1164 return -EINVAL;
1165 }
1166
96835af9
BC
1167 /* For some modules, all optionnal clocks need to be enabled as well */
1168 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1169 _enable_optional_clocks(oh);
1170
bd36179e 1171 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1172
1173 v = oh->_sysc_cache;
96835af9
BC
1174 ret = _set_softreset(oh, &v);
1175 if (ret)
1176 goto dis_opt_clks;
63c85238
PW
1177 _write_sysconfig(v, oh);
1178
2cb06814 1179 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1180 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1181 oh->class->sysc->syss_offs)
1182 & SYSS_RESETDONE_MASK),
1183 MAX_MODULE_SOFTRESET_WAIT, c);
1184 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1185 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1186 oh->class->sysc->sysc_offs)
1187 & SYSC_TYPE2_SOFTRESET_MASK),
1188 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1189
5365efbe 1190 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1191 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1192 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1193 else
5365efbe 1194 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1195
1196 /*
1197 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1198 * _wait_target_ready() or _reset()
1199 */
1200
96835af9
BC
1201 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1202
1203dis_opt_clks:
1204 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1205 _disable_optional_clocks(oh);
1206
1207 return ret;
63c85238
PW
1208}
1209
bd36179e
PW
1210/**
1211 * _reset - reset an omap_hwmod
1212 * @oh: struct omap_hwmod *
1213 *
1214 * Resets an omap_hwmod @oh. The default software reset mechanism for
1215 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1216 * bit. However, some hwmods cannot be reset via this method: some
1217 * are not targets and therefore have no OCP header registers to
1218 * access; others (like the IVA) have idiosyncratic reset sequences.
1219 * So for these relatively rare cases, custom reset code can be
1220 * supplied in the struct omap_hwmod_class .reset function pointer.
1221 * Passes along the return value from either _reset() or the custom
1222 * reset function - these must return -EINVAL if the hwmod cannot be
1223 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1224 * the module did not reset in time, or 0 upon success.
1225 */
1226static int _reset(struct omap_hwmod *oh)
1227{
1228 int ret;
1229
1230 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1231
1232 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1233
1234 return ret;
1235}
1236
63c85238 1237/**
dc6d1cda 1238 * _enable - enable an omap_hwmod
63c85238
PW
1239 * @oh: struct omap_hwmod *
1240 *
1241 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1242 * register target. Returns -EINVAL if the hwmod is in the wrong
1243 * state or passes along the return value of _wait_target_ready().
63c85238 1244 */
dc6d1cda 1245static int _enable(struct omap_hwmod *oh)
63c85238
PW
1246{
1247 int r;
1248
1249 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1250 oh->_state != _HWMOD_STATE_IDLE &&
1251 oh->_state != _HWMOD_STATE_DISABLED) {
1252 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1253 "from initialized, idle, or disabled state\n", oh->name);
1254 return -EINVAL;
1255 }
1256
1257 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1258
5365efbe
BC
1259 /*
1260 * If an IP contains only one HW reset line, then de-assert it in order
1261 * to allow to enable the clocks. Otherwise the PRCM will return
1262 * Intransition status, and the init will failed.
1263 */
1264 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1265 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1266 _deassert_hardreset(oh, oh->rst_lines[0].name);
1267
8d9af88f 1268 /* Mux pins for device runtime if populated */
029268e4
TL
1269 if (oh->mux && (!oh->mux->enabled ||
1270 ((oh->_state == _HWMOD_STATE_IDLE) &&
1271 oh->mux->pads_dynamic)))
8d9af88f 1272 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1273
1274 _add_initiator_dep(oh, mpu_oh);
1275 _enable_clocks(oh);
1276
63c85238 1277 r = _wait_target_ready(oh);
9a23dfe1 1278 if (!r) {
63c85238
PW
1279 oh->_state = _HWMOD_STATE_ENABLED;
1280
9a23dfe1
BC
1281 /* Access the sysconfig only if the target is ready */
1282 if (oh->class->sysc) {
1283 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1284 _update_sysc_cache(oh);
74ff3a68 1285 _enable_sysc(oh);
9a23dfe1
BC
1286 }
1287 } else {
f2dd7e09 1288 _disable_clocks(oh);
9a23dfe1
BC
1289 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1290 oh->name, r);
1291 }
1292
63c85238
PW
1293 return r;
1294}
1295
1296/**
dc6d1cda 1297 * _idle - idle an omap_hwmod
63c85238
PW
1298 * @oh: struct omap_hwmod *
1299 *
1300 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1301 * no further work. Returns -EINVAL if the hwmod is in the wrong
1302 * state or returns 0.
63c85238 1303 */
dc6d1cda 1304static int _idle(struct omap_hwmod *oh)
63c85238
PW
1305{
1306 if (oh->_state != _HWMOD_STATE_ENABLED) {
1307 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1308 "enabled state\n", oh->name);
1309 return -EINVAL;
1310 }
1311
1312 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1313
43b40992 1314 if (oh->class->sysc)
74ff3a68 1315 _idle_sysc(oh);
63c85238
PW
1316 _del_initiator_dep(oh, mpu_oh);
1317 _disable_clocks(oh);
1318
8d9af88f 1319 /* Mux pins for device idle if populated */
029268e4 1320 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1321 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1322
63c85238
PW
1323 oh->_state = _HWMOD_STATE_IDLE;
1324
1325 return 0;
1326}
1327
9599217a
KVA
1328/**
1329 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1330 * @oh: struct omap_hwmod *
1331 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1332 *
1333 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1334 * local copy. Intended to be used by drivers that require
1335 * direct manipulation of the AUTOIDLE bits.
1336 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1337 * along the return value from _set_module_autoidle().
1338 *
1339 * Any users of this function should be scrutinized carefully.
1340 */
1341int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1342{
1343 u32 v;
1344 int retval = 0;
1345 unsigned long flags;
1346
1347 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1348 return -EINVAL;
1349
1350 spin_lock_irqsave(&oh->_lock, flags);
1351
1352 v = oh->_sysc_cache;
1353
1354 retval = _set_module_autoidle(oh, autoidle, &v);
1355
1356 if (!retval)
1357 _write_sysconfig(v, oh);
1358
1359 spin_unlock_irqrestore(&oh->_lock, flags);
1360
1361 return retval;
1362}
1363
63c85238
PW
1364/**
1365 * _shutdown - shutdown an omap_hwmod
1366 * @oh: struct omap_hwmod *
1367 *
1368 * Shut down an omap_hwmod @oh. This should be called when the driver
1369 * used for the hwmod is removed or unloaded or if the driver is not
1370 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1371 * state or returns 0.
1372 */
1373static int _shutdown(struct omap_hwmod *oh)
1374{
e4dc8f50
PW
1375 int ret;
1376 u8 prev_state;
1377
63c85238
PW
1378 if (oh->_state != _HWMOD_STATE_IDLE &&
1379 oh->_state != _HWMOD_STATE_ENABLED) {
1380 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1381 "from idle, or enabled state\n", oh->name);
1382 return -EINVAL;
1383 }
1384
1385 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1386
e4dc8f50
PW
1387 if (oh->class->pre_shutdown) {
1388 prev_state = oh->_state;
1389 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1390 _enable(oh);
e4dc8f50
PW
1391 ret = oh->class->pre_shutdown(oh);
1392 if (ret) {
1393 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1394 _idle(oh);
e4dc8f50
PW
1395 return ret;
1396 }
1397 }
1398
43b40992 1399 if (oh->class->sysc)
74ff3a68 1400 _shutdown_sysc(oh);
3827f949 1401
5365efbe
BC
1402 /*
1403 * If an IP contains only one HW reset line, then assert it
1404 * before disabling the clocks and shutting down the IP.
1405 */
1406 if (oh->rst_lines_cnt == 1)
1407 _assert_hardreset(oh, oh->rst_lines[0].name);
1408
3827f949
BC
1409 /* clocks and deps are already disabled in idle */
1410 if (oh->_state == _HWMOD_STATE_ENABLED) {
1411 _del_initiator_dep(oh, mpu_oh);
1412 /* XXX what about the other system initiators here? dma, dsp */
1413 _disable_clocks(oh);
1414 }
63c85238
PW
1415 /* XXX Should this code also force-disable the optional clocks? */
1416
8d9af88f
TL
1417 /* Mux pins to safe mode or use populated off mode values */
1418 if (oh->mux)
1419 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1420
1421 oh->_state = _HWMOD_STATE_DISABLED;
1422
1423 return 0;
1424}
1425
63c85238
PW
1426/**
1427 * _setup - do initial configuration of omap_hwmod
1428 * @oh: struct omap_hwmod *
1429 *
1430 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1431 * OCP_SYSCONFIG register. Returns 0.
63c85238 1432 */
97d60162 1433static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1434{
9a23dfe1 1435 int i, r;
2092e5cc 1436 u8 postsetup_state;
97d60162 1437
48d54f3f
PW
1438 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1439 return 0;
1440
63c85238
PW
1441 /* Set iclk autoidle mode */
1442 if (oh->slaves_cnt > 0) {
682fdc96
BC
1443 for (i = 0; i < oh->slaves_cnt; i++) {
1444 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1445 struct clk *c = os->_clk;
1446
4d3ae5a9 1447 if (!c)
63c85238
PW
1448 continue;
1449
1450 if (os->flags & OCPIF_SWSUP_IDLE) {
1451 /* XXX omap_iclk_deny_idle(c); */
1452 } else {
1453 /* XXX omap_iclk_allow_idle(c); */
1454 clk_enable(c);
1455 }
1456 }
1457 }
1458
1459 oh->_state = _HWMOD_STATE_INITIALIZED;
1460
5365efbe
BC
1461 /*
1462 * In the case of hwmod with hardreset that should not be
1463 * de-assert at boot time, we have to keep the module
1464 * initialized, because we cannot enable it properly with the
1465 * reset asserted. Exit without warning because that behavior is
1466 * expected.
1467 */
1468 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1469 return 0;
1470
dc6d1cda 1471 r = _enable(oh);
9a23dfe1
BC
1472 if (r) {
1473 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1474 oh->name, oh->_state);
1475 return 0;
1476 }
63c85238 1477
b835d014 1478 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1479 _reset(oh);
1480
b835d014 1481 /*
76e5589e 1482 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1483 * The _enable() function should be split to
76e5589e 1484 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1485 */
43b40992 1486 if (oh->class->sysc) {
b835d014 1487 _update_sysc_cache(oh);
74ff3a68 1488 _enable_sysc(oh);
b835d014
PW
1489 }
1490 }
63c85238 1491
2092e5cc
PW
1492 postsetup_state = oh->_postsetup_state;
1493 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1494 postsetup_state = _HWMOD_STATE_ENABLED;
1495
1496 /*
1497 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1498 * it should be set by the core code as a runtime flag during startup
1499 */
1500 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1501 (postsetup_state == _HWMOD_STATE_IDLE))
1502 postsetup_state = _HWMOD_STATE_ENABLED;
1503
1504 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1505 _idle(oh);
2092e5cc
PW
1506 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1507 _shutdown(oh);
1508 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1509 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1510 oh->name, postsetup_state);
63c85238
PW
1511
1512 return 0;
1513}
1514
63c85238 1515/**
0102b627 1516 * _register - register a struct omap_hwmod
63c85238
PW
1517 * @oh: struct omap_hwmod *
1518 *
43b40992
PW
1519 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1520 * already has been registered by the same name; -EINVAL if the
1521 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1522 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1523 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1524 * success.
63c85238
PW
1525 *
1526 * XXX The data should be copied into bootmem, so the original data
1527 * should be marked __initdata and freed after init. This would allow
1528 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1529 * that the copy process would be relatively complex due to the large number
1530 * of substructures.
1531 */
01592df9 1532static int __init _register(struct omap_hwmod *oh)
63c85238 1533{
569edd70 1534 int ms_id;
63c85238 1535
43b40992
PW
1536 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1537 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1538 return -EINVAL;
1539
63c85238
PW
1540 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1541
ce35b244
BC
1542 if (_lookup(oh->name))
1543 return -EEXIST;
63c85238
PW
1544
1545 ms_id = _find_mpu_port_index(oh);
e7c7d760 1546 if (!IS_ERR_VALUE(ms_id))
63c85238 1547 oh->_mpu_port_index = ms_id;
e7c7d760 1548 else
63c85238 1549 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1550
1551 list_add_tail(&oh->node, &omap_hwmod_list);
1552
dc6d1cda 1553 spin_lock_init(&oh->_lock);
2092e5cc 1554
63c85238
PW
1555 oh->_state = _HWMOD_STATE_REGISTERED;
1556
569edd70
PW
1557 /*
1558 * XXX Rather than doing a strcmp(), this should test a flag
1559 * set in the hwmod data, inserted by the autogenerator code.
1560 */
1561 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1562 mpu_oh = oh;
63c85238 1563
569edd70 1564 return 0;
63c85238
PW
1565}
1566
0102b627
BC
1567
1568/* Public functions */
1569
1570u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1571{
1572 if (oh->flags & HWMOD_16BIT_REG)
1573 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1574 else
1575 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1576}
1577
1578void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1579{
1580 if (oh->flags & HWMOD_16BIT_REG)
1581 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1582 else
1583 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1584}
1585
1586/**
1587 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1588 * @oh: struct omap_hwmod *
1589 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1590 *
1591 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1592 * local copy. Intended to be used by drivers that have some erratum
1593 * that requires direct manipulation of the SIDLEMODE bits. Returns
1594 * -EINVAL if @oh is null, or passes along the return value from
1595 * _set_slave_idlemode().
1596 *
1597 * XXX Does this function have any current users? If not, we should
1598 * remove it; it is better to let the rest of the hwmod code handle this.
1599 * Any users of this function should be scrutinized carefully.
1600 */
1601int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1602{
1603 u32 v;
1604 int retval = 0;
1605
1606 if (!oh)
1607 return -EINVAL;
1608
1609 v = oh->_sysc_cache;
1610
1611 retval = _set_slave_idlemode(oh, idlemode, &v);
1612 if (!retval)
1613 _write_sysconfig(v, oh);
1614
1615 return retval;
1616}
1617
63c85238
PW
1618/**
1619 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1620 * @name: name of the omap_hwmod to look up
1621 *
1622 * Given a @name of an omap_hwmod, return a pointer to the registered
1623 * struct omap_hwmod *, or NULL upon error.
1624 */
1625struct omap_hwmod *omap_hwmod_lookup(const char *name)
1626{
1627 struct omap_hwmod *oh;
1628
1629 if (!name)
1630 return NULL;
1631
63c85238 1632 oh = _lookup(name);
63c85238
PW
1633
1634 return oh;
1635}
1636
1637/**
1638 * omap_hwmod_for_each - call function for each registered omap_hwmod
1639 * @fn: pointer to a callback function
97d60162 1640 * @data: void * data to pass to callback function
63c85238
PW
1641 *
1642 * Call @fn for each registered omap_hwmod, passing @data to each
1643 * function. @fn must return 0 for success or any other value for
1644 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1645 * will stop and the non-zero return value will be passed to the
1646 * caller of omap_hwmod_for_each(). @fn is called with
1647 * omap_hwmod_for_each() held.
1648 */
97d60162
PW
1649int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1650 void *data)
63c85238
PW
1651{
1652 struct omap_hwmod *temp_oh;
30ebad9d 1653 int ret = 0;
63c85238
PW
1654
1655 if (!fn)
1656 return -EINVAL;
1657
63c85238 1658 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1659 ret = (*fn)(temp_oh, data);
63c85238
PW
1660 if (ret)
1661 break;
1662 }
63c85238
PW
1663
1664 return ret;
1665}
1666
63c85238 1667/**
550c8092 1668 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1669 * @ohs: pointer to an array of omap_hwmods to register
1670 *
1671 * Intended to be called early in boot before the clock framework is
1672 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1673 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1674 */
550c8092 1675int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1676{
bac1a0f0 1677 int r, i;
63c85238
PW
1678
1679 if (!ohs)
1680 return 0;
1681
bac1a0f0
PW
1682 i = 0;
1683 do {
1684 if (!omap_chip_is(ohs[i]->omap_chip))
1685 continue;
1686
1687 r = _register(ohs[i]);
1688 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1689 r);
1690 } while (ohs[++i]);
63c85238
PW
1691
1692 return 0;
1693}
1694
e7c7d760
TL
1695/*
1696 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1697 *
a2debdbd 1698 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1699 * Assumes the caller takes care of locking if needed.
63c85238 1700 */
e7c7d760
TL
1701static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1702{
48d54f3f
PW
1703 if (oh->_state != _HWMOD_STATE_REGISTERED)
1704 return 0;
1705
e7c7d760
TL
1706 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1707 return 0;
1708
1709 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1710 if (!oh->_mpu_rt_va)
1711 pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
1712 __func__, oh->name);
1713
1714 return 0;
1715}
1716
63c85238 1717/**
a2debdbd
PW
1718 * omap_hwmod_setup_one - set up a single hwmod
1719 * @oh_name: const char * name of the already-registered hwmod to set up
1720 *
1721 * Must be called after omap2_clk_init(). Resolves the struct clk
1722 * names to struct clk pointers for each registered omap_hwmod. Also
1723 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1724 * success.
1725 */
1726int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1727{
1728 struct omap_hwmod *oh;
1729 int r;
1730
a2debdbd
PW
1731 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1732
1733 if (!mpu_oh) {
1734 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1735 oh_name, MPU_INITIATOR_NAME);
63c85238 1736 return -EINVAL;
a2debdbd 1737 }
63c85238 1738
a2debdbd
PW
1739 oh = _lookup(oh_name);
1740 if (!oh) {
1741 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1742 return -EINVAL;
1743 }
63c85238 1744
a2debdbd
PW
1745 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1746 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1747
a2debdbd
PW
1748 r = _populate_mpu_rt_base(oh, NULL);
1749 if (IS_ERR_VALUE(r)) {
1750 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1751 return -EINVAL;
1752 }
1753
1754 r = _init_clocks(oh, NULL);
1755 if (IS_ERR_VALUE(r)) {
1756 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1757 return -EINVAL;
63c85238
PW
1758 }
1759
a2debdbd
PW
1760 _setup(oh, NULL);
1761
63c85238
PW
1762 return 0;
1763}
1764
1765/**
550c8092 1766 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
1767 *
1768 * Must be called after omap2_clk_init(). Resolves the struct clk names
1769 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 1770 * _setup() on each hwmod. Returns 0 upon success.
63c85238 1771 */
550c8092 1772static int __init omap_hwmod_setup_all(void)
63c85238
PW
1773{
1774 int r;
1775
569edd70
PW
1776 if (!mpu_oh) {
1777 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1778 __func__, MPU_INITIATOR_NAME);
1779 return -EINVAL;
1780 }
1781
e7c7d760 1782 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 1783
97d60162 1784 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
1785 WARN(IS_ERR_VALUE(r),
1786 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 1787
2092e5cc 1788 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1789
1790 return 0;
1791}
550c8092 1792core_initcall(omap_hwmod_setup_all);
63c85238 1793
63c85238
PW
1794/**
1795 * omap_hwmod_enable - enable an omap_hwmod
1796 * @oh: struct omap_hwmod *
1797 *
74ff3a68 1798 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1799 * Returns -EINVAL on error or passes along the return value from _enable().
1800 */
1801int omap_hwmod_enable(struct omap_hwmod *oh)
1802{
1803 int r;
dc6d1cda 1804 unsigned long flags;
63c85238
PW
1805
1806 if (!oh)
1807 return -EINVAL;
1808
dc6d1cda
PW
1809 spin_lock_irqsave(&oh->_lock, flags);
1810 r = _enable(oh);
1811 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1812
1813 return r;
1814}
1815
1816/**
1817 * omap_hwmod_idle - idle an omap_hwmod
1818 * @oh: struct omap_hwmod *
1819 *
74ff3a68 1820 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1821 * Returns -EINVAL on error or passes along the return value from _idle().
1822 */
1823int omap_hwmod_idle(struct omap_hwmod *oh)
1824{
dc6d1cda
PW
1825 unsigned long flags;
1826
63c85238
PW
1827 if (!oh)
1828 return -EINVAL;
1829
dc6d1cda
PW
1830 spin_lock_irqsave(&oh->_lock, flags);
1831 _idle(oh);
1832 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1833
1834 return 0;
1835}
1836
1837/**
1838 * omap_hwmod_shutdown - shutdown an omap_hwmod
1839 * @oh: struct omap_hwmod *
1840 *
74ff3a68 1841 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1842 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1843 * the return value from _shutdown().
1844 */
1845int omap_hwmod_shutdown(struct omap_hwmod *oh)
1846{
dc6d1cda
PW
1847 unsigned long flags;
1848
63c85238
PW
1849 if (!oh)
1850 return -EINVAL;
1851
dc6d1cda 1852 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1853 _shutdown(oh);
dc6d1cda 1854 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1855
1856 return 0;
1857}
1858
1859/**
1860 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1861 * @oh: struct omap_hwmod *oh
1862 *
1863 * Intended to be called by the omap_device code.
1864 */
1865int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1866{
dc6d1cda
PW
1867 unsigned long flags;
1868
1869 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1870 _enable_clocks(oh);
dc6d1cda 1871 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1872
1873 return 0;
1874}
1875
1876/**
1877 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1878 * @oh: struct omap_hwmod *oh
1879 *
1880 * Intended to be called by the omap_device code.
1881 */
1882int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1883{
dc6d1cda
PW
1884 unsigned long flags;
1885
1886 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1887 _disable_clocks(oh);
dc6d1cda 1888 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1889
1890 return 0;
1891}
1892
1893/**
1894 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1895 * @oh: struct omap_hwmod *oh
1896 *
1897 * Intended to be called by drivers and core code when all posted
1898 * writes to a device must complete before continuing further
1899 * execution (for example, after clearing some device IRQSTATUS
1900 * register bits)
1901 *
1902 * XXX what about targets with multiple OCP threads?
1903 */
1904void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1905{
1906 BUG_ON(!oh);
1907
43b40992 1908 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1909 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1910 "device configuration\n", oh->name);
1911 return;
1912 }
1913
1914 /*
1915 * Forces posted writes to complete on the OCP thread handling
1916 * register writes
1917 */
cc7a1d2a 1918 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1919}
1920
1921/**
1922 * omap_hwmod_reset - reset the hwmod
1923 * @oh: struct omap_hwmod *
1924 *
1925 * Under some conditions, a driver may wish to reset the entire device.
1926 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1927 * the return value from _reset().
63c85238
PW
1928 */
1929int omap_hwmod_reset(struct omap_hwmod *oh)
1930{
1931 int r;
dc6d1cda 1932 unsigned long flags;
63c85238 1933
9b579114 1934 if (!oh)
63c85238
PW
1935 return -EINVAL;
1936
dc6d1cda 1937 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1938 r = _reset(oh);
dc6d1cda 1939 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1940
1941 return r;
1942}
1943
1944/**
1945 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1946 * @oh: struct omap_hwmod *
1947 * @res: pointer to the first element of an array of struct resource to fill
1948 *
1949 * Count the number of struct resource array elements necessary to
1950 * contain omap_hwmod @oh resources. Intended to be called by code
1951 * that registers omap_devices. Intended to be used to determine the
1952 * size of a dynamically-allocated struct resource array, before
1953 * calling omap_hwmod_fill_resources(). Returns the number of struct
1954 * resource array elements needed.
1955 *
1956 * XXX This code is not optimized. It could attempt to merge adjacent
1957 * resource IDs.
1958 *
1959 */
1960int omap_hwmod_count_resources(struct omap_hwmod *oh)
1961{
1962 int ret, i;
1963
9ee9fff9 1964 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1965
1966 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1967 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1968
1969 return ret;
1970}
1971
1972/**
1973 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1974 * @oh: struct omap_hwmod *
1975 * @res: pointer to the first element of an array of struct resource to fill
1976 *
1977 * Fill the struct resource array @res with resource data from the
1978 * omap_hwmod @oh. Intended to be called by code that registers
1979 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1980 * number of array elements filled.
1981 */
1982int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1983{
1984 int i, j;
1985 int r = 0;
1986
1987 /* For each IRQ, DMA, memory area, fill in array.*/
1988
1989 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1990 (res + r)->name = (oh->mpu_irqs + i)->name;
1991 (res + r)->start = (oh->mpu_irqs + i)->irq;
1992 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1993 (res + r)->flags = IORESOURCE_IRQ;
1994 r++;
1995 }
1996
9ee9fff9
BC
1997 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1998 (res + r)->name = (oh->sdma_reqs + i)->name;
1999 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2000 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2001 (res + r)->flags = IORESOURCE_DMA;
2002 r++;
2003 }
2004
2005 for (i = 0; i < oh->slaves_cnt; i++) {
2006 struct omap_hwmod_ocp_if *os;
2007
682fdc96 2008 os = oh->slaves[i];
63c85238
PW
2009
2010 for (j = 0; j < os->addr_cnt; j++) {
cd503802 2011 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2012 (res + r)->start = (os->addr + j)->pa_start;
2013 (res + r)->end = (os->addr + j)->pa_end;
2014 (res + r)->flags = IORESOURCE_MEM;
2015 r++;
2016 }
2017 }
2018
2019 return r;
2020}
2021
2022/**
2023 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2024 * @oh: struct omap_hwmod *
2025 *
2026 * Return the powerdomain pointer associated with the OMAP module
2027 * @oh's main clock. If @oh does not have a main clk, return the
2028 * powerdomain associated with the interface clock associated with the
2029 * module's MPU port. (XXX Perhaps this should use the SDMA port
2030 * instead?) Returns NULL on error, or a struct powerdomain * on
2031 * success.
2032 */
2033struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2034{
2035 struct clk *c;
2036
2037 if (!oh)
2038 return NULL;
2039
2040 if (oh->_clk) {
2041 c = oh->_clk;
2042 } else {
2043 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2044 return NULL;
2045 c = oh->slaves[oh->_mpu_port_index]->_clk;
2046 }
2047
d5647c18
TG
2048 if (!c->clkdm)
2049 return NULL;
2050
63c85238
PW
2051 return c->clkdm->pwrdm.ptr;
2052
2053}
2054
db2a60bf
PW
2055/**
2056 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2057 * @oh: struct omap_hwmod *
2058 *
2059 * Returns the virtual address corresponding to the beginning of the
2060 * module's register target, in the address range that is intended to
2061 * be used by the MPU. Returns the virtual address upon success or NULL
2062 * upon error.
2063 */
2064void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2065{
2066 if (!oh)
2067 return NULL;
2068
2069 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2070 return NULL;
2071
2072 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2073 return NULL;
2074
2075 return oh->_mpu_rt_va;
2076}
2077
63c85238
PW
2078/**
2079 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2080 * @oh: struct omap_hwmod *
2081 * @init_oh: struct omap_hwmod * (initiator)
2082 *
2083 * Add a sleep dependency between the initiator @init_oh and @oh.
2084 * Intended to be called by DSP/Bridge code via platform_data for the
2085 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2086 * code needs to add/del initiator dependencies dynamically
2087 * before/after accessing a device. Returns the return value from
2088 * _add_initiator_dep().
2089 *
2090 * XXX Keep a usecount in the clockdomain code
2091 */
2092int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2093 struct omap_hwmod *init_oh)
2094{
2095 return _add_initiator_dep(oh, init_oh);
2096}
2097
2098/*
2099 * XXX what about functions for drivers to save/restore ocp_sysconfig
2100 * for context save/restore operations?
2101 */
2102
2103/**
2104 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2105 * @oh: struct omap_hwmod *
2106 * @init_oh: struct omap_hwmod * (initiator)
2107 *
2108 * Remove a sleep dependency between the initiator @init_oh and @oh.
2109 * Intended to be called by DSP/Bridge code via platform_data for the
2110 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2111 * code needs to add/del initiator dependencies dynamically
2112 * before/after accessing a device. Returns the return value from
2113 * _del_initiator_dep().
2114 *
2115 * XXX Keep a usecount in the clockdomain code
2116 */
2117int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2118 struct omap_hwmod *init_oh)
2119{
2120 return _del_initiator_dep(oh, init_oh);
2121}
2122
63c85238
PW
2123/**
2124 * omap_hwmod_enable_wakeup - allow device to wake up the system
2125 * @oh: struct omap_hwmod *
2126 *
2127 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2128 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2129 * registers to cause the PRCM to receive wakeup events from the
2130 * module. Does not set any wakeup routing registers beyond this
2131 * point - if the module is to wake up any other module or subsystem,
2132 * that must be set separately. Called by omap_device code. Returns
2133 * -EINVAL on error or 0 upon success.
2134 */
2135int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2136{
dc6d1cda 2137 unsigned long flags;
5a7ddcbd 2138 u32 v;
dc6d1cda 2139
43b40992
PW
2140 if (!oh->class->sysc ||
2141 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2142 return -EINVAL;
2143
dc6d1cda 2144 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2145 v = oh->_sysc_cache;
2146 _enable_wakeup(oh, &v);
2147 _write_sysconfig(v, oh);
dc6d1cda 2148 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2149
2150 return 0;
2151}
2152
2153/**
2154 * omap_hwmod_disable_wakeup - prevent device from waking the system
2155 * @oh: struct omap_hwmod *
2156 *
2157 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2158 * from sending wakeups to the PRCM. Eventually this should clear
2159 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2160 * from the module. Does not set any wakeup routing registers beyond
2161 * this point - if the module is to wake up any other module or
2162 * subsystem, that must be set separately. Called by omap_device
2163 * code. Returns -EINVAL on error or 0 upon success.
2164 */
2165int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2166{
dc6d1cda 2167 unsigned long flags;
5a7ddcbd 2168 u32 v;
dc6d1cda 2169
43b40992
PW
2170 if (!oh->class->sysc ||
2171 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2172 return -EINVAL;
2173
dc6d1cda 2174 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2175 v = oh->_sysc_cache;
2176 _disable_wakeup(oh, &v);
2177 _write_sysconfig(v, oh);
dc6d1cda 2178 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2179
2180 return 0;
2181}
43b40992 2182
aee48e3c
PW
2183/**
2184 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2185 * contained in the hwmod module.
2186 * @oh: struct omap_hwmod *
2187 * @name: name of the reset line to lookup and assert
2188 *
2189 * Some IP like dsp, ipu or iva contain processor that require
2190 * an HW reset line to be assert / deassert in order to enable fully
2191 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2192 * yet supported on this OMAP; otherwise, passes along the return value
2193 * from _assert_hardreset().
2194 */
2195int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2196{
2197 int ret;
dc6d1cda 2198 unsigned long flags;
aee48e3c
PW
2199
2200 if (!oh)
2201 return -EINVAL;
2202
dc6d1cda 2203 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2204 ret = _assert_hardreset(oh, name);
dc6d1cda 2205 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2206
2207 return ret;
2208}
2209
2210/**
2211 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2212 * contained in the hwmod module.
2213 * @oh: struct omap_hwmod *
2214 * @name: name of the reset line to look up and deassert
2215 *
2216 * Some IP like dsp, ipu or iva contain processor that require
2217 * an HW reset line to be assert / deassert in order to enable fully
2218 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2219 * yet supported on this OMAP; otherwise, passes along the return value
2220 * from _deassert_hardreset().
2221 */
2222int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2223{
2224 int ret;
dc6d1cda 2225 unsigned long flags;
aee48e3c
PW
2226
2227 if (!oh)
2228 return -EINVAL;
2229
dc6d1cda 2230 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2231 ret = _deassert_hardreset(oh, name);
dc6d1cda 2232 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2233
2234 return ret;
2235}
2236
2237/**
2238 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2239 * contained in the hwmod module
2240 * @oh: struct omap_hwmod *
2241 * @name: name of the reset line to look up and read
2242 *
2243 * Return the current state of the hwmod @oh's reset line named @name:
2244 * returns -EINVAL upon parameter error or if this operation
2245 * is unsupported on the current OMAP; otherwise, passes along the return
2246 * value from _read_hardreset().
2247 */
2248int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2249{
2250 int ret;
dc6d1cda 2251 unsigned long flags;
aee48e3c
PW
2252
2253 if (!oh)
2254 return -EINVAL;
2255
dc6d1cda 2256 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2257 ret = _read_hardreset(oh, name);
dc6d1cda 2258 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2259
2260 return ret;
2261}
2262
2263
43b40992
PW
2264/**
2265 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2266 * @classname: struct omap_hwmod_class name to search for
2267 * @fn: callback function pointer to call for each hwmod in class @classname
2268 * @user: arbitrary context data to pass to the callback function
2269 *
ce35b244
BC
2270 * For each omap_hwmod of class @classname, call @fn.
2271 * If the callback function returns something other than
43b40992
PW
2272 * zero, the iterator is terminated, and the callback function's return
2273 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2274 * if @classname or @fn are NULL, or passes back the error code from @fn.
2275 */
2276int omap_hwmod_for_each_by_class(const char *classname,
2277 int (*fn)(struct omap_hwmod *oh,
2278 void *user),
2279 void *user)
2280{
2281 struct omap_hwmod *temp_oh;
2282 int ret = 0;
2283
2284 if (!classname || !fn)
2285 return -EINVAL;
2286
2287 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2288 __func__, classname);
2289
43b40992
PW
2290 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2291 if (!strcmp(temp_oh->class->name, classname)) {
2292 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2293 __func__, temp_oh->name);
2294 ret = (*fn)(temp_oh, user);
2295 if (ret)
2296 break;
2297 }
2298 }
2299
43b40992
PW
2300 if (ret)
2301 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2302 __func__, ret);
2303
2304 return ret;
2305}
2306
2092e5cc
PW
2307/**
2308 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2309 * @oh: struct omap_hwmod *
2310 * @state: state that _setup() should leave the hwmod in
2311 *
550c8092 2312 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2313 * (called by omap_hwmod_setup_*()). Only valid to call between
2314 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2315 * 0 upon success or -EINVAL if there is a problem with the arguments
2316 * or if the hwmod is in the wrong state.
2092e5cc
PW
2317 */
2318int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2319{
2320 int ret;
dc6d1cda 2321 unsigned long flags;
2092e5cc
PW
2322
2323 if (!oh)
2324 return -EINVAL;
2325
2326 if (state != _HWMOD_STATE_DISABLED &&
2327 state != _HWMOD_STATE_ENABLED &&
2328 state != _HWMOD_STATE_IDLE)
2329 return -EINVAL;
2330
dc6d1cda 2331 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2332
2333 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2334 ret = -EINVAL;
2335 goto ohsps_unlock;
2336 }
2337
2338 oh->_postsetup_state = state;
2339 ret = 0;
2340
2341ohsps_unlock:
dc6d1cda 2342 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2343
2344 return ret;
2345}
c80705aa
KH
2346
2347/**
2348 * omap_hwmod_get_context_loss_count - get lost context count
2349 * @oh: struct omap_hwmod *
2350 *
2351 * Query the powerdomain of of @oh to get the context loss
2352 * count for this device.
2353 *
2354 * Returns the context loss count of the powerdomain assocated with @oh
2355 * upon success, or zero if no powerdomain exists for @oh.
2356 */
2357u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2358{
2359 struct powerdomain *pwrdm;
2360 int ret = 0;
2361
2362 pwrdm = omap_hwmod_get_pwrdm(oh);
2363 if (pwrdm)
2364 ret = pwrdm_get_context_loss_count(pwrdm);
2365
2366 return ret;
2367}
43b01643
PW
2368
2369/**
2370 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2371 * @oh: struct omap_hwmod *
2372 *
2373 * Prevent the hwmod @oh from being reset during the setup process.
2374 * Intended for use by board-*.c files on boards with devices that
2375 * cannot tolerate being reset. Must be called before the hwmod has
2376 * been set up. Returns 0 upon success or negative error code upon
2377 * failure.
2378 */
2379int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2380{
2381 if (!oh)
2382 return -EINVAL;
2383
2384 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2385 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2386 oh->name);
2387 return -EINVAL;
2388 }
2389
2390 oh->flags |= HWMOD_INIT_NO_RESET;
2391
2392 return 0;
2393}