ARM: OMAP4: hwmod: drop extra cpu_is check from _wait_target_disable()
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
63c85238
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
4e65331c 142#include "common.h"
ce491cf8 143#include <plat/cpu.h>
1540f214 144#include "clockdomain.h"
72e06d08 145#include "powerdomain.h"
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146#include <plat/clock.h>
147#include <plat/omap_hwmod.h>
5365efbe 148#include <plat/prcm.h>
63c85238 149
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
59fb659b 152#include "prm2xxx_3xxx.h"
d198b514 153#include "prm44xx.h"
eaac329d 154#include "prminst44xx.h"
8d9af88f 155#include "mux.h"
63c85238 156
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157/* Maximum microseconds to wait for OMAP module to softreset */
158#define MAX_MODULE_SOFTRESET_WAIT 10000
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159
160/* Name of the OMAP hwmod for the MPU */
5c2c0296 161#define MPU_INITIATOR_NAME "mpu"
63c85238 162
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163/*
164 * Number of struct omap_hwmod_link records per struct
165 * omap_hwmod_ocp_if record (master->slave and slave->master)
166 */
167#define LINKS_PER_OCP_IF 2
168
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169/**
170 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
171 * @enable_module: function to enable a module (via MODULEMODE)
172 * @disable_module: function to disable a module (via MODULEMODE)
173 *
174 * XXX Eventually this functionality will be hidden inside the PRM/CM
175 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
176 * conditionals in this code.
177 */
178struct omap_hwmod_soc_ops {
179 void (*enable_module)(struct omap_hwmod *oh);
180 int (*disable_module)(struct omap_hwmod *oh);
181};
182
183/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
184static struct omap_hwmod_soc_ops soc_ops;
185
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186/* omap_hwmod_list contains all registered struct omap_hwmods */
187static LIST_HEAD(omap_hwmod_list);
188
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189/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
190static struct omap_hwmod *mpu_oh;
191
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192/*
193 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
194 * allocated from - used to reduce the number of small memory
195 * allocations, which has a significant impact on performance
196 */
197static struct omap_hwmod_link *linkspace;
198
199/*
200 * free_ls, max_ls: array indexes into linkspace; representing the
201 * next free struct omap_hwmod_link index, and the maximum number of
202 * struct omap_hwmod_link records allocated (respectively)
203 */
204static unsigned short free_ls, max_ls, ls_supp;
63c85238 205
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206/* inited: set to true once the hwmod code is initialized */
207static bool inited;
208
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209/* Private functions */
210
5d95dde7 211/**
11cd4b94 212 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 213 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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214 * @i: pointer to the index of the element pointed to by @p in the list
215 *
216 * Return a pointer to the struct omap_hwmod_ocp_if record
217 * containing the struct list_head pointed to by @p, and increment
218 * @p such that a future call to this routine will return the next
219 * record.
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220 */
221static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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222 int *i)
223{
224 struct omap_hwmod_ocp_if *oi;
225
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226 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
227 *p = (*p)->next;
2221b5cd 228
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229 *i = *i + 1;
230
231 return oi;
232}
233
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234/**
235 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
236 * @oh: struct omap_hwmod *
237 *
238 * Load the current value of the hwmod OCP_SYSCONFIG register into the
239 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
240 * OCP_SYSCONFIG register or 0 upon success.
241 */
242static int _update_sysc_cache(struct omap_hwmod *oh)
243{
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244 if (!oh->class->sysc) {
245 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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246 return -EINVAL;
247 }
248
249 /* XXX ensure module interface clock is up */
250
cc7a1d2a 251 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 252
43b40992 253 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 254 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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255
256 return 0;
257}
258
259/**
260 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
261 * @v: OCP_SYSCONFIG value to write
262 * @oh: struct omap_hwmod *
263 *
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264 * Write @v into the module class' OCP_SYSCONFIG register, if it has
265 * one. No return value.
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266 */
267static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
268{
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269 if (!oh->class->sysc) {
270 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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271 return;
272 }
273
274 /* XXX ensure module interface clock is up */
275
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276 /* Module might have lost context, always update cache and register */
277 oh->_sysc_cache = v;
278 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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279}
280
281/**
282 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
283 * @oh: struct omap_hwmod *
284 * @standbymode: MIDLEMODE field bits
285 * @v: pointer to register contents to modify
286 *
287 * Update the master standby mode bits in @v to be @standbymode for
288 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
289 * upon error or 0 upon success.
290 */
291static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
292 u32 *v)
293{
358f0e63
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294 u32 mstandby_mask;
295 u8 mstandby_shift;
296
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297 if (!oh->class->sysc ||
298 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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299 return -EINVAL;
300
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301 if (!oh->class->sysc->sysc_fields) {
302 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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303 return -EINVAL;
304 }
305
43b40992 306 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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307 mstandby_mask = (0x3 << mstandby_shift);
308
309 *v &= ~mstandby_mask;
310 *v |= __ffs(standbymode) << mstandby_shift;
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311
312 return 0;
313}
314
315/**
316 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
317 * @oh: struct omap_hwmod *
318 * @idlemode: SIDLEMODE field bits
319 * @v: pointer to register contents to modify
320 *
321 * Update the slave idle mode bits in @v to be @idlemode for the @oh
322 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
323 * or 0 upon success.
324 */
325static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
326{
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327 u32 sidle_mask;
328 u8 sidle_shift;
329
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330 if (!oh->class->sysc ||
331 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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332 return -EINVAL;
333
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334 if (!oh->class->sysc->sysc_fields) {
335 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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336 return -EINVAL;
337 }
338
43b40992 339 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
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340 sidle_mask = (0x3 << sidle_shift);
341
342 *v &= ~sidle_mask;
343 *v |= __ffs(idlemode) << sidle_shift;
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344
345 return 0;
346}
347
348/**
349 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
350 * @oh: struct omap_hwmod *
351 * @clockact: CLOCKACTIVITY field bits
352 * @v: pointer to register contents to modify
353 *
354 * Update the clockactivity mode bits in @v to be @clockact for the
355 * @oh hwmod. Used for additional powersaving on some modules. Does
356 * not write to the hardware. Returns -EINVAL upon error or 0 upon
357 * success.
358 */
359static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
360{
358f0e63
TG
361 u32 clkact_mask;
362 u8 clkact_shift;
363
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364 if (!oh->class->sysc ||
365 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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366 return -EINVAL;
367
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368 if (!oh->class->sysc->sysc_fields) {
369 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
370 return -EINVAL;
371 }
372
43b40992 373 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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374 clkact_mask = (0x3 << clkact_shift);
375
376 *v &= ~clkact_mask;
377 *v |= clockact << clkact_shift;
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378
379 return 0;
380}
381
382/**
383 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
384 * @oh: struct omap_hwmod *
385 * @v: pointer to register contents to modify
386 *
387 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
388 * error or 0 upon success.
389 */
390static int _set_softreset(struct omap_hwmod *oh, u32 *v)
391{
358f0e63
TG
392 u32 softrst_mask;
393
43b40992
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394 if (!oh->class->sysc ||
395 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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396 return -EINVAL;
397
43b40992
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398 if (!oh->class->sysc->sysc_fields) {
399 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
400 return -EINVAL;
401 }
402
43b40992 403 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
404
405 *v |= softrst_mask;
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406
407 return 0;
408}
409
726072e5
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410/**
411 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
412 * @oh: struct omap_hwmod *
413 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
414 * @v: pointer to register contents to modify
415 *
416 * Update the module autoidle bit in @v to be @autoidle for the @oh
417 * hwmod. The autoidle bit controls whether the module can gate
418 * internal clocks automatically when it isn't doing anything; the
419 * exact function of this bit varies on a per-module basis. This
420 * function does not write to the hardware. Returns -EINVAL upon
421 * error or 0 upon success.
422 */
423static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
424 u32 *v)
425{
358f0e63
TG
426 u32 autoidle_mask;
427 u8 autoidle_shift;
428
43b40992
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429 if (!oh->class->sysc ||
430 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
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431 return -EINVAL;
432
43b40992
PW
433 if (!oh->class->sysc->sysc_fields) {
434 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
435 return -EINVAL;
436 }
437
43b40992 438 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 439 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
440
441 *v &= ~autoidle_mask;
442 *v |= autoidle << autoidle_shift;
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443
444 return 0;
445}
446
eceec009
G
447/**
448 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
449 * @oh: struct omap_hwmod *
450 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
451 *
452 * Set or clear the I/O pad wakeup flag in the mux entries for the
453 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
454 * in memory. If the hwmod is currently idled, and the new idle
455 * values don't match the previous ones, this function will also
456 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
457 * currently idled, this function won't touch the hardware: the new
458 * mux settings are written to the SCM PADCTRL registers when the
459 * hwmod is idled. No return value.
460 */
461static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
462{
463 struct omap_device_pad *pad;
464 bool change = false;
465 u16 prev_idle;
466 int j;
467
468 if (!oh->mux || !oh->mux->enabled)
469 return;
470
471 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
472 pad = oh->mux->pads_dynamic[j];
473
474 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
475 continue;
476
477 prev_idle = pad->idle;
478
479 if (set_wake)
480 pad->idle |= OMAP_WAKEUP_EN;
481 else
482 pad->idle &= ~OMAP_WAKEUP_EN;
483
484 if (prev_idle != pad->idle)
485 change = true;
486 }
487
488 if (change && oh->_state == _HWMOD_STATE_IDLE)
489 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
490}
491
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492/**
493 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
494 * @oh: struct omap_hwmod *
495 *
496 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
497 * upon error or 0 upon success.
498 */
5a7ddcbd 499static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 500{
43b40992 501 if (!oh->class->sysc ||
86009eb3 502 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
503 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
504 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
505 return -EINVAL;
506
43b40992
PW
507 if (!oh->class->sysc->sysc_fields) {
508 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
509 return -EINVAL;
510 }
511
1fe74113
BC
512 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
513 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 514
86009eb3
BC
515 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
516 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
517 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
518 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 519
63c85238
PW
520 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
521
522 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
523
524 return 0;
525}
526
527/**
528 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
529 * @oh: struct omap_hwmod *
530 *
531 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
532 * upon error or 0 upon success.
533 */
5a7ddcbd 534static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 535{
43b40992 536 if (!oh->class->sysc ||
86009eb3 537 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
538 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
539 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
540 return -EINVAL;
541
43b40992
PW
542 if (!oh->class->sysc->sysc_fields) {
543 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
544 return -EINVAL;
545 }
546
1fe74113
BC
547 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
548 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 549
86009eb3
BC
550 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
551 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
552 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
553 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 554
63c85238
PW
555 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
556
557 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
558
559 return 0;
560}
561
562/**
563 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
564 * @oh: struct omap_hwmod *
565 *
566 * Prevent the hardware module @oh from entering idle while the
567 * hardare module initiator @init_oh is active. Useful when a module
568 * will be accessed by a particular initiator (e.g., if a module will
569 * be accessed by the IVA, there should be a sleepdep between the IVA
570 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
571 * mode. If the clockdomain is marked as not needing autodeps, return
572 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
573 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
574 */
575static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
576{
577 if (!oh->_clk)
578 return -EINVAL;
579
570b54c7
PW
580 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
581 return 0;
582
55ed9694 583 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
584}
585
586/**
587 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
588 * @oh: struct omap_hwmod *
589 *
590 * Allow the hardware module @oh to enter idle while the hardare
591 * module initiator @init_oh is active. Useful when a module will not
592 * be accessed by a particular initiator (e.g., if a module will not
593 * be accessed by the IVA, there should be no sleepdep between the IVA
594 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
595 * mode. If the clockdomain is marked as not needing autodeps, return
596 * 0 without doing anything. Returns -EINVAL upon error or passes
597 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
598 */
599static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
600{
601 if (!oh->_clk)
602 return -EINVAL;
603
570b54c7
PW
604 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
605 return 0;
606
55ed9694 607 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
608}
609
610/**
611 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
612 * @oh: struct omap_hwmod *
613 *
614 * Called from _init_clocks(). Populates the @oh _clk (main
615 * functional clock pointer) if a main_clk is present. Returns 0 on
616 * success or -EINVAL on error.
617 */
618static int _init_main_clk(struct omap_hwmod *oh)
619{
63c85238
PW
620 int ret = 0;
621
50ebdac2 622 if (!oh->main_clk)
63c85238
PW
623 return 0;
624
63403384 625 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 626 if (!oh->_clk) {
20383d82
BC
627 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
628 oh->name, oh->main_clk);
63403384 629 return -EINVAL;
dc75925d 630 }
63c85238 631
63403384
BC
632 if (!oh->_clk->clkdm)
633 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
634 oh->main_clk, oh->_clk->name);
81d7c6ff 635
63c85238
PW
636 return ret;
637}
638
639/**
887adeac 640 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
641 * @oh: struct omap_hwmod *
642 *
643 * Called from _init_clocks(). Populates the @oh OCP slave interface
644 * clock pointers. Returns 0 on success or -EINVAL on error.
645 */
646static int _init_interface_clks(struct omap_hwmod *oh)
647{
5d95dde7 648 struct omap_hwmod_ocp_if *os;
11cd4b94 649 struct list_head *p;
63c85238 650 struct clk *c;
5d95dde7 651 int i = 0;
63c85238
PW
652 int ret = 0;
653
11cd4b94 654 p = oh->slave_ports.next;
2221b5cd 655
5d95dde7 656 while (i < oh->slaves_cnt) {
11cd4b94 657 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 658 if (!os->clk)
63c85238
PW
659 continue;
660
50ebdac2 661 c = omap_clk_get_by_name(os->clk);
dc75925d 662 if (!c) {
20383d82
BC
663 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
664 oh->name, os->clk);
63c85238 665 ret = -EINVAL;
dc75925d 666 }
63c85238
PW
667 os->_clk = c;
668 }
669
670 return ret;
671}
672
673/**
674 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
675 * @oh: struct omap_hwmod *
676 *
677 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
678 * clock pointers. Returns 0 on success or -EINVAL on error.
679 */
680static int _init_opt_clks(struct omap_hwmod *oh)
681{
682 struct omap_hwmod_opt_clk *oc;
683 struct clk *c;
684 int i;
685 int ret = 0;
686
687 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 688 c = omap_clk_get_by_name(oc->clk);
dc75925d 689 if (!c) {
20383d82
BC
690 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
691 oh->name, oc->clk);
63c85238 692 ret = -EINVAL;
dc75925d 693 }
63c85238
PW
694 oc->_clk = c;
695 }
696
697 return ret;
698}
699
700/**
701 * _enable_clocks - enable hwmod main clock and interface clocks
702 * @oh: struct omap_hwmod *
703 *
704 * Enables all clocks necessary for register reads and writes to succeed
705 * on the hwmod @oh. Returns 0.
706 */
707static int _enable_clocks(struct omap_hwmod *oh)
708{
5d95dde7 709 struct omap_hwmod_ocp_if *os;
11cd4b94 710 struct list_head *p;
5d95dde7 711 int i = 0;
63c85238
PW
712
713 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
714
4d3ae5a9 715 if (oh->_clk)
63c85238
PW
716 clk_enable(oh->_clk);
717
11cd4b94 718 p = oh->slave_ports.next;
2221b5cd 719
5d95dde7 720 while (i < oh->slaves_cnt) {
11cd4b94 721 os = _fetch_next_ocp_if(&p, &i);
63c85238 722
5d95dde7
PW
723 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
724 clk_enable(os->_clk);
63c85238
PW
725 }
726
727 /* The opt clocks are controlled by the device driver. */
728
729 return 0;
730}
731
732/**
733 * _disable_clocks - disable hwmod main clock and interface clocks
734 * @oh: struct omap_hwmod *
735 *
736 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
737 */
738static int _disable_clocks(struct omap_hwmod *oh)
739{
5d95dde7 740 struct omap_hwmod_ocp_if *os;
11cd4b94 741 struct list_head *p;
5d95dde7 742 int i = 0;
63c85238
PW
743
744 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
745
4d3ae5a9 746 if (oh->_clk)
63c85238
PW
747 clk_disable(oh->_clk);
748
11cd4b94 749 p = oh->slave_ports.next;
2221b5cd 750
5d95dde7 751 while (i < oh->slaves_cnt) {
11cd4b94 752 os = _fetch_next_ocp_if(&p, &i);
63c85238 753
5d95dde7
PW
754 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
755 clk_disable(os->_clk);
63c85238
PW
756 }
757
758 /* The opt clocks are controlled by the device driver. */
759
760 return 0;
761}
762
96835af9
BC
763static void _enable_optional_clocks(struct omap_hwmod *oh)
764{
765 struct omap_hwmod_opt_clk *oc;
766 int i;
767
768 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
769
770 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
771 if (oc->_clk) {
772 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
773 oc->_clk->name);
774 clk_enable(oc->_clk);
775 }
776}
777
778static void _disable_optional_clocks(struct omap_hwmod *oh)
779{
780 struct omap_hwmod_opt_clk *oc;
781 int i;
782
783 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
784
785 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
786 if (oc->_clk) {
787 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
788 oc->_clk->name);
789 clk_disable(oc->_clk);
790 }
791}
792
45c38252 793/**
3d9f0327 794 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
795 * @oh: struct omap_hwmod *
796 *
797 * Enables the PRCM module mode related to the hwmod @oh.
798 * No return value.
799 */
3d9f0327 800static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 801{
45c38252
BC
802 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
803 return;
804
3d9f0327
KH
805 pr_debug("omap_hwmod: %s: %s: %d\n",
806 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
807
808 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
809 oh->clkdm->prcm_partition,
810 oh->clkdm->cm_inst,
811 oh->clkdm->clkdm_offs,
812 oh->prcm.omap4.clkctrl_offs);
813}
814
815/**
bfc141e3
BC
816 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
817 * @oh: struct omap_hwmod *
818 *
819 * Wait for a module @oh to enter slave idle. Returns 0 if the module
820 * does not have an IDLEST bit or if the module successfully enters
821 * slave idle; otherwise, pass along the return value of the
822 * appropriate *_cm*_wait_module_idle() function.
823 */
824static int _omap4_wait_target_disable(struct omap_hwmod *oh)
825{
bfc141e3
BC
826 if (!oh)
827 return -EINVAL;
828
829 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
830 return 0;
831
832 if (oh->flags & HWMOD_NO_IDLEST)
833 return 0;
834
835 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
836 oh->clkdm->cm_inst,
837 oh->clkdm->clkdm_offs,
838 oh->prcm.omap4.clkctrl_offs);
839}
840
212738a4
PW
841/**
842 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
843 * @oh: struct omap_hwmod *oh
844 *
845 * Count and return the number of MPU IRQs associated with the hwmod
846 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
847 * NULL.
848 */
849static int _count_mpu_irqs(struct omap_hwmod *oh)
850{
851 struct omap_hwmod_irq_info *ohii;
852 int i = 0;
853
854 if (!oh || !oh->mpu_irqs)
855 return 0;
856
857 do {
858 ohii = &oh->mpu_irqs[i++];
859 } while (ohii->irq != -1);
860
cc1b0765 861 return i-1;
212738a4
PW
862}
863
bc614958
PW
864/**
865 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
866 * @oh: struct omap_hwmod *oh
867 *
868 * Count and return the number of SDMA request lines associated with
869 * the hwmod @oh. Used to allocate struct resource data. Returns 0
870 * if @oh is NULL.
871 */
872static int _count_sdma_reqs(struct omap_hwmod *oh)
873{
874 struct omap_hwmod_dma_info *ohdi;
875 int i = 0;
876
877 if (!oh || !oh->sdma_reqs)
878 return 0;
879
880 do {
881 ohdi = &oh->sdma_reqs[i++];
882 } while (ohdi->dma_req != -1);
883
cc1b0765 884 return i-1;
bc614958
PW
885}
886
78183f3f
PW
887/**
888 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
889 * @oh: struct omap_hwmod *oh
890 *
891 * Count and return the number of address space ranges associated with
892 * the hwmod @oh. Used to allocate struct resource data. Returns 0
893 * if @oh is NULL.
894 */
895static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
896{
897 struct omap_hwmod_addr_space *mem;
898 int i = 0;
899
900 if (!os || !os->addr)
901 return 0;
902
903 do {
904 mem = &os->addr[i++];
905 } while (mem->pa_start != mem->pa_end);
906
cc1b0765 907 return i-1;
78183f3f
PW
908}
909
5e8370f1
PW
910/**
911 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
912 * @oh: struct omap_hwmod * to operate on
913 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
914 * @irq: pointer to an unsigned int to store the MPU IRQ number to
915 *
916 * Retrieve a MPU hardware IRQ line number named by @name associated
917 * with the IP block pointed to by @oh. The IRQ number will be filled
918 * into the address pointed to by @dma. When @name is non-null, the
919 * IRQ line number associated with the named entry will be returned.
920 * If @name is null, the first matching entry will be returned. Data
921 * order is not meaningful in hwmod data, so callers are strongly
922 * encouraged to use a non-null @name whenever possible to avoid
923 * unpredictable effects if hwmod data is later added that causes data
924 * ordering to change. Returns 0 upon success or a negative error
925 * code upon error.
926 */
927static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
928 unsigned int *irq)
929{
930 int i;
931 bool found = false;
932
933 if (!oh->mpu_irqs)
934 return -ENOENT;
935
936 i = 0;
937 while (oh->mpu_irqs[i].irq != -1) {
938 if (name == oh->mpu_irqs[i].name ||
939 !strcmp(name, oh->mpu_irqs[i].name)) {
940 found = true;
941 break;
942 }
943 i++;
944 }
945
946 if (!found)
947 return -ENOENT;
948
949 *irq = oh->mpu_irqs[i].irq;
950
951 return 0;
952}
953
954/**
955 * _get_sdma_req_by_name - fetch SDMA request line ID by name
956 * @oh: struct omap_hwmod * to operate on
957 * @name: pointer to the name of the SDMA request line to fetch (optional)
958 * @dma: pointer to an unsigned int to store the request line ID to
959 *
960 * Retrieve an SDMA request line ID named by @name on the IP block
961 * pointed to by @oh. The ID will be filled into the address pointed
962 * to by @dma. When @name is non-null, the request line ID associated
963 * with the named entry will be returned. If @name is null, the first
964 * matching entry will be returned. Data order is not meaningful in
965 * hwmod data, so callers are strongly encouraged to use a non-null
966 * @name whenever possible to avoid unpredictable effects if hwmod
967 * data is later added that causes data ordering to change. Returns 0
968 * upon success or a negative error code upon error.
969 */
970static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
971 unsigned int *dma)
972{
973 int i;
974 bool found = false;
975
976 if (!oh->sdma_reqs)
977 return -ENOENT;
978
979 i = 0;
980 while (oh->sdma_reqs[i].dma_req != -1) {
981 if (name == oh->sdma_reqs[i].name ||
982 !strcmp(name, oh->sdma_reqs[i].name)) {
983 found = true;
984 break;
985 }
986 i++;
987 }
988
989 if (!found)
990 return -ENOENT;
991
992 *dma = oh->sdma_reqs[i].dma_req;
993
994 return 0;
995}
996
997/**
998 * _get_addr_space_by_name - fetch address space start & end by name
999 * @oh: struct omap_hwmod * to operate on
1000 * @name: pointer to the name of the address space to fetch (optional)
1001 * @pa_start: pointer to a u32 to store the starting address to
1002 * @pa_end: pointer to a u32 to store the ending address to
1003 *
1004 * Retrieve address space start and end addresses for the IP block
1005 * pointed to by @oh. The data will be filled into the addresses
1006 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1007 * address space data associated with the named entry will be
1008 * returned. If @name is null, the first matching entry will be
1009 * returned. Data order is not meaningful in hwmod data, so callers
1010 * are strongly encouraged to use a non-null @name whenever possible
1011 * to avoid unpredictable effects if hwmod data is later added that
1012 * causes data ordering to change. Returns 0 upon success or a
1013 * negative error code upon error.
1014 */
1015static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1016 u32 *pa_start, u32 *pa_end)
1017{
1018 int i, j;
1019 struct omap_hwmod_ocp_if *os;
2221b5cd 1020 struct list_head *p = NULL;
5e8370f1
PW
1021 bool found = false;
1022
11cd4b94 1023 p = oh->slave_ports.next;
2221b5cd 1024
5d95dde7
PW
1025 i = 0;
1026 while (i < oh->slaves_cnt) {
11cd4b94 1027 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1028
1029 if (!os->addr)
1030 return -ENOENT;
1031
1032 j = 0;
1033 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1034 if (name == os->addr[j].name ||
1035 !strcmp(name, os->addr[j].name)) {
1036 found = true;
1037 break;
1038 }
1039 j++;
1040 }
1041
1042 if (found)
1043 break;
1044 }
1045
1046 if (!found)
1047 return -ENOENT;
1048
1049 *pa_start = os->addr[j].pa_start;
1050 *pa_end = os->addr[j].pa_end;
1051
1052 return 0;
1053}
1054
63c85238 1055/**
24dbc213 1056 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1057 * @oh: struct omap_hwmod *
1058 *
24dbc213
PW
1059 * Determines the array index of the OCP slave port that the MPU uses
1060 * to address the device, and saves it into the struct omap_hwmod.
1061 * Intended to be called during hwmod registration only. No return
1062 * value.
63c85238 1063 */
24dbc213 1064static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1065{
24dbc213 1066 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1067 struct list_head *p;
5d95dde7 1068 int i = 0;
63c85238 1069
5d95dde7 1070 if (!oh)
24dbc213
PW
1071 return;
1072
1073 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1074
11cd4b94 1075 p = oh->slave_ports.next;
2221b5cd 1076
5d95dde7 1077 while (i < oh->slaves_cnt) {
11cd4b94 1078 os = _fetch_next_ocp_if(&p, &i);
63c85238 1079 if (os->user & OCP_USER_MPU) {
2221b5cd 1080 oh->_mpu_port = os;
24dbc213 1081 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1082 break;
1083 }
1084 }
1085
24dbc213 1086 return;
63c85238
PW
1087}
1088
2d6141ba
PW
1089/**
1090 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1091 * @oh: struct omap_hwmod *
1092 *
1093 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1094 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1095 * communicate with the IP block. This interface need not be directly
1096 * connected to the MPU (and almost certainly is not), but is directly
1097 * connected to the IP block represented by @oh. Returns a pointer
1098 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1099 * error or if there does not appear to be a path from the MPU to this
1100 * IP block.
1101 */
1102static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1103{
1104 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1105 return NULL;
1106
11cd4b94 1107 return oh->_mpu_port;
2d6141ba
PW
1108};
1109
63c85238 1110/**
c9aafd23 1111 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1112 * @oh: struct omap_hwmod *
1113 *
c9aafd23
PW
1114 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1115 * the register target MPU address space; or returns NULL upon error.
63c85238 1116 */
c9aafd23 1117static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1118{
1119 struct omap_hwmod_ocp_if *os;
1120 struct omap_hwmod_addr_space *mem;
c9aafd23 1121 int found = 0, i = 0;
63c85238 1122
2d6141ba 1123 os = _find_mpu_rt_port(oh);
24dbc213 1124 if (!os || !os->addr)
78183f3f
PW
1125 return NULL;
1126
1127 do {
1128 mem = &os->addr[i++];
1129 if (mem->flags & ADDR_TYPE_RT)
63c85238 1130 found = 1;
78183f3f 1131 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1132
c9aafd23 1133 return (found) ? mem : NULL;
63c85238
PW
1134}
1135
1136/**
74ff3a68 1137 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1138 * @oh: struct omap_hwmod *
1139 *
1140 * If module is marked as SWSUP_SIDLE, force the module out of slave
1141 * idle; otherwise, configure it for smart-idle. If module is marked
1142 * as SWSUP_MSUSPEND, force the module out of master standby;
1143 * otherwise, configure it for smart-standby. No return value.
1144 */
74ff3a68 1145static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1146{
43b40992 1147 u8 idlemode, sf;
63c85238
PW
1148 u32 v;
1149
43b40992 1150 if (!oh->class->sysc)
63c85238
PW
1151 return;
1152
1153 v = oh->_sysc_cache;
43b40992 1154 sf = oh->class->sysc->sysc_flags;
63c85238 1155
43b40992 1156 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1157 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1158 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1159 _set_slave_idlemode(oh, idlemode, &v);
1160 }
1161
43b40992 1162 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1163 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1164 idlemode = HWMOD_IDLEMODE_NO;
1165 } else {
1166 if (sf & SYSC_HAS_ENAWAKEUP)
1167 _enable_wakeup(oh, &v);
1168 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1169 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1170 else
1171 idlemode = HWMOD_IDLEMODE_SMART;
1172 }
63c85238
PW
1173 _set_master_standbymode(oh, idlemode, &v);
1174 }
1175
a16b1f7f
PW
1176 /*
1177 * XXX The clock framework should handle this, by
1178 * calling into this code. But this must wait until the
1179 * clock structures are tagged with omap_hwmod entries
1180 */
43b40992
PW
1181 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1182 (sf & SYSC_HAS_CLOCKACTIVITY))
1183 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1184
9980ce53
RN
1185 /* If slave is in SMARTIDLE, also enable wakeup */
1186 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1187 _enable_wakeup(oh, &v);
1188
1189 _write_sysconfig(v, oh);
78f26e87
HH
1190
1191 /*
1192 * Set the autoidle bit only after setting the smartidle bit
1193 * Setting this will not have any impact on the other modules.
1194 */
1195 if (sf & SYSC_HAS_AUTOIDLE) {
1196 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1197 0 : 1;
1198 _set_module_autoidle(oh, idlemode, &v);
1199 _write_sysconfig(v, oh);
1200 }
63c85238
PW
1201}
1202
1203/**
74ff3a68 1204 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1205 * @oh: struct omap_hwmod *
1206 *
1207 * If module is marked as SWSUP_SIDLE, force the module into slave
1208 * idle; otherwise, configure it for smart-idle. If module is marked
1209 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1210 * configure it for smart-standby. No return value.
1211 */
74ff3a68 1212static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1213{
43b40992 1214 u8 idlemode, sf;
63c85238
PW
1215 u32 v;
1216
43b40992 1217 if (!oh->class->sysc)
63c85238
PW
1218 return;
1219
1220 v = oh->_sysc_cache;
43b40992 1221 sf = oh->class->sysc->sysc_flags;
63c85238 1222
43b40992 1223 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1224 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1225 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1226 _set_slave_idlemode(oh, idlemode, &v);
1227 }
1228
43b40992 1229 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1230 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1231 idlemode = HWMOD_IDLEMODE_FORCE;
1232 } else {
1233 if (sf & SYSC_HAS_ENAWAKEUP)
1234 _enable_wakeup(oh, &v);
1235 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1236 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1237 else
1238 idlemode = HWMOD_IDLEMODE_SMART;
1239 }
63c85238
PW
1240 _set_master_standbymode(oh, idlemode, &v);
1241 }
1242
86009eb3
BC
1243 /* If slave is in SMARTIDLE, also enable wakeup */
1244 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1245 _enable_wakeup(oh, &v);
1246
63c85238
PW
1247 _write_sysconfig(v, oh);
1248}
1249
1250/**
74ff3a68 1251 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1252 * @oh: struct omap_hwmod *
1253 *
1254 * Force the module into slave idle and master suspend. No return
1255 * value.
1256 */
74ff3a68 1257static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1258{
1259 u32 v;
43b40992 1260 u8 sf;
63c85238 1261
43b40992 1262 if (!oh->class->sysc)
63c85238
PW
1263 return;
1264
1265 v = oh->_sysc_cache;
43b40992 1266 sf = oh->class->sysc->sysc_flags;
63c85238 1267
43b40992 1268 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1269 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1270
43b40992 1271 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1272 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1273
43b40992 1274 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1275 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1276
1277 _write_sysconfig(v, oh);
1278}
1279
1280/**
1281 * _lookup - find an omap_hwmod by name
1282 * @name: find an omap_hwmod by name
1283 *
1284 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1285 */
1286static struct omap_hwmod *_lookup(const char *name)
1287{
1288 struct omap_hwmod *oh, *temp_oh;
1289
1290 oh = NULL;
1291
1292 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1293 if (!strcmp(name, temp_oh->name)) {
1294 oh = temp_oh;
1295 break;
1296 }
1297 }
1298
1299 return oh;
1300}
6ae76997
BC
1301/**
1302 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1303 * @oh: struct omap_hwmod *
1304 *
1305 * Convert a clockdomain name stored in a struct omap_hwmod into a
1306 * clockdomain pointer, and save it into the struct omap_hwmod.
1307 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1308 */
1309static int _init_clkdm(struct omap_hwmod *oh)
1310{
1311 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1312 return 0;
1313
1314 if (!oh->clkdm_name) {
1315 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1316 return -EINVAL;
1317 }
1318
1319 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1320 if (!oh->clkdm) {
1321 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1322 oh->name, oh->clkdm_name);
1323 return -EINVAL;
1324 }
1325
1326 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1327 oh->name, oh->clkdm_name);
1328
1329 return 0;
1330}
63c85238
PW
1331
1332/**
6ae76997
BC
1333 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1334 * well the clockdomain.
63c85238 1335 * @oh: struct omap_hwmod *
97d60162 1336 * @data: not used; pass NULL
63c85238 1337 *
a2debdbd 1338 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1339 * Resolves all clock names embedded in the hwmod. Returns 0 on
1340 * success, or a negative error code on failure.
63c85238 1341 */
97d60162 1342static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1343{
1344 int ret = 0;
1345
48d54f3f
PW
1346 if (oh->_state != _HWMOD_STATE_REGISTERED)
1347 return 0;
63c85238
PW
1348
1349 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1350
1351 ret |= _init_main_clk(oh);
1352 ret |= _init_interface_clks(oh);
1353 ret |= _init_opt_clks(oh);
6ae76997 1354 ret |= _init_clkdm(oh);
63c85238 1355
f5c1f84b
BC
1356 if (!ret)
1357 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1358 else
1359 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1360
09c35f2f 1361 return ret;
63c85238
PW
1362}
1363
1364/**
1365 * _wait_target_ready - wait for a module to leave slave idle
1366 * @oh: struct omap_hwmod *
1367 *
1368 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1369 * does not have an IDLEST bit or if the module successfully leaves
1370 * slave idle; otherwise, pass along the return value of the
d0f0631d 1371 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1372 */
1373static int _wait_target_ready(struct omap_hwmod *oh)
1374{
1375 struct omap_hwmod_ocp_if *os;
1376 int ret;
1377
1378 if (!oh)
1379 return -EINVAL;
1380
2d6141ba 1381 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1382 return 0;
1383
2d6141ba
PW
1384 os = _find_mpu_rt_port(oh);
1385 if (!os)
63c85238
PW
1386 return 0;
1387
1388 /* XXX check module SIDLEMODE */
1389
1390 /* XXX check clock enable states */
1391
1392 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1393 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1394 oh->prcm.omap2.idlest_reg_id,
1395 oh->prcm.omap2.idlest_idle_bit);
63c85238 1396 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1397 if (!oh->clkdm)
1398 return -EINVAL;
1399
1400 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1401 oh->clkdm->cm_inst,
1402 oh->clkdm->clkdm_offs,
1403 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1404 } else {
1405 BUG();
1406 };
1407
1408 return ret;
1409}
1410
5365efbe 1411/**
cc1226e7 1412 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1413 * @oh: struct omap_hwmod *
1414 * @name: name of the reset line in the context of this hwmod
cc1226e7 1415 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1416 *
1417 * Return the bit position of the reset line that match the
1418 * input name. Return -ENOENT if not found.
1419 */
cc1226e7 1420static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1421 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1422{
1423 int i;
1424
1425 for (i = 0; i < oh->rst_lines_cnt; i++) {
1426 const char *rst_line = oh->rst_lines[i].name;
1427 if (!strcmp(rst_line, name)) {
cc1226e7 1428 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1429 ohri->st_shift = oh->rst_lines[i].st_shift;
1430 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1431 oh->name, __func__, rst_line, ohri->rst_shift,
1432 ohri->st_shift);
5365efbe 1433
cc1226e7 1434 return 0;
5365efbe
BC
1435 }
1436 }
1437
1438 return -ENOENT;
1439}
1440
1441/**
1442 * _assert_hardreset - assert the HW reset line of submodules
1443 * contained in the hwmod module.
1444 * @oh: struct omap_hwmod *
1445 * @name: name of the reset line to lookup and assert
1446 *
1447 * Some IP like dsp, ipu or iva contain processor that require
1448 * an HW reset line to be assert / deassert in order to enable fully
1449 * the IP.
1450 */
1451static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1452{
cc1226e7 1453 struct omap_hwmod_rst_info ohri;
1454 u8 ret;
5365efbe
BC
1455
1456 if (!oh)
1457 return -EINVAL;
1458
cc1226e7 1459 ret = _lookup_hardreset(oh, name, &ohri);
1460 if (IS_ERR_VALUE(ret))
1461 return ret;
5365efbe
BC
1462
1463 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1464 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1465 ohri.rst_shift);
5365efbe 1466 else if (cpu_is_omap44xx())
eaac329d
BC
1467 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1468 oh->clkdm->pwrdm.ptr->prcm_partition,
1469 oh->clkdm->pwrdm.ptr->prcm_offs,
1470 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1471 else
1472 return -EINVAL;
1473}
1474
1475/**
1476 * _deassert_hardreset - deassert the HW reset line of submodules contained
1477 * in the hwmod module.
1478 * @oh: struct omap_hwmod *
1479 * @name: name of the reset line to look up and deassert
1480 *
1481 * Some IP like dsp, ipu or iva contain processor that require
1482 * an HW reset line to be assert / deassert in order to enable fully
1483 * the IP.
1484 */
1485static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1486{
cc1226e7 1487 struct omap_hwmod_rst_info ohri;
1488 int ret;
5365efbe
BC
1489
1490 if (!oh)
1491 return -EINVAL;
1492
cc1226e7 1493 ret = _lookup_hardreset(oh, name, &ohri);
1494 if (IS_ERR_VALUE(ret))
1495 return ret;
5365efbe 1496
cc1226e7 1497 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1498 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1499 ohri.rst_shift,
1500 ohri.st_shift);
1501 } else if (cpu_is_omap44xx()) {
1502 if (ohri.st_shift)
1503 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1504 oh->name, name);
eaac329d
BC
1505 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1506 oh->clkdm->pwrdm.ptr->prcm_partition,
1507 oh->clkdm->pwrdm.ptr->prcm_offs,
1508 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1509 } else {
5365efbe 1510 return -EINVAL;
cc1226e7 1511 }
5365efbe 1512
cc1226e7 1513 if (ret == -EBUSY)
5365efbe
BC
1514 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1515
cc1226e7 1516 return ret;
5365efbe
BC
1517}
1518
1519/**
1520 * _read_hardreset - read the HW reset line state of submodules
1521 * contained in the hwmod module
1522 * @oh: struct omap_hwmod *
1523 * @name: name of the reset line to look up and read
1524 *
1525 * Return the state of the reset line.
1526 */
1527static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1528{
cc1226e7 1529 struct omap_hwmod_rst_info ohri;
1530 u8 ret;
5365efbe
BC
1531
1532 if (!oh)
1533 return -EINVAL;
1534
cc1226e7 1535 ret = _lookup_hardreset(oh, name, &ohri);
1536 if (IS_ERR_VALUE(ret))
1537 return ret;
5365efbe
BC
1538
1539 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1540 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1541 ohri.st_shift);
5365efbe 1542 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1543 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1544 oh->clkdm->pwrdm.ptr->prcm_partition,
1545 oh->clkdm->pwrdm.ptr->prcm_offs,
1546 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1547 } else {
1548 return -EINVAL;
1549 }
1550}
1551
747834ab
PW
1552/**
1553 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1554 * @oh: struct omap_hwmod *
1555 *
1556 * If any hardreset line associated with @oh is asserted, then return true.
1557 * Otherwise, if @oh has no hardreset lines associated with it, or if
1558 * no hardreset lines associated with @oh are asserted, then return false.
1559 * This function is used to avoid executing some parts of the IP block
1560 * enable/disable sequence if a hardreset line is set.
1561 */
1562static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1563{
1564 int i;
1565
1566 if (oh->rst_lines_cnt == 0)
1567 return false;
1568
1569 for (i = 0; i < oh->rst_lines_cnt; i++)
1570 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1571 return true;
1572
1573 return false;
1574}
1575
1576/**
1577 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1578 * @oh: struct omap_hwmod *
1579 *
1580 * Disable the PRCM module mode related to the hwmod @oh.
1581 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1582 */
1583static int _omap4_disable_module(struct omap_hwmod *oh)
1584{
1585 int v;
1586
747834ab
PW
1587 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1588 return -EINVAL;
1589
1590 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1591
1592 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1593 oh->clkdm->cm_inst,
1594 oh->clkdm->clkdm_offs,
1595 oh->prcm.omap4.clkctrl_offs);
1596
1597 if (_are_any_hardreset_lines_asserted(oh))
1598 return 0;
1599
1600 v = _omap4_wait_target_disable(oh);
1601 if (v)
1602 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1603 oh->name);
1604
1605 return 0;
1606}
1607
63c85238 1608/**
bd36179e 1609 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1610 * @oh: struct omap_hwmod *
1611 *
1612 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1613 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1614 * reset this way, -EINVAL if the hwmod is in the wrong state,
1615 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1616 *
1617 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1618 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1619 * use the SYSCONFIG softreset bit to provide the status.
1620 *
bd36179e
PW
1621 * Note that some IP like McBSP do have reset control but don't have
1622 * reset status.
63c85238 1623 */
bd36179e 1624static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1625{
387ca5bf 1626 u32 v, softrst_mask;
6f8b7ff5 1627 int c = 0;
96835af9 1628 int ret = 0;
63c85238 1629
43b40992 1630 if (!oh->class->sysc ||
2cb06814 1631 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1632 return -ENOENT;
63c85238
PW
1633
1634 /* clocks must be on for this operation */
1635 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1636 pr_warning("omap_hwmod: %s: reset can only be entered from "
1637 "enabled state\n", oh->name);
63c85238
PW
1638 return -EINVAL;
1639 }
1640
96835af9
BC
1641 /* For some modules, all optionnal clocks need to be enabled as well */
1642 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1643 _enable_optional_clocks(oh);
1644
bd36179e 1645 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1646
1647 v = oh->_sysc_cache;
96835af9
BC
1648 ret = _set_softreset(oh, &v);
1649 if (ret)
1650 goto dis_opt_clks;
63c85238
PW
1651 _write_sysconfig(v, oh);
1652
d99de7f5
FGL
1653 if (oh->class->sysc->srst_udelay)
1654 udelay(oh->class->sysc->srst_udelay);
1655
2cb06814 1656 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1657 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1658 oh->class->sysc->syss_offs)
1659 & SYSS_RESETDONE_MASK),
1660 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1661 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1662 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1663 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1664 oh->class->sysc->sysc_offs)
387ca5bf 1665 & softrst_mask),
2cb06814 1666 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1667 }
63c85238 1668
5365efbe 1669 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1670 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1671 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1672 else
5365efbe 1673 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1674
1675 /*
1676 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1677 * _wait_target_ready() or _reset()
1678 */
1679
96835af9
BC
1680 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1681
1682dis_opt_clks:
1683 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1684 _disable_optional_clocks(oh);
1685
1686 return ret;
63c85238
PW
1687}
1688
bd36179e
PW
1689/**
1690 * _reset - reset an omap_hwmod
1691 * @oh: struct omap_hwmod *
1692 *
30e105c0
PW
1693 * Resets an omap_hwmod @oh. If the module has a custom reset
1694 * function pointer defined, then call it to reset the IP block, and
1695 * pass along its return value to the caller. Otherwise, if the IP
1696 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1697 * associated with it, call a function to reset the IP block via that
1698 * method, and pass along the return value to the caller. Finally, if
1699 * the IP block has some hardreset lines associated with it, assert
1700 * all of those, but do _not_ deassert them. (This is because driver
1701 * authors have expressed an apparent requirement to control the
1702 * deassertion of the hardreset lines themselves.)
1703 *
1704 * The default software reset mechanism for most OMAP IP blocks is
1705 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1706 * hwmods cannot be reset via this method. Some are not targets and
1707 * therefore have no OCP header registers to access. Others (like the
1708 * IVA) have idiosyncratic reset sequences. So for these relatively
1709 * rare cases, custom reset code can be supplied in the struct
1710 * omap_hwmod_class .reset function pointer. Passes along the return
1711 * value from either _ocp_softreset() or the custom reset function -
1712 * these must return -EINVAL if the hwmod cannot be reset this way or
1713 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1714 * not reset in time, or 0 upon success.
bd36179e
PW
1715 */
1716static int _reset(struct omap_hwmod *oh)
1717{
30e105c0 1718 int i, r;
bd36179e
PW
1719
1720 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1721
30e105c0
PW
1722 if (oh->class->reset) {
1723 r = oh->class->reset(oh);
1724 } else {
1725 if (oh->rst_lines_cnt > 0) {
1726 for (i = 0; i < oh->rst_lines_cnt; i++)
1727 _assert_hardreset(oh, oh->rst_lines[i].name);
1728 return 0;
1729 } else {
1730 r = _ocp_softreset(oh);
1731 if (r == -ENOENT)
1732 r = 0;
1733 }
1734 }
1735
9c8b0ec7 1736 /*
30e105c0
PW
1737 * OCP_SYSCONFIG bits need to be reprogrammed after a
1738 * softreset. The _enable() function should be split to avoid
1739 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1740 */
2800852a
RN
1741 if (oh->class->sysc) {
1742 _update_sysc_cache(oh);
1743 _enable_sysc(oh);
1744 }
1745
30e105c0 1746 return r;
bd36179e
PW
1747}
1748
63c85238 1749/**
dc6d1cda 1750 * _enable - enable an omap_hwmod
63c85238
PW
1751 * @oh: struct omap_hwmod *
1752 *
1753 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1754 * register target. Returns -EINVAL if the hwmod is in the wrong
1755 * state or passes along the return value of _wait_target_ready().
63c85238 1756 */
dc6d1cda 1757static int _enable(struct omap_hwmod *oh)
63c85238 1758{
747834ab 1759 int r;
665d0013 1760 int hwsup = 0;
63c85238 1761
34617e2a
BC
1762 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1763
aacf0941 1764 /*
64813c3f
PW
1765 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1766 * state at init. Now that someone is really trying to enable
1767 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1768 */
1769 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1770 /*
1771 * If the caller has mux data populated, do the mux'ing
1772 * which wouldn't have been done as part of the _enable()
1773 * done during setup.
1774 */
1775 if (oh->mux)
1776 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1777
1778 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1779 return 0;
1780 }
1781
63c85238
PW
1782 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1783 oh->_state != _HWMOD_STATE_IDLE &&
1784 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1785 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1786 oh->name);
63c85238
PW
1787 return -EINVAL;
1788 }
1789
31f62866 1790 /*
747834ab
PW
1791 * If an IP block contains HW reset lines and any of them are
1792 * asserted, we let integration code associated with that
1793 * block handle the enable. We've received very little
1794 * information on what those driver authors need, and until
1795 * detailed information is provided and the driver code is
1796 * posted to the public lists, this is probably the best we
1797 * can do.
31f62866 1798 */
747834ab
PW
1799 if (_are_any_hardreset_lines_asserted(oh))
1800 return 0;
63c85238 1801
665d0013
RN
1802 /* Mux pins for device runtime if populated */
1803 if (oh->mux && (!oh->mux->enabled ||
1804 ((oh->_state == _HWMOD_STATE_IDLE) &&
1805 oh->mux->pads_dynamic)))
1806 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1807
1808 _add_initiator_dep(oh, mpu_oh);
34617e2a 1809
665d0013
RN
1810 if (oh->clkdm) {
1811 /*
1812 * A clockdomain must be in SW_SUP before enabling
1813 * completely the module. The clockdomain can be set
1814 * in HW_AUTO only when the module become ready.
1815 */
1816 hwsup = clkdm_in_hwsup(oh->clkdm);
1817 r = clkdm_hwmod_enable(oh->clkdm, oh);
1818 if (r) {
1819 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1820 oh->name, oh->clkdm->name, r);
1821 return r;
1822 }
34617e2a 1823 }
665d0013
RN
1824
1825 _enable_clocks(oh);
9ebfd285
KH
1826 if (soc_ops.enable_module)
1827 soc_ops.enable_module(oh);
34617e2a 1828
665d0013
RN
1829 r = _wait_target_ready(oh);
1830 if (!r) {
1831 /*
1832 * Set the clockdomain to HW_AUTO only if the target is ready,
1833 * assuming that the previous state was HW_AUTO
1834 */
1835 if (oh->clkdm && hwsup)
1836 clkdm_allow_idle(oh->clkdm);
1837
1838 oh->_state = _HWMOD_STATE_ENABLED;
1839
1840 /* Access the sysconfig only if the target is ready */
1841 if (oh->class->sysc) {
1842 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1843 _update_sysc_cache(oh);
1844 _enable_sysc(oh);
1845 }
1846 } else {
1847 _disable_clocks(oh);
1848 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1849 oh->name, r);
34617e2a 1850
665d0013
RN
1851 if (oh->clkdm)
1852 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1853 }
1854
63c85238
PW
1855 return r;
1856}
1857
1858/**
dc6d1cda 1859 * _idle - idle an omap_hwmod
63c85238
PW
1860 * @oh: struct omap_hwmod *
1861 *
1862 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1863 * no further work. Returns -EINVAL if the hwmod is in the wrong
1864 * state or returns 0.
63c85238 1865 */
dc6d1cda 1866static int _idle(struct omap_hwmod *oh)
63c85238 1867{
34617e2a
BC
1868 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1869
63c85238 1870 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1871 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1872 oh->name);
63c85238
PW
1873 return -EINVAL;
1874 }
1875
747834ab
PW
1876 if (_are_any_hardreset_lines_asserted(oh))
1877 return 0;
1878
43b40992 1879 if (oh->class->sysc)
74ff3a68 1880 _idle_sysc(oh);
63c85238 1881 _del_initiator_dep(oh, mpu_oh);
bfc141e3 1882
9ebfd285
KH
1883 if (soc_ops.disable_module)
1884 soc_ops.disable_module(oh);
bfc141e3 1885
45c38252
BC
1886 /*
1887 * The module must be in idle mode before disabling any parents
1888 * clocks. Otherwise, the parent clock might be disabled before
1889 * the module transition is done, and thus will prevent the
1890 * transition to complete properly.
1891 */
1892 _disable_clocks(oh);
665d0013
RN
1893 if (oh->clkdm)
1894 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1895
8d9af88f 1896 /* Mux pins for device idle if populated */
029268e4 1897 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1898 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1899
63c85238
PW
1900 oh->_state = _HWMOD_STATE_IDLE;
1901
1902 return 0;
1903}
1904
9599217a
KVA
1905/**
1906 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1907 * @oh: struct omap_hwmod *
1908 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1909 *
1910 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1911 * local copy. Intended to be used by drivers that require
1912 * direct manipulation of the AUTOIDLE bits.
1913 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1914 * along the return value from _set_module_autoidle().
1915 *
1916 * Any users of this function should be scrutinized carefully.
1917 */
1918int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1919{
1920 u32 v;
1921 int retval = 0;
1922 unsigned long flags;
1923
1924 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1925 return -EINVAL;
1926
1927 spin_lock_irqsave(&oh->_lock, flags);
1928
1929 v = oh->_sysc_cache;
1930
1931 retval = _set_module_autoidle(oh, autoidle, &v);
1932
1933 if (!retval)
1934 _write_sysconfig(v, oh);
1935
1936 spin_unlock_irqrestore(&oh->_lock, flags);
1937
1938 return retval;
1939}
1940
63c85238
PW
1941/**
1942 * _shutdown - shutdown an omap_hwmod
1943 * @oh: struct omap_hwmod *
1944 *
1945 * Shut down an omap_hwmod @oh. This should be called when the driver
1946 * used for the hwmod is removed or unloaded or if the driver is not
1947 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1948 * state or returns 0.
1949 */
1950static int _shutdown(struct omap_hwmod *oh)
1951{
9c8b0ec7 1952 int ret, i;
e4dc8f50
PW
1953 u8 prev_state;
1954
63c85238
PW
1955 if (oh->_state != _HWMOD_STATE_IDLE &&
1956 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1957 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1958 oh->name);
63c85238
PW
1959 return -EINVAL;
1960 }
1961
747834ab
PW
1962 if (_are_any_hardreset_lines_asserted(oh))
1963 return 0;
1964
63c85238
PW
1965 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1966
e4dc8f50
PW
1967 if (oh->class->pre_shutdown) {
1968 prev_state = oh->_state;
1969 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1970 _enable(oh);
e4dc8f50
PW
1971 ret = oh->class->pre_shutdown(oh);
1972 if (ret) {
1973 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1974 _idle(oh);
e4dc8f50
PW
1975 return ret;
1976 }
1977 }
1978
6481c73c
MV
1979 if (oh->class->sysc) {
1980 if (oh->_state == _HWMOD_STATE_IDLE)
1981 _enable(oh);
74ff3a68 1982 _shutdown_sysc(oh);
6481c73c 1983 }
5365efbe 1984
3827f949
BC
1985 /* clocks and deps are already disabled in idle */
1986 if (oh->_state == _HWMOD_STATE_ENABLED) {
1987 _del_initiator_dep(oh, mpu_oh);
1988 /* XXX what about the other system initiators here? dma, dsp */
9ebfd285
KH
1989 if (soc_ops.disable_module)
1990 soc_ops.disable_module(oh);
45c38252 1991 _disable_clocks(oh);
665d0013
RN
1992 if (oh->clkdm)
1993 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 1994 }
63c85238
PW
1995 /* XXX Should this code also force-disable the optional clocks? */
1996
9c8b0ec7
PW
1997 for (i = 0; i < oh->rst_lines_cnt; i++)
1998 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 1999
8d9af88f
TL
2000 /* Mux pins to safe mode or use populated off mode values */
2001 if (oh->mux)
2002 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2003
2004 oh->_state = _HWMOD_STATE_DISABLED;
2005
2006 return 0;
2007}
2008
381d033a
PW
2009/**
2010 * _init_mpu_rt_base - populate the virtual address for a hwmod
2011 * @oh: struct omap_hwmod * to locate the virtual address
2012 *
2013 * Cache the virtual address used by the MPU to access this IP block's
2014 * registers. This address is needed early so the OCP registers that
2015 * are part of the device's address space can be ioremapped properly.
2016 * No return value.
2017 */
2018static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2019{
c9aafd23
PW
2020 struct omap_hwmod_addr_space *mem;
2021 void __iomem *va_start;
2022
2023 if (!oh)
2024 return;
2025
2221b5cd
PW
2026 _save_mpu_port_index(oh);
2027
381d033a
PW
2028 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2029 return;
2030
c9aafd23
PW
2031 mem = _find_mpu_rt_addr_space(oh);
2032 if (!mem) {
2033 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2034 oh->name);
2035 return;
2036 }
2037
2038 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2039 if (!va_start) {
2040 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2041 return;
2042 }
2043
2044 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2045 oh->name, va_start);
2046
2047 oh->_mpu_rt_va = va_start;
381d033a
PW
2048}
2049
2050/**
2051 * _init - initialize internal data for the hwmod @oh
2052 * @oh: struct omap_hwmod *
2053 * @n: (unused)
2054 *
2055 * Look up the clocks and the address space used by the MPU to access
2056 * registers belonging to the hwmod @oh. @oh must already be
2057 * registered at this point. This is the first of two phases for
2058 * hwmod initialization. Code called here does not touch any hardware
2059 * registers, it simply prepares internal data structures. Returns 0
2060 * upon success or if the hwmod isn't registered, or -EINVAL upon
2061 * failure.
2062 */
2063static int __init _init(struct omap_hwmod *oh, void *data)
2064{
2065 int r;
2066
2067 if (oh->_state != _HWMOD_STATE_REGISTERED)
2068 return 0;
2069
2070 _init_mpu_rt_base(oh, NULL);
2071
2072 r = _init_clocks(oh, NULL);
2073 if (IS_ERR_VALUE(r)) {
2074 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2075 return -EINVAL;
2076 }
2077
2078 oh->_state = _HWMOD_STATE_INITIALIZED;
2079
2080 return 0;
2081}
2082
63c85238 2083/**
64813c3f 2084 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2085 * @oh: struct omap_hwmod *
2086 *
64813c3f
PW
2087 * Set up the module's interface clocks. XXX This function is still mostly
2088 * a stub; implementing this properly requires iclk autoidle usecounting in
2089 * the clock code. No return value.
63c85238 2090 */
64813c3f 2091static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2092{
5d95dde7 2093 struct omap_hwmod_ocp_if *os;
11cd4b94 2094 struct list_head *p;
5d95dde7 2095 int i = 0;
381d033a 2096 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2097 return;
48d54f3f 2098
11cd4b94 2099 p = oh->slave_ports.next;
63c85238 2100
5d95dde7 2101 while (i < oh->slaves_cnt) {
11cd4b94 2102 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2103 if (!os->_clk)
64813c3f 2104 continue;
63c85238 2105
64813c3f
PW
2106 if (os->flags & OCPIF_SWSUP_IDLE) {
2107 /* XXX omap_iclk_deny_idle(c); */
2108 } else {
2109 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2110 clk_enable(os->_clk);
63c85238
PW
2111 }
2112 }
2113
64813c3f
PW
2114 return;
2115}
2116
2117/**
2118 * _setup_reset - reset an IP block during the setup process
2119 * @oh: struct omap_hwmod *
2120 *
2121 * Reset the IP block corresponding to the hwmod @oh during the setup
2122 * process. The IP block is first enabled so it can be successfully
2123 * reset. Returns 0 upon success or a negative error code upon
2124 * failure.
2125 */
2126static int __init _setup_reset(struct omap_hwmod *oh)
2127{
2128 int r;
2129
2130 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2131 return -EINVAL;
63c85238 2132
747834ab
PW
2133 if (oh->rst_lines_cnt == 0) {
2134 r = _enable(oh);
2135 if (r) {
2136 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2137 oh->name, oh->_state);
2138 return -EINVAL;
2139 }
9a23dfe1 2140 }
63c85238 2141
2800852a 2142 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2143 r = _reset(oh);
2144
2145 return r;
2146}
2147
2148/**
2149 * _setup_postsetup - transition to the appropriate state after _setup
2150 * @oh: struct omap_hwmod *
2151 *
2152 * Place an IP block represented by @oh into a "post-setup" state --
2153 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2154 * this function is called at the end of _setup().) The postsetup
2155 * state for an IP block can be changed by calling
2156 * omap_hwmod_enter_postsetup_state() early in the boot process,
2157 * before one of the omap_hwmod_setup*() functions are called for the
2158 * IP block.
2159 *
2160 * The IP block stays in this state until a PM runtime-based driver is
2161 * loaded for that IP block. A post-setup state of IDLE is
2162 * appropriate for almost all IP blocks with runtime PM-enabled
2163 * drivers, since those drivers are able to enable the IP block. A
2164 * post-setup state of ENABLED is appropriate for kernels with PM
2165 * runtime disabled. The DISABLED state is appropriate for unusual IP
2166 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2167 * included, since the WDTIMER starts running on reset and will reset
2168 * the MPU if left active.
2169 *
2170 * This post-setup mechanism is deprecated. Once all of the OMAP
2171 * drivers have been converted to use PM runtime, and all of the IP
2172 * block data and interconnect data is available to the hwmod code, it
2173 * should be possible to replace this mechanism with a "lazy reset"
2174 * arrangement. In a "lazy reset" setup, each IP block is enabled
2175 * when the driver first probes, then all remaining IP blocks without
2176 * drivers are either shut down or enabled after the drivers have
2177 * loaded. However, this cannot take place until the above
2178 * preconditions have been met, since otherwise the late reset code
2179 * has no way of knowing which IP blocks are in use by drivers, and
2180 * which ones are unused.
2181 *
2182 * No return value.
2183 */
2184static void __init _setup_postsetup(struct omap_hwmod *oh)
2185{
2186 u8 postsetup_state;
2187
2188 if (oh->rst_lines_cnt > 0)
2189 return;
76e5589e 2190
2092e5cc
PW
2191 postsetup_state = oh->_postsetup_state;
2192 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2193 postsetup_state = _HWMOD_STATE_ENABLED;
2194
2195 /*
2196 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2197 * it should be set by the core code as a runtime flag during startup
2198 */
2199 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2200 (postsetup_state == _HWMOD_STATE_IDLE)) {
2201 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2202 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2203 }
2092e5cc
PW
2204
2205 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2206 _idle(oh);
2092e5cc
PW
2207 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2208 _shutdown(oh);
2209 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2210 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2211 oh->name, postsetup_state);
63c85238 2212
64813c3f
PW
2213 return;
2214}
2215
2216/**
2217 * _setup - prepare IP block hardware for use
2218 * @oh: struct omap_hwmod *
2219 * @n: (unused, pass NULL)
2220 *
2221 * Configure the IP block represented by @oh. This may include
2222 * enabling the IP block, resetting it, and placing it into a
2223 * post-setup state, depending on the type of IP block and applicable
2224 * flags. IP blocks are reset to prevent any previous configuration
2225 * by the bootloader or previous operating system from interfering
2226 * with power management or other parts of the system. The reset can
2227 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2228 * two phases for hwmod initialization. Code called here generally
2229 * affects the IP block hardware, or system integration hardware
2230 * associated with the IP block. Returns 0.
2231 */
2232static int __init _setup(struct omap_hwmod *oh, void *data)
2233{
2234 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2235 return 0;
2236
2237 _setup_iclk_autoidle(oh);
2238
2239 if (!_setup_reset(oh))
2240 _setup_postsetup(oh);
2241
63c85238
PW
2242 return 0;
2243}
2244
63c85238 2245/**
0102b627 2246 * _register - register a struct omap_hwmod
63c85238
PW
2247 * @oh: struct omap_hwmod *
2248 *
43b40992
PW
2249 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2250 * already has been registered by the same name; -EINVAL if the
2251 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2252 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2253 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2254 * success.
63c85238
PW
2255 *
2256 * XXX The data should be copied into bootmem, so the original data
2257 * should be marked __initdata and freed after init. This would allow
2258 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2259 * that the copy process would be relatively complex due to the large number
2260 * of substructures.
2261 */
01592df9 2262static int __init _register(struct omap_hwmod *oh)
63c85238 2263{
43b40992
PW
2264 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2265 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2266 return -EINVAL;
2267
63c85238
PW
2268 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2269
ce35b244
BC
2270 if (_lookup(oh->name))
2271 return -EEXIST;
63c85238 2272
63c85238
PW
2273 list_add_tail(&oh->node, &omap_hwmod_list);
2274
2221b5cd
PW
2275 INIT_LIST_HEAD(&oh->master_ports);
2276 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2277 spin_lock_init(&oh->_lock);
2092e5cc 2278
63c85238
PW
2279 oh->_state = _HWMOD_STATE_REGISTERED;
2280
569edd70
PW
2281 /*
2282 * XXX Rather than doing a strcmp(), this should test a flag
2283 * set in the hwmod data, inserted by the autogenerator code.
2284 */
2285 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2286 mpu_oh = oh;
63c85238 2287
569edd70 2288 return 0;
63c85238
PW
2289}
2290
2221b5cd
PW
2291/**
2292 * _alloc_links - return allocated memory for hwmod links
2293 * @ml: pointer to a struct omap_hwmod_link * for the master link
2294 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2295 *
2296 * Return pointers to two struct omap_hwmod_link records, via the
2297 * addresses pointed to by @ml and @sl. Will first attempt to return
2298 * memory allocated as part of a large initial block, but if that has
2299 * been exhausted, will allocate memory itself. Since ideally this
2300 * second allocation path will never occur, the number of these
2301 * 'supplemental' allocations will be logged when debugging is
2302 * enabled. Returns 0.
2303 */
2304static int __init _alloc_links(struct omap_hwmod_link **ml,
2305 struct omap_hwmod_link **sl)
2306{
2307 unsigned int sz;
2308
2309 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2310 *ml = &linkspace[free_ls++];
2311 *sl = &linkspace[free_ls++];
2312 return 0;
2313 }
2314
2315 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2316
2317 *sl = NULL;
2318 *ml = alloc_bootmem(sz);
2319
2320 memset(*ml, 0, sz);
2321
2322 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2323
2324 ls_supp++;
2325 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2326 ls_supp * LINKS_PER_OCP_IF);
2327
2328 return 0;
2329};
2330
2331/**
2332 * _add_link - add an interconnect between two IP blocks
2333 * @oi: pointer to a struct omap_hwmod_ocp_if record
2334 *
2335 * Add struct omap_hwmod_link records connecting the master IP block
2336 * specified in @oi->master to @oi, and connecting the slave IP block
2337 * specified in @oi->slave to @oi. This code is assumed to run before
2338 * preemption or SMP has been enabled, thus avoiding the need for
2339 * locking in this code. Changes to this assumption will require
2340 * additional locking. Returns 0.
2341 */
2342static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2343{
2344 struct omap_hwmod_link *ml, *sl;
2345
2346 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2347 oi->slave->name);
2348
2349 _alloc_links(&ml, &sl);
2350
2351 ml->ocp_if = oi;
2352 INIT_LIST_HEAD(&ml->node);
2353 list_add(&ml->node, &oi->master->master_ports);
2354 oi->master->masters_cnt++;
2355
2356 sl->ocp_if = oi;
2357 INIT_LIST_HEAD(&sl->node);
2358 list_add(&sl->node, &oi->slave->slave_ports);
2359 oi->slave->slaves_cnt++;
2360
2361 return 0;
2362}
2363
2364/**
2365 * _register_link - register a struct omap_hwmod_ocp_if
2366 * @oi: struct omap_hwmod_ocp_if *
2367 *
2368 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2369 * has already been registered; -EINVAL if @oi is NULL or if the
2370 * record pointed to by @oi is missing required fields; or 0 upon
2371 * success.
2372 *
2373 * XXX The data should be copied into bootmem, so the original data
2374 * should be marked __initdata and freed after init. This would allow
2375 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2376 */
2377static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2378{
2379 if (!oi || !oi->master || !oi->slave || !oi->user)
2380 return -EINVAL;
2381
2382 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2383 return -EEXIST;
2384
2385 pr_debug("omap_hwmod: registering link from %s to %s\n",
2386 oi->master->name, oi->slave->name);
2387
2388 /*
2389 * Register the connected hwmods, if they haven't been
2390 * registered already
2391 */
2392 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2393 _register(oi->master);
2394
2395 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2396 _register(oi->slave);
2397
2398 _add_link(oi);
2399
2400 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2401
2402 return 0;
2403}
2404
2405/**
2406 * _alloc_linkspace - allocate large block of hwmod links
2407 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2408 *
2409 * Allocate a large block of struct omap_hwmod_link records. This
2410 * improves boot time significantly by avoiding the need to allocate
2411 * individual records one by one. If the number of records to
2412 * allocate in the block hasn't been manually specified, this function
2413 * will count the number of struct omap_hwmod_ocp_if records in @ois
2414 * and use that to determine the allocation size. For SoC families
2415 * that require multiple list registrations, such as OMAP3xxx, this
2416 * estimation process isn't optimal, so manual estimation is advised
2417 * in those cases. Returns -EEXIST if the allocation has already occurred
2418 * or 0 upon success.
2419 */
2420static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2421{
2422 unsigned int i = 0;
2423 unsigned int sz;
2424
2425 if (linkspace) {
2426 WARN(1, "linkspace already allocated\n");
2427 return -EEXIST;
2428 }
2429
2430 if (max_ls == 0)
2431 while (ois[i++])
2432 max_ls += LINKS_PER_OCP_IF;
2433
2434 sz = sizeof(struct omap_hwmod_link) * max_ls;
2435
2436 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2437 __func__, sz, max_ls);
2438
2439 linkspace = alloc_bootmem(sz);
2440
2441 memset(linkspace, 0, sz);
2442
2443 return 0;
2444}
0102b627
BC
2445
2446/* Public functions */
2447
2448u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2449{
2450 if (oh->flags & HWMOD_16BIT_REG)
2451 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2452 else
2453 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2454}
2455
2456void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2457{
2458 if (oh->flags & HWMOD_16BIT_REG)
2459 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2460 else
2461 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2462}
2463
6d3c55fd
A
2464/**
2465 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2466 * @oh: struct omap_hwmod *
2467 *
2468 * This is a public function exposed to drivers. Some drivers may need to do
2469 * some settings before and after resetting the device. Those drivers after
2470 * doing the necessary settings could use this function to start a reset by
2471 * setting the SYSCONFIG.SOFTRESET bit.
2472 */
2473int omap_hwmod_softreset(struct omap_hwmod *oh)
2474{
3c55c1ba
PW
2475 u32 v;
2476 int ret;
2477
2478 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2479 return -EINVAL;
2480
3c55c1ba
PW
2481 v = oh->_sysc_cache;
2482 ret = _set_softreset(oh, &v);
2483 if (ret)
2484 goto error;
2485 _write_sysconfig(v, oh);
2486
2487error:
2488 return ret;
6d3c55fd
A
2489}
2490
0102b627
BC
2491/**
2492 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2493 * @oh: struct omap_hwmod *
2494 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2495 *
2496 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2497 * local copy. Intended to be used by drivers that have some erratum
2498 * that requires direct manipulation of the SIDLEMODE bits. Returns
2499 * -EINVAL if @oh is null, or passes along the return value from
2500 * _set_slave_idlemode().
2501 *
2502 * XXX Does this function have any current users? If not, we should
2503 * remove it; it is better to let the rest of the hwmod code handle this.
2504 * Any users of this function should be scrutinized carefully.
2505 */
2506int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2507{
2508 u32 v;
2509 int retval = 0;
2510
2511 if (!oh)
2512 return -EINVAL;
2513
2514 v = oh->_sysc_cache;
2515
2516 retval = _set_slave_idlemode(oh, idlemode, &v);
2517 if (!retval)
2518 _write_sysconfig(v, oh);
2519
2520 return retval;
2521}
2522
63c85238
PW
2523/**
2524 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2525 * @name: name of the omap_hwmod to look up
2526 *
2527 * Given a @name of an omap_hwmod, return a pointer to the registered
2528 * struct omap_hwmod *, or NULL upon error.
2529 */
2530struct omap_hwmod *omap_hwmod_lookup(const char *name)
2531{
2532 struct omap_hwmod *oh;
2533
2534 if (!name)
2535 return NULL;
2536
63c85238 2537 oh = _lookup(name);
63c85238
PW
2538
2539 return oh;
2540}
2541
2542/**
2543 * omap_hwmod_for_each - call function for each registered omap_hwmod
2544 * @fn: pointer to a callback function
97d60162 2545 * @data: void * data to pass to callback function
63c85238
PW
2546 *
2547 * Call @fn for each registered omap_hwmod, passing @data to each
2548 * function. @fn must return 0 for success or any other value for
2549 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2550 * will stop and the non-zero return value will be passed to the
2551 * caller of omap_hwmod_for_each(). @fn is called with
2552 * omap_hwmod_for_each() held.
2553 */
97d60162
PW
2554int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2555 void *data)
63c85238
PW
2556{
2557 struct omap_hwmod *temp_oh;
30ebad9d 2558 int ret = 0;
63c85238
PW
2559
2560 if (!fn)
2561 return -EINVAL;
2562
63c85238 2563 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2564 ret = (*fn)(temp_oh, data);
63c85238
PW
2565 if (ret)
2566 break;
2567 }
63c85238
PW
2568
2569 return ret;
2570}
2571
2221b5cd
PW
2572/**
2573 * omap_hwmod_register_links - register an array of hwmod links
2574 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2575 *
2576 * Intended to be called early in boot before the clock framework is
2577 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
2578 * listed in @ois that are valid for this chip. Returns -EINVAL if
2579 * omap_hwmod_init() hasn't been called before calling this function,
2580 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2581 * success.
2221b5cd
PW
2582 */
2583int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2584{
2585 int r, i;
2586
9ebfd285
KH
2587 if (!inited)
2588 return -EINVAL;
2589
2221b5cd
PW
2590 if (!ois)
2591 return 0;
2592
2221b5cd
PW
2593 if (!linkspace) {
2594 if (_alloc_linkspace(ois)) {
2595 pr_err("omap_hwmod: could not allocate link space\n");
2596 return -ENOMEM;
2597 }
2598 }
2599
2600 i = 0;
2601 do {
2602 r = _register_link(ois[i]);
2603 WARN(r && r != -EEXIST,
2604 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
2605 ois[i]->master->name, ois[i]->slave->name, r);
2606 } while (ois[++i]);
2607
2608 return 0;
2609}
2610
381d033a
PW
2611/**
2612 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2613 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2614 *
2615 * If the hwmod data corresponding to the MPU subsystem IP block
2616 * hasn't been initialized and set up yet, do so now. This must be
2617 * done first since sleep dependencies may be added from other hwmods
2618 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2619 * return value.
63c85238 2620 */
381d033a 2621static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 2622{
381d033a
PW
2623 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2624 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2625 __func__, MPU_INITIATOR_NAME);
2626 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2627 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
2628}
2629
63c85238 2630/**
a2debdbd
PW
2631 * omap_hwmod_setup_one - set up a single hwmod
2632 * @oh_name: const char * name of the already-registered hwmod to set up
2633 *
381d033a
PW
2634 * Initialize and set up a single hwmod. Intended to be used for a
2635 * small number of early devices, such as the timer IP blocks used for
2636 * the scheduler clock. Must be called after omap2_clk_init().
2637 * Resolves the struct clk names to struct clk pointers for each
2638 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2639 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
2640 */
2641int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2642{
2643 struct omap_hwmod *oh;
63c85238 2644
a2debdbd
PW
2645 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2646
a2debdbd
PW
2647 oh = _lookup(oh_name);
2648 if (!oh) {
2649 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2650 return -EINVAL;
2651 }
63c85238 2652
381d033a 2653 _ensure_mpu_hwmod_is_setup(oh);
63c85238 2654
381d033a 2655 _init(oh, NULL);
a2debdbd
PW
2656 _setup(oh, NULL);
2657
63c85238
PW
2658 return 0;
2659}
2660
2661/**
381d033a 2662 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 2663 *
381d033a
PW
2664 * Initialize and set up all IP blocks registered with the hwmod code.
2665 * Must be called after omap2_clk_init(). Resolves the struct clk
2666 * names to struct clk pointers for each registered omap_hwmod. Also
2667 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 2668 */
550c8092 2669static int __init omap_hwmod_setup_all(void)
63c85238 2670{
381d033a 2671 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 2672
381d033a 2673 omap_hwmod_for_each(_init, NULL);
2092e5cc 2674 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2675
2676 return 0;
2677}
550c8092 2678core_initcall(omap_hwmod_setup_all);
63c85238 2679
63c85238
PW
2680/**
2681 * omap_hwmod_enable - enable an omap_hwmod
2682 * @oh: struct omap_hwmod *
2683 *
74ff3a68 2684 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2685 * Returns -EINVAL on error or passes along the return value from _enable().
2686 */
2687int omap_hwmod_enable(struct omap_hwmod *oh)
2688{
2689 int r;
dc6d1cda 2690 unsigned long flags;
63c85238
PW
2691
2692 if (!oh)
2693 return -EINVAL;
2694
dc6d1cda
PW
2695 spin_lock_irqsave(&oh->_lock, flags);
2696 r = _enable(oh);
2697 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2698
2699 return r;
2700}
2701
2702/**
2703 * omap_hwmod_idle - idle an omap_hwmod
2704 * @oh: struct omap_hwmod *
2705 *
74ff3a68 2706 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2707 * Returns -EINVAL on error or passes along the return value from _idle().
2708 */
2709int omap_hwmod_idle(struct omap_hwmod *oh)
2710{
dc6d1cda
PW
2711 unsigned long flags;
2712
63c85238
PW
2713 if (!oh)
2714 return -EINVAL;
2715
dc6d1cda
PW
2716 spin_lock_irqsave(&oh->_lock, flags);
2717 _idle(oh);
2718 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2719
2720 return 0;
2721}
2722
2723/**
2724 * omap_hwmod_shutdown - shutdown an omap_hwmod
2725 * @oh: struct omap_hwmod *
2726 *
74ff3a68 2727 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2728 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2729 * the return value from _shutdown().
2730 */
2731int omap_hwmod_shutdown(struct omap_hwmod *oh)
2732{
dc6d1cda
PW
2733 unsigned long flags;
2734
63c85238
PW
2735 if (!oh)
2736 return -EINVAL;
2737
dc6d1cda 2738 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2739 _shutdown(oh);
dc6d1cda 2740 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2741
2742 return 0;
2743}
2744
2745/**
2746 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2747 * @oh: struct omap_hwmod *oh
2748 *
2749 * Intended to be called by the omap_device code.
2750 */
2751int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2752{
dc6d1cda
PW
2753 unsigned long flags;
2754
2755 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2756 _enable_clocks(oh);
dc6d1cda 2757 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2758
2759 return 0;
2760}
2761
2762/**
2763 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2764 * @oh: struct omap_hwmod *oh
2765 *
2766 * Intended to be called by the omap_device code.
2767 */
2768int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2769{
dc6d1cda
PW
2770 unsigned long flags;
2771
2772 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2773 _disable_clocks(oh);
dc6d1cda 2774 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2775
2776 return 0;
2777}
2778
2779/**
2780 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2781 * @oh: struct omap_hwmod *oh
2782 *
2783 * Intended to be called by drivers and core code when all posted
2784 * writes to a device must complete before continuing further
2785 * execution (for example, after clearing some device IRQSTATUS
2786 * register bits)
2787 *
2788 * XXX what about targets with multiple OCP threads?
2789 */
2790void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2791{
2792 BUG_ON(!oh);
2793
43b40992 2794 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2795 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2796 oh->name);
63c85238
PW
2797 return;
2798 }
2799
2800 /*
2801 * Forces posted writes to complete on the OCP thread handling
2802 * register writes
2803 */
cc7a1d2a 2804 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2805}
2806
2807/**
2808 * omap_hwmod_reset - reset the hwmod
2809 * @oh: struct omap_hwmod *
2810 *
2811 * Under some conditions, a driver may wish to reset the entire device.
2812 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2813 * the return value from _reset().
63c85238
PW
2814 */
2815int omap_hwmod_reset(struct omap_hwmod *oh)
2816{
2817 int r;
dc6d1cda 2818 unsigned long flags;
63c85238 2819
9b579114 2820 if (!oh)
63c85238
PW
2821 return -EINVAL;
2822
dc6d1cda 2823 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2824 r = _reset(oh);
dc6d1cda 2825 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2826
2827 return r;
2828}
2829
5e8370f1
PW
2830/*
2831 * IP block data retrieval functions
2832 */
2833
63c85238
PW
2834/**
2835 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2836 * @oh: struct omap_hwmod *
2837 * @res: pointer to the first element of an array of struct resource to fill
2838 *
2839 * Count the number of struct resource array elements necessary to
2840 * contain omap_hwmod @oh resources. Intended to be called by code
2841 * that registers omap_devices. Intended to be used to determine the
2842 * size of a dynamically-allocated struct resource array, before
2843 * calling omap_hwmod_fill_resources(). Returns the number of struct
2844 * resource array elements needed.
2845 *
2846 * XXX This code is not optimized. It could attempt to merge adjacent
2847 * resource IDs.
2848 *
2849 */
2850int omap_hwmod_count_resources(struct omap_hwmod *oh)
2851{
5d95dde7 2852 struct omap_hwmod_ocp_if *os;
11cd4b94 2853 struct list_head *p;
5d95dde7
PW
2854 int ret;
2855 int i = 0;
63c85238 2856
bc614958 2857 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 2858
11cd4b94 2859 p = oh->slave_ports.next;
2221b5cd 2860
5d95dde7 2861 while (i < oh->slaves_cnt) {
11cd4b94 2862 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
2863 ret += _count_ocp_if_addr_spaces(os);
2864 }
63c85238
PW
2865
2866 return ret;
2867}
2868
2869/**
2870 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2871 * @oh: struct omap_hwmod *
2872 * @res: pointer to the first element of an array of struct resource to fill
2873 *
2874 * Fill the struct resource array @res with resource data from the
2875 * omap_hwmod @oh. Intended to be called by code that registers
2876 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2877 * number of array elements filled.
2878 */
2879int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2880{
5d95dde7 2881 struct omap_hwmod_ocp_if *os;
11cd4b94 2882 struct list_head *p;
5d95dde7 2883 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
2884 int r = 0;
2885
2886 /* For each IRQ, DMA, memory area, fill in array.*/
2887
212738a4
PW
2888 mpu_irqs_cnt = _count_mpu_irqs(oh);
2889 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2890 (res + r)->name = (oh->mpu_irqs + i)->name;
2891 (res + r)->start = (oh->mpu_irqs + i)->irq;
2892 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2893 (res + r)->flags = IORESOURCE_IRQ;
2894 r++;
2895 }
2896
bc614958
PW
2897 sdma_reqs_cnt = _count_sdma_reqs(oh);
2898 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2899 (res + r)->name = (oh->sdma_reqs + i)->name;
2900 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2901 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2902 (res + r)->flags = IORESOURCE_DMA;
2903 r++;
2904 }
2905
11cd4b94 2906 p = oh->slave_ports.next;
2221b5cd 2907
5d95dde7
PW
2908 i = 0;
2909 while (i < oh->slaves_cnt) {
11cd4b94 2910 os = _fetch_next_ocp_if(&p, &i);
78183f3f 2911 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2912
78183f3f 2913 for (j = 0; j < addr_cnt; j++) {
cd503802 2914 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2915 (res + r)->start = (os->addr + j)->pa_start;
2916 (res + r)->end = (os->addr + j)->pa_end;
2917 (res + r)->flags = IORESOURCE_MEM;
2918 r++;
2919 }
2920 }
2921
2922 return r;
2923}
2924
5e8370f1
PW
2925/**
2926 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2927 * @oh: struct omap_hwmod * to operate on
2928 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2929 * @name: pointer to the name of the data to fetch (optional)
2930 * @rsrc: pointer to a struct resource, allocated by the caller
2931 *
2932 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2933 * data for the IP block pointed to by @oh. The data will be filled
2934 * into a struct resource record pointed to by @rsrc. The struct
2935 * resource must be allocated by the caller. When @name is non-null,
2936 * the data associated with the matching entry in the IRQ/SDMA/address
2937 * space hwmod data arrays will be returned. If @name is null, the
2938 * first array entry will be returned. Data order is not meaningful
2939 * in hwmod data, so callers are strongly encouraged to use a non-null
2940 * @name whenever possible to avoid unpredictable effects if hwmod
2941 * data is later added that causes data ordering to change. This
2942 * function is only intended for use by OMAP core code. Device
2943 * drivers should not call this function - the appropriate bus-related
2944 * data accessor functions should be used instead. Returns 0 upon
2945 * success or a negative error code upon error.
2946 */
2947int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2948 const char *name, struct resource *rsrc)
2949{
2950 int r;
2951 unsigned int irq, dma;
2952 u32 pa_start, pa_end;
2953
2954 if (!oh || !rsrc)
2955 return -EINVAL;
2956
2957 if (type == IORESOURCE_IRQ) {
2958 r = _get_mpu_irq_by_name(oh, name, &irq);
2959 if (r)
2960 return r;
2961
2962 rsrc->start = irq;
2963 rsrc->end = irq;
2964 } else if (type == IORESOURCE_DMA) {
2965 r = _get_sdma_req_by_name(oh, name, &dma);
2966 if (r)
2967 return r;
2968
2969 rsrc->start = dma;
2970 rsrc->end = dma;
2971 } else if (type == IORESOURCE_MEM) {
2972 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
2973 if (r)
2974 return r;
2975
2976 rsrc->start = pa_start;
2977 rsrc->end = pa_end;
2978 } else {
2979 return -EINVAL;
2980 }
2981
2982 rsrc->flags = type;
2983 rsrc->name = name;
2984
2985 return 0;
2986}
2987
63c85238
PW
2988/**
2989 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2990 * @oh: struct omap_hwmod *
2991 *
2992 * Return the powerdomain pointer associated with the OMAP module
2993 * @oh's main clock. If @oh does not have a main clk, return the
2994 * powerdomain associated with the interface clock associated with the
2995 * module's MPU port. (XXX Perhaps this should use the SDMA port
2996 * instead?) Returns NULL on error, or a struct powerdomain * on
2997 * success.
2998 */
2999struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3000{
3001 struct clk *c;
2d6141ba 3002 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3003
3004 if (!oh)
3005 return NULL;
3006
3007 if (oh->_clk) {
3008 c = oh->_clk;
3009 } else {
2d6141ba
PW
3010 oi = _find_mpu_rt_port(oh);
3011 if (!oi)
63c85238 3012 return NULL;
2d6141ba 3013 c = oi->_clk;
63c85238
PW
3014 }
3015
d5647c18
TG
3016 if (!c->clkdm)
3017 return NULL;
3018
63c85238
PW
3019 return c->clkdm->pwrdm.ptr;
3020
3021}
3022
db2a60bf
PW
3023/**
3024 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3025 * @oh: struct omap_hwmod *
3026 *
3027 * Returns the virtual address corresponding to the beginning of the
3028 * module's register target, in the address range that is intended to
3029 * be used by the MPU. Returns the virtual address upon success or NULL
3030 * upon error.
3031 */
3032void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3033{
3034 if (!oh)
3035 return NULL;
3036
3037 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3038 return NULL;
3039
3040 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3041 return NULL;
3042
3043 return oh->_mpu_rt_va;
3044}
3045
63c85238
PW
3046/**
3047 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3048 * @oh: struct omap_hwmod *
3049 * @init_oh: struct omap_hwmod * (initiator)
3050 *
3051 * Add a sleep dependency between the initiator @init_oh and @oh.
3052 * Intended to be called by DSP/Bridge code via platform_data for the
3053 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3054 * code needs to add/del initiator dependencies dynamically
3055 * before/after accessing a device. Returns the return value from
3056 * _add_initiator_dep().
3057 *
3058 * XXX Keep a usecount in the clockdomain code
3059 */
3060int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3061 struct omap_hwmod *init_oh)
3062{
3063 return _add_initiator_dep(oh, init_oh);
3064}
3065
3066/*
3067 * XXX what about functions for drivers to save/restore ocp_sysconfig
3068 * for context save/restore operations?
3069 */
3070
3071/**
3072 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3073 * @oh: struct omap_hwmod *
3074 * @init_oh: struct omap_hwmod * (initiator)
3075 *
3076 * Remove a sleep dependency between the initiator @init_oh and @oh.
3077 * Intended to be called by DSP/Bridge code via platform_data for the
3078 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3079 * code needs to add/del initiator dependencies dynamically
3080 * before/after accessing a device. Returns the return value from
3081 * _del_initiator_dep().
3082 *
3083 * XXX Keep a usecount in the clockdomain code
3084 */
3085int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3086 struct omap_hwmod *init_oh)
3087{
3088 return _del_initiator_dep(oh, init_oh);
3089}
3090
63c85238
PW
3091/**
3092 * omap_hwmod_enable_wakeup - allow device to wake up the system
3093 * @oh: struct omap_hwmod *
3094 *
3095 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3096 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3097 * this IP block if it has dynamic mux entries. Eventually this
3098 * should set PRCM wakeup registers to cause the PRCM to receive
3099 * wakeup events from the module. Does not set any wakeup routing
3100 * registers beyond this point - if the module is to wake up any other
3101 * module or subsystem, that must be set separately. Called by
3102 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3103 */
3104int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3105{
dc6d1cda 3106 unsigned long flags;
5a7ddcbd 3107 u32 v;
dc6d1cda 3108
dc6d1cda 3109 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3110
3111 if (oh->class->sysc &&
3112 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3113 v = oh->_sysc_cache;
3114 _enable_wakeup(oh, &v);
3115 _write_sysconfig(v, oh);
3116 }
3117
eceec009 3118 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3119 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3120
3121 return 0;
3122}
3123
3124/**
3125 * omap_hwmod_disable_wakeup - prevent device from waking the system
3126 * @oh: struct omap_hwmod *
3127 *
3128 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3129 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3130 * events for this IP block if it has dynamic mux entries. Eventually
3131 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3132 * wakeup events from the module. Does not set any wakeup routing
3133 * registers beyond this point - if the module is to wake up any other
3134 * module or subsystem, that must be set separately. Called by
3135 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3136 */
3137int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3138{
dc6d1cda 3139 unsigned long flags;
5a7ddcbd 3140 u32 v;
dc6d1cda 3141
dc6d1cda 3142 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3143
3144 if (oh->class->sysc &&
3145 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3146 v = oh->_sysc_cache;
3147 _disable_wakeup(oh, &v);
3148 _write_sysconfig(v, oh);
3149 }
3150
eceec009 3151 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3152 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3153
3154 return 0;
3155}
43b40992 3156
aee48e3c
PW
3157/**
3158 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3159 * contained in the hwmod module.
3160 * @oh: struct omap_hwmod *
3161 * @name: name of the reset line to lookup and assert
3162 *
3163 * Some IP like dsp, ipu or iva contain processor that require
3164 * an HW reset line to be assert / deassert in order to enable fully
3165 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3166 * yet supported on this OMAP; otherwise, passes along the return value
3167 * from _assert_hardreset().
3168 */
3169int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3170{
3171 int ret;
dc6d1cda 3172 unsigned long flags;
aee48e3c
PW
3173
3174 if (!oh)
3175 return -EINVAL;
3176
dc6d1cda 3177 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3178 ret = _assert_hardreset(oh, name);
dc6d1cda 3179 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3180
3181 return ret;
3182}
3183
3184/**
3185 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3186 * contained in the hwmod module.
3187 * @oh: struct omap_hwmod *
3188 * @name: name of the reset line to look up and deassert
3189 *
3190 * Some IP like dsp, ipu or iva contain processor that require
3191 * an HW reset line to be assert / deassert in order to enable fully
3192 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3193 * yet supported on this OMAP; otherwise, passes along the return value
3194 * from _deassert_hardreset().
3195 */
3196int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3197{
3198 int ret;
dc6d1cda 3199 unsigned long flags;
aee48e3c
PW
3200
3201 if (!oh)
3202 return -EINVAL;
3203
dc6d1cda 3204 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3205 ret = _deassert_hardreset(oh, name);
dc6d1cda 3206 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3207
3208 return ret;
3209}
3210
3211/**
3212 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3213 * contained in the hwmod module
3214 * @oh: struct omap_hwmod *
3215 * @name: name of the reset line to look up and read
3216 *
3217 * Return the current state of the hwmod @oh's reset line named @name:
3218 * returns -EINVAL upon parameter error or if this operation
3219 * is unsupported on the current OMAP; otherwise, passes along the return
3220 * value from _read_hardreset().
3221 */
3222int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3223{
3224 int ret;
dc6d1cda 3225 unsigned long flags;
aee48e3c
PW
3226
3227 if (!oh)
3228 return -EINVAL;
3229
dc6d1cda 3230 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3231 ret = _read_hardreset(oh, name);
dc6d1cda 3232 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3233
3234 return ret;
3235}
3236
3237
43b40992
PW
3238/**
3239 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3240 * @classname: struct omap_hwmod_class name to search for
3241 * @fn: callback function pointer to call for each hwmod in class @classname
3242 * @user: arbitrary context data to pass to the callback function
3243 *
ce35b244
BC
3244 * For each omap_hwmod of class @classname, call @fn.
3245 * If the callback function returns something other than
43b40992
PW
3246 * zero, the iterator is terminated, and the callback function's return
3247 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3248 * if @classname or @fn are NULL, or passes back the error code from @fn.
3249 */
3250int omap_hwmod_for_each_by_class(const char *classname,
3251 int (*fn)(struct omap_hwmod *oh,
3252 void *user),
3253 void *user)
3254{
3255 struct omap_hwmod *temp_oh;
3256 int ret = 0;
3257
3258 if (!classname || !fn)
3259 return -EINVAL;
3260
3261 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3262 __func__, classname);
3263
43b40992
PW
3264 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3265 if (!strcmp(temp_oh->class->name, classname)) {
3266 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3267 __func__, temp_oh->name);
3268 ret = (*fn)(temp_oh, user);
3269 if (ret)
3270 break;
3271 }
3272 }
3273
43b40992
PW
3274 if (ret)
3275 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3276 __func__, ret);
3277
3278 return ret;
3279}
3280
2092e5cc
PW
3281/**
3282 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3283 * @oh: struct omap_hwmod *
3284 * @state: state that _setup() should leave the hwmod in
3285 *
550c8092 3286 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3287 * (called by omap_hwmod_setup_*()). See also the documentation
3288 * for _setup_postsetup(), above. Returns 0 upon success or
3289 * -EINVAL if there is a problem with the arguments or if the hwmod is
3290 * in the wrong state.
2092e5cc
PW
3291 */
3292int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3293{
3294 int ret;
dc6d1cda 3295 unsigned long flags;
2092e5cc
PW
3296
3297 if (!oh)
3298 return -EINVAL;
3299
3300 if (state != _HWMOD_STATE_DISABLED &&
3301 state != _HWMOD_STATE_ENABLED &&
3302 state != _HWMOD_STATE_IDLE)
3303 return -EINVAL;
3304
dc6d1cda 3305 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3306
3307 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3308 ret = -EINVAL;
3309 goto ohsps_unlock;
3310 }
3311
3312 oh->_postsetup_state = state;
3313 ret = 0;
3314
3315ohsps_unlock:
dc6d1cda 3316 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3317
3318 return ret;
3319}
c80705aa
KH
3320
3321/**
3322 * omap_hwmod_get_context_loss_count - get lost context count
3323 * @oh: struct omap_hwmod *
3324 *
3325 * Query the powerdomain of of @oh to get the context loss
3326 * count for this device.
3327 *
3328 * Returns the context loss count of the powerdomain assocated with @oh
3329 * upon success, or zero if no powerdomain exists for @oh.
3330 */
fc013873 3331int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3332{
3333 struct powerdomain *pwrdm;
3334 int ret = 0;
3335
3336 pwrdm = omap_hwmod_get_pwrdm(oh);
3337 if (pwrdm)
3338 ret = pwrdm_get_context_loss_count(pwrdm);
3339
3340 return ret;
3341}
43b01643
PW
3342
3343/**
3344 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3345 * @oh: struct omap_hwmod *
3346 *
3347 * Prevent the hwmod @oh from being reset during the setup process.
3348 * Intended for use by board-*.c files on boards with devices that
3349 * cannot tolerate being reset. Must be called before the hwmod has
3350 * been set up. Returns 0 upon success or negative error code upon
3351 * failure.
3352 */
3353int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3354{
3355 if (!oh)
3356 return -EINVAL;
3357
3358 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3359 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3360 oh->name);
3361 return -EINVAL;
3362 }
3363
3364 oh->flags |= HWMOD_INIT_NO_RESET;
3365
3366 return 0;
3367}
abc2d545
TK
3368
3369/**
3370 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3371 * @oh: struct omap_hwmod * containing hwmod mux entries
3372 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3373 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3374 *
3375 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3376 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3377 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3378 * this function is not called for a given pad_idx, then the ISR
3379 * associated with @oh's first MPU IRQ will be triggered when an I/O
3380 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3381 * the _dynamic or wakeup_ entry: if there are other entries not
3382 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3383 * entries are NOT COUNTED in the dynamic pad index. This function
3384 * must be called separately for each pad that requires its interrupt
3385 * to be re-routed this way. Returns -EINVAL if there is an argument
3386 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3387 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3388 *
3389 * XXX This function interface is fragile. Rather than using array
3390 * indexes, which are subject to unpredictable change, it should be
3391 * using hwmod IRQ names, and some other stable key for the hwmod mux
3392 * pad records.
3393 */
3394int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3395{
3396 int nr_irqs;
3397
3398 might_sleep();
3399
3400 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3401 pad_idx >= oh->mux->nr_pads_dynamic)
3402 return -EINVAL;
3403
3404 /* Check the number of available mpu_irqs */
3405 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3406 ;
3407
3408 if (irq_idx >= nr_irqs)
3409 return -EINVAL;
3410
3411 if (!oh->mux->irqs) {
3412 /* XXX What frees this? */
3413 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3414 GFP_KERNEL);
3415 if (!oh->mux->irqs)
3416 return -ENOMEM;
3417 }
3418 oh->mux->irqs[pad_idx] = irq_idx;
3419
3420 return 0;
3421}
9ebfd285
KH
3422
3423/**
3424 * omap_hwmod_init - initialize the hwmod code
3425 *
3426 * Sets up some function pointers needed by the hwmod code to operate on the
3427 * currently-booted SoC. Intended to be called once during kernel init
3428 * before any hwmods are registered. No return value.
3429 */
3430void __init omap_hwmod_init(void)
3431{
3432 if (cpu_is_omap44xx()) {
3433 soc_ops.enable_module = _omap4_enable_module;
3434 soc_ops.disable_module = _omap4_disable_module;
3435 }
3436
3437 inited = true;
3438}