OMAP: hwmod: add an hardreset API for use by other core code
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
63c85238
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
db2a60bf 4 * Copyright (C) 2009-2010 Nokia Corporation
63c85238 5 *
4788da26
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
63c85238
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This code manages "OMAP modules" (on-chip devices) and their
17 * integration with Linux device driver and bus code.
18 *
19 * References:
20 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
21 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
22 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
23 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
24 * - Open Core Protocol Specification 2.2
25 *
26 * To do:
27 * - pin mux handling
28 * - handle IO mapping
29 * - bus throughput & module latency measurement code
30 *
31 * XXX add tests at the beginning of each function to ensure the hwmod is
32 * in the appropriate state
33 * XXX error return values should be checked to ensure that they are
34 * appropriate
35 */
36#undef DEBUG
37
38#include <linux/kernel.h>
39#include <linux/errno.h>
40#include <linux/io.h>
41#include <linux/clk.h>
42#include <linux/delay.h>
43#include <linux/err.h>
44#include <linux/list.h>
45#include <linux/mutex.h>
63c85238 46
6f8b7ff5 47#include <plat/common.h>
ce491cf8
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48#include <plat/cpu.h>
49#include <plat/clockdomain.h>
50#include <plat/powerdomain.h>
51#include <plat/clock.h>
52#include <plat/omap_hwmod.h>
5365efbe 53#include <plat/prcm.h>
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54
55#include "cm.h"
5365efbe 56#include "prm.h"
63c85238 57
5365efbe
BC
58/* Maximum microseconds to wait for OMAP module to softreset */
59#define MAX_MODULE_SOFTRESET_WAIT 10000
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60
61/* Name of the OMAP hwmod for the MPU */
5c2c0296 62#define MPU_INITIATOR_NAME "mpu"
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63
64/* omap_hwmod_list contains all registered struct omap_hwmods */
65static LIST_HEAD(omap_hwmod_list);
66
67static DEFINE_MUTEX(omap_hwmod_mutex);
68
69/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
70static struct omap_hwmod *mpu_oh;
71
72/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
73static u8 inited;
74
75
76/* Private functions */
77
78/**
79 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
80 * @oh: struct omap_hwmod *
81 *
82 * Load the current value of the hwmod OCP_SYSCONFIG register into the
83 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
84 * OCP_SYSCONFIG register or 0 upon success.
85 */
86static int _update_sysc_cache(struct omap_hwmod *oh)
87{
43b40992
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88 if (!oh->class->sysc) {
89 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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90 return -EINVAL;
91 }
92
93 /* XXX ensure module interface clock is up */
94
43b40992 95 oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238 96
43b40992 97 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 98 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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99
100 return 0;
101}
102
103/**
104 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
105 * @v: OCP_SYSCONFIG value to write
106 * @oh: struct omap_hwmod *
107 *
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108 * Write @v into the module class' OCP_SYSCONFIG register, if it has
109 * one. No return value.
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110 */
111static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
112{
43b40992
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113 if (!oh->class->sysc) {
114 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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115 return;
116 }
117
118 /* XXX ensure module interface clock is up */
119
120 if (oh->_sysc_cache != v) {
121 oh->_sysc_cache = v;
43b40992 122 omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs);
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123 }
124}
125
126/**
127 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
128 * @oh: struct omap_hwmod *
129 * @standbymode: MIDLEMODE field bits
130 * @v: pointer to register contents to modify
131 *
132 * Update the master standby mode bits in @v to be @standbymode for
133 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
134 * upon error or 0 upon success.
135 */
136static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
137 u32 *v)
138{
358f0e63
TG
139 u32 mstandby_mask;
140 u8 mstandby_shift;
141
43b40992
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142 if (!oh->class->sysc ||
143 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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144 return -EINVAL;
145
43b40992
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146 if (!oh->class->sysc->sysc_fields) {
147 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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148 return -EINVAL;
149 }
150
43b40992 151 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
358f0e63
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152 mstandby_mask = (0x3 << mstandby_shift);
153
154 *v &= ~mstandby_mask;
155 *v |= __ffs(standbymode) << mstandby_shift;
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156
157 return 0;
158}
159
160/**
161 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
162 * @oh: struct omap_hwmod *
163 * @idlemode: SIDLEMODE field bits
164 * @v: pointer to register contents to modify
165 *
166 * Update the slave idle mode bits in @v to be @idlemode for the @oh
167 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
168 * or 0 upon success.
169 */
170static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
171{
358f0e63
TG
172 u32 sidle_mask;
173 u8 sidle_shift;
174
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175 if (!oh->class->sysc ||
176 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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177 return -EINVAL;
178
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179 if (!oh->class->sysc->sysc_fields) {
180 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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181 return -EINVAL;
182 }
183
43b40992 184 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
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185 sidle_mask = (0x3 << sidle_shift);
186
187 *v &= ~sidle_mask;
188 *v |= __ffs(idlemode) << sidle_shift;
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189
190 return 0;
191}
192
193/**
194 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
195 * @oh: struct omap_hwmod *
196 * @clockact: CLOCKACTIVITY field bits
197 * @v: pointer to register contents to modify
198 *
199 * Update the clockactivity mode bits in @v to be @clockact for the
200 * @oh hwmod. Used for additional powersaving on some modules. Does
201 * not write to the hardware. Returns -EINVAL upon error or 0 upon
202 * success.
203 */
204static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
205{
358f0e63
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206 u32 clkact_mask;
207 u8 clkact_shift;
208
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209 if (!oh->class->sysc ||
210 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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211 return -EINVAL;
212
43b40992
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213 if (!oh->class->sysc->sysc_fields) {
214 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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215 return -EINVAL;
216 }
217
43b40992 218 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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219 clkact_mask = (0x3 << clkact_shift);
220
221 *v &= ~clkact_mask;
222 *v |= clockact << clkact_shift;
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223
224 return 0;
225}
226
227/**
228 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
229 * @oh: struct omap_hwmod *
230 * @v: pointer to register contents to modify
231 *
232 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
233 * error or 0 upon success.
234 */
235static int _set_softreset(struct omap_hwmod *oh, u32 *v)
236{
358f0e63
TG
237 u32 softrst_mask;
238
43b40992
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239 if (!oh->class->sysc ||
240 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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241 return -EINVAL;
242
43b40992
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243 if (!oh->class->sysc->sysc_fields) {
244 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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245 return -EINVAL;
246 }
247
43b40992 248 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
249
250 *v |= softrst_mask;
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251
252 return 0;
253}
254
726072e5
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255/**
256 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
257 * @oh: struct omap_hwmod *
258 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
259 * @v: pointer to register contents to modify
260 *
261 * Update the module autoidle bit in @v to be @autoidle for the @oh
262 * hwmod. The autoidle bit controls whether the module can gate
263 * internal clocks automatically when it isn't doing anything; the
264 * exact function of this bit varies on a per-module basis. This
265 * function does not write to the hardware. Returns -EINVAL upon
266 * error or 0 upon success.
267 */
268static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
269 u32 *v)
270{
358f0e63
TG
271 u32 autoidle_mask;
272 u8 autoidle_shift;
273
43b40992
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274 if (!oh->class->sysc ||
275 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
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276 return -EINVAL;
277
43b40992
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278 if (!oh->class->sysc->sysc_fields) {
279 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
280 return -EINVAL;
281 }
282
43b40992 283 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
358f0e63
TG
284 autoidle_mask = (0x3 << autoidle_shift);
285
286 *v &= ~autoidle_mask;
287 *v |= autoidle << autoidle_shift;
726072e5
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288
289 return 0;
290}
291
63c85238
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292/**
293 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
294 * @oh: struct omap_hwmod *
295 *
296 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
297 * upon error or 0 upon success.
298 */
299static int _enable_wakeup(struct omap_hwmod *oh)
300{
358f0e63 301 u32 v, wakeup_mask;
63c85238 302
43b40992
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303 if (!oh->class->sysc ||
304 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
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305 return -EINVAL;
306
43b40992
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307 if (!oh->class->sysc->sysc_fields) {
308 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
309 return -EINVAL;
310 }
311
43b40992 312 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 313
63c85238 314 v = oh->_sysc_cache;
358f0e63 315 v |= wakeup_mask;
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316 _write_sysconfig(v, oh);
317
318 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
319
320 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
321
322 return 0;
323}
324
325/**
326 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
327 * @oh: struct omap_hwmod *
328 *
329 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
330 * upon error or 0 upon success.
331 */
332static int _disable_wakeup(struct omap_hwmod *oh)
333{
358f0e63 334 u32 v, wakeup_mask;
63c85238 335
43b40992
PW
336 if (!oh->class->sysc ||
337 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
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338 return -EINVAL;
339
43b40992
PW
340 if (!oh->class->sysc->sysc_fields) {
341 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
342 return -EINVAL;
343 }
344
43b40992 345 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 346
63c85238 347 v = oh->_sysc_cache;
358f0e63 348 v &= ~wakeup_mask;
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349 _write_sysconfig(v, oh);
350
351 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
352
353 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
354
355 return 0;
356}
357
358/**
359 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
360 * @oh: struct omap_hwmod *
361 *
362 * Prevent the hardware module @oh from entering idle while the
363 * hardare module initiator @init_oh is active. Useful when a module
364 * will be accessed by a particular initiator (e.g., if a module will
365 * be accessed by the IVA, there should be a sleepdep between the IVA
366 * initiator and the module). Only applies to modules in smart-idle
367 * mode. Returns -EINVAL upon error or passes along
55ed9694 368 * clkdm_add_sleepdep() value upon success.
63c85238
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369 */
370static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
371{
372 if (!oh->_clk)
373 return -EINVAL;
374
55ed9694 375 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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376}
377
378/**
379 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
380 * @oh: struct omap_hwmod *
381 *
382 * Allow the hardware module @oh to enter idle while the hardare
383 * module initiator @init_oh is active. Useful when a module will not
384 * be accessed by a particular initiator (e.g., if a module will not
385 * be accessed by the IVA, there should be no sleepdep between the IVA
386 * initiator and the module). Only applies to modules in smart-idle
387 * mode. Returns -EINVAL upon error or passes along
55ed9694 388 * clkdm_del_sleepdep() value upon success.
63c85238
PW
389 */
390static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
391{
392 if (!oh->_clk)
393 return -EINVAL;
394
55ed9694 395 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
396}
397
398/**
399 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
400 * @oh: struct omap_hwmod *
401 *
402 * Called from _init_clocks(). Populates the @oh _clk (main
403 * functional clock pointer) if a main_clk is present. Returns 0 on
404 * success or -EINVAL on error.
405 */
406static int _init_main_clk(struct omap_hwmod *oh)
407{
63c85238
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408 int ret = 0;
409
50ebdac2 410 if (!oh->main_clk)
63c85238
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411 return 0;
412
63403384 413 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 414 if (!oh->_clk) {
20383d82
BC
415 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
416 oh->name, oh->main_clk);
63403384 417 return -EINVAL;
dc75925d 418 }
63c85238 419
63403384
BC
420 if (!oh->_clk->clkdm)
421 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
422 oh->main_clk, oh->_clk->name);
81d7c6ff 423
63c85238
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424 return ret;
425}
426
427/**
887adeac 428 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
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429 * @oh: struct omap_hwmod *
430 *
431 * Called from _init_clocks(). Populates the @oh OCP slave interface
432 * clock pointers. Returns 0 on success or -EINVAL on error.
433 */
434static int _init_interface_clks(struct omap_hwmod *oh)
435{
63c85238
PW
436 struct clk *c;
437 int i;
438 int ret = 0;
439
440 if (oh->slaves_cnt == 0)
441 return 0;
442
682fdc96
BC
443 for (i = 0; i < oh->slaves_cnt; i++) {
444 struct omap_hwmod_ocp_if *os = oh->slaves[i];
445
50ebdac2 446 if (!os->clk)
63c85238
PW
447 continue;
448
50ebdac2 449 c = omap_clk_get_by_name(os->clk);
dc75925d 450 if (!c) {
20383d82
BC
451 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
452 oh->name, os->clk);
63c85238 453 ret = -EINVAL;
dc75925d 454 }
63c85238
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455 os->_clk = c;
456 }
457
458 return ret;
459}
460
461/**
462 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
463 * @oh: struct omap_hwmod *
464 *
465 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
466 * clock pointers. Returns 0 on success or -EINVAL on error.
467 */
468static int _init_opt_clks(struct omap_hwmod *oh)
469{
470 struct omap_hwmod_opt_clk *oc;
471 struct clk *c;
472 int i;
473 int ret = 0;
474
475 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 476 c = omap_clk_get_by_name(oc->clk);
dc75925d 477 if (!c) {
20383d82
BC
478 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
479 oh->name, oc->clk);
63c85238 480 ret = -EINVAL;
dc75925d 481 }
63c85238
PW
482 oc->_clk = c;
483 }
484
485 return ret;
486}
487
488/**
489 * _enable_clocks - enable hwmod main clock and interface clocks
490 * @oh: struct omap_hwmod *
491 *
492 * Enables all clocks necessary for register reads and writes to succeed
493 * on the hwmod @oh. Returns 0.
494 */
495static int _enable_clocks(struct omap_hwmod *oh)
496{
63c85238
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497 int i;
498
499 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
500
4d3ae5a9 501 if (oh->_clk)
63c85238
PW
502 clk_enable(oh->_clk);
503
504 if (oh->slaves_cnt > 0) {
682fdc96
BC
505 for (i = 0; i < oh->slaves_cnt; i++) {
506 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
507 struct clk *c = os->_clk;
508
4d3ae5a9 509 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
510 clk_enable(c);
511 }
512 }
513
514 /* The opt clocks are controlled by the device driver. */
515
516 return 0;
517}
518
519/**
520 * _disable_clocks - disable hwmod main clock and interface clocks
521 * @oh: struct omap_hwmod *
522 *
523 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
524 */
525static int _disable_clocks(struct omap_hwmod *oh)
526{
63c85238
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527 int i;
528
529 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
530
4d3ae5a9 531 if (oh->_clk)
63c85238
PW
532 clk_disable(oh->_clk);
533
534 if (oh->slaves_cnt > 0) {
682fdc96
BC
535 for (i = 0; i < oh->slaves_cnt; i++) {
536 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
537 struct clk *c = os->_clk;
538
4d3ae5a9 539 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
540 clk_disable(c);
541 }
542 }
543
544 /* The opt clocks are controlled by the device driver. */
545
546 return 0;
547}
548
549/**
550 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
551 * @oh: struct omap_hwmod *
552 *
553 * Returns the array index of the OCP slave port that the MPU
554 * addresses the device on, or -EINVAL upon error or not found.
555 */
556static int _find_mpu_port_index(struct omap_hwmod *oh)
557{
63c85238
PW
558 int i;
559 int found = 0;
560
561 if (!oh || oh->slaves_cnt == 0)
562 return -EINVAL;
563
682fdc96
BC
564 for (i = 0; i < oh->slaves_cnt; i++) {
565 struct omap_hwmod_ocp_if *os = oh->slaves[i];
566
63c85238
PW
567 if (os->user & OCP_USER_MPU) {
568 found = 1;
569 break;
570 }
571 }
572
573 if (found)
574 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
575 oh->name, i);
576 else
577 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
578 oh->name);
579
580 return (found) ? i : -EINVAL;
581}
582
583/**
584 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
585 * @oh: struct omap_hwmod *
586 *
587 * Return the virtual address of the base of the register target of
588 * device @oh, or NULL on error.
589 */
590static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
591{
592 struct omap_hwmod_ocp_if *os;
593 struct omap_hwmod_addr_space *mem;
594 int i;
595 int found = 0;
986a13f5 596 void __iomem *va_start;
63c85238
PW
597
598 if (!oh || oh->slaves_cnt == 0)
599 return NULL;
600
682fdc96 601 os = oh->slaves[index];
63c85238
PW
602
603 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
604 if (mem->flags & ADDR_TYPE_RT) {
605 found = 1;
606 break;
607 }
608 }
609
986a13f5
TL
610 if (found) {
611 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
612 if (!va_start) {
613 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
614 return NULL;
615 }
63c85238 616 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
617 oh->name, va_start);
618 } else {
63c85238
PW
619 pr_debug("omap_hwmod: %s: no MPU register target found\n",
620 oh->name);
986a13f5 621 }
63c85238 622
986a13f5 623 return (found) ? va_start : NULL;
63c85238
PW
624}
625
626/**
627 * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG
628 * @oh: struct omap_hwmod *
629 *
630 * If module is marked as SWSUP_SIDLE, force the module out of slave
631 * idle; otherwise, configure it for smart-idle. If module is marked
632 * as SWSUP_MSUSPEND, force the module out of master standby;
633 * otherwise, configure it for smart-standby. No return value.
634 */
635static void _sysc_enable(struct omap_hwmod *oh)
636{
43b40992 637 u8 idlemode, sf;
63c85238
PW
638 u32 v;
639
43b40992 640 if (!oh->class->sysc)
63c85238
PW
641 return;
642
643 v = oh->_sysc_cache;
43b40992 644 sf = oh->class->sysc->sysc_flags;
63c85238 645
43b40992 646 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
647 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
648 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
649 _set_slave_idlemode(oh, idlemode, &v);
650 }
651
43b40992 652 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
653 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
654 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
655 _set_master_standbymode(oh, idlemode, &v);
656 }
657
43b40992 658 if (sf & SYSC_HAS_AUTOIDLE) {
726072e5
PW
659 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
660 0 : 1;
661 _set_module_autoidle(oh, idlemode, &v);
662 }
663
664 /* XXX OCP ENAWAKEUP bit? */
63c85238 665
a16b1f7f
PW
666 /*
667 * XXX The clock framework should handle this, by
668 * calling into this code. But this must wait until the
669 * clock structures are tagged with omap_hwmod entries
670 */
43b40992
PW
671 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
672 (sf & SYSC_HAS_CLOCKACTIVITY))
673 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238
PW
674
675 _write_sysconfig(v, oh);
676}
677
678/**
679 * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG
680 * @oh: struct omap_hwmod *
681 *
682 * If module is marked as SWSUP_SIDLE, force the module into slave
683 * idle; otherwise, configure it for smart-idle. If module is marked
684 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
685 * configure it for smart-standby. No return value.
686 */
687static void _sysc_idle(struct omap_hwmod *oh)
688{
43b40992 689 u8 idlemode, sf;
63c85238
PW
690 u32 v;
691
43b40992 692 if (!oh->class->sysc)
63c85238
PW
693 return;
694
695 v = oh->_sysc_cache;
43b40992 696 sf = oh->class->sysc->sysc_flags;
63c85238 697
43b40992 698 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
699 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
700 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
701 _set_slave_idlemode(oh, idlemode, &v);
702 }
703
43b40992 704 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
705 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
706 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
707 _set_master_standbymode(oh, idlemode, &v);
708 }
709
710 _write_sysconfig(v, oh);
711}
712
713/**
714 * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG
715 * @oh: struct omap_hwmod *
716 *
717 * Force the module into slave idle and master suspend. No return
718 * value.
719 */
720static void _sysc_shutdown(struct omap_hwmod *oh)
721{
722 u32 v;
43b40992 723 u8 sf;
63c85238 724
43b40992 725 if (!oh->class->sysc)
63c85238
PW
726 return;
727
728 v = oh->_sysc_cache;
43b40992 729 sf = oh->class->sysc->sysc_flags;
63c85238 730
43b40992 731 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
732 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
733
43b40992 734 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
735 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
736
43b40992 737 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 738 _set_module_autoidle(oh, 1, &v);
63c85238
PW
739
740 _write_sysconfig(v, oh);
741}
742
743/**
744 * _lookup - find an omap_hwmod by name
745 * @name: find an omap_hwmod by name
746 *
747 * Return a pointer to an omap_hwmod by name, or NULL if not found.
748 * Caller must hold omap_hwmod_mutex.
749 */
750static struct omap_hwmod *_lookup(const char *name)
751{
752 struct omap_hwmod *oh, *temp_oh;
753
754 oh = NULL;
755
756 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
757 if (!strcmp(name, temp_oh->name)) {
758 oh = temp_oh;
759 break;
760 }
761 }
762
763 return oh;
764}
765
766/**
767 * _init_clocks - clk_get() all clocks associated with this hwmod
768 * @oh: struct omap_hwmod *
97d60162 769 * @data: not used; pass NULL
63c85238
PW
770 *
771 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
12b1fdb4
KH
772 * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
773 * the omap_hwmod has not yet been registered or if the clocks have
774 * already been initialized, 0 on success, or a non-zero error on
775 * failure.
63c85238 776 */
97d60162 777static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
778{
779 int ret = 0;
780
781 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
782 return -EINVAL;
783
784 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
785
786 ret |= _init_main_clk(oh);
787 ret |= _init_interface_clks(oh);
788 ret |= _init_opt_clks(oh);
789
f5c1f84b
BC
790 if (!ret)
791 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 792
f5c1f84b 793 return 0;
63c85238
PW
794}
795
796/**
797 * _wait_target_ready - wait for a module to leave slave idle
798 * @oh: struct omap_hwmod *
799 *
800 * Wait for a module @oh to leave slave idle. Returns 0 if the module
801 * does not have an IDLEST bit or if the module successfully leaves
802 * slave idle; otherwise, pass along the return value of the
803 * appropriate *_cm_wait_module_ready() function.
804 */
805static int _wait_target_ready(struct omap_hwmod *oh)
806{
807 struct omap_hwmod_ocp_if *os;
808 int ret;
809
810 if (!oh)
811 return -EINVAL;
812
813 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
814 return 0;
815
682fdc96 816 os = oh->slaves[oh->_mpu_port_index];
63c85238 817
33f7ec81 818 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
819 return 0;
820
821 /* XXX check module SIDLEMODE */
822
823 /* XXX check clock enable states */
824
825 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
826 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
827 oh->prcm.omap2.idlest_reg_id,
828 oh->prcm.omap2.idlest_idle_bit);
63c85238 829 } else if (cpu_is_omap44xx()) {
9a23dfe1 830 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
831 } else {
832 BUG();
833 };
834
835 return ret;
836}
837
5365efbe
BC
838/**
839 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
840 * @oh: struct omap_hwmod *
841 * @name: name of the reset line in the context of this hwmod
842 *
843 * Return the bit position of the reset line that match the
844 * input name. Return -ENOENT if not found.
845 */
846static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
847{
848 int i;
849
850 for (i = 0; i < oh->rst_lines_cnt; i++) {
851 const char *rst_line = oh->rst_lines[i].name;
852 if (!strcmp(rst_line, name)) {
853 u8 shift = oh->rst_lines[i].rst_shift;
854 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
855 oh->name, rst_line, shift);
856
857 return shift;
858 }
859 }
860
861 return -ENOENT;
862}
863
864/**
865 * _assert_hardreset - assert the HW reset line of submodules
866 * contained in the hwmod module.
867 * @oh: struct omap_hwmod *
868 * @name: name of the reset line to lookup and assert
869 *
870 * Some IP like dsp, ipu or iva contain processor that require
871 * an HW reset line to be assert / deassert in order to enable fully
872 * the IP.
873 */
874static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
875{
876 u8 shift;
877
878 if (!oh)
879 return -EINVAL;
880
881 shift = _lookup_hardreset(oh, name);
882 if (IS_ERR_VALUE(shift))
883 return shift;
884
885 if (cpu_is_omap24xx() || cpu_is_omap34xx())
886 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
887 shift);
888 else if (cpu_is_omap44xx())
889 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
890 shift);
891 else
892 return -EINVAL;
893}
894
895/**
896 * _deassert_hardreset - deassert the HW reset line of submodules contained
897 * in the hwmod module.
898 * @oh: struct omap_hwmod *
899 * @name: name of the reset line to look up and deassert
900 *
901 * Some IP like dsp, ipu or iva contain processor that require
902 * an HW reset line to be assert / deassert in order to enable fully
903 * the IP.
904 */
905static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
906{
907 u8 shift;
908 int r;
909
910 if (!oh)
911 return -EINVAL;
912
913 shift = _lookup_hardreset(oh, name);
914 if (IS_ERR_VALUE(shift))
915 return shift;
916
917 if (cpu_is_omap24xx() || cpu_is_omap34xx())
918 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
919 shift);
920 else if (cpu_is_omap44xx())
921 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
922 shift);
923 else
924 return -EINVAL;
925
926 if (r == -EBUSY)
927 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
928
929 return r;
930}
931
932/**
933 * _read_hardreset - read the HW reset line state of submodules
934 * contained in the hwmod module
935 * @oh: struct omap_hwmod *
936 * @name: name of the reset line to look up and read
937 *
938 * Return the state of the reset line.
939 */
940static int _read_hardreset(struct omap_hwmod *oh, const char *name)
941{
942 u8 shift;
943
944 if (!oh)
945 return -EINVAL;
946
947 shift = _lookup_hardreset(oh, name);
948 if (IS_ERR_VALUE(shift))
949 return shift;
950
951 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
952 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
953 shift);
954 } else if (cpu_is_omap44xx()) {
955 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
956 shift);
957 } else {
958 return -EINVAL;
959 }
960}
961
63c85238
PW
962/**
963 * _reset - reset an omap_hwmod
964 * @oh: struct omap_hwmod *
965 *
966 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
967 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
968 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
969 * the module did not reset in time, or 0 upon success.
63c85238
PW
970 */
971static int _reset(struct omap_hwmod *oh)
972{
973 u32 r, v;
6f8b7ff5 974 int c = 0;
63c85238 975
43b40992
PW
976 if (!oh->class->sysc ||
977 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET) ||
978 (oh->class->sysc->sysc_flags & SYSS_MISSING))
63c85238
PW
979 return -EINVAL;
980
981 /* clocks must be on for this operation */
982 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
983 pr_warning("omap_hwmod: %s: reset can only be entered from "
984 "enabled state\n", oh->name);
63c85238
PW
985 return -EINVAL;
986 }
987
988 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
989
990 v = oh->_sysc_cache;
991 r = _set_softreset(oh, &v);
992 if (r)
993 return r;
994 _write_sysconfig(v, oh);
995
43b40992 996 omap_test_timeout((omap_hwmod_readl(oh, oh->class->sysc->syss_offs) &
6f8b7ff5 997 SYSS_RESETDONE_MASK),
5365efbe 998 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 999
5365efbe 1000 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1001 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1002 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1003 else
5365efbe 1004 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1005
1006 /*
1007 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1008 * _wait_target_ready() or _reset()
1009 */
1010
5365efbe 1011 return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
63c85238
PW
1012}
1013
1014/**
84824022 1015 * _omap_hwmod_enable - enable an omap_hwmod
63c85238
PW
1016 * @oh: struct omap_hwmod *
1017 *
1018 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
12b1fdb4
KH
1019 * register target. Returns -EINVAL if the hwmod is in the wrong
1020 * state or passes along the return value of _wait_target_ready().
63c85238 1021 */
84824022 1022int _omap_hwmod_enable(struct omap_hwmod *oh)
63c85238
PW
1023{
1024 int r;
1025
1026 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1027 oh->_state != _HWMOD_STATE_IDLE &&
1028 oh->_state != _HWMOD_STATE_DISABLED) {
1029 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1030 "from initialized, idle, or disabled state\n", oh->name);
1031 return -EINVAL;
1032 }
1033
1034 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1035
5365efbe
BC
1036 /*
1037 * If an IP contains only one HW reset line, then de-assert it in order
1038 * to allow to enable the clocks. Otherwise the PRCM will return
1039 * Intransition status, and the init will failed.
1040 */
1041 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1042 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1043 _deassert_hardreset(oh, oh->rst_lines[0].name);
1044
63c85238
PW
1045 /* XXX mux balls */
1046
1047 _add_initiator_dep(oh, mpu_oh);
1048 _enable_clocks(oh);
1049
63c85238 1050 r = _wait_target_ready(oh);
9a23dfe1 1051 if (!r) {
63c85238
PW
1052 oh->_state = _HWMOD_STATE_ENABLED;
1053
9a23dfe1
BC
1054 /* Access the sysconfig only if the target is ready */
1055 if (oh->class->sysc) {
1056 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1057 _update_sysc_cache(oh);
1058 _sysc_enable(oh);
1059 }
1060 } else {
1061 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1062 oh->name, r);
1063 }
1064
63c85238
PW
1065 return r;
1066}
1067
1068/**
1069 * _idle - idle an omap_hwmod
1070 * @oh: struct omap_hwmod *
1071 *
1072 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1073 * no further work. Returns -EINVAL if the hwmod is in the wrong
1074 * state or returns 0.
1075 */
84824022 1076int _omap_hwmod_idle(struct omap_hwmod *oh)
63c85238
PW
1077{
1078 if (oh->_state != _HWMOD_STATE_ENABLED) {
1079 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1080 "enabled state\n", oh->name);
1081 return -EINVAL;
1082 }
1083
1084 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1085
43b40992 1086 if (oh->class->sysc)
63c85238
PW
1087 _sysc_idle(oh);
1088 _del_initiator_dep(oh, mpu_oh);
1089 _disable_clocks(oh);
1090
1091 oh->_state = _HWMOD_STATE_IDLE;
1092
1093 return 0;
1094}
1095
1096/**
1097 * _shutdown - shutdown an omap_hwmod
1098 * @oh: struct omap_hwmod *
1099 *
1100 * Shut down an omap_hwmod @oh. This should be called when the driver
1101 * used for the hwmod is removed or unloaded or if the driver is not
1102 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1103 * state or returns 0.
1104 */
1105static int _shutdown(struct omap_hwmod *oh)
1106{
1107 if (oh->_state != _HWMOD_STATE_IDLE &&
1108 oh->_state != _HWMOD_STATE_ENABLED) {
1109 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1110 "from idle, or enabled state\n", oh->name);
1111 return -EINVAL;
1112 }
1113
1114 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1115
43b40992 1116 if (oh->class->sysc)
63c85238 1117 _sysc_shutdown(oh);
3827f949 1118
5365efbe
BC
1119 /*
1120 * If an IP contains only one HW reset line, then assert it
1121 * before disabling the clocks and shutting down the IP.
1122 */
1123 if (oh->rst_lines_cnt == 1)
1124 _assert_hardreset(oh, oh->rst_lines[0].name);
1125
3827f949
BC
1126 /* clocks and deps are already disabled in idle */
1127 if (oh->_state == _HWMOD_STATE_ENABLED) {
1128 _del_initiator_dep(oh, mpu_oh);
1129 /* XXX what about the other system initiators here? dma, dsp */
1130 _disable_clocks(oh);
1131 }
63c85238
PW
1132 /* XXX Should this code also force-disable the optional clocks? */
1133
1134 /* XXX mux any associated balls to safe mode */
1135
1136 oh->_state = _HWMOD_STATE_DISABLED;
1137
1138 return 0;
1139}
1140
63c85238
PW
1141/**
1142 * _setup - do initial configuration of omap_hwmod
1143 * @oh: struct omap_hwmod *
97d60162 1144 * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
63c85238
PW
1145 *
1146 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
12b1fdb4
KH
1147 * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
1148 * a system that will not call omap_hwmod_enable() to enable devices
1149 * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
1150 * is in the wrong state or returns 0.
63c85238 1151 */
97d60162 1152static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1153{
9a23dfe1 1154 int i, r;
97d60162 1155 u8 skip_setup_idle;
63c85238 1156
97d60162 1157 if (!oh || !data)
63c85238
PW
1158 return -EINVAL;
1159
97d60162
PW
1160 skip_setup_idle = *(u8 *)data;
1161
63c85238
PW
1162 /* Set iclk autoidle mode */
1163 if (oh->slaves_cnt > 0) {
682fdc96
BC
1164 for (i = 0; i < oh->slaves_cnt; i++) {
1165 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1166 struct clk *c = os->_clk;
1167
4d3ae5a9 1168 if (!c)
63c85238
PW
1169 continue;
1170
1171 if (os->flags & OCPIF_SWSUP_IDLE) {
1172 /* XXX omap_iclk_deny_idle(c); */
1173 } else {
1174 /* XXX omap_iclk_allow_idle(c); */
1175 clk_enable(c);
1176 }
1177 }
1178 }
1179
12b1fdb4 1180 mutex_init(&oh->_mutex);
63c85238
PW
1181 oh->_state = _HWMOD_STATE_INITIALIZED;
1182
5365efbe
BC
1183 /*
1184 * In the case of hwmod with hardreset that should not be
1185 * de-assert at boot time, we have to keep the module
1186 * initialized, because we cannot enable it properly with the
1187 * reset asserted. Exit without warning because that behavior is
1188 * expected.
1189 */
1190 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1191 return 0;
1192
84824022 1193 r = _omap_hwmod_enable(oh);
9a23dfe1
BC
1194 if (r) {
1195 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1196 oh->name, oh->_state);
1197 return 0;
1198 }
63c85238 1199
b835d014 1200 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1201 _reset(oh);
1202
b835d014 1203 /*
76e5589e
BC
1204 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1205 * The _omap_hwmod_enable() function should be split to
1206 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1207 */
43b40992 1208 if (oh->class->sysc) {
b835d014
PW
1209 _update_sysc_cache(oh);
1210 _sysc_enable(oh);
1211 }
1212 }
63c85238 1213
97d60162 1214 if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle)
84824022 1215 _omap_hwmod_idle(oh);
63c85238
PW
1216
1217 return 0;
1218}
1219
1220
1221
1222/* Public functions */
1223
1224u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
1225{
db2a60bf 1226 return __raw_readl(oh->_mpu_rt_va + reg_offs);
63c85238
PW
1227}
1228
1229void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1230{
db2a60bf 1231 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
63c85238
PW
1232}
1233
887adeac
PW
1234/**
1235 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1236 * @oh: struct omap_hwmod *
1237 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1238 *
1239 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1240 * local copy. Intended to be used by drivers that have some erratum
1241 * that requires direct manipulation of the SIDLEMODE bits. Returns
1242 * -EINVAL if @oh is null, or passes along the return value from
1243 * _set_slave_idlemode().
1244 *
1245 * XXX Does this function have any current users? If not, we should
1246 * remove it; it is better to let the rest of the hwmod code handle this.
1247 * Any users of this function should be scrutinized carefully.
1248 */
46273e6f
KH
1249int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1250{
1251 u32 v;
1252 int retval = 0;
1253
1254 if (!oh)
1255 return -EINVAL;
1256
1257 v = oh->_sysc_cache;
1258
1259 retval = _set_slave_idlemode(oh, idlemode, &v);
1260 if (!retval)
1261 _write_sysconfig(v, oh);
1262
1263 return retval;
1264}
1265
63c85238
PW
1266/**
1267 * omap_hwmod_register - register a struct omap_hwmod
1268 * @oh: struct omap_hwmod *
1269 *
43b40992
PW
1270 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1271 * already has been registered by the same name; -EINVAL if the
1272 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1273 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1274 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1275 * success.
63c85238
PW
1276 *
1277 * XXX The data should be copied into bootmem, so the original data
1278 * should be marked __initdata and freed after init. This would allow
1279 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1280 * that the copy process would be relatively complex due to the large number
1281 * of substructures.
1282 */
1283int omap_hwmod_register(struct omap_hwmod *oh)
1284{
1285 int ret, ms_id;
1286
43b40992
PW
1287 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1288 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1289 return -EINVAL;
1290
1291 mutex_lock(&omap_hwmod_mutex);
1292
1293 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1294
1295 if (_lookup(oh->name)) {
1296 ret = -EEXIST;
1297 goto ohr_unlock;
1298 }
1299
1300 ms_id = _find_mpu_port_index(oh);
1301 if (!IS_ERR_VALUE(ms_id)) {
1302 oh->_mpu_port_index = ms_id;
db2a60bf 1303 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
63c85238
PW
1304 } else {
1305 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1306 }
1307
1308 list_add_tail(&oh->node, &omap_hwmod_list);
1309
1310 oh->_state = _HWMOD_STATE_REGISTERED;
1311
1312 ret = 0;
1313
1314ohr_unlock:
1315 mutex_unlock(&omap_hwmod_mutex);
1316 return ret;
1317}
1318
1319/**
1320 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1321 * @name: name of the omap_hwmod to look up
1322 *
1323 * Given a @name of an omap_hwmod, return a pointer to the registered
1324 * struct omap_hwmod *, or NULL upon error.
1325 */
1326struct omap_hwmod *omap_hwmod_lookup(const char *name)
1327{
1328 struct omap_hwmod *oh;
1329
1330 if (!name)
1331 return NULL;
1332
1333 mutex_lock(&omap_hwmod_mutex);
1334 oh = _lookup(name);
1335 mutex_unlock(&omap_hwmod_mutex);
1336
1337 return oh;
1338}
1339
1340/**
1341 * omap_hwmod_for_each - call function for each registered omap_hwmod
1342 * @fn: pointer to a callback function
97d60162 1343 * @data: void * data to pass to callback function
63c85238
PW
1344 *
1345 * Call @fn for each registered omap_hwmod, passing @data to each
1346 * function. @fn must return 0 for success or any other value for
1347 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1348 * will stop and the non-zero return value will be passed to the
1349 * caller of omap_hwmod_for_each(). @fn is called with
1350 * omap_hwmod_for_each() held.
1351 */
97d60162
PW
1352int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1353 void *data)
63c85238
PW
1354{
1355 struct omap_hwmod *temp_oh;
1356 int ret;
1357
1358 if (!fn)
1359 return -EINVAL;
1360
1361 mutex_lock(&omap_hwmod_mutex);
1362 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1363 ret = (*fn)(temp_oh, data);
63c85238
PW
1364 if (ret)
1365 break;
1366 }
1367 mutex_unlock(&omap_hwmod_mutex);
1368
1369 return ret;
1370}
1371
1372
1373/**
1374 * omap_hwmod_init - init omap_hwmod code and register hwmods
1375 * @ohs: pointer to an array of omap_hwmods to register
1376 *
1377 * Intended to be called early in boot before the clock framework is
1378 * initialized. If @ohs is not null, will register all omap_hwmods
1379 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1380 * omap_hwmod_init() has already been called or 0 otherwise.
1381 */
1382int omap_hwmod_init(struct omap_hwmod **ohs)
1383{
1384 struct omap_hwmod *oh;
1385 int r;
1386
1387 if (inited)
1388 return -EINVAL;
1389
1390 inited = 1;
1391
1392 if (!ohs)
1393 return 0;
1394
1395 oh = *ohs;
1396 while (oh) {
1397 if (omap_chip_is(oh->omap_chip)) {
1398 r = omap_hwmod_register(oh);
1399 WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
1400 "%d\n", oh->name, r);
1401 }
1402 oh = *++ohs;
1403 }
1404
1405 return 0;
1406}
1407
1408/**
1409 * omap_hwmod_late_init - do some post-clock framework initialization
97d60162 1410 * @skip_setup_idle: if 1, do not idle hwmods in _setup()
63c85238
PW
1411 *
1412 * Must be called after omap2_clk_init(). Resolves the struct clk names
1413 * to struct clk pointers for each registered omap_hwmod. Also calls
1414 * _setup() on each hwmod. Returns 0.
1415 */
97d60162 1416int omap_hwmod_late_init(u8 skip_setup_idle)
63c85238
PW
1417{
1418 int r;
1419
1420 /* XXX check return value */
97d60162 1421 r = omap_hwmod_for_each(_init_clocks, NULL);
63c85238
PW
1422 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1423
1424 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1425 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1426 MPU_INITIATOR_NAME);
1427
97d60162
PW
1428 if (skip_setup_idle)
1429 pr_debug("omap_hwmod: will leave hwmods enabled during setup\n");
1430
1431 omap_hwmod_for_each(_setup, &skip_setup_idle);
63c85238
PW
1432
1433 return 0;
1434}
1435
1436/**
1437 * omap_hwmod_unregister - unregister an omap_hwmod
1438 * @oh: struct omap_hwmod *
1439 *
1440 * Unregisters a previously-registered omap_hwmod @oh. There's probably
1441 * no use case for this, so it is likely to be removed in a later version.
1442 *
1443 * XXX Free all of the bootmem-allocated structures here when that is
1444 * implemented. Make it clear that core code is the only code that is
1445 * expected to unregister modules.
1446 */
1447int omap_hwmod_unregister(struct omap_hwmod *oh)
1448{
1449 if (!oh)
1450 return -EINVAL;
1451
1452 pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
1453
1454 mutex_lock(&omap_hwmod_mutex);
db2a60bf 1455 iounmap(oh->_mpu_rt_va);
63c85238
PW
1456 list_del(&oh->node);
1457 mutex_unlock(&omap_hwmod_mutex);
1458
1459 return 0;
1460}
1461
1462/**
1463 * omap_hwmod_enable - enable an omap_hwmod
1464 * @oh: struct omap_hwmod *
1465 *
1466 * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable().
1467 * Returns -EINVAL on error or passes along the return value from _enable().
1468 */
1469int omap_hwmod_enable(struct omap_hwmod *oh)
1470{
1471 int r;
1472
1473 if (!oh)
1474 return -EINVAL;
1475
12b1fdb4 1476 mutex_lock(&oh->_mutex);
84824022 1477 r = _omap_hwmod_enable(oh);
12b1fdb4 1478 mutex_unlock(&oh->_mutex);
63c85238
PW
1479
1480 return r;
1481}
1482
84824022 1483
63c85238
PW
1484/**
1485 * omap_hwmod_idle - idle an omap_hwmod
1486 * @oh: struct omap_hwmod *
1487 *
1488 * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle().
1489 * Returns -EINVAL on error or passes along the return value from _idle().
1490 */
1491int omap_hwmod_idle(struct omap_hwmod *oh)
1492{
1493 if (!oh)
1494 return -EINVAL;
1495
12b1fdb4 1496 mutex_lock(&oh->_mutex);
84824022 1497 _omap_hwmod_idle(oh);
12b1fdb4 1498 mutex_unlock(&oh->_mutex);
63c85238
PW
1499
1500 return 0;
1501}
1502
1503/**
1504 * omap_hwmod_shutdown - shutdown an omap_hwmod
1505 * @oh: struct omap_hwmod *
1506 *
1507 * Shutdown an omap_hwomd @oh. Intended to be called by
1508 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1509 * the return value from _shutdown().
1510 */
1511int omap_hwmod_shutdown(struct omap_hwmod *oh)
1512{
1513 if (!oh)
1514 return -EINVAL;
1515
12b1fdb4 1516 mutex_lock(&oh->_mutex);
63c85238 1517 _shutdown(oh);
12b1fdb4 1518 mutex_unlock(&oh->_mutex);
63c85238
PW
1519
1520 return 0;
1521}
1522
1523/**
1524 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1525 * @oh: struct omap_hwmod *oh
1526 *
1527 * Intended to be called by the omap_device code.
1528 */
1529int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1530{
12b1fdb4 1531 mutex_lock(&oh->_mutex);
63c85238 1532 _enable_clocks(oh);
12b1fdb4 1533 mutex_unlock(&oh->_mutex);
63c85238
PW
1534
1535 return 0;
1536}
1537
1538/**
1539 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1540 * @oh: struct omap_hwmod *oh
1541 *
1542 * Intended to be called by the omap_device code.
1543 */
1544int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1545{
12b1fdb4 1546 mutex_lock(&oh->_mutex);
63c85238 1547 _disable_clocks(oh);
12b1fdb4 1548 mutex_unlock(&oh->_mutex);
63c85238
PW
1549
1550 return 0;
1551}
1552
1553/**
1554 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1555 * @oh: struct omap_hwmod *oh
1556 *
1557 * Intended to be called by drivers and core code when all posted
1558 * writes to a device must complete before continuing further
1559 * execution (for example, after clearing some device IRQSTATUS
1560 * register bits)
1561 *
1562 * XXX what about targets with multiple OCP threads?
1563 */
1564void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1565{
1566 BUG_ON(!oh);
1567
43b40992 1568 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1569 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1570 "device configuration\n", oh->name);
1571 return;
1572 }
1573
1574 /*
1575 * Forces posted writes to complete on the OCP thread handling
1576 * register writes
1577 */
43b40992 1578 omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1579}
1580
1581/**
1582 * omap_hwmod_reset - reset the hwmod
1583 * @oh: struct omap_hwmod *
1584 *
1585 * Under some conditions, a driver may wish to reset the entire device.
1586 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1587 * the return value from _reset().
63c85238
PW
1588 */
1589int omap_hwmod_reset(struct omap_hwmod *oh)
1590{
1591 int r;
1592
9b579114 1593 if (!oh)
63c85238
PW
1594 return -EINVAL;
1595
12b1fdb4 1596 mutex_lock(&oh->_mutex);
63c85238 1597 r = _reset(oh);
12b1fdb4 1598 mutex_unlock(&oh->_mutex);
63c85238
PW
1599
1600 return r;
1601}
1602
1603/**
1604 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1605 * @oh: struct omap_hwmod *
1606 * @res: pointer to the first element of an array of struct resource to fill
1607 *
1608 * Count the number of struct resource array elements necessary to
1609 * contain omap_hwmod @oh resources. Intended to be called by code
1610 * that registers omap_devices. Intended to be used to determine the
1611 * size of a dynamically-allocated struct resource array, before
1612 * calling omap_hwmod_fill_resources(). Returns the number of struct
1613 * resource array elements needed.
1614 *
1615 * XXX This code is not optimized. It could attempt to merge adjacent
1616 * resource IDs.
1617 *
1618 */
1619int omap_hwmod_count_resources(struct omap_hwmod *oh)
1620{
1621 int ret, i;
1622
9ee9fff9 1623 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1624
1625 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1626 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1627
1628 return ret;
1629}
1630
1631/**
1632 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1633 * @oh: struct omap_hwmod *
1634 * @res: pointer to the first element of an array of struct resource to fill
1635 *
1636 * Fill the struct resource array @res with resource data from the
1637 * omap_hwmod @oh. Intended to be called by code that registers
1638 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1639 * number of array elements filled.
1640 */
1641int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1642{
1643 int i, j;
1644 int r = 0;
1645
1646 /* For each IRQ, DMA, memory area, fill in array.*/
1647
1648 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1649 (res + r)->name = (oh->mpu_irqs + i)->name;
1650 (res + r)->start = (oh->mpu_irqs + i)->irq;
1651 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1652 (res + r)->flags = IORESOURCE_IRQ;
1653 r++;
1654 }
1655
9ee9fff9
BC
1656 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1657 (res + r)->name = (oh->sdma_reqs + i)->name;
1658 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1659 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
1660 (res + r)->flags = IORESOURCE_DMA;
1661 r++;
1662 }
1663
1664 for (i = 0; i < oh->slaves_cnt; i++) {
1665 struct omap_hwmod_ocp_if *os;
1666
682fdc96 1667 os = oh->slaves[i];
63c85238
PW
1668
1669 for (j = 0; j < os->addr_cnt; j++) {
1670 (res + r)->start = (os->addr + j)->pa_start;
1671 (res + r)->end = (os->addr + j)->pa_end;
1672 (res + r)->flags = IORESOURCE_MEM;
1673 r++;
1674 }
1675 }
1676
1677 return r;
1678}
1679
1680/**
1681 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1682 * @oh: struct omap_hwmod *
1683 *
1684 * Return the powerdomain pointer associated with the OMAP module
1685 * @oh's main clock. If @oh does not have a main clk, return the
1686 * powerdomain associated with the interface clock associated with the
1687 * module's MPU port. (XXX Perhaps this should use the SDMA port
1688 * instead?) Returns NULL on error, or a struct powerdomain * on
1689 * success.
1690 */
1691struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1692{
1693 struct clk *c;
1694
1695 if (!oh)
1696 return NULL;
1697
1698 if (oh->_clk) {
1699 c = oh->_clk;
1700 } else {
1701 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1702 return NULL;
1703 c = oh->slaves[oh->_mpu_port_index]->_clk;
1704 }
1705
d5647c18
TG
1706 if (!c->clkdm)
1707 return NULL;
1708
63c85238
PW
1709 return c->clkdm->pwrdm.ptr;
1710
1711}
1712
db2a60bf
PW
1713/**
1714 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1715 * @oh: struct omap_hwmod *
1716 *
1717 * Returns the virtual address corresponding to the beginning of the
1718 * module's register target, in the address range that is intended to
1719 * be used by the MPU. Returns the virtual address upon success or NULL
1720 * upon error.
1721 */
1722void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1723{
1724 if (!oh)
1725 return NULL;
1726
1727 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1728 return NULL;
1729
1730 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1731 return NULL;
1732
1733 return oh->_mpu_rt_va;
1734}
1735
63c85238
PW
1736/**
1737 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1738 * @oh: struct omap_hwmod *
1739 * @init_oh: struct omap_hwmod * (initiator)
1740 *
1741 * Add a sleep dependency between the initiator @init_oh and @oh.
1742 * Intended to be called by DSP/Bridge code via platform_data for the
1743 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1744 * code needs to add/del initiator dependencies dynamically
1745 * before/after accessing a device. Returns the return value from
1746 * _add_initiator_dep().
1747 *
1748 * XXX Keep a usecount in the clockdomain code
1749 */
1750int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1751 struct omap_hwmod *init_oh)
1752{
1753 return _add_initiator_dep(oh, init_oh);
1754}
1755
1756/*
1757 * XXX what about functions for drivers to save/restore ocp_sysconfig
1758 * for context save/restore operations?
1759 */
1760
1761/**
1762 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1763 * @oh: struct omap_hwmod *
1764 * @init_oh: struct omap_hwmod * (initiator)
1765 *
1766 * Remove a sleep dependency between the initiator @init_oh and @oh.
1767 * Intended to be called by DSP/Bridge code via platform_data for the
1768 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1769 * code needs to add/del initiator dependencies dynamically
1770 * before/after accessing a device. Returns the return value from
1771 * _del_initiator_dep().
1772 *
1773 * XXX Keep a usecount in the clockdomain code
1774 */
1775int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1776 struct omap_hwmod *init_oh)
1777{
1778 return _del_initiator_dep(oh, init_oh);
1779}
1780
63c85238
PW
1781/**
1782 * omap_hwmod_enable_wakeup - allow device to wake up the system
1783 * @oh: struct omap_hwmod *
1784 *
1785 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1786 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
1787 * registers to cause the PRCM to receive wakeup events from the
1788 * module. Does not set any wakeup routing registers beyond this
1789 * point - if the module is to wake up any other module or subsystem,
1790 * that must be set separately. Called by omap_device code. Returns
1791 * -EINVAL on error or 0 upon success.
1792 */
1793int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1794{
43b40992
PW
1795 if (!oh->class->sysc ||
1796 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
1797 return -EINVAL;
1798
12b1fdb4 1799 mutex_lock(&oh->_mutex);
63c85238 1800 _enable_wakeup(oh);
12b1fdb4 1801 mutex_unlock(&oh->_mutex);
63c85238
PW
1802
1803 return 0;
1804}
1805
1806/**
1807 * omap_hwmod_disable_wakeup - prevent device from waking the system
1808 * @oh: struct omap_hwmod *
1809 *
1810 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
1811 * from sending wakeups to the PRCM. Eventually this should clear
1812 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
1813 * from the module. Does not set any wakeup routing registers beyond
1814 * this point - if the module is to wake up any other module or
1815 * subsystem, that must be set separately. Called by omap_device
1816 * code. Returns -EINVAL on error or 0 upon success.
1817 */
1818int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
1819{
43b40992
PW
1820 if (!oh->class->sysc ||
1821 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
1822 return -EINVAL;
1823
12b1fdb4 1824 mutex_lock(&oh->_mutex);
63c85238 1825 _disable_wakeup(oh);
12b1fdb4 1826 mutex_unlock(&oh->_mutex);
63c85238
PW
1827
1828 return 0;
1829}
43b40992 1830
aee48e3c
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1831/**
1832 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
1833 * contained in the hwmod module.
1834 * @oh: struct omap_hwmod *
1835 * @name: name of the reset line to lookup and assert
1836 *
1837 * Some IP like dsp, ipu or iva contain processor that require
1838 * an HW reset line to be assert / deassert in order to enable fully
1839 * the IP. Returns -EINVAL if @oh is null or if the operation is not
1840 * yet supported on this OMAP; otherwise, passes along the return value
1841 * from _assert_hardreset().
1842 */
1843int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
1844{
1845 int ret;
1846
1847 if (!oh)
1848 return -EINVAL;
1849
1850 mutex_lock(&oh->_mutex);
1851 ret = _assert_hardreset(oh, name);
1852 mutex_unlock(&oh->_mutex);
1853
1854 return ret;
1855}
1856
1857/**
1858 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
1859 * contained in the hwmod module.
1860 * @oh: struct omap_hwmod *
1861 * @name: name of the reset line to look up and deassert
1862 *
1863 * Some IP like dsp, ipu or iva contain processor that require
1864 * an HW reset line to be assert / deassert in order to enable fully
1865 * the IP. Returns -EINVAL if @oh is null or if the operation is not
1866 * yet supported on this OMAP; otherwise, passes along the return value
1867 * from _deassert_hardreset().
1868 */
1869int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
1870{
1871 int ret;
1872
1873 if (!oh)
1874 return -EINVAL;
1875
1876 mutex_lock(&oh->_mutex);
1877 ret = _deassert_hardreset(oh, name);
1878 mutex_unlock(&oh->_mutex);
1879
1880 return ret;
1881}
1882
1883/**
1884 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
1885 * contained in the hwmod module
1886 * @oh: struct omap_hwmod *
1887 * @name: name of the reset line to look up and read
1888 *
1889 * Return the current state of the hwmod @oh's reset line named @name:
1890 * returns -EINVAL upon parameter error or if this operation
1891 * is unsupported on the current OMAP; otherwise, passes along the return
1892 * value from _read_hardreset().
1893 */
1894int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
1895{
1896 int ret;
1897
1898 if (!oh)
1899 return -EINVAL;
1900
1901 mutex_lock(&oh->_mutex);
1902 ret = _read_hardreset(oh, name);
1903 mutex_unlock(&oh->_mutex);
1904
1905 return ret;
1906}
1907
1908
43b40992
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1909/**
1910 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
1911 * @classname: struct omap_hwmod_class name to search for
1912 * @fn: callback function pointer to call for each hwmod in class @classname
1913 * @user: arbitrary context data to pass to the callback function
1914 *
1915 * For each omap_hwmod of class @classname, call @fn. Takes
1916 * omap_hwmod_mutex to prevent the hwmod list from changing during the
1917 * iteration. If the callback function returns something other than
1918 * zero, the iterator is terminated, and the callback function's return
1919 * value is passed back to the caller. Returns 0 upon success, -EINVAL
1920 * if @classname or @fn are NULL, or passes back the error code from @fn.
1921 */
1922int omap_hwmod_for_each_by_class(const char *classname,
1923 int (*fn)(struct omap_hwmod *oh,
1924 void *user),
1925 void *user)
1926{
1927 struct omap_hwmod *temp_oh;
1928 int ret = 0;
1929
1930 if (!classname || !fn)
1931 return -EINVAL;
1932
1933 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
1934 __func__, classname);
1935
1936 mutex_lock(&omap_hwmod_mutex);
1937
1938 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1939 if (!strcmp(temp_oh->class->name, classname)) {
1940 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
1941 __func__, temp_oh->name);
1942 ret = (*fn)(temp_oh, user);
1943 if (ret)
1944 break;
1945 }
1946 }
1947
1948 mutex_unlock(&omap_hwmod_mutex);
1949
1950 if (ret)
1951 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
1952 __func__, ret);
1953
1954 return ret;
1955}
1956