OMAP4: hwmod data: Add clock domain attribute
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
78183f3f 5 * Copyright (C) 2011 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
63c85238 139
6f8b7ff5 140#include <plat/common.h>
ce491cf8 141#include <plat/cpu.h>
1540f214 142#include "clockdomain.h"
72e06d08 143#include "powerdomain.h"
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144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
5365efbe 146#include <plat/prcm.h>
63c85238 147
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148#include "cm2xxx_3xxx.h"
149#include "cm44xx.h"
150#include "prm2xxx_3xxx.h"
d198b514 151#include "prm44xx.h"
8d9af88f 152#include "mux.h"
63c85238 153
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154/* Maximum microseconds to wait for OMAP module to softreset */
155#define MAX_MODULE_SOFTRESET_WAIT 10000
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156
157/* Name of the OMAP hwmod for the MPU */
5c2c0296 158#define MPU_INITIATOR_NAME "mpu"
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159
160/* omap_hwmod_list contains all registered struct omap_hwmods */
161static LIST_HEAD(omap_hwmod_list);
162
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163/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
164static struct omap_hwmod *mpu_oh;
165
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166
167/* Private functions */
168
169/**
170 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
171 * @oh: struct omap_hwmod *
172 *
173 * Load the current value of the hwmod OCP_SYSCONFIG register into the
174 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
175 * OCP_SYSCONFIG register or 0 upon success.
176 */
177static int _update_sysc_cache(struct omap_hwmod *oh)
178{
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179 if (!oh->class->sysc) {
180 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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181 return -EINVAL;
182 }
183
184 /* XXX ensure module interface clock is up */
185
cc7a1d2a 186 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 187
43b40992 188 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 189 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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190
191 return 0;
192}
193
194/**
195 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
196 * @v: OCP_SYSCONFIG value to write
197 * @oh: struct omap_hwmod *
198 *
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199 * Write @v into the module class' OCP_SYSCONFIG register, if it has
200 * one. No return value.
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201 */
202static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
203{
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204 if (!oh->class->sysc) {
205 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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206 return;
207 }
208
209 /* XXX ensure module interface clock is up */
210
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211 /* Module might have lost context, always update cache and register */
212 oh->_sysc_cache = v;
213 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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214}
215
216/**
217 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
218 * @oh: struct omap_hwmod *
219 * @standbymode: MIDLEMODE field bits
220 * @v: pointer to register contents to modify
221 *
222 * Update the master standby mode bits in @v to be @standbymode for
223 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
224 * upon error or 0 upon success.
225 */
226static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
227 u32 *v)
228{
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229 u32 mstandby_mask;
230 u8 mstandby_shift;
231
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232 if (!oh->class->sysc ||
233 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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234 return -EINVAL;
235
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236 if (!oh->class->sysc->sysc_fields) {
237 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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238 return -EINVAL;
239 }
240
43b40992 241 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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242 mstandby_mask = (0x3 << mstandby_shift);
243
244 *v &= ~mstandby_mask;
245 *v |= __ffs(standbymode) << mstandby_shift;
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246
247 return 0;
248}
249
250/**
251 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
252 * @oh: struct omap_hwmod *
253 * @idlemode: SIDLEMODE field bits
254 * @v: pointer to register contents to modify
255 *
256 * Update the slave idle mode bits in @v to be @idlemode for the @oh
257 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
258 * or 0 upon success.
259 */
260static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
261{
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262 u32 sidle_mask;
263 u8 sidle_shift;
264
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265 if (!oh->class->sysc ||
266 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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267 return -EINVAL;
268
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269 if (!oh->class->sysc->sysc_fields) {
270 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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271 return -EINVAL;
272 }
273
43b40992 274 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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275 sidle_mask = (0x3 << sidle_shift);
276
277 *v &= ~sidle_mask;
278 *v |= __ffs(idlemode) << sidle_shift;
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279
280 return 0;
281}
282
283/**
284 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
285 * @oh: struct omap_hwmod *
286 * @clockact: CLOCKACTIVITY field bits
287 * @v: pointer to register contents to modify
288 *
289 * Update the clockactivity mode bits in @v to be @clockact for the
290 * @oh hwmod. Used for additional powersaving on some modules. Does
291 * not write to the hardware. Returns -EINVAL upon error or 0 upon
292 * success.
293 */
294static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
295{
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296 u32 clkact_mask;
297 u8 clkact_shift;
298
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299 if (!oh->class->sysc ||
300 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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301 return -EINVAL;
302
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303 if (!oh->class->sysc->sysc_fields) {
304 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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305 return -EINVAL;
306 }
307
43b40992 308 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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309 clkact_mask = (0x3 << clkact_shift);
310
311 *v &= ~clkact_mask;
312 *v |= clockact << clkact_shift;
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313
314 return 0;
315}
316
317/**
318 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
319 * @oh: struct omap_hwmod *
320 * @v: pointer to register contents to modify
321 *
322 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
323 * error or 0 upon success.
324 */
325static int _set_softreset(struct omap_hwmod *oh, u32 *v)
326{
358f0e63
TG
327 u32 softrst_mask;
328
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329 if (!oh->class->sysc ||
330 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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331 return -EINVAL;
332
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333 if (!oh->class->sysc->sysc_fields) {
334 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
335 return -EINVAL;
336 }
337
43b40992 338 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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339
340 *v |= softrst_mask;
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341
342 return 0;
343}
344
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345/**
346 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
347 * @oh: struct omap_hwmod *
348 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
349 * @v: pointer to register contents to modify
350 *
351 * Update the module autoidle bit in @v to be @autoidle for the @oh
352 * hwmod. The autoidle bit controls whether the module can gate
353 * internal clocks automatically when it isn't doing anything; the
354 * exact function of this bit varies on a per-module basis. This
355 * function does not write to the hardware. Returns -EINVAL upon
356 * error or 0 upon success.
357 */
358static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
359 u32 *v)
360{
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TG
361 u32 autoidle_mask;
362 u8 autoidle_shift;
363
43b40992
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364 if (!oh->class->sysc ||
365 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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366 return -EINVAL;
367
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368 if (!oh->class->sysc->sysc_fields) {
369 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
370 return -EINVAL;
371 }
372
43b40992 373 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 374 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
375
376 *v &= ~autoidle_mask;
377 *v |= autoidle << autoidle_shift;
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378
379 return 0;
380}
381
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382/**
383 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
384 * @oh: struct omap_hwmod *
385 *
386 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
387 * upon error or 0 upon success.
388 */
5a7ddcbd 389static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 390{
43b40992 391 if (!oh->class->sysc ||
86009eb3 392 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
393 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
394 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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395 return -EINVAL;
396
43b40992
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397 if (!oh->class->sysc->sysc_fields) {
398 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
399 return -EINVAL;
400 }
401
1fe74113
BC
402 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
403 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 404
86009eb3
BC
405 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
406 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
407 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
408 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 409
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410 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
411
412 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
413
414 return 0;
415}
416
417/**
418 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
419 * @oh: struct omap_hwmod *
420 *
421 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
422 * upon error or 0 upon success.
423 */
5a7ddcbd 424static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 425{
43b40992 426 if (!oh->class->sysc ||
86009eb3 427 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
428 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
429 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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430 return -EINVAL;
431
43b40992
PW
432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
1fe74113
BC
437 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
438 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 439
86009eb3
BC
440 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
441 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
442 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
443 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 444
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445 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
446
447 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
448
449 return 0;
450}
451
452/**
453 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
454 * @oh: struct omap_hwmod *
455 *
456 * Prevent the hardware module @oh from entering idle while the
457 * hardare module initiator @init_oh is active. Useful when a module
458 * will be accessed by a particular initiator (e.g., if a module will
459 * be accessed by the IVA, there should be a sleepdep between the IVA
460 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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461 * mode. If the clockdomain is marked as not needing autodeps, return
462 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
463 * passes along clkdm_add_sleepdep() value upon success.
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464 */
465static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
466{
467 if (!oh->_clk)
468 return -EINVAL;
469
570b54c7
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470 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
471 return 0;
472
55ed9694 473 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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474}
475
476/**
477 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
478 * @oh: struct omap_hwmod *
479 *
480 * Allow the hardware module @oh to enter idle while the hardare
481 * module initiator @init_oh is active. Useful when a module will not
482 * be accessed by a particular initiator (e.g., if a module will not
483 * be accessed by the IVA, there should be no sleepdep between the IVA
484 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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485 * mode. If the clockdomain is marked as not needing autodeps, return
486 * 0 without doing anything. Returns -EINVAL upon error or passes
487 * along clkdm_del_sleepdep() value upon success.
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488 */
489static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
490{
491 if (!oh->_clk)
492 return -EINVAL;
493
570b54c7
PW
494 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
495 return 0;
496
55ed9694 497 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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498}
499
500/**
501 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
502 * @oh: struct omap_hwmod *
503 *
504 * Called from _init_clocks(). Populates the @oh _clk (main
505 * functional clock pointer) if a main_clk is present. Returns 0 on
506 * success or -EINVAL on error.
507 */
508static int _init_main_clk(struct omap_hwmod *oh)
509{
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510 int ret = 0;
511
50ebdac2 512 if (!oh->main_clk)
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513 return 0;
514
63403384 515 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 516 if (!oh->_clk) {
20383d82
BC
517 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
518 oh->name, oh->main_clk);
63403384 519 return -EINVAL;
dc75925d 520 }
63c85238 521
63403384
BC
522 if (!oh->_clk->clkdm)
523 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
524 oh->main_clk, oh->_clk->name);
81d7c6ff 525
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526 return ret;
527}
528
529/**
887adeac 530 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
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531 * @oh: struct omap_hwmod *
532 *
533 * Called from _init_clocks(). Populates the @oh OCP slave interface
534 * clock pointers. Returns 0 on success or -EINVAL on error.
535 */
536static int _init_interface_clks(struct omap_hwmod *oh)
537{
63c85238
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538 struct clk *c;
539 int i;
540 int ret = 0;
541
542 if (oh->slaves_cnt == 0)
543 return 0;
544
682fdc96
BC
545 for (i = 0; i < oh->slaves_cnt; i++) {
546 struct omap_hwmod_ocp_if *os = oh->slaves[i];
547
50ebdac2 548 if (!os->clk)
63c85238
PW
549 continue;
550
50ebdac2 551 c = omap_clk_get_by_name(os->clk);
dc75925d 552 if (!c) {
20383d82
BC
553 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
554 oh->name, os->clk);
63c85238 555 ret = -EINVAL;
dc75925d 556 }
63c85238
PW
557 os->_clk = c;
558 }
559
560 return ret;
561}
562
563/**
564 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
565 * @oh: struct omap_hwmod *
566 *
567 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
568 * clock pointers. Returns 0 on success or -EINVAL on error.
569 */
570static int _init_opt_clks(struct omap_hwmod *oh)
571{
572 struct omap_hwmod_opt_clk *oc;
573 struct clk *c;
574 int i;
575 int ret = 0;
576
577 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 578 c = omap_clk_get_by_name(oc->clk);
dc75925d 579 if (!c) {
20383d82
BC
580 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
581 oh->name, oc->clk);
63c85238 582 ret = -EINVAL;
dc75925d 583 }
63c85238
PW
584 oc->_clk = c;
585 }
586
587 return ret;
588}
589
590/**
591 * _enable_clocks - enable hwmod main clock and interface clocks
592 * @oh: struct omap_hwmod *
593 *
594 * Enables all clocks necessary for register reads and writes to succeed
595 * on the hwmod @oh. Returns 0.
596 */
597static int _enable_clocks(struct omap_hwmod *oh)
598{
63c85238
PW
599 int i;
600
601 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
602
4d3ae5a9 603 if (oh->_clk)
63c85238
PW
604 clk_enable(oh->_clk);
605
606 if (oh->slaves_cnt > 0) {
682fdc96
BC
607 for (i = 0; i < oh->slaves_cnt; i++) {
608 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
609 struct clk *c = os->_clk;
610
4d3ae5a9 611 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
612 clk_enable(c);
613 }
614 }
615
616 /* The opt clocks are controlled by the device driver. */
617
618 return 0;
619}
620
621/**
622 * _disable_clocks - disable hwmod main clock and interface clocks
623 * @oh: struct omap_hwmod *
624 *
625 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
626 */
627static int _disable_clocks(struct omap_hwmod *oh)
628{
63c85238
PW
629 int i;
630
631 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
632
4d3ae5a9 633 if (oh->_clk)
63c85238
PW
634 clk_disable(oh->_clk);
635
636 if (oh->slaves_cnt > 0) {
682fdc96
BC
637 for (i = 0; i < oh->slaves_cnt; i++) {
638 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
639 struct clk *c = os->_clk;
640
4d3ae5a9 641 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
642 clk_disable(c);
643 }
644 }
645
646 /* The opt clocks are controlled by the device driver. */
647
648 return 0;
649}
650
96835af9
BC
651static void _enable_optional_clocks(struct omap_hwmod *oh)
652{
653 struct omap_hwmod_opt_clk *oc;
654 int i;
655
656 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
657
658 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
659 if (oc->_clk) {
660 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
661 oc->_clk->name);
662 clk_enable(oc->_clk);
663 }
664}
665
666static void _disable_optional_clocks(struct omap_hwmod *oh)
667{
668 struct omap_hwmod_opt_clk *oc;
669 int i;
670
671 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
672
673 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
674 if (oc->_clk) {
675 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
676 oc->_clk->name);
677 clk_disable(oc->_clk);
678 }
679}
680
212738a4
PW
681/**
682 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
683 * @oh: struct omap_hwmod *oh
684 *
685 * Count and return the number of MPU IRQs associated with the hwmod
686 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
687 * NULL.
688 */
689static int _count_mpu_irqs(struct omap_hwmod *oh)
690{
691 struct omap_hwmod_irq_info *ohii;
692 int i = 0;
693
694 if (!oh || !oh->mpu_irqs)
695 return 0;
696
697 do {
698 ohii = &oh->mpu_irqs[i++];
699 } while (ohii->irq != -1);
700
701 return i;
702}
703
bc614958
PW
704/**
705 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
706 * @oh: struct omap_hwmod *oh
707 *
708 * Count and return the number of SDMA request lines associated with
709 * the hwmod @oh. Used to allocate struct resource data. Returns 0
710 * if @oh is NULL.
711 */
712static int _count_sdma_reqs(struct omap_hwmod *oh)
713{
714 struct omap_hwmod_dma_info *ohdi;
715 int i = 0;
716
717 if (!oh || !oh->sdma_reqs)
718 return 0;
719
720 do {
721 ohdi = &oh->sdma_reqs[i++];
722 } while (ohdi->dma_req != -1);
723
724 return i;
725}
726
78183f3f
PW
727/**
728 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
729 * @oh: struct omap_hwmod *oh
730 *
731 * Count and return the number of address space ranges associated with
732 * the hwmod @oh. Used to allocate struct resource data. Returns 0
733 * if @oh is NULL.
734 */
735static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
736{
737 struct omap_hwmod_addr_space *mem;
738 int i = 0;
739
740 if (!os || !os->addr)
741 return 0;
742
743 do {
744 mem = &os->addr[i++];
745 } while (mem->pa_start != mem->pa_end);
746
747 return i;
748}
749
63c85238
PW
750/**
751 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
752 * @oh: struct omap_hwmod *
753 *
754 * Returns the array index of the OCP slave port that the MPU
755 * addresses the device on, or -EINVAL upon error or not found.
756 */
01592df9 757static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 758{
63c85238
PW
759 int i;
760 int found = 0;
761
762 if (!oh || oh->slaves_cnt == 0)
763 return -EINVAL;
764
682fdc96
BC
765 for (i = 0; i < oh->slaves_cnt; i++) {
766 struct omap_hwmod_ocp_if *os = oh->slaves[i];
767
63c85238
PW
768 if (os->user & OCP_USER_MPU) {
769 found = 1;
770 break;
771 }
772 }
773
774 if (found)
775 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
776 oh->name, i);
777 else
778 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
779 oh->name);
780
781 return (found) ? i : -EINVAL;
782}
783
784/**
785 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
786 * @oh: struct omap_hwmod *
787 *
788 * Return the virtual address of the base of the register target of
789 * device @oh, or NULL on error.
790 */
01592df9 791static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
792{
793 struct omap_hwmod_ocp_if *os;
794 struct omap_hwmod_addr_space *mem;
78183f3f 795 int i = 0, found = 0;
986a13f5 796 void __iomem *va_start;
63c85238
PW
797
798 if (!oh || oh->slaves_cnt == 0)
799 return NULL;
800
682fdc96 801 os = oh->slaves[index];
63c85238 802
78183f3f
PW
803 if (!os->addr)
804 return NULL;
805
806 do {
807 mem = &os->addr[i++];
808 if (mem->flags & ADDR_TYPE_RT)
63c85238 809 found = 1;
78183f3f 810 } while (!found && mem->pa_start != mem->pa_end);
63c85238 811
986a13f5
TL
812 if (found) {
813 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
814 if (!va_start) {
815 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
816 return NULL;
817 }
63c85238 818 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
819 oh->name, va_start);
820 } else {
63c85238
PW
821 pr_debug("omap_hwmod: %s: no MPU register target found\n",
822 oh->name);
986a13f5 823 }
63c85238 824
986a13f5 825 return (found) ? va_start : NULL;
63c85238
PW
826}
827
828/**
74ff3a68 829 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
830 * @oh: struct omap_hwmod *
831 *
832 * If module is marked as SWSUP_SIDLE, force the module out of slave
833 * idle; otherwise, configure it for smart-idle. If module is marked
834 * as SWSUP_MSUSPEND, force the module out of master standby;
835 * otherwise, configure it for smart-standby. No return value.
836 */
74ff3a68 837static void _enable_sysc(struct omap_hwmod *oh)
63c85238 838{
43b40992 839 u8 idlemode, sf;
63c85238
PW
840 u32 v;
841
43b40992 842 if (!oh->class->sysc)
63c85238
PW
843 return;
844
845 v = oh->_sysc_cache;
43b40992 846 sf = oh->class->sysc->sysc_flags;
63c85238 847
43b40992 848 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
849 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
850 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
851 _set_slave_idlemode(oh, idlemode, &v);
852 }
853
43b40992 854 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
855 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
856 idlemode = HWMOD_IDLEMODE_NO;
857 } else {
858 if (sf & SYSC_HAS_ENAWAKEUP)
859 _enable_wakeup(oh, &v);
860 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
861 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
862 else
863 idlemode = HWMOD_IDLEMODE_SMART;
864 }
63c85238
PW
865 _set_master_standbymode(oh, idlemode, &v);
866 }
867
a16b1f7f
PW
868 /*
869 * XXX The clock framework should handle this, by
870 * calling into this code. But this must wait until the
871 * clock structures are tagged with omap_hwmod entries
872 */
43b40992
PW
873 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
874 (sf & SYSC_HAS_CLOCKACTIVITY))
875 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 876
9980ce53
RN
877 /* If slave is in SMARTIDLE, also enable wakeup */
878 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
879 _enable_wakeup(oh, &v);
880
881 _write_sysconfig(v, oh);
78f26e87
HH
882
883 /*
884 * Set the autoidle bit only after setting the smartidle bit
885 * Setting this will not have any impact on the other modules.
886 */
887 if (sf & SYSC_HAS_AUTOIDLE) {
888 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
889 0 : 1;
890 _set_module_autoidle(oh, idlemode, &v);
891 _write_sysconfig(v, oh);
892 }
63c85238
PW
893}
894
895/**
74ff3a68 896 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
897 * @oh: struct omap_hwmod *
898 *
899 * If module is marked as SWSUP_SIDLE, force the module into slave
900 * idle; otherwise, configure it for smart-idle. If module is marked
901 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
902 * configure it for smart-standby. No return value.
903 */
74ff3a68 904static void _idle_sysc(struct omap_hwmod *oh)
63c85238 905{
43b40992 906 u8 idlemode, sf;
63c85238
PW
907 u32 v;
908
43b40992 909 if (!oh->class->sysc)
63c85238
PW
910 return;
911
912 v = oh->_sysc_cache;
43b40992 913 sf = oh->class->sysc->sysc_flags;
63c85238 914
43b40992 915 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
916 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
917 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
918 _set_slave_idlemode(oh, idlemode, &v);
919 }
920
43b40992 921 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
922 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
923 idlemode = HWMOD_IDLEMODE_FORCE;
924 } else {
925 if (sf & SYSC_HAS_ENAWAKEUP)
926 _enable_wakeup(oh, &v);
927 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
928 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
929 else
930 idlemode = HWMOD_IDLEMODE_SMART;
931 }
63c85238
PW
932 _set_master_standbymode(oh, idlemode, &v);
933 }
934
86009eb3
BC
935 /* If slave is in SMARTIDLE, also enable wakeup */
936 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
937 _enable_wakeup(oh, &v);
938
63c85238
PW
939 _write_sysconfig(v, oh);
940}
941
942/**
74ff3a68 943 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
944 * @oh: struct omap_hwmod *
945 *
946 * Force the module into slave idle and master suspend. No return
947 * value.
948 */
74ff3a68 949static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
950{
951 u32 v;
43b40992 952 u8 sf;
63c85238 953
43b40992 954 if (!oh->class->sysc)
63c85238
PW
955 return;
956
957 v = oh->_sysc_cache;
43b40992 958 sf = oh->class->sysc->sysc_flags;
63c85238 959
43b40992 960 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
961 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
962
43b40992 963 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
964 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
965
43b40992 966 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 967 _set_module_autoidle(oh, 1, &v);
63c85238
PW
968
969 _write_sysconfig(v, oh);
970}
971
972/**
973 * _lookup - find an omap_hwmod by name
974 * @name: find an omap_hwmod by name
975 *
976 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
977 */
978static struct omap_hwmod *_lookup(const char *name)
979{
980 struct omap_hwmod *oh, *temp_oh;
981
982 oh = NULL;
983
984 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
985 if (!strcmp(name, temp_oh->name)) {
986 oh = temp_oh;
987 break;
988 }
989 }
990
991 return oh;
992}
993
994/**
995 * _init_clocks - clk_get() all clocks associated with this hwmod
996 * @oh: struct omap_hwmod *
97d60162 997 * @data: not used; pass NULL
63c85238 998 *
a2debdbd 999 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1000 * Resolves all clock names embedded in the hwmod. Returns 0 on
1001 * success, or a negative error code on failure.
63c85238 1002 */
97d60162 1003static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1004{
1005 int ret = 0;
1006
48d54f3f
PW
1007 if (oh->_state != _HWMOD_STATE_REGISTERED)
1008 return 0;
63c85238
PW
1009
1010 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1011
1012 ret |= _init_main_clk(oh);
1013 ret |= _init_interface_clks(oh);
1014 ret |= _init_opt_clks(oh);
1015
f5c1f84b
BC
1016 if (!ret)
1017 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1018 else
1019 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1020
09c35f2f 1021 return ret;
63c85238
PW
1022}
1023
1024/**
1025 * _wait_target_ready - wait for a module to leave slave idle
1026 * @oh: struct omap_hwmod *
1027 *
1028 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1029 * does not have an IDLEST bit or if the module successfully leaves
1030 * slave idle; otherwise, pass along the return value of the
1031 * appropriate *_cm_wait_module_ready() function.
1032 */
1033static int _wait_target_ready(struct omap_hwmod *oh)
1034{
1035 struct omap_hwmod_ocp_if *os;
1036 int ret;
1037
1038 if (!oh)
1039 return -EINVAL;
1040
1041 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1042 return 0;
1043
682fdc96 1044 os = oh->slaves[oh->_mpu_port_index];
63c85238 1045
33f7ec81 1046 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1047 return 0;
1048
1049 /* XXX check module SIDLEMODE */
1050
1051 /* XXX check clock enable states */
1052
1053 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1054 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1055 oh->prcm.omap2.idlest_reg_id,
1056 oh->prcm.omap2.idlest_idle_bit);
63c85238 1057 } else if (cpu_is_omap44xx()) {
9a23dfe1 1058 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
1059 } else {
1060 BUG();
1061 };
1062
1063 return ret;
1064}
1065
5365efbe 1066/**
cc1226e7 1067 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1068 * @oh: struct omap_hwmod *
1069 * @name: name of the reset line in the context of this hwmod
cc1226e7 1070 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1071 *
1072 * Return the bit position of the reset line that match the
1073 * input name. Return -ENOENT if not found.
1074 */
cc1226e7 1075static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1076 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1077{
1078 int i;
1079
1080 for (i = 0; i < oh->rst_lines_cnt; i++) {
1081 const char *rst_line = oh->rst_lines[i].name;
1082 if (!strcmp(rst_line, name)) {
cc1226e7 1083 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1084 ohri->st_shift = oh->rst_lines[i].st_shift;
1085 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1086 oh->name, __func__, rst_line, ohri->rst_shift,
1087 ohri->st_shift);
5365efbe 1088
cc1226e7 1089 return 0;
5365efbe
BC
1090 }
1091 }
1092
1093 return -ENOENT;
1094}
1095
1096/**
1097 * _assert_hardreset - assert the HW reset line of submodules
1098 * contained in the hwmod module.
1099 * @oh: struct omap_hwmod *
1100 * @name: name of the reset line to lookup and assert
1101 *
1102 * Some IP like dsp, ipu or iva contain processor that require
1103 * an HW reset line to be assert / deassert in order to enable fully
1104 * the IP.
1105 */
1106static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1107{
cc1226e7 1108 struct omap_hwmod_rst_info ohri;
1109 u8 ret;
5365efbe
BC
1110
1111 if (!oh)
1112 return -EINVAL;
1113
cc1226e7 1114 ret = _lookup_hardreset(oh, name, &ohri);
1115 if (IS_ERR_VALUE(ret))
1116 return ret;
5365efbe
BC
1117
1118 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1119 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1120 ohri.rst_shift);
5365efbe
BC
1121 else if (cpu_is_omap44xx())
1122 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1123 ohri.rst_shift);
5365efbe
BC
1124 else
1125 return -EINVAL;
1126}
1127
1128/**
1129 * _deassert_hardreset - deassert the HW reset line of submodules contained
1130 * in the hwmod module.
1131 * @oh: struct omap_hwmod *
1132 * @name: name of the reset line to look up and deassert
1133 *
1134 * Some IP like dsp, ipu or iva contain processor that require
1135 * an HW reset line to be assert / deassert in order to enable fully
1136 * the IP.
1137 */
1138static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1139{
cc1226e7 1140 struct omap_hwmod_rst_info ohri;
1141 int ret;
5365efbe
BC
1142
1143 if (!oh)
1144 return -EINVAL;
1145
cc1226e7 1146 ret = _lookup_hardreset(oh, name, &ohri);
1147 if (IS_ERR_VALUE(ret))
1148 return ret;
5365efbe 1149
cc1226e7 1150 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1151 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1152 ohri.rst_shift,
1153 ohri.st_shift);
1154 } else if (cpu_is_omap44xx()) {
1155 if (ohri.st_shift)
1156 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1157 oh->name, name);
1158 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1159 ohri.rst_shift);
1160 } else {
5365efbe 1161 return -EINVAL;
cc1226e7 1162 }
5365efbe 1163
cc1226e7 1164 if (ret == -EBUSY)
5365efbe
BC
1165 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1166
cc1226e7 1167 return ret;
5365efbe
BC
1168}
1169
1170/**
1171 * _read_hardreset - read the HW reset line state of submodules
1172 * contained in the hwmod module
1173 * @oh: struct omap_hwmod *
1174 * @name: name of the reset line to look up and read
1175 *
1176 * Return the state of the reset line.
1177 */
1178static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1179{
cc1226e7 1180 struct omap_hwmod_rst_info ohri;
1181 u8 ret;
5365efbe
BC
1182
1183 if (!oh)
1184 return -EINVAL;
1185
cc1226e7 1186 ret = _lookup_hardreset(oh, name, &ohri);
1187 if (IS_ERR_VALUE(ret))
1188 return ret;
5365efbe
BC
1189
1190 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1191 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1192 ohri.st_shift);
5365efbe
BC
1193 } else if (cpu_is_omap44xx()) {
1194 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1195 ohri.rst_shift);
5365efbe
BC
1196 } else {
1197 return -EINVAL;
1198 }
1199}
1200
63c85238 1201/**
bd36179e 1202 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1203 * @oh: struct omap_hwmod *
1204 *
1205 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1206 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1207 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1208 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1209 *
1210 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1211 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1212 * use the SYSCONFIG softreset bit to provide the status.
1213 *
bd36179e
PW
1214 * Note that some IP like McBSP do have reset control but don't have
1215 * reset status.
63c85238 1216 */
bd36179e 1217static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1218{
96835af9 1219 u32 v;
6f8b7ff5 1220 int c = 0;
96835af9 1221 int ret = 0;
63c85238 1222
43b40992 1223 if (!oh->class->sysc ||
2cb06814 1224 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1225 return -EINVAL;
1226
1227 /* clocks must be on for this operation */
1228 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1229 pr_warning("omap_hwmod: %s: reset can only be entered from "
1230 "enabled state\n", oh->name);
63c85238
PW
1231 return -EINVAL;
1232 }
1233
96835af9
BC
1234 /* For some modules, all optionnal clocks need to be enabled as well */
1235 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1236 _enable_optional_clocks(oh);
1237
bd36179e 1238 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1239
1240 v = oh->_sysc_cache;
96835af9
BC
1241 ret = _set_softreset(oh, &v);
1242 if (ret)
1243 goto dis_opt_clks;
63c85238
PW
1244 _write_sysconfig(v, oh);
1245
2cb06814 1246 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1247 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1248 oh->class->sysc->syss_offs)
1249 & SYSS_RESETDONE_MASK),
1250 MAX_MODULE_SOFTRESET_WAIT, c);
1251 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1252 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1253 oh->class->sysc->sysc_offs)
1254 & SYSC_TYPE2_SOFTRESET_MASK),
1255 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1256
5365efbe 1257 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1258 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1259 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1260 else
5365efbe 1261 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1262
1263 /*
1264 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1265 * _wait_target_ready() or _reset()
1266 */
1267
96835af9
BC
1268 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1269
1270dis_opt_clks:
1271 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1272 _disable_optional_clocks(oh);
1273
1274 return ret;
63c85238
PW
1275}
1276
bd36179e
PW
1277/**
1278 * _reset - reset an omap_hwmod
1279 * @oh: struct omap_hwmod *
1280 *
1281 * Resets an omap_hwmod @oh. The default software reset mechanism for
1282 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1283 * bit. However, some hwmods cannot be reset via this method: some
1284 * are not targets and therefore have no OCP header registers to
1285 * access; others (like the IVA) have idiosyncratic reset sequences.
1286 * So for these relatively rare cases, custom reset code can be
1287 * supplied in the struct omap_hwmod_class .reset function pointer.
1288 * Passes along the return value from either _reset() or the custom
1289 * reset function - these must return -EINVAL if the hwmod cannot be
1290 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1291 * the module did not reset in time, or 0 upon success.
1292 */
1293static int _reset(struct omap_hwmod *oh)
1294{
1295 int ret;
1296
1297 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1298
1299 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1300
1301 return ret;
1302}
1303
63c85238 1304/**
dc6d1cda 1305 * _enable - enable an omap_hwmod
63c85238
PW
1306 * @oh: struct omap_hwmod *
1307 *
1308 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1309 * register target. Returns -EINVAL if the hwmod is in the wrong
1310 * state or passes along the return value of _wait_target_ready().
63c85238 1311 */
dc6d1cda 1312static int _enable(struct omap_hwmod *oh)
63c85238
PW
1313{
1314 int r;
1315
34617e2a
BC
1316 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1317
63c85238
PW
1318 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1319 oh->_state != _HWMOD_STATE_IDLE &&
1320 oh->_state != _HWMOD_STATE_DISABLED) {
1321 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1322 "from initialized, idle, or disabled state\n", oh->name);
1323 return -EINVAL;
1324 }
1325
8d9af88f 1326 /* Mux pins for device runtime if populated */
029268e4
TL
1327 if (oh->mux && (!oh->mux->enabled ||
1328 ((oh->_state == _HWMOD_STATE_IDLE) &&
1329 oh->mux->pads_dynamic)))
8d9af88f 1330 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1331
1332 _add_initiator_dep(oh, mpu_oh);
1333 _enable_clocks(oh);
1334
31f62866
BC
1335 /*
1336 * If an IP contains only one HW reset line, then de-assert it in order
1337 * to allow the module state transition. Otherwise the PRCM will return
1338 * Intransition status, and the init will failed.
1339 */
1340 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1341 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1342 _deassert_hardreset(oh, oh->rst_lines[0].name);
63c85238 1343
63c85238 1344 r = _wait_target_ready(oh);
34617e2a 1345 if (r) {
9a23dfe1
BC
1346 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1347 oh->name, r);
34617e2a
BC
1348 _disable_clocks(oh);
1349
1350 return r;
1351 }
1352
1353 oh->_state = _HWMOD_STATE_ENABLED;
1354
1355 /* Access the sysconfig only if the target is ready */
1356 if (oh->class->sysc) {
1357 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1358 _update_sysc_cache(oh);
1359 _enable_sysc(oh);
9a23dfe1
BC
1360 }
1361
63c85238
PW
1362 return r;
1363}
1364
1365/**
dc6d1cda 1366 * _idle - idle an omap_hwmod
63c85238
PW
1367 * @oh: struct omap_hwmod *
1368 *
1369 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1370 * no further work. Returns -EINVAL if the hwmod is in the wrong
1371 * state or returns 0.
63c85238 1372 */
dc6d1cda 1373static int _idle(struct omap_hwmod *oh)
63c85238 1374{
34617e2a
BC
1375 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1376
63c85238
PW
1377 if (oh->_state != _HWMOD_STATE_ENABLED) {
1378 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1379 "enabled state\n", oh->name);
1380 return -EINVAL;
1381 }
1382
43b40992 1383 if (oh->class->sysc)
74ff3a68 1384 _idle_sysc(oh);
63c85238
PW
1385 _del_initiator_dep(oh, mpu_oh);
1386 _disable_clocks(oh);
1387
8d9af88f 1388 /* Mux pins for device idle if populated */
029268e4 1389 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1390 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1391
63c85238
PW
1392 oh->_state = _HWMOD_STATE_IDLE;
1393
1394 return 0;
1395}
1396
9599217a
KVA
1397/**
1398 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1399 * @oh: struct omap_hwmod *
1400 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1401 *
1402 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1403 * local copy. Intended to be used by drivers that require
1404 * direct manipulation of the AUTOIDLE bits.
1405 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1406 * along the return value from _set_module_autoidle().
1407 *
1408 * Any users of this function should be scrutinized carefully.
1409 */
1410int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1411{
1412 u32 v;
1413 int retval = 0;
1414 unsigned long flags;
1415
1416 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1417 return -EINVAL;
1418
1419 spin_lock_irqsave(&oh->_lock, flags);
1420
1421 v = oh->_sysc_cache;
1422
1423 retval = _set_module_autoidle(oh, autoidle, &v);
1424
1425 if (!retval)
1426 _write_sysconfig(v, oh);
1427
1428 spin_unlock_irqrestore(&oh->_lock, flags);
1429
1430 return retval;
1431}
1432
63c85238
PW
1433/**
1434 * _shutdown - shutdown an omap_hwmod
1435 * @oh: struct omap_hwmod *
1436 *
1437 * Shut down an omap_hwmod @oh. This should be called when the driver
1438 * used for the hwmod is removed or unloaded or if the driver is not
1439 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1440 * state or returns 0.
1441 */
1442static int _shutdown(struct omap_hwmod *oh)
1443{
e4dc8f50
PW
1444 int ret;
1445 u8 prev_state;
1446
63c85238
PW
1447 if (oh->_state != _HWMOD_STATE_IDLE &&
1448 oh->_state != _HWMOD_STATE_ENABLED) {
1449 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1450 "from idle, or enabled state\n", oh->name);
1451 return -EINVAL;
1452 }
1453
1454 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1455
e4dc8f50
PW
1456 if (oh->class->pre_shutdown) {
1457 prev_state = oh->_state;
1458 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1459 _enable(oh);
e4dc8f50
PW
1460 ret = oh->class->pre_shutdown(oh);
1461 if (ret) {
1462 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1463 _idle(oh);
e4dc8f50
PW
1464 return ret;
1465 }
1466 }
1467
6481c73c
MV
1468 if (oh->class->sysc) {
1469 if (oh->_state == _HWMOD_STATE_IDLE)
1470 _enable(oh);
74ff3a68 1471 _shutdown_sysc(oh);
6481c73c 1472 }
5365efbe 1473
3827f949
BC
1474 /* clocks and deps are already disabled in idle */
1475 if (oh->_state == _HWMOD_STATE_ENABLED) {
1476 _del_initiator_dep(oh, mpu_oh);
1477 /* XXX what about the other system initiators here? dma, dsp */
1478 _disable_clocks(oh);
1479 }
63c85238
PW
1480 /* XXX Should this code also force-disable the optional clocks? */
1481
31f62866
BC
1482 /*
1483 * If an IP contains only one HW reset line, then assert it
1484 * after disabling the clocks and before shutting down the IP.
1485 */
1486 if (oh->rst_lines_cnt == 1)
1487 _assert_hardreset(oh, oh->rst_lines[0].name);
1488
8d9af88f
TL
1489 /* Mux pins to safe mode or use populated off mode values */
1490 if (oh->mux)
1491 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1492
1493 oh->_state = _HWMOD_STATE_DISABLED;
1494
1495 return 0;
1496}
1497
63c85238
PW
1498/**
1499 * _setup - do initial configuration of omap_hwmod
1500 * @oh: struct omap_hwmod *
1501 *
1502 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1503 * OCP_SYSCONFIG register. Returns 0.
63c85238 1504 */
97d60162 1505static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1506{
9a23dfe1 1507 int i, r;
2092e5cc 1508 u8 postsetup_state;
97d60162 1509
48d54f3f
PW
1510 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1511 return 0;
1512
63c85238
PW
1513 /* Set iclk autoidle mode */
1514 if (oh->slaves_cnt > 0) {
682fdc96
BC
1515 for (i = 0; i < oh->slaves_cnt; i++) {
1516 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1517 struct clk *c = os->_clk;
1518
4d3ae5a9 1519 if (!c)
63c85238
PW
1520 continue;
1521
1522 if (os->flags & OCPIF_SWSUP_IDLE) {
1523 /* XXX omap_iclk_deny_idle(c); */
1524 } else {
1525 /* XXX omap_iclk_allow_idle(c); */
1526 clk_enable(c);
1527 }
1528 }
1529 }
1530
1531 oh->_state = _HWMOD_STATE_INITIALIZED;
1532
5365efbe
BC
1533 /*
1534 * In the case of hwmod with hardreset that should not be
1535 * de-assert at boot time, we have to keep the module
1536 * initialized, because we cannot enable it properly with the
1537 * reset asserted. Exit without warning because that behavior is
1538 * expected.
1539 */
1540 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1541 return 0;
1542
dc6d1cda 1543 r = _enable(oh);
9a23dfe1
BC
1544 if (r) {
1545 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1546 oh->name, oh->_state);
1547 return 0;
1548 }
63c85238 1549
b835d014 1550 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1551 _reset(oh);
1552
b835d014 1553 /*
76e5589e 1554 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1555 * The _enable() function should be split to
76e5589e 1556 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1557 */
43b40992 1558 if (oh->class->sysc) {
b835d014 1559 _update_sysc_cache(oh);
74ff3a68 1560 _enable_sysc(oh);
b835d014
PW
1561 }
1562 }
63c85238 1563
2092e5cc
PW
1564 postsetup_state = oh->_postsetup_state;
1565 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1566 postsetup_state = _HWMOD_STATE_ENABLED;
1567
1568 /*
1569 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1570 * it should be set by the core code as a runtime flag during startup
1571 */
1572 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1573 (postsetup_state == _HWMOD_STATE_IDLE))
1574 postsetup_state = _HWMOD_STATE_ENABLED;
1575
1576 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1577 _idle(oh);
2092e5cc
PW
1578 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1579 _shutdown(oh);
1580 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1581 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1582 oh->name, postsetup_state);
63c85238
PW
1583
1584 return 0;
1585}
1586
63c85238 1587/**
0102b627 1588 * _register - register a struct omap_hwmod
63c85238
PW
1589 * @oh: struct omap_hwmod *
1590 *
43b40992
PW
1591 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1592 * already has been registered by the same name; -EINVAL if the
1593 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1594 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1595 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1596 * success.
63c85238
PW
1597 *
1598 * XXX The data should be copied into bootmem, so the original data
1599 * should be marked __initdata and freed after init. This would allow
1600 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1601 * that the copy process would be relatively complex due to the large number
1602 * of substructures.
1603 */
01592df9 1604static int __init _register(struct omap_hwmod *oh)
63c85238 1605{
569edd70 1606 int ms_id;
63c85238 1607
43b40992
PW
1608 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1609 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1610 return -EINVAL;
1611
63c85238
PW
1612 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1613
ce35b244
BC
1614 if (_lookup(oh->name))
1615 return -EEXIST;
63c85238
PW
1616
1617 ms_id = _find_mpu_port_index(oh);
e7c7d760 1618 if (!IS_ERR_VALUE(ms_id))
63c85238 1619 oh->_mpu_port_index = ms_id;
e7c7d760 1620 else
63c85238 1621 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1622
1623 list_add_tail(&oh->node, &omap_hwmod_list);
1624
dc6d1cda 1625 spin_lock_init(&oh->_lock);
2092e5cc 1626
63c85238
PW
1627 oh->_state = _HWMOD_STATE_REGISTERED;
1628
569edd70
PW
1629 /*
1630 * XXX Rather than doing a strcmp(), this should test a flag
1631 * set in the hwmod data, inserted by the autogenerator code.
1632 */
1633 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1634 mpu_oh = oh;
63c85238 1635
569edd70 1636 return 0;
63c85238
PW
1637}
1638
0102b627
BC
1639
1640/* Public functions */
1641
1642u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1643{
1644 if (oh->flags & HWMOD_16BIT_REG)
1645 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1646 else
1647 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1648}
1649
1650void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1651{
1652 if (oh->flags & HWMOD_16BIT_REG)
1653 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1654 else
1655 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1656}
1657
6d3c55fd
A
1658/**
1659 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1660 * @oh: struct omap_hwmod *
1661 *
1662 * This is a public function exposed to drivers. Some drivers may need to do
1663 * some settings before and after resetting the device. Those drivers after
1664 * doing the necessary settings could use this function to start a reset by
1665 * setting the SYSCONFIG.SOFTRESET bit.
1666 */
1667int omap_hwmod_softreset(struct omap_hwmod *oh)
1668{
1669 u32 v;
1670 int ret;
1671
1672 if (!oh || !(oh->_sysc_cache))
1673 return -EINVAL;
1674
1675 v = oh->_sysc_cache;
1676 ret = _set_softreset(oh, &v);
1677 if (ret)
1678 goto error;
1679 _write_sysconfig(v, oh);
1680
1681error:
1682 return ret;
1683}
1684
0102b627
BC
1685/**
1686 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1687 * @oh: struct omap_hwmod *
1688 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1689 *
1690 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1691 * local copy. Intended to be used by drivers that have some erratum
1692 * that requires direct manipulation of the SIDLEMODE bits. Returns
1693 * -EINVAL if @oh is null, or passes along the return value from
1694 * _set_slave_idlemode().
1695 *
1696 * XXX Does this function have any current users? If not, we should
1697 * remove it; it is better to let the rest of the hwmod code handle this.
1698 * Any users of this function should be scrutinized carefully.
1699 */
1700int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1701{
1702 u32 v;
1703 int retval = 0;
1704
1705 if (!oh)
1706 return -EINVAL;
1707
1708 v = oh->_sysc_cache;
1709
1710 retval = _set_slave_idlemode(oh, idlemode, &v);
1711 if (!retval)
1712 _write_sysconfig(v, oh);
1713
1714 return retval;
1715}
1716
63c85238
PW
1717/**
1718 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1719 * @name: name of the omap_hwmod to look up
1720 *
1721 * Given a @name of an omap_hwmod, return a pointer to the registered
1722 * struct omap_hwmod *, or NULL upon error.
1723 */
1724struct omap_hwmod *omap_hwmod_lookup(const char *name)
1725{
1726 struct omap_hwmod *oh;
1727
1728 if (!name)
1729 return NULL;
1730
63c85238 1731 oh = _lookup(name);
63c85238
PW
1732
1733 return oh;
1734}
1735
1736/**
1737 * omap_hwmod_for_each - call function for each registered omap_hwmod
1738 * @fn: pointer to a callback function
97d60162 1739 * @data: void * data to pass to callback function
63c85238
PW
1740 *
1741 * Call @fn for each registered omap_hwmod, passing @data to each
1742 * function. @fn must return 0 for success or any other value for
1743 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1744 * will stop and the non-zero return value will be passed to the
1745 * caller of omap_hwmod_for_each(). @fn is called with
1746 * omap_hwmod_for_each() held.
1747 */
97d60162
PW
1748int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1749 void *data)
63c85238
PW
1750{
1751 struct omap_hwmod *temp_oh;
30ebad9d 1752 int ret = 0;
63c85238
PW
1753
1754 if (!fn)
1755 return -EINVAL;
1756
63c85238 1757 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1758 ret = (*fn)(temp_oh, data);
63c85238
PW
1759 if (ret)
1760 break;
1761 }
63c85238
PW
1762
1763 return ret;
1764}
1765
63c85238 1766/**
550c8092 1767 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1768 * @ohs: pointer to an array of omap_hwmods to register
1769 *
1770 * Intended to be called early in boot before the clock framework is
1771 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1772 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1773 */
550c8092 1774int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1775{
bac1a0f0 1776 int r, i;
63c85238
PW
1777
1778 if (!ohs)
1779 return 0;
1780
bac1a0f0
PW
1781 i = 0;
1782 do {
1783 if (!omap_chip_is(ohs[i]->omap_chip))
1784 continue;
1785
1786 r = _register(ohs[i]);
1787 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1788 r);
1789 } while (ohs[++i]);
63c85238
PW
1790
1791 return 0;
1792}
1793
e7c7d760
TL
1794/*
1795 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1796 *
a2debdbd 1797 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1798 * Assumes the caller takes care of locking if needed.
63c85238 1799 */
e7c7d760
TL
1800static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1801{
48d54f3f
PW
1802 if (oh->_state != _HWMOD_STATE_REGISTERED)
1803 return 0;
1804
e7c7d760
TL
1805 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1806 return 0;
1807
1808 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
e7c7d760
TL
1809
1810 return 0;
1811}
1812
63c85238 1813/**
a2debdbd
PW
1814 * omap_hwmod_setup_one - set up a single hwmod
1815 * @oh_name: const char * name of the already-registered hwmod to set up
1816 *
1817 * Must be called after omap2_clk_init(). Resolves the struct clk
1818 * names to struct clk pointers for each registered omap_hwmod. Also
1819 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1820 * success.
1821 */
1822int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1823{
1824 struct omap_hwmod *oh;
1825 int r;
1826
a2debdbd
PW
1827 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1828
1829 if (!mpu_oh) {
1830 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1831 oh_name, MPU_INITIATOR_NAME);
63c85238 1832 return -EINVAL;
a2debdbd 1833 }
63c85238 1834
a2debdbd
PW
1835 oh = _lookup(oh_name);
1836 if (!oh) {
1837 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1838 return -EINVAL;
1839 }
63c85238 1840
a2debdbd
PW
1841 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1842 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1843
a2debdbd
PW
1844 r = _populate_mpu_rt_base(oh, NULL);
1845 if (IS_ERR_VALUE(r)) {
1846 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1847 return -EINVAL;
1848 }
1849
1850 r = _init_clocks(oh, NULL);
1851 if (IS_ERR_VALUE(r)) {
1852 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1853 return -EINVAL;
63c85238
PW
1854 }
1855
a2debdbd
PW
1856 _setup(oh, NULL);
1857
63c85238
PW
1858 return 0;
1859}
1860
1861/**
550c8092 1862 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
1863 *
1864 * Must be called after omap2_clk_init(). Resolves the struct clk names
1865 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 1866 * _setup() on each hwmod. Returns 0 upon success.
63c85238 1867 */
550c8092 1868static int __init omap_hwmod_setup_all(void)
63c85238
PW
1869{
1870 int r;
1871
569edd70
PW
1872 if (!mpu_oh) {
1873 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1874 __func__, MPU_INITIATOR_NAME);
1875 return -EINVAL;
1876 }
1877
e7c7d760 1878 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 1879
97d60162 1880 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
1881 WARN(IS_ERR_VALUE(r),
1882 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 1883
2092e5cc 1884 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1885
1886 return 0;
1887}
550c8092 1888core_initcall(omap_hwmod_setup_all);
63c85238 1889
63c85238
PW
1890/**
1891 * omap_hwmod_enable - enable an omap_hwmod
1892 * @oh: struct omap_hwmod *
1893 *
74ff3a68 1894 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1895 * Returns -EINVAL on error or passes along the return value from _enable().
1896 */
1897int omap_hwmod_enable(struct omap_hwmod *oh)
1898{
1899 int r;
dc6d1cda 1900 unsigned long flags;
63c85238
PW
1901
1902 if (!oh)
1903 return -EINVAL;
1904
dc6d1cda
PW
1905 spin_lock_irqsave(&oh->_lock, flags);
1906 r = _enable(oh);
1907 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1908
1909 return r;
1910}
1911
1912/**
1913 * omap_hwmod_idle - idle an omap_hwmod
1914 * @oh: struct omap_hwmod *
1915 *
74ff3a68 1916 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1917 * Returns -EINVAL on error or passes along the return value from _idle().
1918 */
1919int omap_hwmod_idle(struct omap_hwmod *oh)
1920{
dc6d1cda
PW
1921 unsigned long flags;
1922
63c85238
PW
1923 if (!oh)
1924 return -EINVAL;
1925
dc6d1cda
PW
1926 spin_lock_irqsave(&oh->_lock, flags);
1927 _idle(oh);
1928 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1929
1930 return 0;
1931}
1932
1933/**
1934 * omap_hwmod_shutdown - shutdown an omap_hwmod
1935 * @oh: struct omap_hwmod *
1936 *
74ff3a68 1937 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1938 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1939 * the return value from _shutdown().
1940 */
1941int omap_hwmod_shutdown(struct omap_hwmod *oh)
1942{
dc6d1cda
PW
1943 unsigned long flags;
1944
63c85238
PW
1945 if (!oh)
1946 return -EINVAL;
1947
dc6d1cda 1948 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1949 _shutdown(oh);
dc6d1cda 1950 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1951
1952 return 0;
1953}
1954
1955/**
1956 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1957 * @oh: struct omap_hwmod *oh
1958 *
1959 * Intended to be called by the omap_device code.
1960 */
1961int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1962{
dc6d1cda
PW
1963 unsigned long flags;
1964
1965 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1966 _enable_clocks(oh);
dc6d1cda 1967 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1968
1969 return 0;
1970}
1971
1972/**
1973 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1974 * @oh: struct omap_hwmod *oh
1975 *
1976 * Intended to be called by the omap_device code.
1977 */
1978int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1979{
dc6d1cda
PW
1980 unsigned long flags;
1981
1982 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1983 _disable_clocks(oh);
dc6d1cda 1984 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1985
1986 return 0;
1987}
1988
1989/**
1990 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1991 * @oh: struct omap_hwmod *oh
1992 *
1993 * Intended to be called by drivers and core code when all posted
1994 * writes to a device must complete before continuing further
1995 * execution (for example, after clearing some device IRQSTATUS
1996 * register bits)
1997 *
1998 * XXX what about targets with multiple OCP threads?
1999 */
2000void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2001{
2002 BUG_ON(!oh);
2003
43b40992 2004 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
2005 WARN(1, "omap_device: %s: OCP barrier impossible due to "
2006 "device configuration\n", oh->name);
2007 return;
2008 }
2009
2010 /*
2011 * Forces posted writes to complete on the OCP thread handling
2012 * register writes
2013 */
cc7a1d2a 2014 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2015}
2016
2017/**
2018 * omap_hwmod_reset - reset the hwmod
2019 * @oh: struct omap_hwmod *
2020 *
2021 * Under some conditions, a driver may wish to reset the entire device.
2022 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2023 * the return value from _reset().
63c85238
PW
2024 */
2025int omap_hwmod_reset(struct omap_hwmod *oh)
2026{
2027 int r;
dc6d1cda 2028 unsigned long flags;
63c85238 2029
9b579114 2030 if (!oh)
63c85238
PW
2031 return -EINVAL;
2032
dc6d1cda 2033 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2034 r = _reset(oh);
dc6d1cda 2035 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2036
2037 return r;
2038}
2039
2040/**
2041 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2042 * @oh: struct omap_hwmod *
2043 * @res: pointer to the first element of an array of struct resource to fill
2044 *
2045 * Count the number of struct resource array elements necessary to
2046 * contain omap_hwmod @oh resources. Intended to be called by code
2047 * that registers omap_devices. Intended to be used to determine the
2048 * size of a dynamically-allocated struct resource array, before
2049 * calling omap_hwmod_fill_resources(). Returns the number of struct
2050 * resource array elements needed.
2051 *
2052 * XXX This code is not optimized. It could attempt to merge adjacent
2053 * resource IDs.
2054 *
2055 */
2056int omap_hwmod_count_resources(struct omap_hwmod *oh)
2057{
2058 int ret, i;
2059
bc614958 2060 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238
PW
2061
2062 for (i = 0; i < oh->slaves_cnt; i++)
78183f3f 2063 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
63c85238
PW
2064
2065 return ret;
2066}
2067
2068/**
2069 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2070 * @oh: struct omap_hwmod *
2071 * @res: pointer to the first element of an array of struct resource to fill
2072 *
2073 * Fill the struct resource array @res with resource data from the
2074 * omap_hwmod @oh. Intended to be called by code that registers
2075 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2076 * number of array elements filled.
2077 */
2078int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2079{
bc614958 2080 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
63c85238
PW
2081 int r = 0;
2082
2083 /* For each IRQ, DMA, memory area, fill in array.*/
2084
212738a4
PW
2085 mpu_irqs_cnt = _count_mpu_irqs(oh);
2086 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2087 (res + r)->name = (oh->mpu_irqs + i)->name;
2088 (res + r)->start = (oh->mpu_irqs + i)->irq;
2089 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2090 (res + r)->flags = IORESOURCE_IRQ;
2091 r++;
2092 }
2093
bc614958
PW
2094 sdma_reqs_cnt = _count_sdma_reqs(oh);
2095 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2096 (res + r)->name = (oh->sdma_reqs + i)->name;
2097 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2098 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2099 (res + r)->flags = IORESOURCE_DMA;
2100 r++;
2101 }
2102
2103 for (i = 0; i < oh->slaves_cnt; i++) {
2104 struct omap_hwmod_ocp_if *os;
78183f3f 2105 int addr_cnt;
63c85238 2106
682fdc96 2107 os = oh->slaves[i];
78183f3f 2108 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2109
78183f3f 2110 for (j = 0; j < addr_cnt; j++) {
cd503802 2111 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2112 (res + r)->start = (os->addr + j)->pa_start;
2113 (res + r)->end = (os->addr + j)->pa_end;
2114 (res + r)->flags = IORESOURCE_MEM;
2115 r++;
2116 }
2117 }
2118
2119 return r;
2120}
2121
2122/**
2123 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2124 * @oh: struct omap_hwmod *
2125 *
2126 * Return the powerdomain pointer associated with the OMAP module
2127 * @oh's main clock. If @oh does not have a main clk, return the
2128 * powerdomain associated with the interface clock associated with the
2129 * module's MPU port. (XXX Perhaps this should use the SDMA port
2130 * instead?) Returns NULL on error, or a struct powerdomain * on
2131 * success.
2132 */
2133struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2134{
2135 struct clk *c;
2136
2137 if (!oh)
2138 return NULL;
2139
2140 if (oh->_clk) {
2141 c = oh->_clk;
2142 } else {
2143 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2144 return NULL;
2145 c = oh->slaves[oh->_mpu_port_index]->_clk;
2146 }
2147
d5647c18
TG
2148 if (!c->clkdm)
2149 return NULL;
2150
63c85238
PW
2151 return c->clkdm->pwrdm.ptr;
2152
2153}
2154
db2a60bf
PW
2155/**
2156 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2157 * @oh: struct omap_hwmod *
2158 *
2159 * Returns the virtual address corresponding to the beginning of the
2160 * module's register target, in the address range that is intended to
2161 * be used by the MPU. Returns the virtual address upon success or NULL
2162 * upon error.
2163 */
2164void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2165{
2166 if (!oh)
2167 return NULL;
2168
2169 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2170 return NULL;
2171
2172 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2173 return NULL;
2174
2175 return oh->_mpu_rt_va;
2176}
2177
63c85238
PW
2178/**
2179 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2180 * @oh: struct omap_hwmod *
2181 * @init_oh: struct omap_hwmod * (initiator)
2182 *
2183 * Add a sleep dependency between the initiator @init_oh and @oh.
2184 * Intended to be called by DSP/Bridge code via platform_data for the
2185 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2186 * code needs to add/del initiator dependencies dynamically
2187 * before/after accessing a device. Returns the return value from
2188 * _add_initiator_dep().
2189 *
2190 * XXX Keep a usecount in the clockdomain code
2191 */
2192int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2193 struct omap_hwmod *init_oh)
2194{
2195 return _add_initiator_dep(oh, init_oh);
2196}
2197
2198/*
2199 * XXX what about functions for drivers to save/restore ocp_sysconfig
2200 * for context save/restore operations?
2201 */
2202
2203/**
2204 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2205 * @oh: struct omap_hwmod *
2206 * @init_oh: struct omap_hwmod * (initiator)
2207 *
2208 * Remove a sleep dependency between the initiator @init_oh and @oh.
2209 * Intended to be called by DSP/Bridge code via platform_data for the
2210 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2211 * code needs to add/del initiator dependencies dynamically
2212 * before/after accessing a device. Returns the return value from
2213 * _del_initiator_dep().
2214 *
2215 * XXX Keep a usecount in the clockdomain code
2216 */
2217int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2218 struct omap_hwmod *init_oh)
2219{
2220 return _del_initiator_dep(oh, init_oh);
2221}
2222
63c85238
PW
2223/**
2224 * omap_hwmod_enable_wakeup - allow device to wake up the system
2225 * @oh: struct omap_hwmod *
2226 *
2227 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2228 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2229 * registers to cause the PRCM to receive wakeup events from the
2230 * module. Does not set any wakeup routing registers beyond this
2231 * point - if the module is to wake up any other module or subsystem,
2232 * that must be set separately. Called by omap_device code. Returns
2233 * -EINVAL on error or 0 upon success.
2234 */
2235int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2236{
dc6d1cda 2237 unsigned long flags;
5a7ddcbd 2238 u32 v;
dc6d1cda 2239
43b40992
PW
2240 if (!oh->class->sysc ||
2241 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2242 return -EINVAL;
2243
dc6d1cda 2244 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2245 v = oh->_sysc_cache;
2246 _enable_wakeup(oh, &v);
2247 _write_sysconfig(v, oh);
dc6d1cda 2248 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2249
2250 return 0;
2251}
2252
2253/**
2254 * omap_hwmod_disable_wakeup - prevent device from waking the system
2255 * @oh: struct omap_hwmod *
2256 *
2257 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2258 * from sending wakeups to the PRCM. Eventually this should clear
2259 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2260 * from the module. Does not set any wakeup routing registers beyond
2261 * this point - if the module is to wake up any other module or
2262 * subsystem, that must be set separately. Called by omap_device
2263 * code. Returns -EINVAL on error or 0 upon success.
2264 */
2265int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2266{
dc6d1cda 2267 unsigned long flags;
5a7ddcbd 2268 u32 v;
dc6d1cda 2269
43b40992
PW
2270 if (!oh->class->sysc ||
2271 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2272 return -EINVAL;
2273
dc6d1cda 2274 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2275 v = oh->_sysc_cache;
2276 _disable_wakeup(oh, &v);
2277 _write_sysconfig(v, oh);
dc6d1cda 2278 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2279
2280 return 0;
2281}
43b40992 2282
aee48e3c
PW
2283/**
2284 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2285 * contained in the hwmod module.
2286 * @oh: struct omap_hwmod *
2287 * @name: name of the reset line to lookup and assert
2288 *
2289 * Some IP like dsp, ipu or iva contain processor that require
2290 * an HW reset line to be assert / deassert in order to enable fully
2291 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2292 * yet supported on this OMAP; otherwise, passes along the return value
2293 * from _assert_hardreset().
2294 */
2295int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2296{
2297 int ret;
dc6d1cda 2298 unsigned long flags;
aee48e3c
PW
2299
2300 if (!oh)
2301 return -EINVAL;
2302
dc6d1cda 2303 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2304 ret = _assert_hardreset(oh, name);
dc6d1cda 2305 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2306
2307 return ret;
2308}
2309
2310/**
2311 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2312 * contained in the hwmod module.
2313 * @oh: struct omap_hwmod *
2314 * @name: name of the reset line to look up and deassert
2315 *
2316 * Some IP like dsp, ipu or iva contain processor that require
2317 * an HW reset line to be assert / deassert in order to enable fully
2318 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2319 * yet supported on this OMAP; otherwise, passes along the return value
2320 * from _deassert_hardreset().
2321 */
2322int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2323{
2324 int ret;
dc6d1cda 2325 unsigned long flags;
aee48e3c
PW
2326
2327 if (!oh)
2328 return -EINVAL;
2329
dc6d1cda 2330 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2331 ret = _deassert_hardreset(oh, name);
dc6d1cda 2332 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2333
2334 return ret;
2335}
2336
2337/**
2338 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2339 * contained in the hwmod module
2340 * @oh: struct omap_hwmod *
2341 * @name: name of the reset line to look up and read
2342 *
2343 * Return the current state of the hwmod @oh's reset line named @name:
2344 * returns -EINVAL upon parameter error or if this operation
2345 * is unsupported on the current OMAP; otherwise, passes along the return
2346 * value from _read_hardreset().
2347 */
2348int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2349{
2350 int ret;
dc6d1cda 2351 unsigned long flags;
aee48e3c
PW
2352
2353 if (!oh)
2354 return -EINVAL;
2355
dc6d1cda 2356 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2357 ret = _read_hardreset(oh, name);
dc6d1cda 2358 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2359
2360 return ret;
2361}
2362
2363
43b40992
PW
2364/**
2365 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2366 * @classname: struct omap_hwmod_class name to search for
2367 * @fn: callback function pointer to call for each hwmod in class @classname
2368 * @user: arbitrary context data to pass to the callback function
2369 *
ce35b244
BC
2370 * For each omap_hwmod of class @classname, call @fn.
2371 * If the callback function returns something other than
43b40992
PW
2372 * zero, the iterator is terminated, and the callback function's return
2373 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2374 * if @classname or @fn are NULL, or passes back the error code from @fn.
2375 */
2376int omap_hwmod_for_each_by_class(const char *classname,
2377 int (*fn)(struct omap_hwmod *oh,
2378 void *user),
2379 void *user)
2380{
2381 struct omap_hwmod *temp_oh;
2382 int ret = 0;
2383
2384 if (!classname || !fn)
2385 return -EINVAL;
2386
2387 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2388 __func__, classname);
2389
43b40992
PW
2390 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2391 if (!strcmp(temp_oh->class->name, classname)) {
2392 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2393 __func__, temp_oh->name);
2394 ret = (*fn)(temp_oh, user);
2395 if (ret)
2396 break;
2397 }
2398 }
2399
43b40992
PW
2400 if (ret)
2401 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2402 __func__, ret);
2403
2404 return ret;
2405}
2406
2092e5cc
PW
2407/**
2408 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2409 * @oh: struct omap_hwmod *
2410 * @state: state that _setup() should leave the hwmod in
2411 *
550c8092 2412 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2413 * (called by omap_hwmod_setup_*()). Only valid to call between
2414 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2415 * 0 upon success or -EINVAL if there is a problem with the arguments
2416 * or if the hwmod is in the wrong state.
2092e5cc
PW
2417 */
2418int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2419{
2420 int ret;
dc6d1cda 2421 unsigned long flags;
2092e5cc
PW
2422
2423 if (!oh)
2424 return -EINVAL;
2425
2426 if (state != _HWMOD_STATE_DISABLED &&
2427 state != _HWMOD_STATE_ENABLED &&
2428 state != _HWMOD_STATE_IDLE)
2429 return -EINVAL;
2430
dc6d1cda 2431 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2432
2433 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2434 ret = -EINVAL;
2435 goto ohsps_unlock;
2436 }
2437
2438 oh->_postsetup_state = state;
2439 ret = 0;
2440
2441ohsps_unlock:
dc6d1cda 2442 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2443
2444 return ret;
2445}
c80705aa
KH
2446
2447/**
2448 * omap_hwmod_get_context_loss_count - get lost context count
2449 * @oh: struct omap_hwmod *
2450 *
2451 * Query the powerdomain of of @oh to get the context loss
2452 * count for this device.
2453 *
2454 * Returns the context loss count of the powerdomain assocated with @oh
2455 * upon success, or zero if no powerdomain exists for @oh.
2456 */
2457u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2458{
2459 struct powerdomain *pwrdm;
2460 int ret = 0;
2461
2462 pwrdm = omap_hwmod_get_pwrdm(oh);
2463 if (pwrdm)
2464 ret = pwrdm_get_context_loss_count(pwrdm);
2465
2466 return ret;
2467}
43b01643
PW
2468
2469/**
2470 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2471 * @oh: struct omap_hwmod *
2472 *
2473 * Prevent the hwmod @oh from being reset during the setup process.
2474 * Intended for use by board-*.c files on boards with devices that
2475 * cannot tolerate being reset. Must be called before the hwmod has
2476 * been set up. Returns 0 upon success or negative error code upon
2477 * failure.
2478 */
2479int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2480{
2481 if (!oh)
2482 return -EINVAL;
2483
2484 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2485 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2486 oh->name);
2487 return -EINVAL;
2488 }
2489
2490 oh->flags |= HWMOD_INIT_NO_RESET;
2491
2492 return 0;
2493}