SPI: OMAP: remove unnecessary includes of plat/clock.h
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
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142#include <plat/clock.h>
143#include <plat/omap_hwmod.h>
5365efbe 144#include <plat/prcm.h>
63c85238 145
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146#include "soc.h"
147#include "common.h"
148#include "clockdomain.h"
149#include "powerdomain.h"
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
1688bf19 152#include "cm33xx.h"
59fb659b 153#include "prm2xxx_3xxx.h"
d198b514 154#include "prm44xx.h"
1688bf19 155#include "prm33xx.h"
eaac329d 156#include "prminst44xx.h"
8d9af88f 157#include "mux.h"
5165882a 158#include "pm.h"
63c85238 159
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160/* Maximum microseconds to wait for OMAP module to softreset */
161#define MAX_MODULE_SOFTRESET_WAIT 10000
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162
163/* Name of the OMAP hwmod for the MPU */
5c2c0296 164#define MPU_INITIATOR_NAME "mpu"
63c85238 165
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166/*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170#define LINKS_PER_OCP_IF 2
171
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172/**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 184 int (*wait_target_ready)(struct omap_hwmod *oh);
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185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
0a179eaa 191 int (*init_clkdm)(struct omap_hwmod *oh);
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192};
193
194/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
195static struct omap_hwmod_soc_ops soc_ops;
196
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197/* omap_hwmod_list contains all registered struct omap_hwmods */
198static LIST_HEAD(omap_hwmod_list);
199
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200/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
201static struct omap_hwmod *mpu_oh;
202
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203/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
204static DEFINE_SPINLOCK(io_chain_lock);
205
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206/*
207 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
208 * allocated from - used to reduce the number of small memory
209 * allocations, which has a significant impact on performance
210 */
211static struct omap_hwmod_link *linkspace;
212
213/*
214 * free_ls, max_ls: array indexes into linkspace; representing the
215 * next free struct omap_hwmod_link index, and the maximum number of
216 * struct omap_hwmod_link records allocated (respectively)
217 */
218static unsigned short free_ls, max_ls, ls_supp;
63c85238 219
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220/* inited: set to true once the hwmod code is initialized */
221static bool inited;
222
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223/* Private functions */
224
5d95dde7 225/**
11cd4b94 226 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 227 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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228 * @i: pointer to the index of the element pointed to by @p in the list
229 *
230 * Return a pointer to the struct omap_hwmod_ocp_if record
231 * containing the struct list_head pointed to by @p, and increment
232 * @p such that a future call to this routine will return the next
233 * record.
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234 */
235static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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236 int *i)
237{
238 struct omap_hwmod_ocp_if *oi;
239
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240 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
241 *p = (*p)->next;
2221b5cd 242
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243 *i = *i + 1;
244
245 return oi;
246}
247
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248/**
249 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
250 * @oh: struct omap_hwmod *
251 *
252 * Load the current value of the hwmod OCP_SYSCONFIG register into the
253 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
254 * OCP_SYSCONFIG register or 0 upon success.
255 */
256static int _update_sysc_cache(struct omap_hwmod *oh)
257{
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258 if (!oh->class->sysc) {
259 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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260 return -EINVAL;
261 }
262
263 /* XXX ensure module interface clock is up */
264
cc7a1d2a 265 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 266
43b40992 267 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 268 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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269
270 return 0;
271}
272
273/**
274 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
275 * @v: OCP_SYSCONFIG value to write
276 * @oh: struct omap_hwmod *
277 *
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278 * Write @v into the module class' OCP_SYSCONFIG register, if it has
279 * one. No return value.
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280 */
281static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282{
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283 if (!oh->class->sysc) {
284 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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285 return;
286 }
287
288 /* XXX ensure module interface clock is up */
289
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290 /* Module might have lost context, always update cache and register */
291 oh->_sysc_cache = v;
292 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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293}
294
295/**
296 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @standbymode: MIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the master standby mode bits in @v to be @standbymode for
302 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
303 * upon error or 0 upon success.
304 */
305static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
306 u32 *v)
307{
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308 u32 mstandby_mask;
309 u8 mstandby_shift;
310
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311 if (!oh->class->sysc ||
312 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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313 return -EINVAL;
314
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315 if (!oh->class->sysc->sysc_fields) {
316 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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317 return -EINVAL;
318 }
319
43b40992 320 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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321 mstandby_mask = (0x3 << mstandby_shift);
322
323 *v &= ~mstandby_mask;
324 *v |= __ffs(standbymode) << mstandby_shift;
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325
326 return 0;
327}
328
329/**
330 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
331 * @oh: struct omap_hwmod *
332 * @idlemode: SIDLEMODE field bits
333 * @v: pointer to register contents to modify
334 *
335 * Update the slave idle mode bits in @v to be @idlemode for the @oh
336 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
337 * or 0 upon success.
338 */
339static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
340{
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341 u32 sidle_mask;
342 u8 sidle_shift;
343
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344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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346 return -EINVAL;
347
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348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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350 return -EINVAL;
351 }
352
43b40992 353 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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354 sidle_mask = (0x3 << sidle_shift);
355
356 *v &= ~sidle_mask;
357 *v |= __ffs(idlemode) << sidle_shift;
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358
359 return 0;
360}
361
362/**
363 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @clockact: CLOCKACTIVITY field bits
366 * @v: pointer to register contents to modify
367 *
368 * Update the clockactivity mode bits in @v to be @clockact for the
369 * @oh hwmod. Used for additional powersaving on some modules. Does
370 * not write to the hardware. Returns -EINVAL upon error or 0 upon
371 * success.
372 */
373static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
374{
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375 u32 clkact_mask;
376 u8 clkact_shift;
377
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378 if (!oh->class->sysc ||
379 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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380 return -EINVAL;
381
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382 if (!oh->class->sysc->sysc_fields) {
383 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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384 return -EINVAL;
385 }
386
43b40992 387 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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388 clkact_mask = (0x3 << clkact_shift);
389
390 *v &= ~clkact_mask;
391 *v |= clockact << clkact_shift;
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392
393 return 0;
394}
395
396/**
397 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
398 * @oh: struct omap_hwmod *
399 * @v: pointer to register contents to modify
400 *
401 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
402 * error or 0 upon success.
403 */
404static int _set_softreset(struct omap_hwmod *oh, u32 *v)
405{
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406 u32 softrst_mask;
407
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408 if (!oh->class->sysc ||
409 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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410 return -EINVAL;
411
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412 if (!oh->class->sysc->sysc_fields) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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414 return -EINVAL;
415 }
416
43b40992 417 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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418
419 *v |= softrst_mask;
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420
421 return 0;
422}
423
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424/**
425 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426 * @oh: struct omap_hwmod *
427 *
428 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
429 * of some modules. When the DMA must perform read/write accesses, the
430 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
431 * for power management, software must set the DMADISABLE bit back to 1.
432 *
433 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
434 * error or 0 upon success.
435 */
436static int _set_dmadisable(struct omap_hwmod *oh)
437{
438 u32 v;
439 u32 dmadisable_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
447 return -EINVAL;
448 }
449
450 /* clocks must be on for this operation */
451 if (oh->_state != _HWMOD_STATE_ENABLED) {
452 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
453 return -EINVAL;
454 }
455
456 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
457
458 v = oh->_sysc_cache;
459 dmadisable_mask =
460 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
461 v |= dmadisable_mask;
462 _write_sysconfig(v, oh);
463
464 return 0;
465}
466
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467/**
468 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
469 * @oh: struct omap_hwmod *
470 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
471 * @v: pointer to register contents to modify
472 *
473 * Update the module autoidle bit in @v to be @autoidle for the @oh
474 * hwmod. The autoidle bit controls whether the module can gate
475 * internal clocks automatically when it isn't doing anything; the
476 * exact function of this bit varies on a per-module basis. This
477 * function does not write to the hardware. Returns -EINVAL upon
478 * error or 0 upon success.
479 */
480static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
481 u32 *v)
482{
358f0e63
TG
483 u32 autoidle_mask;
484 u8 autoidle_shift;
485
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486 if (!oh->class->sysc ||
487 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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488 return -EINVAL;
489
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490 if (!oh->class->sysc->sysc_fields) {
491 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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TG
492 return -EINVAL;
493 }
494
43b40992 495 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 496 autoidle_mask = (0x1 << autoidle_shift);
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TG
497
498 *v &= ~autoidle_mask;
499 *v |= autoidle << autoidle_shift;
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500
501 return 0;
502}
503
eceec009
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504/**
505 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
506 * @oh: struct omap_hwmod *
507 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
508 *
509 * Set or clear the I/O pad wakeup flag in the mux entries for the
510 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
511 * in memory. If the hwmod is currently idled, and the new idle
512 * values don't match the previous ones, this function will also
513 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
514 * currently idled, this function won't touch the hardware: the new
515 * mux settings are written to the SCM PADCTRL registers when the
516 * hwmod is idled. No return value.
517 */
518static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
519{
520 struct omap_device_pad *pad;
521 bool change = false;
522 u16 prev_idle;
523 int j;
524
525 if (!oh->mux || !oh->mux->enabled)
526 return;
527
528 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
529 pad = oh->mux->pads_dynamic[j];
530
531 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
532 continue;
533
534 prev_idle = pad->idle;
535
536 if (set_wake)
537 pad->idle |= OMAP_WAKEUP_EN;
538 else
539 pad->idle &= ~OMAP_WAKEUP_EN;
540
541 if (prev_idle != pad->idle)
542 change = true;
543 }
544
545 if (change && oh->_state == _HWMOD_STATE_IDLE)
546 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
547}
548
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549/**
550 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
551 * @oh: struct omap_hwmod *
552 *
553 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
554 * upon error or 0 upon success.
555 */
5a7ddcbd 556static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 557{
43b40992 558 if (!oh->class->sysc ||
86009eb3 559 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
560 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
561 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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562 return -EINVAL;
563
43b40992
PW
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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566 return -EINVAL;
567 }
568
1fe74113
BC
569 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
570 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 571
86009eb3
BC
572 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
573 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
574 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
575 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 576
63c85238
PW
577 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
578
579 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
580
581 return 0;
582}
583
584/**
585 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
586 * @oh: struct omap_hwmod *
587 *
588 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
589 * upon error or 0 upon success.
590 */
5a7ddcbd 591static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 592{
43b40992 593 if (!oh->class->sysc ||
86009eb3 594 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
595 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
596 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
597 return -EINVAL;
598
43b40992
PW
599 if (!oh->class->sysc->sysc_fields) {
600 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
601 return -EINVAL;
602 }
603
1fe74113
BC
604 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
605 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 606
86009eb3
BC
607 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
608 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 609 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 610 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 611
63c85238
PW
612 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
613
614 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
615
616 return 0;
617}
618
619/**
620 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
621 * @oh: struct omap_hwmod *
622 *
623 * Prevent the hardware module @oh from entering idle while the
624 * hardare module initiator @init_oh is active. Useful when a module
625 * will be accessed by a particular initiator (e.g., if a module will
626 * be accessed by the IVA, there should be a sleepdep between the IVA
627 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
628 * mode. If the clockdomain is marked as not needing autodeps, return
629 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
630 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
631 */
632static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
633{
634 if (!oh->_clk)
635 return -EINVAL;
636
570b54c7
PW
637 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
638 return 0;
639
55ed9694 640 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
641}
642
643/**
644 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
645 * @oh: struct omap_hwmod *
646 *
647 * Allow the hardware module @oh to enter idle while the hardare
648 * module initiator @init_oh is active. Useful when a module will not
649 * be accessed by a particular initiator (e.g., if a module will not
650 * be accessed by the IVA, there should be no sleepdep between the IVA
651 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
652 * mode. If the clockdomain is marked as not needing autodeps, return
653 * 0 without doing anything. Returns -EINVAL upon error or passes
654 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
655 */
656static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
657{
658 if (!oh->_clk)
659 return -EINVAL;
660
570b54c7
PW
661 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
662 return 0;
663
55ed9694 664 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
665}
666
667/**
668 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
669 * @oh: struct omap_hwmod *
670 *
671 * Called from _init_clocks(). Populates the @oh _clk (main
672 * functional clock pointer) if a main_clk is present. Returns 0 on
673 * success or -EINVAL on error.
674 */
675static int _init_main_clk(struct omap_hwmod *oh)
676{
63c85238
PW
677 int ret = 0;
678
50ebdac2 679 if (!oh->main_clk)
63c85238
PW
680 return 0;
681
63403384 682 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 683 if (!oh->_clk) {
20383d82
BC
684 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
685 oh->name, oh->main_clk);
63403384 686 return -EINVAL;
dc75925d 687 }
63c85238 688
63403384
BC
689 if (!oh->_clk->clkdm)
690 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
691 oh->main_clk, oh->_clk->name);
81d7c6ff 692
63c85238
PW
693 return ret;
694}
695
696/**
887adeac 697 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
698 * @oh: struct omap_hwmod *
699 *
700 * Called from _init_clocks(). Populates the @oh OCP slave interface
701 * clock pointers. Returns 0 on success or -EINVAL on error.
702 */
703static int _init_interface_clks(struct omap_hwmod *oh)
704{
5d95dde7 705 struct omap_hwmod_ocp_if *os;
11cd4b94 706 struct list_head *p;
63c85238 707 struct clk *c;
5d95dde7 708 int i = 0;
63c85238
PW
709 int ret = 0;
710
11cd4b94 711 p = oh->slave_ports.next;
2221b5cd 712
5d95dde7 713 while (i < oh->slaves_cnt) {
11cd4b94 714 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 715 if (!os->clk)
63c85238
PW
716 continue;
717
50ebdac2 718 c = omap_clk_get_by_name(os->clk);
dc75925d 719 if (!c) {
20383d82
BC
720 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
721 oh->name, os->clk);
63c85238 722 ret = -EINVAL;
dc75925d 723 }
63c85238
PW
724 os->_clk = c;
725 }
726
727 return ret;
728}
729
730/**
731 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
732 * @oh: struct omap_hwmod *
733 *
734 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
735 * clock pointers. Returns 0 on success or -EINVAL on error.
736 */
737static int _init_opt_clks(struct omap_hwmod *oh)
738{
739 struct omap_hwmod_opt_clk *oc;
740 struct clk *c;
741 int i;
742 int ret = 0;
743
744 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 745 c = omap_clk_get_by_name(oc->clk);
dc75925d 746 if (!c) {
20383d82
BC
747 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
748 oh->name, oc->clk);
63c85238 749 ret = -EINVAL;
dc75925d 750 }
63c85238
PW
751 oc->_clk = c;
752 }
753
754 return ret;
755}
756
757/**
758 * _enable_clocks - enable hwmod main clock and interface clocks
759 * @oh: struct omap_hwmod *
760 *
761 * Enables all clocks necessary for register reads and writes to succeed
762 * on the hwmod @oh. Returns 0.
763 */
764static int _enable_clocks(struct omap_hwmod *oh)
765{
5d95dde7 766 struct omap_hwmod_ocp_if *os;
11cd4b94 767 struct list_head *p;
5d95dde7 768 int i = 0;
63c85238
PW
769
770 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
771
4d3ae5a9 772 if (oh->_clk)
63c85238
PW
773 clk_enable(oh->_clk);
774
11cd4b94 775 p = oh->slave_ports.next;
2221b5cd 776
5d95dde7 777 while (i < oh->slaves_cnt) {
11cd4b94 778 os = _fetch_next_ocp_if(&p, &i);
63c85238 779
5d95dde7
PW
780 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
781 clk_enable(os->_clk);
63c85238
PW
782 }
783
784 /* The opt clocks are controlled by the device driver. */
785
786 return 0;
787}
788
789/**
790 * _disable_clocks - disable hwmod main clock and interface clocks
791 * @oh: struct omap_hwmod *
792 *
793 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
794 */
795static int _disable_clocks(struct omap_hwmod *oh)
796{
5d95dde7 797 struct omap_hwmod_ocp_if *os;
11cd4b94 798 struct list_head *p;
5d95dde7 799 int i = 0;
63c85238
PW
800
801 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
802
4d3ae5a9 803 if (oh->_clk)
63c85238
PW
804 clk_disable(oh->_clk);
805
11cd4b94 806 p = oh->slave_ports.next;
2221b5cd 807
5d95dde7 808 while (i < oh->slaves_cnt) {
11cd4b94 809 os = _fetch_next_ocp_if(&p, &i);
63c85238 810
5d95dde7
PW
811 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
812 clk_disable(os->_clk);
63c85238
PW
813 }
814
815 /* The opt clocks are controlled by the device driver. */
816
817 return 0;
818}
819
96835af9
BC
820static void _enable_optional_clocks(struct omap_hwmod *oh)
821{
822 struct omap_hwmod_opt_clk *oc;
823 int i;
824
825 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
826
827 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
828 if (oc->_clk) {
829 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
830 oc->_clk->name);
831 clk_enable(oc->_clk);
832 }
833}
834
835static void _disable_optional_clocks(struct omap_hwmod *oh)
836{
837 struct omap_hwmod_opt_clk *oc;
838 int i;
839
840 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
841
842 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
843 if (oc->_clk) {
844 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
845 oc->_clk->name);
846 clk_disable(oc->_clk);
847 }
848}
849
45c38252 850/**
3d9f0327 851 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
852 * @oh: struct omap_hwmod *
853 *
854 * Enables the PRCM module mode related to the hwmod @oh.
855 * No return value.
856 */
3d9f0327 857static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 858{
45c38252
BC
859 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
860 return;
861
3d9f0327
KH
862 pr_debug("omap_hwmod: %s: %s: %d\n",
863 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
864
865 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
866 oh->clkdm->prcm_partition,
867 oh->clkdm->cm_inst,
868 oh->clkdm->clkdm_offs,
869 oh->prcm.omap4.clkctrl_offs);
870}
871
1688bf19
VH
872/**
873 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
874 * @oh: struct omap_hwmod *
875 *
876 * Enables the PRCM module mode related to the hwmod @oh.
877 * No return value.
878 */
879static void _am33xx_enable_module(struct omap_hwmod *oh)
880{
881 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
882 return;
883
884 pr_debug("omap_hwmod: %s: %s: %d\n",
885 oh->name, __func__, oh->prcm.omap4.modulemode);
886
887 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
888 oh->clkdm->clkdm_offs,
889 oh->prcm.omap4.clkctrl_offs);
890}
891
45c38252 892/**
bfc141e3
BC
893 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
894 * @oh: struct omap_hwmod *
895 *
896 * Wait for a module @oh to enter slave idle. Returns 0 if the module
897 * does not have an IDLEST bit or if the module successfully enters
898 * slave idle; otherwise, pass along the return value of the
899 * appropriate *_cm*_wait_module_idle() function.
900 */
901static int _omap4_wait_target_disable(struct omap_hwmod *oh)
902{
868c157d 903 if (!oh || !oh->clkdm)
bfc141e3
BC
904 return -EINVAL;
905
906 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
907 return 0;
908
909 if (oh->flags & HWMOD_NO_IDLEST)
910 return 0;
911
912 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
913 oh->clkdm->cm_inst,
914 oh->clkdm->clkdm_offs,
915 oh->prcm.omap4.clkctrl_offs);
916}
917
1688bf19
VH
918/**
919 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
920 * @oh: struct omap_hwmod *
921 *
922 * Wait for a module @oh to enter slave idle. Returns 0 if the module
923 * does not have an IDLEST bit or if the module successfully enters
924 * slave idle; otherwise, pass along the return value of the
925 * appropriate *_cm*_wait_module_idle() function.
926 */
927static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
928{
929 if (!oh)
930 return -EINVAL;
931
932 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
933 return 0;
934
935 if (oh->flags & HWMOD_NO_IDLEST)
936 return 0;
937
938 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
939 oh->clkdm->clkdm_offs,
940 oh->prcm.omap4.clkctrl_offs);
941}
942
212738a4
PW
943/**
944 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
945 * @oh: struct omap_hwmod *oh
946 *
947 * Count and return the number of MPU IRQs associated with the hwmod
948 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
949 * NULL.
950 */
951static int _count_mpu_irqs(struct omap_hwmod *oh)
952{
953 struct omap_hwmod_irq_info *ohii;
954 int i = 0;
955
956 if (!oh || !oh->mpu_irqs)
957 return 0;
958
959 do {
960 ohii = &oh->mpu_irqs[i++];
961 } while (ohii->irq != -1);
962
cc1b0765 963 return i-1;
212738a4
PW
964}
965
bc614958
PW
966/**
967 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
968 * @oh: struct omap_hwmod *oh
969 *
970 * Count and return the number of SDMA request lines associated with
971 * the hwmod @oh. Used to allocate struct resource data. Returns 0
972 * if @oh is NULL.
973 */
974static int _count_sdma_reqs(struct omap_hwmod *oh)
975{
976 struct omap_hwmod_dma_info *ohdi;
977 int i = 0;
978
979 if (!oh || !oh->sdma_reqs)
980 return 0;
981
982 do {
983 ohdi = &oh->sdma_reqs[i++];
984 } while (ohdi->dma_req != -1);
985
cc1b0765 986 return i-1;
bc614958
PW
987}
988
78183f3f
PW
989/**
990 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
991 * @oh: struct omap_hwmod *oh
992 *
993 * Count and return the number of address space ranges associated with
994 * the hwmod @oh. Used to allocate struct resource data. Returns 0
995 * if @oh is NULL.
996 */
997static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
998{
999 struct omap_hwmod_addr_space *mem;
1000 int i = 0;
1001
1002 if (!os || !os->addr)
1003 return 0;
1004
1005 do {
1006 mem = &os->addr[i++];
1007 } while (mem->pa_start != mem->pa_end);
1008
cc1b0765 1009 return i-1;
78183f3f
PW
1010}
1011
5e8370f1
PW
1012/**
1013 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1014 * @oh: struct omap_hwmod * to operate on
1015 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1016 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1017 *
1018 * Retrieve a MPU hardware IRQ line number named by @name associated
1019 * with the IP block pointed to by @oh. The IRQ number will be filled
1020 * into the address pointed to by @dma. When @name is non-null, the
1021 * IRQ line number associated with the named entry will be returned.
1022 * If @name is null, the first matching entry will be returned. Data
1023 * order is not meaningful in hwmod data, so callers are strongly
1024 * encouraged to use a non-null @name whenever possible to avoid
1025 * unpredictable effects if hwmod data is later added that causes data
1026 * ordering to change. Returns 0 upon success or a negative error
1027 * code upon error.
1028 */
1029static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1030 unsigned int *irq)
1031{
1032 int i;
1033 bool found = false;
1034
1035 if (!oh->mpu_irqs)
1036 return -ENOENT;
1037
1038 i = 0;
1039 while (oh->mpu_irqs[i].irq != -1) {
1040 if (name == oh->mpu_irqs[i].name ||
1041 !strcmp(name, oh->mpu_irqs[i].name)) {
1042 found = true;
1043 break;
1044 }
1045 i++;
1046 }
1047
1048 if (!found)
1049 return -ENOENT;
1050
1051 *irq = oh->mpu_irqs[i].irq;
1052
1053 return 0;
1054}
1055
1056/**
1057 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1058 * @oh: struct omap_hwmod * to operate on
1059 * @name: pointer to the name of the SDMA request line to fetch (optional)
1060 * @dma: pointer to an unsigned int to store the request line ID to
1061 *
1062 * Retrieve an SDMA request line ID named by @name on the IP block
1063 * pointed to by @oh. The ID will be filled into the address pointed
1064 * to by @dma. When @name is non-null, the request line ID associated
1065 * with the named entry will be returned. If @name is null, the first
1066 * matching entry will be returned. Data order is not meaningful in
1067 * hwmod data, so callers are strongly encouraged to use a non-null
1068 * @name whenever possible to avoid unpredictable effects if hwmod
1069 * data is later added that causes data ordering to change. Returns 0
1070 * upon success or a negative error code upon error.
1071 */
1072static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1073 unsigned int *dma)
1074{
1075 int i;
1076 bool found = false;
1077
1078 if (!oh->sdma_reqs)
1079 return -ENOENT;
1080
1081 i = 0;
1082 while (oh->sdma_reqs[i].dma_req != -1) {
1083 if (name == oh->sdma_reqs[i].name ||
1084 !strcmp(name, oh->sdma_reqs[i].name)) {
1085 found = true;
1086 break;
1087 }
1088 i++;
1089 }
1090
1091 if (!found)
1092 return -ENOENT;
1093
1094 *dma = oh->sdma_reqs[i].dma_req;
1095
1096 return 0;
1097}
1098
1099/**
1100 * _get_addr_space_by_name - fetch address space start & end by name
1101 * @oh: struct omap_hwmod * to operate on
1102 * @name: pointer to the name of the address space to fetch (optional)
1103 * @pa_start: pointer to a u32 to store the starting address to
1104 * @pa_end: pointer to a u32 to store the ending address to
1105 *
1106 * Retrieve address space start and end addresses for the IP block
1107 * pointed to by @oh. The data will be filled into the addresses
1108 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1109 * address space data associated with the named entry will be
1110 * returned. If @name is null, the first matching entry will be
1111 * returned. Data order is not meaningful in hwmod data, so callers
1112 * are strongly encouraged to use a non-null @name whenever possible
1113 * to avoid unpredictable effects if hwmod data is later added that
1114 * causes data ordering to change. Returns 0 upon success or a
1115 * negative error code upon error.
1116 */
1117static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1118 u32 *pa_start, u32 *pa_end)
1119{
1120 int i, j;
1121 struct omap_hwmod_ocp_if *os;
2221b5cd 1122 struct list_head *p = NULL;
5e8370f1
PW
1123 bool found = false;
1124
11cd4b94 1125 p = oh->slave_ports.next;
2221b5cd 1126
5d95dde7
PW
1127 i = 0;
1128 while (i < oh->slaves_cnt) {
11cd4b94 1129 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1130
1131 if (!os->addr)
1132 return -ENOENT;
1133
1134 j = 0;
1135 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1136 if (name == os->addr[j].name ||
1137 !strcmp(name, os->addr[j].name)) {
1138 found = true;
1139 break;
1140 }
1141 j++;
1142 }
1143
1144 if (found)
1145 break;
1146 }
1147
1148 if (!found)
1149 return -ENOENT;
1150
1151 *pa_start = os->addr[j].pa_start;
1152 *pa_end = os->addr[j].pa_end;
1153
1154 return 0;
1155}
1156
63c85238 1157/**
24dbc213 1158 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1159 * @oh: struct omap_hwmod *
1160 *
24dbc213
PW
1161 * Determines the array index of the OCP slave port that the MPU uses
1162 * to address the device, and saves it into the struct omap_hwmod.
1163 * Intended to be called during hwmod registration only. No return
1164 * value.
63c85238 1165 */
24dbc213 1166static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1167{
24dbc213 1168 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1169 struct list_head *p;
5d95dde7 1170 int i = 0;
63c85238 1171
5d95dde7 1172 if (!oh)
24dbc213
PW
1173 return;
1174
1175 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1176
11cd4b94 1177 p = oh->slave_ports.next;
2221b5cd 1178
5d95dde7 1179 while (i < oh->slaves_cnt) {
11cd4b94 1180 os = _fetch_next_ocp_if(&p, &i);
63c85238 1181 if (os->user & OCP_USER_MPU) {
2221b5cd 1182 oh->_mpu_port = os;
24dbc213 1183 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1184 break;
1185 }
1186 }
1187
24dbc213 1188 return;
63c85238
PW
1189}
1190
2d6141ba
PW
1191/**
1192 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1193 * @oh: struct omap_hwmod *
1194 *
1195 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1196 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1197 * communicate with the IP block. This interface need not be directly
1198 * connected to the MPU (and almost certainly is not), but is directly
1199 * connected to the IP block represented by @oh. Returns a pointer
1200 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1201 * error or if there does not appear to be a path from the MPU to this
1202 * IP block.
1203 */
1204static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1205{
1206 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1207 return NULL;
1208
11cd4b94 1209 return oh->_mpu_port;
2d6141ba
PW
1210};
1211
63c85238 1212/**
c9aafd23 1213 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1214 * @oh: struct omap_hwmod *
1215 *
c9aafd23
PW
1216 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1217 * the register target MPU address space; or returns NULL upon error.
63c85238 1218 */
c9aafd23 1219static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1220{
1221 struct omap_hwmod_ocp_if *os;
1222 struct omap_hwmod_addr_space *mem;
c9aafd23 1223 int found = 0, i = 0;
63c85238 1224
2d6141ba 1225 os = _find_mpu_rt_port(oh);
24dbc213 1226 if (!os || !os->addr)
78183f3f
PW
1227 return NULL;
1228
1229 do {
1230 mem = &os->addr[i++];
1231 if (mem->flags & ADDR_TYPE_RT)
63c85238 1232 found = 1;
78183f3f 1233 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1234
c9aafd23 1235 return (found) ? mem : NULL;
63c85238
PW
1236}
1237
1238/**
74ff3a68 1239 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1240 * @oh: struct omap_hwmod *
1241 *
006c7f18
PW
1242 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1243 * by @oh is set to indicate to the PRCM that the IP block is active.
1244 * Usually this means placing the module into smart-idle mode and
1245 * smart-standby, but if there is a bug in the automatic idle handling
1246 * for the IP block, it may need to be placed into the force-idle or
1247 * no-idle variants of these modes. No return value.
63c85238 1248 */
74ff3a68 1249static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1250{
43b40992 1251 u8 idlemode, sf;
63c85238 1252 u32 v;
006c7f18 1253 bool clkdm_act;
63c85238 1254
43b40992 1255 if (!oh->class->sysc)
63c85238
PW
1256 return;
1257
1258 v = oh->_sysc_cache;
43b40992 1259 sf = oh->class->sysc->sysc_flags;
63c85238 1260
43b40992 1261 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1262 clkdm_act = ((oh->clkdm &&
1263 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1264 (oh->_clk && oh->_clk->clkdm &&
1265 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1266 if (clkdm_act && !(oh->class->sysc->idlemodes &
1267 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1268 idlemode = HWMOD_IDLEMODE_FORCE;
1269 else
1270 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1271 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1272 _set_slave_idlemode(oh, idlemode, &v);
1273 }
1274
43b40992 1275 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1276 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1277 idlemode = HWMOD_IDLEMODE_NO;
1278 } else {
1279 if (sf & SYSC_HAS_ENAWAKEUP)
1280 _enable_wakeup(oh, &v);
1281 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1282 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1283 else
1284 idlemode = HWMOD_IDLEMODE_SMART;
1285 }
63c85238
PW
1286 _set_master_standbymode(oh, idlemode, &v);
1287 }
1288
a16b1f7f
PW
1289 /*
1290 * XXX The clock framework should handle this, by
1291 * calling into this code. But this must wait until the
1292 * clock structures are tagged with omap_hwmod entries
1293 */
43b40992
PW
1294 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1295 (sf & SYSC_HAS_CLOCKACTIVITY))
1296 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1297
9980ce53
RN
1298 /* If slave is in SMARTIDLE, also enable wakeup */
1299 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1300 _enable_wakeup(oh, &v);
1301
1302 _write_sysconfig(v, oh);
78f26e87
HH
1303
1304 /*
1305 * Set the autoidle bit only after setting the smartidle bit
1306 * Setting this will not have any impact on the other modules.
1307 */
1308 if (sf & SYSC_HAS_AUTOIDLE) {
1309 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1310 0 : 1;
1311 _set_module_autoidle(oh, idlemode, &v);
1312 _write_sysconfig(v, oh);
1313 }
63c85238
PW
1314}
1315
1316/**
74ff3a68 1317 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1318 * @oh: struct omap_hwmod *
1319 *
1320 * If module is marked as SWSUP_SIDLE, force the module into slave
1321 * idle; otherwise, configure it for smart-idle. If module is marked
1322 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1323 * configure it for smart-standby. No return value.
1324 */
74ff3a68 1325static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1326{
43b40992 1327 u8 idlemode, sf;
63c85238
PW
1328 u32 v;
1329
43b40992 1330 if (!oh->class->sysc)
63c85238
PW
1331 return;
1332
1333 v = oh->_sysc_cache;
43b40992 1334 sf = oh->class->sysc->sysc_flags;
63c85238 1335
43b40992 1336 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1337 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1338 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1339 !(oh->class->sysc->idlemodes &
1340 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1341 idlemode = HWMOD_IDLEMODE_FORCE;
1342 else
1343 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1344 _set_slave_idlemode(oh, idlemode, &v);
1345 }
1346
43b40992 1347 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1348 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1349 idlemode = HWMOD_IDLEMODE_FORCE;
1350 } else {
1351 if (sf & SYSC_HAS_ENAWAKEUP)
1352 _enable_wakeup(oh, &v);
1353 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1354 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1355 else
1356 idlemode = HWMOD_IDLEMODE_SMART;
1357 }
63c85238
PW
1358 _set_master_standbymode(oh, idlemode, &v);
1359 }
1360
86009eb3
BC
1361 /* If slave is in SMARTIDLE, also enable wakeup */
1362 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1363 _enable_wakeup(oh, &v);
1364
63c85238
PW
1365 _write_sysconfig(v, oh);
1366}
1367
1368/**
74ff3a68 1369 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1370 * @oh: struct omap_hwmod *
1371 *
1372 * Force the module into slave idle and master suspend. No return
1373 * value.
1374 */
74ff3a68 1375static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1376{
1377 u32 v;
43b40992 1378 u8 sf;
63c85238 1379
43b40992 1380 if (!oh->class->sysc)
63c85238
PW
1381 return;
1382
1383 v = oh->_sysc_cache;
43b40992 1384 sf = oh->class->sysc->sysc_flags;
63c85238 1385
43b40992 1386 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1387 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1388
43b40992 1389 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1390 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1391
43b40992 1392 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1393 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1394
1395 _write_sysconfig(v, oh);
1396}
1397
1398/**
1399 * _lookup - find an omap_hwmod by name
1400 * @name: find an omap_hwmod by name
1401 *
1402 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1403 */
1404static struct omap_hwmod *_lookup(const char *name)
1405{
1406 struct omap_hwmod *oh, *temp_oh;
1407
1408 oh = NULL;
1409
1410 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1411 if (!strcmp(name, temp_oh->name)) {
1412 oh = temp_oh;
1413 break;
1414 }
1415 }
1416
1417 return oh;
1418}
868c157d 1419
6ae76997
BC
1420/**
1421 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1422 * @oh: struct omap_hwmod *
1423 *
1424 * Convert a clockdomain name stored in a struct omap_hwmod into a
1425 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1426 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1427 */
1428static int _init_clkdm(struct omap_hwmod *oh)
1429{
868c157d 1430 if (!oh->clkdm_name)
6ae76997
BC
1431 return 0;
1432
6ae76997
BC
1433 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1434 if (!oh->clkdm) {
1435 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1436 oh->name, oh->clkdm_name);
1437 return -EINVAL;
1438 }
1439
1440 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1441 oh->name, oh->clkdm_name);
1442
1443 return 0;
1444}
63c85238
PW
1445
1446/**
6ae76997
BC
1447 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1448 * well the clockdomain.
63c85238 1449 * @oh: struct omap_hwmod *
97d60162 1450 * @data: not used; pass NULL
63c85238 1451 *
a2debdbd 1452 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1453 * Resolves all clock names embedded in the hwmod. Returns 0 on
1454 * success, or a negative error code on failure.
63c85238 1455 */
97d60162 1456static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1457{
1458 int ret = 0;
1459
48d54f3f
PW
1460 if (oh->_state != _HWMOD_STATE_REGISTERED)
1461 return 0;
63c85238
PW
1462
1463 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1464
1465 ret |= _init_main_clk(oh);
1466 ret |= _init_interface_clks(oh);
1467 ret |= _init_opt_clks(oh);
0a179eaa
KH
1468 if (soc_ops.init_clkdm)
1469 ret |= soc_ops.init_clkdm(oh);
63c85238 1470
f5c1f84b
BC
1471 if (!ret)
1472 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1473 else
1474 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1475
09c35f2f 1476 return ret;
63c85238
PW
1477}
1478
5365efbe 1479/**
cc1226e7 1480 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1481 * @oh: struct omap_hwmod *
1482 * @name: name of the reset line in the context of this hwmod
cc1226e7 1483 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1484 *
1485 * Return the bit position of the reset line that match the
1486 * input name. Return -ENOENT if not found.
1487 */
cc1226e7 1488static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1489 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1490{
1491 int i;
1492
1493 for (i = 0; i < oh->rst_lines_cnt; i++) {
1494 const char *rst_line = oh->rst_lines[i].name;
1495 if (!strcmp(rst_line, name)) {
cc1226e7 1496 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1497 ohri->st_shift = oh->rst_lines[i].st_shift;
1498 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1499 oh->name, __func__, rst_line, ohri->rst_shift,
1500 ohri->st_shift);
5365efbe 1501
cc1226e7 1502 return 0;
5365efbe
BC
1503 }
1504 }
1505
1506 return -ENOENT;
1507}
1508
1509/**
1510 * _assert_hardreset - assert the HW reset line of submodules
1511 * contained in the hwmod module.
1512 * @oh: struct omap_hwmod *
1513 * @name: name of the reset line to lookup and assert
1514 *
b8249cf2
KH
1515 * Some IP like dsp, ipu or iva contain processor that require an HW
1516 * reset line to be assert / deassert in order to enable fully the IP.
1517 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1518 * asserting the hardreset line on the currently-booted SoC, or passes
1519 * along the return value from _lookup_hardreset() or the SoC's
1520 * assert_hardreset code.
5365efbe
BC
1521 */
1522static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1523{
cc1226e7 1524 struct omap_hwmod_rst_info ohri;
b8249cf2 1525 u8 ret = -EINVAL;
5365efbe
BC
1526
1527 if (!oh)
1528 return -EINVAL;
1529
b8249cf2
KH
1530 if (!soc_ops.assert_hardreset)
1531 return -ENOSYS;
1532
cc1226e7 1533 ret = _lookup_hardreset(oh, name, &ohri);
1534 if (IS_ERR_VALUE(ret))
1535 return ret;
5365efbe 1536
b8249cf2
KH
1537 ret = soc_ops.assert_hardreset(oh, &ohri);
1538
1539 return ret;
5365efbe
BC
1540}
1541
1542/**
1543 * _deassert_hardreset - deassert the HW reset line of submodules contained
1544 * in the hwmod module.
1545 * @oh: struct omap_hwmod *
1546 * @name: name of the reset line to look up and deassert
1547 *
b8249cf2
KH
1548 * Some IP like dsp, ipu or iva contain processor that require an HW
1549 * reset line to be assert / deassert in order to enable fully the IP.
1550 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1551 * deasserting the hardreset line on the currently-booted SoC, or passes
1552 * along the return value from _lookup_hardreset() or the SoC's
1553 * deassert_hardreset code.
5365efbe
BC
1554 */
1555static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1556{
cc1226e7 1557 struct omap_hwmod_rst_info ohri;
b8249cf2 1558 int ret = -EINVAL;
5365efbe
BC
1559
1560 if (!oh)
1561 return -EINVAL;
1562
b8249cf2
KH
1563 if (!soc_ops.deassert_hardreset)
1564 return -ENOSYS;
1565
cc1226e7 1566 ret = _lookup_hardreset(oh, name, &ohri);
1567 if (IS_ERR_VALUE(ret))
1568 return ret;
5365efbe 1569
b8249cf2 1570 ret = soc_ops.deassert_hardreset(oh, &ohri);
cc1226e7 1571 if (ret == -EBUSY)
5365efbe
BC
1572 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1573
cc1226e7 1574 return ret;
5365efbe
BC
1575}
1576
1577/**
1578 * _read_hardreset - read the HW reset line state of submodules
1579 * contained in the hwmod module
1580 * @oh: struct omap_hwmod *
1581 * @name: name of the reset line to look up and read
1582 *
b8249cf2
KH
1583 * Return the state of the reset line. Returns -EINVAL if @oh is
1584 * null, -ENOSYS if we have no way of reading the hardreset line
1585 * status on the currently-booted SoC, or passes along the return
1586 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1587 * code.
5365efbe
BC
1588 */
1589static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1590{
cc1226e7 1591 struct omap_hwmod_rst_info ohri;
b8249cf2 1592 u8 ret = -EINVAL;
5365efbe
BC
1593
1594 if (!oh)
1595 return -EINVAL;
1596
b8249cf2
KH
1597 if (!soc_ops.is_hardreset_asserted)
1598 return -ENOSYS;
1599
cc1226e7 1600 ret = _lookup_hardreset(oh, name, &ohri);
1601 if (IS_ERR_VALUE(ret))
1602 return ret;
5365efbe 1603
b8249cf2 1604 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1605}
1606
747834ab
PW
1607/**
1608 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1609 * @oh: struct omap_hwmod *
1610 *
1611 * If any hardreset line associated with @oh is asserted, then return true.
1612 * Otherwise, if @oh has no hardreset lines associated with it, or if
1613 * no hardreset lines associated with @oh are asserted, then return false.
1614 * This function is used to avoid executing some parts of the IP block
1615 * enable/disable sequence if a hardreset line is set.
1616 */
1617static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1618{
1619 int i;
1620
1621 if (oh->rst_lines_cnt == 0)
1622 return false;
1623
1624 for (i = 0; i < oh->rst_lines_cnt; i++)
1625 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1626 return true;
1627
1628 return false;
1629}
1630
1631/**
1632 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1633 * @oh: struct omap_hwmod *
1634 *
1635 * Disable the PRCM module mode related to the hwmod @oh.
1636 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1637 */
1638static int _omap4_disable_module(struct omap_hwmod *oh)
1639{
1640 int v;
1641
747834ab
PW
1642 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1643 return -EINVAL;
1644
1645 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1646
1647 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1648 oh->clkdm->cm_inst,
1649 oh->clkdm->clkdm_offs,
1650 oh->prcm.omap4.clkctrl_offs);
1651
1652 if (_are_any_hardreset_lines_asserted(oh))
1653 return 0;
1654
1655 v = _omap4_wait_target_disable(oh);
1656 if (v)
1657 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1658 oh->name);
1659
1660 return 0;
1661}
1662
1688bf19
VH
1663/**
1664 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1665 * @oh: struct omap_hwmod *
1666 *
1667 * Disable the PRCM module mode related to the hwmod @oh.
1668 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1669 */
1670static int _am33xx_disable_module(struct omap_hwmod *oh)
1671{
1672 int v;
1673
1674 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1675 return -EINVAL;
1676
1677 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1678
1679 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1680 oh->prcm.omap4.clkctrl_offs);
1681
1682 if (_are_any_hardreset_lines_asserted(oh))
1683 return 0;
1684
1685 v = _am33xx_wait_target_disable(oh);
1686 if (v)
1687 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1688 oh->name);
1689
1690 return 0;
1691}
1692
63c85238 1693/**
bd36179e 1694 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1695 * @oh: struct omap_hwmod *
1696 *
1697 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1698 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1699 * reset this way, -EINVAL if the hwmod is in the wrong state,
1700 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1701 *
1702 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1703 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1704 * use the SYSCONFIG softreset bit to provide the status.
1705 *
bd36179e
PW
1706 * Note that some IP like McBSP do have reset control but don't have
1707 * reset status.
63c85238 1708 */
bd36179e 1709static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1710{
387ca5bf 1711 u32 v, softrst_mask;
6f8b7ff5 1712 int c = 0;
96835af9 1713 int ret = 0;
63c85238 1714
43b40992 1715 if (!oh->class->sysc ||
2cb06814 1716 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1717 return -ENOENT;
63c85238
PW
1718
1719 /* clocks must be on for this operation */
1720 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1721 pr_warning("omap_hwmod: %s: reset can only be entered from "
1722 "enabled state\n", oh->name);
63c85238
PW
1723 return -EINVAL;
1724 }
1725
96835af9
BC
1726 /* For some modules, all optionnal clocks need to be enabled as well */
1727 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1728 _enable_optional_clocks(oh);
1729
bd36179e 1730 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1731
1732 v = oh->_sysc_cache;
96835af9
BC
1733 ret = _set_softreset(oh, &v);
1734 if (ret)
1735 goto dis_opt_clks;
63c85238
PW
1736 _write_sysconfig(v, oh);
1737
d99de7f5
FGL
1738 if (oh->class->sysc->srst_udelay)
1739 udelay(oh->class->sysc->srst_udelay);
1740
2cb06814 1741 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1742 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1743 oh->class->sysc->syss_offs)
1744 & SYSS_RESETDONE_MASK),
1745 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1746 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1747 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1748 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1749 oh->class->sysc->sysc_offs)
387ca5bf 1750 & softrst_mask),
2cb06814 1751 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1752 }
63c85238 1753
5365efbe 1754 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1755 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1756 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1757 else
5365efbe 1758 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1759
1760 /*
1761 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1762 * _wait_target_ready() or _reset()
1763 */
1764
96835af9
BC
1765 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1766
1767dis_opt_clks:
1768 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1769 _disable_optional_clocks(oh);
1770
1771 return ret;
63c85238
PW
1772}
1773
bd36179e
PW
1774/**
1775 * _reset - reset an omap_hwmod
1776 * @oh: struct omap_hwmod *
1777 *
30e105c0
PW
1778 * Resets an omap_hwmod @oh. If the module has a custom reset
1779 * function pointer defined, then call it to reset the IP block, and
1780 * pass along its return value to the caller. Otherwise, if the IP
1781 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1782 * associated with it, call a function to reset the IP block via that
1783 * method, and pass along the return value to the caller. Finally, if
1784 * the IP block has some hardreset lines associated with it, assert
1785 * all of those, but do _not_ deassert them. (This is because driver
1786 * authors have expressed an apparent requirement to control the
1787 * deassertion of the hardreset lines themselves.)
1788 *
1789 * The default software reset mechanism for most OMAP IP blocks is
1790 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1791 * hwmods cannot be reset via this method. Some are not targets and
1792 * therefore have no OCP header registers to access. Others (like the
1793 * IVA) have idiosyncratic reset sequences. So for these relatively
1794 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
1795 * omap_hwmod_class .reset function pointer.
1796 *
1797 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1798 * does not prevent idling of the system. This is necessary for cases
1799 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1800 * kernel without disabling dma.
1801 *
1802 * Passes along the return value from either _ocp_softreset() or the
1803 * custom reset function - these must return -EINVAL if the hwmod
1804 * cannot be reset this way or if the hwmod is in the wrong state,
1805 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
1806 */
1807static int _reset(struct omap_hwmod *oh)
1808{
30e105c0 1809 int i, r;
bd36179e
PW
1810
1811 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1812
30e105c0
PW
1813 if (oh->class->reset) {
1814 r = oh->class->reset(oh);
1815 } else {
1816 if (oh->rst_lines_cnt > 0) {
1817 for (i = 0; i < oh->rst_lines_cnt; i++)
1818 _assert_hardreset(oh, oh->rst_lines[i].name);
1819 return 0;
1820 } else {
1821 r = _ocp_softreset(oh);
1822 if (r == -ENOENT)
1823 r = 0;
1824 }
1825 }
1826
6668546f
KVA
1827 _set_dmadisable(oh);
1828
9c8b0ec7 1829 /*
30e105c0
PW
1830 * OCP_SYSCONFIG bits need to be reprogrammed after a
1831 * softreset. The _enable() function should be split to avoid
1832 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1833 */
2800852a
RN
1834 if (oh->class->sysc) {
1835 _update_sysc_cache(oh);
1836 _enable_sysc(oh);
1837 }
1838
30e105c0 1839 return r;
bd36179e
PW
1840}
1841
5165882a
VB
1842/**
1843 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1844 *
1845 * Call the appropriate PRM function to clear any logged I/O chain
1846 * wakeups and to reconfigure the chain. This apparently needs to be
1847 * done upon every mux change. Since hwmods can be concurrently
1848 * enabled and idled, hold a spinlock around the I/O chain
1849 * reconfiguration sequence. No return value.
1850 *
1851 * XXX When the PRM code is moved to drivers, this function can be removed,
1852 * as the PRM infrastructure should abstract this.
1853 */
1854static void _reconfigure_io_chain(void)
1855{
1856 unsigned long flags;
1857
1858 spin_lock_irqsave(&io_chain_lock, flags);
1859
1860 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1861 omap3xxx_prm_reconfigure_io_chain();
1862 else if (cpu_is_omap44xx())
1863 omap44xx_prm_reconfigure_io_chain();
1864
1865 spin_unlock_irqrestore(&io_chain_lock, flags);
1866}
1867
63c85238 1868/**
dc6d1cda 1869 * _enable - enable an omap_hwmod
63c85238
PW
1870 * @oh: struct omap_hwmod *
1871 *
1872 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1873 * register target. Returns -EINVAL if the hwmod is in the wrong
1874 * state or passes along the return value of _wait_target_ready().
63c85238 1875 */
dc6d1cda 1876static int _enable(struct omap_hwmod *oh)
63c85238 1877{
747834ab 1878 int r;
665d0013 1879 int hwsup = 0;
63c85238 1880
34617e2a
BC
1881 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1882
aacf0941 1883 /*
64813c3f
PW
1884 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1885 * state at init. Now that someone is really trying to enable
1886 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1887 */
1888 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1889 /*
1890 * If the caller has mux data populated, do the mux'ing
1891 * which wouldn't have been done as part of the _enable()
1892 * done during setup.
1893 */
1894 if (oh->mux)
1895 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1896
1897 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1898 return 0;
1899 }
1900
63c85238
PW
1901 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1902 oh->_state != _HWMOD_STATE_IDLE &&
1903 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1904 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1905 oh->name);
63c85238
PW
1906 return -EINVAL;
1907 }
1908
31f62866 1909 /*
747834ab
PW
1910 * If an IP block contains HW reset lines and any of them are
1911 * asserted, we let integration code associated with that
1912 * block handle the enable. We've received very little
1913 * information on what those driver authors need, and until
1914 * detailed information is provided and the driver code is
1915 * posted to the public lists, this is probably the best we
1916 * can do.
31f62866 1917 */
747834ab
PW
1918 if (_are_any_hardreset_lines_asserted(oh))
1919 return 0;
63c85238 1920
665d0013
RN
1921 /* Mux pins for device runtime if populated */
1922 if (oh->mux && (!oh->mux->enabled ||
1923 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 1924 oh->mux->pads_dynamic))) {
665d0013 1925 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a
VB
1926 _reconfigure_io_chain();
1927 }
665d0013
RN
1928
1929 _add_initiator_dep(oh, mpu_oh);
34617e2a 1930
665d0013
RN
1931 if (oh->clkdm) {
1932 /*
1933 * A clockdomain must be in SW_SUP before enabling
1934 * completely the module. The clockdomain can be set
1935 * in HW_AUTO only when the module become ready.
1936 */
1937 hwsup = clkdm_in_hwsup(oh->clkdm);
1938 r = clkdm_hwmod_enable(oh->clkdm, oh);
1939 if (r) {
1940 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1941 oh->name, oh->clkdm->name, r);
1942 return r;
1943 }
34617e2a 1944 }
665d0013
RN
1945
1946 _enable_clocks(oh);
9ebfd285
KH
1947 if (soc_ops.enable_module)
1948 soc_ops.enable_module(oh);
34617e2a 1949
8f6aa8ee
KH
1950 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1951 -EINVAL;
665d0013
RN
1952 if (!r) {
1953 /*
1954 * Set the clockdomain to HW_AUTO only if the target is ready,
1955 * assuming that the previous state was HW_AUTO
1956 */
1957 if (oh->clkdm && hwsup)
1958 clkdm_allow_idle(oh->clkdm);
1959
1960 oh->_state = _HWMOD_STATE_ENABLED;
1961
1962 /* Access the sysconfig only if the target is ready */
1963 if (oh->class->sysc) {
1964 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1965 _update_sysc_cache(oh);
1966 _enable_sysc(oh);
1967 }
1968 } else {
471a009b 1969 _omap4_disable_module(oh);
665d0013
RN
1970 _disable_clocks(oh);
1971 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1972 oh->name, r);
34617e2a 1973
665d0013
RN
1974 if (oh->clkdm)
1975 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1976 }
1977
63c85238
PW
1978 return r;
1979}
1980
1981/**
dc6d1cda 1982 * _idle - idle an omap_hwmod
63c85238
PW
1983 * @oh: struct omap_hwmod *
1984 *
1985 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1986 * no further work. Returns -EINVAL if the hwmod is in the wrong
1987 * state or returns 0.
63c85238 1988 */
dc6d1cda 1989static int _idle(struct omap_hwmod *oh)
63c85238 1990{
34617e2a
BC
1991 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1992
63c85238 1993 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1994 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1995 oh->name);
63c85238
PW
1996 return -EINVAL;
1997 }
1998
747834ab
PW
1999 if (_are_any_hardreset_lines_asserted(oh))
2000 return 0;
2001
43b40992 2002 if (oh->class->sysc)
74ff3a68 2003 _idle_sysc(oh);
63c85238 2004 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2005
9ebfd285
KH
2006 if (soc_ops.disable_module)
2007 soc_ops.disable_module(oh);
bfc141e3 2008
45c38252
BC
2009 /*
2010 * The module must be in idle mode before disabling any parents
2011 * clocks. Otherwise, the parent clock might be disabled before
2012 * the module transition is done, and thus will prevent the
2013 * transition to complete properly.
2014 */
2015 _disable_clocks(oh);
665d0013
RN
2016 if (oh->clkdm)
2017 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2018
8d9af88f 2019 /* Mux pins for device idle if populated */
5165882a 2020 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2021 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a
VB
2022 _reconfigure_io_chain();
2023 }
8d9af88f 2024
63c85238
PW
2025 oh->_state = _HWMOD_STATE_IDLE;
2026
2027 return 0;
2028}
2029
9599217a
KVA
2030/**
2031 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2032 * @oh: struct omap_hwmod *
2033 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2034 *
2035 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2036 * local copy. Intended to be used by drivers that require
2037 * direct manipulation of the AUTOIDLE bits.
2038 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2039 * along the return value from _set_module_autoidle().
2040 *
2041 * Any users of this function should be scrutinized carefully.
2042 */
2043int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2044{
2045 u32 v;
2046 int retval = 0;
2047 unsigned long flags;
2048
2049 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2050 return -EINVAL;
2051
2052 spin_lock_irqsave(&oh->_lock, flags);
2053
2054 v = oh->_sysc_cache;
2055
2056 retval = _set_module_autoidle(oh, autoidle, &v);
2057
2058 if (!retval)
2059 _write_sysconfig(v, oh);
2060
2061 spin_unlock_irqrestore(&oh->_lock, flags);
2062
2063 return retval;
2064}
2065
63c85238
PW
2066/**
2067 * _shutdown - shutdown an omap_hwmod
2068 * @oh: struct omap_hwmod *
2069 *
2070 * Shut down an omap_hwmod @oh. This should be called when the driver
2071 * used for the hwmod is removed or unloaded or if the driver is not
2072 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2073 * state or returns 0.
2074 */
2075static int _shutdown(struct omap_hwmod *oh)
2076{
9c8b0ec7 2077 int ret, i;
e4dc8f50
PW
2078 u8 prev_state;
2079
63c85238
PW
2080 if (oh->_state != _HWMOD_STATE_IDLE &&
2081 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2082 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2083 oh->name);
63c85238
PW
2084 return -EINVAL;
2085 }
2086
747834ab
PW
2087 if (_are_any_hardreset_lines_asserted(oh))
2088 return 0;
2089
63c85238
PW
2090 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2091
e4dc8f50
PW
2092 if (oh->class->pre_shutdown) {
2093 prev_state = oh->_state;
2094 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2095 _enable(oh);
e4dc8f50
PW
2096 ret = oh->class->pre_shutdown(oh);
2097 if (ret) {
2098 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2099 _idle(oh);
e4dc8f50
PW
2100 return ret;
2101 }
2102 }
2103
6481c73c
MV
2104 if (oh->class->sysc) {
2105 if (oh->_state == _HWMOD_STATE_IDLE)
2106 _enable(oh);
74ff3a68 2107 _shutdown_sysc(oh);
6481c73c 2108 }
5365efbe 2109
3827f949
BC
2110 /* clocks and deps are already disabled in idle */
2111 if (oh->_state == _HWMOD_STATE_ENABLED) {
2112 _del_initiator_dep(oh, mpu_oh);
2113 /* XXX what about the other system initiators here? dma, dsp */
9ebfd285
KH
2114 if (soc_ops.disable_module)
2115 soc_ops.disable_module(oh);
45c38252 2116 _disable_clocks(oh);
665d0013
RN
2117 if (oh->clkdm)
2118 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2119 }
63c85238
PW
2120 /* XXX Should this code also force-disable the optional clocks? */
2121
9c8b0ec7
PW
2122 for (i = 0; i < oh->rst_lines_cnt; i++)
2123 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2124
8d9af88f
TL
2125 /* Mux pins to safe mode or use populated off mode values */
2126 if (oh->mux)
2127 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2128
2129 oh->_state = _HWMOD_STATE_DISABLED;
2130
2131 return 0;
2132}
2133
381d033a
PW
2134/**
2135 * _init_mpu_rt_base - populate the virtual address for a hwmod
2136 * @oh: struct omap_hwmod * to locate the virtual address
2137 *
2138 * Cache the virtual address used by the MPU to access this IP block's
2139 * registers. This address is needed early so the OCP registers that
2140 * are part of the device's address space can be ioremapped properly.
2141 * No return value.
2142 */
2143static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2144{
c9aafd23
PW
2145 struct omap_hwmod_addr_space *mem;
2146 void __iomem *va_start;
2147
2148 if (!oh)
2149 return;
2150
2221b5cd
PW
2151 _save_mpu_port_index(oh);
2152
381d033a
PW
2153 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2154 return;
2155
c9aafd23
PW
2156 mem = _find_mpu_rt_addr_space(oh);
2157 if (!mem) {
2158 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2159 oh->name);
2160 return;
2161 }
2162
2163 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2164 if (!va_start) {
2165 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2166 return;
2167 }
2168
2169 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2170 oh->name, va_start);
2171
2172 oh->_mpu_rt_va = va_start;
381d033a
PW
2173}
2174
2175/**
2176 * _init - initialize internal data for the hwmod @oh
2177 * @oh: struct omap_hwmod *
2178 * @n: (unused)
2179 *
2180 * Look up the clocks and the address space used by the MPU to access
2181 * registers belonging to the hwmod @oh. @oh must already be
2182 * registered at this point. This is the first of two phases for
2183 * hwmod initialization. Code called here does not touch any hardware
2184 * registers, it simply prepares internal data structures. Returns 0
2185 * upon success or if the hwmod isn't registered, or -EINVAL upon
2186 * failure.
2187 */
2188static int __init _init(struct omap_hwmod *oh, void *data)
2189{
2190 int r;
2191
2192 if (oh->_state != _HWMOD_STATE_REGISTERED)
2193 return 0;
2194
2195 _init_mpu_rt_base(oh, NULL);
2196
2197 r = _init_clocks(oh, NULL);
2198 if (IS_ERR_VALUE(r)) {
2199 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2200 return -EINVAL;
2201 }
2202
2203 oh->_state = _HWMOD_STATE_INITIALIZED;
2204
2205 return 0;
2206}
2207
63c85238 2208/**
64813c3f 2209 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2210 * @oh: struct omap_hwmod *
2211 *
64813c3f
PW
2212 * Set up the module's interface clocks. XXX This function is still mostly
2213 * a stub; implementing this properly requires iclk autoidle usecounting in
2214 * the clock code. No return value.
63c85238 2215 */
64813c3f 2216static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2217{
5d95dde7 2218 struct omap_hwmod_ocp_if *os;
11cd4b94 2219 struct list_head *p;
5d95dde7 2220 int i = 0;
381d033a 2221 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2222 return;
48d54f3f 2223
11cd4b94 2224 p = oh->slave_ports.next;
63c85238 2225
5d95dde7 2226 while (i < oh->slaves_cnt) {
11cd4b94 2227 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2228 if (!os->_clk)
64813c3f 2229 continue;
63c85238 2230
64813c3f
PW
2231 if (os->flags & OCPIF_SWSUP_IDLE) {
2232 /* XXX omap_iclk_deny_idle(c); */
2233 } else {
2234 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2235 clk_enable(os->_clk);
63c85238
PW
2236 }
2237 }
2238
64813c3f
PW
2239 return;
2240}
2241
2242/**
2243 * _setup_reset - reset an IP block during the setup process
2244 * @oh: struct omap_hwmod *
2245 *
2246 * Reset the IP block corresponding to the hwmod @oh during the setup
2247 * process. The IP block is first enabled so it can be successfully
2248 * reset. Returns 0 upon success or a negative error code upon
2249 * failure.
2250 */
2251static int __init _setup_reset(struct omap_hwmod *oh)
2252{
2253 int r;
2254
2255 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2256 return -EINVAL;
63c85238 2257
747834ab
PW
2258 if (oh->rst_lines_cnt == 0) {
2259 r = _enable(oh);
2260 if (r) {
2261 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2262 oh->name, oh->_state);
2263 return -EINVAL;
2264 }
9a23dfe1 2265 }
63c85238 2266
2800852a 2267 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2268 r = _reset(oh);
2269
2270 return r;
2271}
2272
2273/**
2274 * _setup_postsetup - transition to the appropriate state after _setup
2275 * @oh: struct omap_hwmod *
2276 *
2277 * Place an IP block represented by @oh into a "post-setup" state --
2278 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2279 * this function is called at the end of _setup().) The postsetup
2280 * state for an IP block can be changed by calling
2281 * omap_hwmod_enter_postsetup_state() early in the boot process,
2282 * before one of the omap_hwmod_setup*() functions are called for the
2283 * IP block.
2284 *
2285 * The IP block stays in this state until a PM runtime-based driver is
2286 * loaded for that IP block. A post-setup state of IDLE is
2287 * appropriate for almost all IP blocks with runtime PM-enabled
2288 * drivers, since those drivers are able to enable the IP block. A
2289 * post-setup state of ENABLED is appropriate for kernels with PM
2290 * runtime disabled. The DISABLED state is appropriate for unusual IP
2291 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2292 * included, since the WDTIMER starts running on reset and will reset
2293 * the MPU if left active.
2294 *
2295 * This post-setup mechanism is deprecated. Once all of the OMAP
2296 * drivers have been converted to use PM runtime, and all of the IP
2297 * block data and interconnect data is available to the hwmod code, it
2298 * should be possible to replace this mechanism with a "lazy reset"
2299 * arrangement. In a "lazy reset" setup, each IP block is enabled
2300 * when the driver first probes, then all remaining IP blocks without
2301 * drivers are either shut down or enabled after the drivers have
2302 * loaded. However, this cannot take place until the above
2303 * preconditions have been met, since otherwise the late reset code
2304 * has no way of knowing which IP blocks are in use by drivers, and
2305 * which ones are unused.
2306 *
2307 * No return value.
2308 */
2309static void __init _setup_postsetup(struct omap_hwmod *oh)
2310{
2311 u8 postsetup_state;
2312
2313 if (oh->rst_lines_cnt > 0)
2314 return;
76e5589e 2315
2092e5cc
PW
2316 postsetup_state = oh->_postsetup_state;
2317 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2318 postsetup_state = _HWMOD_STATE_ENABLED;
2319
2320 /*
2321 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2322 * it should be set by the core code as a runtime flag during startup
2323 */
2324 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2325 (postsetup_state == _HWMOD_STATE_IDLE)) {
2326 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2327 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2328 }
2092e5cc
PW
2329
2330 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2331 _idle(oh);
2092e5cc
PW
2332 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2333 _shutdown(oh);
2334 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2335 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2336 oh->name, postsetup_state);
63c85238 2337
64813c3f
PW
2338 return;
2339}
2340
2341/**
2342 * _setup - prepare IP block hardware for use
2343 * @oh: struct omap_hwmod *
2344 * @n: (unused, pass NULL)
2345 *
2346 * Configure the IP block represented by @oh. This may include
2347 * enabling the IP block, resetting it, and placing it into a
2348 * post-setup state, depending on the type of IP block and applicable
2349 * flags. IP blocks are reset to prevent any previous configuration
2350 * by the bootloader or previous operating system from interfering
2351 * with power management or other parts of the system. The reset can
2352 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2353 * two phases for hwmod initialization. Code called here generally
2354 * affects the IP block hardware, or system integration hardware
2355 * associated with the IP block. Returns 0.
2356 */
2357static int __init _setup(struct omap_hwmod *oh, void *data)
2358{
2359 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2360 return 0;
2361
2362 _setup_iclk_autoidle(oh);
2363
2364 if (!_setup_reset(oh))
2365 _setup_postsetup(oh);
2366
63c85238
PW
2367 return 0;
2368}
2369
63c85238 2370/**
0102b627 2371 * _register - register a struct omap_hwmod
63c85238
PW
2372 * @oh: struct omap_hwmod *
2373 *
43b40992
PW
2374 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2375 * already has been registered by the same name; -EINVAL if the
2376 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2377 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2378 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2379 * success.
63c85238
PW
2380 *
2381 * XXX The data should be copied into bootmem, so the original data
2382 * should be marked __initdata and freed after init. This would allow
2383 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2384 * that the copy process would be relatively complex due to the large number
2385 * of substructures.
2386 */
01592df9 2387static int __init _register(struct omap_hwmod *oh)
63c85238 2388{
43b40992
PW
2389 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2390 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2391 return -EINVAL;
2392
63c85238
PW
2393 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2394
ce35b244
BC
2395 if (_lookup(oh->name))
2396 return -EEXIST;
63c85238 2397
63c85238
PW
2398 list_add_tail(&oh->node, &omap_hwmod_list);
2399
2221b5cd
PW
2400 INIT_LIST_HEAD(&oh->master_ports);
2401 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2402 spin_lock_init(&oh->_lock);
2092e5cc 2403
63c85238
PW
2404 oh->_state = _HWMOD_STATE_REGISTERED;
2405
569edd70
PW
2406 /*
2407 * XXX Rather than doing a strcmp(), this should test a flag
2408 * set in the hwmod data, inserted by the autogenerator code.
2409 */
2410 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2411 mpu_oh = oh;
63c85238 2412
569edd70 2413 return 0;
63c85238
PW
2414}
2415
2221b5cd
PW
2416/**
2417 * _alloc_links - return allocated memory for hwmod links
2418 * @ml: pointer to a struct omap_hwmod_link * for the master link
2419 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2420 *
2421 * Return pointers to two struct omap_hwmod_link records, via the
2422 * addresses pointed to by @ml and @sl. Will first attempt to return
2423 * memory allocated as part of a large initial block, but if that has
2424 * been exhausted, will allocate memory itself. Since ideally this
2425 * second allocation path will never occur, the number of these
2426 * 'supplemental' allocations will be logged when debugging is
2427 * enabled. Returns 0.
2428 */
2429static int __init _alloc_links(struct omap_hwmod_link **ml,
2430 struct omap_hwmod_link **sl)
2431{
2432 unsigned int sz;
2433
2434 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2435 *ml = &linkspace[free_ls++];
2436 *sl = &linkspace[free_ls++];
2437 return 0;
2438 }
2439
2440 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2441
2442 *sl = NULL;
2443 *ml = alloc_bootmem(sz);
2444
2445 memset(*ml, 0, sz);
2446
2447 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2448
2449 ls_supp++;
2450 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2451 ls_supp * LINKS_PER_OCP_IF);
2452
2453 return 0;
2454};
2455
2456/**
2457 * _add_link - add an interconnect between two IP blocks
2458 * @oi: pointer to a struct omap_hwmod_ocp_if record
2459 *
2460 * Add struct omap_hwmod_link records connecting the master IP block
2461 * specified in @oi->master to @oi, and connecting the slave IP block
2462 * specified in @oi->slave to @oi. This code is assumed to run before
2463 * preemption or SMP has been enabled, thus avoiding the need for
2464 * locking in this code. Changes to this assumption will require
2465 * additional locking. Returns 0.
2466 */
2467static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2468{
2469 struct omap_hwmod_link *ml, *sl;
2470
2471 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2472 oi->slave->name);
2473
2474 _alloc_links(&ml, &sl);
2475
2476 ml->ocp_if = oi;
2477 INIT_LIST_HEAD(&ml->node);
2478 list_add(&ml->node, &oi->master->master_ports);
2479 oi->master->masters_cnt++;
2480
2481 sl->ocp_if = oi;
2482 INIT_LIST_HEAD(&sl->node);
2483 list_add(&sl->node, &oi->slave->slave_ports);
2484 oi->slave->slaves_cnt++;
2485
2486 return 0;
2487}
2488
2489/**
2490 * _register_link - register a struct omap_hwmod_ocp_if
2491 * @oi: struct omap_hwmod_ocp_if *
2492 *
2493 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2494 * has already been registered; -EINVAL if @oi is NULL or if the
2495 * record pointed to by @oi is missing required fields; or 0 upon
2496 * success.
2497 *
2498 * XXX The data should be copied into bootmem, so the original data
2499 * should be marked __initdata and freed after init. This would allow
2500 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2501 */
2502static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2503{
2504 if (!oi || !oi->master || !oi->slave || !oi->user)
2505 return -EINVAL;
2506
2507 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2508 return -EEXIST;
2509
2510 pr_debug("omap_hwmod: registering link from %s to %s\n",
2511 oi->master->name, oi->slave->name);
2512
2513 /*
2514 * Register the connected hwmods, if they haven't been
2515 * registered already
2516 */
2517 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2518 _register(oi->master);
2519
2520 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2521 _register(oi->slave);
2522
2523 _add_link(oi);
2524
2525 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2526
2527 return 0;
2528}
2529
2530/**
2531 * _alloc_linkspace - allocate large block of hwmod links
2532 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2533 *
2534 * Allocate a large block of struct omap_hwmod_link records. This
2535 * improves boot time significantly by avoiding the need to allocate
2536 * individual records one by one. If the number of records to
2537 * allocate in the block hasn't been manually specified, this function
2538 * will count the number of struct omap_hwmod_ocp_if records in @ois
2539 * and use that to determine the allocation size. For SoC families
2540 * that require multiple list registrations, such as OMAP3xxx, this
2541 * estimation process isn't optimal, so manual estimation is advised
2542 * in those cases. Returns -EEXIST if the allocation has already occurred
2543 * or 0 upon success.
2544 */
2545static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2546{
2547 unsigned int i = 0;
2548 unsigned int sz;
2549
2550 if (linkspace) {
2551 WARN(1, "linkspace already allocated\n");
2552 return -EEXIST;
2553 }
2554
2555 if (max_ls == 0)
2556 while (ois[i++])
2557 max_ls += LINKS_PER_OCP_IF;
2558
2559 sz = sizeof(struct omap_hwmod_link) * max_ls;
2560
2561 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2562 __func__, sz, max_ls);
2563
2564 linkspace = alloc_bootmem(sz);
2565
2566 memset(linkspace, 0, sz);
2567
2568 return 0;
2569}
0102b627 2570
8f6aa8ee
KH
2571/* Static functions intended only for use in soc_ops field function pointers */
2572
2573/**
2574 * _omap2_wait_target_ready - wait for a module to leave slave idle
2575 * @oh: struct omap_hwmod *
2576 *
2577 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2578 * does not have an IDLEST bit or if the module successfully leaves
2579 * slave idle; otherwise, pass along the return value of the
2580 * appropriate *_cm*_wait_module_ready() function.
2581 */
2582static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2583{
2584 if (!oh)
2585 return -EINVAL;
2586
2587 if (oh->flags & HWMOD_NO_IDLEST)
2588 return 0;
2589
2590 if (!_find_mpu_rt_port(oh))
2591 return 0;
2592
2593 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2594
2595 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2596 oh->prcm.omap2.idlest_reg_id,
2597 oh->prcm.omap2.idlest_idle_bit);
2598}
2599
2600/**
2601 * _omap4_wait_target_ready - wait for a module to leave slave idle
2602 * @oh: struct omap_hwmod *
2603 *
2604 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2605 * does not have an IDLEST bit or if the module successfully leaves
2606 * slave idle; otherwise, pass along the return value of the
2607 * appropriate *_cm*_wait_module_ready() function.
2608 */
2609static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2610{
2611 if (!oh || !oh->clkdm)
2612 return -EINVAL;
2613
2614 if (oh->flags & HWMOD_NO_IDLEST)
2615 return 0;
2616
2617 if (!_find_mpu_rt_port(oh))
2618 return 0;
2619
2620 /* XXX check module SIDLEMODE, hardreset status */
2621
2622 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2623 oh->clkdm->cm_inst,
2624 oh->clkdm->clkdm_offs,
2625 oh->prcm.omap4.clkctrl_offs);
2626}
2627
1688bf19
VH
2628/**
2629 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2630 * @oh: struct omap_hwmod *
2631 *
2632 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2633 * does not have an IDLEST bit or if the module successfully leaves
2634 * slave idle; otherwise, pass along the return value of the
2635 * appropriate *_cm*_wait_module_ready() function.
2636 */
2637static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2638{
2639 if (!oh || !oh->clkdm)
2640 return -EINVAL;
2641
2642 if (oh->flags & HWMOD_NO_IDLEST)
2643 return 0;
2644
2645 if (!_find_mpu_rt_port(oh))
2646 return 0;
2647
2648 /* XXX check module SIDLEMODE, hardreset status */
2649
2650 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2651 oh->clkdm->clkdm_offs,
2652 oh->prcm.omap4.clkctrl_offs);
2653}
2654
b8249cf2
KH
2655/**
2656 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2657 * @oh: struct omap_hwmod * to assert hardreset
2658 * @ohri: hardreset line data
2659 *
2660 * Call omap2_prm_assert_hardreset() with parameters extracted from
2661 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2662 * use as an soc_ops function pointer. Passes along the return value
2663 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2664 * for removal when the PRM code is moved into drivers/.
2665 */
2666static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2667 struct omap_hwmod_rst_info *ohri)
2668{
2669 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2670 ohri->rst_shift);
2671}
2672
2673/**
2674 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2675 * @oh: struct omap_hwmod * to deassert hardreset
2676 * @ohri: hardreset line data
2677 *
2678 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2679 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2680 * use as an soc_ops function pointer. Passes along the return value
2681 * from omap2_prm_deassert_hardreset(). XXX This function is
2682 * scheduled for removal when the PRM code is moved into drivers/.
2683 */
2684static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2685 struct omap_hwmod_rst_info *ohri)
2686{
2687 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2688 ohri->rst_shift,
2689 ohri->st_shift);
2690}
2691
2692/**
2693 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2694 * @oh: struct omap_hwmod * to test hardreset
2695 * @ohri: hardreset line data
2696 *
2697 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2698 * from the hwmod @oh and the hardreset line data @ohri. Only
2699 * intended for use as an soc_ops function pointer. Passes along the
2700 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2701 * function is scheduled for removal when the PRM code is moved into
2702 * drivers/.
2703 */
2704static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2705 struct omap_hwmod_rst_info *ohri)
2706{
2707 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2708 ohri->st_shift);
2709}
2710
2711/**
2712 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2713 * @oh: struct omap_hwmod * to assert hardreset
2714 * @ohri: hardreset line data
2715 *
2716 * Call omap4_prminst_assert_hardreset() with parameters extracted
2717 * from the hwmod @oh and the hardreset line data @ohri. Only
2718 * intended for use as an soc_ops function pointer. Passes along the
2719 * return value from omap4_prminst_assert_hardreset(). XXX This
2720 * function is scheduled for removal when the PRM code is moved into
2721 * drivers/.
2722 */
2723static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2724 struct omap_hwmod_rst_info *ohri)
b8249cf2 2725{
07b3a139
PW
2726 if (!oh->clkdm)
2727 return -EINVAL;
2728
b8249cf2
KH
2729 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2730 oh->clkdm->pwrdm.ptr->prcm_partition,
2731 oh->clkdm->pwrdm.ptr->prcm_offs,
2732 oh->prcm.omap4.rstctrl_offs);
2733}
2734
2735/**
2736 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2737 * @oh: struct omap_hwmod * to deassert hardreset
2738 * @ohri: hardreset line data
2739 *
2740 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2741 * from the hwmod @oh and the hardreset line data @ohri. Only
2742 * intended for use as an soc_ops function pointer. Passes along the
2743 * return value from omap4_prminst_deassert_hardreset(). XXX This
2744 * function is scheduled for removal when the PRM code is moved into
2745 * drivers/.
2746 */
2747static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2748 struct omap_hwmod_rst_info *ohri)
2749{
07b3a139
PW
2750 if (!oh->clkdm)
2751 return -EINVAL;
2752
b8249cf2
KH
2753 if (ohri->st_shift)
2754 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2755 oh->name, ohri->name);
2756 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2757 oh->clkdm->pwrdm.ptr->prcm_partition,
2758 oh->clkdm->pwrdm.ptr->prcm_offs,
2759 oh->prcm.omap4.rstctrl_offs);
2760}
2761
2762/**
2763 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2764 * @oh: struct omap_hwmod * to test hardreset
2765 * @ohri: hardreset line data
2766 *
2767 * Call omap4_prminst_is_hardreset_asserted() with parameters
2768 * extracted from the hwmod @oh and the hardreset line data @ohri.
2769 * Only intended for use as an soc_ops function pointer. Passes along
2770 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2771 * This function is scheduled for removal when the PRM code is moved
2772 * into drivers/.
2773 */
2774static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2775 struct omap_hwmod_rst_info *ohri)
2776{
07b3a139
PW
2777 if (!oh->clkdm)
2778 return -EINVAL;
2779
b8249cf2
KH
2780 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2781 oh->clkdm->pwrdm.ptr->prcm_partition,
2782 oh->clkdm->pwrdm.ptr->prcm_offs,
2783 oh->prcm.omap4.rstctrl_offs);
2784}
2785
1688bf19
VH
2786/**
2787 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2788 * @oh: struct omap_hwmod * to assert hardreset
2789 * @ohri: hardreset line data
2790 *
2791 * Call am33xx_prminst_assert_hardreset() with parameters extracted
2792 * from the hwmod @oh and the hardreset line data @ohri. Only
2793 * intended for use as an soc_ops function pointer. Passes along the
2794 * return value from am33xx_prminst_assert_hardreset(). XXX This
2795 * function is scheduled for removal when the PRM code is moved into
2796 * drivers/.
2797 */
2798static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
2799 struct omap_hwmod_rst_info *ohri)
2800
2801{
2802 return am33xx_prm_assert_hardreset(ohri->rst_shift,
2803 oh->clkdm->pwrdm.ptr->prcm_offs,
2804 oh->prcm.omap4.rstctrl_offs);
2805}
2806
2807/**
2808 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2809 * @oh: struct omap_hwmod * to deassert hardreset
2810 * @ohri: hardreset line data
2811 *
2812 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2813 * from the hwmod @oh and the hardreset line data @ohri. Only
2814 * intended for use as an soc_ops function pointer. Passes along the
2815 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2816 * function is scheduled for removal when the PRM code is moved into
2817 * drivers/.
2818 */
2819static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2820 struct omap_hwmod_rst_info *ohri)
2821{
2822 if (ohri->st_shift)
2823 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2824 oh->name, ohri->name);
2825
2826 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
2827 oh->clkdm->pwrdm.ptr->prcm_offs,
2828 oh->prcm.omap4.rstctrl_offs,
2829 oh->prcm.omap4.rstst_offs);
2830}
2831
2832/**
2833 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
2834 * @oh: struct omap_hwmod * to test hardreset
2835 * @ohri: hardreset line data
2836 *
2837 * Call am33xx_prminst_is_hardreset_asserted() with parameters
2838 * extracted from the hwmod @oh and the hardreset line data @ohri.
2839 * Only intended for use as an soc_ops function pointer. Passes along
2840 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
2841 * This function is scheduled for removal when the PRM code is moved
2842 * into drivers/.
2843 */
2844static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
2845 struct omap_hwmod_rst_info *ohri)
2846{
2847 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
2848 oh->clkdm->pwrdm.ptr->prcm_offs,
2849 oh->prcm.omap4.rstctrl_offs);
2850}
2851
0102b627
BC
2852/* Public functions */
2853
2854u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2855{
2856 if (oh->flags & HWMOD_16BIT_REG)
2857 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2858 else
2859 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2860}
2861
2862void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2863{
2864 if (oh->flags & HWMOD_16BIT_REG)
2865 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2866 else
2867 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2868}
2869
6d3c55fd
A
2870/**
2871 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2872 * @oh: struct omap_hwmod *
2873 *
2874 * This is a public function exposed to drivers. Some drivers may need to do
2875 * some settings before and after resetting the device. Those drivers after
2876 * doing the necessary settings could use this function to start a reset by
2877 * setting the SYSCONFIG.SOFTRESET bit.
2878 */
2879int omap_hwmod_softreset(struct omap_hwmod *oh)
2880{
3c55c1ba
PW
2881 u32 v;
2882 int ret;
2883
2884 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2885 return -EINVAL;
2886
3c55c1ba
PW
2887 v = oh->_sysc_cache;
2888 ret = _set_softreset(oh, &v);
2889 if (ret)
2890 goto error;
2891 _write_sysconfig(v, oh);
2892
2893error:
2894 return ret;
6d3c55fd
A
2895}
2896
0102b627
BC
2897/**
2898 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2899 * @oh: struct omap_hwmod *
2900 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2901 *
2902 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2903 * local copy. Intended to be used by drivers that have some erratum
2904 * that requires direct manipulation of the SIDLEMODE bits. Returns
2905 * -EINVAL if @oh is null, or passes along the return value from
2906 * _set_slave_idlemode().
2907 *
2908 * XXX Does this function have any current users? If not, we should
2909 * remove it; it is better to let the rest of the hwmod code handle this.
2910 * Any users of this function should be scrutinized carefully.
2911 */
2912int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2913{
2914 u32 v;
2915 int retval = 0;
2916
2917 if (!oh)
2918 return -EINVAL;
2919
2920 v = oh->_sysc_cache;
2921
2922 retval = _set_slave_idlemode(oh, idlemode, &v);
2923 if (!retval)
2924 _write_sysconfig(v, oh);
2925
2926 return retval;
2927}
2928
63c85238
PW
2929/**
2930 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2931 * @name: name of the omap_hwmod to look up
2932 *
2933 * Given a @name of an omap_hwmod, return a pointer to the registered
2934 * struct omap_hwmod *, or NULL upon error.
2935 */
2936struct omap_hwmod *omap_hwmod_lookup(const char *name)
2937{
2938 struct omap_hwmod *oh;
2939
2940 if (!name)
2941 return NULL;
2942
63c85238 2943 oh = _lookup(name);
63c85238
PW
2944
2945 return oh;
2946}
2947
2948/**
2949 * omap_hwmod_for_each - call function for each registered omap_hwmod
2950 * @fn: pointer to a callback function
97d60162 2951 * @data: void * data to pass to callback function
63c85238
PW
2952 *
2953 * Call @fn for each registered omap_hwmod, passing @data to each
2954 * function. @fn must return 0 for success or any other value for
2955 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2956 * will stop and the non-zero return value will be passed to the
2957 * caller of omap_hwmod_for_each(). @fn is called with
2958 * omap_hwmod_for_each() held.
2959 */
97d60162
PW
2960int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2961 void *data)
63c85238
PW
2962{
2963 struct omap_hwmod *temp_oh;
30ebad9d 2964 int ret = 0;
63c85238
PW
2965
2966 if (!fn)
2967 return -EINVAL;
2968
63c85238 2969 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2970 ret = (*fn)(temp_oh, data);
63c85238
PW
2971 if (ret)
2972 break;
2973 }
63c85238
PW
2974
2975 return ret;
2976}
2977
2221b5cd
PW
2978/**
2979 * omap_hwmod_register_links - register an array of hwmod links
2980 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2981 *
2982 * Intended to be called early in boot before the clock framework is
2983 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
2984 * listed in @ois that are valid for this chip. Returns -EINVAL if
2985 * omap_hwmod_init() hasn't been called before calling this function,
2986 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2987 * success.
2221b5cd
PW
2988 */
2989int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2990{
2991 int r, i;
2992
9ebfd285
KH
2993 if (!inited)
2994 return -EINVAL;
2995
2221b5cd
PW
2996 if (!ois)
2997 return 0;
2998
2221b5cd
PW
2999 if (!linkspace) {
3000 if (_alloc_linkspace(ois)) {
3001 pr_err("omap_hwmod: could not allocate link space\n");
3002 return -ENOMEM;
3003 }
3004 }
3005
3006 i = 0;
3007 do {
3008 r = _register_link(ois[i]);
3009 WARN(r && r != -EEXIST,
3010 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3011 ois[i]->master->name, ois[i]->slave->name, r);
3012 } while (ois[++i]);
3013
3014 return 0;
3015}
3016
381d033a
PW
3017/**
3018 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3019 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3020 *
3021 * If the hwmod data corresponding to the MPU subsystem IP block
3022 * hasn't been initialized and set up yet, do so now. This must be
3023 * done first since sleep dependencies may be added from other hwmods
3024 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3025 * return value.
63c85238 3026 */
381d033a 3027static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3028{
381d033a
PW
3029 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3030 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3031 __func__, MPU_INITIATOR_NAME);
3032 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3033 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3034}
3035
63c85238 3036/**
a2debdbd
PW
3037 * omap_hwmod_setup_one - set up a single hwmod
3038 * @oh_name: const char * name of the already-registered hwmod to set up
3039 *
381d033a
PW
3040 * Initialize and set up a single hwmod. Intended to be used for a
3041 * small number of early devices, such as the timer IP blocks used for
3042 * the scheduler clock. Must be called after omap2_clk_init().
3043 * Resolves the struct clk names to struct clk pointers for each
3044 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3045 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3046 */
3047int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3048{
3049 struct omap_hwmod *oh;
63c85238 3050
a2debdbd
PW
3051 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3052
a2debdbd
PW
3053 oh = _lookup(oh_name);
3054 if (!oh) {
3055 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3056 return -EINVAL;
3057 }
63c85238 3058
381d033a 3059 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3060
381d033a 3061 _init(oh, NULL);
a2debdbd
PW
3062 _setup(oh, NULL);
3063
63c85238
PW
3064 return 0;
3065}
3066
3067/**
381d033a 3068 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3069 *
381d033a
PW
3070 * Initialize and set up all IP blocks registered with the hwmod code.
3071 * Must be called after omap2_clk_init(). Resolves the struct clk
3072 * names to struct clk pointers for each registered omap_hwmod. Also
3073 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3074 */
550c8092 3075static int __init omap_hwmod_setup_all(void)
63c85238 3076{
381d033a 3077 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3078
381d033a 3079 omap_hwmod_for_each(_init, NULL);
2092e5cc 3080 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3081
3082 return 0;
3083}
550c8092 3084core_initcall(omap_hwmod_setup_all);
63c85238 3085
63c85238
PW
3086/**
3087 * omap_hwmod_enable - enable an omap_hwmod
3088 * @oh: struct omap_hwmod *
3089 *
74ff3a68 3090 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3091 * Returns -EINVAL on error or passes along the return value from _enable().
3092 */
3093int omap_hwmod_enable(struct omap_hwmod *oh)
3094{
3095 int r;
dc6d1cda 3096 unsigned long flags;
63c85238
PW
3097
3098 if (!oh)
3099 return -EINVAL;
3100
dc6d1cda
PW
3101 spin_lock_irqsave(&oh->_lock, flags);
3102 r = _enable(oh);
3103 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3104
3105 return r;
3106}
3107
3108/**
3109 * omap_hwmod_idle - idle an omap_hwmod
3110 * @oh: struct omap_hwmod *
3111 *
74ff3a68 3112 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3113 * Returns -EINVAL on error or passes along the return value from _idle().
3114 */
3115int omap_hwmod_idle(struct omap_hwmod *oh)
3116{
dc6d1cda
PW
3117 unsigned long flags;
3118
63c85238
PW
3119 if (!oh)
3120 return -EINVAL;
3121
dc6d1cda
PW
3122 spin_lock_irqsave(&oh->_lock, flags);
3123 _idle(oh);
3124 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3125
3126 return 0;
3127}
3128
3129/**
3130 * omap_hwmod_shutdown - shutdown an omap_hwmod
3131 * @oh: struct omap_hwmod *
3132 *
74ff3a68 3133 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3134 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3135 * the return value from _shutdown().
3136 */
3137int omap_hwmod_shutdown(struct omap_hwmod *oh)
3138{
dc6d1cda
PW
3139 unsigned long flags;
3140
63c85238
PW
3141 if (!oh)
3142 return -EINVAL;
3143
dc6d1cda 3144 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3145 _shutdown(oh);
dc6d1cda 3146 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3147
3148 return 0;
3149}
3150
3151/**
3152 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3153 * @oh: struct omap_hwmod *oh
3154 *
3155 * Intended to be called by the omap_device code.
3156 */
3157int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3158{
dc6d1cda
PW
3159 unsigned long flags;
3160
3161 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3162 _enable_clocks(oh);
dc6d1cda 3163 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3164
3165 return 0;
3166}
3167
3168/**
3169 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3170 * @oh: struct omap_hwmod *oh
3171 *
3172 * Intended to be called by the omap_device code.
3173 */
3174int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3175{
dc6d1cda
PW
3176 unsigned long flags;
3177
3178 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3179 _disable_clocks(oh);
dc6d1cda 3180 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3181
3182 return 0;
3183}
3184
3185/**
3186 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3187 * @oh: struct omap_hwmod *oh
3188 *
3189 * Intended to be called by drivers and core code when all posted
3190 * writes to a device must complete before continuing further
3191 * execution (for example, after clearing some device IRQSTATUS
3192 * register bits)
3193 *
3194 * XXX what about targets with multiple OCP threads?
3195 */
3196void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3197{
3198 BUG_ON(!oh);
3199
43b40992 3200 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3201 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3202 oh->name);
63c85238
PW
3203 return;
3204 }
3205
3206 /*
3207 * Forces posted writes to complete on the OCP thread handling
3208 * register writes
3209 */
cc7a1d2a 3210 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3211}
3212
3213/**
3214 * omap_hwmod_reset - reset the hwmod
3215 * @oh: struct omap_hwmod *
3216 *
3217 * Under some conditions, a driver may wish to reset the entire device.
3218 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3219 * the return value from _reset().
63c85238
PW
3220 */
3221int omap_hwmod_reset(struct omap_hwmod *oh)
3222{
3223 int r;
dc6d1cda 3224 unsigned long flags;
63c85238 3225
9b579114 3226 if (!oh)
63c85238
PW
3227 return -EINVAL;
3228
dc6d1cda 3229 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3230 r = _reset(oh);
dc6d1cda 3231 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3232
3233 return r;
3234}
3235
5e8370f1
PW
3236/*
3237 * IP block data retrieval functions
3238 */
3239
63c85238
PW
3240/**
3241 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3242 * @oh: struct omap_hwmod *
3243 * @res: pointer to the first element of an array of struct resource to fill
3244 *
3245 * Count the number of struct resource array elements necessary to
3246 * contain omap_hwmod @oh resources. Intended to be called by code
3247 * that registers omap_devices. Intended to be used to determine the
3248 * size of a dynamically-allocated struct resource array, before
3249 * calling omap_hwmod_fill_resources(). Returns the number of struct
3250 * resource array elements needed.
3251 *
3252 * XXX This code is not optimized. It could attempt to merge adjacent
3253 * resource IDs.
3254 *
3255 */
3256int omap_hwmod_count_resources(struct omap_hwmod *oh)
3257{
5d95dde7 3258 struct omap_hwmod_ocp_if *os;
11cd4b94 3259 struct list_head *p;
5d95dde7
PW
3260 int ret;
3261 int i = 0;
63c85238 3262
bc614958 3263 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 3264
11cd4b94 3265 p = oh->slave_ports.next;
2221b5cd 3266
5d95dde7 3267 while (i < oh->slaves_cnt) {
11cd4b94 3268 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
3269 ret += _count_ocp_if_addr_spaces(os);
3270 }
63c85238
PW
3271
3272 return ret;
3273}
3274
3275/**
3276 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3277 * @oh: struct omap_hwmod *
3278 * @res: pointer to the first element of an array of struct resource to fill
3279 *
3280 * Fill the struct resource array @res with resource data from the
3281 * omap_hwmod @oh. Intended to be called by code that registers
3282 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3283 * number of array elements filled.
3284 */
3285int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3286{
5d95dde7 3287 struct omap_hwmod_ocp_if *os;
11cd4b94 3288 struct list_head *p;
5d95dde7 3289 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3290 int r = 0;
3291
3292 /* For each IRQ, DMA, memory area, fill in array.*/
3293
212738a4
PW
3294 mpu_irqs_cnt = _count_mpu_irqs(oh);
3295 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3296 (res + r)->name = (oh->mpu_irqs + i)->name;
3297 (res + r)->start = (oh->mpu_irqs + i)->irq;
3298 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3299 (res + r)->flags = IORESOURCE_IRQ;
3300 r++;
3301 }
3302
bc614958
PW
3303 sdma_reqs_cnt = _count_sdma_reqs(oh);
3304 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3305 (res + r)->name = (oh->sdma_reqs + i)->name;
3306 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3307 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3308 (res + r)->flags = IORESOURCE_DMA;
3309 r++;
3310 }
3311
11cd4b94 3312 p = oh->slave_ports.next;
2221b5cd 3313
5d95dde7
PW
3314 i = 0;
3315 while (i < oh->slaves_cnt) {
11cd4b94 3316 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3317 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3318
78183f3f 3319 for (j = 0; j < addr_cnt; j++) {
cd503802 3320 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3321 (res + r)->start = (os->addr + j)->pa_start;
3322 (res + r)->end = (os->addr + j)->pa_end;
3323 (res + r)->flags = IORESOURCE_MEM;
3324 r++;
3325 }
3326 }
3327
3328 return r;
3329}
3330
5e8370f1
PW
3331/**
3332 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3333 * @oh: struct omap_hwmod * to operate on
3334 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3335 * @name: pointer to the name of the data to fetch (optional)
3336 * @rsrc: pointer to a struct resource, allocated by the caller
3337 *
3338 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3339 * data for the IP block pointed to by @oh. The data will be filled
3340 * into a struct resource record pointed to by @rsrc. The struct
3341 * resource must be allocated by the caller. When @name is non-null,
3342 * the data associated with the matching entry in the IRQ/SDMA/address
3343 * space hwmod data arrays will be returned. If @name is null, the
3344 * first array entry will be returned. Data order is not meaningful
3345 * in hwmod data, so callers are strongly encouraged to use a non-null
3346 * @name whenever possible to avoid unpredictable effects if hwmod
3347 * data is later added that causes data ordering to change. This
3348 * function is only intended for use by OMAP core code. Device
3349 * drivers should not call this function - the appropriate bus-related
3350 * data accessor functions should be used instead. Returns 0 upon
3351 * success or a negative error code upon error.
3352 */
3353int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3354 const char *name, struct resource *rsrc)
3355{
3356 int r;
3357 unsigned int irq, dma;
3358 u32 pa_start, pa_end;
3359
3360 if (!oh || !rsrc)
3361 return -EINVAL;
3362
3363 if (type == IORESOURCE_IRQ) {
3364 r = _get_mpu_irq_by_name(oh, name, &irq);
3365 if (r)
3366 return r;
3367
3368 rsrc->start = irq;
3369 rsrc->end = irq;
3370 } else if (type == IORESOURCE_DMA) {
3371 r = _get_sdma_req_by_name(oh, name, &dma);
3372 if (r)
3373 return r;
3374
3375 rsrc->start = dma;
3376 rsrc->end = dma;
3377 } else if (type == IORESOURCE_MEM) {
3378 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3379 if (r)
3380 return r;
3381
3382 rsrc->start = pa_start;
3383 rsrc->end = pa_end;
3384 } else {
3385 return -EINVAL;
3386 }
3387
3388 rsrc->flags = type;
3389 rsrc->name = name;
3390
3391 return 0;
3392}
3393
63c85238
PW
3394/**
3395 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3396 * @oh: struct omap_hwmod *
3397 *
3398 * Return the powerdomain pointer associated with the OMAP module
3399 * @oh's main clock. If @oh does not have a main clk, return the
3400 * powerdomain associated with the interface clock associated with the
3401 * module's MPU port. (XXX Perhaps this should use the SDMA port
3402 * instead?) Returns NULL on error, or a struct powerdomain * on
3403 * success.
3404 */
3405struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3406{
3407 struct clk *c;
2d6141ba 3408 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3409
3410 if (!oh)
3411 return NULL;
3412
3413 if (oh->_clk) {
3414 c = oh->_clk;
3415 } else {
2d6141ba
PW
3416 oi = _find_mpu_rt_port(oh);
3417 if (!oi)
63c85238 3418 return NULL;
2d6141ba 3419 c = oi->_clk;
63c85238
PW
3420 }
3421
d5647c18
TG
3422 if (!c->clkdm)
3423 return NULL;
3424
63c85238
PW
3425 return c->clkdm->pwrdm.ptr;
3426
3427}
3428
db2a60bf
PW
3429/**
3430 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3431 * @oh: struct omap_hwmod *
3432 *
3433 * Returns the virtual address corresponding to the beginning of the
3434 * module's register target, in the address range that is intended to
3435 * be used by the MPU. Returns the virtual address upon success or NULL
3436 * upon error.
3437 */
3438void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3439{
3440 if (!oh)
3441 return NULL;
3442
3443 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3444 return NULL;
3445
3446 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3447 return NULL;
3448
3449 return oh->_mpu_rt_va;
3450}
3451
63c85238
PW
3452/**
3453 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3454 * @oh: struct omap_hwmod *
3455 * @init_oh: struct omap_hwmod * (initiator)
3456 *
3457 * Add a sleep dependency between the initiator @init_oh and @oh.
3458 * Intended to be called by DSP/Bridge code via platform_data for the
3459 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3460 * code needs to add/del initiator dependencies dynamically
3461 * before/after accessing a device. Returns the return value from
3462 * _add_initiator_dep().
3463 *
3464 * XXX Keep a usecount in the clockdomain code
3465 */
3466int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3467 struct omap_hwmod *init_oh)
3468{
3469 return _add_initiator_dep(oh, init_oh);
3470}
3471
3472/*
3473 * XXX what about functions for drivers to save/restore ocp_sysconfig
3474 * for context save/restore operations?
3475 */
3476
3477/**
3478 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3479 * @oh: struct omap_hwmod *
3480 * @init_oh: struct omap_hwmod * (initiator)
3481 *
3482 * Remove a sleep dependency between the initiator @init_oh and @oh.
3483 * Intended to be called by DSP/Bridge code via platform_data for the
3484 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3485 * code needs to add/del initiator dependencies dynamically
3486 * before/after accessing a device. Returns the return value from
3487 * _del_initiator_dep().
3488 *
3489 * XXX Keep a usecount in the clockdomain code
3490 */
3491int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3492 struct omap_hwmod *init_oh)
3493{
3494 return _del_initiator_dep(oh, init_oh);
3495}
3496
63c85238
PW
3497/**
3498 * omap_hwmod_enable_wakeup - allow device to wake up the system
3499 * @oh: struct omap_hwmod *
3500 *
3501 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3502 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3503 * this IP block if it has dynamic mux entries. Eventually this
3504 * should set PRCM wakeup registers to cause the PRCM to receive
3505 * wakeup events from the module. Does not set any wakeup routing
3506 * registers beyond this point - if the module is to wake up any other
3507 * module or subsystem, that must be set separately. Called by
3508 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3509 */
3510int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3511{
dc6d1cda 3512 unsigned long flags;
5a7ddcbd 3513 u32 v;
dc6d1cda 3514
dc6d1cda 3515 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3516
3517 if (oh->class->sysc &&
3518 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3519 v = oh->_sysc_cache;
3520 _enable_wakeup(oh, &v);
3521 _write_sysconfig(v, oh);
3522 }
3523
eceec009 3524 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3525 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3526
3527 return 0;
3528}
3529
3530/**
3531 * omap_hwmod_disable_wakeup - prevent device from waking the system
3532 * @oh: struct omap_hwmod *
3533 *
3534 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3535 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3536 * events for this IP block if it has dynamic mux entries. Eventually
3537 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3538 * wakeup events from the module. Does not set any wakeup routing
3539 * registers beyond this point - if the module is to wake up any other
3540 * module or subsystem, that must be set separately. Called by
3541 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3542 */
3543int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3544{
dc6d1cda 3545 unsigned long flags;
5a7ddcbd 3546 u32 v;
dc6d1cda 3547
dc6d1cda 3548 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3549
3550 if (oh->class->sysc &&
3551 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3552 v = oh->_sysc_cache;
3553 _disable_wakeup(oh, &v);
3554 _write_sysconfig(v, oh);
3555 }
3556
eceec009 3557 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3558 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3559
3560 return 0;
3561}
43b40992 3562
aee48e3c
PW
3563/**
3564 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3565 * contained in the hwmod module.
3566 * @oh: struct omap_hwmod *
3567 * @name: name of the reset line to lookup and assert
3568 *
3569 * Some IP like dsp, ipu or iva contain processor that require
3570 * an HW reset line to be assert / deassert in order to enable fully
3571 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3572 * yet supported on this OMAP; otherwise, passes along the return value
3573 * from _assert_hardreset().
3574 */
3575int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3576{
3577 int ret;
dc6d1cda 3578 unsigned long flags;
aee48e3c
PW
3579
3580 if (!oh)
3581 return -EINVAL;
3582
dc6d1cda 3583 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3584 ret = _assert_hardreset(oh, name);
dc6d1cda 3585 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3586
3587 return ret;
3588}
3589
3590/**
3591 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3592 * contained in the hwmod module.
3593 * @oh: struct omap_hwmod *
3594 * @name: name of the reset line to look up and deassert
3595 *
3596 * Some IP like dsp, ipu or iva contain processor that require
3597 * an HW reset line to be assert / deassert in order to enable fully
3598 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3599 * yet supported on this OMAP; otherwise, passes along the return value
3600 * from _deassert_hardreset().
3601 */
3602int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3603{
3604 int ret;
dc6d1cda 3605 unsigned long flags;
aee48e3c
PW
3606
3607 if (!oh)
3608 return -EINVAL;
3609
dc6d1cda 3610 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3611 ret = _deassert_hardreset(oh, name);
dc6d1cda 3612 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3613
3614 return ret;
3615}
3616
3617/**
3618 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3619 * contained in the hwmod module
3620 * @oh: struct omap_hwmod *
3621 * @name: name of the reset line to look up and read
3622 *
3623 * Return the current state of the hwmod @oh's reset line named @name:
3624 * returns -EINVAL upon parameter error or if this operation
3625 * is unsupported on the current OMAP; otherwise, passes along the return
3626 * value from _read_hardreset().
3627 */
3628int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3629{
3630 int ret;
dc6d1cda 3631 unsigned long flags;
aee48e3c
PW
3632
3633 if (!oh)
3634 return -EINVAL;
3635
dc6d1cda 3636 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3637 ret = _read_hardreset(oh, name);
dc6d1cda 3638 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3639
3640 return ret;
3641}
3642
3643
43b40992
PW
3644/**
3645 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3646 * @classname: struct omap_hwmod_class name to search for
3647 * @fn: callback function pointer to call for each hwmod in class @classname
3648 * @user: arbitrary context data to pass to the callback function
3649 *
ce35b244
BC
3650 * For each omap_hwmod of class @classname, call @fn.
3651 * If the callback function returns something other than
43b40992
PW
3652 * zero, the iterator is terminated, and the callback function's return
3653 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3654 * if @classname or @fn are NULL, or passes back the error code from @fn.
3655 */
3656int omap_hwmod_for_each_by_class(const char *classname,
3657 int (*fn)(struct omap_hwmod *oh,
3658 void *user),
3659 void *user)
3660{
3661 struct omap_hwmod *temp_oh;
3662 int ret = 0;
3663
3664 if (!classname || !fn)
3665 return -EINVAL;
3666
3667 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3668 __func__, classname);
3669
43b40992
PW
3670 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3671 if (!strcmp(temp_oh->class->name, classname)) {
3672 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3673 __func__, temp_oh->name);
3674 ret = (*fn)(temp_oh, user);
3675 if (ret)
3676 break;
3677 }
3678 }
3679
43b40992
PW
3680 if (ret)
3681 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3682 __func__, ret);
3683
3684 return ret;
3685}
3686
2092e5cc
PW
3687/**
3688 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3689 * @oh: struct omap_hwmod *
3690 * @state: state that _setup() should leave the hwmod in
3691 *
550c8092 3692 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3693 * (called by omap_hwmod_setup_*()). See also the documentation
3694 * for _setup_postsetup(), above. Returns 0 upon success or
3695 * -EINVAL if there is a problem with the arguments or if the hwmod is
3696 * in the wrong state.
2092e5cc
PW
3697 */
3698int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3699{
3700 int ret;
dc6d1cda 3701 unsigned long flags;
2092e5cc
PW
3702
3703 if (!oh)
3704 return -EINVAL;
3705
3706 if (state != _HWMOD_STATE_DISABLED &&
3707 state != _HWMOD_STATE_ENABLED &&
3708 state != _HWMOD_STATE_IDLE)
3709 return -EINVAL;
3710
dc6d1cda 3711 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3712
3713 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3714 ret = -EINVAL;
3715 goto ohsps_unlock;
3716 }
3717
3718 oh->_postsetup_state = state;
3719 ret = 0;
3720
3721ohsps_unlock:
dc6d1cda 3722 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3723
3724 return ret;
3725}
c80705aa
KH
3726
3727/**
3728 * omap_hwmod_get_context_loss_count - get lost context count
3729 * @oh: struct omap_hwmod *
3730 *
3731 * Query the powerdomain of of @oh to get the context loss
3732 * count for this device.
3733 *
3734 * Returns the context loss count of the powerdomain assocated with @oh
3735 * upon success, or zero if no powerdomain exists for @oh.
3736 */
fc013873 3737int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3738{
3739 struct powerdomain *pwrdm;
3740 int ret = 0;
3741
3742 pwrdm = omap_hwmod_get_pwrdm(oh);
3743 if (pwrdm)
3744 ret = pwrdm_get_context_loss_count(pwrdm);
3745
3746 return ret;
3747}
43b01643
PW
3748
3749/**
3750 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3751 * @oh: struct omap_hwmod *
3752 *
3753 * Prevent the hwmod @oh from being reset during the setup process.
3754 * Intended for use by board-*.c files on boards with devices that
3755 * cannot tolerate being reset. Must be called before the hwmod has
3756 * been set up. Returns 0 upon success or negative error code upon
3757 * failure.
3758 */
3759int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3760{
3761 if (!oh)
3762 return -EINVAL;
3763
3764 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3765 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3766 oh->name);
3767 return -EINVAL;
3768 }
3769
3770 oh->flags |= HWMOD_INIT_NO_RESET;
3771
3772 return 0;
3773}
abc2d545
TK
3774
3775/**
3776 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3777 * @oh: struct omap_hwmod * containing hwmod mux entries
3778 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3779 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3780 *
3781 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3782 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3783 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3784 * this function is not called for a given pad_idx, then the ISR
3785 * associated with @oh's first MPU IRQ will be triggered when an I/O
3786 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3787 * the _dynamic or wakeup_ entry: if there are other entries not
3788 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3789 * entries are NOT COUNTED in the dynamic pad index. This function
3790 * must be called separately for each pad that requires its interrupt
3791 * to be re-routed this way. Returns -EINVAL if there is an argument
3792 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3793 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3794 *
3795 * XXX This function interface is fragile. Rather than using array
3796 * indexes, which are subject to unpredictable change, it should be
3797 * using hwmod IRQ names, and some other stable key for the hwmod mux
3798 * pad records.
3799 */
3800int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3801{
3802 int nr_irqs;
3803
3804 might_sleep();
3805
3806 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3807 pad_idx >= oh->mux->nr_pads_dynamic)
3808 return -EINVAL;
3809
3810 /* Check the number of available mpu_irqs */
3811 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3812 ;
3813
3814 if (irq_idx >= nr_irqs)
3815 return -EINVAL;
3816
3817 if (!oh->mux->irqs) {
3818 /* XXX What frees this? */
3819 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3820 GFP_KERNEL);
3821 if (!oh->mux->irqs)
3822 return -ENOMEM;
3823 }
3824 oh->mux->irqs[pad_idx] = irq_idx;
3825
3826 return 0;
3827}
9ebfd285
KH
3828
3829/**
3830 * omap_hwmod_init - initialize the hwmod code
3831 *
3832 * Sets up some function pointers needed by the hwmod code to operate on the
3833 * currently-booted SoC. Intended to be called once during kernel init
3834 * before any hwmods are registered. No return value.
3835 */
3836void __init omap_hwmod_init(void)
3837{
8f6aa8ee
KH
3838 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3839 soc_ops.wait_target_ready = _omap2_wait_target_ready;
b8249cf2
KH
3840 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3841 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3842 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
05e152c7 3843 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
9ebfd285
KH
3844 soc_ops.enable_module = _omap4_enable_module;
3845 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 3846 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
3847 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3848 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3849 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 3850 soc_ops.init_clkdm = _init_clkdm;
1688bf19
VH
3851 } else if (soc_is_am33xx()) {
3852 soc_ops.enable_module = _am33xx_enable_module;
3853 soc_ops.disable_module = _am33xx_disable_module;
3854 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
3855 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
3856 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3857 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
3858 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
3859 } else {
3860 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
3861 }
3862
3863 inited = true;
3864}
68c9a95e
TL
3865
3866/**
3867 * omap_hwmod_get_main_clk - get pointer to main clock name
3868 * @oh: struct omap_hwmod *
3869 *
3870 * Returns the main clock name assocated with @oh upon success,
3871 * or NULL if @oh is NULL.
3872 */
3873const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3874{
3875 if (!oh)
3876 return NULL;
3877
3878 return oh->main_clk;
3879}