ARM: OMAP: clock: Define a function to enable clocks at init
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
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133#ifdef CONFIG_COMMON_CLK
134#include <linux/clk-provider.h>
135#else
63c85238 136#include <linux/clk.h>
f5dd3bb5 137#endif
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138#include <linux/delay.h>
139#include <linux/err.h>
140#include <linux/list.h>
141#include <linux/mutex.h>
dc6d1cda 142#include <linux/spinlock.h>
abc2d545 143#include <linux/slab.h>
2221b5cd 144#include <linux/bootmem.h>
63c85238 145
a135eaae 146#include "clock.h"
2a296c8f 147#include "omap_hwmod.h"
63c85238 148
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149#include "soc.h"
150#include "common.h"
151#include "clockdomain.h"
152#include "powerdomain.h"
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153#include "cm2xxx.h"
154#include "cm3xxx.h"
d0f0631d 155#include "cminst44xx.h"
1688bf19 156#include "cm33xx.h"
b13159af 157#include "prm.h"
139563ad 158#include "prm3xxx.h"
d198b514 159#include "prm44xx.h"
1688bf19 160#include "prm33xx.h"
eaac329d 161#include "prminst44xx.h"
8d9af88f 162#include "mux.h"
5165882a 163#include "pm.h"
63c85238 164
63c85238 165/* Name of the OMAP hwmod for the MPU */
5c2c0296 166#define MPU_INITIATOR_NAME "mpu"
63c85238 167
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168/*
169 * Number of struct omap_hwmod_link records per struct
170 * omap_hwmod_ocp_if record (master->slave and slave->master)
171 */
172#define LINKS_PER_OCP_IF 2
173
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174/**
175 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
176 * @enable_module: function to enable a module (via MODULEMODE)
177 * @disable_module: function to disable a module (via MODULEMODE)
178 *
179 * XXX Eventually this functionality will be hidden inside the PRM/CM
180 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
181 * conditionals in this code.
182 */
183struct omap_hwmod_soc_ops {
184 void (*enable_module)(struct omap_hwmod *oh);
185 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 186 int (*wait_target_ready)(struct omap_hwmod *oh);
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187 int (*assert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*deassert_hardreset)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
191 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
192 struct omap_hwmod_rst_info *ohri);
0a179eaa 193 int (*init_clkdm)(struct omap_hwmod *oh);
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194};
195
196/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
197static struct omap_hwmod_soc_ops soc_ops;
198
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199/* omap_hwmod_list contains all registered struct omap_hwmods */
200static LIST_HEAD(omap_hwmod_list);
201
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202/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
203static struct omap_hwmod *mpu_oh;
204
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205/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
206static DEFINE_SPINLOCK(io_chain_lock);
207
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208/*
209 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
210 * allocated from - used to reduce the number of small memory
211 * allocations, which has a significant impact on performance
212 */
213static struct omap_hwmod_link *linkspace;
214
215/*
216 * free_ls, max_ls: array indexes into linkspace; representing the
217 * next free struct omap_hwmod_link index, and the maximum number of
218 * struct omap_hwmod_link records allocated (respectively)
219 */
220static unsigned short free_ls, max_ls, ls_supp;
63c85238 221
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222/* inited: set to true once the hwmod code is initialized */
223static bool inited;
224
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225/* Private functions */
226
5d95dde7 227/**
11cd4b94 228 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 229 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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230 * @i: pointer to the index of the element pointed to by @p in the list
231 *
232 * Return a pointer to the struct omap_hwmod_ocp_if record
233 * containing the struct list_head pointed to by @p, and increment
234 * @p such that a future call to this routine will return the next
235 * record.
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236 */
237static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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238 int *i)
239{
240 struct omap_hwmod_ocp_if *oi;
241
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242 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
243 *p = (*p)->next;
2221b5cd 244
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245 *i = *i + 1;
246
247 return oi;
248}
249
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250/**
251 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
252 * @oh: struct omap_hwmod *
253 *
254 * Load the current value of the hwmod OCP_SYSCONFIG register into the
255 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
256 * OCP_SYSCONFIG register or 0 upon success.
257 */
258static int _update_sysc_cache(struct omap_hwmod *oh)
259{
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260 if (!oh->class->sysc) {
261 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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262 return -EINVAL;
263 }
264
265 /* XXX ensure module interface clock is up */
266
cc7a1d2a 267 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 268
43b40992 269 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 270 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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271
272 return 0;
273}
274
275/**
276 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
277 * @v: OCP_SYSCONFIG value to write
278 * @oh: struct omap_hwmod *
279 *
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280 * Write @v into the module class' OCP_SYSCONFIG register, if it has
281 * one. No return value.
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282 */
283static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
284{
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285 if (!oh->class->sysc) {
286 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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287 return;
288 }
289
290 /* XXX ensure module interface clock is up */
291
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292 /* Module might have lost context, always update cache and register */
293 oh->_sysc_cache = v;
294 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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295}
296
297/**
298 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
299 * @oh: struct omap_hwmod *
300 * @standbymode: MIDLEMODE field bits
301 * @v: pointer to register contents to modify
302 *
303 * Update the master standby mode bits in @v to be @standbymode for
304 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
305 * upon error or 0 upon success.
306 */
307static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
308 u32 *v)
309{
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310 u32 mstandby_mask;
311 u8 mstandby_shift;
312
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313 if (!oh->class->sysc ||
314 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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315 return -EINVAL;
316
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317 if (!oh->class->sysc->sysc_fields) {
318 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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319 return -EINVAL;
320 }
321
43b40992 322 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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323 mstandby_mask = (0x3 << mstandby_shift);
324
325 *v &= ~mstandby_mask;
326 *v |= __ffs(standbymode) << mstandby_shift;
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327
328 return 0;
329}
330
331/**
332 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
333 * @oh: struct omap_hwmod *
334 * @idlemode: SIDLEMODE field bits
335 * @v: pointer to register contents to modify
336 *
337 * Update the slave idle mode bits in @v to be @idlemode for the @oh
338 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
339 * or 0 upon success.
340 */
341static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
342{
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343 u32 sidle_mask;
344 u8 sidle_shift;
345
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346 if (!oh->class->sysc ||
347 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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348 return -EINVAL;
349
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350 if (!oh->class->sysc->sysc_fields) {
351 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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352 return -EINVAL;
353 }
354
43b40992 355 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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356 sidle_mask = (0x3 << sidle_shift);
357
358 *v &= ~sidle_mask;
359 *v |= __ffs(idlemode) << sidle_shift;
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360
361 return 0;
362}
363
364/**
365 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
366 * @oh: struct omap_hwmod *
367 * @clockact: CLOCKACTIVITY field bits
368 * @v: pointer to register contents to modify
369 *
370 * Update the clockactivity mode bits in @v to be @clockact for the
371 * @oh hwmod. Used for additional powersaving on some modules. Does
372 * not write to the hardware. Returns -EINVAL upon error or 0 upon
373 * success.
374 */
375static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
376{
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377 u32 clkact_mask;
378 u8 clkact_shift;
379
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380 if (!oh->class->sysc ||
381 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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382 return -EINVAL;
383
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384 if (!oh->class->sysc->sysc_fields) {
385 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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386 return -EINVAL;
387 }
388
43b40992 389 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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390 clkact_mask = (0x3 << clkact_shift);
391
392 *v &= ~clkact_mask;
393 *v |= clockact << clkact_shift;
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394
395 return 0;
396}
397
398/**
399 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
400 * @oh: struct omap_hwmod *
401 * @v: pointer to register contents to modify
402 *
403 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
404 * error or 0 upon success.
405 */
406static int _set_softreset(struct omap_hwmod *oh, u32 *v)
407{
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408 u32 softrst_mask;
409
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410 if (!oh->class->sysc ||
411 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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412 return -EINVAL;
413
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414 if (!oh->class->sysc->sysc_fields) {
415 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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416 return -EINVAL;
417 }
418
43b40992 419 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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420
421 *v |= softrst_mask;
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422
423 return 0;
424}
425
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426/**
427 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
428 * @oh: struct omap_hwmod *
429 *
430 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
431 * of some modules. When the DMA must perform read/write accesses, the
432 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
433 * for power management, software must set the DMADISABLE bit back to 1.
434 *
435 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
436 * error or 0 upon success.
437 */
438static int _set_dmadisable(struct omap_hwmod *oh)
439{
440 u32 v;
441 u32 dmadisable_mask;
442
443 if (!oh->class->sysc ||
444 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
445 return -EINVAL;
446
447 if (!oh->class->sysc->sysc_fields) {
448 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
449 return -EINVAL;
450 }
451
452 /* clocks must be on for this operation */
453 if (oh->_state != _HWMOD_STATE_ENABLED) {
454 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
455 return -EINVAL;
456 }
457
458 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
459
460 v = oh->_sysc_cache;
461 dmadisable_mask =
462 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
463 v |= dmadisable_mask;
464 _write_sysconfig(v, oh);
465
466 return 0;
467}
468
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469/**
470 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
471 * @oh: struct omap_hwmod *
472 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
473 * @v: pointer to register contents to modify
474 *
475 * Update the module autoidle bit in @v to be @autoidle for the @oh
476 * hwmod. The autoidle bit controls whether the module can gate
477 * internal clocks automatically when it isn't doing anything; the
478 * exact function of this bit varies on a per-module basis. This
479 * function does not write to the hardware. Returns -EINVAL upon
480 * error or 0 upon success.
481 */
482static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
483 u32 *v)
484{
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TG
485 u32 autoidle_mask;
486 u8 autoidle_shift;
487
43b40992
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488 if (!oh->class->sysc ||
489 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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490 return -EINVAL;
491
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492 if (!oh->class->sysc->sysc_fields) {
493 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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494 return -EINVAL;
495 }
496
43b40992 497 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 498 autoidle_mask = (0x1 << autoidle_shift);
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499
500 *v &= ~autoidle_mask;
501 *v |= autoidle << autoidle_shift;
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502
503 return 0;
504}
505
eceec009
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506/**
507 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
508 * @oh: struct omap_hwmod *
509 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
510 *
511 * Set or clear the I/O pad wakeup flag in the mux entries for the
512 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
513 * in memory. If the hwmod is currently idled, and the new idle
514 * values don't match the previous ones, this function will also
515 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
516 * currently idled, this function won't touch the hardware: the new
517 * mux settings are written to the SCM PADCTRL registers when the
518 * hwmod is idled. No return value.
519 */
520static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
521{
522 struct omap_device_pad *pad;
523 bool change = false;
524 u16 prev_idle;
525 int j;
526
527 if (!oh->mux || !oh->mux->enabled)
528 return;
529
530 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
531 pad = oh->mux->pads_dynamic[j];
532
533 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
534 continue;
535
536 prev_idle = pad->idle;
537
538 if (set_wake)
539 pad->idle |= OMAP_WAKEUP_EN;
540 else
541 pad->idle &= ~OMAP_WAKEUP_EN;
542
543 if (prev_idle != pad->idle)
544 change = true;
545 }
546
547 if (change && oh->_state == _HWMOD_STATE_IDLE)
548 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
549}
550
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551/**
552 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
553 * @oh: struct omap_hwmod *
554 *
555 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
556 * upon error or 0 upon success.
557 */
5a7ddcbd 558static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 559{
43b40992 560 if (!oh->class->sysc ||
86009eb3 561 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
562 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
563 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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564 return -EINVAL;
565
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566 if (!oh->class->sysc->sysc_fields) {
567 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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568 return -EINVAL;
569 }
570
1fe74113
BC
571 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
572 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 573
86009eb3
BC
574 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
575 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
576 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
577 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 578
63c85238
PW
579 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
580
581 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
582
583 return 0;
584}
585
586/**
587 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
588 * @oh: struct omap_hwmod *
589 *
590 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
591 * upon error or 0 upon success.
592 */
5a7ddcbd 593static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 594{
43b40992 595 if (!oh->class->sysc ||
86009eb3 596 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
597 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
598 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
599 return -EINVAL;
600
43b40992
PW
601 if (!oh->class->sysc->sysc_fields) {
602 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
603 return -EINVAL;
604 }
605
1fe74113
BC
606 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
607 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 608
86009eb3
BC
609 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
610 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 611 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 612 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 613
63c85238
PW
614 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
615
616 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
617
618 return 0;
619}
620
f5dd3bb5
RN
621static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
622{
623 if (oh->clkdm) {
624 return oh->clkdm;
625 } else if (oh->_clk) {
626#ifdef CONFIG_COMMON_CLK
627 struct clk_hw_omap *clk;
628
629 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
630 return clk->clkdm;
631#else
632 return oh->_clk->clkdm;
633#endif
634 }
635 return NULL;
636}
637
63c85238
PW
638/**
639 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
640 * @oh: struct omap_hwmod *
641 *
642 * Prevent the hardware module @oh from entering idle while the
643 * hardare module initiator @init_oh is active. Useful when a module
644 * will be accessed by a particular initiator (e.g., if a module will
645 * be accessed by the IVA, there should be a sleepdep between the IVA
646 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
647 * mode. If the clockdomain is marked as not needing autodeps, return
648 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
649 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
650 */
651static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
652{
f5dd3bb5
RN
653 struct clockdomain *clkdm, *init_clkdm;
654
655 clkdm = _get_clkdm(oh);
656 init_clkdm = _get_clkdm(init_oh);
657
658 if (!clkdm || !init_clkdm)
63c85238
PW
659 return -EINVAL;
660
f5dd3bb5 661 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
570b54c7
PW
662 return 0;
663
f5dd3bb5 664 return clkdm_add_sleepdep(clkdm, init_clkdm);
63c85238
PW
665}
666
667/**
668 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
669 * @oh: struct omap_hwmod *
670 *
671 * Allow the hardware module @oh to enter idle while the hardare
672 * module initiator @init_oh is active. Useful when a module will not
673 * be accessed by a particular initiator (e.g., if a module will not
674 * be accessed by the IVA, there should be no sleepdep between the IVA
675 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
676 * mode. If the clockdomain is marked as not needing autodeps, return
677 * 0 without doing anything. Returns -EINVAL upon error or passes
678 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
679 */
680static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
681{
f5dd3bb5
RN
682 struct clockdomain *clkdm, *init_clkdm;
683
684 clkdm = _get_clkdm(oh);
685 init_clkdm = _get_clkdm(init_oh);
686
687 if (!clkdm || !init_clkdm)
63c85238
PW
688 return -EINVAL;
689
f5dd3bb5 690 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
570b54c7
PW
691 return 0;
692
f5dd3bb5 693 return clkdm_del_sleepdep(clkdm, init_clkdm);
63c85238
PW
694}
695
696/**
697 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
698 * @oh: struct omap_hwmod *
699 *
700 * Called from _init_clocks(). Populates the @oh _clk (main
701 * functional clock pointer) if a main_clk is present. Returns 0 on
702 * success or -EINVAL on error.
703 */
704static int _init_main_clk(struct omap_hwmod *oh)
705{
63c85238
PW
706 int ret = 0;
707
50ebdac2 708 if (!oh->main_clk)
63c85238
PW
709 return 0;
710
6ea74cb9
RN
711 oh->_clk = clk_get(NULL, oh->main_clk);
712 if (IS_ERR(oh->_clk)) {
20383d82
BC
713 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
714 oh->name, oh->main_clk);
63403384 715 return -EINVAL;
dc75925d 716 }
4d7cb45e
RN
717 /*
718 * HACK: This needs a re-visit once clk_prepare() is implemented
719 * to do something meaningful. Today its just a no-op.
720 * If clk_prepare() is used at some point to do things like
721 * voltage scaling etc, then this would have to be moved to
722 * some point where subsystems like i2c and pmic become
723 * available.
724 */
725 clk_prepare(oh->_clk);
63c85238 726
f5dd3bb5 727 if (!_get_clkdm(oh))
3bb05dbf 728 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
5dcc3b97 729 oh->name, oh->main_clk);
81d7c6ff 730
63c85238
PW
731 return ret;
732}
733
734/**
887adeac 735 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
736 * @oh: struct omap_hwmod *
737 *
738 * Called from _init_clocks(). Populates the @oh OCP slave interface
739 * clock pointers. Returns 0 on success or -EINVAL on error.
740 */
741static int _init_interface_clks(struct omap_hwmod *oh)
742{
5d95dde7 743 struct omap_hwmod_ocp_if *os;
11cd4b94 744 struct list_head *p;
63c85238 745 struct clk *c;
5d95dde7 746 int i = 0;
63c85238
PW
747 int ret = 0;
748
11cd4b94 749 p = oh->slave_ports.next;
2221b5cd 750
5d95dde7 751 while (i < oh->slaves_cnt) {
11cd4b94 752 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 753 if (!os->clk)
63c85238
PW
754 continue;
755
6ea74cb9
RN
756 c = clk_get(NULL, os->clk);
757 if (IS_ERR(c)) {
20383d82
BC
758 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
759 oh->name, os->clk);
63c85238 760 ret = -EINVAL;
dc75925d 761 }
63c85238 762 os->_clk = c;
4d7cb45e
RN
763 /*
764 * HACK: This needs a re-visit once clk_prepare() is implemented
765 * to do something meaningful. Today its just a no-op.
766 * If clk_prepare() is used at some point to do things like
767 * voltage scaling etc, then this would have to be moved to
768 * some point where subsystems like i2c and pmic become
769 * available.
770 */
771 clk_prepare(os->_clk);
63c85238
PW
772 }
773
774 return ret;
775}
776
777/**
778 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
779 * @oh: struct omap_hwmod *
780 *
781 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
782 * clock pointers. Returns 0 on success or -EINVAL on error.
783 */
784static int _init_opt_clks(struct omap_hwmod *oh)
785{
786 struct omap_hwmod_opt_clk *oc;
787 struct clk *c;
788 int i;
789 int ret = 0;
790
791 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
6ea74cb9
RN
792 c = clk_get(NULL, oc->clk);
793 if (IS_ERR(c)) {
20383d82
BC
794 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
795 oh->name, oc->clk);
63c85238 796 ret = -EINVAL;
dc75925d 797 }
63c85238 798 oc->_clk = c;
4d7cb45e
RN
799 /*
800 * HACK: This needs a re-visit once clk_prepare() is implemented
801 * to do something meaningful. Today its just a no-op.
802 * If clk_prepare() is used at some point to do things like
803 * voltage scaling etc, then this would have to be moved to
804 * some point where subsystems like i2c and pmic become
805 * available.
806 */
807 clk_prepare(oc->_clk);
63c85238
PW
808 }
809
810 return ret;
811}
812
813/**
814 * _enable_clocks - enable hwmod main clock and interface clocks
815 * @oh: struct omap_hwmod *
816 *
817 * Enables all clocks necessary for register reads and writes to succeed
818 * on the hwmod @oh. Returns 0.
819 */
820static int _enable_clocks(struct omap_hwmod *oh)
821{
5d95dde7 822 struct omap_hwmod_ocp_if *os;
11cd4b94 823 struct list_head *p;
5d95dde7 824 int i = 0;
63c85238
PW
825
826 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
827
4d3ae5a9 828 if (oh->_clk)
63c85238
PW
829 clk_enable(oh->_clk);
830
11cd4b94 831 p = oh->slave_ports.next;
2221b5cd 832
5d95dde7 833 while (i < oh->slaves_cnt) {
11cd4b94 834 os = _fetch_next_ocp_if(&p, &i);
63c85238 835
5d95dde7
PW
836 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
837 clk_enable(os->_clk);
63c85238
PW
838 }
839
840 /* The opt clocks are controlled by the device driver. */
841
842 return 0;
843}
844
845/**
846 * _disable_clocks - disable hwmod main clock and interface clocks
847 * @oh: struct omap_hwmod *
848 *
849 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
850 */
851static int _disable_clocks(struct omap_hwmod *oh)
852{
5d95dde7 853 struct omap_hwmod_ocp_if *os;
11cd4b94 854 struct list_head *p;
5d95dde7 855 int i = 0;
63c85238
PW
856
857 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
858
4d3ae5a9 859 if (oh->_clk)
63c85238
PW
860 clk_disable(oh->_clk);
861
11cd4b94 862 p = oh->slave_ports.next;
2221b5cd 863
5d95dde7 864 while (i < oh->slaves_cnt) {
11cd4b94 865 os = _fetch_next_ocp_if(&p, &i);
63c85238 866
5d95dde7
PW
867 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
868 clk_disable(os->_clk);
63c85238
PW
869 }
870
871 /* The opt clocks are controlled by the device driver. */
872
873 return 0;
874}
875
96835af9
BC
876static void _enable_optional_clocks(struct omap_hwmod *oh)
877{
878 struct omap_hwmod_opt_clk *oc;
879 int i;
880
881 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
882
883 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
884 if (oc->_clk) {
885 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
5dcc3b97 886 __clk_get_name(oc->_clk));
96835af9
BC
887 clk_enable(oc->_clk);
888 }
889}
890
891static void _disable_optional_clocks(struct omap_hwmod *oh)
892{
893 struct omap_hwmod_opt_clk *oc;
894 int i;
895
896 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
897
898 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
899 if (oc->_clk) {
900 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
5dcc3b97 901 __clk_get_name(oc->_clk));
96835af9
BC
902 clk_disable(oc->_clk);
903 }
904}
905
45c38252 906/**
3d9f0327 907 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
908 * @oh: struct omap_hwmod *
909 *
910 * Enables the PRCM module mode related to the hwmod @oh.
911 * No return value.
912 */
3d9f0327 913static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 914{
45c38252
BC
915 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
916 return;
917
3d9f0327
KH
918 pr_debug("omap_hwmod: %s: %s: %d\n",
919 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
920
921 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
922 oh->clkdm->prcm_partition,
923 oh->clkdm->cm_inst,
924 oh->clkdm->clkdm_offs,
925 oh->prcm.omap4.clkctrl_offs);
926}
927
1688bf19
VH
928/**
929 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
930 * @oh: struct omap_hwmod *
931 *
932 * Enables the PRCM module mode related to the hwmod @oh.
933 * No return value.
934 */
935static void _am33xx_enable_module(struct omap_hwmod *oh)
936{
937 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
938 return;
939
940 pr_debug("omap_hwmod: %s: %s: %d\n",
941 oh->name, __func__, oh->prcm.omap4.modulemode);
942
943 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
944 oh->clkdm->clkdm_offs,
945 oh->prcm.omap4.clkctrl_offs);
946}
947
45c38252 948/**
bfc141e3
BC
949 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
950 * @oh: struct omap_hwmod *
951 *
952 * Wait for a module @oh to enter slave idle. Returns 0 if the module
953 * does not have an IDLEST bit or if the module successfully enters
954 * slave idle; otherwise, pass along the return value of the
955 * appropriate *_cm*_wait_module_idle() function.
956 */
957static int _omap4_wait_target_disable(struct omap_hwmod *oh)
958{
2b026d13 959 if (!oh)
bfc141e3
BC
960 return -EINVAL;
961
2b026d13 962 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
bfc141e3
BC
963 return 0;
964
965 if (oh->flags & HWMOD_NO_IDLEST)
966 return 0;
967
968 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
969 oh->clkdm->cm_inst,
970 oh->clkdm->clkdm_offs,
971 oh->prcm.omap4.clkctrl_offs);
972}
973
1688bf19
VH
974/**
975 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
976 * @oh: struct omap_hwmod *
977 *
978 * Wait for a module @oh to enter slave idle. Returns 0 if the module
979 * does not have an IDLEST bit or if the module successfully enters
980 * slave idle; otherwise, pass along the return value of the
981 * appropriate *_cm*_wait_module_idle() function.
982 */
983static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
984{
985 if (!oh)
986 return -EINVAL;
987
988 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
989 return 0;
990
991 if (oh->flags & HWMOD_NO_IDLEST)
992 return 0;
993
994 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
995 oh->clkdm->clkdm_offs,
996 oh->prcm.omap4.clkctrl_offs);
997}
998
212738a4
PW
999/**
1000 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1001 * @oh: struct omap_hwmod *oh
1002 *
1003 * Count and return the number of MPU IRQs associated with the hwmod
1004 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1005 * NULL.
1006 */
1007static int _count_mpu_irqs(struct omap_hwmod *oh)
1008{
1009 struct omap_hwmod_irq_info *ohii;
1010 int i = 0;
1011
1012 if (!oh || !oh->mpu_irqs)
1013 return 0;
1014
1015 do {
1016 ohii = &oh->mpu_irqs[i++];
1017 } while (ohii->irq != -1);
1018
cc1b0765 1019 return i-1;
212738a4
PW
1020}
1021
bc614958
PW
1022/**
1023 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1024 * @oh: struct omap_hwmod *oh
1025 *
1026 * Count and return the number of SDMA request lines associated with
1027 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1028 * if @oh is NULL.
1029 */
1030static int _count_sdma_reqs(struct omap_hwmod *oh)
1031{
1032 struct omap_hwmod_dma_info *ohdi;
1033 int i = 0;
1034
1035 if (!oh || !oh->sdma_reqs)
1036 return 0;
1037
1038 do {
1039 ohdi = &oh->sdma_reqs[i++];
1040 } while (ohdi->dma_req != -1);
1041
cc1b0765 1042 return i-1;
bc614958
PW
1043}
1044
78183f3f
PW
1045/**
1046 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1047 * @oh: struct omap_hwmod *oh
1048 *
1049 * Count and return the number of address space ranges associated with
1050 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1051 * if @oh is NULL.
1052 */
1053static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1054{
1055 struct omap_hwmod_addr_space *mem;
1056 int i = 0;
1057
1058 if (!os || !os->addr)
1059 return 0;
1060
1061 do {
1062 mem = &os->addr[i++];
1063 } while (mem->pa_start != mem->pa_end);
1064
cc1b0765 1065 return i-1;
78183f3f
PW
1066}
1067
5e8370f1
PW
1068/**
1069 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1070 * @oh: struct omap_hwmod * to operate on
1071 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1072 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1073 *
1074 * Retrieve a MPU hardware IRQ line number named by @name associated
1075 * with the IP block pointed to by @oh. The IRQ number will be filled
1076 * into the address pointed to by @dma. When @name is non-null, the
1077 * IRQ line number associated with the named entry will be returned.
1078 * If @name is null, the first matching entry will be returned. Data
1079 * order is not meaningful in hwmod data, so callers are strongly
1080 * encouraged to use a non-null @name whenever possible to avoid
1081 * unpredictable effects if hwmod data is later added that causes data
1082 * ordering to change. Returns 0 upon success or a negative error
1083 * code upon error.
1084 */
1085static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1086 unsigned int *irq)
1087{
1088 int i;
1089 bool found = false;
1090
1091 if (!oh->mpu_irqs)
1092 return -ENOENT;
1093
1094 i = 0;
1095 while (oh->mpu_irqs[i].irq != -1) {
1096 if (name == oh->mpu_irqs[i].name ||
1097 !strcmp(name, oh->mpu_irqs[i].name)) {
1098 found = true;
1099 break;
1100 }
1101 i++;
1102 }
1103
1104 if (!found)
1105 return -ENOENT;
1106
1107 *irq = oh->mpu_irqs[i].irq;
1108
1109 return 0;
1110}
1111
1112/**
1113 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1114 * @oh: struct omap_hwmod * to operate on
1115 * @name: pointer to the name of the SDMA request line to fetch (optional)
1116 * @dma: pointer to an unsigned int to store the request line ID to
1117 *
1118 * Retrieve an SDMA request line ID named by @name on the IP block
1119 * pointed to by @oh. The ID will be filled into the address pointed
1120 * to by @dma. When @name is non-null, the request line ID associated
1121 * with the named entry will be returned. If @name is null, the first
1122 * matching entry will be returned. Data order is not meaningful in
1123 * hwmod data, so callers are strongly encouraged to use a non-null
1124 * @name whenever possible to avoid unpredictable effects if hwmod
1125 * data is later added that causes data ordering to change. Returns 0
1126 * upon success or a negative error code upon error.
1127 */
1128static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1129 unsigned int *dma)
1130{
1131 int i;
1132 bool found = false;
1133
1134 if (!oh->sdma_reqs)
1135 return -ENOENT;
1136
1137 i = 0;
1138 while (oh->sdma_reqs[i].dma_req != -1) {
1139 if (name == oh->sdma_reqs[i].name ||
1140 !strcmp(name, oh->sdma_reqs[i].name)) {
1141 found = true;
1142 break;
1143 }
1144 i++;
1145 }
1146
1147 if (!found)
1148 return -ENOENT;
1149
1150 *dma = oh->sdma_reqs[i].dma_req;
1151
1152 return 0;
1153}
1154
1155/**
1156 * _get_addr_space_by_name - fetch address space start & end by name
1157 * @oh: struct omap_hwmod * to operate on
1158 * @name: pointer to the name of the address space to fetch (optional)
1159 * @pa_start: pointer to a u32 to store the starting address to
1160 * @pa_end: pointer to a u32 to store the ending address to
1161 *
1162 * Retrieve address space start and end addresses for the IP block
1163 * pointed to by @oh. The data will be filled into the addresses
1164 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1165 * address space data associated with the named entry will be
1166 * returned. If @name is null, the first matching entry will be
1167 * returned. Data order is not meaningful in hwmod data, so callers
1168 * are strongly encouraged to use a non-null @name whenever possible
1169 * to avoid unpredictable effects if hwmod data is later added that
1170 * causes data ordering to change. Returns 0 upon success or a
1171 * negative error code upon error.
1172 */
1173static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1174 u32 *pa_start, u32 *pa_end)
1175{
1176 int i, j;
1177 struct omap_hwmod_ocp_if *os;
2221b5cd 1178 struct list_head *p = NULL;
5e8370f1
PW
1179 bool found = false;
1180
11cd4b94 1181 p = oh->slave_ports.next;
2221b5cd 1182
5d95dde7
PW
1183 i = 0;
1184 while (i < oh->slaves_cnt) {
11cd4b94 1185 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1186
1187 if (!os->addr)
1188 return -ENOENT;
1189
1190 j = 0;
1191 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1192 if (name == os->addr[j].name ||
1193 !strcmp(name, os->addr[j].name)) {
1194 found = true;
1195 break;
1196 }
1197 j++;
1198 }
1199
1200 if (found)
1201 break;
1202 }
1203
1204 if (!found)
1205 return -ENOENT;
1206
1207 *pa_start = os->addr[j].pa_start;
1208 *pa_end = os->addr[j].pa_end;
1209
1210 return 0;
1211}
1212
63c85238 1213/**
24dbc213 1214 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1215 * @oh: struct omap_hwmod *
1216 *
24dbc213
PW
1217 * Determines the array index of the OCP slave port that the MPU uses
1218 * to address the device, and saves it into the struct omap_hwmod.
1219 * Intended to be called during hwmod registration only. No return
1220 * value.
63c85238 1221 */
24dbc213 1222static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1223{
24dbc213 1224 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1225 struct list_head *p;
5d95dde7 1226 int i = 0;
63c85238 1227
5d95dde7 1228 if (!oh)
24dbc213
PW
1229 return;
1230
1231 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1232
11cd4b94 1233 p = oh->slave_ports.next;
2221b5cd 1234
5d95dde7 1235 while (i < oh->slaves_cnt) {
11cd4b94 1236 os = _fetch_next_ocp_if(&p, &i);
63c85238 1237 if (os->user & OCP_USER_MPU) {
2221b5cd 1238 oh->_mpu_port = os;
24dbc213 1239 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1240 break;
1241 }
1242 }
1243
24dbc213 1244 return;
63c85238
PW
1245}
1246
2d6141ba
PW
1247/**
1248 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1249 * @oh: struct omap_hwmod *
1250 *
1251 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1252 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1253 * communicate with the IP block. This interface need not be directly
1254 * connected to the MPU (and almost certainly is not), but is directly
1255 * connected to the IP block represented by @oh. Returns a pointer
1256 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1257 * error or if there does not appear to be a path from the MPU to this
1258 * IP block.
1259 */
1260static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1261{
1262 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1263 return NULL;
1264
11cd4b94 1265 return oh->_mpu_port;
2d6141ba
PW
1266};
1267
63c85238 1268/**
c9aafd23 1269 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1270 * @oh: struct omap_hwmod *
1271 *
c9aafd23
PW
1272 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1273 * the register target MPU address space; or returns NULL upon error.
63c85238 1274 */
c9aafd23 1275static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1276{
1277 struct omap_hwmod_ocp_if *os;
1278 struct omap_hwmod_addr_space *mem;
c9aafd23 1279 int found = 0, i = 0;
63c85238 1280
2d6141ba 1281 os = _find_mpu_rt_port(oh);
24dbc213 1282 if (!os || !os->addr)
78183f3f
PW
1283 return NULL;
1284
1285 do {
1286 mem = &os->addr[i++];
1287 if (mem->flags & ADDR_TYPE_RT)
63c85238 1288 found = 1;
78183f3f 1289 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1290
c9aafd23 1291 return (found) ? mem : NULL;
63c85238
PW
1292}
1293
1294/**
74ff3a68 1295 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1296 * @oh: struct omap_hwmod *
1297 *
006c7f18
PW
1298 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1299 * by @oh is set to indicate to the PRCM that the IP block is active.
1300 * Usually this means placing the module into smart-idle mode and
1301 * smart-standby, but if there is a bug in the automatic idle handling
1302 * for the IP block, it may need to be placed into the force-idle or
1303 * no-idle variants of these modes. No return value.
63c85238 1304 */
74ff3a68 1305static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1306{
43b40992 1307 u8 idlemode, sf;
63c85238 1308 u32 v;
006c7f18 1309 bool clkdm_act;
f5dd3bb5 1310 struct clockdomain *clkdm;
63c85238 1311
43b40992 1312 if (!oh->class->sysc)
63c85238
PW
1313 return;
1314
1315 v = oh->_sysc_cache;
43b40992 1316 sf = oh->class->sysc->sysc_flags;
63c85238 1317
f5dd3bb5 1318 clkdm = _get_clkdm(oh);
43b40992 1319 if (sf & SYSC_HAS_SIDLEMODE) {
f5dd3bb5 1320 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
006c7f18
PW
1321 if (clkdm_act && !(oh->class->sysc->idlemodes &
1322 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1323 idlemode = HWMOD_IDLEMODE_FORCE;
1324 else
1325 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1326 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1327 _set_slave_idlemode(oh, idlemode, &v);
1328 }
1329
43b40992 1330 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1331 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1332 idlemode = HWMOD_IDLEMODE_NO;
1333 } else {
1334 if (sf & SYSC_HAS_ENAWAKEUP)
1335 _enable_wakeup(oh, &v);
1336 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1337 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1338 else
1339 idlemode = HWMOD_IDLEMODE_SMART;
1340 }
63c85238
PW
1341 _set_master_standbymode(oh, idlemode, &v);
1342 }
1343
a16b1f7f
PW
1344 /*
1345 * XXX The clock framework should handle this, by
1346 * calling into this code. But this must wait until the
1347 * clock structures are tagged with omap_hwmod entries
1348 */
43b40992
PW
1349 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1350 (sf & SYSC_HAS_CLOCKACTIVITY))
1351 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1352
9980ce53
RN
1353 /* If slave is in SMARTIDLE, also enable wakeup */
1354 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1355 _enable_wakeup(oh, &v);
1356
1357 _write_sysconfig(v, oh);
78f26e87
HH
1358
1359 /*
1360 * Set the autoidle bit only after setting the smartidle bit
1361 * Setting this will not have any impact on the other modules.
1362 */
1363 if (sf & SYSC_HAS_AUTOIDLE) {
1364 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1365 0 : 1;
1366 _set_module_autoidle(oh, idlemode, &v);
1367 _write_sysconfig(v, oh);
1368 }
63c85238
PW
1369}
1370
1371/**
74ff3a68 1372 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1373 * @oh: struct omap_hwmod *
1374 *
1375 * If module is marked as SWSUP_SIDLE, force the module into slave
1376 * idle; otherwise, configure it for smart-idle. If module is marked
1377 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1378 * configure it for smart-standby. No return value.
1379 */
74ff3a68 1380static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1381{
43b40992 1382 u8 idlemode, sf;
63c85238
PW
1383 u32 v;
1384
43b40992 1385 if (!oh->class->sysc)
63c85238
PW
1386 return;
1387
1388 v = oh->_sysc_cache;
43b40992 1389 sf = oh->class->sysc->sysc_flags;
63c85238 1390
43b40992 1391 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1392 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1393 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1394 !(oh->class->sysc->idlemodes &
1395 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1396 idlemode = HWMOD_IDLEMODE_FORCE;
1397 else
1398 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1399 _set_slave_idlemode(oh, idlemode, &v);
1400 }
1401
43b40992 1402 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1403 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1404 idlemode = HWMOD_IDLEMODE_FORCE;
1405 } else {
1406 if (sf & SYSC_HAS_ENAWAKEUP)
1407 _enable_wakeup(oh, &v);
1408 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1409 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1410 else
1411 idlemode = HWMOD_IDLEMODE_SMART;
1412 }
63c85238
PW
1413 _set_master_standbymode(oh, idlemode, &v);
1414 }
1415
86009eb3
BC
1416 /* If slave is in SMARTIDLE, also enable wakeup */
1417 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1418 _enable_wakeup(oh, &v);
1419
63c85238
PW
1420 _write_sysconfig(v, oh);
1421}
1422
1423/**
74ff3a68 1424 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1425 * @oh: struct omap_hwmod *
1426 *
1427 * Force the module into slave idle and master suspend. No return
1428 * value.
1429 */
74ff3a68 1430static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1431{
1432 u32 v;
43b40992 1433 u8 sf;
63c85238 1434
43b40992 1435 if (!oh->class->sysc)
63c85238
PW
1436 return;
1437
1438 v = oh->_sysc_cache;
43b40992 1439 sf = oh->class->sysc->sysc_flags;
63c85238 1440
43b40992 1441 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1442 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1443
43b40992 1444 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1445 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1446
43b40992 1447 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1448 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1449
1450 _write_sysconfig(v, oh);
1451}
1452
1453/**
1454 * _lookup - find an omap_hwmod by name
1455 * @name: find an omap_hwmod by name
1456 *
1457 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1458 */
1459static struct omap_hwmod *_lookup(const char *name)
1460{
1461 struct omap_hwmod *oh, *temp_oh;
1462
1463 oh = NULL;
1464
1465 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1466 if (!strcmp(name, temp_oh->name)) {
1467 oh = temp_oh;
1468 break;
1469 }
1470 }
1471
1472 return oh;
1473}
868c157d 1474
6ae76997
BC
1475/**
1476 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1477 * @oh: struct omap_hwmod *
1478 *
1479 * Convert a clockdomain name stored in a struct omap_hwmod into a
1480 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1481 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1482 */
1483static int _init_clkdm(struct omap_hwmod *oh)
1484{
3bb05dbf
PW
1485 if (!oh->clkdm_name) {
1486 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
6ae76997 1487 return 0;
3bb05dbf 1488 }
6ae76997 1489
6ae76997
BC
1490 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1491 if (!oh->clkdm) {
1492 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1493 oh->name, oh->clkdm_name);
1494 return -EINVAL;
1495 }
1496
1497 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1498 oh->name, oh->clkdm_name);
1499
1500 return 0;
1501}
63c85238
PW
1502
1503/**
6ae76997
BC
1504 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1505 * well the clockdomain.
63c85238 1506 * @oh: struct omap_hwmod *
97d60162 1507 * @data: not used; pass NULL
63c85238 1508 *
a2debdbd 1509 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1510 * Resolves all clock names embedded in the hwmod. Returns 0 on
1511 * success, or a negative error code on failure.
63c85238 1512 */
97d60162 1513static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1514{
1515 int ret = 0;
1516
48d54f3f
PW
1517 if (oh->_state != _HWMOD_STATE_REGISTERED)
1518 return 0;
63c85238
PW
1519
1520 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1521
1522 ret |= _init_main_clk(oh);
1523 ret |= _init_interface_clks(oh);
1524 ret |= _init_opt_clks(oh);
0a179eaa
KH
1525 if (soc_ops.init_clkdm)
1526 ret |= soc_ops.init_clkdm(oh);
63c85238 1527
f5c1f84b
BC
1528 if (!ret)
1529 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1530 else
1531 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1532
09c35f2f 1533 return ret;
63c85238
PW
1534}
1535
5365efbe 1536/**
cc1226e7 1537 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1538 * @oh: struct omap_hwmod *
1539 * @name: name of the reset line in the context of this hwmod
cc1226e7 1540 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1541 *
1542 * Return the bit position of the reset line that match the
1543 * input name. Return -ENOENT if not found.
1544 */
a032d33b
PW
1545static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1546 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1547{
1548 int i;
1549
1550 for (i = 0; i < oh->rst_lines_cnt; i++) {
1551 const char *rst_line = oh->rst_lines[i].name;
1552 if (!strcmp(rst_line, name)) {
cc1226e7 1553 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1554 ohri->st_shift = oh->rst_lines[i].st_shift;
1555 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1556 oh->name, __func__, rst_line, ohri->rst_shift,
1557 ohri->st_shift);
5365efbe 1558
cc1226e7 1559 return 0;
5365efbe
BC
1560 }
1561 }
1562
1563 return -ENOENT;
1564}
1565
1566/**
1567 * _assert_hardreset - assert the HW reset line of submodules
1568 * contained in the hwmod module.
1569 * @oh: struct omap_hwmod *
1570 * @name: name of the reset line to lookup and assert
1571 *
b8249cf2
KH
1572 * Some IP like dsp, ipu or iva contain processor that require an HW
1573 * reset line to be assert / deassert in order to enable fully the IP.
1574 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1575 * asserting the hardreset line on the currently-booted SoC, or passes
1576 * along the return value from _lookup_hardreset() or the SoC's
1577 * assert_hardreset code.
5365efbe
BC
1578 */
1579static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1580{
cc1226e7 1581 struct omap_hwmod_rst_info ohri;
a032d33b 1582 int ret = -EINVAL;
5365efbe
BC
1583
1584 if (!oh)
1585 return -EINVAL;
1586
b8249cf2
KH
1587 if (!soc_ops.assert_hardreset)
1588 return -ENOSYS;
1589
cc1226e7 1590 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1591 if (ret < 0)
cc1226e7 1592 return ret;
5365efbe 1593
b8249cf2
KH
1594 ret = soc_ops.assert_hardreset(oh, &ohri);
1595
1596 return ret;
5365efbe
BC
1597}
1598
1599/**
1600 * _deassert_hardreset - deassert the HW reset line of submodules contained
1601 * in the hwmod module.
1602 * @oh: struct omap_hwmod *
1603 * @name: name of the reset line to look up and deassert
1604 *
b8249cf2
KH
1605 * Some IP like dsp, ipu or iva contain processor that require an HW
1606 * reset line to be assert / deassert in order to enable fully the IP.
1607 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1608 * deasserting the hardreset line on the currently-booted SoC, or passes
1609 * along the return value from _lookup_hardreset() or the SoC's
1610 * deassert_hardreset code.
5365efbe
BC
1611 */
1612static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1613{
cc1226e7 1614 struct omap_hwmod_rst_info ohri;
b8249cf2 1615 int ret = -EINVAL;
e8e96dff 1616 int hwsup = 0;
5365efbe
BC
1617
1618 if (!oh)
1619 return -EINVAL;
1620
b8249cf2
KH
1621 if (!soc_ops.deassert_hardreset)
1622 return -ENOSYS;
1623
cc1226e7 1624 ret = _lookup_hardreset(oh, name, &ohri);
1625 if (IS_ERR_VALUE(ret))
1626 return ret;
5365efbe 1627
e8e96dff
ORL
1628 if (oh->clkdm) {
1629 /*
1630 * A clockdomain must be in SW_SUP otherwise reset
1631 * might not be completed. The clockdomain can be set
1632 * in HW_AUTO only when the module become ready.
1633 */
1634 hwsup = clkdm_in_hwsup(oh->clkdm);
1635 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1636 if (ret) {
1637 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1638 oh->name, oh->clkdm->name, ret);
1639 return ret;
1640 }
1641 }
1642
1643 _enable_clocks(oh);
1644 if (soc_ops.enable_module)
1645 soc_ops.enable_module(oh);
1646
b8249cf2 1647 ret = soc_ops.deassert_hardreset(oh, &ohri);
e8e96dff
ORL
1648
1649 if (soc_ops.disable_module)
1650 soc_ops.disable_module(oh);
1651 _disable_clocks(oh);
1652
cc1226e7 1653 if (ret == -EBUSY)
5365efbe
BC
1654 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1655
e8e96dff
ORL
1656 if (!ret) {
1657 /*
1658 * Set the clockdomain to HW_AUTO, assuming that the
1659 * previous state was HW_AUTO.
1660 */
1661 if (oh->clkdm && hwsup)
1662 clkdm_allow_idle(oh->clkdm);
1663 } else {
1664 if (oh->clkdm)
1665 clkdm_hwmod_disable(oh->clkdm, oh);
1666 }
1667
cc1226e7 1668 return ret;
5365efbe
BC
1669}
1670
1671/**
1672 * _read_hardreset - read the HW reset line state of submodules
1673 * contained in the hwmod module
1674 * @oh: struct omap_hwmod *
1675 * @name: name of the reset line to look up and read
1676 *
b8249cf2
KH
1677 * Return the state of the reset line. Returns -EINVAL if @oh is
1678 * null, -ENOSYS if we have no way of reading the hardreset line
1679 * status on the currently-booted SoC, or passes along the return
1680 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1681 * code.
5365efbe
BC
1682 */
1683static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1684{
cc1226e7 1685 struct omap_hwmod_rst_info ohri;
a032d33b 1686 int ret = -EINVAL;
5365efbe
BC
1687
1688 if (!oh)
1689 return -EINVAL;
1690
b8249cf2
KH
1691 if (!soc_ops.is_hardreset_asserted)
1692 return -ENOSYS;
1693
cc1226e7 1694 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1695 if (ret < 0)
cc1226e7 1696 return ret;
5365efbe 1697
b8249cf2 1698 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1699}
1700
747834ab 1701/**
eb05f691 1702 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
747834ab
PW
1703 * @oh: struct omap_hwmod *
1704 *
eb05f691
ORL
1705 * If all hardreset lines associated with @oh are asserted, then return true.
1706 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1707 * associated with @oh are asserted, then return false.
747834ab 1708 * This function is used to avoid executing some parts of the IP block
eb05f691 1709 * enable/disable sequence if its hardreset line is set.
747834ab 1710 */
eb05f691 1711static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
747834ab 1712{
eb05f691 1713 int i, rst_cnt = 0;
747834ab
PW
1714
1715 if (oh->rst_lines_cnt == 0)
1716 return false;
1717
1718 for (i = 0; i < oh->rst_lines_cnt; i++)
1719 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
eb05f691
ORL
1720 rst_cnt++;
1721
1722 if (oh->rst_lines_cnt == rst_cnt)
1723 return true;
747834ab
PW
1724
1725 return false;
1726}
1727
e9332b6e
PW
1728/**
1729 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1730 * hard-reset
1731 * @oh: struct omap_hwmod *
1732 *
1733 * If any hardreset lines associated with @oh are asserted, then
1734 * return true. Otherwise, if no hardreset lines associated with @oh
1735 * are asserted, or if @oh has no hardreset lines, then return false.
1736 * This function is used to avoid executing some parts of the IP block
1737 * enable/disable sequence if any hardreset line is set.
1738 */
1739static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1740{
1741 int rst_cnt = 0;
1742 int i;
1743
1744 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1745 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1746 rst_cnt++;
1747
1748 return (rst_cnt) ? true : false;
1749}
1750
747834ab
PW
1751/**
1752 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1753 * @oh: struct omap_hwmod *
1754 *
1755 * Disable the PRCM module mode related to the hwmod @oh.
1756 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1757 */
1758static int _omap4_disable_module(struct omap_hwmod *oh)
1759{
1760 int v;
1761
747834ab
PW
1762 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1763 return -EINVAL;
1764
eb05f691
ORL
1765 /*
1766 * Since integration code might still be doing something, only
1767 * disable if all lines are under hardreset.
1768 */
e9332b6e 1769 if (_are_any_hardreset_lines_asserted(oh))
eb05f691
ORL
1770 return 0;
1771
747834ab
PW
1772 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1773
1774 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1775 oh->clkdm->cm_inst,
1776 oh->clkdm->clkdm_offs,
1777 oh->prcm.omap4.clkctrl_offs);
1778
747834ab
PW
1779 v = _omap4_wait_target_disable(oh);
1780 if (v)
1781 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1782 oh->name);
1783
1784 return 0;
1785}
1786
1688bf19
VH
1787/**
1788 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1789 * @oh: struct omap_hwmod *
1790 *
1791 * Disable the PRCM module mode related to the hwmod @oh.
1792 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1793 */
1794static int _am33xx_disable_module(struct omap_hwmod *oh)
1795{
1796 int v;
1797
1798 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1799 return -EINVAL;
1800
1801 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1802
e9332b6e
PW
1803 if (_are_any_hardreset_lines_asserted(oh))
1804 return 0;
1805
1688bf19
VH
1806 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1807 oh->prcm.omap4.clkctrl_offs);
1808
1688bf19
VH
1809 v = _am33xx_wait_target_disable(oh);
1810 if (v)
1811 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1812 oh->name);
1813
1814 return 0;
1815}
1816
63c85238 1817/**
bd36179e 1818 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1819 * @oh: struct omap_hwmod *
1820 *
1821 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1822 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1823 * reset this way, -EINVAL if the hwmod is in the wrong state,
1824 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1825 *
1826 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1827 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1828 * use the SYSCONFIG softreset bit to provide the status.
1829 *
bd36179e
PW
1830 * Note that some IP like McBSP do have reset control but don't have
1831 * reset status.
63c85238 1832 */
bd36179e 1833static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1834{
387ca5bf 1835 u32 v, softrst_mask;
6f8b7ff5 1836 int c = 0;
96835af9 1837 int ret = 0;
63c85238 1838
43b40992 1839 if (!oh->class->sysc ||
2cb06814 1840 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1841 return -ENOENT;
63c85238
PW
1842
1843 /* clocks must be on for this operation */
1844 if (oh->_state != _HWMOD_STATE_ENABLED) {
7852ec05
PW
1845 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1846 oh->name);
63c85238
PW
1847 return -EINVAL;
1848 }
1849
96835af9
BC
1850 /* For some modules, all optionnal clocks need to be enabled as well */
1851 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1852 _enable_optional_clocks(oh);
1853
bd36179e 1854 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1855
1856 v = oh->_sysc_cache;
96835af9
BC
1857 ret = _set_softreset(oh, &v);
1858 if (ret)
1859 goto dis_opt_clks;
63c85238
PW
1860 _write_sysconfig(v, oh);
1861
d99de7f5
FGL
1862 if (oh->class->sysc->srst_udelay)
1863 udelay(oh->class->sysc->srst_udelay);
1864
2cb06814 1865 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1866 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1867 oh->class->sysc->syss_offs)
1868 & SYSS_RESETDONE_MASK),
1869 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1870 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1871 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1872 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1873 oh->class->sysc->sysc_offs)
387ca5bf 1874 & softrst_mask),
2cb06814 1875 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1876 }
63c85238 1877
5365efbe 1878 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1879 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1880 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1881 else
5365efbe 1882 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1883
1884 /*
1885 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1886 * _wait_target_ready() or _reset()
1887 */
1888
96835af9
BC
1889 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1890
1891dis_opt_clks:
1892 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1893 _disable_optional_clocks(oh);
1894
1895 return ret;
63c85238
PW
1896}
1897
bd36179e
PW
1898/**
1899 * _reset - reset an omap_hwmod
1900 * @oh: struct omap_hwmod *
1901 *
30e105c0
PW
1902 * Resets an omap_hwmod @oh. If the module has a custom reset
1903 * function pointer defined, then call it to reset the IP block, and
1904 * pass along its return value to the caller. Otherwise, if the IP
1905 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1906 * associated with it, call a function to reset the IP block via that
1907 * method, and pass along the return value to the caller. Finally, if
1908 * the IP block has some hardreset lines associated with it, assert
1909 * all of those, but do _not_ deassert them. (This is because driver
1910 * authors have expressed an apparent requirement to control the
1911 * deassertion of the hardreset lines themselves.)
1912 *
1913 * The default software reset mechanism for most OMAP IP blocks is
1914 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1915 * hwmods cannot be reset via this method. Some are not targets and
1916 * therefore have no OCP header registers to access. Others (like the
1917 * IVA) have idiosyncratic reset sequences. So for these relatively
1918 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
1919 * omap_hwmod_class .reset function pointer.
1920 *
1921 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1922 * does not prevent idling of the system. This is necessary for cases
1923 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1924 * kernel without disabling dma.
1925 *
1926 * Passes along the return value from either _ocp_softreset() or the
1927 * custom reset function - these must return -EINVAL if the hwmod
1928 * cannot be reset this way or if the hwmod is in the wrong state,
1929 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
1930 */
1931static int _reset(struct omap_hwmod *oh)
1932{
30e105c0 1933 int i, r;
bd36179e
PW
1934
1935 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1936
30e105c0
PW
1937 if (oh->class->reset) {
1938 r = oh->class->reset(oh);
1939 } else {
1940 if (oh->rst_lines_cnt > 0) {
1941 for (i = 0; i < oh->rst_lines_cnt; i++)
1942 _assert_hardreset(oh, oh->rst_lines[i].name);
1943 return 0;
1944 } else {
1945 r = _ocp_softreset(oh);
1946 if (r == -ENOENT)
1947 r = 0;
1948 }
1949 }
1950
6668546f
KVA
1951 _set_dmadisable(oh);
1952
9c8b0ec7 1953 /*
30e105c0
PW
1954 * OCP_SYSCONFIG bits need to be reprogrammed after a
1955 * softreset. The _enable() function should be split to avoid
1956 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1957 */
2800852a
RN
1958 if (oh->class->sysc) {
1959 _update_sysc_cache(oh);
1960 _enable_sysc(oh);
1961 }
1962
30e105c0 1963 return r;
bd36179e
PW
1964}
1965
5165882a
VB
1966/**
1967 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1968 *
1969 * Call the appropriate PRM function to clear any logged I/O chain
1970 * wakeups and to reconfigure the chain. This apparently needs to be
1971 * done upon every mux change. Since hwmods can be concurrently
1972 * enabled and idled, hold a spinlock around the I/O chain
1973 * reconfiguration sequence. No return value.
1974 *
1975 * XXX When the PRM code is moved to drivers, this function can be removed,
1976 * as the PRM infrastructure should abstract this.
1977 */
1978static void _reconfigure_io_chain(void)
1979{
1980 unsigned long flags;
1981
1982 spin_lock_irqsave(&io_chain_lock, flags);
1983
1984 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1985 omap3xxx_prm_reconfigure_io_chain();
1986 else if (cpu_is_omap44xx())
1987 omap44xx_prm_reconfigure_io_chain();
1988
1989 spin_unlock_irqrestore(&io_chain_lock, flags);
1990}
1991
63c85238 1992/**
dc6d1cda 1993 * _enable - enable an omap_hwmod
63c85238
PW
1994 * @oh: struct omap_hwmod *
1995 *
1996 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1997 * register target. Returns -EINVAL if the hwmod is in the wrong
1998 * state or passes along the return value of _wait_target_ready().
63c85238 1999 */
dc6d1cda 2000static int _enable(struct omap_hwmod *oh)
63c85238 2001{
747834ab 2002 int r;
665d0013 2003 int hwsup = 0;
63c85238 2004
34617e2a
BC
2005 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2006
aacf0941 2007 /*
64813c3f
PW
2008 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2009 * state at init. Now that someone is really trying to enable
2010 * them, just ensure that the hwmod mux is set.
aacf0941
RN
2011 */
2012 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2013 /*
2014 * If the caller has mux data populated, do the mux'ing
2015 * which wouldn't have been done as part of the _enable()
2016 * done during setup.
2017 */
2018 if (oh->mux)
2019 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2020
2021 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2022 return 0;
2023 }
2024
63c85238
PW
2025 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2026 oh->_state != _HWMOD_STATE_IDLE &&
2027 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
2028 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2029 oh->name);
63c85238
PW
2030 return -EINVAL;
2031 }
2032
31f62866 2033 /*
eb05f691 2034 * If an IP block contains HW reset lines and all of them are
747834ab
PW
2035 * asserted, we let integration code associated with that
2036 * block handle the enable. We've received very little
2037 * information on what those driver authors need, and until
2038 * detailed information is provided and the driver code is
2039 * posted to the public lists, this is probably the best we
2040 * can do.
31f62866 2041 */
eb05f691 2042 if (_are_all_hardreset_lines_asserted(oh))
747834ab 2043 return 0;
63c85238 2044
665d0013
RN
2045 /* Mux pins for device runtime if populated */
2046 if (oh->mux && (!oh->mux->enabled ||
2047 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 2048 oh->mux->pads_dynamic))) {
665d0013 2049 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a
VB
2050 _reconfigure_io_chain();
2051 }
665d0013
RN
2052
2053 _add_initiator_dep(oh, mpu_oh);
34617e2a 2054
665d0013
RN
2055 if (oh->clkdm) {
2056 /*
2057 * A clockdomain must be in SW_SUP before enabling
2058 * completely the module. The clockdomain can be set
2059 * in HW_AUTO only when the module become ready.
2060 */
b71c7217
PW
2061 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2062 !clkdm_missing_idle_reporting(oh->clkdm);
665d0013
RN
2063 r = clkdm_hwmod_enable(oh->clkdm, oh);
2064 if (r) {
2065 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2066 oh->name, oh->clkdm->name, r);
2067 return r;
2068 }
34617e2a 2069 }
665d0013
RN
2070
2071 _enable_clocks(oh);
9ebfd285
KH
2072 if (soc_ops.enable_module)
2073 soc_ops.enable_module(oh);
34617e2a 2074
8f6aa8ee
KH
2075 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2076 -EINVAL;
665d0013
RN
2077 if (!r) {
2078 /*
2079 * Set the clockdomain to HW_AUTO only if the target is ready,
2080 * assuming that the previous state was HW_AUTO
2081 */
2082 if (oh->clkdm && hwsup)
2083 clkdm_allow_idle(oh->clkdm);
2084
2085 oh->_state = _HWMOD_STATE_ENABLED;
2086
2087 /* Access the sysconfig only if the target is ready */
2088 if (oh->class->sysc) {
2089 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2090 _update_sysc_cache(oh);
2091 _enable_sysc(oh);
2092 }
2093 } else {
2577a4a6
PW
2094 if (soc_ops.disable_module)
2095 soc_ops.disable_module(oh);
665d0013
RN
2096 _disable_clocks(oh);
2097 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2098 oh->name, r);
34617e2a 2099
665d0013
RN
2100 if (oh->clkdm)
2101 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
2102 }
2103
63c85238
PW
2104 return r;
2105}
2106
2107/**
dc6d1cda 2108 * _idle - idle an omap_hwmod
63c85238
PW
2109 * @oh: struct omap_hwmod *
2110 *
2111 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
2112 * no further work. Returns -EINVAL if the hwmod is in the wrong
2113 * state or returns 0.
63c85238 2114 */
dc6d1cda 2115static int _idle(struct omap_hwmod *oh)
63c85238 2116{
34617e2a
BC
2117 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2118
63c85238 2119 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2120 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2121 oh->name);
63c85238
PW
2122 return -EINVAL;
2123 }
2124
eb05f691 2125 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2126 return 0;
2127
43b40992 2128 if (oh->class->sysc)
74ff3a68 2129 _idle_sysc(oh);
63c85238 2130 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2131
9ebfd285
KH
2132 if (soc_ops.disable_module)
2133 soc_ops.disable_module(oh);
bfc141e3 2134
45c38252
BC
2135 /*
2136 * The module must be in idle mode before disabling any parents
2137 * clocks. Otherwise, the parent clock might be disabled before
2138 * the module transition is done, and thus will prevent the
2139 * transition to complete properly.
2140 */
2141 _disable_clocks(oh);
665d0013
RN
2142 if (oh->clkdm)
2143 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2144
8d9af88f 2145 /* Mux pins for device idle if populated */
5165882a 2146 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2147 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a
VB
2148 _reconfigure_io_chain();
2149 }
8d9af88f 2150
63c85238
PW
2151 oh->_state = _HWMOD_STATE_IDLE;
2152
2153 return 0;
2154}
2155
9599217a
KVA
2156/**
2157 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2158 * @oh: struct omap_hwmod *
2159 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2160 *
2161 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2162 * local copy. Intended to be used by drivers that require
2163 * direct manipulation of the AUTOIDLE bits.
2164 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2165 * along the return value from _set_module_autoidle().
2166 *
2167 * Any users of this function should be scrutinized carefully.
2168 */
2169int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2170{
2171 u32 v;
2172 int retval = 0;
2173 unsigned long flags;
2174
2175 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2176 return -EINVAL;
2177
2178 spin_lock_irqsave(&oh->_lock, flags);
2179
2180 v = oh->_sysc_cache;
2181
2182 retval = _set_module_autoidle(oh, autoidle, &v);
2183
2184 if (!retval)
2185 _write_sysconfig(v, oh);
2186
2187 spin_unlock_irqrestore(&oh->_lock, flags);
2188
2189 return retval;
2190}
2191
63c85238
PW
2192/**
2193 * _shutdown - shutdown an omap_hwmod
2194 * @oh: struct omap_hwmod *
2195 *
2196 * Shut down an omap_hwmod @oh. This should be called when the driver
2197 * used for the hwmod is removed or unloaded or if the driver is not
2198 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2199 * state or returns 0.
2200 */
2201static int _shutdown(struct omap_hwmod *oh)
2202{
9c8b0ec7 2203 int ret, i;
e4dc8f50
PW
2204 u8 prev_state;
2205
63c85238
PW
2206 if (oh->_state != _HWMOD_STATE_IDLE &&
2207 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2208 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2209 oh->name);
63c85238
PW
2210 return -EINVAL;
2211 }
2212
eb05f691 2213 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2214 return 0;
2215
63c85238
PW
2216 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2217
e4dc8f50
PW
2218 if (oh->class->pre_shutdown) {
2219 prev_state = oh->_state;
2220 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2221 _enable(oh);
e4dc8f50
PW
2222 ret = oh->class->pre_shutdown(oh);
2223 if (ret) {
2224 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2225 _idle(oh);
e4dc8f50
PW
2226 return ret;
2227 }
2228 }
2229
6481c73c
MV
2230 if (oh->class->sysc) {
2231 if (oh->_state == _HWMOD_STATE_IDLE)
2232 _enable(oh);
74ff3a68 2233 _shutdown_sysc(oh);
6481c73c 2234 }
5365efbe 2235
3827f949
BC
2236 /* clocks and deps are already disabled in idle */
2237 if (oh->_state == _HWMOD_STATE_ENABLED) {
2238 _del_initiator_dep(oh, mpu_oh);
2239 /* XXX what about the other system initiators here? dma, dsp */
9ebfd285
KH
2240 if (soc_ops.disable_module)
2241 soc_ops.disable_module(oh);
45c38252 2242 _disable_clocks(oh);
665d0013
RN
2243 if (oh->clkdm)
2244 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2245 }
63c85238
PW
2246 /* XXX Should this code also force-disable the optional clocks? */
2247
9c8b0ec7
PW
2248 for (i = 0; i < oh->rst_lines_cnt; i++)
2249 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2250
8d9af88f
TL
2251 /* Mux pins to safe mode or use populated off mode values */
2252 if (oh->mux)
2253 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2254
2255 oh->_state = _HWMOD_STATE_DISABLED;
2256
2257 return 0;
2258}
2259
381d033a
PW
2260/**
2261 * _init_mpu_rt_base - populate the virtual address for a hwmod
2262 * @oh: struct omap_hwmod * to locate the virtual address
2263 *
2264 * Cache the virtual address used by the MPU to access this IP block's
2265 * registers. This address is needed early so the OCP registers that
2266 * are part of the device's address space can be ioremapped properly.
2267 * No return value.
2268 */
2269static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2270{
c9aafd23
PW
2271 struct omap_hwmod_addr_space *mem;
2272 void __iomem *va_start;
2273
2274 if (!oh)
2275 return;
2276
2221b5cd
PW
2277 _save_mpu_port_index(oh);
2278
381d033a
PW
2279 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2280 return;
2281
c9aafd23
PW
2282 mem = _find_mpu_rt_addr_space(oh);
2283 if (!mem) {
2284 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2285 oh->name);
2286 return;
2287 }
2288
2289 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2290 if (!va_start) {
2291 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2292 return;
2293 }
2294
2295 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2296 oh->name, va_start);
2297
2298 oh->_mpu_rt_va = va_start;
381d033a
PW
2299}
2300
2301/**
2302 * _init - initialize internal data for the hwmod @oh
2303 * @oh: struct omap_hwmod *
2304 * @n: (unused)
2305 *
2306 * Look up the clocks and the address space used by the MPU to access
2307 * registers belonging to the hwmod @oh. @oh must already be
2308 * registered at this point. This is the first of two phases for
2309 * hwmod initialization. Code called here does not touch any hardware
2310 * registers, it simply prepares internal data structures. Returns 0
2311 * upon success or if the hwmod isn't registered, or -EINVAL upon
2312 * failure.
2313 */
2314static int __init _init(struct omap_hwmod *oh, void *data)
2315{
2316 int r;
2317
2318 if (oh->_state != _HWMOD_STATE_REGISTERED)
2319 return 0;
2320
2321 _init_mpu_rt_base(oh, NULL);
2322
2323 r = _init_clocks(oh, NULL);
2324 if (IS_ERR_VALUE(r)) {
2325 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2326 return -EINVAL;
2327 }
2328
2329 oh->_state = _HWMOD_STATE_INITIALIZED;
2330
2331 return 0;
2332}
2333
63c85238 2334/**
64813c3f 2335 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2336 * @oh: struct omap_hwmod *
2337 *
64813c3f
PW
2338 * Set up the module's interface clocks. XXX This function is still mostly
2339 * a stub; implementing this properly requires iclk autoidle usecounting in
2340 * the clock code. No return value.
63c85238 2341 */
64813c3f 2342static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2343{
5d95dde7 2344 struct omap_hwmod_ocp_if *os;
11cd4b94 2345 struct list_head *p;
5d95dde7 2346 int i = 0;
381d033a 2347 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2348 return;
48d54f3f 2349
11cd4b94 2350 p = oh->slave_ports.next;
63c85238 2351
5d95dde7 2352 while (i < oh->slaves_cnt) {
11cd4b94 2353 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2354 if (!os->_clk)
64813c3f 2355 continue;
63c85238 2356
64813c3f
PW
2357 if (os->flags & OCPIF_SWSUP_IDLE) {
2358 /* XXX omap_iclk_deny_idle(c); */
2359 } else {
2360 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2361 clk_enable(os->_clk);
63c85238
PW
2362 }
2363 }
2364
64813c3f
PW
2365 return;
2366}
2367
2368/**
2369 * _setup_reset - reset an IP block during the setup process
2370 * @oh: struct omap_hwmod *
2371 *
2372 * Reset the IP block corresponding to the hwmod @oh during the setup
2373 * process. The IP block is first enabled so it can be successfully
2374 * reset. Returns 0 upon success or a negative error code upon
2375 * failure.
2376 */
2377static int __init _setup_reset(struct omap_hwmod *oh)
2378{
2379 int r;
2380
2381 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2382 return -EINVAL;
63c85238 2383
747834ab
PW
2384 if (oh->rst_lines_cnt == 0) {
2385 r = _enable(oh);
2386 if (r) {
2387 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2388 oh->name, oh->_state);
2389 return -EINVAL;
2390 }
9a23dfe1 2391 }
63c85238 2392
2800852a 2393 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2394 r = _reset(oh);
2395
2396 return r;
2397}
2398
2399/**
2400 * _setup_postsetup - transition to the appropriate state after _setup
2401 * @oh: struct omap_hwmod *
2402 *
2403 * Place an IP block represented by @oh into a "post-setup" state --
2404 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2405 * this function is called at the end of _setup().) The postsetup
2406 * state for an IP block can be changed by calling
2407 * omap_hwmod_enter_postsetup_state() early in the boot process,
2408 * before one of the omap_hwmod_setup*() functions are called for the
2409 * IP block.
2410 *
2411 * The IP block stays in this state until a PM runtime-based driver is
2412 * loaded for that IP block. A post-setup state of IDLE is
2413 * appropriate for almost all IP blocks with runtime PM-enabled
2414 * drivers, since those drivers are able to enable the IP block. A
2415 * post-setup state of ENABLED is appropriate for kernels with PM
2416 * runtime disabled. The DISABLED state is appropriate for unusual IP
2417 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2418 * included, since the WDTIMER starts running on reset and will reset
2419 * the MPU if left active.
2420 *
2421 * This post-setup mechanism is deprecated. Once all of the OMAP
2422 * drivers have been converted to use PM runtime, and all of the IP
2423 * block data and interconnect data is available to the hwmod code, it
2424 * should be possible to replace this mechanism with a "lazy reset"
2425 * arrangement. In a "lazy reset" setup, each IP block is enabled
2426 * when the driver first probes, then all remaining IP blocks without
2427 * drivers are either shut down or enabled after the drivers have
2428 * loaded. However, this cannot take place until the above
2429 * preconditions have been met, since otherwise the late reset code
2430 * has no way of knowing which IP blocks are in use by drivers, and
2431 * which ones are unused.
2432 *
2433 * No return value.
2434 */
2435static void __init _setup_postsetup(struct omap_hwmod *oh)
2436{
2437 u8 postsetup_state;
2438
2439 if (oh->rst_lines_cnt > 0)
2440 return;
76e5589e 2441
2092e5cc
PW
2442 postsetup_state = oh->_postsetup_state;
2443 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2444 postsetup_state = _HWMOD_STATE_ENABLED;
2445
2446 /*
2447 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2448 * it should be set by the core code as a runtime flag during startup
2449 */
2450 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2451 (postsetup_state == _HWMOD_STATE_IDLE)) {
2452 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2453 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2454 }
2092e5cc
PW
2455
2456 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2457 _idle(oh);
2092e5cc
PW
2458 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2459 _shutdown(oh);
2460 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2461 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2462 oh->name, postsetup_state);
63c85238 2463
64813c3f
PW
2464 return;
2465}
2466
2467/**
2468 * _setup - prepare IP block hardware for use
2469 * @oh: struct omap_hwmod *
2470 * @n: (unused, pass NULL)
2471 *
2472 * Configure the IP block represented by @oh. This may include
2473 * enabling the IP block, resetting it, and placing it into a
2474 * post-setup state, depending on the type of IP block and applicable
2475 * flags. IP blocks are reset to prevent any previous configuration
2476 * by the bootloader or previous operating system from interfering
2477 * with power management or other parts of the system. The reset can
2478 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2479 * two phases for hwmod initialization. Code called here generally
2480 * affects the IP block hardware, or system integration hardware
2481 * associated with the IP block. Returns 0.
2482 */
2483static int __init _setup(struct omap_hwmod *oh, void *data)
2484{
2485 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2486 return 0;
2487
2488 _setup_iclk_autoidle(oh);
2489
2490 if (!_setup_reset(oh))
2491 _setup_postsetup(oh);
2492
63c85238
PW
2493 return 0;
2494}
2495
63c85238 2496/**
0102b627 2497 * _register - register a struct omap_hwmod
63c85238
PW
2498 * @oh: struct omap_hwmod *
2499 *
43b40992
PW
2500 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2501 * already has been registered by the same name; -EINVAL if the
2502 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2503 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2504 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2505 * success.
63c85238
PW
2506 *
2507 * XXX The data should be copied into bootmem, so the original data
2508 * should be marked __initdata and freed after init. This would allow
2509 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2510 * that the copy process would be relatively complex due to the large number
2511 * of substructures.
2512 */
01592df9 2513static int __init _register(struct omap_hwmod *oh)
63c85238 2514{
43b40992
PW
2515 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2516 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2517 return -EINVAL;
2518
63c85238
PW
2519 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2520
ce35b244
BC
2521 if (_lookup(oh->name))
2522 return -EEXIST;
63c85238 2523
63c85238
PW
2524 list_add_tail(&oh->node, &omap_hwmod_list);
2525
2221b5cd
PW
2526 INIT_LIST_HEAD(&oh->master_ports);
2527 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2528 spin_lock_init(&oh->_lock);
2092e5cc 2529
63c85238
PW
2530 oh->_state = _HWMOD_STATE_REGISTERED;
2531
569edd70
PW
2532 /*
2533 * XXX Rather than doing a strcmp(), this should test a flag
2534 * set in the hwmod data, inserted by the autogenerator code.
2535 */
2536 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2537 mpu_oh = oh;
63c85238 2538
569edd70 2539 return 0;
63c85238
PW
2540}
2541
2221b5cd
PW
2542/**
2543 * _alloc_links - return allocated memory for hwmod links
2544 * @ml: pointer to a struct omap_hwmod_link * for the master link
2545 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2546 *
2547 * Return pointers to two struct omap_hwmod_link records, via the
2548 * addresses pointed to by @ml and @sl. Will first attempt to return
2549 * memory allocated as part of a large initial block, but if that has
2550 * been exhausted, will allocate memory itself. Since ideally this
2551 * second allocation path will never occur, the number of these
2552 * 'supplemental' allocations will be logged when debugging is
2553 * enabled. Returns 0.
2554 */
2555static int __init _alloc_links(struct omap_hwmod_link **ml,
2556 struct omap_hwmod_link **sl)
2557{
2558 unsigned int sz;
2559
2560 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2561 *ml = &linkspace[free_ls++];
2562 *sl = &linkspace[free_ls++];
2563 return 0;
2564 }
2565
2566 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2567
2568 *sl = NULL;
2569 *ml = alloc_bootmem(sz);
2570
2571 memset(*ml, 0, sz);
2572
2573 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2574
2575 ls_supp++;
2576 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2577 ls_supp * LINKS_PER_OCP_IF);
2578
2579 return 0;
2580};
2581
2582/**
2583 * _add_link - add an interconnect between two IP blocks
2584 * @oi: pointer to a struct omap_hwmod_ocp_if record
2585 *
2586 * Add struct omap_hwmod_link records connecting the master IP block
2587 * specified in @oi->master to @oi, and connecting the slave IP block
2588 * specified in @oi->slave to @oi. This code is assumed to run before
2589 * preemption or SMP has been enabled, thus avoiding the need for
2590 * locking in this code. Changes to this assumption will require
2591 * additional locking. Returns 0.
2592 */
2593static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2594{
2595 struct omap_hwmod_link *ml, *sl;
2596
2597 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2598 oi->slave->name);
2599
2600 _alloc_links(&ml, &sl);
2601
2602 ml->ocp_if = oi;
2603 INIT_LIST_HEAD(&ml->node);
2604 list_add(&ml->node, &oi->master->master_ports);
2605 oi->master->masters_cnt++;
2606
2607 sl->ocp_if = oi;
2608 INIT_LIST_HEAD(&sl->node);
2609 list_add(&sl->node, &oi->slave->slave_ports);
2610 oi->slave->slaves_cnt++;
2611
2612 return 0;
2613}
2614
2615/**
2616 * _register_link - register a struct omap_hwmod_ocp_if
2617 * @oi: struct omap_hwmod_ocp_if *
2618 *
2619 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2620 * has already been registered; -EINVAL if @oi is NULL or if the
2621 * record pointed to by @oi is missing required fields; or 0 upon
2622 * success.
2623 *
2624 * XXX The data should be copied into bootmem, so the original data
2625 * should be marked __initdata and freed after init. This would allow
2626 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2627 */
2628static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2629{
2630 if (!oi || !oi->master || !oi->slave || !oi->user)
2631 return -EINVAL;
2632
2633 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2634 return -EEXIST;
2635
2636 pr_debug("omap_hwmod: registering link from %s to %s\n",
2637 oi->master->name, oi->slave->name);
2638
2639 /*
2640 * Register the connected hwmods, if they haven't been
2641 * registered already
2642 */
2643 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2644 _register(oi->master);
2645
2646 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2647 _register(oi->slave);
2648
2649 _add_link(oi);
2650
2651 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2652
2653 return 0;
2654}
2655
2656/**
2657 * _alloc_linkspace - allocate large block of hwmod links
2658 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2659 *
2660 * Allocate a large block of struct omap_hwmod_link records. This
2661 * improves boot time significantly by avoiding the need to allocate
2662 * individual records one by one. If the number of records to
2663 * allocate in the block hasn't been manually specified, this function
2664 * will count the number of struct omap_hwmod_ocp_if records in @ois
2665 * and use that to determine the allocation size. For SoC families
2666 * that require multiple list registrations, such as OMAP3xxx, this
2667 * estimation process isn't optimal, so manual estimation is advised
2668 * in those cases. Returns -EEXIST if the allocation has already occurred
2669 * or 0 upon success.
2670 */
2671static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2672{
2673 unsigned int i = 0;
2674 unsigned int sz;
2675
2676 if (linkspace) {
2677 WARN(1, "linkspace already allocated\n");
2678 return -EEXIST;
2679 }
2680
2681 if (max_ls == 0)
2682 while (ois[i++])
2683 max_ls += LINKS_PER_OCP_IF;
2684
2685 sz = sizeof(struct omap_hwmod_link) * max_ls;
2686
2687 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2688 __func__, sz, max_ls);
2689
2690 linkspace = alloc_bootmem(sz);
2691
2692 memset(linkspace, 0, sz);
2693
2694 return 0;
2695}
0102b627 2696
8f6aa8ee
KH
2697/* Static functions intended only for use in soc_ops field function pointers */
2698
2699/**
ff4ae5d9 2700 * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
8f6aa8ee
KH
2701 * @oh: struct omap_hwmod *
2702 *
2703 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2704 * does not have an IDLEST bit or if the module successfully leaves
2705 * slave idle; otherwise, pass along the return value of the
2706 * appropriate *_cm*_wait_module_ready() function.
2707 */
ff4ae5d9 2708static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
8f6aa8ee
KH
2709{
2710 if (!oh)
2711 return -EINVAL;
2712
2713 if (oh->flags & HWMOD_NO_IDLEST)
2714 return 0;
2715
2716 if (!_find_mpu_rt_port(oh))
2717 return 0;
2718
2719 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2720
ff4ae5d9
PW
2721 return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2722 oh->prcm.omap2.idlest_reg_id,
2723 oh->prcm.omap2.idlest_idle_bit);
2724}
2725
2726/**
2727 * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
2728 * @oh: struct omap_hwmod *
2729 *
2730 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2731 * does not have an IDLEST bit or if the module successfully leaves
2732 * slave idle; otherwise, pass along the return value of the
2733 * appropriate *_cm*_wait_module_ready() function.
2734 */
2735static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
2736{
2737 if (!oh)
2738 return -EINVAL;
2739
2740 if (oh->flags & HWMOD_NO_IDLEST)
2741 return 0;
2742
2743 if (!_find_mpu_rt_port(oh))
2744 return 0;
2745
2746 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2747
2748 return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2749 oh->prcm.omap2.idlest_reg_id,
2750 oh->prcm.omap2.idlest_idle_bit);
8f6aa8ee
KH
2751}
2752
2753/**
2754 * _omap4_wait_target_ready - wait for a module to leave slave idle
2755 * @oh: struct omap_hwmod *
2756 *
2757 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2758 * does not have an IDLEST bit or if the module successfully leaves
2759 * slave idle; otherwise, pass along the return value of the
2760 * appropriate *_cm*_wait_module_ready() function.
2761 */
2762static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2763{
2b026d13 2764 if (!oh)
8f6aa8ee
KH
2765 return -EINVAL;
2766
2b026d13 2767 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
8f6aa8ee
KH
2768 return 0;
2769
2770 if (!_find_mpu_rt_port(oh))
2771 return 0;
2772
2773 /* XXX check module SIDLEMODE, hardreset status */
2774
2775 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2776 oh->clkdm->cm_inst,
2777 oh->clkdm->clkdm_offs,
2778 oh->prcm.omap4.clkctrl_offs);
2779}
2780
1688bf19
VH
2781/**
2782 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2783 * @oh: struct omap_hwmod *
2784 *
2785 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2786 * does not have an IDLEST bit or if the module successfully leaves
2787 * slave idle; otherwise, pass along the return value of the
2788 * appropriate *_cm*_wait_module_ready() function.
2789 */
2790static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2791{
2792 if (!oh || !oh->clkdm)
2793 return -EINVAL;
2794
2795 if (oh->flags & HWMOD_NO_IDLEST)
2796 return 0;
2797
2798 if (!_find_mpu_rt_port(oh))
2799 return 0;
2800
2801 /* XXX check module SIDLEMODE, hardreset status */
2802
2803 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2804 oh->clkdm->clkdm_offs,
2805 oh->prcm.omap4.clkctrl_offs);
2806}
2807
b8249cf2
KH
2808/**
2809 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2810 * @oh: struct omap_hwmod * to assert hardreset
2811 * @ohri: hardreset line data
2812 *
2813 * Call omap2_prm_assert_hardreset() with parameters extracted from
2814 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2815 * use as an soc_ops function pointer. Passes along the return value
2816 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2817 * for removal when the PRM code is moved into drivers/.
2818 */
2819static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2820 struct omap_hwmod_rst_info *ohri)
2821{
2822 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2823 ohri->rst_shift);
2824}
2825
2826/**
2827 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2828 * @oh: struct omap_hwmod * to deassert hardreset
2829 * @ohri: hardreset line data
2830 *
2831 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2832 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2833 * use as an soc_ops function pointer. Passes along the return value
2834 * from omap2_prm_deassert_hardreset(). XXX This function is
2835 * scheduled for removal when the PRM code is moved into drivers/.
2836 */
2837static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2838 struct omap_hwmod_rst_info *ohri)
2839{
2840 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2841 ohri->rst_shift,
2842 ohri->st_shift);
2843}
2844
2845/**
2846 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2847 * @oh: struct omap_hwmod * to test hardreset
2848 * @ohri: hardreset line data
2849 *
2850 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2851 * from the hwmod @oh and the hardreset line data @ohri. Only
2852 * intended for use as an soc_ops function pointer. Passes along the
2853 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2854 * function is scheduled for removal when the PRM code is moved into
2855 * drivers/.
2856 */
2857static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2858 struct omap_hwmod_rst_info *ohri)
2859{
2860 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2861 ohri->st_shift);
2862}
2863
2864/**
2865 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2866 * @oh: struct omap_hwmod * to assert hardreset
2867 * @ohri: hardreset line data
2868 *
2869 * Call omap4_prminst_assert_hardreset() with parameters extracted
2870 * from the hwmod @oh and the hardreset line data @ohri. Only
2871 * intended for use as an soc_ops function pointer. Passes along the
2872 * return value from omap4_prminst_assert_hardreset(). XXX This
2873 * function is scheduled for removal when the PRM code is moved into
2874 * drivers/.
2875 */
2876static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2877 struct omap_hwmod_rst_info *ohri)
b8249cf2 2878{
07b3a139
PW
2879 if (!oh->clkdm)
2880 return -EINVAL;
2881
b8249cf2
KH
2882 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2883 oh->clkdm->pwrdm.ptr->prcm_partition,
2884 oh->clkdm->pwrdm.ptr->prcm_offs,
2885 oh->prcm.omap4.rstctrl_offs);
2886}
2887
2888/**
2889 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2890 * @oh: struct omap_hwmod * to deassert hardreset
2891 * @ohri: hardreset line data
2892 *
2893 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2894 * from the hwmod @oh and the hardreset line data @ohri. Only
2895 * intended for use as an soc_ops function pointer. Passes along the
2896 * return value from omap4_prminst_deassert_hardreset(). XXX This
2897 * function is scheduled for removal when the PRM code is moved into
2898 * drivers/.
2899 */
2900static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2901 struct omap_hwmod_rst_info *ohri)
2902{
07b3a139
PW
2903 if (!oh->clkdm)
2904 return -EINVAL;
2905
b8249cf2
KH
2906 if (ohri->st_shift)
2907 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2908 oh->name, ohri->name);
2909 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2910 oh->clkdm->pwrdm.ptr->prcm_partition,
2911 oh->clkdm->pwrdm.ptr->prcm_offs,
2912 oh->prcm.omap4.rstctrl_offs);
2913}
2914
2915/**
2916 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2917 * @oh: struct omap_hwmod * to test hardreset
2918 * @ohri: hardreset line data
2919 *
2920 * Call omap4_prminst_is_hardreset_asserted() with parameters
2921 * extracted from the hwmod @oh and the hardreset line data @ohri.
2922 * Only intended for use as an soc_ops function pointer. Passes along
2923 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2924 * This function is scheduled for removal when the PRM code is moved
2925 * into drivers/.
2926 */
2927static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2928 struct omap_hwmod_rst_info *ohri)
2929{
07b3a139
PW
2930 if (!oh->clkdm)
2931 return -EINVAL;
2932
b8249cf2
KH
2933 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2934 oh->clkdm->pwrdm.ptr->prcm_partition,
2935 oh->clkdm->pwrdm.ptr->prcm_offs,
2936 oh->prcm.omap4.rstctrl_offs);
2937}
2938
1688bf19
VH
2939/**
2940 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2941 * @oh: struct omap_hwmod * to assert hardreset
2942 * @ohri: hardreset line data
2943 *
2944 * Call am33xx_prminst_assert_hardreset() with parameters extracted
2945 * from the hwmod @oh and the hardreset line data @ohri. Only
2946 * intended for use as an soc_ops function pointer. Passes along the
2947 * return value from am33xx_prminst_assert_hardreset(). XXX This
2948 * function is scheduled for removal when the PRM code is moved into
2949 * drivers/.
2950 */
2951static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
2952 struct omap_hwmod_rst_info *ohri)
2953
2954{
2955 return am33xx_prm_assert_hardreset(ohri->rst_shift,
2956 oh->clkdm->pwrdm.ptr->prcm_offs,
2957 oh->prcm.omap4.rstctrl_offs);
2958}
2959
2960/**
2961 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2962 * @oh: struct omap_hwmod * to deassert hardreset
2963 * @ohri: hardreset line data
2964 *
2965 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2966 * from the hwmod @oh and the hardreset line data @ohri. Only
2967 * intended for use as an soc_ops function pointer. Passes along the
2968 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2969 * function is scheduled for removal when the PRM code is moved into
2970 * drivers/.
2971 */
2972static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2973 struct omap_hwmod_rst_info *ohri)
2974{
2975 if (ohri->st_shift)
2976 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2977 oh->name, ohri->name);
2978
2979 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
2980 oh->clkdm->pwrdm.ptr->prcm_offs,
2981 oh->prcm.omap4.rstctrl_offs,
2982 oh->prcm.omap4.rstst_offs);
2983}
2984
2985/**
2986 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
2987 * @oh: struct omap_hwmod * to test hardreset
2988 * @ohri: hardreset line data
2989 *
2990 * Call am33xx_prminst_is_hardreset_asserted() with parameters
2991 * extracted from the hwmod @oh and the hardreset line data @ohri.
2992 * Only intended for use as an soc_ops function pointer. Passes along
2993 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
2994 * This function is scheduled for removal when the PRM code is moved
2995 * into drivers/.
2996 */
2997static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
2998 struct omap_hwmod_rst_info *ohri)
2999{
3000 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3001 oh->clkdm->pwrdm.ptr->prcm_offs,
3002 oh->prcm.omap4.rstctrl_offs);
3003}
3004
0102b627
BC
3005/* Public functions */
3006
3007u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3008{
3009 if (oh->flags & HWMOD_16BIT_REG)
3010 return __raw_readw(oh->_mpu_rt_va + reg_offs);
3011 else
3012 return __raw_readl(oh->_mpu_rt_va + reg_offs);
3013}
3014
3015void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3016{
3017 if (oh->flags & HWMOD_16BIT_REG)
3018 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
3019 else
3020 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
3021}
3022
6d3c55fd
A
3023/**
3024 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3025 * @oh: struct omap_hwmod *
3026 *
3027 * This is a public function exposed to drivers. Some drivers may need to do
3028 * some settings before and after resetting the device. Those drivers after
3029 * doing the necessary settings could use this function to start a reset by
3030 * setting the SYSCONFIG.SOFTRESET bit.
3031 */
3032int omap_hwmod_softreset(struct omap_hwmod *oh)
3033{
3c55c1ba
PW
3034 u32 v;
3035 int ret;
3036
3037 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
3038 return -EINVAL;
3039
3c55c1ba
PW
3040 v = oh->_sysc_cache;
3041 ret = _set_softreset(oh, &v);
3042 if (ret)
3043 goto error;
3044 _write_sysconfig(v, oh);
3045
3046error:
3047 return ret;
6d3c55fd
A
3048}
3049
0102b627
BC
3050/**
3051 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
3052 * @oh: struct omap_hwmod *
3053 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
3054 *
3055 * Sets the IP block's OCP slave idlemode in hardware, and updates our
3056 * local copy. Intended to be used by drivers that have some erratum
3057 * that requires direct manipulation of the SIDLEMODE bits. Returns
3058 * -EINVAL if @oh is null, or passes along the return value from
3059 * _set_slave_idlemode().
3060 *
3061 * XXX Does this function have any current users? If not, we should
3062 * remove it; it is better to let the rest of the hwmod code handle this.
3063 * Any users of this function should be scrutinized carefully.
3064 */
3065int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3066{
3067 u32 v;
3068 int retval = 0;
3069
3070 if (!oh)
3071 return -EINVAL;
3072
3073 v = oh->_sysc_cache;
3074
3075 retval = _set_slave_idlemode(oh, idlemode, &v);
3076 if (!retval)
3077 _write_sysconfig(v, oh);
3078
3079 return retval;
3080}
3081
63c85238
PW
3082/**
3083 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3084 * @name: name of the omap_hwmod to look up
3085 *
3086 * Given a @name of an omap_hwmod, return a pointer to the registered
3087 * struct omap_hwmod *, or NULL upon error.
3088 */
3089struct omap_hwmod *omap_hwmod_lookup(const char *name)
3090{
3091 struct omap_hwmod *oh;
3092
3093 if (!name)
3094 return NULL;
3095
63c85238 3096 oh = _lookup(name);
63c85238
PW
3097
3098 return oh;
3099}
3100
3101/**
3102 * omap_hwmod_for_each - call function for each registered omap_hwmod
3103 * @fn: pointer to a callback function
97d60162 3104 * @data: void * data to pass to callback function
63c85238
PW
3105 *
3106 * Call @fn for each registered omap_hwmod, passing @data to each
3107 * function. @fn must return 0 for success or any other value for
3108 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3109 * will stop and the non-zero return value will be passed to the
3110 * caller of omap_hwmod_for_each(). @fn is called with
3111 * omap_hwmod_for_each() held.
3112 */
97d60162
PW
3113int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3114 void *data)
63c85238
PW
3115{
3116 struct omap_hwmod *temp_oh;
30ebad9d 3117 int ret = 0;
63c85238
PW
3118
3119 if (!fn)
3120 return -EINVAL;
3121
63c85238 3122 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 3123 ret = (*fn)(temp_oh, data);
63c85238
PW
3124 if (ret)
3125 break;
3126 }
63c85238
PW
3127
3128 return ret;
3129}
3130
2221b5cd
PW
3131/**
3132 * omap_hwmod_register_links - register an array of hwmod links
3133 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3134 *
3135 * Intended to be called early in boot before the clock framework is
3136 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
3137 * listed in @ois that are valid for this chip. Returns -EINVAL if
3138 * omap_hwmod_init() hasn't been called before calling this function,
3139 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3140 * success.
2221b5cd
PW
3141 */
3142int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3143{
3144 int r, i;
3145
9ebfd285
KH
3146 if (!inited)
3147 return -EINVAL;
3148
2221b5cd
PW
3149 if (!ois)
3150 return 0;
3151
2221b5cd
PW
3152 if (!linkspace) {
3153 if (_alloc_linkspace(ois)) {
3154 pr_err("omap_hwmod: could not allocate link space\n");
3155 return -ENOMEM;
3156 }
3157 }
3158
3159 i = 0;
3160 do {
3161 r = _register_link(ois[i]);
3162 WARN(r && r != -EEXIST,
3163 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3164 ois[i]->master->name, ois[i]->slave->name, r);
3165 } while (ois[++i]);
3166
3167 return 0;
3168}
3169
381d033a
PW
3170/**
3171 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3172 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3173 *
3174 * If the hwmod data corresponding to the MPU subsystem IP block
3175 * hasn't been initialized and set up yet, do so now. This must be
3176 * done first since sleep dependencies may be added from other hwmods
3177 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3178 * return value.
63c85238 3179 */
381d033a 3180static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3181{
381d033a
PW
3182 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3183 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3184 __func__, MPU_INITIATOR_NAME);
3185 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3186 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3187}
3188
63c85238 3189/**
a2debdbd
PW
3190 * omap_hwmod_setup_one - set up a single hwmod
3191 * @oh_name: const char * name of the already-registered hwmod to set up
3192 *
381d033a
PW
3193 * Initialize and set up a single hwmod. Intended to be used for a
3194 * small number of early devices, such as the timer IP blocks used for
3195 * the scheduler clock. Must be called after omap2_clk_init().
3196 * Resolves the struct clk names to struct clk pointers for each
3197 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3198 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3199 */
3200int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3201{
3202 struct omap_hwmod *oh;
63c85238 3203
a2debdbd
PW
3204 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3205
a2debdbd
PW
3206 oh = _lookup(oh_name);
3207 if (!oh) {
3208 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3209 return -EINVAL;
3210 }
63c85238 3211
381d033a 3212 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3213
381d033a 3214 _init(oh, NULL);
a2debdbd
PW
3215 _setup(oh, NULL);
3216
63c85238
PW
3217 return 0;
3218}
3219
3220/**
381d033a 3221 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3222 *
381d033a
PW
3223 * Initialize and set up all IP blocks registered with the hwmod code.
3224 * Must be called after omap2_clk_init(). Resolves the struct clk
3225 * names to struct clk pointers for each registered omap_hwmod. Also
3226 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3227 */
550c8092 3228static int __init omap_hwmod_setup_all(void)
63c85238 3229{
381d033a 3230 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3231
381d033a 3232 omap_hwmod_for_each(_init, NULL);
2092e5cc 3233 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3234
3235 return 0;
3236}
550c8092 3237core_initcall(omap_hwmod_setup_all);
63c85238 3238
63c85238
PW
3239/**
3240 * omap_hwmod_enable - enable an omap_hwmod
3241 * @oh: struct omap_hwmod *
3242 *
74ff3a68 3243 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3244 * Returns -EINVAL on error or passes along the return value from _enable().
3245 */
3246int omap_hwmod_enable(struct omap_hwmod *oh)
3247{
3248 int r;
dc6d1cda 3249 unsigned long flags;
63c85238
PW
3250
3251 if (!oh)
3252 return -EINVAL;
3253
dc6d1cda
PW
3254 spin_lock_irqsave(&oh->_lock, flags);
3255 r = _enable(oh);
3256 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3257
3258 return r;
3259}
3260
3261/**
3262 * omap_hwmod_idle - idle an omap_hwmod
3263 * @oh: struct omap_hwmod *
3264 *
74ff3a68 3265 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3266 * Returns -EINVAL on error or passes along the return value from _idle().
3267 */
3268int omap_hwmod_idle(struct omap_hwmod *oh)
3269{
dc6d1cda
PW
3270 unsigned long flags;
3271
63c85238
PW
3272 if (!oh)
3273 return -EINVAL;
3274
dc6d1cda
PW
3275 spin_lock_irqsave(&oh->_lock, flags);
3276 _idle(oh);
3277 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3278
3279 return 0;
3280}
3281
3282/**
3283 * omap_hwmod_shutdown - shutdown an omap_hwmod
3284 * @oh: struct omap_hwmod *
3285 *
74ff3a68 3286 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3287 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3288 * the return value from _shutdown().
3289 */
3290int omap_hwmod_shutdown(struct omap_hwmod *oh)
3291{
dc6d1cda
PW
3292 unsigned long flags;
3293
63c85238
PW
3294 if (!oh)
3295 return -EINVAL;
3296
dc6d1cda 3297 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3298 _shutdown(oh);
dc6d1cda 3299 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3300
3301 return 0;
3302}
3303
3304/**
3305 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3306 * @oh: struct omap_hwmod *oh
3307 *
3308 * Intended to be called by the omap_device code.
3309 */
3310int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3311{
dc6d1cda
PW
3312 unsigned long flags;
3313
3314 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3315 _enable_clocks(oh);
dc6d1cda 3316 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3317
3318 return 0;
3319}
3320
3321/**
3322 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3323 * @oh: struct omap_hwmod *oh
3324 *
3325 * Intended to be called by the omap_device code.
3326 */
3327int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3328{
dc6d1cda
PW
3329 unsigned long flags;
3330
3331 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3332 _disable_clocks(oh);
dc6d1cda 3333 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3334
3335 return 0;
3336}
3337
3338/**
3339 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3340 * @oh: struct omap_hwmod *oh
3341 *
3342 * Intended to be called by drivers and core code when all posted
3343 * writes to a device must complete before continuing further
3344 * execution (for example, after clearing some device IRQSTATUS
3345 * register bits)
3346 *
3347 * XXX what about targets with multiple OCP threads?
3348 */
3349void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3350{
3351 BUG_ON(!oh);
3352
43b40992 3353 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3354 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3355 oh->name);
63c85238
PW
3356 return;
3357 }
3358
3359 /*
3360 * Forces posted writes to complete on the OCP thread handling
3361 * register writes
3362 */
cc7a1d2a 3363 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3364}
3365
3366/**
3367 * omap_hwmod_reset - reset the hwmod
3368 * @oh: struct omap_hwmod *
3369 *
3370 * Under some conditions, a driver may wish to reset the entire device.
3371 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3372 * the return value from _reset().
63c85238
PW
3373 */
3374int omap_hwmod_reset(struct omap_hwmod *oh)
3375{
3376 int r;
dc6d1cda 3377 unsigned long flags;
63c85238 3378
9b579114 3379 if (!oh)
63c85238
PW
3380 return -EINVAL;
3381
dc6d1cda 3382 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3383 r = _reset(oh);
dc6d1cda 3384 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3385
3386 return r;
3387}
3388
5e8370f1
PW
3389/*
3390 * IP block data retrieval functions
3391 */
3392
63c85238
PW
3393/**
3394 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3395 * @oh: struct omap_hwmod *
3396 * @res: pointer to the first element of an array of struct resource to fill
3397 *
3398 * Count the number of struct resource array elements necessary to
3399 * contain omap_hwmod @oh resources. Intended to be called by code
3400 * that registers omap_devices. Intended to be used to determine the
3401 * size of a dynamically-allocated struct resource array, before
3402 * calling omap_hwmod_fill_resources(). Returns the number of struct
3403 * resource array elements needed.
3404 *
3405 * XXX This code is not optimized. It could attempt to merge adjacent
3406 * resource IDs.
3407 *
3408 */
3409int omap_hwmod_count_resources(struct omap_hwmod *oh)
3410{
5d95dde7 3411 struct omap_hwmod_ocp_if *os;
11cd4b94 3412 struct list_head *p;
5d95dde7
PW
3413 int ret;
3414 int i = 0;
63c85238 3415
bc614958 3416 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 3417
11cd4b94 3418 p = oh->slave_ports.next;
2221b5cd 3419
5d95dde7 3420 while (i < oh->slaves_cnt) {
11cd4b94 3421 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
3422 ret += _count_ocp_if_addr_spaces(os);
3423 }
63c85238
PW
3424
3425 return ret;
3426}
3427
3428/**
3429 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3430 * @oh: struct omap_hwmod *
3431 * @res: pointer to the first element of an array of struct resource to fill
3432 *
3433 * Fill the struct resource array @res with resource data from the
3434 * omap_hwmod @oh. Intended to be called by code that registers
3435 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3436 * number of array elements filled.
3437 */
3438int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3439{
5d95dde7 3440 struct omap_hwmod_ocp_if *os;
11cd4b94 3441 struct list_head *p;
5d95dde7 3442 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3443 int r = 0;
3444
3445 /* For each IRQ, DMA, memory area, fill in array.*/
3446
212738a4
PW
3447 mpu_irqs_cnt = _count_mpu_irqs(oh);
3448 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3449 (res + r)->name = (oh->mpu_irqs + i)->name;
3450 (res + r)->start = (oh->mpu_irqs + i)->irq;
3451 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3452 (res + r)->flags = IORESOURCE_IRQ;
3453 r++;
3454 }
3455
bc614958
PW
3456 sdma_reqs_cnt = _count_sdma_reqs(oh);
3457 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3458 (res + r)->name = (oh->sdma_reqs + i)->name;
3459 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3460 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3461 (res + r)->flags = IORESOURCE_DMA;
3462 r++;
3463 }
3464
11cd4b94 3465 p = oh->slave_ports.next;
2221b5cd 3466
5d95dde7
PW
3467 i = 0;
3468 while (i < oh->slaves_cnt) {
11cd4b94 3469 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3470 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3471
78183f3f 3472 for (j = 0; j < addr_cnt; j++) {
cd503802 3473 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3474 (res + r)->start = (os->addr + j)->pa_start;
3475 (res + r)->end = (os->addr + j)->pa_end;
3476 (res + r)->flags = IORESOURCE_MEM;
3477 r++;
3478 }
3479 }
3480
3481 return r;
3482}
3483
b82b04e8
VH
3484/**
3485 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3486 * @oh: struct omap_hwmod *
3487 * @res: pointer to the array of struct resource to fill
3488 *
3489 * Fill the struct resource array @res with dma resource data from the
3490 * omap_hwmod @oh. Intended to be called by code that registers
3491 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3492 * number of array elements filled.
3493 */
3494int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3495{
3496 int i, sdma_reqs_cnt;
3497 int r = 0;
3498
3499 sdma_reqs_cnt = _count_sdma_reqs(oh);
3500 for (i = 0; i < sdma_reqs_cnt; i++) {
3501 (res + r)->name = (oh->sdma_reqs + i)->name;
3502 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3503 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3504 (res + r)->flags = IORESOURCE_DMA;
3505 r++;
3506 }
3507
3508 return r;
3509}
3510
5e8370f1
PW
3511/**
3512 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3513 * @oh: struct omap_hwmod * to operate on
3514 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3515 * @name: pointer to the name of the data to fetch (optional)
3516 * @rsrc: pointer to a struct resource, allocated by the caller
3517 *
3518 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3519 * data for the IP block pointed to by @oh. The data will be filled
3520 * into a struct resource record pointed to by @rsrc. The struct
3521 * resource must be allocated by the caller. When @name is non-null,
3522 * the data associated with the matching entry in the IRQ/SDMA/address
3523 * space hwmod data arrays will be returned. If @name is null, the
3524 * first array entry will be returned. Data order is not meaningful
3525 * in hwmod data, so callers are strongly encouraged to use a non-null
3526 * @name whenever possible to avoid unpredictable effects if hwmod
3527 * data is later added that causes data ordering to change. This
3528 * function is only intended for use by OMAP core code. Device
3529 * drivers should not call this function - the appropriate bus-related
3530 * data accessor functions should be used instead. Returns 0 upon
3531 * success or a negative error code upon error.
3532 */
3533int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3534 const char *name, struct resource *rsrc)
3535{
3536 int r;
3537 unsigned int irq, dma;
3538 u32 pa_start, pa_end;
3539
3540 if (!oh || !rsrc)
3541 return -EINVAL;
3542
3543 if (type == IORESOURCE_IRQ) {
3544 r = _get_mpu_irq_by_name(oh, name, &irq);
3545 if (r)
3546 return r;
3547
3548 rsrc->start = irq;
3549 rsrc->end = irq;
3550 } else if (type == IORESOURCE_DMA) {
3551 r = _get_sdma_req_by_name(oh, name, &dma);
3552 if (r)
3553 return r;
3554
3555 rsrc->start = dma;
3556 rsrc->end = dma;
3557 } else if (type == IORESOURCE_MEM) {
3558 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3559 if (r)
3560 return r;
3561
3562 rsrc->start = pa_start;
3563 rsrc->end = pa_end;
3564 } else {
3565 return -EINVAL;
3566 }
3567
3568 rsrc->flags = type;
3569 rsrc->name = name;
3570
3571 return 0;
3572}
3573
63c85238
PW
3574/**
3575 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3576 * @oh: struct omap_hwmod *
3577 *
3578 * Return the powerdomain pointer associated with the OMAP module
3579 * @oh's main clock. If @oh does not have a main clk, return the
3580 * powerdomain associated with the interface clock associated with the
3581 * module's MPU port. (XXX Perhaps this should use the SDMA port
3582 * instead?) Returns NULL on error, or a struct powerdomain * on
3583 * success.
3584 */
3585struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3586{
3587 struct clk *c;
2d6141ba 3588 struct omap_hwmod_ocp_if *oi;
f5dd3bb5
RN
3589 struct clockdomain *clkdm;
3590#ifdef CONFIG_COMMON_CLK
3591 struct clk_hw_omap *clk;
3592#endif
63c85238
PW
3593
3594 if (!oh)
3595 return NULL;
3596
f5dd3bb5
RN
3597 if (oh->clkdm)
3598 return oh->clkdm->pwrdm.ptr;
3599
63c85238
PW
3600 if (oh->_clk) {
3601 c = oh->_clk;
3602 } else {
2d6141ba
PW
3603 oi = _find_mpu_rt_port(oh);
3604 if (!oi)
63c85238 3605 return NULL;
2d6141ba 3606 c = oi->_clk;
63c85238
PW
3607 }
3608
f5dd3bb5
RN
3609#ifdef CONFIG_COMMON_CLK
3610 clk = to_clk_hw_omap(__clk_get_hw(c));
3611 clkdm = clk->clkdm;
3612#else
3613 clkdm = c->clkdm;
3614#endif
3615 if (!clkdm)
d5647c18
TG
3616 return NULL;
3617
f5dd3bb5 3618 return clkdm->pwrdm.ptr;
63c85238
PW
3619}
3620
db2a60bf
PW
3621/**
3622 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3623 * @oh: struct omap_hwmod *
3624 *
3625 * Returns the virtual address corresponding to the beginning of the
3626 * module's register target, in the address range that is intended to
3627 * be used by the MPU. Returns the virtual address upon success or NULL
3628 * upon error.
3629 */
3630void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3631{
3632 if (!oh)
3633 return NULL;
3634
3635 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3636 return NULL;
3637
3638 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3639 return NULL;
3640
3641 return oh->_mpu_rt_va;
3642}
3643
63c85238
PW
3644/**
3645 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3646 * @oh: struct omap_hwmod *
3647 * @init_oh: struct omap_hwmod * (initiator)
3648 *
3649 * Add a sleep dependency between the initiator @init_oh and @oh.
3650 * Intended to be called by DSP/Bridge code via platform_data for the
3651 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3652 * code needs to add/del initiator dependencies dynamically
3653 * before/after accessing a device. Returns the return value from
3654 * _add_initiator_dep().
3655 *
3656 * XXX Keep a usecount in the clockdomain code
3657 */
3658int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3659 struct omap_hwmod *init_oh)
3660{
3661 return _add_initiator_dep(oh, init_oh);
3662}
3663
3664/*
3665 * XXX what about functions for drivers to save/restore ocp_sysconfig
3666 * for context save/restore operations?
3667 */
3668
3669/**
3670 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3671 * @oh: struct omap_hwmod *
3672 * @init_oh: struct omap_hwmod * (initiator)
3673 *
3674 * Remove a sleep dependency between the initiator @init_oh and @oh.
3675 * Intended to be called by DSP/Bridge code via platform_data for the
3676 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3677 * code needs to add/del initiator dependencies dynamically
3678 * before/after accessing a device. Returns the return value from
3679 * _del_initiator_dep().
3680 *
3681 * XXX Keep a usecount in the clockdomain code
3682 */
3683int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3684 struct omap_hwmod *init_oh)
3685{
3686 return _del_initiator_dep(oh, init_oh);
3687}
3688
63c85238
PW
3689/**
3690 * omap_hwmod_enable_wakeup - allow device to wake up the system
3691 * @oh: struct omap_hwmod *
3692 *
3693 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3694 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3695 * this IP block if it has dynamic mux entries. Eventually this
3696 * should set PRCM wakeup registers to cause the PRCM to receive
3697 * wakeup events from the module. Does not set any wakeup routing
3698 * registers beyond this point - if the module is to wake up any other
3699 * module or subsystem, that must be set separately. Called by
3700 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3701 */
3702int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3703{
dc6d1cda 3704 unsigned long flags;
5a7ddcbd 3705 u32 v;
dc6d1cda 3706
dc6d1cda 3707 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3708
3709 if (oh->class->sysc &&
3710 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3711 v = oh->_sysc_cache;
3712 _enable_wakeup(oh, &v);
3713 _write_sysconfig(v, oh);
3714 }
3715
eceec009 3716 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3717 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3718
3719 return 0;
3720}
3721
3722/**
3723 * omap_hwmod_disable_wakeup - prevent device from waking the system
3724 * @oh: struct omap_hwmod *
3725 *
3726 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3727 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3728 * events for this IP block if it has dynamic mux entries. Eventually
3729 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3730 * wakeup events from the module. Does not set any wakeup routing
3731 * registers beyond this point - if the module is to wake up any other
3732 * module or subsystem, that must be set separately. Called by
3733 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3734 */
3735int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3736{
dc6d1cda 3737 unsigned long flags;
5a7ddcbd 3738 u32 v;
dc6d1cda 3739
dc6d1cda 3740 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3741
3742 if (oh->class->sysc &&
3743 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3744 v = oh->_sysc_cache;
3745 _disable_wakeup(oh, &v);
3746 _write_sysconfig(v, oh);
3747 }
3748
eceec009 3749 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3750 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3751
3752 return 0;
3753}
43b40992 3754
aee48e3c
PW
3755/**
3756 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3757 * contained in the hwmod module.
3758 * @oh: struct omap_hwmod *
3759 * @name: name of the reset line to lookup and assert
3760 *
3761 * Some IP like dsp, ipu or iva contain processor that require
3762 * an HW reset line to be assert / deassert in order to enable fully
3763 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3764 * yet supported on this OMAP; otherwise, passes along the return value
3765 * from _assert_hardreset().
3766 */
3767int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3768{
3769 int ret;
dc6d1cda 3770 unsigned long flags;
aee48e3c
PW
3771
3772 if (!oh)
3773 return -EINVAL;
3774
dc6d1cda 3775 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3776 ret = _assert_hardreset(oh, name);
dc6d1cda 3777 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3778
3779 return ret;
3780}
3781
3782/**
3783 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3784 * contained in the hwmod module.
3785 * @oh: struct omap_hwmod *
3786 * @name: name of the reset line to look up and deassert
3787 *
3788 * Some IP like dsp, ipu or iva contain processor that require
3789 * an HW reset line to be assert / deassert in order to enable fully
3790 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3791 * yet supported on this OMAP; otherwise, passes along the return value
3792 * from _deassert_hardreset().
3793 */
3794int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3795{
3796 int ret;
dc6d1cda 3797 unsigned long flags;
aee48e3c
PW
3798
3799 if (!oh)
3800 return -EINVAL;
3801
dc6d1cda 3802 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3803 ret = _deassert_hardreset(oh, name);
dc6d1cda 3804 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3805
3806 return ret;
3807}
3808
3809/**
3810 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3811 * contained in the hwmod module
3812 * @oh: struct omap_hwmod *
3813 * @name: name of the reset line to look up and read
3814 *
3815 * Return the current state of the hwmod @oh's reset line named @name:
3816 * returns -EINVAL upon parameter error or if this operation
3817 * is unsupported on the current OMAP; otherwise, passes along the return
3818 * value from _read_hardreset().
3819 */
3820int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3821{
3822 int ret;
dc6d1cda 3823 unsigned long flags;
aee48e3c
PW
3824
3825 if (!oh)
3826 return -EINVAL;
3827
dc6d1cda 3828 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3829 ret = _read_hardreset(oh, name);
dc6d1cda 3830 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3831
3832 return ret;
3833}
3834
3835
43b40992
PW
3836/**
3837 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3838 * @classname: struct omap_hwmod_class name to search for
3839 * @fn: callback function pointer to call for each hwmod in class @classname
3840 * @user: arbitrary context data to pass to the callback function
3841 *
ce35b244
BC
3842 * For each omap_hwmod of class @classname, call @fn.
3843 * If the callback function returns something other than
43b40992
PW
3844 * zero, the iterator is terminated, and the callback function's return
3845 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3846 * if @classname or @fn are NULL, or passes back the error code from @fn.
3847 */
3848int omap_hwmod_for_each_by_class(const char *classname,
3849 int (*fn)(struct omap_hwmod *oh,
3850 void *user),
3851 void *user)
3852{
3853 struct omap_hwmod *temp_oh;
3854 int ret = 0;
3855
3856 if (!classname || !fn)
3857 return -EINVAL;
3858
3859 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3860 __func__, classname);
3861
43b40992
PW
3862 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3863 if (!strcmp(temp_oh->class->name, classname)) {
3864 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3865 __func__, temp_oh->name);
3866 ret = (*fn)(temp_oh, user);
3867 if (ret)
3868 break;
3869 }
3870 }
3871
43b40992
PW
3872 if (ret)
3873 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3874 __func__, ret);
3875
3876 return ret;
3877}
3878
2092e5cc
PW
3879/**
3880 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3881 * @oh: struct omap_hwmod *
3882 * @state: state that _setup() should leave the hwmod in
3883 *
550c8092 3884 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3885 * (called by omap_hwmod_setup_*()). See also the documentation
3886 * for _setup_postsetup(), above. Returns 0 upon success or
3887 * -EINVAL if there is a problem with the arguments or if the hwmod is
3888 * in the wrong state.
2092e5cc
PW
3889 */
3890int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3891{
3892 int ret;
dc6d1cda 3893 unsigned long flags;
2092e5cc
PW
3894
3895 if (!oh)
3896 return -EINVAL;
3897
3898 if (state != _HWMOD_STATE_DISABLED &&
3899 state != _HWMOD_STATE_ENABLED &&
3900 state != _HWMOD_STATE_IDLE)
3901 return -EINVAL;
3902
dc6d1cda 3903 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3904
3905 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3906 ret = -EINVAL;
3907 goto ohsps_unlock;
3908 }
3909
3910 oh->_postsetup_state = state;
3911 ret = 0;
3912
3913ohsps_unlock:
dc6d1cda 3914 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3915
3916 return ret;
3917}
c80705aa
KH
3918
3919/**
3920 * omap_hwmod_get_context_loss_count - get lost context count
3921 * @oh: struct omap_hwmod *
3922 *
3923 * Query the powerdomain of of @oh to get the context loss
3924 * count for this device.
3925 *
3926 * Returns the context loss count of the powerdomain assocated with @oh
3927 * upon success, or zero if no powerdomain exists for @oh.
3928 */
fc013873 3929int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3930{
3931 struct powerdomain *pwrdm;
3932 int ret = 0;
3933
3934 pwrdm = omap_hwmod_get_pwrdm(oh);
3935 if (pwrdm)
3936 ret = pwrdm_get_context_loss_count(pwrdm);
3937
3938 return ret;
3939}
43b01643
PW
3940
3941/**
3942 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3943 * @oh: struct omap_hwmod *
3944 *
3945 * Prevent the hwmod @oh from being reset during the setup process.
3946 * Intended for use by board-*.c files on boards with devices that
3947 * cannot tolerate being reset. Must be called before the hwmod has
3948 * been set up. Returns 0 upon success or negative error code upon
3949 * failure.
3950 */
3951int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3952{
3953 if (!oh)
3954 return -EINVAL;
3955
3956 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3957 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3958 oh->name);
3959 return -EINVAL;
3960 }
3961
3962 oh->flags |= HWMOD_INIT_NO_RESET;
3963
3964 return 0;
3965}
abc2d545
TK
3966
3967/**
3968 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3969 * @oh: struct omap_hwmod * containing hwmod mux entries
3970 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3971 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3972 *
3973 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3974 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3975 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3976 * this function is not called for a given pad_idx, then the ISR
3977 * associated with @oh's first MPU IRQ will be triggered when an I/O
3978 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3979 * the _dynamic or wakeup_ entry: if there are other entries not
3980 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3981 * entries are NOT COUNTED in the dynamic pad index. This function
3982 * must be called separately for each pad that requires its interrupt
3983 * to be re-routed this way. Returns -EINVAL if there is an argument
3984 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3985 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3986 *
3987 * XXX This function interface is fragile. Rather than using array
3988 * indexes, which are subject to unpredictable change, it should be
3989 * using hwmod IRQ names, and some other stable key for the hwmod mux
3990 * pad records.
3991 */
3992int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3993{
3994 int nr_irqs;
3995
3996 might_sleep();
3997
3998 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3999 pad_idx >= oh->mux->nr_pads_dynamic)
4000 return -EINVAL;
4001
4002 /* Check the number of available mpu_irqs */
4003 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4004 ;
4005
4006 if (irq_idx >= nr_irqs)
4007 return -EINVAL;
4008
4009 if (!oh->mux->irqs) {
4010 /* XXX What frees this? */
4011 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4012 GFP_KERNEL);
4013 if (!oh->mux->irqs)
4014 return -ENOMEM;
4015 }
4016 oh->mux->irqs[pad_idx] = irq_idx;
4017
4018 return 0;
4019}
9ebfd285
KH
4020
4021/**
4022 * omap_hwmod_init - initialize the hwmod code
4023 *
4024 * Sets up some function pointers needed by the hwmod code to operate on the
4025 * currently-booted SoC. Intended to be called once during kernel init
4026 * before any hwmods are registered. No return value.
4027 */
4028void __init omap_hwmod_init(void)
4029{
ff4ae5d9
PW
4030 if (cpu_is_omap24xx()) {
4031 soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
4032 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4033 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4034 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4035 } else if (cpu_is_omap34xx()) {
4036 soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
b8249cf2
KH
4037 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4038 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4039 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
05e152c7 4040 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
9ebfd285
KH
4041 soc_ops.enable_module = _omap4_enable_module;
4042 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 4043 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
4044 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4045 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4046 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 4047 soc_ops.init_clkdm = _init_clkdm;
1688bf19
VH
4048 } else if (soc_is_am33xx()) {
4049 soc_ops.enable_module = _am33xx_enable_module;
4050 soc_ops.disable_module = _am33xx_disable_module;
4051 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4052 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4053 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4054 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4055 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
4056 } else {
4057 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
4058 }
4059
4060 inited = true;
4061}
68c9a95e
TL
4062
4063/**
4064 * omap_hwmod_get_main_clk - get pointer to main clock name
4065 * @oh: struct omap_hwmod *
4066 *
4067 * Returns the main clock name assocated with @oh upon success,
4068 * or NULL if @oh is NULL.
4069 */
4070const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4071{
4072 if (!oh)
4073 return NULL;
4074
4075 return oh->main_clk;
4076}