ARM: OMAP2+: hwmod: get rid of all omap_clk_get_by_name usage
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
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142#include <plat/clock.h>
143#include <plat/omap_hwmod.h>
5365efbe 144#include <plat/prcm.h>
63c85238 145
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146#include "soc.h"
147#include "common.h"
148#include "clockdomain.h"
149#include "powerdomain.h"
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
1688bf19 152#include "cm33xx.h"
59fb659b 153#include "prm2xxx_3xxx.h"
d198b514 154#include "prm44xx.h"
1688bf19 155#include "prm33xx.h"
eaac329d 156#include "prminst44xx.h"
8d9af88f 157#include "mux.h"
5165882a 158#include "pm.h"
63c85238 159
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160/* Maximum microseconds to wait for OMAP module to softreset */
161#define MAX_MODULE_SOFTRESET_WAIT 10000
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162
163/* Name of the OMAP hwmod for the MPU */
5c2c0296 164#define MPU_INITIATOR_NAME "mpu"
63c85238 165
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166/*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170#define LINKS_PER_OCP_IF 2
171
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172/**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 184 int (*wait_target_ready)(struct omap_hwmod *oh);
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185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
0a179eaa 191 int (*init_clkdm)(struct omap_hwmod *oh);
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192};
193
194/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
195static struct omap_hwmod_soc_ops soc_ops;
196
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197/* omap_hwmod_list contains all registered struct omap_hwmods */
198static LIST_HEAD(omap_hwmod_list);
199
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200/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
201static struct omap_hwmod *mpu_oh;
202
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203/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
204static DEFINE_SPINLOCK(io_chain_lock);
205
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206/*
207 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
208 * allocated from - used to reduce the number of small memory
209 * allocations, which has a significant impact on performance
210 */
211static struct omap_hwmod_link *linkspace;
212
213/*
214 * free_ls, max_ls: array indexes into linkspace; representing the
215 * next free struct omap_hwmod_link index, and the maximum number of
216 * struct omap_hwmod_link records allocated (respectively)
217 */
218static unsigned short free_ls, max_ls, ls_supp;
63c85238 219
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220/* inited: set to true once the hwmod code is initialized */
221static bool inited;
222
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223/* Private functions */
224
5d95dde7 225/**
11cd4b94 226 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 227 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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228 * @i: pointer to the index of the element pointed to by @p in the list
229 *
230 * Return a pointer to the struct omap_hwmod_ocp_if record
231 * containing the struct list_head pointed to by @p, and increment
232 * @p such that a future call to this routine will return the next
233 * record.
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234 */
235static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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236 int *i)
237{
238 struct omap_hwmod_ocp_if *oi;
239
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240 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
241 *p = (*p)->next;
2221b5cd 242
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243 *i = *i + 1;
244
245 return oi;
246}
247
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248/**
249 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
250 * @oh: struct omap_hwmod *
251 *
252 * Load the current value of the hwmod OCP_SYSCONFIG register into the
253 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
254 * OCP_SYSCONFIG register or 0 upon success.
255 */
256static int _update_sysc_cache(struct omap_hwmod *oh)
257{
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258 if (!oh->class->sysc) {
259 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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260 return -EINVAL;
261 }
262
263 /* XXX ensure module interface clock is up */
264
cc7a1d2a 265 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 266
43b40992 267 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 268 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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269
270 return 0;
271}
272
273/**
274 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
275 * @v: OCP_SYSCONFIG value to write
276 * @oh: struct omap_hwmod *
277 *
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278 * Write @v into the module class' OCP_SYSCONFIG register, if it has
279 * one. No return value.
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280 */
281static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282{
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283 if (!oh->class->sysc) {
284 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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285 return;
286 }
287
288 /* XXX ensure module interface clock is up */
289
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290 /* Module might have lost context, always update cache and register */
291 oh->_sysc_cache = v;
292 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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293}
294
295/**
296 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @standbymode: MIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the master standby mode bits in @v to be @standbymode for
302 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
303 * upon error or 0 upon success.
304 */
305static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
306 u32 *v)
307{
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308 u32 mstandby_mask;
309 u8 mstandby_shift;
310
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311 if (!oh->class->sysc ||
312 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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313 return -EINVAL;
314
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315 if (!oh->class->sysc->sysc_fields) {
316 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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317 return -EINVAL;
318 }
319
43b40992 320 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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321 mstandby_mask = (0x3 << mstandby_shift);
322
323 *v &= ~mstandby_mask;
324 *v |= __ffs(standbymode) << mstandby_shift;
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325
326 return 0;
327}
328
329/**
330 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
331 * @oh: struct omap_hwmod *
332 * @idlemode: SIDLEMODE field bits
333 * @v: pointer to register contents to modify
334 *
335 * Update the slave idle mode bits in @v to be @idlemode for the @oh
336 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
337 * or 0 upon success.
338 */
339static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
340{
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341 u32 sidle_mask;
342 u8 sidle_shift;
343
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344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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346 return -EINVAL;
347
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348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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350 return -EINVAL;
351 }
352
43b40992 353 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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354 sidle_mask = (0x3 << sidle_shift);
355
356 *v &= ~sidle_mask;
357 *v |= __ffs(idlemode) << sidle_shift;
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358
359 return 0;
360}
361
362/**
363 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @clockact: CLOCKACTIVITY field bits
366 * @v: pointer to register contents to modify
367 *
368 * Update the clockactivity mode bits in @v to be @clockact for the
369 * @oh hwmod. Used for additional powersaving on some modules. Does
370 * not write to the hardware. Returns -EINVAL upon error or 0 upon
371 * success.
372 */
373static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
374{
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375 u32 clkact_mask;
376 u8 clkact_shift;
377
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378 if (!oh->class->sysc ||
379 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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380 return -EINVAL;
381
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382 if (!oh->class->sysc->sysc_fields) {
383 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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384 return -EINVAL;
385 }
386
43b40992 387 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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388 clkact_mask = (0x3 << clkact_shift);
389
390 *v &= ~clkact_mask;
391 *v |= clockact << clkact_shift;
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392
393 return 0;
394}
395
396/**
397 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
398 * @oh: struct omap_hwmod *
399 * @v: pointer to register contents to modify
400 *
401 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
402 * error or 0 upon success.
403 */
404static int _set_softreset(struct omap_hwmod *oh, u32 *v)
405{
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TG
406 u32 softrst_mask;
407
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408 if (!oh->class->sysc ||
409 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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410 return -EINVAL;
411
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412 if (!oh->class->sysc->sysc_fields) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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414 return -EINVAL;
415 }
416
43b40992 417 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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418
419 *v |= softrst_mask;
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420
421 return 0;
422}
423
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424/**
425 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426 * @oh: struct omap_hwmod *
427 *
428 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
429 * of some modules. When the DMA must perform read/write accesses, the
430 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
431 * for power management, software must set the DMADISABLE bit back to 1.
432 *
433 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
434 * error or 0 upon success.
435 */
436static int _set_dmadisable(struct omap_hwmod *oh)
437{
438 u32 v;
439 u32 dmadisable_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
447 return -EINVAL;
448 }
449
450 /* clocks must be on for this operation */
451 if (oh->_state != _HWMOD_STATE_ENABLED) {
452 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
453 return -EINVAL;
454 }
455
456 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
457
458 v = oh->_sysc_cache;
459 dmadisable_mask =
460 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
461 v |= dmadisable_mask;
462 _write_sysconfig(v, oh);
463
464 return 0;
465}
466
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467/**
468 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
469 * @oh: struct omap_hwmod *
470 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
471 * @v: pointer to register contents to modify
472 *
473 * Update the module autoidle bit in @v to be @autoidle for the @oh
474 * hwmod. The autoidle bit controls whether the module can gate
475 * internal clocks automatically when it isn't doing anything; the
476 * exact function of this bit varies on a per-module basis. This
477 * function does not write to the hardware. Returns -EINVAL upon
478 * error or 0 upon success.
479 */
480static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
481 u32 *v)
482{
358f0e63
TG
483 u32 autoidle_mask;
484 u8 autoidle_shift;
485
43b40992
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486 if (!oh->class->sysc ||
487 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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488 return -EINVAL;
489
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490 if (!oh->class->sysc->sysc_fields) {
491 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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TG
492 return -EINVAL;
493 }
494
43b40992 495 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 496 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
497
498 *v &= ~autoidle_mask;
499 *v |= autoidle << autoidle_shift;
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500
501 return 0;
502}
503
eceec009
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504/**
505 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
506 * @oh: struct omap_hwmod *
507 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
508 *
509 * Set or clear the I/O pad wakeup flag in the mux entries for the
510 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
511 * in memory. If the hwmod is currently idled, and the new idle
512 * values don't match the previous ones, this function will also
513 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
514 * currently idled, this function won't touch the hardware: the new
515 * mux settings are written to the SCM PADCTRL registers when the
516 * hwmod is idled. No return value.
517 */
518static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
519{
520 struct omap_device_pad *pad;
521 bool change = false;
522 u16 prev_idle;
523 int j;
524
525 if (!oh->mux || !oh->mux->enabled)
526 return;
527
528 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
529 pad = oh->mux->pads_dynamic[j];
530
531 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
532 continue;
533
534 prev_idle = pad->idle;
535
536 if (set_wake)
537 pad->idle |= OMAP_WAKEUP_EN;
538 else
539 pad->idle &= ~OMAP_WAKEUP_EN;
540
541 if (prev_idle != pad->idle)
542 change = true;
543 }
544
545 if (change && oh->_state == _HWMOD_STATE_IDLE)
546 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
547}
548
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549/**
550 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
551 * @oh: struct omap_hwmod *
552 *
553 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
554 * upon error or 0 upon success.
555 */
5a7ddcbd 556static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 557{
43b40992 558 if (!oh->class->sysc ||
86009eb3 559 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
560 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
561 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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562 return -EINVAL;
563
43b40992
PW
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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TG
566 return -EINVAL;
567 }
568
1fe74113
BC
569 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
570 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 571
86009eb3
BC
572 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
573 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
574 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
575 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 576
63c85238
PW
577 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
578
579 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
580
581 return 0;
582}
583
584/**
585 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
586 * @oh: struct omap_hwmod *
587 *
588 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
589 * upon error or 0 upon success.
590 */
5a7ddcbd 591static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 592{
43b40992 593 if (!oh->class->sysc ||
86009eb3 594 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
595 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
596 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
597 return -EINVAL;
598
43b40992
PW
599 if (!oh->class->sysc->sysc_fields) {
600 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
601 return -EINVAL;
602 }
603
1fe74113
BC
604 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
605 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 606
86009eb3
BC
607 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
608 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 609 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 610 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 611
63c85238
PW
612 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
613
614 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
615
616 return 0;
617}
618
619/**
620 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
621 * @oh: struct omap_hwmod *
622 *
623 * Prevent the hardware module @oh from entering idle while the
624 * hardare module initiator @init_oh is active. Useful when a module
625 * will be accessed by a particular initiator (e.g., if a module will
626 * be accessed by the IVA, there should be a sleepdep between the IVA
627 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
628 * mode. If the clockdomain is marked as not needing autodeps, return
629 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
630 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
631 */
632static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
633{
634 if (!oh->_clk)
635 return -EINVAL;
636
570b54c7
PW
637 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
638 return 0;
639
55ed9694 640 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
641}
642
643/**
644 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
645 * @oh: struct omap_hwmod *
646 *
647 * Allow the hardware module @oh to enter idle while the hardare
648 * module initiator @init_oh is active. Useful when a module will not
649 * be accessed by a particular initiator (e.g., if a module will not
650 * be accessed by the IVA, there should be no sleepdep between the IVA
651 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
652 * mode. If the clockdomain is marked as not needing autodeps, return
653 * 0 without doing anything. Returns -EINVAL upon error or passes
654 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
655 */
656static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
657{
658 if (!oh->_clk)
659 return -EINVAL;
660
570b54c7
PW
661 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
662 return 0;
663
55ed9694 664 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
665}
666
667/**
668 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
669 * @oh: struct omap_hwmod *
670 *
671 * Called from _init_clocks(). Populates the @oh _clk (main
672 * functional clock pointer) if a main_clk is present. Returns 0 on
673 * success or -EINVAL on error.
674 */
675static int _init_main_clk(struct omap_hwmod *oh)
676{
63c85238
PW
677 int ret = 0;
678
50ebdac2 679 if (!oh->main_clk)
63c85238
PW
680 return 0;
681
6ea74cb9
RN
682 oh->_clk = clk_get(NULL, oh->main_clk);
683 if (IS_ERR(oh->_clk)) {
20383d82
BC
684 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
685 oh->name, oh->main_clk);
63403384 686 return -EINVAL;
dc75925d 687 }
4d7cb45e
RN
688 /*
689 * HACK: This needs a re-visit once clk_prepare() is implemented
690 * to do something meaningful. Today its just a no-op.
691 * If clk_prepare() is used at some point to do things like
692 * voltage scaling etc, then this would have to be moved to
693 * some point where subsystems like i2c and pmic become
694 * available.
695 */
696 clk_prepare(oh->_clk);
63c85238 697
63403384
BC
698 if (!oh->_clk->clkdm)
699 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
700 oh->main_clk, oh->_clk->name);
81d7c6ff 701
63c85238
PW
702 return ret;
703}
704
705/**
887adeac 706 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
707 * @oh: struct omap_hwmod *
708 *
709 * Called from _init_clocks(). Populates the @oh OCP slave interface
710 * clock pointers. Returns 0 on success or -EINVAL on error.
711 */
712static int _init_interface_clks(struct omap_hwmod *oh)
713{
5d95dde7 714 struct omap_hwmod_ocp_if *os;
11cd4b94 715 struct list_head *p;
63c85238 716 struct clk *c;
5d95dde7 717 int i = 0;
63c85238
PW
718 int ret = 0;
719
11cd4b94 720 p = oh->slave_ports.next;
2221b5cd 721
5d95dde7 722 while (i < oh->slaves_cnt) {
11cd4b94 723 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 724 if (!os->clk)
63c85238
PW
725 continue;
726
6ea74cb9
RN
727 c = clk_get(NULL, os->clk);
728 if (IS_ERR(c)) {
20383d82
BC
729 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
730 oh->name, os->clk);
63c85238 731 ret = -EINVAL;
dc75925d 732 }
63c85238 733 os->_clk = c;
4d7cb45e
RN
734 /*
735 * HACK: This needs a re-visit once clk_prepare() is implemented
736 * to do something meaningful. Today its just a no-op.
737 * If clk_prepare() is used at some point to do things like
738 * voltage scaling etc, then this would have to be moved to
739 * some point where subsystems like i2c and pmic become
740 * available.
741 */
742 clk_prepare(os->_clk);
63c85238
PW
743 }
744
745 return ret;
746}
747
748/**
749 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
750 * @oh: struct omap_hwmod *
751 *
752 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
753 * clock pointers. Returns 0 on success or -EINVAL on error.
754 */
755static int _init_opt_clks(struct omap_hwmod *oh)
756{
757 struct omap_hwmod_opt_clk *oc;
758 struct clk *c;
759 int i;
760 int ret = 0;
761
762 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
6ea74cb9
RN
763 c = clk_get(NULL, oc->clk);
764 if (IS_ERR(c)) {
20383d82
BC
765 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
766 oh->name, oc->clk);
63c85238 767 ret = -EINVAL;
dc75925d 768 }
63c85238 769 oc->_clk = c;
4d7cb45e
RN
770 /*
771 * HACK: This needs a re-visit once clk_prepare() is implemented
772 * to do something meaningful. Today its just a no-op.
773 * If clk_prepare() is used at some point to do things like
774 * voltage scaling etc, then this would have to be moved to
775 * some point where subsystems like i2c and pmic become
776 * available.
777 */
778 clk_prepare(oc->_clk);
63c85238
PW
779 }
780
781 return ret;
782}
783
784/**
785 * _enable_clocks - enable hwmod main clock and interface clocks
786 * @oh: struct omap_hwmod *
787 *
788 * Enables all clocks necessary for register reads and writes to succeed
789 * on the hwmod @oh. Returns 0.
790 */
791static int _enable_clocks(struct omap_hwmod *oh)
792{
5d95dde7 793 struct omap_hwmod_ocp_if *os;
11cd4b94 794 struct list_head *p;
5d95dde7 795 int i = 0;
63c85238
PW
796
797 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
798
4d3ae5a9 799 if (oh->_clk)
63c85238
PW
800 clk_enable(oh->_clk);
801
11cd4b94 802 p = oh->slave_ports.next;
2221b5cd 803
5d95dde7 804 while (i < oh->slaves_cnt) {
11cd4b94 805 os = _fetch_next_ocp_if(&p, &i);
63c85238 806
5d95dde7
PW
807 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
808 clk_enable(os->_clk);
63c85238
PW
809 }
810
811 /* The opt clocks are controlled by the device driver. */
812
813 return 0;
814}
815
816/**
817 * _disable_clocks - disable hwmod main clock and interface clocks
818 * @oh: struct omap_hwmod *
819 *
820 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
821 */
822static int _disable_clocks(struct omap_hwmod *oh)
823{
5d95dde7 824 struct omap_hwmod_ocp_if *os;
11cd4b94 825 struct list_head *p;
5d95dde7 826 int i = 0;
63c85238
PW
827
828 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
829
4d3ae5a9 830 if (oh->_clk)
63c85238
PW
831 clk_disable(oh->_clk);
832
11cd4b94 833 p = oh->slave_ports.next;
2221b5cd 834
5d95dde7 835 while (i < oh->slaves_cnt) {
11cd4b94 836 os = _fetch_next_ocp_if(&p, &i);
63c85238 837
5d95dde7
PW
838 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
839 clk_disable(os->_clk);
63c85238
PW
840 }
841
842 /* The opt clocks are controlled by the device driver. */
843
844 return 0;
845}
846
96835af9
BC
847static void _enable_optional_clocks(struct omap_hwmod *oh)
848{
849 struct omap_hwmod_opt_clk *oc;
850 int i;
851
852 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
853
854 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
855 if (oc->_clk) {
856 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
857 oc->_clk->name);
858 clk_enable(oc->_clk);
859 }
860}
861
862static void _disable_optional_clocks(struct omap_hwmod *oh)
863{
864 struct omap_hwmod_opt_clk *oc;
865 int i;
866
867 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
868
869 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
870 if (oc->_clk) {
871 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
872 oc->_clk->name);
873 clk_disable(oc->_clk);
874 }
875}
876
45c38252 877/**
3d9f0327 878 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
879 * @oh: struct omap_hwmod *
880 *
881 * Enables the PRCM module mode related to the hwmod @oh.
882 * No return value.
883 */
3d9f0327 884static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 885{
45c38252
BC
886 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
887 return;
888
3d9f0327
KH
889 pr_debug("omap_hwmod: %s: %s: %d\n",
890 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
891
892 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
893 oh->clkdm->prcm_partition,
894 oh->clkdm->cm_inst,
895 oh->clkdm->clkdm_offs,
896 oh->prcm.omap4.clkctrl_offs);
897}
898
1688bf19
VH
899/**
900 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
901 * @oh: struct omap_hwmod *
902 *
903 * Enables the PRCM module mode related to the hwmod @oh.
904 * No return value.
905 */
906static void _am33xx_enable_module(struct omap_hwmod *oh)
907{
908 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
909 return;
910
911 pr_debug("omap_hwmod: %s: %s: %d\n",
912 oh->name, __func__, oh->prcm.omap4.modulemode);
913
914 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
915 oh->clkdm->clkdm_offs,
916 oh->prcm.omap4.clkctrl_offs);
917}
918
45c38252 919/**
bfc141e3
BC
920 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
921 * @oh: struct omap_hwmod *
922 *
923 * Wait for a module @oh to enter slave idle. Returns 0 if the module
924 * does not have an IDLEST bit or if the module successfully enters
925 * slave idle; otherwise, pass along the return value of the
926 * appropriate *_cm*_wait_module_idle() function.
927 */
928static int _omap4_wait_target_disable(struct omap_hwmod *oh)
929{
868c157d 930 if (!oh || !oh->clkdm)
bfc141e3
BC
931 return -EINVAL;
932
933 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
934 return 0;
935
936 if (oh->flags & HWMOD_NO_IDLEST)
937 return 0;
938
939 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
940 oh->clkdm->cm_inst,
941 oh->clkdm->clkdm_offs,
942 oh->prcm.omap4.clkctrl_offs);
943}
944
1688bf19
VH
945/**
946 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
947 * @oh: struct omap_hwmod *
948 *
949 * Wait for a module @oh to enter slave idle. Returns 0 if the module
950 * does not have an IDLEST bit or if the module successfully enters
951 * slave idle; otherwise, pass along the return value of the
952 * appropriate *_cm*_wait_module_idle() function.
953 */
954static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
955{
956 if (!oh)
957 return -EINVAL;
958
959 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
960 return 0;
961
962 if (oh->flags & HWMOD_NO_IDLEST)
963 return 0;
964
965 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
966 oh->clkdm->clkdm_offs,
967 oh->prcm.omap4.clkctrl_offs);
968}
969
212738a4
PW
970/**
971 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
972 * @oh: struct omap_hwmod *oh
973 *
974 * Count and return the number of MPU IRQs associated with the hwmod
975 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
976 * NULL.
977 */
978static int _count_mpu_irqs(struct omap_hwmod *oh)
979{
980 struct omap_hwmod_irq_info *ohii;
981 int i = 0;
982
983 if (!oh || !oh->mpu_irqs)
984 return 0;
985
986 do {
987 ohii = &oh->mpu_irqs[i++];
988 } while (ohii->irq != -1);
989
cc1b0765 990 return i-1;
212738a4
PW
991}
992
bc614958
PW
993/**
994 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
995 * @oh: struct omap_hwmod *oh
996 *
997 * Count and return the number of SDMA request lines associated with
998 * the hwmod @oh. Used to allocate struct resource data. Returns 0
999 * if @oh is NULL.
1000 */
1001static int _count_sdma_reqs(struct omap_hwmod *oh)
1002{
1003 struct omap_hwmod_dma_info *ohdi;
1004 int i = 0;
1005
1006 if (!oh || !oh->sdma_reqs)
1007 return 0;
1008
1009 do {
1010 ohdi = &oh->sdma_reqs[i++];
1011 } while (ohdi->dma_req != -1);
1012
cc1b0765 1013 return i-1;
bc614958
PW
1014}
1015
78183f3f
PW
1016/**
1017 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1018 * @oh: struct omap_hwmod *oh
1019 *
1020 * Count and return the number of address space ranges associated with
1021 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1022 * if @oh is NULL.
1023 */
1024static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1025{
1026 struct omap_hwmod_addr_space *mem;
1027 int i = 0;
1028
1029 if (!os || !os->addr)
1030 return 0;
1031
1032 do {
1033 mem = &os->addr[i++];
1034 } while (mem->pa_start != mem->pa_end);
1035
cc1b0765 1036 return i-1;
78183f3f
PW
1037}
1038
5e8370f1
PW
1039/**
1040 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1041 * @oh: struct omap_hwmod * to operate on
1042 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1043 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1044 *
1045 * Retrieve a MPU hardware IRQ line number named by @name associated
1046 * with the IP block pointed to by @oh. The IRQ number will be filled
1047 * into the address pointed to by @dma. When @name is non-null, the
1048 * IRQ line number associated with the named entry will be returned.
1049 * If @name is null, the first matching entry will be returned. Data
1050 * order is not meaningful in hwmod data, so callers are strongly
1051 * encouraged to use a non-null @name whenever possible to avoid
1052 * unpredictable effects if hwmod data is later added that causes data
1053 * ordering to change. Returns 0 upon success or a negative error
1054 * code upon error.
1055 */
1056static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1057 unsigned int *irq)
1058{
1059 int i;
1060 bool found = false;
1061
1062 if (!oh->mpu_irqs)
1063 return -ENOENT;
1064
1065 i = 0;
1066 while (oh->mpu_irqs[i].irq != -1) {
1067 if (name == oh->mpu_irqs[i].name ||
1068 !strcmp(name, oh->mpu_irqs[i].name)) {
1069 found = true;
1070 break;
1071 }
1072 i++;
1073 }
1074
1075 if (!found)
1076 return -ENOENT;
1077
1078 *irq = oh->mpu_irqs[i].irq;
1079
1080 return 0;
1081}
1082
1083/**
1084 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1085 * @oh: struct omap_hwmod * to operate on
1086 * @name: pointer to the name of the SDMA request line to fetch (optional)
1087 * @dma: pointer to an unsigned int to store the request line ID to
1088 *
1089 * Retrieve an SDMA request line ID named by @name on the IP block
1090 * pointed to by @oh. The ID will be filled into the address pointed
1091 * to by @dma. When @name is non-null, the request line ID associated
1092 * with the named entry will be returned. If @name is null, the first
1093 * matching entry will be returned. Data order is not meaningful in
1094 * hwmod data, so callers are strongly encouraged to use a non-null
1095 * @name whenever possible to avoid unpredictable effects if hwmod
1096 * data is later added that causes data ordering to change. Returns 0
1097 * upon success or a negative error code upon error.
1098 */
1099static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1100 unsigned int *dma)
1101{
1102 int i;
1103 bool found = false;
1104
1105 if (!oh->sdma_reqs)
1106 return -ENOENT;
1107
1108 i = 0;
1109 while (oh->sdma_reqs[i].dma_req != -1) {
1110 if (name == oh->sdma_reqs[i].name ||
1111 !strcmp(name, oh->sdma_reqs[i].name)) {
1112 found = true;
1113 break;
1114 }
1115 i++;
1116 }
1117
1118 if (!found)
1119 return -ENOENT;
1120
1121 *dma = oh->sdma_reqs[i].dma_req;
1122
1123 return 0;
1124}
1125
1126/**
1127 * _get_addr_space_by_name - fetch address space start & end by name
1128 * @oh: struct omap_hwmod * to operate on
1129 * @name: pointer to the name of the address space to fetch (optional)
1130 * @pa_start: pointer to a u32 to store the starting address to
1131 * @pa_end: pointer to a u32 to store the ending address to
1132 *
1133 * Retrieve address space start and end addresses for the IP block
1134 * pointed to by @oh. The data will be filled into the addresses
1135 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1136 * address space data associated with the named entry will be
1137 * returned. If @name is null, the first matching entry will be
1138 * returned. Data order is not meaningful in hwmod data, so callers
1139 * are strongly encouraged to use a non-null @name whenever possible
1140 * to avoid unpredictable effects if hwmod data is later added that
1141 * causes data ordering to change. Returns 0 upon success or a
1142 * negative error code upon error.
1143 */
1144static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1145 u32 *pa_start, u32 *pa_end)
1146{
1147 int i, j;
1148 struct omap_hwmod_ocp_if *os;
2221b5cd 1149 struct list_head *p = NULL;
5e8370f1
PW
1150 bool found = false;
1151
11cd4b94 1152 p = oh->slave_ports.next;
2221b5cd 1153
5d95dde7
PW
1154 i = 0;
1155 while (i < oh->slaves_cnt) {
11cd4b94 1156 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1157
1158 if (!os->addr)
1159 return -ENOENT;
1160
1161 j = 0;
1162 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1163 if (name == os->addr[j].name ||
1164 !strcmp(name, os->addr[j].name)) {
1165 found = true;
1166 break;
1167 }
1168 j++;
1169 }
1170
1171 if (found)
1172 break;
1173 }
1174
1175 if (!found)
1176 return -ENOENT;
1177
1178 *pa_start = os->addr[j].pa_start;
1179 *pa_end = os->addr[j].pa_end;
1180
1181 return 0;
1182}
1183
63c85238 1184/**
24dbc213 1185 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1186 * @oh: struct omap_hwmod *
1187 *
24dbc213
PW
1188 * Determines the array index of the OCP slave port that the MPU uses
1189 * to address the device, and saves it into the struct omap_hwmod.
1190 * Intended to be called during hwmod registration only. No return
1191 * value.
63c85238 1192 */
24dbc213 1193static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1194{
24dbc213 1195 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1196 struct list_head *p;
5d95dde7 1197 int i = 0;
63c85238 1198
5d95dde7 1199 if (!oh)
24dbc213
PW
1200 return;
1201
1202 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1203
11cd4b94 1204 p = oh->slave_ports.next;
2221b5cd 1205
5d95dde7 1206 while (i < oh->slaves_cnt) {
11cd4b94 1207 os = _fetch_next_ocp_if(&p, &i);
63c85238 1208 if (os->user & OCP_USER_MPU) {
2221b5cd 1209 oh->_mpu_port = os;
24dbc213 1210 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1211 break;
1212 }
1213 }
1214
24dbc213 1215 return;
63c85238
PW
1216}
1217
2d6141ba
PW
1218/**
1219 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1220 * @oh: struct omap_hwmod *
1221 *
1222 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1223 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1224 * communicate with the IP block. This interface need not be directly
1225 * connected to the MPU (and almost certainly is not), but is directly
1226 * connected to the IP block represented by @oh. Returns a pointer
1227 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1228 * error or if there does not appear to be a path from the MPU to this
1229 * IP block.
1230 */
1231static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1232{
1233 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1234 return NULL;
1235
11cd4b94 1236 return oh->_mpu_port;
2d6141ba
PW
1237};
1238
63c85238 1239/**
c9aafd23 1240 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1241 * @oh: struct omap_hwmod *
1242 *
c9aafd23
PW
1243 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1244 * the register target MPU address space; or returns NULL upon error.
63c85238 1245 */
c9aafd23 1246static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1247{
1248 struct omap_hwmod_ocp_if *os;
1249 struct omap_hwmod_addr_space *mem;
c9aafd23 1250 int found = 0, i = 0;
63c85238 1251
2d6141ba 1252 os = _find_mpu_rt_port(oh);
24dbc213 1253 if (!os || !os->addr)
78183f3f
PW
1254 return NULL;
1255
1256 do {
1257 mem = &os->addr[i++];
1258 if (mem->flags & ADDR_TYPE_RT)
63c85238 1259 found = 1;
78183f3f 1260 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1261
c9aafd23 1262 return (found) ? mem : NULL;
63c85238
PW
1263}
1264
1265/**
74ff3a68 1266 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1267 * @oh: struct omap_hwmod *
1268 *
006c7f18
PW
1269 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1270 * by @oh is set to indicate to the PRCM that the IP block is active.
1271 * Usually this means placing the module into smart-idle mode and
1272 * smart-standby, but if there is a bug in the automatic idle handling
1273 * for the IP block, it may need to be placed into the force-idle or
1274 * no-idle variants of these modes. No return value.
63c85238 1275 */
74ff3a68 1276static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1277{
43b40992 1278 u8 idlemode, sf;
63c85238 1279 u32 v;
006c7f18 1280 bool clkdm_act;
63c85238 1281
43b40992 1282 if (!oh->class->sysc)
63c85238
PW
1283 return;
1284
1285 v = oh->_sysc_cache;
43b40992 1286 sf = oh->class->sysc->sysc_flags;
63c85238 1287
43b40992 1288 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1289 clkdm_act = ((oh->clkdm &&
1290 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1291 (oh->_clk && oh->_clk->clkdm &&
1292 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1293 if (clkdm_act && !(oh->class->sysc->idlemodes &
1294 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1295 idlemode = HWMOD_IDLEMODE_FORCE;
1296 else
1297 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1298 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1299 _set_slave_idlemode(oh, idlemode, &v);
1300 }
1301
43b40992 1302 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1303 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1304 idlemode = HWMOD_IDLEMODE_NO;
1305 } else {
1306 if (sf & SYSC_HAS_ENAWAKEUP)
1307 _enable_wakeup(oh, &v);
1308 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1309 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1310 else
1311 idlemode = HWMOD_IDLEMODE_SMART;
1312 }
63c85238
PW
1313 _set_master_standbymode(oh, idlemode, &v);
1314 }
1315
a16b1f7f
PW
1316 /*
1317 * XXX The clock framework should handle this, by
1318 * calling into this code. But this must wait until the
1319 * clock structures are tagged with omap_hwmod entries
1320 */
43b40992
PW
1321 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1322 (sf & SYSC_HAS_CLOCKACTIVITY))
1323 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1324
9980ce53
RN
1325 /* If slave is in SMARTIDLE, also enable wakeup */
1326 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1327 _enable_wakeup(oh, &v);
1328
1329 _write_sysconfig(v, oh);
78f26e87
HH
1330
1331 /*
1332 * Set the autoidle bit only after setting the smartidle bit
1333 * Setting this will not have any impact on the other modules.
1334 */
1335 if (sf & SYSC_HAS_AUTOIDLE) {
1336 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1337 0 : 1;
1338 _set_module_autoidle(oh, idlemode, &v);
1339 _write_sysconfig(v, oh);
1340 }
63c85238
PW
1341}
1342
1343/**
74ff3a68 1344 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1345 * @oh: struct omap_hwmod *
1346 *
1347 * If module is marked as SWSUP_SIDLE, force the module into slave
1348 * idle; otherwise, configure it for smart-idle. If module is marked
1349 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1350 * configure it for smart-standby. No return value.
1351 */
74ff3a68 1352static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1353{
43b40992 1354 u8 idlemode, sf;
63c85238
PW
1355 u32 v;
1356
43b40992 1357 if (!oh->class->sysc)
63c85238
PW
1358 return;
1359
1360 v = oh->_sysc_cache;
43b40992 1361 sf = oh->class->sysc->sysc_flags;
63c85238 1362
43b40992 1363 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1364 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1365 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1366 !(oh->class->sysc->idlemodes &
1367 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1368 idlemode = HWMOD_IDLEMODE_FORCE;
1369 else
1370 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1371 _set_slave_idlemode(oh, idlemode, &v);
1372 }
1373
43b40992 1374 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1375 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1376 idlemode = HWMOD_IDLEMODE_FORCE;
1377 } else {
1378 if (sf & SYSC_HAS_ENAWAKEUP)
1379 _enable_wakeup(oh, &v);
1380 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1381 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1382 else
1383 idlemode = HWMOD_IDLEMODE_SMART;
1384 }
63c85238
PW
1385 _set_master_standbymode(oh, idlemode, &v);
1386 }
1387
86009eb3
BC
1388 /* If slave is in SMARTIDLE, also enable wakeup */
1389 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1390 _enable_wakeup(oh, &v);
1391
63c85238
PW
1392 _write_sysconfig(v, oh);
1393}
1394
1395/**
74ff3a68 1396 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1397 * @oh: struct omap_hwmod *
1398 *
1399 * Force the module into slave idle and master suspend. No return
1400 * value.
1401 */
74ff3a68 1402static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1403{
1404 u32 v;
43b40992 1405 u8 sf;
63c85238 1406
43b40992 1407 if (!oh->class->sysc)
63c85238
PW
1408 return;
1409
1410 v = oh->_sysc_cache;
43b40992 1411 sf = oh->class->sysc->sysc_flags;
63c85238 1412
43b40992 1413 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1414 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1415
43b40992 1416 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1417 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1418
43b40992 1419 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1420 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1421
1422 _write_sysconfig(v, oh);
1423}
1424
1425/**
1426 * _lookup - find an omap_hwmod by name
1427 * @name: find an omap_hwmod by name
1428 *
1429 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1430 */
1431static struct omap_hwmod *_lookup(const char *name)
1432{
1433 struct omap_hwmod *oh, *temp_oh;
1434
1435 oh = NULL;
1436
1437 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1438 if (!strcmp(name, temp_oh->name)) {
1439 oh = temp_oh;
1440 break;
1441 }
1442 }
1443
1444 return oh;
1445}
868c157d 1446
6ae76997
BC
1447/**
1448 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1449 * @oh: struct omap_hwmod *
1450 *
1451 * Convert a clockdomain name stored in a struct omap_hwmod into a
1452 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1453 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1454 */
1455static int _init_clkdm(struct omap_hwmod *oh)
1456{
868c157d 1457 if (!oh->clkdm_name)
6ae76997
BC
1458 return 0;
1459
6ae76997
BC
1460 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1461 if (!oh->clkdm) {
1462 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1463 oh->name, oh->clkdm_name);
1464 return -EINVAL;
1465 }
1466
1467 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1468 oh->name, oh->clkdm_name);
1469
1470 return 0;
1471}
63c85238
PW
1472
1473/**
6ae76997
BC
1474 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1475 * well the clockdomain.
63c85238 1476 * @oh: struct omap_hwmod *
97d60162 1477 * @data: not used; pass NULL
63c85238 1478 *
a2debdbd 1479 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1480 * Resolves all clock names embedded in the hwmod. Returns 0 on
1481 * success, or a negative error code on failure.
63c85238 1482 */
97d60162 1483static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1484{
1485 int ret = 0;
1486
48d54f3f
PW
1487 if (oh->_state != _HWMOD_STATE_REGISTERED)
1488 return 0;
63c85238
PW
1489
1490 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1491
1492 ret |= _init_main_clk(oh);
1493 ret |= _init_interface_clks(oh);
1494 ret |= _init_opt_clks(oh);
0a179eaa
KH
1495 if (soc_ops.init_clkdm)
1496 ret |= soc_ops.init_clkdm(oh);
63c85238 1497
f5c1f84b
BC
1498 if (!ret)
1499 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1500 else
1501 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1502
09c35f2f 1503 return ret;
63c85238
PW
1504}
1505
5365efbe 1506/**
cc1226e7 1507 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1508 * @oh: struct omap_hwmod *
1509 * @name: name of the reset line in the context of this hwmod
cc1226e7 1510 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1511 *
1512 * Return the bit position of the reset line that match the
1513 * input name. Return -ENOENT if not found.
1514 */
cc1226e7 1515static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1516 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1517{
1518 int i;
1519
1520 for (i = 0; i < oh->rst_lines_cnt; i++) {
1521 const char *rst_line = oh->rst_lines[i].name;
1522 if (!strcmp(rst_line, name)) {
cc1226e7 1523 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1524 ohri->st_shift = oh->rst_lines[i].st_shift;
1525 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1526 oh->name, __func__, rst_line, ohri->rst_shift,
1527 ohri->st_shift);
5365efbe 1528
cc1226e7 1529 return 0;
5365efbe
BC
1530 }
1531 }
1532
1533 return -ENOENT;
1534}
1535
1536/**
1537 * _assert_hardreset - assert the HW reset line of submodules
1538 * contained in the hwmod module.
1539 * @oh: struct omap_hwmod *
1540 * @name: name of the reset line to lookup and assert
1541 *
b8249cf2
KH
1542 * Some IP like dsp, ipu or iva contain processor that require an HW
1543 * reset line to be assert / deassert in order to enable fully the IP.
1544 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1545 * asserting the hardreset line on the currently-booted SoC, or passes
1546 * along the return value from _lookup_hardreset() or the SoC's
1547 * assert_hardreset code.
5365efbe
BC
1548 */
1549static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1550{
cc1226e7 1551 struct omap_hwmod_rst_info ohri;
b8249cf2 1552 u8 ret = -EINVAL;
5365efbe
BC
1553
1554 if (!oh)
1555 return -EINVAL;
1556
b8249cf2
KH
1557 if (!soc_ops.assert_hardreset)
1558 return -ENOSYS;
1559
cc1226e7 1560 ret = _lookup_hardreset(oh, name, &ohri);
1561 if (IS_ERR_VALUE(ret))
1562 return ret;
5365efbe 1563
b8249cf2
KH
1564 ret = soc_ops.assert_hardreset(oh, &ohri);
1565
1566 return ret;
5365efbe
BC
1567}
1568
1569/**
1570 * _deassert_hardreset - deassert the HW reset line of submodules contained
1571 * in the hwmod module.
1572 * @oh: struct omap_hwmod *
1573 * @name: name of the reset line to look up and deassert
1574 *
b8249cf2
KH
1575 * Some IP like dsp, ipu or iva contain processor that require an HW
1576 * reset line to be assert / deassert in order to enable fully the IP.
1577 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1578 * deasserting the hardreset line on the currently-booted SoC, or passes
1579 * along the return value from _lookup_hardreset() or the SoC's
1580 * deassert_hardreset code.
5365efbe
BC
1581 */
1582static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1583{
cc1226e7 1584 struct omap_hwmod_rst_info ohri;
b8249cf2 1585 int ret = -EINVAL;
5365efbe
BC
1586
1587 if (!oh)
1588 return -EINVAL;
1589
b8249cf2
KH
1590 if (!soc_ops.deassert_hardreset)
1591 return -ENOSYS;
1592
cc1226e7 1593 ret = _lookup_hardreset(oh, name, &ohri);
1594 if (IS_ERR_VALUE(ret))
1595 return ret;
5365efbe 1596
b8249cf2 1597 ret = soc_ops.deassert_hardreset(oh, &ohri);
cc1226e7 1598 if (ret == -EBUSY)
5365efbe
BC
1599 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1600
cc1226e7 1601 return ret;
5365efbe
BC
1602}
1603
1604/**
1605 * _read_hardreset - read the HW reset line state of submodules
1606 * contained in the hwmod module
1607 * @oh: struct omap_hwmod *
1608 * @name: name of the reset line to look up and read
1609 *
b8249cf2
KH
1610 * Return the state of the reset line. Returns -EINVAL if @oh is
1611 * null, -ENOSYS if we have no way of reading the hardreset line
1612 * status on the currently-booted SoC, or passes along the return
1613 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1614 * code.
5365efbe
BC
1615 */
1616static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1617{
cc1226e7 1618 struct omap_hwmod_rst_info ohri;
b8249cf2 1619 u8 ret = -EINVAL;
5365efbe
BC
1620
1621 if (!oh)
1622 return -EINVAL;
1623
b8249cf2
KH
1624 if (!soc_ops.is_hardreset_asserted)
1625 return -ENOSYS;
1626
cc1226e7 1627 ret = _lookup_hardreset(oh, name, &ohri);
1628 if (IS_ERR_VALUE(ret))
1629 return ret;
5365efbe 1630
b8249cf2 1631 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1632}
1633
747834ab
PW
1634/**
1635 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1636 * @oh: struct omap_hwmod *
1637 *
1638 * If any hardreset line associated with @oh is asserted, then return true.
1639 * Otherwise, if @oh has no hardreset lines associated with it, or if
1640 * no hardreset lines associated with @oh are asserted, then return false.
1641 * This function is used to avoid executing some parts of the IP block
1642 * enable/disable sequence if a hardreset line is set.
1643 */
1644static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1645{
1646 int i;
1647
1648 if (oh->rst_lines_cnt == 0)
1649 return false;
1650
1651 for (i = 0; i < oh->rst_lines_cnt; i++)
1652 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1653 return true;
1654
1655 return false;
1656}
1657
1658/**
1659 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1660 * @oh: struct omap_hwmod *
1661 *
1662 * Disable the PRCM module mode related to the hwmod @oh.
1663 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1664 */
1665static int _omap4_disable_module(struct omap_hwmod *oh)
1666{
1667 int v;
1668
747834ab
PW
1669 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1670 return -EINVAL;
1671
1672 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1673
1674 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1675 oh->clkdm->cm_inst,
1676 oh->clkdm->clkdm_offs,
1677 oh->prcm.omap4.clkctrl_offs);
1678
1679 if (_are_any_hardreset_lines_asserted(oh))
1680 return 0;
1681
1682 v = _omap4_wait_target_disable(oh);
1683 if (v)
1684 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1685 oh->name);
1686
1687 return 0;
1688}
1689
1688bf19
VH
1690/**
1691 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1692 * @oh: struct omap_hwmod *
1693 *
1694 * Disable the PRCM module mode related to the hwmod @oh.
1695 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1696 */
1697static int _am33xx_disable_module(struct omap_hwmod *oh)
1698{
1699 int v;
1700
1701 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1702 return -EINVAL;
1703
1704 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1705
1706 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1707 oh->prcm.omap4.clkctrl_offs);
1708
1709 if (_are_any_hardreset_lines_asserted(oh))
1710 return 0;
1711
1712 v = _am33xx_wait_target_disable(oh);
1713 if (v)
1714 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1715 oh->name);
1716
1717 return 0;
1718}
1719
63c85238 1720/**
bd36179e 1721 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1722 * @oh: struct omap_hwmod *
1723 *
1724 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1725 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1726 * reset this way, -EINVAL if the hwmod is in the wrong state,
1727 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1728 *
1729 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1730 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1731 * use the SYSCONFIG softreset bit to provide the status.
1732 *
bd36179e
PW
1733 * Note that some IP like McBSP do have reset control but don't have
1734 * reset status.
63c85238 1735 */
bd36179e 1736static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1737{
387ca5bf 1738 u32 v, softrst_mask;
6f8b7ff5 1739 int c = 0;
96835af9 1740 int ret = 0;
63c85238 1741
43b40992 1742 if (!oh->class->sysc ||
2cb06814 1743 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1744 return -ENOENT;
63c85238
PW
1745
1746 /* clocks must be on for this operation */
1747 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1748 pr_warning("omap_hwmod: %s: reset can only be entered from "
1749 "enabled state\n", oh->name);
63c85238
PW
1750 return -EINVAL;
1751 }
1752
96835af9
BC
1753 /* For some modules, all optionnal clocks need to be enabled as well */
1754 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1755 _enable_optional_clocks(oh);
1756
bd36179e 1757 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1758
1759 v = oh->_sysc_cache;
96835af9
BC
1760 ret = _set_softreset(oh, &v);
1761 if (ret)
1762 goto dis_opt_clks;
63c85238
PW
1763 _write_sysconfig(v, oh);
1764
d99de7f5
FGL
1765 if (oh->class->sysc->srst_udelay)
1766 udelay(oh->class->sysc->srst_udelay);
1767
2cb06814 1768 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1769 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1770 oh->class->sysc->syss_offs)
1771 & SYSS_RESETDONE_MASK),
1772 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1773 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1774 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1775 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1776 oh->class->sysc->sysc_offs)
387ca5bf 1777 & softrst_mask),
2cb06814 1778 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1779 }
63c85238 1780
5365efbe 1781 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1782 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1783 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1784 else
5365efbe 1785 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1786
1787 /*
1788 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1789 * _wait_target_ready() or _reset()
1790 */
1791
96835af9
BC
1792 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1793
1794dis_opt_clks:
1795 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1796 _disable_optional_clocks(oh);
1797
1798 return ret;
63c85238
PW
1799}
1800
bd36179e
PW
1801/**
1802 * _reset - reset an omap_hwmod
1803 * @oh: struct omap_hwmod *
1804 *
30e105c0
PW
1805 * Resets an omap_hwmod @oh. If the module has a custom reset
1806 * function pointer defined, then call it to reset the IP block, and
1807 * pass along its return value to the caller. Otherwise, if the IP
1808 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1809 * associated with it, call a function to reset the IP block via that
1810 * method, and pass along the return value to the caller. Finally, if
1811 * the IP block has some hardreset lines associated with it, assert
1812 * all of those, but do _not_ deassert them. (This is because driver
1813 * authors have expressed an apparent requirement to control the
1814 * deassertion of the hardreset lines themselves.)
1815 *
1816 * The default software reset mechanism for most OMAP IP blocks is
1817 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1818 * hwmods cannot be reset via this method. Some are not targets and
1819 * therefore have no OCP header registers to access. Others (like the
1820 * IVA) have idiosyncratic reset sequences. So for these relatively
1821 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
1822 * omap_hwmod_class .reset function pointer.
1823 *
1824 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1825 * does not prevent idling of the system. This is necessary for cases
1826 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1827 * kernel without disabling dma.
1828 *
1829 * Passes along the return value from either _ocp_softreset() or the
1830 * custom reset function - these must return -EINVAL if the hwmod
1831 * cannot be reset this way or if the hwmod is in the wrong state,
1832 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
1833 */
1834static int _reset(struct omap_hwmod *oh)
1835{
30e105c0 1836 int i, r;
bd36179e
PW
1837
1838 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1839
30e105c0
PW
1840 if (oh->class->reset) {
1841 r = oh->class->reset(oh);
1842 } else {
1843 if (oh->rst_lines_cnt > 0) {
1844 for (i = 0; i < oh->rst_lines_cnt; i++)
1845 _assert_hardreset(oh, oh->rst_lines[i].name);
1846 return 0;
1847 } else {
1848 r = _ocp_softreset(oh);
1849 if (r == -ENOENT)
1850 r = 0;
1851 }
1852 }
1853
6668546f
KVA
1854 _set_dmadisable(oh);
1855
9c8b0ec7 1856 /*
30e105c0
PW
1857 * OCP_SYSCONFIG bits need to be reprogrammed after a
1858 * softreset. The _enable() function should be split to avoid
1859 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1860 */
2800852a
RN
1861 if (oh->class->sysc) {
1862 _update_sysc_cache(oh);
1863 _enable_sysc(oh);
1864 }
1865
30e105c0 1866 return r;
bd36179e
PW
1867}
1868
5165882a
VB
1869/**
1870 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1871 *
1872 * Call the appropriate PRM function to clear any logged I/O chain
1873 * wakeups and to reconfigure the chain. This apparently needs to be
1874 * done upon every mux change. Since hwmods can be concurrently
1875 * enabled and idled, hold a spinlock around the I/O chain
1876 * reconfiguration sequence. No return value.
1877 *
1878 * XXX When the PRM code is moved to drivers, this function can be removed,
1879 * as the PRM infrastructure should abstract this.
1880 */
1881static void _reconfigure_io_chain(void)
1882{
1883 unsigned long flags;
1884
1885 spin_lock_irqsave(&io_chain_lock, flags);
1886
1887 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1888 omap3xxx_prm_reconfigure_io_chain();
1889 else if (cpu_is_omap44xx())
1890 omap44xx_prm_reconfigure_io_chain();
1891
1892 spin_unlock_irqrestore(&io_chain_lock, flags);
1893}
1894
63c85238 1895/**
dc6d1cda 1896 * _enable - enable an omap_hwmod
63c85238
PW
1897 * @oh: struct omap_hwmod *
1898 *
1899 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1900 * register target. Returns -EINVAL if the hwmod is in the wrong
1901 * state or passes along the return value of _wait_target_ready().
63c85238 1902 */
dc6d1cda 1903static int _enable(struct omap_hwmod *oh)
63c85238 1904{
747834ab 1905 int r;
665d0013 1906 int hwsup = 0;
63c85238 1907
34617e2a
BC
1908 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1909
aacf0941 1910 /*
64813c3f
PW
1911 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1912 * state at init. Now that someone is really trying to enable
1913 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1914 */
1915 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1916 /*
1917 * If the caller has mux data populated, do the mux'ing
1918 * which wouldn't have been done as part of the _enable()
1919 * done during setup.
1920 */
1921 if (oh->mux)
1922 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1923
1924 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1925 return 0;
1926 }
1927
63c85238
PW
1928 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1929 oh->_state != _HWMOD_STATE_IDLE &&
1930 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1931 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1932 oh->name);
63c85238
PW
1933 return -EINVAL;
1934 }
1935
31f62866 1936 /*
747834ab
PW
1937 * If an IP block contains HW reset lines and any of them are
1938 * asserted, we let integration code associated with that
1939 * block handle the enable. We've received very little
1940 * information on what those driver authors need, and until
1941 * detailed information is provided and the driver code is
1942 * posted to the public lists, this is probably the best we
1943 * can do.
31f62866 1944 */
747834ab
PW
1945 if (_are_any_hardreset_lines_asserted(oh))
1946 return 0;
63c85238 1947
665d0013
RN
1948 /* Mux pins for device runtime if populated */
1949 if (oh->mux && (!oh->mux->enabled ||
1950 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 1951 oh->mux->pads_dynamic))) {
665d0013 1952 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a
VB
1953 _reconfigure_io_chain();
1954 }
665d0013
RN
1955
1956 _add_initiator_dep(oh, mpu_oh);
34617e2a 1957
665d0013
RN
1958 if (oh->clkdm) {
1959 /*
1960 * A clockdomain must be in SW_SUP before enabling
1961 * completely the module. The clockdomain can be set
1962 * in HW_AUTO only when the module become ready.
1963 */
1964 hwsup = clkdm_in_hwsup(oh->clkdm);
1965 r = clkdm_hwmod_enable(oh->clkdm, oh);
1966 if (r) {
1967 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1968 oh->name, oh->clkdm->name, r);
1969 return r;
1970 }
34617e2a 1971 }
665d0013
RN
1972
1973 _enable_clocks(oh);
9ebfd285
KH
1974 if (soc_ops.enable_module)
1975 soc_ops.enable_module(oh);
34617e2a 1976
8f6aa8ee
KH
1977 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1978 -EINVAL;
665d0013
RN
1979 if (!r) {
1980 /*
1981 * Set the clockdomain to HW_AUTO only if the target is ready,
1982 * assuming that the previous state was HW_AUTO
1983 */
1984 if (oh->clkdm && hwsup)
1985 clkdm_allow_idle(oh->clkdm);
1986
1987 oh->_state = _HWMOD_STATE_ENABLED;
1988
1989 /* Access the sysconfig only if the target is ready */
1990 if (oh->class->sysc) {
1991 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1992 _update_sysc_cache(oh);
1993 _enable_sysc(oh);
1994 }
1995 } else {
471a009b 1996 _omap4_disable_module(oh);
665d0013
RN
1997 _disable_clocks(oh);
1998 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1999 oh->name, r);
34617e2a 2000
665d0013
RN
2001 if (oh->clkdm)
2002 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
2003 }
2004
63c85238
PW
2005 return r;
2006}
2007
2008/**
dc6d1cda 2009 * _idle - idle an omap_hwmod
63c85238
PW
2010 * @oh: struct omap_hwmod *
2011 *
2012 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
2013 * no further work. Returns -EINVAL if the hwmod is in the wrong
2014 * state or returns 0.
63c85238 2015 */
dc6d1cda 2016static int _idle(struct omap_hwmod *oh)
63c85238 2017{
34617e2a
BC
2018 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2019
63c85238 2020 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2021 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2022 oh->name);
63c85238
PW
2023 return -EINVAL;
2024 }
2025
747834ab
PW
2026 if (_are_any_hardreset_lines_asserted(oh))
2027 return 0;
2028
43b40992 2029 if (oh->class->sysc)
74ff3a68 2030 _idle_sysc(oh);
63c85238 2031 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2032
9ebfd285
KH
2033 if (soc_ops.disable_module)
2034 soc_ops.disable_module(oh);
bfc141e3 2035
45c38252
BC
2036 /*
2037 * The module must be in idle mode before disabling any parents
2038 * clocks. Otherwise, the parent clock might be disabled before
2039 * the module transition is done, and thus will prevent the
2040 * transition to complete properly.
2041 */
2042 _disable_clocks(oh);
665d0013
RN
2043 if (oh->clkdm)
2044 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2045
8d9af88f 2046 /* Mux pins for device idle if populated */
5165882a 2047 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2048 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a
VB
2049 _reconfigure_io_chain();
2050 }
8d9af88f 2051
63c85238
PW
2052 oh->_state = _HWMOD_STATE_IDLE;
2053
2054 return 0;
2055}
2056
9599217a
KVA
2057/**
2058 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2059 * @oh: struct omap_hwmod *
2060 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2061 *
2062 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2063 * local copy. Intended to be used by drivers that require
2064 * direct manipulation of the AUTOIDLE bits.
2065 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2066 * along the return value from _set_module_autoidle().
2067 *
2068 * Any users of this function should be scrutinized carefully.
2069 */
2070int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2071{
2072 u32 v;
2073 int retval = 0;
2074 unsigned long flags;
2075
2076 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2077 return -EINVAL;
2078
2079 spin_lock_irqsave(&oh->_lock, flags);
2080
2081 v = oh->_sysc_cache;
2082
2083 retval = _set_module_autoidle(oh, autoidle, &v);
2084
2085 if (!retval)
2086 _write_sysconfig(v, oh);
2087
2088 spin_unlock_irqrestore(&oh->_lock, flags);
2089
2090 return retval;
2091}
2092
63c85238
PW
2093/**
2094 * _shutdown - shutdown an omap_hwmod
2095 * @oh: struct omap_hwmod *
2096 *
2097 * Shut down an omap_hwmod @oh. This should be called when the driver
2098 * used for the hwmod is removed or unloaded or if the driver is not
2099 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2100 * state or returns 0.
2101 */
2102static int _shutdown(struct omap_hwmod *oh)
2103{
9c8b0ec7 2104 int ret, i;
e4dc8f50
PW
2105 u8 prev_state;
2106
63c85238
PW
2107 if (oh->_state != _HWMOD_STATE_IDLE &&
2108 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2109 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2110 oh->name);
63c85238
PW
2111 return -EINVAL;
2112 }
2113
747834ab
PW
2114 if (_are_any_hardreset_lines_asserted(oh))
2115 return 0;
2116
63c85238
PW
2117 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2118
e4dc8f50
PW
2119 if (oh->class->pre_shutdown) {
2120 prev_state = oh->_state;
2121 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2122 _enable(oh);
e4dc8f50
PW
2123 ret = oh->class->pre_shutdown(oh);
2124 if (ret) {
2125 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2126 _idle(oh);
e4dc8f50
PW
2127 return ret;
2128 }
2129 }
2130
6481c73c
MV
2131 if (oh->class->sysc) {
2132 if (oh->_state == _HWMOD_STATE_IDLE)
2133 _enable(oh);
74ff3a68 2134 _shutdown_sysc(oh);
6481c73c 2135 }
5365efbe 2136
3827f949
BC
2137 /* clocks and deps are already disabled in idle */
2138 if (oh->_state == _HWMOD_STATE_ENABLED) {
2139 _del_initiator_dep(oh, mpu_oh);
2140 /* XXX what about the other system initiators here? dma, dsp */
9ebfd285
KH
2141 if (soc_ops.disable_module)
2142 soc_ops.disable_module(oh);
45c38252 2143 _disable_clocks(oh);
665d0013
RN
2144 if (oh->clkdm)
2145 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2146 }
63c85238
PW
2147 /* XXX Should this code also force-disable the optional clocks? */
2148
9c8b0ec7
PW
2149 for (i = 0; i < oh->rst_lines_cnt; i++)
2150 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2151
8d9af88f
TL
2152 /* Mux pins to safe mode or use populated off mode values */
2153 if (oh->mux)
2154 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2155
2156 oh->_state = _HWMOD_STATE_DISABLED;
2157
2158 return 0;
2159}
2160
381d033a
PW
2161/**
2162 * _init_mpu_rt_base - populate the virtual address for a hwmod
2163 * @oh: struct omap_hwmod * to locate the virtual address
2164 *
2165 * Cache the virtual address used by the MPU to access this IP block's
2166 * registers. This address is needed early so the OCP registers that
2167 * are part of the device's address space can be ioremapped properly.
2168 * No return value.
2169 */
2170static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2171{
c9aafd23
PW
2172 struct omap_hwmod_addr_space *mem;
2173 void __iomem *va_start;
2174
2175 if (!oh)
2176 return;
2177
2221b5cd
PW
2178 _save_mpu_port_index(oh);
2179
381d033a
PW
2180 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2181 return;
2182
c9aafd23
PW
2183 mem = _find_mpu_rt_addr_space(oh);
2184 if (!mem) {
2185 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2186 oh->name);
2187 return;
2188 }
2189
2190 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2191 if (!va_start) {
2192 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2193 return;
2194 }
2195
2196 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2197 oh->name, va_start);
2198
2199 oh->_mpu_rt_va = va_start;
381d033a
PW
2200}
2201
2202/**
2203 * _init - initialize internal data for the hwmod @oh
2204 * @oh: struct omap_hwmod *
2205 * @n: (unused)
2206 *
2207 * Look up the clocks and the address space used by the MPU to access
2208 * registers belonging to the hwmod @oh. @oh must already be
2209 * registered at this point. This is the first of two phases for
2210 * hwmod initialization. Code called here does not touch any hardware
2211 * registers, it simply prepares internal data structures. Returns 0
2212 * upon success or if the hwmod isn't registered, or -EINVAL upon
2213 * failure.
2214 */
2215static int __init _init(struct omap_hwmod *oh, void *data)
2216{
2217 int r;
2218
2219 if (oh->_state != _HWMOD_STATE_REGISTERED)
2220 return 0;
2221
2222 _init_mpu_rt_base(oh, NULL);
2223
2224 r = _init_clocks(oh, NULL);
2225 if (IS_ERR_VALUE(r)) {
2226 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2227 return -EINVAL;
2228 }
2229
2230 oh->_state = _HWMOD_STATE_INITIALIZED;
2231
2232 return 0;
2233}
2234
63c85238 2235/**
64813c3f 2236 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2237 * @oh: struct omap_hwmod *
2238 *
64813c3f
PW
2239 * Set up the module's interface clocks. XXX This function is still mostly
2240 * a stub; implementing this properly requires iclk autoidle usecounting in
2241 * the clock code. No return value.
63c85238 2242 */
64813c3f 2243static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2244{
5d95dde7 2245 struct omap_hwmod_ocp_if *os;
11cd4b94 2246 struct list_head *p;
5d95dde7 2247 int i = 0;
381d033a 2248 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2249 return;
48d54f3f 2250
11cd4b94 2251 p = oh->slave_ports.next;
63c85238 2252
5d95dde7 2253 while (i < oh->slaves_cnt) {
11cd4b94 2254 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2255 if (!os->_clk)
64813c3f 2256 continue;
63c85238 2257
64813c3f
PW
2258 if (os->flags & OCPIF_SWSUP_IDLE) {
2259 /* XXX omap_iclk_deny_idle(c); */
2260 } else {
2261 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2262 clk_enable(os->_clk);
63c85238
PW
2263 }
2264 }
2265
64813c3f
PW
2266 return;
2267}
2268
2269/**
2270 * _setup_reset - reset an IP block during the setup process
2271 * @oh: struct omap_hwmod *
2272 *
2273 * Reset the IP block corresponding to the hwmod @oh during the setup
2274 * process. The IP block is first enabled so it can be successfully
2275 * reset. Returns 0 upon success or a negative error code upon
2276 * failure.
2277 */
2278static int __init _setup_reset(struct omap_hwmod *oh)
2279{
2280 int r;
2281
2282 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2283 return -EINVAL;
63c85238 2284
747834ab
PW
2285 if (oh->rst_lines_cnt == 0) {
2286 r = _enable(oh);
2287 if (r) {
2288 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2289 oh->name, oh->_state);
2290 return -EINVAL;
2291 }
9a23dfe1 2292 }
63c85238 2293
2800852a 2294 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2295 r = _reset(oh);
2296
2297 return r;
2298}
2299
2300/**
2301 * _setup_postsetup - transition to the appropriate state after _setup
2302 * @oh: struct omap_hwmod *
2303 *
2304 * Place an IP block represented by @oh into a "post-setup" state --
2305 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2306 * this function is called at the end of _setup().) The postsetup
2307 * state for an IP block can be changed by calling
2308 * omap_hwmod_enter_postsetup_state() early in the boot process,
2309 * before one of the omap_hwmod_setup*() functions are called for the
2310 * IP block.
2311 *
2312 * The IP block stays in this state until a PM runtime-based driver is
2313 * loaded for that IP block. A post-setup state of IDLE is
2314 * appropriate for almost all IP blocks with runtime PM-enabled
2315 * drivers, since those drivers are able to enable the IP block. A
2316 * post-setup state of ENABLED is appropriate for kernels with PM
2317 * runtime disabled. The DISABLED state is appropriate for unusual IP
2318 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2319 * included, since the WDTIMER starts running on reset and will reset
2320 * the MPU if left active.
2321 *
2322 * This post-setup mechanism is deprecated. Once all of the OMAP
2323 * drivers have been converted to use PM runtime, and all of the IP
2324 * block data and interconnect data is available to the hwmod code, it
2325 * should be possible to replace this mechanism with a "lazy reset"
2326 * arrangement. In a "lazy reset" setup, each IP block is enabled
2327 * when the driver first probes, then all remaining IP blocks without
2328 * drivers are either shut down or enabled after the drivers have
2329 * loaded. However, this cannot take place until the above
2330 * preconditions have been met, since otherwise the late reset code
2331 * has no way of knowing which IP blocks are in use by drivers, and
2332 * which ones are unused.
2333 *
2334 * No return value.
2335 */
2336static void __init _setup_postsetup(struct omap_hwmod *oh)
2337{
2338 u8 postsetup_state;
2339
2340 if (oh->rst_lines_cnt > 0)
2341 return;
76e5589e 2342
2092e5cc
PW
2343 postsetup_state = oh->_postsetup_state;
2344 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2345 postsetup_state = _HWMOD_STATE_ENABLED;
2346
2347 /*
2348 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2349 * it should be set by the core code as a runtime flag during startup
2350 */
2351 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2352 (postsetup_state == _HWMOD_STATE_IDLE)) {
2353 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2354 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2355 }
2092e5cc
PW
2356
2357 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2358 _idle(oh);
2092e5cc
PW
2359 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2360 _shutdown(oh);
2361 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2362 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2363 oh->name, postsetup_state);
63c85238 2364
64813c3f
PW
2365 return;
2366}
2367
2368/**
2369 * _setup - prepare IP block hardware for use
2370 * @oh: struct omap_hwmod *
2371 * @n: (unused, pass NULL)
2372 *
2373 * Configure the IP block represented by @oh. This may include
2374 * enabling the IP block, resetting it, and placing it into a
2375 * post-setup state, depending on the type of IP block and applicable
2376 * flags. IP blocks are reset to prevent any previous configuration
2377 * by the bootloader or previous operating system from interfering
2378 * with power management or other parts of the system. The reset can
2379 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2380 * two phases for hwmod initialization. Code called here generally
2381 * affects the IP block hardware, or system integration hardware
2382 * associated with the IP block. Returns 0.
2383 */
2384static int __init _setup(struct omap_hwmod *oh, void *data)
2385{
2386 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2387 return 0;
2388
2389 _setup_iclk_autoidle(oh);
2390
2391 if (!_setup_reset(oh))
2392 _setup_postsetup(oh);
2393
63c85238
PW
2394 return 0;
2395}
2396
63c85238 2397/**
0102b627 2398 * _register - register a struct omap_hwmod
63c85238
PW
2399 * @oh: struct omap_hwmod *
2400 *
43b40992
PW
2401 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2402 * already has been registered by the same name; -EINVAL if the
2403 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2404 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2405 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2406 * success.
63c85238
PW
2407 *
2408 * XXX The data should be copied into bootmem, so the original data
2409 * should be marked __initdata and freed after init. This would allow
2410 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2411 * that the copy process would be relatively complex due to the large number
2412 * of substructures.
2413 */
01592df9 2414static int __init _register(struct omap_hwmod *oh)
63c85238 2415{
43b40992
PW
2416 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2417 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2418 return -EINVAL;
2419
63c85238
PW
2420 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2421
ce35b244
BC
2422 if (_lookup(oh->name))
2423 return -EEXIST;
63c85238 2424
63c85238
PW
2425 list_add_tail(&oh->node, &omap_hwmod_list);
2426
2221b5cd
PW
2427 INIT_LIST_HEAD(&oh->master_ports);
2428 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2429 spin_lock_init(&oh->_lock);
2092e5cc 2430
63c85238
PW
2431 oh->_state = _HWMOD_STATE_REGISTERED;
2432
569edd70
PW
2433 /*
2434 * XXX Rather than doing a strcmp(), this should test a flag
2435 * set in the hwmod data, inserted by the autogenerator code.
2436 */
2437 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2438 mpu_oh = oh;
63c85238 2439
569edd70 2440 return 0;
63c85238
PW
2441}
2442
2221b5cd
PW
2443/**
2444 * _alloc_links - return allocated memory for hwmod links
2445 * @ml: pointer to a struct omap_hwmod_link * for the master link
2446 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2447 *
2448 * Return pointers to two struct omap_hwmod_link records, via the
2449 * addresses pointed to by @ml and @sl. Will first attempt to return
2450 * memory allocated as part of a large initial block, but if that has
2451 * been exhausted, will allocate memory itself. Since ideally this
2452 * second allocation path will never occur, the number of these
2453 * 'supplemental' allocations will be logged when debugging is
2454 * enabled. Returns 0.
2455 */
2456static int __init _alloc_links(struct omap_hwmod_link **ml,
2457 struct omap_hwmod_link **sl)
2458{
2459 unsigned int sz;
2460
2461 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2462 *ml = &linkspace[free_ls++];
2463 *sl = &linkspace[free_ls++];
2464 return 0;
2465 }
2466
2467 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2468
2469 *sl = NULL;
2470 *ml = alloc_bootmem(sz);
2471
2472 memset(*ml, 0, sz);
2473
2474 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2475
2476 ls_supp++;
2477 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2478 ls_supp * LINKS_PER_OCP_IF);
2479
2480 return 0;
2481};
2482
2483/**
2484 * _add_link - add an interconnect between two IP blocks
2485 * @oi: pointer to a struct omap_hwmod_ocp_if record
2486 *
2487 * Add struct omap_hwmod_link records connecting the master IP block
2488 * specified in @oi->master to @oi, and connecting the slave IP block
2489 * specified in @oi->slave to @oi. This code is assumed to run before
2490 * preemption or SMP has been enabled, thus avoiding the need for
2491 * locking in this code. Changes to this assumption will require
2492 * additional locking. Returns 0.
2493 */
2494static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2495{
2496 struct omap_hwmod_link *ml, *sl;
2497
2498 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2499 oi->slave->name);
2500
2501 _alloc_links(&ml, &sl);
2502
2503 ml->ocp_if = oi;
2504 INIT_LIST_HEAD(&ml->node);
2505 list_add(&ml->node, &oi->master->master_ports);
2506 oi->master->masters_cnt++;
2507
2508 sl->ocp_if = oi;
2509 INIT_LIST_HEAD(&sl->node);
2510 list_add(&sl->node, &oi->slave->slave_ports);
2511 oi->slave->slaves_cnt++;
2512
2513 return 0;
2514}
2515
2516/**
2517 * _register_link - register a struct omap_hwmod_ocp_if
2518 * @oi: struct omap_hwmod_ocp_if *
2519 *
2520 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2521 * has already been registered; -EINVAL if @oi is NULL or if the
2522 * record pointed to by @oi is missing required fields; or 0 upon
2523 * success.
2524 *
2525 * XXX The data should be copied into bootmem, so the original data
2526 * should be marked __initdata and freed after init. This would allow
2527 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2528 */
2529static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2530{
2531 if (!oi || !oi->master || !oi->slave || !oi->user)
2532 return -EINVAL;
2533
2534 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2535 return -EEXIST;
2536
2537 pr_debug("omap_hwmod: registering link from %s to %s\n",
2538 oi->master->name, oi->slave->name);
2539
2540 /*
2541 * Register the connected hwmods, if they haven't been
2542 * registered already
2543 */
2544 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2545 _register(oi->master);
2546
2547 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2548 _register(oi->slave);
2549
2550 _add_link(oi);
2551
2552 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2553
2554 return 0;
2555}
2556
2557/**
2558 * _alloc_linkspace - allocate large block of hwmod links
2559 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2560 *
2561 * Allocate a large block of struct omap_hwmod_link records. This
2562 * improves boot time significantly by avoiding the need to allocate
2563 * individual records one by one. If the number of records to
2564 * allocate in the block hasn't been manually specified, this function
2565 * will count the number of struct omap_hwmod_ocp_if records in @ois
2566 * and use that to determine the allocation size. For SoC families
2567 * that require multiple list registrations, such as OMAP3xxx, this
2568 * estimation process isn't optimal, so manual estimation is advised
2569 * in those cases. Returns -EEXIST if the allocation has already occurred
2570 * or 0 upon success.
2571 */
2572static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2573{
2574 unsigned int i = 0;
2575 unsigned int sz;
2576
2577 if (linkspace) {
2578 WARN(1, "linkspace already allocated\n");
2579 return -EEXIST;
2580 }
2581
2582 if (max_ls == 0)
2583 while (ois[i++])
2584 max_ls += LINKS_PER_OCP_IF;
2585
2586 sz = sizeof(struct omap_hwmod_link) * max_ls;
2587
2588 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2589 __func__, sz, max_ls);
2590
2591 linkspace = alloc_bootmem(sz);
2592
2593 memset(linkspace, 0, sz);
2594
2595 return 0;
2596}
0102b627 2597
8f6aa8ee
KH
2598/* Static functions intended only for use in soc_ops field function pointers */
2599
2600/**
2601 * _omap2_wait_target_ready - wait for a module to leave slave idle
2602 * @oh: struct omap_hwmod *
2603 *
2604 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2605 * does not have an IDLEST bit or if the module successfully leaves
2606 * slave idle; otherwise, pass along the return value of the
2607 * appropriate *_cm*_wait_module_ready() function.
2608 */
2609static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2610{
2611 if (!oh)
2612 return -EINVAL;
2613
2614 if (oh->flags & HWMOD_NO_IDLEST)
2615 return 0;
2616
2617 if (!_find_mpu_rt_port(oh))
2618 return 0;
2619
2620 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2621
2622 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2623 oh->prcm.omap2.idlest_reg_id,
2624 oh->prcm.omap2.idlest_idle_bit);
2625}
2626
2627/**
2628 * _omap4_wait_target_ready - wait for a module to leave slave idle
2629 * @oh: struct omap_hwmod *
2630 *
2631 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2632 * does not have an IDLEST bit or if the module successfully leaves
2633 * slave idle; otherwise, pass along the return value of the
2634 * appropriate *_cm*_wait_module_ready() function.
2635 */
2636static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2637{
2638 if (!oh || !oh->clkdm)
2639 return -EINVAL;
2640
2641 if (oh->flags & HWMOD_NO_IDLEST)
2642 return 0;
2643
2644 if (!_find_mpu_rt_port(oh))
2645 return 0;
2646
2647 /* XXX check module SIDLEMODE, hardreset status */
2648
2649 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2650 oh->clkdm->cm_inst,
2651 oh->clkdm->clkdm_offs,
2652 oh->prcm.omap4.clkctrl_offs);
2653}
2654
1688bf19
VH
2655/**
2656 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2657 * @oh: struct omap_hwmod *
2658 *
2659 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2660 * does not have an IDLEST bit or if the module successfully leaves
2661 * slave idle; otherwise, pass along the return value of the
2662 * appropriate *_cm*_wait_module_ready() function.
2663 */
2664static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2665{
2666 if (!oh || !oh->clkdm)
2667 return -EINVAL;
2668
2669 if (oh->flags & HWMOD_NO_IDLEST)
2670 return 0;
2671
2672 if (!_find_mpu_rt_port(oh))
2673 return 0;
2674
2675 /* XXX check module SIDLEMODE, hardreset status */
2676
2677 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2678 oh->clkdm->clkdm_offs,
2679 oh->prcm.omap4.clkctrl_offs);
2680}
2681
b8249cf2
KH
2682/**
2683 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2684 * @oh: struct omap_hwmod * to assert hardreset
2685 * @ohri: hardreset line data
2686 *
2687 * Call omap2_prm_assert_hardreset() with parameters extracted from
2688 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2689 * use as an soc_ops function pointer. Passes along the return value
2690 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2691 * for removal when the PRM code is moved into drivers/.
2692 */
2693static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2694 struct omap_hwmod_rst_info *ohri)
2695{
2696 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2697 ohri->rst_shift);
2698}
2699
2700/**
2701 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2702 * @oh: struct omap_hwmod * to deassert hardreset
2703 * @ohri: hardreset line data
2704 *
2705 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2706 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2707 * use as an soc_ops function pointer. Passes along the return value
2708 * from omap2_prm_deassert_hardreset(). XXX This function is
2709 * scheduled for removal when the PRM code is moved into drivers/.
2710 */
2711static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2712 struct omap_hwmod_rst_info *ohri)
2713{
2714 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2715 ohri->rst_shift,
2716 ohri->st_shift);
2717}
2718
2719/**
2720 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2721 * @oh: struct omap_hwmod * to test hardreset
2722 * @ohri: hardreset line data
2723 *
2724 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2725 * from the hwmod @oh and the hardreset line data @ohri. Only
2726 * intended for use as an soc_ops function pointer. Passes along the
2727 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2728 * function is scheduled for removal when the PRM code is moved into
2729 * drivers/.
2730 */
2731static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2732 struct omap_hwmod_rst_info *ohri)
2733{
2734 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2735 ohri->st_shift);
2736}
2737
2738/**
2739 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2740 * @oh: struct omap_hwmod * to assert hardreset
2741 * @ohri: hardreset line data
2742 *
2743 * Call omap4_prminst_assert_hardreset() with parameters extracted
2744 * from the hwmod @oh and the hardreset line data @ohri. Only
2745 * intended for use as an soc_ops function pointer. Passes along the
2746 * return value from omap4_prminst_assert_hardreset(). XXX This
2747 * function is scheduled for removal when the PRM code is moved into
2748 * drivers/.
2749 */
2750static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2751 struct omap_hwmod_rst_info *ohri)
b8249cf2 2752{
07b3a139
PW
2753 if (!oh->clkdm)
2754 return -EINVAL;
2755
b8249cf2
KH
2756 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2757 oh->clkdm->pwrdm.ptr->prcm_partition,
2758 oh->clkdm->pwrdm.ptr->prcm_offs,
2759 oh->prcm.omap4.rstctrl_offs);
2760}
2761
2762/**
2763 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2764 * @oh: struct omap_hwmod * to deassert hardreset
2765 * @ohri: hardreset line data
2766 *
2767 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2768 * from the hwmod @oh and the hardreset line data @ohri. Only
2769 * intended for use as an soc_ops function pointer. Passes along the
2770 * return value from omap4_prminst_deassert_hardreset(). XXX This
2771 * function is scheduled for removal when the PRM code is moved into
2772 * drivers/.
2773 */
2774static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2775 struct omap_hwmod_rst_info *ohri)
2776{
07b3a139
PW
2777 if (!oh->clkdm)
2778 return -EINVAL;
2779
b8249cf2
KH
2780 if (ohri->st_shift)
2781 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2782 oh->name, ohri->name);
2783 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2784 oh->clkdm->pwrdm.ptr->prcm_partition,
2785 oh->clkdm->pwrdm.ptr->prcm_offs,
2786 oh->prcm.omap4.rstctrl_offs);
2787}
2788
2789/**
2790 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2791 * @oh: struct omap_hwmod * to test hardreset
2792 * @ohri: hardreset line data
2793 *
2794 * Call omap4_prminst_is_hardreset_asserted() with parameters
2795 * extracted from the hwmod @oh and the hardreset line data @ohri.
2796 * Only intended for use as an soc_ops function pointer. Passes along
2797 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2798 * This function is scheduled for removal when the PRM code is moved
2799 * into drivers/.
2800 */
2801static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2802 struct omap_hwmod_rst_info *ohri)
2803{
07b3a139
PW
2804 if (!oh->clkdm)
2805 return -EINVAL;
2806
b8249cf2
KH
2807 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2808 oh->clkdm->pwrdm.ptr->prcm_partition,
2809 oh->clkdm->pwrdm.ptr->prcm_offs,
2810 oh->prcm.omap4.rstctrl_offs);
2811}
2812
1688bf19
VH
2813/**
2814 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2815 * @oh: struct omap_hwmod * to assert hardreset
2816 * @ohri: hardreset line data
2817 *
2818 * Call am33xx_prminst_assert_hardreset() with parameters extracted
2819 * from the hwmod @oh and the hardreset line data @ohri. Only
2820 * intended for use as an soc_ops function pointer. Passes along the
2821 * return value from am33xx_prminst_assert_hardreset(). XXX This
2822 * function is scheduled for removal when the PRM code is moved into
2823 * drivers/.
2824 */
2825static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
2826 struct omap_hwmod_rst_info *ohri)
2827
2828{
2829 return am33xx_prm_assert_hardreset(ohri->rst_shift,
2830 oh->clkdm->pwrdm.ptr->prcm_offs,
2831 oh->prcm.omap4.rstctrl_offs);
2832}
2833
2834/**
2835 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2836 * @oh: struct omap_hwmod * to deassert hardreset
2837 * @ohri: hardreset line data
2838 *
2839 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2840 * from the hwmod @oh and the hardreset line data @ohri. Only
2841 * intended for use as an soc_ops function pointer. Passes along the
2842 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2843 * function is scheduled for removal when the PRM code is moved into
2844 * drivers/.
2845 */
2846static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2847 struct omap_hwmod_rst_info *ohri)
2848{
2849 if (ohri->st_shift)
2850 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2851 oh->name, ohri->name);
2852
2853 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
2854 oh->clkdm->pwrdm.ptr->prcm_offs,
2855 oh->prcm.omap4.rstctrl_offs,
2856 oh->prcm.omap4.rstst_offs);
2857}
2858
2859/**
2860 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
2861 * @oh: struct omap_hwmod * to test hardreset
2862 * @ohri: hardreset line data
2863 *
2864 * Call am33xx_prminst_is_hardreset_asserted() with parameters
2865 * extracted from the hwmod @oh and the hardreset line data @ohri.
2866 * Only intended for use as an soc_ops function pointer. Passes along
2867 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
2868 * This function is scheduled for removal when the PRM code is moved
2869 * into drivers/.
2870 */
2871static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
2872 struct omap_hwmod_rst_info *ohri)
2873{
2874 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
2875 oh->clkdm->pwrdm.ptr->prcm_offs,
2876 oh->prcm.omap4.rstctrl_offs);
2877}
2878
0102b627
BC
2879/* Public functions */
2880
2881u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2882{
2883 if (oh->flags & HWMOD_16BIT_REG)
2884 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2885 else
2886 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2887}
2888
2889void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2890{
2891 if (oh->flags & HWMOD_16BIT_REG)
2892 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2893 else
2894 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2895}
2896
6d3c55fd
A
2897/**
2898 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2899 * @oh: struct omap_hwmod *
2900 *
2901 * This is a public function exposed to drivers. Some drivers may need to do
2902 * some settings before and after resetting the device. Those drivers after
2903 * doing the necessary settings could use this function to start a reset by
2904 * setting the SYSCONFIG.SOFTRESET bit.
2905 */
2906int omap_hwmod_softreset(struct omap_hwmod *oh)
2907{
3c55c1ba
PW
2908 u32 v;
2909 int ret;
2910
2911 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2912 return -EINVAL;
2913
3c55c1ba
PW
2914 v = oh->_sysc_cache;
2915 ret = _set_softreset(oh, &v);
2916 if (ret)
2917 goto error;
2918 _write_sysconfig(v, oh);
2919
2920error:
2921 return ret;
6d3c55fd
A
2922}
2923
0102b627
BC
2924/**
2925 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2926 * @oh: struct omap_hwmod *
2927 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2928 *
2929 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2930 * local copy. Intended to be used by drivers that have some erratum
2931 * that requires direct manipulation of the SIDLEMODE bits. Returns
2932 * -EINVAL if @oh is null, or passes along the return value from
2933 * _set_slave_idlemode().
2934 *
2935 * XXX Does this function have any current users? If not, we should
2936 * remove it; it is better to let the rest of the hwmod code handle this.
2937 * Any users of this function should be scrutinized carefully.
2938 */
2939int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2940{
2941 u32 v;
2942 int retval = 0;
2943
2944 if (!oh)
2945 return -EINVAL;
2946
2947 v = oh->_sysc_cache;
2948
2949 retval = _set_slave_idlemode(oh, idlemode, &v);
2950 if (!retval)
2951 _write_sysconfig(v, oh);
2952
2953 return retval;
2954}
2955
63c85238
PW
2956/**
2957 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2958 * @name: name of the omap_hwmod to look up
2959 *
2960 * Given a @name of an omap_hwmod, return a pointer to the registered
2961 * struct omap_hwmod *, or NULL upon error.
2962 */
2963struct omap_hwmod *omap_hwmod_lookup(const char *name)
2964{
2965 struct omap_hwmod *oh;
2966
2967 if (!name)
2968 return NULL;
2969
63c85238 2970 oh = _lookup(name);
63c85238
PW
2971
2972 return oh;
2973}
2974
2975/**
2976 * omap_hwmod_for_each - call function for each registered omap_hwmod
2977 * @fn: pointer to a callback function
97d60162 2978 * @data: void * data to pass to callback function
63c85238
PW
2979 *
2980 * Call @fn for each registered omap_hwmod, passing @data to each
2981 * function. @fn must return 0 for success or any other value for
2982 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2983 * will stop and the non-zero return value will be passed to the
2984 * caller of omap_hwmod_for_each(). @fn is called with
2985 * omap_hwmod_for_each() held.
2986 */
97d60162
PW
2987int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2988 void *data)
63c85238
PW
2989{
2990 struct omap_hwmod *temp_oh;
30ebad9d 2991 int ret = 0;
63c85238
PW
2992
2993 if (!fn)
2994 return -EINVAL;
2995
63c85238 2996 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2997 ret = (*fn)(temp_oh, data);
63c85238
PW
2998 if (ret)
2999 break;
3000 }
63c85238
PW
3001
3002 return ret;
3003}
3004
2221b5cd
PW
3005/**
3006 * omap_hwmod_register_links - register an array of hwmod links
3007 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3008 *
3009 * Intended to be called early in boot before the clock framework is
3010 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
3011 * listed in @ois that are valid for this chip. Returns -EINVAL if
3012 * omap_hwmod_init() hasn't been called before calling this function,
3013 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3014 * success.
2221b5cd
PW
3015 */
3016int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3017{
3018 int r, i;
3019
9ebfd285
KH
3020 if (!inited)
3021 return -EINVAL;
3022
2221b5cd
PW
3023 if (!ois)
3024 return 0;
3025
2221b5cd
PW
3026 if (!linkspace) {
3027 if (_alloc_linkspace(ois)) {
3028 pr_err("omap_hwmod: could not allocate link space\n");
3029 return -ENOMEM;
3030 }
3031 }
3032
3033 i = 0;
3034 do {
3035 r = _register_link(ois[i]);
3036 WARN(r && r != -EEXIST,
3037 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3038 ois[i]->master->name, ois[i]->slave->name, r);
3039 } while (ois[++i]);
3040
3041 return 0;
3042}
3043
381d033a
PW
3044/**
3045 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3046 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3047 *
3048 * If the hwmod data corresponding to the MPU subsystem IP block
3049 * hasn't been initialized and set up yet, do so now. This must be
3050 * done first since sleep dependencies may be added from other hwmods
3051 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3052 * return value.
63c85238 3053 */
381d033a 3054static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3055{
381d033a
PW
3056 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3057 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3058 __func__, MPU_INITIATOR_NAME);
3059 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3060 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3061}
3062
63c85238 3063/**
a2debdbd
PW
3064 * omap_hwmod_setup_one - set up a single hwmod
3065 * @oh_name: const char * name of the already-registered hwmod to set up
3066 *
381d033a
PW
3067 * Initialize and set up a single hwmod. Intended to be used for a
3068 * small number of early devices, such as the timer IP blocks used for
3069 * the scheduler clock. Must be called after omap2_clk_init().
3070 * Resolves the struct clk names to struct clk pointers for each
3071 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3072 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3073 */
3074int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3075{
3076 struct omap_hwmod *oh;
63c85238 3077
a2debdbd
PW
3078 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3079
a2debdbd
PW
3080 oh = _lookup(oh_name);
3081 if (!oh) {
3082 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3083 return -EINVAL;
3084 }
63c85238 3085
381d033a 3086 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3087
381d033a 3088 _init(oh, NULL);
a2debdbd
PW
3089 _setup(oh, NULL);
3090
63c85238
PW
3091 return 0;
3092}
3093
3094/**
381d033a 3095 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3096 *
381d033a
PW
3097 * Initialize and set up all IP blocks registered with the hwmod code.
3098 * Must be called after omap2_clk_init(). Resolves the struct clk
3099 * names to struct clk pointers for each registered omap_hwmod. Also
3100 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3101 */
550c8092 3102static int __init omap_hwmod_setup_all(void)
63c85238 3103{
381d033a 3104 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3105
381d033a 3106 omap_hwmod_for_each(_init, NULL);
2092e5cc 3107 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3108
3109 return 0;
3110}
550c8092 3111core_initcall(omap_hwmod_setup_all);
63c85238 3112
63c85238
PW
3113/**
3114 * omap_hwmod_enable - enable an omap_hwmod
3115 * @oh: struct omap_hwmod *
3116 *
74ff3a68 3117 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3118 * Returns -EINVAL on error or passes along the return value from _enable().
3119 */
3120int omap_hwmod_enable(struct omap_hwmod *oh)
3121{
3122 int r;
dc6d1cda 3123 unsigned long flags;
63c85238
PW
3124
3125 if (!oh)
3126 return -EINVAL;
3127
dc6d1cda
PW
3128 spin_lock_irqsave(&oh->_lock, flags);
3129 r = _enable(oh);
3130 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3131
3132 return r;
3133}
3134
3135/**
3136 * omap_hwmod_idle - idle an omap_hwmod
3137 * @oh: struct omap_hwmod *
3138 *
74ff3a68 3139 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3140 * Returns -EINVAL on error or passes along the return value from _idle().
3141 */
3142int omap_hwmod_idle(struct omap_hwmod *oh)
3143{
dc6d1cda
PW
3144 unsigned long flags;
3145
63c85238
PW
3146 if (!oh)
3147 return -EINVAL;
3148
dc6d1cda
PW
3149 spin_lock_irqsave(&oh->_lock, flags);
3150 _idle(oh);
3151 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3152
3153 return 0;
3154}
3155
3156/**
3157 * omap_hwmod_shutdown - shutdown an omap_hwmod
3158 * @oh: struct omap_hwmod *
3159 *
74ff3a68 3160 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3161 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3162 * the return value from _shutdown().
3163 */
3164int omap_hwmod_shutdown(struct omap_hwmod *oh)
3165{
dc6d1cda
PW
3166 unsigned long flags;
3167
63c85238
PW
3168 if (!oh)
3169 return -EINVAL;
3170
dc6d1cda 3171 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3172 _shutdown(oh);
dc6d1cda 3173 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3174
3175 return 0;
3176}
3177
3178/**
3179 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3180 * @oh: struct omap_hwmod *oh
3181 *
3182 * Intended to be called by the omap_device code.
3183 */
3184int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3185{
dc6d1cda
PW
3186 unsigned long flags;
3187
3188 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3189 _enable_clocks(oh);
dc6d1cda 3190 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3191
3192 return 0;
3193}
3194
3195/**
3196 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3197 * @oh: struct omap_hwmod *oh
3198 *
3199 * Intended to be called by the omap_device code.
3200 */
3201int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3202{
dc6d1cda
PW
3203 unsigned long flags;
3204
3205 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3206 _disable_clocks(oh);
dc6d1cda 3207 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3208
3209 return 0;
3210}
3211
3212/**
3213 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3214 * @oh: struct omap_hwmod *oh
3215 *
3216 * Intended to be called by drivers and core code when all posted
3217 * writes to a device must complete before continuing further
3218 * execution (for example, after clearing some device IRQSTATUS
3219 * register bits)
3220 *
3221 * XXX what about targets with multiple OCP threads?
3222 */
3223void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3224{
3225 BUG_ON(!oh);
3226
43b40992 3227 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3228 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3229 oh->name);
63c85238
PW
3230 return;
3231 }
3232
3233 /*
3234 * Forces posted writes to complete on the OCP thread handling
3235 * register writes
3236 */
cc7a1d2a 3237 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3238}
3239
3240/**
3241 * omap_hwmod_reset - reset the hwmod
3242 * @oh: struct omap_hwmod *
3243 *
3244 * Under some conditions, a driver may wish to reset the entire device.
3245 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3246 * the return value from _reset().
63c85238
PW
3247 */
3248int omap_hwmod_reset(struct omap_hwmod *oh)
3249{
3250 int r;
dc6d1cda 3251 unsigned long flags;
63c85238 3252
9b579114 3253 if (!oh)
63c85238
PW
3254 return -EINVAL;
3255
dc6d1cda 3256 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3257 r = _reset(oh);
dc6d1cda 3258 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3259
3260 return r;
3261}
3262
5e8370f1
PW
3263/*
3264 * IP block data retrieval functions
3265 */
3266
63c85238
PW
3267/**
3268 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3269 * @oh: struct omap_hwmod *
3270 * @res: pointer to the first element of an array of struct resource to fill
3271 *
3272 * Count the number of struct resource array elements necessary to
3273 * contain omap_hwmod @oh resources. Intended to be called by code
3274 * that registers omap_devices. Intended to be used to determine the
3275 * size of a dynamically-allocated struct resource array, before
3276 * calling omap_hwmod_fill_resources(). Returns the number of struct
3277 * resource array elements needed.
3278 *
3279 * XXX This code is not optimized. It could attempt to merge adjacent
3280 * resource IDs.
3281 *
3282 */
3283int omap_hwmod_count_resources(struct omap_hwmod *oh)
3284{
5d95dde7 3285 struct omap_hwmod_ocp_if *os;
11cd4b94 3286 struct list_head *p;
5d95dde7
PW
3287 int ret;
3288 int i = 0;
63c85238 3289
bc614958 3290 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 3291
11cd4b94 3292 p = oh->slave_ports.next;
2221b5cd 3293
5d95dde7 3294 while (i < oh->slaves_cnt) {
11cd4b94 3295 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
3296 ret += _count_ocp_if_addr_spaces(os);
3297 }
63c85238
PW
3298
3299 return ret;
3300}
3301
3302/**
3303 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3304 * @oh: struct omap_hwmod *
3305 * @res: pointer to the first element of an array of struct resource to fill
3306 *
3307 * Fill the struct resource array @res with resource data from the
3308 * omap_hwmod @oh. Intended to be called by code that registers
3309 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3310 * number of array elements filled.
3311 */
3312int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3313{
5d95dde7 3314 struct omap_hwmod_ocp_if *os;
11cd4b94 3315 struct list_head *p;
5d95dde7 3316 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3317 int r = 0;
3318
3319 /* For each IRQ, DMA, memory area, fill in array.*/
3320
212738a4
PW
3321 mpu_irqs_cnt = _count_mpu_irqs(oh);
3322 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3323 (res + r)->name = (oh->mpu_irqs + i)->name;
3324 (res + r)->start = (oh->mpu_irqs + i)->irq;
3325 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3326 (res + r)->flags = IORESOURCE_IRQ;
3327 r++;
3328 }
3329
bc614958
PW
3330 sdma_reqs_cnt = _count_sdma_reqs(oh);
3331 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3332 (res + r)->name = (oh->sdma_reqs + i)->name;
3333 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3334 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3335 (res + r)->flags = IORESOURCE_DMA;
3336 r++;
3337 }
3338
11cd4b94 3339 p = oh->slave_ports.next;
2221b5cd 3340
5d95dde7
PW
3341 i = 0;
3342 while (i < oh->slaves_cnt) {
11cd4b94 3343 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3344 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3345
78183f3f 3346 for (j = 0; j < addr_cnt; j++) {
cd503802 3347 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3348 (res + r)->start = (os->addr + j)->pa_start;
3349 (res + r)->end = (os->addr + j)->pa_end;
3350 (res + r)->flags = IORESOURCE_MEM;
3351 r++;
3352 }
3353 }
3354
3355 return r;
3356}
3357
5e8370f1
PW
3358/**
3359 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3360 * @oh: struct omap_hwmod * to operate on
3361 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3362 * @name: pointer to the name of the data to fetch (optional)
3363 * @rsrc: pointer to a struct resource, allocated by the caller
3364 *
3365 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3366 * data for the IP block pointed to by @oh. The data will be filled
3367 * into a struct resource record pointed to by @rsrc. The struct
3368 * resource must be allocated by the caller. When @name is non-null,
3369 * the data associated with the matching entry in the IRQ/SDMA/address
3370 * space hwmod data arrays will be returned. If @name is null, the
3371 * first array entry will be returned. Data order is not meaningful
3372 * in hwmod data, so callers are strongly encouraged to use a non-null
3373 * @name whenever possible to avoid unpredictable effects if hwmod
3374 * data is later added that causes data ordering to change. This
3375 * function is only intended for use by OMAP core code. Device
3376 * drivers should not call this function - the appropriate bus-related
3377 * data accessor functions should be used instead. Returns 0 upon
3378 * success or a negative error code upon error.
3379 */
3380int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3381 const char *name, struct resource *rsrc)
3382{
3383 int r;
3384 unsigned int irq, dma;
3385 u32 pa_start, pa_end;
3386
3387 if (!oh || !rsrc)
3388 return -EINVAL;
3389
3390 if (type == IORESOURCE_IRQ) {
3391 r = _get_mpu_irq_by_name(oh, name, &irq);
3392 if (r)
3393 return r;
3394
3395 rsrc->start = irq;
3396 rsrc->end = irq;
3397 } else if (type == IORESOURCE_DMA) {
3398 r = _get_sdma_req_by_name(oh, name, &dma);
3399 if (r)
3400 return r;
3401
3402 rsrc->start = dma;
3403 rsrc->end = dma;
3404 } else if (type == IORESOURCE_MEM) {
3405 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3406 if (r)
3407 return r;
3408
3409 rsrc->start = pa_start;
3410 rsrc->end = pa_end;
3411 } else {
3412 return -EINVAL;
3413 }
3414
3415 rsrc->flags = type;
3416 rsrc->name = name;
3417
3418 return 0;
3419}
3420
63c85238
PW
3421/**
3422 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3423 * @oh: struct omap_hwmod *
3424 *
3425 * Return the powerdomain pointer associated with the OMAP module
3426 * @oh's main clock. If @oh does not have a main clk, return the
3427 * powerdomain associated with the interface clock associated with the
3428 * module's MPU port. (XXX Perhaps this should use the SDMA port
3429 * instead?) Returns NULL on error, or a struct powerdomain * on
3430 * success.
3431 */
3432struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3433{
3434 struct clk *c;
2d6141ba 3435 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3436
3437 if (!oh)
3438 return NULL;
3439
3440 if (oh->_clk) {
3441 c = oh->_clk;
3442 } else {
2d6141ba
PW
3443 oi = _find_mpu_rt_port(oh);
3444 if (!oi)
63c85238 3445 return NULL;
2d6141ba 3446 c = oi->_clk;
63c85238
PW
3447 }
3448
d5647c18
TG
3449 if (!c->clkdm)
3450 return NULL;
3451
63c85238
PW
3452 return c->clkdm->pwrdm.ptr;
3453
3454}
3455
db2a60bf
PW
3456/**
3457 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3458 * @oh: struct omap_hwmod *
3459 *
3460 * Returns the virtual address corresponding to the beginning of the
3461 * module's register target, in the address range that is intended to
3462 * be used by the MPU. Returns the virtual address upon success or NULL
3463 * upon error.
3464 */
3465void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3466{
3467 if (!oh)
3468 return NULL;
3469
3470 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3471 return NULL;
3472
3473 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3474 return NULL;
3475
3476 return oh->_mpu_rt_va;
3477}
3478
63c85238
PW
3479/**
3480 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3481 * @oh: struct omap_hwmod *
3482 * @init_oh: struct omap_hwmod * (initiator)
3483 *
3484 * Add a sleep dependency between the initiator @init_oh and @oh.
3485 * Intended to be called by DSP/Bridge code via platform_data for the
3486 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3487 * code needs to add/del initiator dependencies dynamically
3488 * before/after accessing a device. Returns the return value from
3489 * _add_initiator_dep().
3490 *
3491 * XXX Keep a usecount in the clockdomain code
3492 */
3493int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3494 struct omap_hwmod *init_oh)
3495{
3496 return _add_initiator_dep(oh, init_oh);
3497}
3498
3499/*
3500 * XXX what about functions for drivers to save/restore ocp_sysconfig
3501 * for context save/restore operations?
3502 */
3503
3504/**
3505 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3506 * @oh: struct omap_hwmod *
3507 * @init_oh: struct omap_hwmod * (initiator)
3508 *
3509 * Remove a sleep dependency between the initiator @init_oh and @oh.
3510 * Intended to be called by DSP/Bridge code via platform_data for the
3511 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3512 * code needs to add/del initiator dependencies dynamically
3513 * before/after accessing a device. Returns the return value from
3514 * _del_initiator_dep().
3515 *
3516 * XXX Keep a usecount in the clockdomain code
3517 */
3518int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3519 struct omap_hwmod *init_oh)
3520{
3521 return _del_initiator_dep(oh, init_oh);
3522}
3523
63c85238
PW
3524/**
3525 * omap_hwmod_enable_wakeup - allow device to wake up the system
3526 * @oh: struct omap_hwmod *
3527 *
3528 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3529 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3530 * this IP block if it has dynamic mux entries. Eventually this
3531 * should set PRCM wakeup registers to cause the PRCM to receive
3532 * wakeup events from the module. Does not set any wakeup routing
3533 * registers beyond this point - if the module is to wake up any other
3534 * module or subsystem, that must be set separately. Called by
3535 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3536 */
3537int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3538{
dc6d1cda 3539 unsigned long flags;
5a7ddcbd 3540 u32 v;
dc6d1cda 3541
dc6d1cda 3542 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3543
3544 if (oh->class->sysc &&
3545 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3546 v = oh->_sysc_cache;
3547 _enable_wakeup(oh, &v);
3548 _write_sysconfig(v, oh);
3549 }
3550
eceec009 3551 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3552 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3553
3554 return 0;
3555}
3556
3557/**
3558 * omap_hwmod_disable_wakeup - prevent device from waking the system
3559 * @oh: struct omap_hwmod *
3560 *
3561 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3562 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3563 * events for this IP block if it has dynamic mux entries. Eventually
3564 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3565 * wakeup events from the module. Does not set any wakeup routing
3566 * registers beyond this point - if the module is to wake up any other
3567 * module or subsystem, that must be set separately. Called by
3568 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3569 */
3570int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3571{
dc6d1cda 3572 unsigned long flags;
5a7ddcbd 3573 u32 v;
dc6d1cda 3574
dc6d1cda 3575 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3576
3577 if (oh->class->sysc &&
3578 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3579 v = oh->_sysc_cache;
3580 _disable_wakeup(oh, &v);
3581 _write_sysconfig(v, oh);
3582 }
3583
eceec009 3584 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3585 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3586
3587 return 0;
3588}
43b40992 3589
aee48e3c
PW
3590/**
3591 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3592 * contained in the hwmod module.
3593 * @oh: struct omap_hwmod *
3594 * @name: name of the reset line to lookup and assert
3595 *
3596 * Some IP like dsp, ipu or iva contain processor that require
3597 * an HW reset line to be assert / deassert in order to enable fully
3598 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3599 * yet supported on this OMAP; otherwise, passes along the return value
3600 * from _assert_hardreset().
3601 */
3602int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3603{
3604 int ret;
dc6d1cda 3605 unsigned long flags;
aee48e3c
PW
3606
3607 if (!oh)
3608 return -EINVAL;
3609
dc6d1cda 3610 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3611 ret = _assert_hardreset(oh, name);
dc6d1cda 3612 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3613
3614 return ret;
3615}
3616
3617/**
3618 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3619 * contained in the hwmod module.
3620 * @oh: struct omap_hwmod *
3621 * @name: name of the reset line to look up and deassert
3622 *
3623 * Some IP like dsp, ipu or iva contain processor that require
3624 * an HW reset line to be assert / deassert in order to enable fully
3625 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3626 * yet supported on this OMAP; otherwise, passes along the return value
3627 * from _deassert_hardreset().
3628 */
3629int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3630{
3631 int ret;
dc6d1cda 3632 unsigned long flags;
aee48e3c
PW
3633
3634 if (!oh)
3635 return -EINVAL;
3636
dc6d1cda 3637 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3638 ret = _deassert_hardreset(oh, name);
dc6d1cda 3639 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3640
3641 return ret;
3642}
3643
3644/**
3645 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3646 * contained in the hwmod module
3647 * @oh: struct omap_hwmod *
3648 * @name: name of the reset line to look up and read
3649 *
3650 * Return the current state of the hwmod @oh's reset line named @name:
3651 * returns -EINVAL upon parameter error or if this operation
3652 * is unsupported on the current OMAP; otherwise, passes along the return
3653 * value from _read_hardreset().
3654 */
3655int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3656{
3657 int ret;
dc6d1cda 3658 unsigned long flags;
aee48e3c
PW
3659
3660 if (!oh)
3661 return -EINVAL;
3662
dc6d1cda 3663 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3664 ret = _read_hardreset(oh, name);
dc6d1cda 3665 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3666
3667 return ret;
3668}
3669
3670
43b40992
PW
3671/**
3672 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3673 * @classname: struct omap_hwmod_class name to search for
3674 * @fn: callback function pointer to call for each hwmod in class @classname
3675 * @user: arbitrary context data to pass to the callback function
3676 *
ce35b244
BC
3677 * For each omap_hwmod of class @classname, call @fn.
3678 * If the callback function returns something other than
43b40992
PW
3679 * zero, the iterator is terminated, and the callback function's return
3680 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3681 * if @classname or @fn are NULL, or passes back the error code from @fn.
3682 */
3683int omap_hwmod_for_each_by_class(const char *classname,
3684 int (*fn)(struct omap_hwmod *oh,
3685 void *user),
3686 void *user)
3687{
3688 struct omap_hwmod *temp_oh;
3689 int ret = 0;
3690
3691 if (!classname || !fn)
3692 return -EINVAL;
3693
3694 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3695 __func__, classname);
3696
43b40992
PW
3697 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3698 if (!strcmp(temp_oh->class->name, classname)) {
3699 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3700 __func__, temp_oh->name);
3701 ret = (*fn)(temp_oh, user);
3702 if (ret)
3703 break;
3704 }
3705 }
3706
43b40992
PW
3707 if (ret)
3708 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3709 __func__, ret);
3710
3711 return ret;
3712}
3713
2092e5cc
PW
3714/**
3715 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3716 * @oh: struct omap_hwmod *
3717 * @state: state that _setup() should leave the hwmod in
3718 *
550c8092 3719 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3720 * (called by omap_hwmod_setup_*()). See also the documentation
3721 * for _setup_postsetup(), above. Returns 0 upon success or
3722 * -EINVAL if there is a problem with the arguments or if the hwmod is
3723 * in the wrong state.
2092e5cc
PW
3724 */
3725int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3726{
3727 int ret;
dc6d1cda 3728 unsigned long flags;
2092e5cc
PW
3729
3730 if (!oh)
3731 return -EINVAL;
3732
3733 if (state != _HWMOD_STATE_DISABLED &&
3734 state != _HWMOD_STATE_ENABLED &&
3735 state != _HWMOD_STATE_IDLE)
3736 return -EINVAL;
3737
dc6d1cda 3738 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3739
3740 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3741 ret = -EINVAL;
3742 goto ohsps_unlock;
3743 }
3744
3745 oh->_postsetup_state = state;
3746 ret = 0;
3747
3748ohsps_unlock:
dc6d1cda 3749 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3750
3751 return ret;
3752}
c80705aa
KH
3753
3754/**
3755 * omap_hwmod_get_context_loss_count - get lost context count
3756 * @oh: struct omap_hwmod *
3757 *
3758 * Query the powerdomain of of @oh to get the context loss
3759 * count for this device.
3760 *
3761 * Returns the context loss count of the powerdomain assocated with @oh
3762 * upon success, or zero if no powerdomain exists for @oh.
3763 */
fc013873 3764int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3765{
3766 struct powerdomain *pwrdm;
3767 int ret = 0;
3768
3769 pwrdm = omap_hwmod_get_pwrdm(oh);
3770 if (pwrdm)
3771 ret = pwrdm_get_context_loss_count(pwrdm);
3772
3773 return ret;
3774}
43b01643
PW
3775
3776/**
3777 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3778 * @oh: struct omap_hwmod *
3779 *
3780 * Prevent the hwmod @oh from being reset during the setup process.
3781 * Intended for use by board-*.c files on boards with devices that
3782 * cannot tolerate being reset. Must be called before the hwmod has
3783 * been set up. Returns 0 upon success or negative error code upon
3784 * failure.
3785 */
3786int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3787{
3788 if (!oh)
3789 return -EINVAL;
3790
3791 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3792 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3793 oh->name);
3794 return -EINVAL;
3795 }
3796
3797 oh->flags |= HWMOD_INIT_NO_RESET;
3798
3799 return 0;
3800}
abc2d545
TK
3801
3802/**
3803 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3804 * @oh: struct omap_hwmod * containing hwmod mux entries
3805 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3806 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3807 *
3808 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3809 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3810 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3811 * this function is not called for a given pad_idx, then the ISR
3812 * associated with @oh's first MPU IRQ will be triggered when an I/O
3813 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3814 * the _dynamic or wakeup_ entry: if there are other entries not
3815 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3816 * entries are NOT COUNTED in the dynamic pad index. This function
3817 * must be called separately for each pad that requires its interrupt
3818 * to be re-routed this way. Returns -EINVAL if there is an argument
3819 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3820 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3821 *
3822 * XXX This function interface is fragile. Rather than using array
3823 * indexes, which are subject to unpredictable change, it should be
3824 * using hwmod IRQ names, and some other stable key for the hwmod mux
3825 * pad records.
3826 */
3827int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3828{
3829 int nr_irqs;
3830
3831 might_sleep();
3832
3833 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3834 pad_idx >= oh->mux->nr_pads_dynamic)
3835 return -EINVAL;
3836
3837 /* Check the number of available mpu_irqs */
3838 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3839 ;
3840
3841 if (irq_idx >= nr_irqs)
3842 return -EINVAL;
3843
3844 if (!oh->mux->irqs) {
3845 /* XXX What frees this? */
3846 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3847 GFP_KERNEL);
3848 if (!oh->mux->irqs)
3849 return -ENOMEM;
3850 }
3851 oh->mux->irqs[pad_idx] = irq_idx;
3852
3853 return 0;
3854}
9ebfd285
KH
3855
3856/**
3857 * omap_hwmod_init - initialize the hwmod code
3858 *
3859 * Sets up some function pointers needed by the hwmod code to operate on the
3860 * currently-booted SoC. Intended to be called once during kernel init
3861 * before any hwmods are registered. No return value.
3862 */
3863void __init omap_hwmod_init(void)
3864{
8f6aa8ee
KH
3865 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3866 soc_ops.wait_target_ready = _omap2_wait_target_ready;
b8249cf2
KH
3867 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3868 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3869 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
05e152c7 3870 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
9ebfd285
KH
3871 soc_ops.enable_module = _omap4_enable_module;
3872 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 3873 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
3874 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3875 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3876 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 3877 soc_ops.init_clkdm = _init_clkdm;
1688bf19
VH
3878 } else if (soc_is_am33xx()) {
3879 soc_ops.enable_module = _am33xx_enable_module;
3880 soc_ops.disable_module = _am33xx_disable_module;
3881 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
3882 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
3883 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3884 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
3885 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
3886 } else {
3887 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
3888 }
3889
3890 inited = true;
3891}
68c9a95e
TL
3892
3893/**
3894 * omap_hwmod_get_main_clk - get pointer to main clock name
3895 * @oh: struct omap_hwmod *
3896 *
3897 * Returns the main clock name assocated with @oh upon success,
3898 * or NULL if @oh is NULL.
3899 */
3900const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3901{
3902 if (!oh)
3903 return NULL;
3904
3905 return oh->main_clk;
3906}