ARM: dts: OMAP5: Add watchdog timer node
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
f5dd3bb5 133#include <linux/clk-provider.h>
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134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
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142#include <asm/system_misc.h>
143
a135eaae 144#include "clock.h"
2a296c8f 145#include "omap_hwmod.h"
63c85238 146
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147#include "soc.h"
148#include "common.h"
149#include "clockdomain.h"
150#include "powerdomain.h"
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151#include "cm2xxx.h"
152#include "cm3xxx.h"
d0f0631d 153#include "cminst44xx.h"
1688bf19 154#include "cm33xx.h"
b13159af 155#include "prm.h"
139563ad 156#include "prm3xxx.h"
d198b514 157#include "prm44xx.h"
1688bf19 158#include "prm33xx.h"
eaac329d 159#include "prminst44xx.h"
8d9af88f 160#include "mux.h"
5165882a 161#include "pm.h"
63c85238 162
63c85238 163/* Name of the OMAP hwmod for the MPU */
5c2c0296 164#define MPU_INITIATOR_NAME "mpu"
63c85238 165
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166/*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170#define LINKS_PER_OCP_IF 2
171
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172/**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 184 int (*wait_target_ready)(struct omap_hwmod *oh);
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185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
0a179eaa 191 int (*init_clkdm)(struct omap_hwmod *oh);
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192 void (*update_context_lost)(struct omap_hwmod *oh);
193 int (*get_context_lost)(struct omap_hwmod *oh);
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194};
195
196/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
197static struct omap_hwmod_soc_ops soc_ops;
198
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199/* omap_hwmod_list contains all registered struct omap_hwmods */
200static LIST_HEAD(omap_hwmod_list);
201
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202/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
203static struct omap_hwmod *mpu_oh;
204
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205/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
206static DEFINE_SPINLOCK(io_chain_lock);
207
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208/*
209 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
210 * allocated from - used to reduce the number of small memory
211 * allocations, which has a significant impact on performance
212 */
213static struct omap_hwmod_link *linkspace;
214
215/*
216 * free_ls, max_ls: array indexes into linkspace; representing the
217 * next free struct omap_hwmod_link index, and the maximum number of
218 * struct omap_hwmod_link records allocated (respectively)
219 */
220static unsigned short free_ls, max_ls, ls_supp;
63c85238 221
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222/* inited: set to true once the hwmod code is initialized */
223static bool inited;
224
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225/* Private functions */
226
5d95dde7 227/**
11cd4b94 228 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 229 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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230 * @i: pointer to the index of the element pointed to by @p in the list
231 *
232 * Return a pointer to the struct omap_hwmod_ocp_if record
233 * containing the struct list_head pointed to by @p, and increment
234 * @p such that a future call to this routine will return the next
235 * record.
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236 */
237static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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238 int *i)
239{
240 struct omap_hwmod_ocp_if *oi;
241
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242 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
243 *p = (*p)->next;
2221b5cd 244
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245 *i = *i + 1;
246
247 return oi;
248}
249
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250/**
251 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
252 * @oh: struct omap_hwmod *
253 *
254 * Load the current value of the hwmod OCP_SYSCONFIG register into the
255 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
256 * OCP_SYSCONFIG register or 0 upon success.
257 */
258static int _update_sysc_cache(struct omap_hwmod *oh)
259{
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260 if (!oh->class->sysc) {
261 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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262 return -EINVAL;
263 }
264
265 /* XXX ensure module interface clock is up */
266
cc7a1d2a 267 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 268
43b40992 269 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 270 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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271
272 return 0;
273}
274
275/**
276 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
277 * @v: OCP_SYSCONFIG value to write
278 * @oh: struct omap_hwmod *
279 *
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280 * Write @v into the module class' OCP_SYSCONFIG register, if it has
281 * one. No return value.
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282 */
283static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
284{
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285 if (!oh->class->sysc) {
286 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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287 return;
288 }
289
290 /* XXX ensure module interface clock is up */
291
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292 /* Module might have lost context, always update cache and register */
293 oh->_sysc_cache = v;
294 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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295}
296
297/**
298 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
299 * @oh: struct omap_hwmod *
300 * @standbymode: MIDLEMODE field bits
301 * @v: pointer to register contents to modify
302 *
303 * Update the master standby mode bits in @v to be @standbymode for
304 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
305 * upon error or 0 upon success.
306 */
307static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
308 u32 *v)
309{
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310 u32 mstandby_mask;
311 u8 mstandby_shift;
312
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313 if (!oh->class->sysc ||
314 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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315 return -EINVAL;
316
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317 if (!oh->class->sysc->sysc_fields) {
318 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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319 return -EINVAL;
320 }
321
43b40992 322 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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323 mstandby_mask = (0x3 << mstandby_shift);
324
325 *v &= ~mstandby_mask;
326 *v |= __ffs(standbymode) << mstandby_shift;
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327
328 return 0;
329}
330
331/**
332 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
333 * @oh: struct omap_hwmod *
334 * @idlemode: SIDLEMODE field bits
335 * @v: pointer to register contents to modify
336 *
337 * Update the slave idle mode bits in @v to be @idlemode for the @oh
338 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
339 * or 0 upon success.
340 */
341static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
342{
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343 u32 sidle_mask;
344 u8 sidle_shift;
345
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346 if (!oh->class->sysc ||
347 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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348 return -EINVAL;
349
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350 if (!oh->class->sysc->sysc_fields) {
351 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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352 return -EINVAL;
353 }
354
43b40992 355 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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356 sidle_mask = (0x3 << sidle_shift);
357
358 *v &= ~sidle_mask;
359 *v |= __ffs(idlemode) << sidle_shift;
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360
361 return 0;
362}
363
364/**
365 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
366 * @oh: struct omap_hwmod *
367 * @clockact: CLOCKACTIVITY field bits
368 * @v: pointer to register contents to modify
369 *
370 * Update the clockactivity mode bits in @v to be @clockact for the
371 * @oh hwmod. Used for additional powersaving on some modules. Does
372 * not write to the hardware. Returns -EINVAL upon error or 0 upon
373 * success.
374 */
375static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
376{
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377 u32 clkact_mask;
378 u8 clkact_shift;
379
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380 if (!oh->class->sysc ||
381 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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382 return -EINVAL;
383
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384 if (!oh->class->sysc->sysc_fields) {
385 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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386 return -EINVAL;
387 }
388
43b40992 389 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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390 clkact_mask = (0x3 << clkact_shift);
391
392 *v &= ~clkact_mask;
393 *v |= clockact << clkact_shift;
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394
395 return 0;
396}
397
398/**
399 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
400 * @oh: struct omap_hwmod *
401 * @v: pointer to register contents to modify
402 *
403 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
404 * error or 0 upon success.
405 */
406static int _set_softreset(struct omap_hwmod *oh, u32 *v)
407{
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408 u32 softrst_mask;
409
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410 if (!oh->class->sysc ||
411 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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412 return -EINVAL;
413
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414 if (!oh->class->sysc->sysc_fields) {
415 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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416 return -EINVAL;
417 }
418
43b40992 419 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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420
421 *v |= softrst_mask;
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422
423 return 0;
424}
425
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426/**
427 * _wait_softreset_complete - wait for an OCP softreset to complete
428 * @oh: struct omap_hwmod * to wait on
429 *
430 * Wait until the IP block represented by @oh reports that its OCP
431 * softreset is complete. This can be triggered by software (see
432 * _ocp_softreset()) or by hardware upon returning from off-mode (one
433 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
434 * microseconds. Returns the number of microseconds waited.
435 */
436static int _wait_softreset_complete(struct omap_hwmod *oh)
437{
438 struct omap_hwmod_class_sysconfig *sysc;
439 u32 softrst_mask;
440 int c = 0;
441
442 sysc = oh->class->sysc;
443
444 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
445 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
446 & SYSS_RESETDONE_MASK),
447 MAX_MODULE_SOFTRESET_WAIT, c);
448 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
449 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
450 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
451 & softrst_mask),
452 MAX_MODULE_SOFTRESET_WAIT, c);
453 }
454
455 return c;
456}
457
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458/**
459 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
460 * @oh: struct omap_hwmod *
461 *
462 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
463 * of some modules. When the DMA must perform read/write accesses, the
464 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
465 * for power management, software must set the DMADISABLE bit back to 1.
466 *
467 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
468 * error or 0 upon success.
469 */
470static int _set_dmadisable(struct omap_hwmod *oh)
471{
472 u32 v;
473 u32 dmadisable_mask;
474
475 if (!oh->class->sysc ||
476 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
477 return -EINVAL;
478
479 if (!oh->class->sysc->sysc_fields) {
480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
481 return -EINVAL;
482 }
483
484 /* clocks must be on for this operation */
485 if (oh->_state != _HWMOD_STATE_ENABLED) {
486 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
487 return -EINVAL;
488 }
489
490 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
491
492 v = oh->_sysc_cache;
493 dmadisable_mask =
494 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
495 v |= dmadisable_mask;
496 _write_sysconfig(v, oh);
497
498 return 0;
499}
500
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501/**
502 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
503 * @oh: struct omap_hwmod *
504 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
505 * @v: pointer to register contents to modify
506 *
507 * Update the module autoidle bit in @v to be @autoidle for the @oh
508 * hwmod. The autoidle bit controls whether the module can gate
509 * internal clocks automatically when it isn't doing anything; the
510 * exact function of this bit varies on a per-module basis. This
511 * function does not write to the hardware. Returns -EINVAL upon
512 * error or 0 upon success.
513 */
514static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
515 u32 *v)
516{
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517 u32 autoidle_mask;
518 u8 autoidle_shift;
519
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520 if (!oh->class->sysc ||
521 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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522 return -EINVAL;
523
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524 if (!oh->class->sysc->sysc_fields) {
525 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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526 return -EINVAL;
527 }
528
43b40992 529 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 530 autoidle_mask = (0x1 << autoidle_shift);
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531
532 *v &= ~autoidle_mask;
533 *v |= autoidle << autoidle_shift;
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534
535 return 0;
536}
537
eceec009
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538/**
539 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
540 * @oh: struct omap_hwmod *
541 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
542 *
543 * Set or clear the I/O pad wakeup flag in the mux entries for the
544 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
545 * in memory. If the hwmod is currently idled, and the new idle
546 * values don't match the previous ones, this function will also
547 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
548 * currently idled, this function won't touch the hardware: the new
549 * mux settings are written to the SCM PADCTRL registers when the
550 * hwmod is idled. No return value.
551 */
552static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
553{
554 struct omap_device_pad *pad;
555 bool change = false;
556 u16 prev_idle;
557 int j;
558
559 if (!oh->mux || !oh->mux->enabled)
560 return;
561
562 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
563 pad = oh->mux->pads_dynamic[j];
564
565 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
566 continue;
567
568 prev_idle = pad->idle;
569
570 if (set_wake)
571 pad->idle |= OMAP_WAKEUP_EN;
572 else
573 pad->idle &= ~OMAP_WAKEUP_EN;
574
575 if (prev_idle != pad->idle)
576 change = true;
577 }
578
579 if (change && oh->_state == _HWMOD_STATE_IDLE)
580 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
581}
582
63c85238
PW
583/**
584 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
585 * @oh: struct omap_hwmod *
586 *
587 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
588 * upon error or 0 upon success.
589 */
5a7ddcbd 590static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 591{
43b40992 592 if (!oh->class->sysc ||
86009eb3 593 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
594 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
595 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
596 return -EINVAL;
597
43b40992
PW
598 if (!oh->class->sysc->sysc_fields) {
599 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
600 return -EINVAL;
601 }
602
1fe74113
BC
603 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
604 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 605
86009eb3
BC
606 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
607 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
608 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
609 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 610
63c85238
PW
611 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
612
63c85238
PW
613 return 0;
614}
615
616/**
617 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
618 * @oh: struct omap_hwmod *
619 *
620 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
621 * upon error or 0 upon success.
622 */
5a7ddcbd 623static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 624{
43b40992 625 if (!oh->class->sysc ||
86009eb3 626 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
627 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
628 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
629 return -EINVAL;
630
43b40992
PW
631 if (!oh->class->sysc->sysc_fields) {
632 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
633 return -EINVAL;
634 }
635
1fe74113
BC
636 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
637 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 638
86009eb3
BC
639 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
640 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 641 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 642 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 643
63c85238
PW
644 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
645
63c85238
PW
646 return 0;
647}
648
f5dd3bb5
RN
649static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
650{
c4a1ea2c
RN
651 struct clk_hw_omap *clk;
652
f5dd3bb5
RN
653 if (oh->clkdm) {
654 return oh->clkdm;
655 } else if (oh->_clk) {
f5dd3bb5
RN
656 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
657 return clk->clkdm;
f5dd3bb5
RN
658 }
659 return NULL;
660}
661
63c85238
PW
662/**
663 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
664 * @oh: struct omap_hwmod *
665 *
666 * Prevent the hardware module @oh from entering idle while the
667 * hardare module initiator @init_oh is active. Useful when a module
668 * will be accessed by a particular initiator (e.g., if a module will
669 * be accessed by the IVA, there should be a sleepdep between the IVA
670 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
671 * mode. If the clockdomain is marked as not needing autodeps, return
672 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
673 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
674 */
675static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
676{
f5dd3bb5
RN
677 struct clockdomain *clkdm, *init_clkdm;
678
679 clkdm = _get_clkdm(oh);
680 init_clkdm = _get_clkdm(init_oh);
681
682 if (!clkdm || !init_clkdm)
63c85238
PW
683 return -EINVAL;
684
f5dd3bb5 685 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
570b54c7
PW
686 return 0;
687
f5dd3bb5 688 return clkdm_add_sleepdep(clkdm, init_clkdm);
63c85238
PW
689}
690
691/**
692 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
693 * @oh: struct omap_hwmod *
694 *
695 * Allow the hardware module @oh to enter idle while the hardare
696 * module initiator @init_oh is active. Useful when a module will not
697 * be accessed by a particular initiator (e.g., if a module will not
698 * be accessed by the IVA, there should be no sleepdep between the IVA
699 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
700 * mode. If the clockdomain is marked as not needing autodeps, return
701 * 0 without doing anything. Returns -EINVAL upon error or passes
702 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
703 */
704static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
705{
f5dd3bb5
RN
706 struct clockdomain *clkdm, *init_clkdm;
707
708 clkdm = _get_clkdm(oh);
709 init_clkdm = _get_clkdm(init_oh);
710
711 if (!clkdm || !init_clkdm)
63c85238
PW
712 return -EINVAL;
713
f5dd3bb5 714 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
570b54c7
PW
715 return 0;
716
f5dd3bb5 717 return clkdm_del_sleepdep(clkdm, init_clkdm);
63c85238
PW
718}
719
720/**
721 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
722 * @oh: struct omap_hwmod *
723 *
724 * Called from _init_clocks(). Populates the @oh _clk (main
725 * functional clock pointer) if a main_clk is present. Returns 0 on
726 * success or -EINVAL on error.
727 */
728static int _init_main_clk(struct omap_hwmod *oh)
729{
63c85238
PW
730 int ret = 0;
731
50ebdac2 732 if (!oh->main_clk)
63c85238
PW
733 return 0;
734
6ea74cb9
RN
735 oh->_clk = clk_get(NULL, oh->main_clk);
736 if (IS_ERR(oh->_clk)) {
20383d82
BC
737 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
738 oh->name, oh->main_clk);
63403384 739 return -EINVAL;
dc75925d 740 }
4d7cb45e
RN
741 /*
742 * HACK: This needs a re-visit once clk_prepare() is implemented
743 * to do something meaningful. Today its just a no-op.
744 * If clk_prepare() is used at some point to do things like
745 * voltage scaling etc, then this would have to be moved to
746 * some point where subsystems like i2c and pmic become
747 * available.
748 */
749 clk_prepare(oh->_clk);
63c85238 750
f5dd3bb5 751 if (!_get_clkdm(oh))
3bb05dbf 752 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
5dcc3b97 753 oh->name, oh->main_clk);
81d7c6ff 754
63c85238
PW
755 return ret;
756}
757
758/**
887adeac 759 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
760 * @oh: struct omap_hwmod *
761 *
762 * Called from _init_clocks(). Populates the @oh OCP slave interface
763 * clock pointers. Returns 0 on success or -EINVAL on error.
764 */
765static int _init_interface_clks(struct omap_hwmod *oh)
766{
5d95dde7 767 struct omap_hwmod_ocp_if *os;
11cd4b94 768 struct list_head *p;
63c85238 769 struct clk *c;
5d95dde7 770 int i = 0;
63c85238
PW
771 int ret = 0;
772
11cd4b94 773 p = oh->slave_ports.next;
2221b5cd 774
5d95dde7 775 while (i < oh->slaves_cnt) {
11cd4b94 776 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 777 if (!os->clk)
63c85238
PW
778 continue;
779
6ea74cb9
RN
780 c = clk_get(NULL, os->clk);
781 if (IS_ERR(c)) {
20383d82
BC
782 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
783 oh->name, os->clk);
63c85238 784 ret = -EINVAL;
dc75925d 785 }
63c85238 786 os->_clk = c;
4d7cb45e
RN
787 /*
788 * HACK: This needs a re-visit once clk_prepare() is implemented
789 * to do something meaningful. Today its just a no-op.
790 * If clk_prepare() is used at some point to do things like
791 * voltage scaling etc, then this would have to be moved to
792 * some point where subsystems like i2c and pmic become
793 * available.
794 */
795 clk_prepare(os->_clk);
63c85238
PW
796 }
797
798 return ret;
799}
800
801/**
802 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
803 * @oh: struct omap_hwmod *
804 *
805 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
806 * clock pointers. Returns 0 on success or -EINVAL on error.
807 */
808static int _init_opt_clks(struct omap_hwmod *oh)
809{
810 struct omap_hwmod_opt_clk *oc;
811 struct clk *c;
812 int i;
813 int ret = 0;
814
815 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
6ea74cb9
RN
816 c = clk_get(NULL, oc->clk);
817 if (IS_ERR(c)) {
20383d82
BC
818 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
819 oh->name, oc->clk);
63c85238 820 ret = -EINVAL;
dc75925d 821 }
63c85238 822 oc->_clk = c;
4d7cb45e
RN
823 /*
824 * HACK: This needs a re-visit once clk_prepare() is implemented
825 * to do something meaningful. Today its just a no-op.
826 * If clk_prepare() is used at some point to do things like
827 * voltage scaling etc, then this would have to be moved to
828 * some point where subsystems like i2c and pmic become
829 * available.
830 */
831 clk_prepare(oc->_clk);
63c85238
PW
832 }
833
834 return ret;
835}
836
837/**
838 * _enable_clocks - enable hwmod main clock and interface clocks
839 * @oh: struct omap_hwmod *
840 *
841 * Enables all clocks necessary for register reads and writes to succeed
842 * on the hwmod @oh. Returns 0.
843 */
844static int _enable_clocks(struct omap_hwmod *oh)
845{
5d95dde7 846 struct omap_hwmod_ocp_if *os;
11cd4b94 847 struct list_head *p;
5d95dde7 848 int i = 0;
63c85238
PW
849
850 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
851
4d3ae5a9 852 if (oh->_clk)
63c85238
PW
853 clk_enable(oh->_clk);
854
11cd4b94 855 p = oh->slave_ports.next;
2221b5cd 856
5d95dde7 857 while (i < oh->slaves_cnt) {
11cd4b94 858 os = _fetch_next_ocp_if(&p, &i);
63c85238 859
5d95dde7
PW
860 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
861 clk_enable(os->_clk);
63c85238
PW
862 }
863
864 /* The opt clocks are controlled by the device driver. */
865
866 return 0;
867}
868
869/**
870 * _disable_clocks - disable hwmod main clock and interface clocks
871 * @oh: struct omap_hwmod *
872 *
873 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
874 */
875static int _disable_clocks(struct omap_hwmod *oh)
876{
5d95dde7 877 struct omap_hwmod_ocp_if *os;
11cd4b94 878 struct list_head *p;
5d95dde7 879 int i = 0;
63c85238
PW
880
881 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
882
4d3ae5a9 883 if (oh->_clk)
63c85238
PW
884 clk_disable(oh->_clk);
885
11cd4b94 886 p = oh->slave_ports.next;
2221b5cd 887
5d95dde7 888 while (i < oh->slaves_cnt) {
11cd4b94 889 os = _fetch_next_ocp_if(&p, &i);
63c85238 890
5d95dde7
PW
891 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
892 clk_disable(os->_clk);
63c85238
PW
893 }
894
895 /* The opt clocks are controlled by the device driver. */
896
897 return 0;
898}
899
96835af9
BC
900static void _enable_optional_clocks(struct omap_hwmod *oh)
901{
902 struct omap_hwmod_opt_clk *oc;
903 int i;
904
905 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
906
907 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
908 if (oc->_clk) {
909 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
5dcc3b97 910 __clk_get_name(oc->_clk));
96835af9
BC
911 clk_enable(oc->_clk);
912 }
913}
914
915static void _disable_optional_clocks(struct omap_hwmod *oh)
916{
917 struct omap_hwmod_opt_clk *oc;
918 int i;
919
920 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
921
922 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
923 if (oc->_clk) {
924 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
5dcc3b97 925 __clk_get_name(oc->_clk));
96835af9
BC
926 clk_disable(oc->_clk);
927 }
928}
929
45c38252 930/**
3d9f0327 931 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
932 * @oh: struct omap_hwmod *
933 *
934 * Enables the PRCM module mode related to the hwmod @oh.
935 * No return value.
936 */
3d9f0327 937static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 938{
45c38252
BC
939 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
940 return;
941
3d9f0327
KH
942 pr_debug("omap_hwmod: %s: %s: %d\n",
943 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
944
945 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
946 oh->clkdm->prcm_partition,
947 oh->clkdm->cm_inst,
948 oh->clkdm->clkdm_offs,
949 oh->prcm.omap4.clkctrl_offs);
950}
951
1688bf19
VH
952/**
953 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
954 * @oh: struct omap_hwmod *
955 *
956 * Enables the PRCM module mode related to the hwmod @oh.
957 * No return value.
958 */
959static void _am33xx_enable_module(struct omap_hwmod *oh)
960{
961 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
962 return;
963
964 pr_debug("omap_hwmod: %s: %s: %d\n",
965 oh->name, __func__, oh->prcm.omap4.modulemode);
966
967 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
968 oh->clkdm->clkdm_offs,
969 oh->prcm.omap4.clkctrl_offs);
970}
971
45c38252 972/**
bfc141e3
BC
973 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
974 * @oh: struct omap_hwmod *
975 *
976 * Wait for a module @oh to enter slave idle. Returns 0 if the module
977 * does not have an IDLEST bit or if the module successfully enters
978 * slave idle; otherwise, pass along the return value of the
979 * appropriate *_cm*_wait_module_idle() function.
980 */
981static int _omap4_wait_target_disable(struct omap_hwmod *oh)
982{
2b026d13 983 if (!oh)
bfc141e3
BC
984 return -EINVAL;
985
2b026d13 986 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
bfc141e3
BC
987 return 0;
988
989 if (oh->flags & HWMOD_NO_IDLEST)
990 return 0;
991
992 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
993 oh->clkdm->cm_inst,
994 oh->clkdm->clkdm_offs,
995 oh->prcm.omap4.clkctrl_offs);
996}
997
1688bf19
VH
998/**
999 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
1000 * @oh: struct omap_hwmod *
1001 *
1002 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1003 * does not have an IDLEST bit or if the module successfully enters
1004 * slave idle; otherwise, pass along the return value of the
1005 * appropriate *_cm*_wait_module_idle() function.
1006 */
1007static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
1008{
1009 if (!oh)
1010 return -EINVAL;
1011
1012 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1013 return 0;
1014
1015 if (oh->flags & HWMOD_NO_IDLEST)
1016 return 0;
1017
1018 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
1019 oh->clkdm->clkdm_offs,
1020 oh->prcm.omap4.clkctrl_offs);
1021}
1022
212738a4
PW
1023/**
1024 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1025 * @oh: struct omap_hwmod *oh
1026 *
1027 * Count and return the number of MPU IRQs associated with the hwmod
1028 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1029 * NULL.
1030 */
1031static int _count_mpu_irqs(struct omap_hwmod *oh)
1032{
1033 struct omap_hwmod_irq_info *ohii;
1034 int i = 0;
1035
1036 if (!oh || !oh->mpu_irqs)
1037 return 0;
1038
1039 do {
1040 ohii = &oh->mpu_irqs[i++];
1041 } while (ohii->irq != -1);
1042
cc1b0765 1043 return i-1;
212738a4
PW
1044}
1045
bc614958
PW
1046/**
1047 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1048 * @oh: struct omap_hwmod *oh
1049 *
1050 * Count and return the number of SDMA request lines associated with
1051 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1052 * if @oh is NULL.
1053 */
1054static int _count_sdma_reqs(struct omap_hwmod *oh)
1055{
1056 struct omap_hwmod_dma_info *ohdi;
1057 int i = 0;
1058
1059 if (!oh || !oh->sdma_reqs)
1060 return 0;
1061
1062 do {
1063 ohdi = &oh->sdma_reqs[i++];
1064 } while (ohdi->dma_req != -1);
1065
cc1b0765 1066 return i-1;
bc614958
PW
1067}
1068
78183f3f
PW
1069/**
1070 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1071 * @oh: struct omap_hwmod *oh
1072 *
1073 * Count and return the number of address space ranges associated with
1074 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1075 * if @oh is NULL.
1076 */
1077static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1078{
1079 struct omap_hwmod_addr_space *mem;
1080 int i = 0;
1081
1082 if (!os || !os->addr)
1083 return 0;
1084
1085 do {
1086 mem = &os->addr[i++];
1087 } while (mem->pa_start != mem->pa_end);
1088
cc1b0765 1089 return i-1;
78183f3f
PW
1090}
1091
5e8370f1
PW
1092/**
1093 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1094 * @oh: struct omap_hwmod * to operate on
1095 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1096 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1097 *
1098 * Retrieve a MPU hardware IRQ line number named by @name associated
1099 * with the IP block pointed to by @oh. The IRQ number will be filled
1100 * into the address pointed to by @dma. When @name is non-null, the
1101 * IRQ line number associated with the named entry will be returned.
1102 * If @name is null, the first matching entry will be returned. Data
1103 * order is not meaningful in hwmod data, so callers are strongly
1104 * encouraged to use a non-null @name whenever possible to avoid
1105 * unpredictable effects if hwmod data is later added that causes data
1106 * ordering to change. Returns 0 upon success or a negative error
1107 * code upon error.
1108 */
1109static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1110 unsigned int *irq)
1111{
1112 int i;
1113 bool found = false;
1114
1115 if (!oh->mpu_irqs)
1116 return -ENOENT;
1117
1118 i = 0;
1119 while (oh->mpu_irqs[i].irq != -1) {
1120 if (name == oh->mpu_irqs[i].name ||
1121 !strcmp(name, oh->mpu_irqs[i].name)) {
1122 found = true;
1123 break;
1124 }
1125 i++;
1126 }
1127
1128 if (!found)
1129 return -ENOENT;
1130
1131 *irq = oh->mpu_irqs[i].irq;
1132
1133 return 0;
1134}
1135
1136/**
1137 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1138 * @oh: struct omap_hwmod * to operate on
1139 * @name: pointer to the name of the SDMA request line to fetch (optional)
1140 * @dma: pointer to an unsigned int to store the request line ID to
1141 *
1142 * Retrieve an SDMA request line ID named by @name on the IP block
1143 * pointed to by @oh. The ID will be filled into the address pointed
1144 * to by @dma. When @name is non-null, the request line ID associated
1145 * with the named entry will be returned. If @name is null, the first
1146 * matching entry will be returned. Data order is not meaningful in
1147 * hwmod data, so callers are strongly encouraged to use a non-null
1148 * @name whenever possible to avoid unpredictable effects if hwmod
1149 * data is later added that causes data ordering to change. Returns 0
1150 * upon success or a negative error code upon error.
1151 */
1152static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1153 unsigned int *dma)
1154{
1155 int i;
1156 bool found = false;
1157
1158 if (!oh->sdma_reqs)
1159 return -ENOENT;
1160
1161 i = 0;
1162 while (oh->sdma_reqs[i].dma_req != -1) {
1163 if (name == oh->sdma_reqs[i].name ||
1164 !strcmp(name, oh->sdma_reqs[i].name)) {
1165 found = true;
1166 break;
1167 }
1168 i++;
1169 }
1170
1171 if (!found)
1172 return -ENOENT;
1173
1174 *dma = oh->sdma_reqs[i].dma_req;
1175
1176 return 0;
1177}
1178
1179/**
1180 * _get_addr_space_by_name - fetch address space start & end by name
1181 * @oh: struct omap_hwmod * to operate on
1182 * @name: pointer to the name of the address space to fetch (optional)
1183 * @pa_start: pointer to a u32 to store the starting address to
1184 * @pa_end: pointer to a u32 to store the ending address to
1185 *
1186 * Retrieve address space start and end addresses for the IP block
1187 * pointed to by @oh. The data will be filled into the addresses
1188 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1189 * address space data associated with the named entry will be
1190 * returned. If @name is null, the first matching entry will be
1191 * returned. Data order is not meaningful in hwmod data, so callers
1192 * are strongly encouraged to use a non-null @name whenever possible
1193 * to avoid unpredictable effects if hwmod data is later added that
1194 * causes data ordering to change. Returns 0 upon success or a
1195 * negative error code upon error.
1196 */
1197static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1198 u32 *pa_start, u32 *pa_end)
1199{
1200 int i, j;
1201 struct omap_hwmod_ocp_if *os;
2221b5cd 1202 struct list_head *p = NULL;
5e8370f1
PW
1203 bool found = false;
1204
11cd4b94 1205 p = oh->slave_ports.next;
2221b5cd 1206
5d95dde7
PW
1207 i = 0;
1208 while (i < oh->slaves_cnt) {
11cd4b94 1209 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1210
1211 if (!os->addr)
1212 return -ENOENT;
1213
1214 j = 0;
1215 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1216 if (name == os->addr[j].name ||
1217 !strcmp(name, os->addr[j].name)) {
1218 found = true;
1219 break;
1220 }
1221 j++;
1222 }
1223
1224 if (found)
1225 break;
1226 }
1227
1228 if (!found)
1229 return -ENOENT;
1230
1231 *pa_start = os->addr[j].pa_start;
1232 *pa_end = os->addr[j].pa_end;
1233
1234 return 0;
1235}
1236
63c85238 1237/**
24dbc213 1238 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1239 * @oh: struct omap_hwmod *
1240 *
24dbc213
PW
1241 * Determines the array index of the OCP slave port that the MPU uses
1242 * to address the device, and saves it into the struct omap_hwmod.
1243 * Intended to be called during hwmod registration only. No return
1244 * value.
63c85238 1245 */
24dbc213 1246static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1247{
24dbc213 1248 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1249 struct list_head *p;
5d95dde7 1250 int i = 0;
63c85238 1251
5d95dde7 1252 if (!oh)
24dbc213
PW
1253 return;
1254
1255 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1256
11cd4b94 1257 p = oh->slave_ports.next;
2221b5cd 1258
5d95dde7 1259 while (i < oh->slaves_cnt) {
11cd4b94 1260 os = _fetch_next_ocp_if(&p, &i);
63c85238 1261 if (os->user & OCP_USER_MPU) {
2221b5cd 1262 oh->_mpu_port = os;
24dbc213 1263 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1264 break;
1265 }
1266 }
1267
24dbc213 1268 return;
63c85238
PW
1269}
1270
2d6141ba
PW
1271/**
1272 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1273 * @oh: struct omap_hwmod *
1274 *
1275 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1276 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1277 * communicate with the IP block. This interface need not be directly
1278 * connected to the MPU (and almost certainly is not), but is directly
1279 * connected to the IP block represented by @oh. Returns a pointer
1280 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1281 * error or if there does not appear to be a path from the MPU to this
1282 * IP block.
1283 */
1284static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1285{
1286 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1287 return NULL;
1288
11cd4b94 1289 return oh->_mpu_port;
2d6141ba
PW
1290};
1291
63c85238 1292/**
c9aafd23 1293 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1294 * @oh: struct omap_hwmod *
1295 *
c9aafd23
PW
1296 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1297 * the register target MPU address space; or returns NULL upon error.
63c85238 1298 */
c9aafd23 1299static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1300{
1301 struct omap_hwmod_ocp_if *os;
1302 struct omap_hwmod_addr_space *mem;
c9aafd23 1303 int found = 0, i = 0;
63c85238 1304
2d6141ba 1305 os = _find_mpu_rt_port(oh);
24dbc213 1306 if (!os || !os->addr)
78183f3f
PW
1307 return NULL;
1308
1309 do {
1310 mem = &os->addr[i++];
1311 if (mem->flags & ADDR_TYPE_RT)
63c85238 1312 found = 1;
78183f3f 1313 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1314
c9aafd23 1315 return (found) ? mem : NULL;
63c85238
PW
1316}
1317
1318/**
74ff3a68 1319 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1320 * @oh: struct omap_hwmod *
1321 *
006c7f18
PW
1322 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1323 * by @oh is set to indicate to the PRCM that the IP block is active.
1324 * Usually this means placing the module into smart-idle mode and
1325 * smart-standby, but if there is a bug in the automatic idle handling
1326 * for the IP block, it may need to be placed into the force-idle or
1327 * no-idle variants of these modes. No return value.
63c85238 1328 */
74ff3a68 1329static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1330{
43b40992 1331 u8 idlemode, sf;
63c85238 1332 u32 v;
006c7f18 1333 bool clkdm_act;
f5dd3bb5 1334 struct clockdomain *clkdm;
63c85238 1335
43b40992 1336 if (!oh->class->sysc)
63c85238
PW
1337 return;
1338
613ad0e9
TK
1339 /*
1340 * Wait until reset has completed, this is needed as the IP
1341 * block is reset automatically by hardware in some cases
1342 * (off-mode for example), and the drivers require the
1343 * IP to be ready when they access it
1344 */
1345 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1346 _enable_optional_clocks(oh);
1347 _wait_softreset_complete(oh);
1348 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1349 _disable_optional_clocks(oh);
1350
63c85238 1351 v = oh->_sysc_cache;
43b40992 1352 sf = oh->class->sysc->sysc_flags;
63c85238 1353
f5dd3bb5 1354 clkdm = _get_clkdm(oh);
43b40992 1355 if (sf & SYSC_HAS_SIDLEMODE) {
f5dd3bb5 1356 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
006c7f18
PW
1357 if (clkdm_act && !(oh->class->sysc->idlemodes &
1358 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1359 idlemode = HWMOD_IDLEMODE_FORCE;
1360 else
1361 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1362 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1363 _set_slave_idlemode(oh, idlemode, &v);
1364 }
1365
43b40992 1366 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1367 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1368 idlemode = HWMOD_IDLEMODE_NO;
1369 } else {
1370 if (sf & SYSC_HAS_ENAWAKEUP)
1371 _enable_wakeup(oh, &v);
1372 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1373 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1374 else
1375 idlemode = HWMOD_IDLEMODE_SMART;
1376 }
63c85238
PW
1377 _set_master_standbymode(oh, idlemode, &v);
1378 }
1379
a16b1f7f
PW
1380 /*
1381 * XXX The clock framework should handle this, by
1382 * calling into this code. But this must wait until the
1383 * clock structures are tagged with omap_hwmod entries
1384 */
43b40992
PW
1385 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1386 (sf & SYSC_HAS_CLOCKACTIVITY))
1387 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1388
9980ce53
RN
1389 /* If slave is in SMARTIDLE, also enable wakeup */
1390 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1391 _enable_wakeup(oh, &v);
1392
1393 _write_sysconfig(v, oh);
78f26e87
HH
1394
1395 /*
1396 * Set the autoidle bit only after setting the smartidle bit
1397 * Setting this will not have any impact on the other modules.
1398 */
1399 if (sf & SYSC_HAS_AUTOIDLE) {
1400 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1401 0 : 1;
1402 _set_module_autoidle(oh, idlemode, &v);
1403 _write_sysconfig(v, oh);
1404 }
63c85238
PW
1405}
1406
1407/**
74ff3a68 1408 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1409 * @oh: struct omap_hwmod *
1410 *
1411 * If module is marked as SWSUP_SIDLE, force the module into slave
1412 * idle; otherwise, configure it for smart-idle. If module is marked
1413 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1414 * configure it for smart-standby. No return value.
1415 */
74ff3a68 1416static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1417{
43b40992 1418 u8 idlemode, sf;
63c85238
PW
1419 u32 v;
1420
43b40992 1421 if (!oh->class->sysc)
63c85238
PW
1422 return;
1423
1424 v = oh->_sysc_cache;
43b40992 1425 sf = oh->class->sysc->sysc_flags;
63c85238 1426
43b40992 1427 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1428 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1429 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1430 !(oh->class->sysc->idlemodes &
1431 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1432 idlemode = HWMOD_IDLEMODE_FORCE;
1433 else
1434 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1435 _set_slave_idlemode(oh, idlemode, &v);
1436 }
1437
43b40992 1438 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1439 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1440 idlemode = HWMOD_IDLEMODE_FORCE;
1441 } else {
1442 if (sf & SYSC_HAS_ENAWAKEUP)
1443 _enable_wakeup(oh, &v);
1444 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1445 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1446 else
1447 idlemode = HWMOD_IDLEMODE_SMART;
1448 }
63c85238
PW
1449 _set_master_standbymode(oh, idlemode, &v);
1450 }
1451
86009eb3
BC
1452 /* If slave is in SMARTIDLE, also enable wakeup */
1453 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1454 _enable_wakeup(oh, &v);
1455
63c85238
PW
1456 _write_sysconfig(v, oh);
1457}
1458
1459/**
74ff3a68 1460 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1461 * @oh: struct omap_hwmod *
1462 *
1463 * Force the module into slave idle and master suspend. No return
1464 * value.
1465 */
74ff3a68 1466static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1467{
1468 u32 v;
43b40992 1469 u8 sf;
63c85238 1470
43b40992 1471 if (!oh->class->sysc)
63c85238
PW
1472 return;
1473
1474 v = oh->_sysc_cache;
43b40992 1475 sf = oh->class->sysc->sysc_flags;
63c85238 1476
43b40992 1477 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1478 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1479
43b40992 1480 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1481 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1482
43b40992 1483 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1484 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1485
1486 _write_sysconfig(v, oh);
1487}
1488
1489/**
1490 * _lookup - find an omap_hwmod by name
1491 * @name: find an omap_hwmod by name
1492 *
1493 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1494 */
1495static struct omap_hwmod *_lookup(const char *name)
1496{
1497 struct omap_hwmod *oh, *temp_oh;
1498
1499 oh = NULL;
1500
1501 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1502 if (!strcmp(name, temp_oh->name)) {
1503 oh = temp_oh;
1504 break;
1505 }
1506 }
1507
1508 return oh;
1509}
868c157d 1510
6ae76997
BC
1511/**
1512 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1513 * @oh: struct omap_hwmod *
1514 *
1515 * Convert a clockdomain name stored in a struct omap_hwmod into a
1516 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1517 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1518 */
1519static int _init_clkdm(struct omap_hwmod *oh)
1520{
3bb05dbf
PW
1521 if (!oh->clkdm_name) {
1522 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
6ae76997 1523 return 0;
3bb05dbf 1524 }
6ae76997 1525
6ae76997
BC
1526 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1527 if (!oh->clkdm) {
1528 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1529 oh->name, oh->clkdm_name);
1530 return -EINVAL;
1531 }
1532
1533 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1534 oh->name, oh->clkdm_name);
1535
1536 return 0;
1537}
63c85238
PW
1538
1539/**
6ae76997
BC
1540 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1541 * well the clockdomain.
63c85238 1542 * @oh: struct omap_hwmod *
97d60162 1543 * @data: not used; pass NULL
63c85238 1544 *
a2debdbd 1545 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1546 * Resolves all clock names embedded in the hwmod. Returns 0 on
1547 * success, or a negative error code on failure.
63c85238 1548 */
97d60162 1549static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1550{
1551 int ret = 0;
1552
48d54f3f
PW
1553 if (oh->_state != _HWMOD_STATE_REGISTERED)
1554 return 0;
63c85238
PW
1555
1556 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1557
b797be1d
VH
1558 if (soc_ops.init_clkdm)
1559 ret |= soc_ops.init_clkdm(oh);
1560
63c85238
PW
1561 ret |= _init_main_clk(oh);
1562 ret |= _init_interface_clks(oh);
1563 ret |= _init_opt_clks(oh);
1564
f5c1f84b
BC
1565 if (!ret)
1566 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1567 else
1568 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1569
09c35f2f 1570 return ret;
63c85238
PW
1571}
1572
5365efbe 1573/**
cc1226e7 1574 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1575 * @oh: struct omap_hwmod *
1576 * @name: name of the reset line in the context of this hwmod
cc1226e7 1577 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1578 *
1579 * Return the bit position of the reset line that match the
1580 * input name. Return -ENOENT if not found.
1581 */
a032d33b
PW
1582static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1583 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1584{
1585 int i;
1586
1587 for (i = 0; i < oh->rst_lines_cnt; i++) {
1588 const char *rst_line = oh->rst_lines[i].name;
1589 if (!strcmp(rst_line, name)) {
cc1226e7 1590 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1591 ohri->st_shift = oh->rst_lines[i].st_shift;
1592 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1593 oh->name, __func__, rst_line, ohri->rst_shift,
1594 ohri->st_shift);
5365efbe 1595
cc1226e7 1596 return 0;
5365efbe
BC
1597 }
1598 }
1599
1600 return -ENOENT;
1601}
1602
1603/**
1604 * _assert_hardreset - assert the HW reset line of submodules
1605 * contained in the hwmod module.
1606 * @oh: struct omap_hwmod *
1607 * @name: name of the reset line to lookup and assert
1608 *
b8249cf2
KH
1609 * Some IP like dsp, ipu or iva contain processor that require an HW
1610 * reset line to be assert / deassert in order to enable fully the IP.
1611 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1612 * asserting the hardreset line on the currently-booted SoC, or passes
1613 * along the return value from _lookup_hardreset() or the SoC's
1614 * assert_hardreset code.
5365efbe
BC
1615 */
1616static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1617{
cc1226e7 1618 struct omap_hwmod_rst_info ohri;
a032d33b 1619 int ret = -EINVAL;
5365efbe
BC
1620
1621 if (!oh)
1622 return -EINVAL;
1623
b8249cf2
KH
1624 if (!soc_ops.assert_hardreset)
1625 return -ENOSYS;
1626
cc1226e7 1627 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1628 if (ret < 0)
cc1226e7 1629 return ret;
5365efbe 1630
b8249cf2
KH
1631 ret = soc_ops.assert_hardreset(oh, &ohri);
1632
1633 return ret;
5365efbe
BC
1634}
1635
1636/**
1637 * _deassert_hardreset - deassert the HW reset line of submodules contained
1638 * in the hwmod module.
1639 * @oh: struct omap_hwmod *
1640 * @name: name of the reset line to look up and deassert
1641 *
b8249cf2
KH
1642 * Some IP like dsp, ipu or iva contain processor that require an HW
1643 * reset line to be assert / deassert in order to enable fully the IP.
1644 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1645 * deasserting the hardreset line on the currently-booted SoC, or passes
1646 * along the return value from _lookup_hardreset() or the SoC's
1647 * deassert_hardreset code.
5365efbe
BC
1648 */
1649static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1650{
cc1226e7 1651 struct omap_hwmod_rst_info ohri;
b8249cf2 1652 int ret = -EINVAL;
e8e96dff 1653 int hwsup = 0;
5365efbe
BC
1654
1655 if (!oh)
1656 return -EINVAL;
1657
b8249cf2
KH
1658 if (!soc_ops.deassert_hardreset)
1659 return -ENOSYS;
1660
cc1226e7 1661 ret = _lookup_hardreset(oh, name, &ohri);
1662 if (IS_ERR_VALUE(ret))
1663 return ret;
5365efbe 1664
e8e96dff
ORL
1665 if (oh->clkdm) {
1666 /*
1667 * A clockdomain must be in SW_SUP otherwise reset
1668 * might not be completed. The clockdomain can be set
1669 * in HW_AUTO only when the module become ready.
1670 */
1671 hwsup = clkdm_in_hwsup(oh->clkdm);
1672 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1673 if (ret) {
1674 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1675 oh->name, oh->clkdm->name, ret);
1676 return ret;
1677 }
1678 }
1679
1680 _enable_clocks(oh);
1681 if (soc_ops.enable_module)
1682 soc_ops.enable_module(oh);
1683
b8249cf2 1684 ret = soc_ops.deassert_hardreset(oh, &ohri);
e8e96dff
ORL
1685
1686 if (soc_ops.disable_module)
1687 soc_ops.disable_module(oh);
1688 _disable_clocks(oh);
1689
cc1226e7 1690 if (ret == -EBUSY)
5365efbe
BC
1691 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1692
e8e96dff
ORL
1693 if (!ret) {
1694 /*
1695 * Set the clockdomain to HW_AUTO, assuming that the
1696 * previous state was HW_AUTO.
1697 */
1698 if (oh->clkdm && hwsup)
1699 clkdm_allow_idle(oh->clkdm);
1700 } else {
1701 if (oh->clkdm)
1702 clkdm_hwmod_disable(oh->clkdm, oh);
1703 }
1704
cc1226e7 1705 return ret;
5365efbe
BC
1706}
1707
1708/**
1709 * _read_hardreset - read the HW reset line state of submodules
1710 * contained in the hwmod module
1711 * @oh: struct omap_hwmod *
1712 * @name: name of the reset line to look up and read
1713 *
b8249cf2
KH
1714 * Return the state of the reset line. Returns -EINVAL if @oh is
1715 * null, -ENOSYS if we have no way of reading the hardreset line
1716 * status on the currently-booted SoC, or passes along the return
1717 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1718 * code.
5365efbe
BC
1719 */
1720static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1721{
cc1226e7 1722 struct omap_hwmod_rst_info ohri;
a032d33b 1723 int ret = -EINVAL;
5365efbe
BC
1724
1725 if (!oh)
1726 return -EINVAL;
1727
b8249cf2
KH
1728 if (!soc_ops.is_hardreset_asserted)
1729 return -ENOSYS;
1730
cc1226e7 1731 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1732 if (ret < 0)
cc1226e7 1733 return ret;
5365efbe 1734
b8249cf2 1735 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1736}
1737
747834ab 1738/**
eb05f691 1739 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
747834ab
PW
1740 * @oh: struct omap_hwmod *
1741 *
eb05f691
ORL
1742 * If all hardreset lines associated with @oh are asserted, then return true.
1743 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1744 * associated with @oh are asserted, then return false.
747834ab 1745 * This function is used to avoid executing some parts of the IP block
eb05f691 1746 * enable/disable sequence if its hardreset line is set.
747834ab 1747 */
eb05f691 1748static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
747834ab 1749{
eb05f691 1750 int i, rst_cnt = 0;
747834ab
PW
1751
1752 if (oh->rst_lines_cnt == 0)
1753 return false;
1754
1755 for (i = 0; i < oh->rst_lines_cnt; i++)
1756 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
eb05f691
ORL
1757 rst_cnt++;
1758
1759 if (oh->rst_lines_cnt == rst_cnt)
1760 return true;
747834ab
PW
1761
1762 return false;
1763}
1764
e9332b6e
PW
1765/**
1766 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1767 * hard-reset
1768 * @oh: struct omap_hwmod *
1769 *
1770 * If any hardreset lines associated with @oh are asserted, then
1771 * return true. Otherwise, if no hardreset lines associated with @oh
1772 * are asserted, or if @oh has no hardreset lines, then return false.
1773 * This function is used to avoid executing some parts of the IP block
1774 * enable/disable sequence if any hardreset line is set.
1775 */
1776static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1777{
1778 int rst_cnt = 0;
1779 int i;
1780
1781 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1782 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1783 rst_cnt++;
1784
1785 return (rst_cnt) ? true : false;
1786}
1787
747834ab
PW
1788/**
1789 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1790 * @oh: struct omap_hwmod *
1791 *
1792 * Disable the PRCM module mode related to the hwmod @oh.
1793 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1794 */
1795static int _omap4_disable_module(struct omap_hwmod *oh)
1796{
1797 int v;
1798
747834ab
PW
1799 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1800 return -EINVAL;
1801
eb05f691
ORL
1802 /*
1803 * Since integration code might still be doing something, only
1804 * disable if all lines are under hardreset.
1805 */
e9332b6e 1806 if (_are_any_hardreset_lines_asserted(oh))
eb05f691
ORL
1807 return 0;
1808
747834ab
PW
1809 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1810
1811 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1812 oh->clkdm->cm_inst,
1813 oh->clkdm->clkdm_offs,
1814 oh->prcm.omap4.clkctrl_offs);
1815
747834ab
PW
1816 v = _omap4_wait_target_disable(oh);
1817 if (v)
1818 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1819 oh->name);
1820
1821 return 0;
1822}
1823
1688bf19
VH
1824/**
1825 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1826 * @oh: struct omap_hwmod *
1827 *
1828 * Disable the PRCM module mode related to the hwmod @oh.
1829 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1830 */
1831static int _am33xx_disable_module(struct omap_hwmod *oh)
1832{
1833 int v;
1834
1835 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1836 return -EINVAL;
1837
1838 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1839
e9332b6e
PW
1840 if (_are_any_hardreset_lines_asserted(oh))
1841 return 0;
1842
1688bf19
VH
1843 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1844 oh->prcm.omap4.clkctrl_offs);
1845
1688bf19
VH
1846 v = _am33xx_wait_target_disable(oh);
1847 if (v)
1848 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1849 oh->name);
1850
1851 return 0;
1852}
1853
63c85238 1854/**
bd36179e 1855 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1856 * @oh: struct omap_hwmod *
1857 *
1858 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1859 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1860 * reset this way, -EINVAL if the hwmod is in the wrong state,
1861 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1862 *
1863 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1864 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1865 * use the SYSCONFIG softreset bit to provide the status.
1866 *
bd36179e
PW
1867 * Note that some IP like McBSP do have reset control but don't have
1868 * reset status.
63c85238 1869 */
bd36179e 1870static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1871{
613ad0e9 1872 u32 v;
6f8b7ff5 1873 int c = 0;
96835af9 1874 int ret = 0;
63c85238 1875
43b40992 1876 if (!oh->class->sysc ||
2cb06814 1877 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1878 return -ENOENT;
63c85238
PW
1879
1880 /* clocks must be on for this operation */
1881 if (oh->_state != _HWMOD_STATE_ENABLED) {
7852ec05
PW
1882 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1883 oh->name);
63c85238
PW
1884 return -EINVAL;
1885 }
1886
96835af9
BC
1887 /* For some modules, all optionnal clocks need to be enabled as well */
1888 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1889 _enable_optional_clocks(oh);
1890
bd36179e 1891 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1892
1893 v = oh->_sysc_cache;
96835af9
BC
1894 ret = _set_softreset(oh, &v);
1895 if (ret)
1896 goto dis_opt_clks;
63c85238
PW
1897 _write_sysconfig(v, oh);
1898
d99de7f5
FGL
1899 if (oh->class->sysc->srst_udelay)
1900 udelay(oh->class->sysc->srst_udelay);
1901
613ad0e9 1902 c = _wait_softreset_complete(oh);
5365efbe 1903 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1904 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1905 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1906 else
5365efbe 1907 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1908
1909 /*
1910 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1911 * _wait_target_ready() or _reset()
1912 */
1913
96835af9
BC
1914 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1915
1916dis_opt_clks:
1917 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1918 _disable_optional_clocks(oh);
1919
1920 return ret;
63c85238
PW
1921}
1922
bd36179e
PW
1923/**
1924 * _reset - reset an omap_hwmod
1925 * @oh: struct omap_hwmod *
1926 *
30e105c0
PW
1927 * Resets an omap_hwmod @oh. If the module has a custom reset
1928 * function pointer defined, then call it to reset the IP block, and
1929 * pass along its return value to the caller. Otherwise, if the IP
1930 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1931 * associated with it, call a function to reset the IP block via that
1932 * method, and pass along the return value to the caller. Finally, if
1933 * the IP block has some hardreset lines associated with it, assert
1934 * all of those, but do _not_ deassert them. (This is because driver
1935 * authors have expressed an apparent requirement to control the
1936 * deassertion of the hardreset lines themselves.)
1937 *
1938 * The default software reset mechanism for most OMAP IP blocks is
1939 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1940 * hwmods cannot be reset via this method. Some are not targets and
1941 * therefore have no OCP header registers to access. Others (like the
1942 * IVA) have idiosyncratic reset sequences. So for these relatively
1943 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
1944 * omap_hwmod_class .reset function pointer.
1945 *
1946 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1947 * does not prevent idling of the system. This is necessary for cases
1948 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1949 * kernel without disabling dma.
1950 *
1951 * Passes along the return value from either _ocp_softreset() or the
1952 * custom reset function - these must return -EINVAL if the hwmod
1953 * cannot be reset this way or if the hwmod is in the wrong state,
1954 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
1955 */
1956static int _reset(struct omap_hwmod *oh)
1957{
30e105c0 1958 int i, r;
bd36179e
PW
1959
1960 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1961
30e105c0
PW
1962 if (oh->class->reset) {
1963 r = oh->class->reset(oh);
1964 } else {
1965 if (oh->rst_lines_cnt > 0) {
1966 for (i = 0; i < oh->rst_lines_cnt; i++)
1967 _assert_hardreset(oh, oh->rst_lines[i].name);
1968 return 0;
1969 } else {
1970 r = _ocp_softreset(oh);
1971 if (r == -ENOENT)
1972 r = 0;
1973 }
1974 }
1975
6668546f
KVA
1976 _set_dmadisable(oh);
1977
9c8b0ec7 1978 /*
30e105c0
PW
1979 * OCP_SYSCONFIG bits need to be reprogrammed after a
1980 * softreset. The _enable() function should be split to avoid
1981 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1982 */
2800852a
RN
1983 if (oh->class->sysc) {
1984 _update_sysc_cache(oh);
1985 _enable_sysc(oh);
1986 }
1987
30e105c0 1988 return r;
bd36179e
PW
1989}
1990
5165882a
VB
1991/**
1992 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1993 *
1994 * Call the appropriate PRM function to clear any logged I/O chain
1995 * wakeups and to reconfigure the chain. This apparently needs to be
1996 * done upon every mux change. Since hwmods can be concurrently
1997 * enabled and idled, hold a spinlock around the I/O chain
1998 * reconfiguration sequence. No return value.
1999 *
2000 * XXX When the PRM code is moved to drivers, this function can be removed,
2001 * as the PRM infrastructure should abstract this.
2002 */
2003static void _reconfigure_io_chain(void)
2004{
2005 unsigned long flags;
2006
2007 spin_lock_irqsave(&io_chain_lock, flags);
2008
2009 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
2010 omap3xxx_prm_reconfigure_io_chain();
2011 else if (cpu_is_omap44xx())
2012 omap44xx_prm_reconfigure_io_chain();
2013
2014 spin_unlock_irqrestore(&io_chain_lock, flags);
2015}
2016
e6d3a8b0
RN
2017/**
2018 * _omap4_update_context_lost - increment hwmod context loss counter if
2019 * hwmod context was lost, and clear hardware context loss reg
2020 * @oh: hwmod to check for context loss
2021 *
2022 * If the PRCM indicates that the hwmod @oh lost context, increment
2023 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2024 * bits. No return value.
2025 */
2026static void _omap4_update_context_lost(struct omap_hwmod *oh)
2027{
2028 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2029 return;
2030
2031 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2032 oh->clkdm->pwrdm.ptr->prcm_offs,
2033 oh->prcm.omap4.context_offs))
2034 return;
2035
2036 oh->prcm.omap4.context_lost_counter++;
2037 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2038 oh->clkdm->pwrdm.ptr->prcm_offs,
2039 oh->prcm.omap4.context_offs);
2040}
2041
2042/**
2043 * _omap4_get_context_lost - get context loss counter for a hwmod
2044 * @oh: hwmod to get context loss counter for
2045 *
2046 * Returns the in-memory context loss counter for a hwmod.
2047 */
2048static int _omap4_get_context_lost(struct omap_hwmod *oh)
2049{
2050 return oh->prcm.omap4.context_lost_counter;
2051}
2052
6d266f63
PW
2053/**
2054 * _enable_preprogram - Pre-program an IP block during the _enable() process
2055 * @oh: struct omap_hwmod *
2056 *
2057 * Some IP blocks (such as AESS) require some additional programming
2058 * after enable before they can enter idle. If a function pointer to
2059 * do so is present in the hwmod data, then call it and pass along the
2060 * return value; otherwise, return 0.
2061 */
2062static int __init _enable_preprogram(struct omap_hwmod *oh)
2063{
2064 if (!oh->class->enable_preprogram)
2065 return 0;
2066
2067 return oh->class->enable_preprogram(oh);
2068}
2069
63c85238 2070/**
dc6d1cda 2071 * _enable - enable an omap_hwmod
63c85238
PW
2072 * @oh: struct omap_hwmod *
2073 *
2074 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
2075 * register target. Returns -EINVAL if the hwmod is in the wrong
2076 * state or passes along the return value of _wait_target_ready().
63c85238 2077 */
dc6d1cda 2078static int _enable(struct omap_hwmod *oh)
63c85238 2079{
747834ab 2080 int r;
665d0013 2081 int hwsup = 0;
63c85238 2082
34617e2a
BC
2083 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2084
aacf0941 2085 /*
64813c3f
PW
2086 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2087 * state at init. Now that someone is really trying to enable
2088 * them, just ensure that the hwmod mux is set.
aacf0941
RN
2089 */
2090 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2091 /*
2092 * If the caller has mux data populated, do the mux'ing
2093 * which wouldn't have been done as part of the _enable()
2094 * done during setup.
2095 */
2096 if (oh->mux)
2097 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2098
2099 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2100 return 0;
2101 }
2102
63c85238
PW
2103 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2104 oh->_state != _HWMOD_STATE_IDLE &&
2105 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
2106 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2107 oh->name);
63c85238
PW
2108 return -EINVAL;
2109 }
2110
31f62866 2111 /*
eb05f691 2112 * If an IP block contains HW reset lines and all of them are
747834ab
PW
2113 * asserted, we let integration code associated with that
2114 * block handle the enable. We've received very little
2115 * information on what those driver authors need, and until
2116 * detailed information is provided and the driver code is
2117 * posted to the public lists, this is probably the best we
2118 * can do.
31f62866 2119 */
eb05f691 2120 if (_are_all_hardreset_lines_asserted(oh))
747834ab 2121 return 0;
63c85238 2122
665d0013
RN
2123 /* Mux pins for device runtime if populated */
2124 if (oh->mux && (!oh->mux->enabled ||
2125 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 2126 oh->mux->pads_dynamic))) {
665d0013 2127 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a
VB
2128 _reconfigure_io_chain();
2129 }
665d0013
RN
2130
2131 _add_initiator_dep(oh, mpu_oh);
34617e2a 2132
665d0013
RN
2133 if (oh->clkdm) {
2134 /*
2135 * A clockdomain must be in SW_SUP before enabling
2136 * completely the module. The clockdomain can be set
2137 * in HW_AUTO only when the module become ready.
2138 */
b71c7217
PW
2139 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2140 !clkdm_missing_idle_reporting(oh->clkdm);
665d0013
RN
2141 r = clkdm_hwmod_enable(oh->clkdm, oh);
2142 if (r) {
2143 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2144 oh->name, oh->clkdm->name, r);
2145 return r;
2146 }
34617e2a 2147 }
665d0013
RN
2148
2149 _enable_clocks(oh);
9ebfd285
KH
2150 if (soc_ops.enable_module)
2151 soc_ops.enable_module(oh);
fa200222
PW
2152 if (oh->flags & HWMOD_BLOCK_WFI)
2153 disable_hlt();
34617e2a 2154
e6d3a8b0
RN
2155 if (soc_ops.update_context_lost)
2156 soc_ops.update_context_lost(oh);
2157
8f6aa8ee
KH
2158 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2159 -EINVAL;
665d0013
RN
2160 if (!r) {
2161 /*
2162 * Set the clockdomain to HW_AUTO only if the target is ready,
2163 * assuming that the previous state was HW_AUTO
2164 */
2165 if (oh->clkdm && hwsup)
2166 clkdm_allow_idle(oh->clkdm);
2167
2168 oh->_state = _HWMOD_STATE_ENABLED;
2169
2170 /* Access the sysconfig only if the target is ready */
2171 if (oh->class->sysc) {
2172 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2173 _update_sysc_cache(oh);
2174 _enable_sysc(oh);
2175 }
6d266f63 2176 r = _enable_preprogram(oh);
665d0013 2177 } else {
2577a4a6
PW
2178 if (soc_ops.disable_module)
2179 soc_ops.disable_module(oh);
665d0013
RN
2180 _disable_clocks(oh);
2181 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2182 oh->name, r);
34617e2a 2183
665d0013
RN
2184 if (oh->clkdm)
2185 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
2186 }
2187
63c85238
PW
2188 return r;
2189}
2190
2191/**
dc6d1cda 2192 * _idle - idle an omap_hwmod
63c85238
PW
2193 * @oh: struct omap_hwmod *
2194 *
2195 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
2196 * no further work. Returns -EINVAL if the hwmod is in the wrong
2197 * state or returns 0.
63c85238 2198 */
dc6d1cda 2199static int _idle(struct omap_hwmod *oh)
63c85238 2200{
34617e2a
BC
2201 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2202
63c85238 2203 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2204 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2205 oh->name);
63c85238
PW
2206 return -EINVAL;
2207 }
2208
eb05f691 2209 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2210 return 0;
2211
43b40992 2212 if (oh->class->sysc)
74ff3a68 2213 _idle_sysc(oh);
63c85238 2214 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2215
fa200222
PW
2216 if (oh->flags & HWMOD_BLOCK_WFI)
2217 enable_hlt();
9ebfd285
KH
2218 if (soc_ops.disable_module)
2219 soc_ops.disable_module(oh);
bfc141e3 2220
45c38252
BC
2221 /*
2222 * The module must be in idle mode before disabling any parents
2223 * clocks. Otherwise, the parent clock might be disabled before
2224 * the module transition is done, and thus will prevent the
2225 * transition to complete properly.
2226 */
2227 _disable_clocks(oh);
665d0013
RN
2228 if (oh->clkdm)
2229 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2230
8d9af88f 2231 /* Mux pins for device idle if populated */
5165882a 2232 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2233 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a
VB
2234 _reconfigure_io_chain();
2235 }
8d9af88f 2236
63c85238
PW
2237 oh->_state = _HWMOD_STATE_IDLE;
2238
2239 return 0;
2240}
2241
9599217a
KVA
2242/**
2243 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2244 * @oh: struct omap_hwmod *
2245 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2246 *
2247 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2248 * local copy. Intended to be used by drivers that require
2249 * direct manipulation of the AUTOIDLE bits.
2250 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2251 * along the return value from _set_module_autoidle().
2252 *
2253 * Any users of this function should be scrutinized carefully.
2254 */
2255int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2256{
2257 u32 v;
2258 int retval = 0;
2259 unsigned long flags;
2260
2261 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2262 return -EINVAL;
2263
2264 spin_lock_irqsave(&oh->_lock, flags);
2265
2266 v = oh->_sysc_cache;
2267
2268 retval = _set_module_autoidle(oh, autoidle, &v);
2269
2270 if (!retval)
2271 _write_sysconfig(v, oh);
2272
2273 spin_unlock_irqrestore(&oh->_lock, flags);
2274
2275 return retval;
2276}
2277
63c85238
PW
2278/**
2279 * _shutdown - shutdown an omap_hwmod
2280 * @oh: struct omap_hwmod *
2281 *
2282 * Shut down an omap_hwmod @oh. This should be called when the driver
2283 * used for the hwmod is removed or unloaded or if the driver is not
2284 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2285 * state or returns 0.
2286 */
2287static int _shutdown(struct omap_hwmod *oh)
2288{
9c8b0ec7 2289 int ret, i;
e4dc8f50
PW
2290 u8 prev_state;
2291
63c85238
PW
2292 if (oh->_state != _HWMOD_STATE_IDLE &&
2293 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2294 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2295 oh->name);
63c85238
PW
2296 return -EINVAL;
2297 }
2298
eb05f691 2299 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2300 return 0;
2301
63c85238
PW
2302 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2303
e4dc8f50
PW
2304 if (oh->class->pre_shutdown) {
2305 prev_state = oh->_state;
2306 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2307 _enable(oh);
e4dc8f50
PW
2308 ret = oh->class->pre_shutdown(oh);
2309 if (ret) {
2310 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2311 _idle(oh);
e4dc8f50
PW
2312 return ret;
2313 }
2314 }
2315
6481c73c
MV
2316 if (oh->class->sysc) {
2317 if (oh->_state == _HWMOD_STATE_IDLE)
2318 _enable(oh);
74ff3a68 2319 _shutdown_sysc(oh);
6481c73c 2320 }
5365efbe 2321
3827f949
BC
2322 /* clocks and deps are already disabled in idle */
2323 if (oh->_state == _HWMOD_STATE_ENABLED) {
2324 _del_initiator_dep(oh, mpu_oh);
2325 /* XXX what about the other system initiators here? dma, dsp */
fa200222
PW
2326 if (oh->flags & HWMOD_BLOCK_WFI)
2327 enable_hlt();
9ebfd285
KH
2328 if (soc_ops.disable_module)
2329 soc_ops.disable_module(oh);
45c38252 2330 _disable_clocks(oh);
665d0013
RN
2331 if (oh->clkdm)
2332 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2333 }
63c85238
PW
2334 /* XXX Should this code also force-disable the optional clocks? */
2335
9c8b0ec7
PW
2336 for (i = 0; i < oh->rst_lines_cnt; i++)
2337 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2338
8d9af88f
TL
2339 /* Mux pins to safe mode or use populated off mode values */
2340 if (oh->mux)
2341 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2342
2343 oh->_state = _HWMOD_STATE_DISABLED;
2344
2345 return 0;
2346}
2347
381d033a
PW
2348/**
2349 * _init_mpu_rt_base - populate the virtual address for a hwmod
2350 * @oh: struct omap_hwmod * to locate the virtual address
2351 *
2352 * Cache the virtual address used by the MPU to access this IP block's
2353 * registers. This address is needed early so the OCP registers that
2354 * are part of the device's address space can be ioremapped properly.
2355 * No return value.
2356 */
2357static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2358{
c9aafd23
PW
2359 struct omap_hwmod_addr_space *mem;
2360 void __iomem *va_start;
2361
2362 if (!oh)
2363 return;
2364
2221b5cd
PW
2365 _save_mpu_port_index(oh);
2366
381d033a
PW
2367 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2368 return;
2369
c9aafd23
PW
2370 mem = _find_mpu_rt_addr_space(oh);
2371 if (!mem) {
2372 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2373 oh->name);
2374 return;
2375 }
2376
2377 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2378 if (!va_start) {
2379 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2380 return;
2381 }
2382
2383 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2384 oh->name, va_start);
2385
2386 oh->_mpu_rt_va = va_start;
381d033a
PW
2387}
2388
2389/**
2390 * _init - initialize internal data for the hwmod @oh
2391 * @oh: struct omap_hwmod *
2392 * @n: (unused)
2393 *
2394 * Look up the clocks and the address space used by the MPU to access
2395 * registers belonging to the hwmod @oh. @oh must already be
2396 * registered at this point. This is the first of two phases for
2397 * hwmod initialization. Code called here does not touch any hardware
2398 * registers, it simply prepares internal data structures. Returns 0
2399 * upon success or if the hwmod isn't registered, or -EINVAL upon
2400 * failure.
2401 */
2402static int __init _init(struct omap_hwmod *oh, void *data)
2403{
2404 int r;
2405
2406 if (oh->_state != _HWMOD_STATE_REGISTERED)
2407 return 0;
2408
2409 _init_mpu_rt_base(oh, NULL);
2410
2411 r = _init_clocks(oh, NULL);
2412 if (IS_ERR_VALUE(r)) {
2413 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2414 return -EINVAL;
2415 }
2416
2417 oh->_state = _HWMOD_STATE_INITIALIZED;
2418
2419 return 0;
2420}
2421
63c85238 2422/**
64813c3f 2423 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2424 * @oh: struct omap_hwmod *
2425 *
64813c3f
PW
2426 * Set up the module's interface clocks. XXX This function is still mostly
2427 * a stub; implementing this properly requires iclk autoidle usecounting in
2428 * the clock code. No return value.
63c85238 2429 */
64813c3f 2430static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2431{
5d95dde7 2432 struct omap_hwmod_ocp_if *os;
11cd4b94 2433 struct list_head *p;
5d95dde7 2434 int i = 0;
381d033a 2435 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2436 return;
48d54f3f 2437
11cd4b94 2438 p = oh->slave_ports.next;
63c85238 2439
5d95dde7 2440 while (i < oh->slaves_cnt) {
11cd4b94 2441 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2442 if (!os->_clk)
64813c3f 2443 continue;
63c85238 2444
64813c3f
PW
2445 if (os->flags & OCPIF_SWSUP_IDLE) {
2446 /* XXX omap_iclk_deny_idle(c); */
2447 } else {
2448 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2449 clk_enable(os->_clk);
63c85238
PW
2450 }
2451 }
2452
64813c3f
PW
2453 return;
2454}
2455
2456/**
2457 * _setup_reset - reset an IP block during the setup process
2458 * @oh: struct omap_hwmod *
2459 *
2460 * Reset the IP block corresponding to the hwmod @oh during the setup
2461 * process. The IP block is first enabled so it can be successfully
2462 * reset. Returns 0 upon success or a negative error code upon
2463 * failure.
2464 */
2465static int __init _setup_reset(struct omap_hwmod *oh)
2466{
2467 int r;
2468
2469 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2470 return -EINVAL;
63c85238 2471
5fb3d522
PW
2472 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2473 return -EPERM;
2474
747834ab
PW
2475 if (oh->rst_lines_cnt == 0) {
2476 r = _enable(oh);
2477 if (r) {
2478 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2479 oh->name, oh->_state);
2480 return -EINVAL;
2481 }
9a23dfe1 2482 }
63c85238 2483
2800852a 2484 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2485 r = _reset(oh);
2486
2487 return r;
2488}
2489
2490/**
2491 * _setup_postsetup - transition to the appropriate state after _setup
2492 * @oh: struct omap_hwmod *
2493 *
2494 * Place an IP block represented by @oh into a "post-setup" state --
2495 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2496 * this function is called at the end of _setup().) The postsetup
2497 * state for an IP block can be changed by calling
2498 * omap_hwmod_enter_postsetup_state() early in the boot process,
2499 * before one of the omap_hwmod_setup*() functions are called for the
2500 * IP block.
2501 *
2502 * The IP block stays in this state until a PM runtime-based driver is
2503 * loaded for that IP block. A post-setup state of IDLE is
2504 * appropriate for almost all IP blocks with runtime PM-enabled
2505 * drivers, since those drivers are able to enable the IP block. A
2506 * post-setup state of ENABLED is appropriate for kernels with PM
2507 * runtime disabled. The DISABLED state is appropriate for unusual IP
2508 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2509 * included, since the WDTIMER starts running on reset and will reset
2510 * the MPU if left active.
2511 *
2512 * This post-setup mechanism is deprecated. Once all of the OMAP
2513 * drivers have been converted to use PM runtime, and all of the IP
2514 * block data and interconnect data is available to the hwmod code, it
2515 * should be possible to replace this mechanism with a "lazy reset"
2516 * arrangement. In a "lazy reset" setup, each IP block is enabled
2517 * when the driver first probes, then all remaining IP blocks without
2518 * drivers are either shut down or enabled after the drivers have
2519 * loaded. However, this cannot take place until the above
2520 * preconditions have been met, since otherwise the late reset code
2521 * has no way of knowing which IP blocks are in use by drivers, and
2522 * which ones are unused.
2523 *
2524 * No return value.
2525 */
2526static void __init _setup_postsetup(struct omap_hwmod *oh)
2527{
2528 u8 postsetup_state;
2529
2530 if (oh->rst_lines_cnt > 0)
2531 return;
76e5589e 2532
2092e5cc
PW
2533 postsetup_state = oh->_postsetup_state;
2534 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2535 postsetup_state = _HWMOD_STATE_ENABLED;
2536
2537 /*
2538 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2539 * it should be set by the core code as a runtime flag during startup
2540 */
2541 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2542 (postsetup_state == _HWMOD_STATE_IDLE)) {
2543 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2544 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2545 }
2092e5cc
PW
2546
2547 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2548 _idle(oh);
2092e5cc
PW
2549 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2550 _shutdown(oh);
2551 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2552 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2553 oh->name, postsetup_state);
63c85238 2554
64813c3f
PW
2555 return;
2556}
2557
2558/**
2559 * _setup - prepare IP block hardware for use
2560 * @oh: struct omap_hwmod *
2561 * @n: (unused, pass NULL)
2562 *
2563 * Configure the IP block represented by @oh. This may include
2564 * enabling the IP block, resetting it, and placing it into a
2565 * post-setup state, depending on the type of IP block and applicable
2566 * flags. IP blocks are reset to prevent any previous configuration
2567 * by the bootloader or previous operating system from interfering
2568 * with power management or other parts of the system. The reset can
2569 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2570 * two phases for hwmod initialization. Code called here generally
2571 * affects the IP block hardware, or system integration hardware
2572 * associated with the IP block. Returns 0.
2573 */
2574static int __init _setup(struct omap_hwmod *oh, void *data)
2575{
2576 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2577 return 0;
2578
2579 _setup_iclk_autoidle(oh);
2580
2581 if (!_setup_reset(oh))
2582 _setup_postsetup(oh);
2583
63c85238
PW
2584 return 0;
2585}
2586
63c85238 2587/**
0102b627 2588 * _register - register a struct omap_hwmod
63c85238
PW
2589 * @oh: struct omap_hwmod *
2590 *
43b40992
PW
2591 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2592 * already has been registered by the same name; -EINVAL if the
2593 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2594 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2595 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2596 * success.
63c85238
PW
2597 *
2598 * XXX The data should be copied into bootmem, so the original data
2599 * should be marked __initdata and freed after init. This would allow
2600 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2601 * that the copy process would be relatively complex due to the large number
2602 * of substructures.
2603 */
01592df9 2604static int __init _register(struct omap_hwmod *oh)
63c85238 2605{
43b40992
PW
2606 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2607 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2608 return -EINVAL;
2609
63c85238
PW
2610 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2611
ce35b244
BC
2612 if (_lookup(oh->name))
2613 return -EEXIST;
63c85238 2614
63c85238
PW
2615 list_add_tail(&oh->node, &omap_hwmod_list);
2616
2221b5cd
PW
2617 INIT_LIST_HEAD(&oh->master_ports);
2618 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2619 spin_lock_init(&oh->_lock);
2092e5cc 2620
63c85238
PW
2621 oh->_state = _HWMOD_STATE_REGISTERED;
2622
569edd70
PW
2623 /*
2624 * XXX Rather than doing a strcmp(), this should test a flag
2625 * set in the hwmod data, inserted by the autogenerator code.
2626 */
2627 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2628 mpu_oh = oh;
63c85238 2629
569edd70 2630 return 0;
63c85238
PW
2631}
2632
2221b5cd
PW
2633/**
2634 * _alloc_links - return allocated memory for hwmod links
2635 * @ml: pointer to a struct omap_hwmod_link * for the master link
2636 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2637 *
2638 * Return pointers to two struct omap_hwmod_link records, via the
2639 * addresses pointed to by @ml and @sl. Will first attempt to return
2640 * memory allocated as part of a large initial block, but if that has
2641 * been exhausted, will allocate memory itself. Since ideally this
2642 * second allocation path will never occur, the number of these
2643 * 'supplemental' allocations will be logged when debugging is
2644 * enabled. Returns 0.
2645 */
2646static int __init _alloc_links(struct omap_hwmod_link **ml,
2647 struct omap_hwmod_link **sl)
2648{
2649 unsigned int sz;
2650
2651 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2652 *ml = &linkspace[free_ls++];
2653 *sl = &linkspace[free_ls++];
2654 return 0;
2655 }
2656
2657 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2658
2659 *sl = NULL;
2660 *ml = alloc_bootmem(sz);
2661
2662 memset(*ml, 0, sz);
2663
2664 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2665
2666 ls_supp++;
2667 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2668 ls_supp * LINKS_PER_OCP_IF);
2669
2670 return 0;
2671};
2672
2673/**
2674 * _add_link - add an interconnect between two IP blocks
2675 * @oi: pointer to a struct omap_hwmod_ocp_if record
2676 *
2677 * Add struct omap_hwmod_link records connecting the master IP block
2678 * specified in @oi->master to @oi, and connecting the slave IP block
2679 * specified in @oi->slave to @oi. This code is assumed to run before
2680 * preemption or SMP has been enabled, thus avoiding the need for
2681 * locking in this code. Changes to this assumption will require
2682 * additional locking. Returns 0.
2683 */
2684static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2685{
2686 struct omap_hwmod_link *ml, *sl;
2687
2688 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2689 oi->slave->name);
2690
2691 _alloc_links(&ml, &sl);
2692
2693 ml->ocp_if = oi;
2694 INIT_LIST_HEAD(&ml->node);
2695 list_add(&ml->node, &oi->master->master_ports);
2696 oi->master->masters_cnt++;
2697
2698 sl->ocp_if = oi;
2699 INIT_LIST_HEAD(&sl->node);
2700 list_add(&sl->node, &oi->slave->slave_ports);
2701 oi->slave->slaves_cnt++;
2702
2703 return 0;
2704}
2705
2706/**
2707 * _register_link - register a struct omap_hwmod_ocp_if
2708 * @oi: struct omap_hwmod_ocp_if *
2709 *
2710 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2711 * has already been registered; -EINVAL if @oi is NULL or if the
2712 * record pointed to by @oi is missing required fields; or 0 upon
2713 * success.
2714 *
2715 * XXX The data should be copied into bootmem, so the original data
2716 * should be marked __initdata and freed after init. This would allow
2717 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2718 */
2719static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2720{
2721 if (!oi || !oi->master || !oi->slave || !oi->user)
2722 return -EINVAL;
2723
2724 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2725 return -EEXIST;
2726
2727 pr_debug("omap_hwmod: registering link from %s to %s\n",
2728 oi->master->name, oi->slave->name);
2729
2730 /*
2731 * Register the connected hwmods, if they haven't been
2732 * registered already
2733 */
2734 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2735 _register(oi->master);
2736
2737 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2738 _register(oi->slave);
2739
2740 _add_link(oi);
2741
2742 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2743
2744 return 0;
2745}
2746
2747/**
2748 * _alloc_linkspace - allocate large block of hwmod links
2749 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2750 *
2751 * Allocate a large block of struct omap_hwmod_link records. This
2752 * improves boot time significantly by avoiding the need to allocate
2753 * individual records one by one. If the number of records to
2754 * allocate in the block hasn't been manually specified, this function
2755 * will count the number of struct omap_hwmod_ocp_if records in @ois
2756 * and use that to determine the allocation size. For SoC families
2757 * that require multiple list registrations, such as OMAP3xxx, this
2758 * estimation process isn't optimal, so manual estimation is advised
2759 * in those cases. Returns -EEXIST if the allocation has already occurred
2760 * or 0 upon success.
2761 */
2762static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2763{
2764 unsigned int i = 0;
2765 unsigned int sz;
2766
2767 if (linkspace) {
2768 WARN(1, "linkspace already allocated\n");
2769 return -EEXIST;
2770 }
2771
2772 if (max_ls == 0)
2773 while (ois[i++])
2774 max_ls += LINKS_PER_OCP_IF;
2775
2776 sz = sizeof(struct omap_hwmod_link) * max_ls;
2777
2778 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2779 __func__, sz, max_ls);
2780
2781 linkspace = alloc_bootmem(sz);
2782
2783 memset(linkspace, 0, sz);
2784
2785 return 0;
2786}
0102b627 2787
8f6aa8ee
KH
2788/* Static functions intended only for use in soc_ops field function pointers */
2789
2790/**
ff4ae5d9 2791 * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
8f6aa8ee
KH
2792 * @oh: struct omap_hwmod *
2793 *
2794 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2795 * does not have an IDLEST bit or if the module successfully leaves
2796 * slave idle; otherwise, pass along the return value of the
2797 * appropriate *_cm*_wait_module_ready() function.
2798 */
ff4ae5d9 2799static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
8f6aa8ee
KH
2800{
2801 if (!oh)
2802 return -EINVAL;
2803
2804 if (oh->flags & HWMOD_NO_IDLEST)
2805 return 0;
2806
2807 if (!_find_mpu_rt_port(oh))
2808 return 0;
2809
2810 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2811
ff4ae5d9
PW
2812 return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2813 oh->prcm.omap2.idlest_reg_id,
2814 oh->prcm.omap2.idlest_idle_bit);
2815}
2816
2817/**
2818 * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
2819 * @oh: struct omap_hwmod *
2820 *
2821 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2822 * does not have an IDLEST bit or if the module successfully leaves
2823 * slave idle; otherwise, pass along the return value of the
2824 * appropriate *_cm*_wait_module_ready() function.
2825 */
2826static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
2827{
2828 if (!oh)
2829 return -EINVAL;
2830
2831 if (oh->flags & HWMOD_NO_IDLEST)
2832 return 0;
2833
2834 if (!_find_mpu_rt_port(oh))
2835 return 0;
2836
2837 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2838
2839 return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2840 oh->prcm.omap2.idlest_reg_id,
2841 oh->prcm.omap2.idlest_idle_bit);
8f6aa8ee
KH
2842}
2843
2844/**
2845 * _omap4_wait_target_ready - wait for a module to leave slave idle
2846 * @oh: struct omap_hwmod *
2847 *
2848 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2849 * does not have an IDLEST bit or if the module successfully leaves
2850 * slave idle; otherwise, pass along the return value of the
2851 * appropriate *_cm*_wait_module_ready() function.
2852 */
2853static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2854{
2b026d13 2855 if (!oh)
8f6aa8ee
KH
2856 return -EINVAL;
2857
2b026d13 2858 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
8f6aa8ee
KH
2859 return 0;
2860
2861 if (!_find_mpu_rt_port(oh))
2862 return 0;
2863
2864 /* XXX check module SIDLEMODE, hardreset status */
2865
2866 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2867 oh->clkdm->cm_inst,
2868 oh->clkdm->clkdm_offs,
2869 oh->prcm.omap4.clkctrl_offs);
2870}
2871
1688bf19
VH
2872/**
2873 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2874 * @oh: struct omap_hwmod *
2875 *
2876 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2877 * does not have an IDLEST bit or if the module successfully leaves
2878 * slave idle; otherwise, pass along the return value of the
2879 * appropriate *_cm*_wait_module_ready() function.
2880 */
2881static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2882{
2883 if (!oh || !oh->clkdm)
2884 return -EINVAL;
2885
2886 if (oh->flags & HWMOD_NO_IDLEST)
2887 return 0;
2888
2889 if (!_find_mpu_rt_port(oh))
2890 return 0;
2891
2892 /* XXX check module SIDLEMODE, hardreset status */
2893
2894 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2895 oh->clkdm->clkdm_offs,
2896 oh->prcm.omap4.clkctrl_offs);
2897}
2898
b8249cf2
KH
2899/**
2900 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2901 * @oh: struct omap_hwmod * to assert hardreset
2902 * @ohri: hardreset line data
2903 *
2904 * Call omap2_prm_assert_hardreset() with parameters extracted from
2905 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2906 * use as an soc_ops function pointer. Passes along the return value
2907 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2908 * for removal when the PRM code is moved into drivers/.
2909 */
2910static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2911 struct omap_hwmod_rst_info *ohri)
2912{
2913 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2914 ohri->rst_shift);
2915}
2916
2917/**
2918 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2919 * @oh: struct omap_hwmod * to deassert hardreset
2920 * @ohri: hardreset line data
2921 *
2922 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2923 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2924 * use as an soc_ops function pointer. Passes along the return value
2925 * from omap2_prm_deassert_hardreset(). XXX This function is
2926 * scheduled for removal when the PRM code is moved into drivers/.
2927 */
2928static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2929 struct omap_hwmod_rst_info *ohri)
2930{
2931 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2932 ohri->rst_shift,
2933 ohri->st_shift);
2934}
2935
2936/**
2937 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2938 * @oh: struct omap_hwmod * to test hardreset
2939 * @ohri: hardreset line data
2940 *
2941 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2942 * from the hwmod @oh and the hardreset line data @ohri. Only
2943 * intended for use as an soc_ops function pointer. Passes along the
2944 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2945 * function is scheduled for removal when the PRM code is moved into
2946 * drivers/.
2947 */
2948static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2949 struct omap_hwmod_rst_info *ohri)
2950{
2951 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2952 ohri->st_shift);
2953}
2954
2955/**
2956 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2957 * @oh: struct omap_hwmod * to assert hardreset
2958 * @ohri: hardreset line data
2959 *
2960 * Call omap4_prminst_assert_hardreset() with parameters extracted
2961 * from the hwmod @oh and the hardreset line data @ohri. Only
2962 * intended for use as an soc_ops function pointer. Passes along the
2963 * return value from omap4_prminst_assert_hardreset(). XXX This
2964 * function is scheduled for removal when the PRM code is moved into
2965 * drivers/.
2966 */
2967static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2968 struct omap_hwmod_rst_info *ohri)
b8249cf2 2969{
07b3a139
PW
2970 if (!oh->clkdm)
2971 return -EINVAL;
2972
b8249cf2
KH
2973 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2974 oh->clkdm->pwrdm.ptr->prcm_partition,
2975 oh->clkdm->pwrdm.ptr->prcm_offs,
2976 oh->prcm.omap4.rstctrl_offs);
2977}
2978
2979/**
2980 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2981 * @oh: struct omap_hwmod * to deassert hardreset
2982 * @ohri: hardreset line data
2983 *
2984 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2985 * from the hwmod @oh and the hardreset line data @ohri. Only
2986 * intended for use as an soc_ops function pointer. Passes along the
2987 * return value from omap4_prminst_deassert_hardreset(). XXX This
2988 * function is scheduled for removal when the PRM code is moved into
2989 * drivers/.
2990 */
2991static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2992 struct omap_hwmod_rst_info *ohri)
2993{
07b3a139
PW
2994 if (!oh->clkdm)
2995 return -EINVAL;
2996
b8249cf2
KH
2997 if (ohri->st_shift)
2998 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2999 oh->name, ohri->name);
3000 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
3001 oh->clkdm->pwrdm.ptr->prcm_partition,
3002 oh->clkdm->pwrdm.ptr->prcm_offs,
3003 oh->prcm.omap4.rstctrl_offs);
3004}
3005
3006/**
3007 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
3008 * @oh: struct omap_hwmod * to test hardreset
3009 * @ohri: hardreset line data
3010 *
3011 * Call omap4_prminst_is_hardreset_asserted() with parameters
3012 * extracted from the hwmod @oh and the hardreset line data @ohri.
3013 * Only intended for use as an soc_ops function pointer. Passes along
3014 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3015 * This function is scheduled for removal when the PRM code is moved
3016 * into drivers/.
3017 */
3018static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3019 struct omap_hwmod_rst_info *ohri)
3020{
07b3a139
PW
3021 if (!oh->clkdm)
3022 return -EINVAL;
3023
b8249cf2
KH
3024 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
3025 oh->clkdm->pwrdm.ptr->prcm_partition,
3026 oh->clkdm->pwrdm.ptr->prcm_offs,
3027 oh->prcm.omap4.rstctrl_offs);
3028}
3029
1688bf19
VH
3030/**
3031 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3032 * @oh: struct omap_hwmod * to assert hardreset
3033 * @ohri: hardreset line data
3034 *
3035 * Call am33xx_prminst_assert_hardreset() with parameters extracted
3036 * from the hwmod @oh and the hardreset line data @ohri. Only
3037 * intended for use as an soc_ops function pointer. Passes along the
3038 * return value from am33xx_prminst_assert_hardreset(). XXX This
3039 * function is scheduled for removal when the PRM code is moved into
3040 * drivers/.
3041 */
3042static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
3043 struct omap_hwmod_rst_info *ohri)
3044
3045{
3046 return am33xx_prm_assert_hardreset(ohri->rst_shift,
3047 oh->clkdm->pwrdm.ptr->prcm_offs,
3048 oh->prcm.omap4.rstctrl_offs);
3049}
3050
3051/**
3052 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3053 * @oh: struct omap_hwmod * to deassert hardreset
3054 * @ohri: hardreset line data
3055 *
3056 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3057 * from the hwmod @oh and the hardreset line data @ohri. Only
3058 * intended for use as an soc_ops function pointer. Passes along the
3059 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3060 * function is scheduled for removal when the PRM code is moved into
3061 * drivers/.
3062 */
3063static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3064 struct omap_hwmod_rst_info *ohri)
3065{
1688bf19 3066 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
3c06f1b8 3067 ohri->st_shift,
1688bf19
VH
3068 oh->clkdm->pwrdm.ptr->prcm_offs,
3069 oh->prcm.omap4.rstctrl_offs,
3070 oh->prcm.omap4.rstst_offs);
3071}
3072
3073/**
3074 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
3075 * @oh: struct omap_hwmod * to test hardreset
3076 * @ohri: hardreset line data
3077 *
3078 * Call am33xx_prminst_is_hardreset_asserted() with parameters
3079 * extracted from the hwmod @oh and the hardreset line data @ohri.
3080 * Only intended for use as an soc_ops function pointer. Passes along
3081 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
3082 * This function is scheduled for removal when the PRM code is moved
3083 * into drivers/.
3084 */
3085static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
3086 struct omap_hwmod_rst_info *ohri)
3087{
3088 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3089 oh->clkdm->pwrdm.ptr->prcm_offs,
3090 oh->prcm.omap4.rstctrl_offs);
3091}
3092
0102b627
BC
3093/* Public functions */
3094
3095u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3096{
3097 if (oh->flags & HWMOD_16BIT_REG)
3098 return __raw_readw(oh->_mpu_rt_va + reg_offs);
3099 else
3100 return __raw_readl(oh->_mpu_rt_va + reg_offs);
3101}
3102
3103void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3104{
3105 if (oh->flags & HWMOD_16BIT_REG)
3106 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
3107 else
3108 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
3109}
3110
6d3c55fd
A
3111/**
3112 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3113 * @oh: struct omap_hwmod *
3114 *
3115 * This is a public function exposed to drivers. Some drivers may need to do
3116 * some settings before and after resetting the device. Those drivers after
3117 * doing the necessary settings could use this function to start a reset by
3118 * setting the SYSCONFIG.SOFTRESET bit.
3119 */
3120int omap_hwmod_softreset(struct omap_hwmod *oh)
3121{
3c55c1ba
PW
3122 u32 v;
3123 int ret;
3124
3125 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
3126 return -EINVAL;
3127
3c55c1ba
PW
3128 v = oh->_sysc_cache;
3129 ret = _set_softreset(oh, &v);
3130 if (ret)
3131 goto error;
3132 _write_sysconfig(v, oh);
3133
3134error:
3135 return ret;
6d3c55fd
A
3136}
3137
0102b627
BC
3138/**
3139 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
3140 * @oh: struct omap_hwmod *
3141 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
3142 *
3143 * Sets the IP block's OCP slave idlemode in hardware, and updates our
3144 * local copy. Intended to be used by drivers that have some erratum
3145 * that requires direct manipulation of the SIDLEMODE bits. Returns
3146 * -EINVAL if @oh is null, or passes along the return value from
3147 * _set_slave_idlemode().
3148 *
3149 * XXX Does this function have any current users? If not, we should
3150 * remove it; it is better to let the rest of the hwmod code handle this.
3151 * Any users of this function should be scrutinized carefully.
3152 */
3153int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3154{
3155 u32 v;
3156 int retval = 0;
3157
3158 if (!oh)
3159 return -EINVAL;
3160
3161 v = oh->_sysc_cache;
3162
3163 retval = _set_slave_idlemode(oh, idlemode, &v);
3164 if (!retval)
3165 _write_sysconfig(v, oh);
3166
3167 return retval;
3168}
3169
63c85238
PW
3170/**
3171 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3172 * @name: name of the omap_hwmod to look up
3173 *
3174 * Given a @name of an omap_hwmod, return a pointer to the registered
3175 * struct omap_hwmod *, or NULL upon error.
3176 */
3177struct omap_hwmod *omap_hwmod_lookup(const char *name)
3178{
3179 struct omap_hwmod *oh;
3180
3181 if (!name)
3182 return NULL;
3183
63c85238 3184 oh = _lookup(name);
63c85238
PW
3185
3186 return oh;
3187}
3188
3189/**
3190 * omap_hwmod_for_each - call function for each registered omap_hwmod
3191 * @fn: pointer to a callback function
97d60162 3192 * @data: void * data to pass to callback function
63c85238
PW
3193 *
3194 * Call @fn for each registered omap_hwmod, passing @data to each
3195 * function. @fn must return 0 for success or any other value for
3196 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3197 * will stop and the non-zero return value will be passed to the
3198 * caller of omap_hwmod_for_each(). @fn is called with
3199 * omap_hwmod_for_each() held.
3200 */
97d60162
PW
3201int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3202 void *data)
63c85238
PW
3203{
3204 struct omap_hwmod *temp_oh;
30ebad9d 3205 int ret = 0;
63c85238
PW
3206
3207 if (!fn)
3208 return -EINVAL;
3209
63c85238 3210 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 3211 ret = (*fn)(temp_oh, data);
63c85238
PW
3212 if (ret)
3213 break;
3214 }
63c85238
PW
3215
3216 return ret;
3217}
3218
2221b5cd
PW
3219/**
3220 * omap_hwmod_register_links - register an array of hwmod links
3221 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3222 *
3223 * Intended to be called early in boot before the clock framework is
3224 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
3225 * listed in @ois that are valid for this chip. Returns -EINVAL if
3226 * omap_hwmod_init() hasn't been called before calling this function,
3227 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3228 * success.
2221b5cd
PW
3229 */
3230int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3231{
3232 int r, i;
3233
9ebfd285
KH
3234 if (!inited)
3235 return -EINVAL;
3236
2221b5cd
PW
3237 if (!ois)
3238 return 0;
3239
2221b5cd
PW
3240 if (!linkspace) {
3241 if (_alloc_linkspace(ois)) {
3242 pr_err("omap_hwmod: could not allocate link space\n");
3243 return -ENOMEM;
3244 }
3245 }
3246
3247 i = 0;
3248 do {
3249 r = _register_link(ois[i]);
3250 WARN(r && r != -EEXIST,
3251 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3252 ois[i]->master->name, ois[i]->slave->name, r);
3253 } while (ois[++i]);
3254
3255 return 0;
3256}
3257
381d033a
PW
3258/**
3259 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3260 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3261 *
3262 * If the hwmod data corresponding to the MPU subsystem IP block
3263 * hasn't been initialized and set up yet, do so now. This must be
3264 * done first since sleep dependencies may be added from other hwmods
3265 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3266 * return value.
63c85238 3267 */
381d033a 3268static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3269{
381d033a
PW
3270 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3271 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3272 __func__, MPU_INITIATOR_NAME);
3273 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3274 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3275}
3276
63c85238 3277/**
a2debdbd
PW
3278 * omap_hwmod_setup_one - set up a single hwmod
3279 * @oh_name: const char * name of the already-registered hwmod to set up
3280 *
381d033a
PW
3281 * Initialize and set up a single hwmod. Intended to be used for a
3282 * small number of early devices, such as the timer IP blocks used for
3283 * the scheduler clock. Must be called after omap2_clk_init().
3284 * Resolves the struct clk names to struct clk pointers for each
3285 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3286 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3287 */
3288int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3289{
3290 struct omap_hwmod *oh;
63c85238 3291
a2debdbd
PW
3292 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3293
a2debdbd
PW
3294 oh = _lookup(oh_name);
3295 if (!oh) {
3296 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3297 return -EINVAL;
3298 }
63c85238 3299
381d033a 3300 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3301
381d033a 3302 _init(oh, NULL);
a2debdbd
PW
3303 _setup(oh, NULL);
3304
63c85238
PW
3305 return 0;
3306}
3307
3308/**
381d033a 3309 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3310 *
381d033a
PW
3311 * Initialize and set up all IP blocks registered with the hwmod code.
3312 * Must be called after omap2_clk_init(). Resolves the struct clk
3313 * names to struct clk pointers for each registered omap_hwmod. Also
3314 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3315 */
550c8092 3316static int __init omap_hwmod_setup_all(void)
63c85238 3317{
381d033a 3318 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3319
381d033a 3320 omap_hwmod_for_each(_init, NULL);
2092e5cc 3321 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3322
3323 return 0;
3324}
b76c8b19 3325omap_core_initcall(omap_hwmod_setup_all);
63c85238 3326
63c85238
PW
3327/**
3328 * omap_hwmod_enable - enable an omap_hwmod
3329 * @oh: struct omap_hwmod *
3330 *
74ff3a68 3331 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3332 * Returns -EINVAL on error or passes along the return value from _enable().
3333 */
3334int omap_hwmod_enable(struct omap_hwmod *oh)
3335{
3336 int r;
dc6d1cda 3337 unsigned long flags;
63c85238
PW
3338
3339 if (!oh)
3340 return -EINVAL;
3341
dc6d1cda
PW
3342 spin_lock_irqsave(&oh->_lock, flags);
3343 r = _enable(oh);
3344 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3345
3346 return r;
3347}
3348
3349/**
3350 * omap_hwmod_idle - idle an omap_hwmod
3351 * @oh: struct omap_hwmod *
3352 *
74ff3a68 3353 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3354 * Returns -EINVAL on error or passes along the return value from _idle().
3355 */
3356int omap_hwmod_idle(struct omap_hwmod *oh)
3357{
dc6d1cda
PW
3358 unsigned long flags;
3359
63c85238
PW
3360 if (!oh)
3361 return -EINVAL;
3362
dc6d1cda
PW
3363 spin_lock_irqsave(&oh->_lock, flags);
3364 _idle(oh);
3365 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3366
3367 return 0;
3368}
3369
3370/**
3371 * omap_hwmod_shutdown - shutdown an omap_hwmod
3372 * @oh: struct omap_hwmod *
3373 *
74ff3a68 3374 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3375 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3376 * the return value from _shutdown().
3377 */
3378int omap_hwmod_shutdown(struct omap_hwmod *oh)
3379{
dc6d1cda
PW
3380 unsigned long flags;
3381
63c85238
PW
3382 if (!oh)
3383 return -EINVAL;
3384
dc6d1cda 3385 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3386 _shutdown(oh);
dc6d1cda 3387 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3388
3389 return 0;
3390}
3391
3392/**
3393 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3394 * @oh: struct omap_hwmod *oh
3395 *
3396 * Intended to be called by the omap_device code.
3397 */
3398int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3399{
dc6d1cda
PW
3400 unsigned long flags;
3401
3402 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3403 _enable_clocks(oh);
dc6d1cda 3404 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3405
3406 return 0;
3407}
3408
3409/**
3410 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3411 * @oh: struct omap_hwmod *oh
3412 *
3413 * Intended to be called by the omap_device code.
3414 */
3415int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3416{
dc6d1cda
PW
3417 unsigned long flags;
3418
3419 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3420 _disable_clocks(oh);
dc6d1cda 3421 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3422
3423 return 0;
3424}
3425
3426/**
3427 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3428 * @oh: struct omap_hwmod *oh
3429 *
3430 * Intended to be called by drivers and core code when all posted
3431 * writes to a device must complete before continuing further
3432 * execution (for example, after clearing some device IRQSTATUS
3433 * register bits)
3434 *
3435 * XXX what about targets with multiple OCP threads?
3436 */
3437void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3438{
3439 BUG_ON(!oh);
3440
43b40992 3441 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3442 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3443 oh->name);
63c85238
PW
3444 return;
3445 }
3446
3447 /*
3448 * Forces posted writes to complete on the OCP thread handling
3449 * register writes
3450 */
cc7a1d2a 3451 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3452}
3453
3454/**
3455 * omap_hwmod_reset - reset the hwmod
3456 * @oh: struct omap_hwmod *
3457 *
3458 * Under some conditions, a driver may wish to reset the entire device.
3459 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3460 * the return value from _reset().
63c85238
PW
3461 */
3462int omap_hwmod_reset(struct omap_hwmod *oh)
3463{
3464 int r;
dc6d1cda 3465 unsigned long flags;
63c85238 3466
9b579114 3467 if (!oh)
63c85238
PW
3468 return -EINVAL;
3469
dc6d1cda 3470 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3471 r = _reset(oh);
dc6d1cda 3472 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3473
3474 return r;
3475}
3476
5e8370f1
PW
3477/*
3478 * IP block data retrieval functions
3479 */
3480
63c85238
PW
3481/**
3482 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3483 * @oh: struct omap_hwmod *
dad4191d 3484 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
63c85238
PW
3485 *
3486 * Count the number of struct resource array elements necessary to
3487 * contain omap_hwmod @oh resources. Intended to be called by code
3488 * that registers omap_devices. Intended to be used to determine the
3489 * size of a dynamically-allocated struct resource array, before
3490 * calling omap_hwmod_fill_resources(). Returns the number of struct
3491 * resource array elements needed.
3492 *
3493 * XXX This code is not optimized. It could attempt to merge adjacent
3494 * resource IDs.
3495 *
3496 */
dad4191d 3497int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
63c85238 3498{
dad4191d 3499 int ret = 0;
63c85238 3500
dad4191d
PU
3501 if (flags & IORESOURCE_IRQ)
3502 ret += _count_mpu_irqs(oh);
63c85238 3503
dad4191d
PU
3504 if (flags & IORESOURCE_DMA)
3505 ret += _count_sdma_reqs(oh);
2221b5cd 3506
dad4191d
PU
3507 if (flags & IORESOURCE_MEM) {
3508 int i = 0;
3509 struct omap_hwmod_ocp_if *os;
3510 struct list_head *p = oh->slave_ports.next;
3511
3512 while (i < oh->slaves_cnt) {
3513 os = _fetch_next_ocp_if(&p, &i);
3514 ret += _count_ocp_if_addr_spaces(os);
3515 }
5d95dde7 3516 }
63c85238
PW
3517
3518 return ret;
3519}
3520
3521/**
3522 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3523 * @oh: struct omap_hwmod *
3524 * @res: pointer to the first element of an array of struct resource to fill
3525 *
3526 * Fill the struct resource array @res with resource data from the
3527 * omap_hwmod @oh. Intended to be called by code that registers
3528 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3529 * number of array elements filled.
3530 */
3531int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3532{
5d95dde7 3533 struct omap_hwmod_ocp_if *os;
11cd4b94 3534 struct list_head *p;
5d95dde7 3535 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3536 int r = 0;
3537
3538 /* For each IRQ, DMA, memory area, fill in array.*/
3539
212738a4
PW
3540 mpu_irqs_cnt = _count_mpu_irqs(oh);
3541 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3542 (res + r)->name = (oh->mpu_irqs + i)->name;
3543 (res + r)->start = (oh->mpu_irqs + i)->irq;
3544 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3545 (res + r)->flags = IORESOURCE_IRQ;
3546 r++;
3547 }
3548
bc614958
PW
3549 sdma_reqs_cnt = _count_sdma_reqs(oh);
3550 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3551 (res + r)->name = (oh->sdma_reqs + i)->name;
3552 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3553 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3554 (res + r)->flags = IORESOURCE_DMA;
3555 r++;
3556 }
3557
11cd4b94 3558 p = oh->slave_ports.next;
2221b5cd 3559
5d95dde7
PW
3560 i = 0;
3561 while (i < oh->slaves_cnt) {
11cd4b94 3562 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3563 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3564
78183f3f 3565 for (j = 0; j < addr_cnt; j++) {
cd503802 3566 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3567 (res + r)->start = (os->addr + j)->pa_start;
3568 (res + r)->end = (os->addr + j)->pa_end;
3569 (res + r)->flags = IORESOURCE_MEM;
3570 r++;
3571 }
3572 }
3573
3574 return r;
3575}
3576
b82b04e8
VH
3577/**
3578 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3579 * @oh: struct omap_hwmod *
3580 * @res: pointer to the array of struct resource to fill
3581 *
3582 * Fill the struct resource array @res with dma resource data from the
3583 * omap_hwmod @oh. Intended to be called by code that registers
3584 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3585 * number of array elements filled.
3586 */
3587int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3588{
3589 int i, sdma_reqs_cnt;
3590 int r = 0;
3591
3592 sdma_reqs_cnt = _count_sdma_reqs(oh);
3593 for (i = 0; i < sdma_reqs_cnt; i++) {
3594 (res + r)->name = (oh->sdma_reqs + i)->name;
3595 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3596 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3597 (res + r)->flags = IORESOURCE_DMA;
3598 r++;
3599 }
3600
3601 return r;
3602}
3603
5e8370f1
PW
3604/**
3605 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3606 * @oh: struct omap_hwmod * to operate on
3607 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3608 * @name: pointer to the name of the data to fetch (optional)
3609 * @rsrc: pointer to a struct resource, allocated by the caller
3610 *
3611 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3612 * data for the IP block pointed to by @oh. The data will be filled
3613 * into a struct resource record pointed to by @rsrc. The struct
3614 * resource must be allocated by the caller. When @name is non-null,
3615 * the data associated with the matching entry in the IRQ/SDMA/address
3616 * space hwmod data arrays will be returned. If @name is null, the
3617 * first array entry will be returned. Data order is not meaningful
3618 * in hwmod data, so callers are strongly encouraged to use a non-null
3619 * @name whenever possible to avoid unpredictable effects if hwmod
3620 * data is later added that causes data ordering to change. This
3621 * function is only intended for use by OMAP core code. Device
3622 * drivers should not call this function - the appropriate bus-related
3623 * data accessor functions should be used instead. Returns 0 upon
3624 * success or a negative error code upon error.
3625 */
3626int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3627 const char *name, struct resource *rsrc)
3628{
3629 int r;
3630 unsigned int irq, dma;
3631 u32 pa_start, pa_end;
3632
3633 if (!oh || !rsrc)
3634 return -EINVAL;
3635
3636 if (type == IORESOURCE_IRQ) {
3637 r = _get_mpu_irq_by_name(oh, name, &irq);
3638 if (r)
3639 return r;
3640
3641 rsrc->start = irq;
3642 rsrc->end = irq;
3643 } else if (type == IORESOURCE_DMA) {
3644 r = _get_sdma_req_by_name(oh, name, &dma);
3645 if (r)
3646 return r;
3647
3648 rsrc->start = dma;
3649 rsrc->end = dma;
3650 } else if (type == IORESOURCE_MEM) {
3651 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3652 if (r)
3653 return r;
3654
3655 rsrc->start = pa_start;
3656 rsrc->end = pa_end;
3657 } else {
3658 return -EINVAL;
3659 }
3660
3661 rsrc->flags = type;
3662 rsrc->name = name;
3663
3664 return 0;
3665}
3666
63c85238
PW
3667/**
3668 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3669 * @oh: struct omap_hwmod *
3670 *
3671 * Return the powerdomain pointer associated with the OMAP module
3672 * @oh's main clock. If @oh does not have a main clk, return the
3673 * powerdomain associated with the interface clock associated with the
3674 * module's MPU port. (XXX Perhaps this should use the SDMA port
3675 * instead?) Returns NULL on error, or a struct powerdomain * on
3676 * success.
3677 */
3678struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3679{
3680 struct clk *c;
2d6141ba 3681 struct omap_hwmod_ocp_if *oi;
f5dd3bb5 3682 struct clockdomain *clkdm;
f5dd3bb5 3683 struct clk_hw_omap *clk;
63c85238
PW
3684
3685 if (!oh)
3686 return NULL;
3687
f5dd3bb5
RN
3688 if (oh->clkdm)
3689 return oh->clkdm->pwrdm.ptr;
3690
63c85238
PW
3691 if (oh->_clk) {
3692 c = oh->_clk;
3693 } else {
2d6141ba
PW
3694 oi = _find_mpu_rt_port(oh);
3695 if (!oi)
63c85238 3696 return NULL;
2d6141ba 3697 c = oi->_clk;
63c85238
PW
3698 }
3699
f5dd3bb5
RN
3700 clk = to_clk_hw_omap(__clk_get_hw(c));
3701 clkdm = clk->clkdm;
f5dd3bb5 3702 if (!clkdm)
d5647c18
TG
3703 return NULL;
3704
f5dd3bb5 3705 return clkdm->pwrdm.ptr;
63c85238
PW
3706}
3707
db2a60bf
PW
3708/**
3709 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3710 * @oh: struct omap_hwmod *
3711 *
3712 * Returns the virtual address corresponding to the beginning of the
3713 * module's register target, in the address range that is intended to
3714 * be used by the MPU. Returns the virtual address upon success or NULL
3715 * upon error.
3716 */
3717void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3718{
3719 if (!oh)
3720 return NULL;
3721
3722 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3723 return NULL;
3724
3725 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3726 return NULL;
3727
3728 return oh->_mpu_rt_va;
3729}
3730
63c85238
PW
3731/**
3732 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3733 * @oh: struct omap_hwmod *
3734 * @init_oh: struct omap_hwmod * (initiator)
3735 *
3736 * Add a sleep dependency between the initiator @init_oh and @oh.
3737 * Intended to be called by DSP/Bridge code via platform_data for the
3738 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3739 * code needs to add/del initiator dependencies dynamically
3740 * before/after accessing a device. Returns the return value from
3741 * _add_initiator_dep().
3742 *
3743 * XXX Keep a usecount in the clockdomain code
3744 */
3745int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3746 struct omap_hwmod *init_oh)
3747{
3748 return _add_initiator_dep(oh, init_oh);
3749}
3750
3751/*
3752 * XXX what about functions for drivers to save/restore ocp_sysconfig
3753 * for context save/restore operations?
3754 */
3755
3756/**
3757 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3758 * @oh: struct omap_hwmod *
3759 * @init_oh: struct omap_hwmod * (initiator)
3760 *
3761 * Remove a sleep dependency between the initiator @init_oh and @oh.
3762 * Intended to be called by DSP/Bridge code via platform_data for the
3763 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3764 * code needs to add/del initiator dependencies dynamically
3765 * before/after accessing a device. Returns the return value from
3766 * _del_initiator_dep().
3767 *
3768 * XXX Keep a usecount in the clockdomain code
3769 */
3770int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3771 struct omap_hwmod *init_oh)
3772{
3773 return _del_initiator_dep(oh, init_oh);
3774}
3775
63c85238
PW
3776/**
3777 * omap_hwmod_enable_wakeup - allow device to wake up the system
3778 * @oh: struct omap_hwmod *
3779 *
3780 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3781 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3782 * this IP block if it has dynamic mux entries. Eventually this
3783 * should set PRCM wakeup registers to cause the PRCM to receive
3784 * wakeup events from the module. Does not set any wakeup routing
3785 * registers beyond this point - if the module is to wake up any other
3786 * module or subsystem, that must be set separately. Called by
3787 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3788 */
3789int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3790{
dc6d1cda 3791 unsigned long flags;
5a7ddcbd 3792 u32 v;
dc6d1cda 3793
dc6d1cda 3794 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3795
3796 if (oh->class->sysc &&
3797 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3798 v = oh->_sysc_cache;
3799 _enable_wakeup(oh, &v);
3800 _write_sysconfig(v, oh);
3801 }
3802
eceec009 3803 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3804 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3805
3806 return 0;
3807}
3808
3809/**
3810 * omap_hwmod_disable_wakeup - prevent device from waking the system
3811 * @oh: struct omap_hwmod *
3812 *
3813 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3814 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3815 * events for this IP block if it has dynamic mux entries. Eventually
3816 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3817 * wakeup events from the module. Does not set any wakeup routing
3818 * registers beyond this point - if the module is to wake up any other
3819 * module or subsystem, that must be set separately. Called by
3820 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3821 */
3822int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3823{
dc6d1cda 3824 unsigned long flags;
5a7ddcbd 3825 u32 v;
dc6d1cda 3826
dc6d1cda 3827 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3828
3829 if (oh->class->sysc &&
3830 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3831 v = oh->_sysc_cache;
3832 _disable_wakeup(oh, &v);
3833 _write_sysconfig(v, oh);
3834 }
3835
eceec009 3836 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3837 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3838
3839 return 0;
3840}
43b40992 3841
aee48e3c
PW
3842/**
3843 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3844 * contained in the hwmod module.
3845 * @oh: struct omap_hwmod *
3846 * @name: name of the reset line to lookup and assert
3847 *
3848 * Some IP like dsp, ipu or iva contain processor that require
3849 * an HW reset line to be assert / deassert in order to enable fully
3850 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3851 * yet supported on this OMAP; otherwise, passes along the return value
3852 * from _assert_hardreset().
3853 */
3854int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3855{
3856 int ret;
dc6d1cda 3857 unsigned long flags;
aee48e3c
PW
3858
3859 if (!oh)
3860 return -EINVAL;
3861
dc6d1cda 3862 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3863 ret = _assert_hardreset(oh, name);
dc6d1cda 3864 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3865
3866 return ret;
3867}
3868
3869/**
3870 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3871 * contained in the hwmod module.
3872 * @oh: struct omap_hwmod *
3873 * @name: name of the reset line to look up and deassert
3874 *
3875 * Some IP like dsp, ipu or iva contain processor that require
3876 * an HW reset line to be assert / deassert in order to enable fully
3877 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3878 * yet supported on this OMAP; otherwise, passes along the return value
3879 * from _deassert_hardreset().
3880 */
3881int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3882{
3883 int ret;
dc6d1cda 3884 unsigned long flags;
aee48e3c
PW
3885
3886 if (!oh)
3887 return -EINVAL;
3888
dc6d1cda 3889 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3890 ret = _deassert_hardreset(oh, name);
dc6d1cda 3891 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3892
3893 return ret;
3894}
3895
3896/**
3897 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3898 * contained in the hwmod module
3899 * @oh: struct omap_hwmod *
3900 * @name: name of the reset line to look up and read
3901 *
3902 * Return the current state of the hwmod @oh's reset line named @name:
3903 * returns -EINVAL upon parameter error or if this operation
3904 * is unsupported on the current OMAP; otherwise, passes along the return
3905 * value from _read_hardreset().
3906 */
3907int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3908{
3909 int ret;
dc6d1cda 3910 unsigned long flags;
aee48e3c
PW
3911
3912 if (!oh)
3913 return -EINVAL;
3914
dc6d1cda 3915 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3916 ret = _read_hardreset(oh, name);
dc6d1cda 3917 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3918
3919 return ret;
3920}
3921
3922
43b40992
PW
3923/**
3924 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3925 * @classname: struct omap_hwmod_class name to search for
3926 * @fn: callback function pointer to call for each hwmod in class @classname
3927 * @user: arbitrary context data to pass to the callback function
3928 *
ce35b244
BC
3929 * For each omap_hwmod of class @classname, call @fn.
3930 * If the callback function returns something other than
43b40992
PW
3931 * zero, the iterator is terminated, and the callback function's return
3932 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3933 * if @classname or @fn are NULL, or passes back the error code from @fn.
3934 */
3935int omap_hwmod_for_each_by_class(const char *classname,
3936 int (*fn)(struct omap_hwmod *oh,
3937 void *user),
3938 void *user)
3939{
3940 struct omap_hwmod *temp_oh;
3941 int ret = 0;
3942
3943 if (!classname || !fn)
3944 return -EINVAL;
3945
3946 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3947 __func__, classname);
3948
43b40992
PW
3949 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3950 if (!strcmp(temp_oh->class->name, classname)) {
3951 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3952 __func__, temp_oh->name);
3953 ret = (*fn)(temp_oh, user);
3954 if (ret)
3955 break;
3956 }
3957 }
3958
43b40992
PW
3959 if (ret)
3960 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3961 __func__, ret);
3962
3963 return ret;
3964}
3965
2092e5cc
PW
3966/**
3967 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3968 * @oh: struct omap_hwmod *
3969 * @state: state that _setup() should leave the hwmod in
3970 *
550c8092 3971 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3972 * (called by omap_hwmod_setup_*()). See also the documentation
3973 * for _setup_postsetup(), above. Returns 0 upon success or
3974 * -EINVAL if there is a problem with the arguments or if the hwmod is
3975 * in the wrong state.
2092e5cc
PW
3976 */
3977int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3978{
3979 int ret;
dc6d1cda 3980 unsigned long flags;
2092e5cc
PW
3981
3982 if (!oh)
3983 return -EINVAL;
3984
3985 if (state != _HWMOD_STATE_DISABLED &&
3986 state != _HWMOD_STATE_ENABLED &&
3987 state != _HWMOD_STATE_IDLE)
3988 return -EINVAL;
3989
dc6d1cda 3990 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3991
3992 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3993 ret = -EINVAL;
3994 goto ohsps_unlock;
3995 }
3996
3997 oh->_postsetup_state = state;
3998 ret = 0;
3999
4000ohsps_unlock:
dc6d1cda 4001 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
4002
4003 return ret;
4004}
c80705aa
KH
4005
4006/**
4007 * omap_hwmod_get_context_loss_count - get lost context count
4008 * @oh: struct omap_hwmod *
4009 *
e6d3a8b0
RN
4010 * Returns the context loss count of associated @oh
4011 * upon success, or zero if no context loss data is available.
c80705aa 4012 *
e6d3a8b0
RN
4013 * On OMAP4, this queries the per-hwmod context loss register,
4014 * assuming one exists. If not, or on OMAP2/3, this queries the
4015 * enclosing powerdomain context loss count.
c80705aa 4016 */
fc013873 4017int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
4018{
4019 struct powerdomain *pwrdm;
4020 int ret = 0;
4021
e6d3a8b0
RN
4022 if (soc_ops.get_context_lost)
4023 return soc_ops.get_context_lost(oh);
4024
c80705aa
KH
4025 pwrdm = omap_hwmod_get_pwrdm(oh);
4026 if (pwrdm)
4027 ret = pwrdm_get_context_loss_count(pwrdm);
4028
4029 return ret;
4030}
43b01643
PW
4031
4032/**
4033 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4034 * @oh: struct omap_hwmod *
4035 *
4036 * Prevent the hwmod @oh from being reset during the setup process.
4037 * Intended for use by board-*.c files on boards with devices that
4038 * cannot tolerate being reset. Must be called before the hwmod has
4039 * been set up. Returns 0 upon success or negative error code upon
4040 * failure.
4041 */
4042int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4043{
4044 if (!oh)
4045 return -EINVAL;
4046
4047 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4048 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4049 oh->name);
4050 return -EINVAL;
4051 }
4052
4053 oh->flags |= HWMOD_INIT_NO_RESET;
4054
4055 return 0;
4056}
abc2d545
TK
4057
4058/**
4059 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4060 * @oh: struct omap_hwmod * containing hwmod mux entries
4061 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4062 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4063 *
4064 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4065 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4066 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
4067 * this function is not called for a given pad_idx, then the ISR
4068 * associated with @oh's first MPU IRQ will be triggered when an I/O
4069 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
4070 * the _dynamic or wakeup_ entry: if there are other entries not
4071 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4072 * entries are NOT COUNTED in the dynamic pad index. This function
4073 * must be called separately for each pad that requires its interrupt
4074 * to be re-routed this way. Returns -EINVAL if there is an argument
4075 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4076 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4077 *
4078 * XXX This function interface is fragile. Rather than using array
4079 * indexes, which are subject to unpredictable change, it should be
4080 * using hwmod IRQ names, and some other stable key for the hwmod mux
4081 * pad records.
4082 */
4083int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4084{
4085 int nr_irqs;
4086
4087 might_sleep();
4088
4089 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4090 pad_idx >= oh->mux->nr_pads_dynamic)
4091 return -EINVAL;
4092
4093 /* Check the number of available mpu_irqs */
4094 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4095 ;
4096
4097 if (irq_idx >= nr_irqs)
4098 return -EINVAL;
4099
4100 if (!oh->mux->irqs) {
4101 /* XXX What frees this? */
4102 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4103 GFP_KERNEL);
4104 if (!oh->mux->irqs)
4105 return -ENOMEM;
4106 }
4107 oh->mux->irqs[pad_idx] = irq_idx;
4108
4109 return 0;
4110}
9ebfd285
KH
4111
4112/**
4113 * omap_hwmod_init - initialize the hwmod code
4114 *
4115 * Sets up some function pointers needed by the hwmod code to operate on the
4116 * currently-booted SoC. Intended to be called once during kernel init
4117 * before any hwmods are registered. No return value.
4118 */
4119void __init omap_hwmod_init(void)
4120{
ff4ae5d9
PW
4121 if (cpu_is_omap24xx()) {
4122 soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
4123 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4124 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4125 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4126 } else if (cpu_is_omap34xx()) {
4127 soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
b8249cf2
KH
4128 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4129 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4130 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
05e152c7 4131 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
9ebfd285
KH
4132 soc_ops.enable_module = _omap4_enable_module;
4133 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 4134 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
4135 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4136 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4137 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 4138 soc_ops.init_clkdm = _init_clkdm;
e6d3a8b0
RN
4139 soc_ops.update_context_lost = _omap4_update_context_lost;
4140 soc_ops.get_context_lost = _omap4_get_context_lost;
1688bf19
VH
4141 } else if (soc_is_am33xx()) {
4142 soc_ops.enable_module = _am33xx_enable_module;
4143 soc_ops.disable_module = _am33xx_disable_module;
4144 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4145 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4146 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4147 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4148 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
4149 } else {
4150 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
4151 }
4152
4153 inited = true;
4154}
68c9a95e
TL
4155
4156/**
4157 * omap_hwmod_get_main_clk - get pointer to main clock name
4158 * @oh: struct omap_hwmod *
4159 *
4160 * Returns the main clock name assocated with @oh upon success,
4161 * or NULL if @oh is NULL.
4162 */
4163const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4164{
4165 if (!oh)
4166 return NULL;
4167
4168 return oh->main_clk;
4169}