OMAP: hwmod: Handle opt clocks node using clk_add_alias
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
63c85238
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
db2a60bf 4 * Copyright (C) 2009-2010 Nokia Corporation
63c85238 5 *
4788da26
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This code manages "OMAP modules" (on-chip devices) and their
17 * integration with Linux device driver and bus code.
18 *
19 * References:
20 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
21 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
22 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
23 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
24 * - Open Core Protocol Specification 2.2
25 *
26 * To do:
27 * - pin mux handling
28 * - handle IO mapping
29 * - bus throughput & module latency measurement code
30 *
31 * XXX add tests at the beginning of each function to ensure the hwmod is
32 * in the appropriate state
33 * XXX error return values should be checked to ensure that they are
34 * appropriate
35 */
36#undef DEBUG
37
38#include <linux/kernel.h>
39#include <linux/errno.h>
40#include <linux/io.h>
41#include <linux/clk.h>
42#include <linux/delay.h>
43#include <linux/err.h>
44#include <linux/list.h>
45#include <linux/mutex.h>
63c85238 46
6f8b7ff5 47#include <plat/common.h>
ce491cf8
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48#include <plat/cpu.h>
49#include <plat/clockdomain.h>
50#include <plat/powerdomain.h>
51#include <plat/clock.h>
52#include <plat/omap_hwmod.h>
5365efbe 53#include <plat/prcm.h>
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54
55#include "cm.h"
5365efbe 56#include "prm.h"
63c85238 57
5365efbe
BC
58/* Maximum microseconds to wait for OMAP module to softreset */
59#define MAX_MODULE_SOFTRESET_WAIT 10000
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60
61/* Name of the OMAP hwmod for the MPU */
5c2c0296 62#define MPU_INITIATOR_NAME "mpu"
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63
64/* omap_hwmod_list contains all registered struct omap_hwmods */
65static LIST_HEAD(omap_hwmod_list);
66
67static DEFINE_MUTEX(omap_hwmod_mutex);
68
69/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
70static struct omap_hwmod *mpu_oh;
71
72/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
73static u8 inited;
74
75
76/* Private functions */
77
78/**
79 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
80 * @oh: struct omap_hwmod *
81 *
82 * Load the current value of the hwmod OCP_SYSCONFIG register into the
83 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
84 * OCP_SYSCONFIG register or 0 upon success.
85 */
86static int _update_sysc_cache(struct omap_hwmod *oh)
87{
43b40992
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88 if (!oh->class->sysc) {
89 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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90 return -EINVAL;
91 }
92
93 /* XXX ensure module interface clock is up */
94
43b40992 95 oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238 96
43b40992 97 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 98 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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99
100 return 0;
101}
102
103/**
104 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
105 * @v: OCP_SYSCONFIG value to write
106 * @oh: struct omap_hwmod *
107 *
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108 * Write @v into the module class' OCP_SYSCONFIG register, if it has
109 * one. No return value.
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110 */
111static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
112{
43b40992
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113 if (!oh->class->sysc) {
114 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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115 return;
116 }
117
118 /* XXX ensure module interface clock is up */
119
120 if (oh->_sysc_cache != v) {
121 oh->_sysc_cache = v;
43b40992 122 omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs);
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123 }
124}
125
126/**
127 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
128 * @oh: struct omap_hwmod *
129 * @standbymode: MIDLEMODE field bits
130 * @v: pointer to register contents to modify
131 *
132 * Update the master standby mode bits in @v to be @standbymode for
133 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
134 * upon error or 0 upon success.
135 */
136static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
137 u32 *v)
138{
358f0e63
TG
139 u32 mstandby_mask;
140 u8 mstandby_shift;
141
43b40992
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142 if (!oh->class->sysc ||
143 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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144 return -EINVAL;
145
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146 if (!oh->class->sysc->sysc_fields) {
147 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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148 return -EINVAL;
149 }
150
43b40992 151 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
358f0e63
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152 mstandby_mask = (0x3 << mstandby_shift);
153
154 *v &= ~mstandby_mask;
155 *v |= __ffs(standbymode) << mstandby_shift;
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156
157 return 0;
158}
159
160/**
161 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
162 * @oh: struct omap_hwmod *
163 * @idlemode: SIDLEMODE field bits
164 * @v: pointer to register contents to modify
165 *
166 * Update the slave idle mode bits in @v to be @idlemode for the @oh
167 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
168 * or 0 upon success.
169 */
170static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
171{
358f0e63
TG
172 u32 sidle_mask;
173 u8 sidle_shift;
174
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175 if (!oh->class->sysc ||
176 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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177 return -EINVAL;
178
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179 if (!oh->class->sysc->sysc_fields) {
180 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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181 return -EINVAL;
182 }
183
43b40992 184 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
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185 sidle_mask = (0x3 << sidle_shift);
186
187 *v &= ~sidle_mask;
188 *v |= __ffs(idlemode) << sidle_shift;
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189
190 return 0;
191}
192
193/**
194 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
195 * @oh: struct omap_hwmod *
196 * @clockact: CLOCKACTIVITY field bits
197 * @v: pointer to register contents to modify
198 *
199 * Update the clockactivity mode bits in @v to be @clockact for the
200 * @oh hwmod. Used for additional powersaving on some modules. Does
201 * not write to the hardware. Returns -EINVAL upon error or 0 upon
202 * success.
203 */
204static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
205{
358f0e63
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206 u32 clkact_mask;
207 u8 clkact_shift;
208
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209 if (!oh->class->sysc ||
210 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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211 return -EINVAL;
212
43b40992
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213 if (!oh->class->sysc->sysc_fields) {
214 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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215 return -EINVAL;
216 }
217
43b40992 218 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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219 clkact_mask = (0x3 << clkact_shift);
220
221 *v &= ~clkact_mask;
222 *v |= clockact << clkact_shift;
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223
224 return 0;
225}
226
227/**
228 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
229 * @oh: struct omap_hwmod *
230 * @v: pointer to register contents to modify
231 *
232 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
233 * error or 0 upon success.
234 */
235static int _set_softreset(struct omap_hwmod *oh, u32 *v)
236{
358f0e63
TG
237 u32 softrst_mask;
238
43b40992
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239 if (!oh->class->sysc ||
240 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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241 return -EINVAL;
242
43b40992
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243 if (!oh->class->sysc->sysc_fields) {
244 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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245 return -EINVAL;
246 }
247
43b40992 248 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
249
250 *v |= softrst_mask;
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251
252 return 0;
253}
254
726072e5
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255/**
256 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
257 * @oh: struct omap_hwmod *
258 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
259 * @v: pointer to register contents to modify
260 *
261 * Update the module autoidle bit in @v to be @autoidle for the @oh
262 * hwmod. The autoidle bit controls whether the module can gate
263 * internal clocks automatically when it isn't doing anything; the
264 * exact function of this bit varies on a per-module basis. This
265 * function does not write to the hardware. Returns -EINVAL upon
266 * error or 0 upon success.
267 */
268static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
269 u32 *v)
270{
358f0e63
TG
271 u32 autoidle_mask;
272 u8 autoidle_shift;
273
43b40992
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274 if (!oh->class->sysc ||
275 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
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276 return -EINVAL;
277
43b40992
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278 if (!oh->class->sysc->sysc_fields) {
279 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
280 return -EINVAL;
281 }
282
43b40992 283 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
358f0e63
TG
284 autoidle_mask = (0x3 << autoidle_shift);
285
286 *v &= ~autoidle_mask;
287 *v |= autoidle << autoidle_shift;
726072e5
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288
289 return 0;
290}
291
63c85238
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292/**
293 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
294 * @oh: struct omap_hwmod *
295 *
296 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
297 * upon error or 0 upon success.
298 */
299static int _enable_wakeup(struct omap_hwmod *oh)
300{
358f0e63 301 u32 v, wakeup_mask;
63c85238 302
43b40992
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303 if (!oh->class->sysc ||
304 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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305 return -EINVAL;
306
43b40992
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307 if (!oh->class->sysc->sysc_fields) {
308 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
309 return -EINVAL;
310 }
311
43b40992 312 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 313
63c85238 314 v = oh->_sysc_cache;
358f0e63 315 v |= wakeup_mask;
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316 _write_sysconfig(v, oh);
317
318 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
319
320 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
321
322 return 0;
323}
324
325/**
326 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
327 * @oh: struct omap_hwmod *
328 *
329 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
330 * upon error or 0 upon success.
331 */
332static int _disable_wakeup(struct omap_hwmod *oh)
333{
358f0e63 334 u32 v, wakeup_mask;
63c85238 335
43b40992
PW
336 if (!oh->class->sysc ||
337 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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338 return -EINVAL;
339
43b40992
PW
340 if (!oh->class->sysc->sysc_fields) {
341 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
342 return -EINVAL;
343 }
344
43b40992 345 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 346
63c85238 347 v = oh->_sysc_cache;
358f0e63 348 v &= ~wakeup_mask;
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349 _write_sysconfig(v, oh);
350
351 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
352
353 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
354
355 return 0;
356}
357
358/**
359 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
360 * @oh: struct omap_hwmod *
361 *
362 * Prevent the hardware module @oh from entering idle while the
363 * hardare module initiator @init_oh is active. Useful when a module
364 * will be accessed by a particular initiator (e.g., if a module will
365 * be accessed by the IVA, there should be a sleepdep between the IVA
366 * initiator and the module). Only applies to modules in smart-idle
367 * mode. Returns -EINVAL upon error or passes along
55ed9694 368 * clkdm_add_sleepdep() value upon success.
63c85238
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369 */
370static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
371{
372 if (!oh->_clk)
373 return -EINVAL;
374
55ed9694 375 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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376}
377
378/**
379 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
380 * @oh: struct omap_hwmod *
381 *
382 * Allow the hardware module @oh to enter idle while the hardare
383 * module initiator @init_oh is active. Useful when a module will not
384 * be accessed by a particular initiator (e.g., if a module will not
385 * be accessed by the IVA, there should be no sleepdep between the IVA
386 * initiator and the module). Only applies to modules in smart-idle
387 * mode. Returns -EINVAL upon error or passes along
55ed9694 388 * clkdm_del_sleepdep() value upon success.
63c85238
PW
389 */
390static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
391{
392 if (!oh->_clk)
393 return -EINVAL;
394
55ed9694 395 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
396}
397
398/**
399 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
400 * @oh: struct omap_hwmod *
401 *
402 * Called from _init_clocks(). Populates the @oh _clk (main
403 * functional clock pointer) if a main_clk is present. Returns 0 on
404 * success or -EINVAL on error.
405 */
406static int _init_main_clk(struct omap_hwmod *oh)
407{
63c85238
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408 int ret = 0;
409
50ebdac2 410 if (!oh->main_clk)
63c85238
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411 return 0;
412
63403384 413 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 414 if (!oh->_clk) {
20383d82
BC
415 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
416 oh->name, oh->main_clk);
63403384 417 return -EINVAL;
dc75925d 418 }
63c85238 419
63403384
BC
420 if (!oh->_clk->clkdm)
421 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
422 oh->main_clk, oh->_clk->name);
81d7c6ff 423
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424 return ret;
425}
426
427/**
887adeac 428 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
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429 * @oh: struct omap_hwmod *
430 *
431 * Called from _init_clocks(). Populates the @oh OCP slave interface
432 * clock pointers. Returns 0 on success or -EINVAL on error.
433 */
434static int _init_interface_clks(struct omap_hwmod *oh)
435{
63c85238
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436 struct clk *c;
437 int i;
438 int ret = 0;
439
440 if (oh->slaves_cnt == 0)
441 return 0;
442
682fdc96
BC
443 for (i = 0; i < oh->slaves_cnt; i++) {
444 struct omap_hwmod_ocp_if *os = oh->slaves[i];
445
50ebdac2 446 if (!os->clk)
63c85238
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447 continue;
448
50ebdac2 449 c = omap_clk_get_by_name(os->clk);
dc75925d 450 if (!c) {
20383d82
BC
451 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
452 oh->name, os->clk);
63c85238 453 ret = -EINVAL;
dc75925d 454 }
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455 os->_clk = c;
456 }
457
458 return ret;
459}
460
461/**
462 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
463 * @oh: struct omap_hwmod *
464 *
465 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
466 * clock pointers. Returns 0 on success or -EINVAL on error.
467 */
468static int _init_opt_clks(struct omap_hwmod *oh)
469{
470 struct omap_hwmod_opt_clk *oc;
471 struct clk *c;
472 int i;
473 int ret = 0;
474
475 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 476 c = omap_clk_get_by_name(oc->clk);
dc75925d 477 if (!c) {
20383d82
BC
478 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
479 oh->name, oc->clk);
63c85238 480 ret = -EINVAL;
dc75925d 481 }
63c85238
PW
482 oc->_clk = c;
483 }
484
485 return ret;
486}
487
488/**
489 * _enable_clocks - enable hwmod main clock and interface clocks
490 * @oh: struct omap_hwmod *
491 *
492 * Enables all clocks necessary for register reads and writes to succeed
493 * on the hwmod @oh. Returns 0.
494 */
495static int _enable_clocks(struct omap_hwmod *oh)
496{
63c85238
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497 int i;
498
499 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
500
4d3ae5a9 501 if (oh->_clk)
63c85238
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502 clk_enable(oh->_clk);
503
504 if (oh->slaves_cnt > 0) {
682fdc96
BC
505 for (i = 0; i < oh->slaves_cnt; i++) {
506 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
507 struct clk *c = os->_clk;
508
4d3ae5a9 509 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
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510 clk_enable(c);
511 }
512 }
513
514 /* The opt clocks are controlled by the device driver. */
515
516 return 0;
517}
518
519/**
520 * _disable_clocks - disable hwmod main clock and interface clocks
521 * @oh: struct omap_hwmod *
522 *
523 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
524 */
525static int _disable_clocks(struct omap_hwmod *oh)
526{
63c85238
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527 int i;
528
529 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
530
4d3ae5a9 531 if (oh->_clk)
63c85238
PW
532 clk_disable(oh->_clk);
533
534 if (oh->slaves_cnt > 0) {
682fdc96
BC
535 for (i = 0; i < oh->slaves_cnt; i++) {
536 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
537 struct clk *c = os->_clk;
538
4d3ae5a9 539 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
540 clk_disable(c);
541 }
542 }
543
544 /* The opt clocks are controlled by the device driver. */
545
546 return 0;
547}
548
96835af9
BC
549static void _enable_optional_clocks(struct omap_hwmod *oh)
550{
551 struct omap_hwmod_opt_clk *oc;
552 int i;
553
554 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
555
556 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
557 if (oc->_clk) {
558 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
559 oc->_clk->name);
560 clk_enable(oc->_clk);
561 }
562}
563
564static void _disable_optional_clocks(struct omap_hwmod *oh)
565{
566 struct omap_hwmod_opt_clk *oc;
567 int i;
568
569 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
570
571 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
572 if (oc->_clk) {
573 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
574 oc->_clk->name);
575 clk_disable(oc->_clk);
576 }
577}
578
63c85238
PW
579/**
580 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
581 * @oh: struct omap_hwmod *
582 *
583 * Returns the array index of the OCP slave port that the MPU
584 * addresses the device on, or -EINVAL upon error or not found.
585 */
586static int _find_mpu_port_index(struct omap_hwmod *oh)
587{
63c85238
PW
588 int i;
589 int found = 0;
590
591 if (!oh || oh->slaves_cnt == 0)
592 return -EINVAL;
593
682fdc96
BC
594 for (i = 0; i < oh->slaves_cnt; i++) {
595 struct omap_hwmod_ocp_if *os = oh->slaves[i];
596
63c85238
PW
597 if (os->user & OCP_USER_MPU) {
598 found = 1;
599 break;
600 }
601 }
602
603 if (found)
604 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
605 oh->name, i);
606 else
607 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
608 oh->name);
609
610 return (found) ? i : -EINVAL;
611}
612
613/**
614 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
615 * @oh: struct omap_hwmod *
616 *
617 * Return the virtual address of the base of the register target of
618 * device @oh, or NULL on error.
619 */
620static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
621{
622 struct omap_hwmod_ocp_if *os;
623 struct omap_hwmod_addr_space *mem;
624 int i;
625 int found = 0;
986a13f5 626 void __iomem *va_start;
63c85238
PW
627
628 if (!oh || oh->slaves_cnt == 0)
629 return NULL;
630
682fdc96 631 os = oh->slaves[index];
63c85238
PW
632
633 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
634 if (mem->flags & ADDR_TYPE_RT) {
635 found = 1;
636 break;
637 }
638 }
639
986a13f5
TL
640 if (found) {
641 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
642 if (!va_start) {
643 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
644 return NULL;
645 }
63c85238 646 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
647 oh->name, va_start);
648 } else {
63c85238
PW
649 pr_debug("omap_hwmod: %s: no MPU register target found\n",
650 oh->name);
986a13f5 651 }
63c85238 652
986a13f5 653 return (found) ? va_start : NULL;
63c85238
PW
654}
655
656/**
657 * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG
658 * @oh: struct omap_hwmod *
659 *
660 * If module is marked as SWSUP_SIDLE, force the module out of slave
661 * idle; otherwise, configure it for smart-idle. If module is marked
662 * as SWSUP_MSUSPEND, force the module out of master standby;
663 * otherwise, configure it for smart-standby. No return value.
664 */
665static void _sysc_enable(struct omap_hwmod *oh)
666{
43b40992 667 u8 idlemode, sf;
63c85238
PW
668 u32 v;
669
43b40992 670 if (!oh->class->sysc)
63c85238
PW
671 return;
672
673 v = oh->_sysc_cache;
43b40992 674 sf = oh->class->sysc->sysc_flags;
63c85238 675
43b40992 676 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
677 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
678 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
679 _set_slave_idlemode(oh, idlemode, &v);
680 }
681
43b40992 682 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
683 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
684 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
685 _set_master_standbymode(oh, idlemode, &v);
686 }
687
43b40992 688 if (sf & SYSC_HAS_AUTOIDLE) {
726072e5
PW
689 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
690 0 : 1;
691 _set_module_autoidle(oh, idlemode, &v);
692 }
693
a16b1f7f
PW
694 /*
695 * XXX The clock framework should handle this, by
696 * calling into this code. But this must wait until the
697 * clock structures are tagged with omap_hwmod entries
698 */
43b40992
PW
699 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
700 (sf & SYSC_HAS_CLOCKACTIVITY))
701 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238
PW
702
703 _write_sysconfig(v, oh);
9980ce53
RN
704
705 /* If slave is in SMARTIDLE, also enable wakeup */
706 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
707 _enable_wakeup(oh);
63c85238
PW
708}
709
710/**
711 * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG
712 * @oh: struct omap_hwmod *
713 *
714 * If module is marked as SWSUP_SIDLE, force the module into slave
715 * idle; otherwise, configure it for smart-idle. If module is marked
716 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
717 * configure it for smart-standby. No return value.
718 */
719static void _sysc_idle(struct omap_hwmod *oh)
720{
43b40992 721 u8 idlemode, sf;
63c85238
PW
722 u32 v;
723
43b40992 724 if (!oh->class->sysc)
63c85238
PW
725 return;
726
727 v = oh->_sysc_cache;
43b40992 728 sf = oh->class->sysc->sysc_flags;
63c85238 729
43b40992 730 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
731 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
732 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
733 _set_slave_idlemode(oh, idlemode, &v);
734 }
735
43b40992 736 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
737 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
738 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
739 _set_master_standbymode(oh, idlemode, &v);
740 }
741
742 _write_sysconfig(v, oh);
743}
744
745/**
746 * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG
747 * @oh: struct omap_hwmod *
748 *
749 * Force the module into slave idle and master suspend. No return
750 * value.
751 */
752static void _sysc_shutdown(struct omap_hwmod *oh)
753{
754 u32 v;
43b40992 755 u8 sf;
63c85238 756
43b40992 757 if (!oh->class->sysc)
63c85238
PW
758 return;
759
760 v = oh->_sysc_cache;
43b40992 761 sf = oh->class->sysc->sysc_flags;
63c85238 762
43b40992 763 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
764 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
765
43b40992 766 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
767 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
768
43b40992 769 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 770 _set_module_autoidle(oh, 1, &v);
63c85238
PW
771
772 _write_sysconfig(v, oh);
773}
774
775/**
776 * _lookup - find an omap_hwmod by name
777 * @name: find an omap_hwmod by name
778 *
779 * Return a pointer to an omap_hwmod by name, or NULL if not found.
780 * Caller must hold omap_hwmod_mutex.
781 */
782static struct omap_hwmod *_lookup(const char *name)
783{
784 struct omap_hwmod *oh, *temp_oh;
785
786 oh = NULL;
787
788 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
789 if (!strcmp(name, temp_oh->name)) {
790 oh = temp_oh;
791 break;
792 }
793 }
794
795 return oh;
796}
797
798/**
799 * _init_clocks - clk_get() all clocks associated with this hwmod
800 * @oh: struct omap_hwmod *
97d60162 801 * @data: not used; pass NULL
63c85238
PW
802 *
803 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
12b1fdb4
KH
804 * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
805 * the omap_hwmod has not yet been registered or if the clocks have
806 * already been initialized, 0 on success, or a non-zero error on
807 * failure.
63c85238 808 */
97d60162 809static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
810{
811 int ret = 0;
812
813 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
814 return -EINVAL;
815
816 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
817
818 ret |= _init_main_clk(oh);
819 ret |= _init_interface_clks(oh);
820 ret |= _init_opt_clks(oh);
821
f5c1f84b
BC
822 if (!ret)
823 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 824
f5c1f84b 825 return 0;
63c85238
PW
826}
827
828/**
829 * _wait_target_ready - wait for a module to leave slave idle
830 * @oh: struct omap_hwmod *
831 *
832 * Wait for a module @oh to leave slave idle. Returns 0 if the module
833 * does not have an IDLEST bit or if the module successfully leaves
834 * slave idle; otherwise, pass along the return value of the
835 * appropriate *_cm_wait_module_ready() function.
836 */
837static int _wait_target_ready(struct omap_hwmod *oh)
838{
839 struct omap_hwmod_ocp_if *os;
840 int ret;
841
842 if (!oh)
843 return -EINVAL;
844
845 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
846 return 0;
847
682fdc96 848 os = oh->slaves[oh->_mpu_port_index];
63c85238 849
33f7ec81 850 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
851 return 0;
852
853 /* XXX check module SIDLEMODE */
854
855 /* XXX check clock enable states */
856
857 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
858 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
859 oh->prcm.omap2.idlest_reg_id,
860 oh->prcm.omap2.idlest_idle_bit);
63c85238 861 } else if (cpu_is_omap44xx()) {
9a23dfe1 862 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
863 } else {
864 BUG();
865 };
866
867 return ret;
868}
869
5365efbe
BC
870/**
871 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
872 * @oh: struct omap_hwmod *
873 * @name: name of the reset line in the context of this hwmod
874 *
875 * Return the bit position of the reset line that match the
876 * input name. Return -ENOENT if not found.
877 */
878static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
879{
880 int i;
881
882 for (i = 0; i < oh->rst_lines_cnt; i++) {
883 const char *rst_line = oh->rst_lines[i].name;
884 if (!strcmp(rst_line, name)) {
885 u8 shift = oh->rst_lines[i].rst_shift;
886 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
887 oh->name, rst_line, shift);
888
889 return shift;
890 }
891 }
892
893 return -ENOENT;
894}
895
896/**
897 * _assert_hardreset - assert the HW reset line of submodules
898 * contained in the hwmod module.
899 * @oh: struct omap_hwmod *
900 * @name: name of the reset line to lookup and assert
901 *
902 * Some IP like dsp, ipu or iva contain processor that require
903 * an HW reset line to be assert / deassert in order to enable fully
904 * the IP.
905 */
906static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
907{
908 u8 shift;
909
910 if (!oh)
911 return -EINVAL;
912
913 shift = _lookup_hardreset(oh, name);
914 if (IS_ERR_VALUE(shift))
915 return shift;
916
917 if (cpu_is_omap24xx() || cpu_is_omap34xx())
918 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
919 shift);
920 else if (cpu_is_omap44xx())
921 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
922 shift);
923 else
924 return -EINVAL;
925}
926
927/**
928 * _deassert_hardreset - deassert the HW reset line of submodules contained
929 * in the hwmod module.
930 * @oh: struct omap_hwmod *
931 * @name: name of the reset line to look up and deassert
932 *
933 * Some IP like dsp, ipu or iva contain processor that require
934 * an HW reset line to be assert / deassert in order to enable fully
935 * the IP.
936 */
937static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
938{
939 u8 shift;
940 int r;
941
942 if (!oh)
943 return -EINVAL;
944
945 shift = _lookup_hardreset(oh, name);
946 if (IS_ERR_VALUE(shift))
947 return shift;
948
949 if (cpu_is_omap24xx() || cpu_is_omap34xx())
950 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
951 shift);
952 else if (cpu_is_omap44xx())
953 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
954 shift);
955 else
956 return -EINVAL;
957
958 if (r == -EBUSY)
959 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
960
961 return r;
962}
963
964/**
965 * _read_hardreset - read the HW reset line state of submodules
966 * contained in the hwmod module
967 * @oh: struct omap_hwmod *
968 * @name: name of the reset line to look up and read
969 *
970 * Return the state of the reset line.
971 */
972static int _read_hardreset(struct omap_hwmod *oh, const char *name)
973{
974 u8 shift;
975
976 if (!oh)
977 return -EINVAL;
978
979 shift = _lookup_hardreset(oh, name);
980 if (IS_ERR_VALUE(shift))
981 return shift;
982
983 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
984 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
985 shift);
986 } else if (cpu_is_omap44xx()) {
987 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
988 shift);
989 } else {
990 return -EINVAL;
991 }
992}
993
63c85238
PW
994/**
995 * _reset - reset an omap_hwmod
996 * @oh: struct omap_hwmod *
997 *
998 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
999 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1000 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1001 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1002 *
1003 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1004 * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
1005 * use the SYSCONFIG softreset bit to provide the status.
1006 *
1007 * Note that some IP like McBSP does have a reset control but no reset status.
63c85238
PW
1008 */
1009static int _reset(struct omap_hwmod *oh)
1010{
96835af9 1011 u32 v;
6f8b7ff5 1012 int c = 0;
96835af9 1013 int ret = 0;
63c85238 1014
43b40992 1015 if (!oh->class->sysc ||
2cb06814 1016 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1017 return -EINVAL;
1018
1019 /* clocks must be on for this operation */
1020 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1021 pr_warning("omap_hwmod: %s: reset can only be entered from "
1022 "enabled state\n", oh->name);
63c85238
PW
1023 return -EINVAL;
1024 }
1025
96835af9
BC
1026 /* For some modules, all optionnal clocks need to be enabled as well */
1027 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1028 _enable_optional_clocks(oh);
1029
63c85238
PW
1030 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1031
1032 v = oh->_sysc_cache;
96835af9
BC
1033 ret = _set_softreset(oh, &v);
1034 if (ret)
1035 goto dis_opt_clks;
63c85238
PW
1036 _write_sysconfig(v, oh);
1037
2cb06814
BC
1038 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1039 omap_test_timeout((omap_hwmod_readl(oh,
1040 oh->class->sysc->syss_offs)
1041 & SYSS_RESETDONE_MASK),
1042 MAX_MODULE_SOFTRESET_WAIT, c);
1043 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1044 omap_test_timeout(!(omap_hwmod_readl(oh,
1045 oh->class->sysc->sysc_offs)
1046 & SYSC_TYPE2_SOFTRESET_MASK),
1047 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1048
5365efbe 1049 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1050 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1051 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1052 else
5365efbe 1053 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1054
1055 /*
1056 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1057 * _wait_target_ready() or _reset()
1058 */
1059
96835af9
BC
1060 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1061
1062dis_opt_clks:
1063 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1064 _disable_optional_clocks(oh);
1065
1066 return ret;
63c85238
PW
1067}
1068
1069/**
84824022 1070 * _omap_hwmod_enable - enable an omap_hwmod
63c85238
PW
1071 * @oh: struct omap_hwmod *
1072 *
1073 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
12b1fdb4
KH
1074 * register target. Returns -EINVAL if the hwmod is in the wrong
1075 * state or passes along the return value of _wait_target_ready().
63c85238 1076 */
84824022 1077int _omap_hwmod_enable(struct omap_hwmod *oh)
63c85238
PW
1078{
1079 int r;
1080
1081 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1082 oh->_state != _HWMOD_STATE_IDLE &&
1083 oh->_state != _HWMOD_STATE_DISABLED) {
1084 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1085 "from initialized, idle, or disabled state\n", oh->name);
1086 return -EINVAL;
1087 }
1088
1089 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1090
5365efbe
BC
1091 /*
1092 * If an IP contains only one HW reset line, then de-assert it in order
1093 * to allow to enable the clocks. Otherwise the PRCM will return
1094 * Intransition status, and the init will failed.
1095 */
1096 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1097 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1098 _deassert_hardreset(oh, oh->rst_lines[0].name);
1099
63c85238
PW
1100 /* XXX mux balls */
1101
1102 _add_initiator_dep(oh, mpu_oh);
1103 _enable_clocks(oh);
1104
63c85238 1105 r = _wait_target_ready(oh);
9a23dfe1 1106 if (!r) {
63c85238
PW
1107 oh->_state = _HWMOD_STATE_ENABLED;
1108
9a23dfe1
BC
1109 /* Access the sysconfig only if the target is ready */
1110 if (oh->class->sysc) {
1111 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1112 _update_sysc_cache(oh);
1113 _sysc_enable(oh);
1114 }
1115 } else {
1116 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1117 oh->name, r);
1118 }
1119
63c85238
PW
1120 return r;
1121}
1122
1123/**
1124 * _idle - idle an omap_hwmod
1125 * @oh: struct omap_hwmod *
1126 *
1127 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1128 * no further work. Returns -EINVAL if the hwmod is in the wrong
1129 * state or returns 0.
1130 */
84824022 1131int _omap_hwmod_idle(struct omap_hwmod *oh)
63c85238
PW
1132{
1133 if (oh->_state != _HWMOD_STATE_ENABLED) {
1134 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1135 "enabled state\n", oh->name);
1136 return -EINVAL;
1137 }
1138
1139 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1140
43b40992 1141 if (oh->class->sysc)
63c85238
PW
1142 _sysc_idle(oh);
1143 _del_initiator_dep(oh, mpu_oh);
1144 _disable_clocks(oh);
1145
1146 oh->_state = _HWMOD_STATE_IDLE;
1147
1148 return 0;
1149}
1150
1151/**
1152 * _shutdown - shutdown an omap_hwmod
1153 * @oh: struct omap_hwmod *
1154 *
1155 * Shut down an omap_hwmod @oh. This should be called when the driver
1156 * used for the hwmod is removed or unloaded or if the driver is not
1157 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1158 * state or returns 0.
1159 */
1160static int _shutdown(struct omap_hwmod *oh)
1161{
1162 if (oh->_state != _HWMOD_STATE_IDLE &&
1163 oh->_state != _HWMOD_STATE_ENABLED) {
1164 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1165 "from idle, or enabled state\n", oh->name);
1166 return -EINVAL;
1167 }
1168
1169 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1170
43b40992 1171 if (oh->class->sysc)
63c85238 1172 _sysc_shutdown(oh);
3827f949 1173
5365efbe
BC
1174 /*
1175 * If an IP contains only one HW reset line, then assert it
1176 * before disabling the clocks and shutting down the IP.
1177 */
1178 if (oh->rst_lines_cnt == 1)
1179 _assert_hardreset(oh, oh->rst_lines[0].name);
1180
3827f949
BC
1181 /* clocks and deps are already disabled in idle */
1182 if (oh->_state == _HWMOD_STATE_ENABLED) {
1183 _del_initiator_dep(oh, mpu_oh);
1184 /* XXX what about the other system initiators here? dma, dsp */
1185 _disable_clocks(oh);
1186 }
63c85238
PW
1187 /* XXX Should this code also force-disable the optional clocks? */
1188
1189 /* XXX mux any associated balls to safe mode */
1190
1191 oh->_state = _HWMOD_STATE_DISABLED;
1192
1193 return 0;
1194}
1195
63c85238
PW
1196/**
1197 * _setup - do initial configuration of omap_hwmod
1198 * @oh: struct omap_hwmod *
97d60162 1199 * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
63c85238
PW
1200 *
1201 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
12b1fdb4
KH
1202 * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
1203 * a system that will not call omap_hwmod_enable() to enable devices
1204 * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
1205 * is in the wrong state or returns 0.
63c85238 1206 */
97d60162 1207static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1208{
9a23dfe1 1209 int i, r;
97d60162 1210 u8 skip_setup_idle;
63c85238 1211
97d60162 1212 if (!oh || !data)
63c85238
PW
1213 return -EINVAL;
1214
97d60162
PW
1215 skip_setup_idle = *(u8 *)data;
1216
63c85238
PW
1217 /* Set iclk autoidle mode */
1218 if (oh->slaves_cnt > 0) {
682fdc96
BC
1219 for (i = 0; i < oh->slaves_cnt; i++) {
1220 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1221 struct clk *c = os->_clk;
1222
4d3ae5a9 1223 if (!c)
63c85238
PW
1224 continue;
1225
1226 if (os->flags & OCPIF_SWSUP_IDLE) {
1227 /* XXX omap_iclk_deny_idle(c); */
1228 } else {
1229 /* XXX omap_iclk_allow_idle(c); */
1230 clk_enable(c);
1231 }
1232 }
1233 }
1234
12b1fdb4 1235 mutex_init(&oh->_mutex);
63c85238
PW
1236 oh->_state = _HWMOD_STATE_INITIALIZED;
1237
5365efbe
BC
1238 /*
1239 * In the case of hwmod with hardreset that should not be
1240 * de-assert at boot time, we have to keep the module
1241 * initialized, because we cannot enable it properly with the
1242 * reset asserted. Exit without warning because that behavior is
1243 * expected.
1244 */
1245 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1246 return 0;
1247
84824022 1248 r = _omap_hwmod_enable(oh);
9a23dfe1
BC
1249 if (r) {
1250 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1251 oh->name, oh->_state);
1252 return 0;
1253 }
63c85238 1254
b835d014 1255 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1256 _reset(oh);
1257
b835d014 1258 /*
76e5589e
BC
1259 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1260 * The _omap_hwmod_enable() function should be split to
1261 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1262 */
43b40992 1263 if (oh->class->sysc) {
b835d014
PW
1264 _update_sysc_cache(oh);
1265 _sysc_enable(oh);
1266 }
1267 }
63c85238 1268
97d60162 1269 if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle)
84824022 1270 _omap_hwmod_idle(oh);
63c85238
PW
1271
1272 return 0;
1273}
1274
1275
1276
1277/* Public functions */
1278
1279u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
1280{
db2a60bf 1281 return __raw_readl(oh->_mpu_rt_va + reg_offs);
63c85238
PW
1282}
1283
1284void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1285{
db2a60bf 1286 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
63c85238
PW
1287}
1288
887adeac
PW
1289/**
1290 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1291 * @oh: struct omap_hwmod *
1292 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1293 *
1294 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1295 * local copy. Intended to be used by drivers that have some erratum
1296 * that requires direct manipulation of the SIDLEMODE bits. Returns
1297 * -EINVAL if @oh is null, or passes along the return value from
1298 * _set_slave_idlemode().
1299 *
1300 * XXX Does this function have any current users? If not, we should
1301 * remove it; it is better to let the rest of the hwmod code handle this.
1302 * Any users of this function should be scrutinized carefully.
1303 */
46273e6f
KH
1304int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1305{
1306 u32 v;
1307 int retval = 0;
1308
1309 if (!oh)
1310 return -EINVAL;
1311
1312 v = oh->_sysc_cache;
1313
1314 retval = _set_slave_idlemode(oh, idlemode, &v);
1315 if (!retval)
1316 _write_sysconfig(v, oh);
1317
1318 return retval;
1319}
1320
63c85238
PW
1321/**
1322 * omap_hwmod_register - register a struct omap_hwmod
1323 * @oh: struct omap_hwmod *
1324 *
43b40992
PW
1325 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1326 * already has been registered by the same name; -EINVAL if the
1327 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1328 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1329 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1330 * success.
63c85238
PW
1331 *
1332 * XXX The data should be copied into bootmem, so the original data
1333 * should be marked __initdata and freed after init. This would allow
1334 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1335 * that the copy process would be relatively complex due to the large number
1336 * of substructures.
1337 */
1338int omap_hwmod_register(struct omap_hwmod *oh)
1339{
1340 int ret, ms_id;
1341
43b40992
PW
1342 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1343 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1344 return -EINVAL;
1345
1346 mutex_lock(&omap_hwmod_mutex);
1347
1348 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1349
1350 if (_lookup(oh->name)) {
1351 ret = -EEXIST;
1352 goto ohr_unlock;
1353 }
1354
1355 ms_id = _find_mpu_port_index(oh);
1356 if (!IS_ERR_VALUE(ms_id)) {
1357 oh->_mpu_port_index = ms_id;
db2a60bf 1358 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
63c85238
PW
1359 } else {
1360 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1361 }
1362
1363 list_add_tail(&oh->node, &omap_hwmod_list);
1364
1365 oh->_state = _HWMOD_STATE_REGISTERED;
1366
1367 ret = 0;
1368
1369ohr_unlock:
1370 mutex_unlock(&omap_hwmod_mutex);
1371 return ret;
1372}
1373
1374/**
1375 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1376 * @name: name of the omap_hwmod to look up
1377 *
1378 * Given a @name of an omap_hwmod, return a pointer to the registered
1379 * struct omap_hwmod *, or NULL upon error.
1380 */
1381struct omap_hwmod *omap_hwmod_lookup(const char *name)
1382{
1383 struct omap_hwmod *oh;
1384
1385 if (!name)
1386 return NULL;
1387
1388 mutex_lock(&omap_hwmod_mutex);
1389 oh = _lookup(name);
1390 mutex_unlock(&omap_hwmod_mutex);
1391
1392 return oh;
1393}
1394
1395/**
1396 * omap_hwmod_for_each - call function for each registered omap_hwmod
1397 * @fn: pointer to a callback function
97d60162 1398 * @data: void * data to pass to callback function
63c85238
PW
1399 *
1400 * Call @fn for each registered omap_hwmod, passing @data to each
1401 * function. @fn must return 0 for success or any other value for
1402 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1403 * will stop and the non-zero return value will be passed to the
1404 * caller of omap_hwmod_for_each(). @fn is called with
1405 * omap_hwmod_for_each() held.
1406 */
97d60162
PW
1407int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1408 void *data)
63c85238
PW
1409{
1410 struct omap_hwmod *temp_oh;
1411 int ret;
1412
1413 if (!fn)
1414 return -EINVAL;
1415
1416 mutex_lock(&omap_hwmod_mutex);
1417 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1418 ret = (*fn)(temp_oh, data);
63c85238
PW
1419 if (ret)
1420 break;
1421 }
1422 mutex_unlock(&omap_hwmod_mutex);
1423
1424 return ret;
1425}
1426
1427
1428/**
1429 * omap_hwmod_init - init omap_hwmod code and register hwmods
1430 * @ohs: pointer to an array of omap_hwmods to register
1431 *
1432 * Intended to be called early in boot before the clock framework is
1433 * initialized. If @ohs is not null, will register all omap_hwmods
1434 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1435 * omap_hwmod_init() has already been called or 0 otherwise.
1436 */
1437int omap_hwmod_init(struct omap_hwmod **ohs)
1438{
1439 struct omap_hwmod *oh;
1440 int r;
1441
1442 if (inited)
1443 return -EINVAL;
1444
1445 inited = 1;
1446
1447 if (!ohs)
1448 return 0;
1449
1450 oh = *ohs;
1451 while (oh) {
1452 if (omap_chip_is(oh->omap_chip)) {
1453 r = omap_hwmod_register(oh);
1454 WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
1455 "%d\n", oh->name, r);
1456 }
1457 oh = *++ohs;
1458 }
1459
1460 return 0;
1461}
1462
1463/**
1464 * omap_hwmod_late_init - do some post-clock framework initialization
97d60162 1465 * @skip_setup_idle: if 1, do not idle hwmods in _setup()
63c85238
PW
1466 *
1467 * Must be called after omap2_clk_init(). Resolves the struct clk names
1468 * to struct clk pointers for each registered omap_hwmod. Also calls
1469 * _setup() on each hwmod. Returns 0.
1470 */
97d60162 1471int omap_hwmod_late_init(u8 skip_setup_idle)
63c85238
PW
1472{
1473 int r;
1474
1475 /* XXX check return value */
97d60162 1476 r = omap_hwmod_for_each(_init_clocks, NULL);
63c85238
PW
1477 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1478
1479 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1480 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1481 MPU_INITIATOR_NAME);
1482
97d60162
PW
1483 if (skip_setup_idle)
1484 pr_debug("omap_hwmod: will leave hwmods enabled during setup\n");
1485
1486 omap_hwmod_for_each(_setup, &skip_setup_idle);
63c85238
PW
1487
1488 return 0;
1489}
1490
1491/**
1492 * omap_hwmod_unregister - unregister an omap_hwmod
1493 * @oh: struct omap_hwmod *
1494 *
1495 * Unregisters a previously-registered omap_hwmod @oh. There's probably
1496 * no use case for this, so it is likely to be removed in a later version.
1497 *
1498 * XXX Free all of the bootmem-allocated structures here when that is
1499 * implemented. Make it clear that core code is the only code that is
1500 * expected to unregister modules.
1501 */
1502int omap_hwmod_unregister(struct omap_hwmod *oh)
1503{
1504 if (!oh)
1505 return -EINVAL;
1506
1507 pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
1508
1509 mutex_lock(&omap_hwmod_mutex);
db2a60bf 1510 iounmap(oh->_mpu_rt_va);
63c85238
PW
1511 list_del(&oh->node);
1512 mutex_unlock(&omap_hwmod_mutex);
1513
1514 return 0;
1515}
1516
1517/**
1518 * omap_hwmod_enable - enable an omap_hwmod
1519 * @oh: struct omap_hwmod *
1520 *
1521 * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable().
1522 * Returns -EINVAL on error or passes along the return value from _enable().
1523 */
1524int omap_hwmod_enable(struct omap_hwmod *oh)
1525{
1526 int r;
1527
1528 if (!oh)
1529 return -EINVAL;
1530
12b1fdb4 1531 mutex_lock(&oh->_mutex);
84824022 1532 r = _omap_hwmod_enable(oh);
12b1fdb4 1533 mutex_unlock(&oh->_mutex);
63c85238
PW
1534
1535 return r;
1536}
1537
84824022 1538
63c85238
PW
1539/**
1540 * omap_hwmod_idle - idle an omap_hwmod
1541 * @oh: struct omap_hwmod *
1542 *
1543 * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle().
1544 * Returns -EINVAL on error or passes along the return value from _idle().
1545 */
1546int omap_hwmod_idle(struct omap_hwmod *oh)
1547{
1548 if (!oh)
1549 return -EINVAL;
1550
12b1fdb4 1551 mutex_lock(&oh->_mutex);
84824022 1552 _omap_hwmod_idle(oh);
12b1fdb4 1553 mutex_unlock(&oh->_mutex);
63c85238
PW
1554
1555 return 0;
1556}
1557
1558/**
1559 * omap_hwmod_shutdown - shutdown an omap_hwmod
1560 * @oh: struct omap_hwmod *
1561 *
1562 * Shutdown an omap_hwomd @oh. Intended to be called by
1563 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1564 * the return value from _shutdown().
1565 */
1566int omap_hwmod_shutdown(struct omap_hwmod *oh)
1567{
1568 if (!oh)
1569 return -EINVAL;
1570
12b1fdb4 1571 mutex_lock(&oh->_mutex);
63c85238 1572 _shutdown(oh);
12b1fdb4 1573 mutex_unlock(&oh->_mutex);
63c85238
PW
1574
1575 return 0;
1576}
1577
1578/**
1579 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1580 * @oh: struct omap_hwmod *oh
1581 *
1582 * Intended to be called by the omap_device code.
1583 */
1584int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1585{
12b1fdb4 1586 mutex_lock(&oh->_mutex);
63c85238 1587 _enable_clocks(oh);
12b1fdb4 1588 mutex_unlock(&oh->_mutex);
63c85238
PW
1589
1590 return 0;
1591}
1592
1593/**
1594 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1595 * @oh: struct omap_hwmod *oh
1596 *
1597 * Intended to be called by the omap_device code.
1598 */
1599int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1600{
12b1fdb4 1601 mutex_lock(&oh->_mutex);
63c85238 1602 _disable_clocks(oh);
12b1fdb4 1603 mutex_unlock(&oh->_mutex);
63c85238
PW
1604
1605 return 0;
1606}
1607
1608/**
1609 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1610 * @oh: struct omap_hwmod *oh
1611 *
1612 * Intended to be called by drivers and core code when all posted
1613 * writes to a device must complete before continuing further
1614 * execution (for example, after clearing some device IRQSTATUS
1615 * register bits)
1616 *
1617 * XXX what about targets with multiple OCP threads?
1618 */
1619void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1620{
1621 BUG_ON(!oh);
1622
43b40992 1623 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1624 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1625 "device configuration\n", oh->name);
1626 return;
1627 }
1628
1629 /*
1630 * Forces posted writes to complete on the OCP thread handling
1631 * register writes
1632 */
43b40992 1633 omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1634}
1635
1636/**
1637 * omap_hwmod_reset - reset the hwmod
1638 * @oh: struct omap_hwmod *
1639 *
1640 * Under some conditions, a driver may wish to reset the entire device.
1641 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1642 * the return value from _reset().
63c85238
PW
1643 */
1644int omap_hwmod_reset(struct omap_hwmod *oh)
1645{
1646 int r;
1647
9b579114 1648 if (!oh)
63c85238
PW
1649 return -EINVAL;
1650
12b1fdb4 1651 mutex_lock(&oh->_mutex);
63c85238 1652 r = _reset(oh);
12b1fdb4 1653 mutex_unlock(&oh->_mutex);
63c85238
PW
1654
1655 return r;
1656}
1657
1658/**
1659 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1660 * @oh: struct omap_hwmod *
1661 * @res: pointer to the first element of an array of struct resource to fill
1662 *
1663 * Count the number of struct resource array elements necessary to
1664 * contain omap_hwmod @oh resources. Intended to be called by code
1665 * that registers omap_devices. Intended to be used to determine the
1666 * size of a dynamically-allocated struct resource array, before
1667 * calling omap_hwmod_fill_resources(). Returns the number of struct
1668 * resource array elements needed.
1669 *
1670 * XXX This code is not optimized. It could attempt to merge adjacent
1671 * resource IDs.
1672 *
1673 */
1674int omap_hwmod_count_resources(struct omap_hwmod *oh)
1675{
1676 int ret, i;
1677
9ee9fff9 1678 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1679
1680 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1681 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1682
1683 return ret;
1684}
1685
1686/**
1687 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1688 * @oh: struct omap_hwmod *
1689 * @res: pointer to the first element of an array of struct resource to fill
1690 *
1691 * Fill the struct resource array @res with resource data from the
1692 * omap_hwmod @oh. Intended to be called by code that registers
1693 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1694 * number of array elements filled.
1695 */
1696int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1697{
1698 int i, j;
1699 int r = 0;
1700
1701 /* For each IRQ, DMA, memory area, fill in array.*/
1702
1703 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1704 (res + r)->name = (oh->mpu_irqs + i)->name;
1705 (res + r)->start = (oh->mpu_irqs + i)->irq;
1706 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1707 (res + r)->flags = IORESOURCE_IRQ;
1708 r++;
1709 }
1710
9ee9fff9
BC
1711 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1712 (res + r)->name = (oh->sdma_reqs + i)->name;
1713 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1714 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
1715 (res + r)->flags = IORESOURCE_DMA;
1716 r++;
1717 }
1718
1719 for (i = 0; i < oh->slaves_cnt; i++) {
1720 struct omap_hwmod_ocp_if *os;
1721
682fdc96 1722 os = oh->slaves[i];
63c85238
PW
1723
1724 for (j = 0; j < os->addr_cnt; j++) {
1725 (res + r)->start = (os->addr + j)->pa_start;
1726 (res + r)->end = (os->addr + j)->pa_end;
1727 (res + r)->flags = IORESOURCE_MEM;
1728 r++;
1729 }
1730 }
1731
1732 return r;
1733}
1734
1735/**
1736 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1737 * @oh: struct omap_hwmod *
1738 *
1739 * Return the powerdomain pointer associated with the OMAP module
1740 * @oh's main clock. If @oh does not have a main clk, return the
1741 * powerdomain associated with the interface clock associated with the
1742 * module's MPU port. (XXX Perhaps this should use the SDMA port
1743 * instead?) Returns NULL on error, or a struct powerdomain * on
1744 * success.
1745 */
1746struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1747{
1748 struct clk *c;
1749
1750 if (!oh)
1751 return NULL;
1752
1753 if (oh->_clk) {
1754 c = oh->_clk;
1755 } else {
1756 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1757 return NULL;
1758 c = oh->slaves[oh->_mpu_port_index]->_clk;
1759 }
1760
d5647c18
TG
1761 if (!c->clkdm)
1762 return NULL;
1763
63c85238
PW
1764 return c->clkdm->pwrdm.ptr;
1765
1766}
1767
db2a60bf
PW
1768/**
1769 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1770 * @oh: struct omap_hwmod *
1771 *
1772 * Returns the virtual address corresponding to the beginning of the
1773 * module's register target, in the address range that is intended to
1774 * be used by the MPU. Returns the virtual address upon success or NULL
1775 * upon error.
1776 */
1777void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1778{
1779 if (!oh)
1780 return NULL;
1781
1782 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1783 return NULL;
1784
1785 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1786 return NULL;
1787
1788 return oh->_mpu_rt_va;
1789}
1790
63c85238
PW
1791/**
1792 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1793 * @oh: struct omap_hwmod *
1794 * @init_oh: struct omap_hwmod * (initiator)
1795 *
1796 * Add a sleep dependency between the initiator @init_oh and @oh.
1797 * Intended to be called by DSP/Bridge code via platform_data for the
1798 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1799 * code needs to add/del initiator dependencies dynamically
1800 * before/after accessing a device. Returns the return value from
1801 * _add_initiator_dep().
1802 *
1803 * XXX Keep a usecount in the clockdomain code
1804 */
1805int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1806 struct omap_hwmod *init_oh)
1807{
1808 return _add_initiator_dep(oh, init_oh);
1809}
1810
1811/*
1812 * XXX what about functions for drivers to save/restore ocp_sysconfig
1813 * for context save/restore operations?
1814 */
1815
1816/**
1817 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1818 * @oh: struct omap_hwmod *
1819 * @init_oh: struct omap_hwmod * (initiator)
1820 *
1821 * Remove a sleep dependency between the initiator @init_oh and @oh.
1822 * Intended to be called by DSP/Bridge code via platform_data for the
1823 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1824 * code needs to add/del initiator dependencies dynamically
1825 * before/after accessing a device. Returns the return value from
1826 * _del_initiator_dep().
1827 *
1828 * XXX Keep a usecount in the clockdomain code
1829 */
1830int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1831 struct omap_hwmod *init_oh)
1832{
1833 return _del_initiator_dep(oh, init_oh);
1834}
1835
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1836/**
1837 * omap_hwmod_enable_wakeup - allow device to wake up the system
1838 * @oh: struct omap_hwmod *
1839 *
1840 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1841 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
1842 * registers to cause the PRCM to receive wakeup events from the
1843 * module. Does not set any wakeup routing registers beyond this
1844 * point - if the module is to wake up any other module or subsystem,
1845 * that must be set separately. Called by omap_device code. Returns
1846 * -EINVAL on error or 0 upon success.
1847 */
1848int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1849{
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1850 if (!oh->class->sysc ||
1851 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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1852 return -EINVAL;
1853
12b1fdb4 1854 mutex_lock(&oh->_mutex);
63c85238 1855 _enable_wakeup(oh);
12b1fdb4 1856 mutex_unlock(&oh->_mutex);
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1857
1858 return 0;
1859}
1860
1861/**
1862 * omap_hwmod_disable_wakeup - prevent device from waking the system
1863 * @oh: struct omap_hwmod *
1864 *
1865 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
1866 * from sending wakeups to the PRCM. Eventually this should clear
1867 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
1868 * from the module. Does not set any wakeup routing registers beyond
1869 * this point - if the module is to wake up any other module or
1870 * subsystem, that must be set separately. Called by omap_device
1871 * code. Returns -EINVAL on error or 0 upon success.
1872 */
1873int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
1874{
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1875 if (!oh->class->sysc ||
1876 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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1877 return -EINVAL;
1878
12b1fdb4 1879 mutex_lock(&oh->_mutex);
63c85238 1880 _disable_wakeup(oh);
12b1fdb4 1881 mutex_unlock(&oh->_mutex);
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1882
1883 return 0;
1884}
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1886/**
1887 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
1888 * contained in the hwmod module.
1889 * @oh: struct omap_hwmod *
1890 * @name: name of the reset line to lookup and assert
1891 *
1892 * Some IP like dsp, ipu or iva contain processor that require
1893 * an HW reset line to be assert / deassert in order to enable fully
1894 * the IP. Returns -EINVAL if @oh is null or if the operation is not
1895 * yet supported on this OMAP; otherwise, passes along the return value
1896 * from _assert_hardreset().
1897 */
1898int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
1899{
1900 int ret;
1901
1902 if (!oh)
1903 return -EINVAL;
1904
1905 mutex_lock(&oh->_mutex);
1906 ret = _assert_hardreset(oh, name);
1907 mutex_unlock(&oh->_mutex);
1908
1909 return ret;
1910}
1911
1912/**
1913 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
1914 * contained in the hwmod module.
1915 * @oh: struct omap_hwmod *
1916 * @name: name of the reset line to look up and deassert
1917 *
1918 * Some IP like dsp, ipu or iva contain processor that require
1919 * an HW reset line to be assert / deassert in order to enable fully
1920 * the IP. Returns -EINVAL if @oh is null or if the operation is not
1921 * yet supported on this OMAP; otherwise, passes along the return value
1922 * from _deassert_hardreset().
1923 */
1924int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
1925{
1926 int ret;
1927
1928 if (!oh)
1929 return -EINVAL;
1930
1931 mutex_lock(&oh->_mutex);
1932 ret = _deassert_hardreset(oh, name);
1933 mutex_unlock(&oh->_mutex);
1934
1935 return ret;
1936}
1937
1938/**
1939 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
1940 * contained in the hwmod module
1941 * @oh: struct omap_hwmod *
1942 * @name: name of the reset line to look up and read
1943 *
1944 * Return the current state of the hwmod @oh's reset line named @name:
1945 * returns -EINVAL upon parameter error or if this operation
1946 * is unsupported on the current OMAP; otherwise, passes along the return
1947 * value from _read_hardreset().
1948 */
1949int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
1950{
1951 int ret;
1952
1953 if (!oh)
1954 return -EINVAL;
1955
1956 mutex_lock(&oh->_mutex);
1957 ret = _read_hardreset(oh, name);
1958 mutex_unlock(&oh->_mutex);
1959
1960 return ret;
1961}
1962
1963
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1964/**
1965 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
1966 * @classname: struct omap_hwmod_class name to search for
1967 * @fn: callback function pointer to call for each hwmod in class @classname
1968 * @user: arbitrary context data to pass to the callback function
1969 *
1970 * For each omap_hwmod of class @classname, call @fn. Takes
1971 * omap_hwmod_mutex to prevent the hwmod list from changing during the
1972 * iteration. If the callback function returns something other than
1973 * zero, the iterator is terminated, and the callback function's return
1974 * value is passed back to the caller. Returns 0 upon success, -EINVAL
1975 * if @classname or @fn are NULL, or passes back the error code from @fn.
1976 */
1977int omap_hwmod_for_each_by_class(const char *classname,
1978 int (*fn)(struct omap_hwmod *oh,
1979 void *user),
1980 void *user)
1981{
1982 struct omap_hwmod *temp_oh;
1983 int ret = 0;
1984
1985 if (!classname || !fn)
1986 return -EINVAL;
1987
1988 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
1989 __func__, classname);
1990
1991 mutex_lock(&omap_hwmod_mutex);
1992
1993 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1994 if (!strcmp(temp_oh->class->name, classname)) {
1995 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
1996 __func__, temp_oh->name);
1997 ret = (*fn)(temp_oh, user);
1998 if (ret)
1999 break;
2000 }
2001 }
2002
2003 mutex_unlock(&omap_hwmod_mutex);
2004
2005 if (ret)
2006 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2007 __func__, ret);
2008
2009 return ret;
2010}
2011