ARM: OMAP4: hwmod: flag hwmods/modules not supporting module level context status
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
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142#include <plat/clock.h>
143#include <plat/omap_hwmod.h>
5365efbe 144#include <plat/prcm.h>
63c85238 145
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146#include "soc.h"
147#include "common.h"
148#include "clockdomain.h"
149#include "powerdomain.h"
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
1688bf19 152#include "cm33xx.h"
59fb659b 153#include "prm2xxx_3xxx.h"
d198b514 154#include "prm44xx.h"
1688bf19 155#include "prm33xx.h"
eaac329d 156#include "prminst44xx.h"
8d9af88f 157#include "mux.h"
5165882a 158#include "pm.h"
63c85238 159
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160/* Maximum microseconds to wait for OMAP module to softreset */
161#define MAX_MODULE_SOFTRESET_WAIT 10000
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162
163/* Name of the OMAP hwmod for the MPU */
5c2c0296 164#define MPU_INITIATOR_NAME "mpu"
63c85238 165
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166/*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170#define LINKS_PER_OCP_IF 2
171
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172/**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 184 int (*wait_target_ready)(struct omap_hwmod *oh);
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185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
0a179eaa 191 int (*init_clkdm)(struct omap_hwmod *oh);
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192};
193
194/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
195static struct omap_hwmod_soc_ops soc_ops;
196
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197/* omap_hwmod_list contains all registered struct omap_hwmods */
198static LIST_HEAD(omap_hwmod_list);
199
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200/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
201static struct omap_hwmod *mpu_oh;
202
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203/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
204static DEFINE_SPINLOCK(io_chain_lock);
205
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206/*
207 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
208 * allocated from - used to reduce the number of small memory
209 * allocations, which has a significant impact on performance
210 */
211static struct omap_hwmod_link *linkspace;
212
213/*
214 * free_ls, max_ls: array indexes into linkspace; representing the
215 * next free struct omap_hwmod_link index, and the maximum number of
216 * struct omap_hwmod_link records allocated (respectively)
217 */
218static unsigned short free_ls, max_ls, ls_supp;
63c85238 219
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220/* inited: set to true once the hwmod code is initialized */
221static bool inited;
222
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223/* Private functions */
224
5d95dde7 225/**
11cd4b94 226 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 227 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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228 * @i: pointer to the index of the element pointed to by @p in the list
229 *
230 * Return a pointer to the struct omap_hwmod_ocp_if record
231 * containing the struct list_head pointed to by @p, and increment
232 * @p such that a future call to this routine will return the next
233 * record.
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234 */
235static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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236 int *i)
237{
238 struct omap_hwmod_ocp_if *oi;
239
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240 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
241 *p = (*p)->next;
2221b5cd 242
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243 *i = *i + 1;
244
245 return oi;
246}
247
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248/**
249 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
250 * @oh: struct omap_hwmod *
251 *
252 * Load the current value of the hwmod OCP_SYSCONFIG register into the
253 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
254 * OCP_SYSCONFIG register or 0 upon success.
255 */
256static int _update_sysc_cache(struct omap_hwmod *oh)
257{
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258 if (!oh->class->sysc) {
259 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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260 return -EINVAL;
261 }
262
263 /* XXX ensure module interface clock is up */
264
cc7a1d2a 265 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 266
43b40992 267 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 268 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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269
270 return 0;
271}
272
273/**
274 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
275 * @v: OCP_SYSCONFIG value to write
276 * @oh: struct omap_hwmod *
277 *
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278 * Write @v into the module class' OCP_SYSCONFIG register, if it has
279 * one. No return value.
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280 */
281static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282{
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283 if (!oh->class->sysc) {
284 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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285 return;
286 }
287
288 /* XXX ensure module interface clock is up */
289
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290 /* Module might have lost context, always update cache and register */
291 oh->_sysc_cache = v;
292 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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293}
294
295/**
296 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @standbymode: MIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the master standby mode bits in @v to be @standbymode for
302 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
303 * upon error or 0 upon success.
304 */
305static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
306 u32 *v)
307{
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308 u32 mstandby_mask;
309 u8 mstandby_shift;
310
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311 if (!oh->class->sysc ||
312 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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313 return -EINVAL;
314
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315 if (!oh->class->sysc->sysc_fields) {
316 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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317 return -EINVAL;
318 }
319
43b40992 320 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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321 mstandby_mask = (0x3 << mstandby_shift);
322
323 *v &= ~mstandby_mask;
324 *v |= __ffs(standbymode) << mstandby_shift;
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325
326 return 0;
327}
328
329/**
330 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
331 * @oh: struct omap_hwmod *
332 * @idlemode: SIDLEMODE field bits
333 * @v: pointer to register contents to modify
334 *
335 * Update the slave idle mode bits in @v to be @idlemode for the @oh
336 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
337 * or 0 upon success.
338 */
339static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
340{
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341 u32 sidle_mask;
342 u8 sidle_shift;
343
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344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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346 return -EINVAL;
347
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348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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350 return -EINVAL;
351 }
352
43b40992 353 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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354 sidle_mask = (0x3 << sidle_shift);
355
356 *v &= ~sidle_mask;
357 *v |= __ffs(idlemode) << sidle_shift;
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358
359 return 0;
360}
361
362/**
363 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @clockact: CLOCKACTIVITY field bits
366 * @v: pointer to register contents to modify
367 *
368 * Update the clockactivity mode bits in @v to be @clockact for the
369 * @oh hwmod. Used for additional powersaving on some modules. Does
370 * not write to the hardware. Returns -EINVAL upon error or 0 upon
371 * success.
372 */
373static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
374{
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375 u32 clkact_mask;
376 u8 clkact_shift;
377
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378 if (!oh->class->sysc ||
379 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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380 return -EINVAL;
381
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382 if (!oh->class->sysc->sysc_fields) {
383 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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384 return -EINVAL;
385 }
386
43b40992 387 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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388 clkact_mask = (0x3 << clkact_shift);
389
390 *v &= ~clkact_mask;
391 *v |= clockact << clkact_shift;
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392
393 return 0;
394}
395
396/**
397 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
398 * @oh: struct omap_hwmod *
399 * @v: pointer to register contents to modify
400 *
401 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
402 * error or 0 upon success.
403 */
404static int _set_softreset(struct omap_hwmod *oh, u32 *v)
405{
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TG
406 u32 softrst_mask;
407
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408 if (!oh->class->sysc ||
409 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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410 return -EINVAL;
411
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412 if (!oh->class->sysc->sysc_fields) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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414 return -EINVAL;
415 }
416
43b40992 417 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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418
419 *v |= softrst_mask;
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420
421 return 0;
422}
423
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424/**
425 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426 * @oh: struct omap_hwmod *
427 *
428 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
429 * of some modules. When the DMA must perform read/write accesses, the
430 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
431 * for power management, software must set the DMADISABLE bit back to 1.
432 *
433 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
434 * error or 0 upon success.
435 */
436static int _set_dmadisable(struct omap_hwmod *oh)
437{
438 u32 v;
439 u32 dmadisable_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
447 return -EINVAL;
448 }
449
450 /* clocks must be on for this operation */
451 if (oh->_state != _HWMOD_STATE_ENABLED) {
452 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
453 return -EINVAL;
454 }
455
456 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
457
458 v = oh->_sysc_cache;
459 dmadisable_mask =
460 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
461 v |= dmadisable_mask;
462 _write_sysconfig(v, oh);
463
464 return 0;
465}
466
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467/**
468 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
469 * @oh: struct omap_hwmod *
470 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
471 * @v: pointer to register contents to modify
472 *
473 * Update the module autoidle bit in @v to be @autoidle for the @oh
474 * hwmod. The autoidle bit controls whether the module can gate
475 * internal clocks automatically when it isn't doing anything; the
476 * exact function of this bit varies on a per-module basis. This
477 * function does not write to the hardware. Returns -EINVAL upon
478 * error or 0 upon success.
479 */
480static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
481 u32 *v)
482{
358f0e63
TG
483 u32 autoidle_mask;
484 u8 autoidle_shift;
485
43b40992
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486 if (!oh->class->sysc ||
487 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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488 return -EINVAL;
489
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490 if (!oh->class->sysc->sysc_fields) {
491 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
492 return -EINVAL;
493 }
494
43b40992 495 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 496 autoidle_mask = (0x1 << autoidle_shift);
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TG
497
498 *v &= ~autoidle_mask;
499 *v |= autoidle << autoidle_shift;
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500
501 return 0;
502}
503
eceec009
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504/**
505 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
506 * @oh: struct omap_hwmod *
507 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
508 *
509 * Set or clear the I/O pad wakeup flag in the mux entries for the
510 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
511 * in memory. If the hwmod is currently idled, and the new idle
512 * values don't match the previous ones, this function will also
513 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
514 * currently idled, this function won't touch the hardware: the new
515 * mux settings are written to the SCM PADCTRL registers when the
516 * hwmod is idled. No return value.
517 */
518static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
519{
520 struct omap_device_pad *pad;
521 bool change = false;
522 u16 prev_idle;
523 int j;
524
525 if (!oh->mux || !oh->mux->enabled)
526 return;
527
528 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
529 pad = oh->mux->pads_dynamic[j];
530
531 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
532 continue;
533
534 prev_idle = pad->idle;
535
536 if (set_wake)
537 pad->idle |= OMAP_WAKEUP_EN;
538 else
539 pad->idle &= ~OMAP_WAKEUP_EN;
540
541 if (prev_idle != pad->idle)
542 change = true;
543 }
544
545 if (change && oh->_state == _HWMOD_STATE_IDLE)
546 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
547}
548
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549/**
550 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
551 * @oh: struct omap_hwmod *
552 *
553 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
554 * upon error or 0 upon success.
555 */
5a7ddcbd 556static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 557{
43b40992 558 if (!oh->class->sysc ||
86009eb3 559 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
560 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
561 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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562 return -EINVAL;
563
43b40992
PW
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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TG
566 return -EINVAL;
567 }
568
1fe74113
BC
569 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
570 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 571
86009eb3
BC
572 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
573 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
574 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
575 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 576
63c85238
PW
577 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
578
579 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
580
581 return 0;
582}
583
584/**
585 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
586 * @oh: struct omap_hwmod *
587 *
588 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
589 * upon error or 0 upon success.
590 */
5a7ddcbd 591static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 592{
43b40992 593 if (!oh->class->sysc ||
86009eb3 594 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
595 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
596 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
597 return -EINVAL;
598
43b40992
PW
599 if (!oh->class->sysc->sysc_fields) {
600 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
601 return -EINVAL;
602 }
603
1fe74113
BC
604 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
605 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 606
86009eb3
BC
607 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
608 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 609 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 610 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 611
63c85238
PW
612 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
613
614 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
615
616 return 0;
617}
618
619/**
620 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
621 * @oh: struct omap_hwmod *
622 *
623 * Prevent the hardware module @oh from entering idle while the
624 * hardare module initiator @init_oh is active. Useful when a module
625 * will be accessed by a particular initiator (e.g., if a module will
626 * be accessed by the IVA, there should be a sleepdep between the IVA
627 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
628 * mode. If the clockdomain is marked as not needing autodeps, return
629 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
630 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
631 */
632static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
633{
634 if (!oh->_clk)
635 return -EINVAL;
636
570b54c7
PW
637 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
638 return 0;
639
55ed9694 640 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
641}
642
643/**
644 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
645 * @oh: struct omap_hwmod *
646 *
647 * Allow the hardware module @oh to enter idle while the hardare
648 * module initiator @init_oh is active. Useful when a module will not
649 * be accessed by a particular initiator (e.g., if a module will not
650 * be accessed by the IVA, there should be no sleepdep between the IVA
651 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
652 * mode. If the clockdomain is marked as not needing autodeps, return
653 * 0 without doing anything. Returns -EINVAL upon error or passes
654 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
655 */
656static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
657{
658 if (!oh->_clk)
659 return -EINVAL;
660
570b54c7
PW
661 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
662 return 0;
663
55ed9694 664 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
665}
666
667/**
668 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
669 * @oh: struct omap_hwmod *
670 *
671 * Called from _init_clocks(). Populates the @oh _clk (main
672 * functional clock pointer) if a main_clk is present. Returns 0 on
673 * success or -EINVAL on error.
674 */
675static int _init_main_clk(struct omap_hwmod *oh)
676{
63c85238
PW
677 int ret = 0;
678
50ebdac2 679 if (!oh->main_clk)
63c85238
PW
680 return 0;
681
6ea74cb9
RN
682 oh->_clk = clk_get(NULL, oh->main_clk);
683 if (IS_ERR(oh->_clk)) {
20383d82
BC
684 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
685 oh->name, oh->main_clk);
63403384 686 return -EINVAL;
dc75925d 687 }
4d7cb45e
RN
688 /*
689 * HACK: This needs a re-visit once clk_prepare() is implemented
690 * to do something meaningful. Today its just a no-op.
691 * If clk_prepare() is used at some point to do things like
692 * voltage scaling etc, then this would have to be moved to
693 * some point where subsystems like i2c and pmic become
694 * available.
695 */
696 clk_prepare(oh->_clk);
63c85238 697
63403384 698 if (!oh->_clk->clkdm)
3bb05dbf 699 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
5dcc3b97 700 oh->name, oh->main_clk);
81d7c6ff 701
63c85238
PW
702 return ret;
703}
704
705/**
887adeac 706 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
707 * @oh: struct omap_hwmod *
708 *
709 * Called from _init_clocks(). Populates the @oh OCP slave interface
710 * clock pointers. Returns 0 on success or -EINVAL on error.
711 */
712static int _init_interface_clks(struct omap_hwmod *oh)
713{
5d95dde7 714 struct omap_hwmod_ocp_if *os;
11cd4b94 715 struct list_head *p;
63c85238 716 struct clk *c;
5d95dde7 717 int i = 0;
63c85238
PW
718 int ret = 0;
719
11cd4b94 720 p = oh->slave_ports.next;
2221b5cd 721
5d95dde7 722 while (i < oh->slaves_cnt) {
11cd4b94 723 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 724 if (!os->clk)
63c85238
PW
725 continue;
726
6ea74cb9
RN
727 c = clk_get(NULL, os->clk);
728 if (IS_ERR(c)) {
20383d82
BC
729 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
730 oh->name, os->clk);
63c85238 731 ret = -EINVAL;
dc75925d 732 }
63c85238 733 os->_clk = c;
4d7cb45e
RN
734 /*
735 * HACK: This needs a re-visit once clk_prepare() is implemented
736 * to do something meaningful. Today its just a no-op.
737 * If clk_prepare() is used at some point to do things like
738 * voltage scaling etc, then this would have to be moved to
739 * some point where subsystems like i2c and pmic become
740 * available.
741 */
742 clk_prepare(os->_clk);
63c85238
PW
743 }
744
745 return ret;
746}
747
748/**
749 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
750 * @oh: struct omap_hwmod *
751 *
752 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
753 * clock pointers. Returns 0 on success or -EINVAL on error.
754 */
755static int _init_opt_clks(struct omap_hwmod *oh)
756{
757 struct omap_hwmod_opt_clk *oc;
758 struct clk *c;
759 int i;
760 int ret = 0;
761
762 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
6ea74cb9
RN
763 c = clk_get(NULL, oc->clk);
764 if (IS_ERR(c)) {
20383d82
BC
765 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
766 oh->name, oc->clk);
63c85238 767 ret = -EINVAL;
dc75925d 768 }
63c85238 769 oc->_clk = c;
4d7cb45e
RN
770 /*
771 * HACK: This needs a re-visit once clk_prepare() is implemented
772 * to do something meaningful. Today its just a no-op.
773 * If clk_prepare() is used at some point to do things like
774 * voltage scaling etc, then this would have to be moved to
775 * some point where subsystems like i2c and pmic become
776 * available.
777 */
778 clk_prepare(oc->_clk);
63c85238
PW
779 }
780
781 return ret;
782}
783
784/**
785 * _enable_clocks - enable hwmod main clock and interface clocks
786 * @oh: struct omap_hwmod *
787 *
788 * Enables all clocks necessary for register reads and writes to succeed
789 * on the hwmod @oh. Returns 0.
790 */
791static int _enable_clocks(struct omap_hwmod *oh)
792{
5d95dde7 793 struct omap_hwmod_ocp_if *os;
11cd4b94 794 struct list_head *p;
5d95dde7 795 int i = 0;
63c85238
PW
796
797 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
798
4d3ae5a9 799 if (oh->_clk)
63c85238
PW
800 clk_enable(oh->_clk);
801
11cd4b94 802 p = oh->slave_ports.next;
2221b5cd 803
5d95dde7 804 while (i < oh->slaves_cnt) {
11cd4b94 805 os = _fetch_next_ocp_if(&p, &i);
63c85238 806
5d95dde7
PW
807 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
808 clk_enable(os->_clk);
63c85238
PW
809 }
810
811 /* The opt clocks are controlled by the device driver. */
812
813 return 0;
814}
815
816/**
817 * _disable_clocks - disable hwmod main clock and interface clocks
818 * @oh: struct omap_hwmod *
819 *
820 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
821 */
822static int _disable_clocks(struct omap_hwmod *oh)
823{
5d95dde7 824 struct omap_hwmod_ocp_if *os;
11cd4b94 825 struct list_head *p;
5d95dde7 826 int i = 0;
63c85238
PW
827
828 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
829
4d3ae5a9 830 if (oh->_clk)
63c85238
PW
831 clk_disable(oh->_clk);
832
11cd4b94 833 p = oh->slave_ports.next;
2221b5cd 834
5d95dde7 835 while (i < oh->slaves_cnt) {
11cd4b94 836 os = _fetch_next_ocp_if(&p, &i);
63c85238 837
5d95dde7
PW
838 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
839 clk_disable(os->_clk);
63c85238
PW
840 }
841
842 /* The opt clocks are controlled by the device driver. */
843
844 return 0;
845}
846
96835af9
BC
847static void _enable_optional_clocks(struct omap_hwmod *oh)
848{
849 struct omap_hwmod_opt_clk *oc;
850 int i;
851
852 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
853
854 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
855 if (oc->_clk) {
856 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
5dcc3b97 857 __clk_get_name(oc->_clk));
96835af9
BC
858 clk_enable(oc->_clk);
859 }
860}
861
862static void _disable_optional_clocks(struct omap_hwmod *oh)
863{
864 struct omap_hwmod_opt_clk *oc;
865 int i;
866
867 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
868
869 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
870 if (oc->_clk) {
871 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
5dcc3b97 872 __clk_get_name(oc->_clk));
96835af9
BC
873 clk_disable(oc->_clk);
874 }
875}
876
45c38252 877/**
3d9f0327 878 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
879 * @oh: struct omap_hwmod *
880 *
881 * Enables the PRCM module mode related to the hwmod @oh.
882 * No return value.
883 */
3d9f0327 884static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 885{
45c38252
BC
886 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
887 return;
888
3d9f0327
KH
889 pr_debug("omap_hwmod: %s: %s: %d\n",
890 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
891
892 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
893 oh->clkdm->prcm_partition,
894 oh->clkdm->cm_inst,
895 oh->clkdm->clkdm_offs,
896 oh->prcm.omap4.clkctrl_offs);
897}
898
1688bf19
VH
899/**
900 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
901 * @oh: struct omap_hwmod *
902 *
903 * Enables the PRCM module mode related to the hwmod @oh.
904 * No return value.
905 */
906static void _am33xx_enable_module(struct omap_hwmod *oh)
907{
908 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
909 return;
910
911 pr_debug("omap_hwmod: %s: %s: %d\n",
912 oh->name, __func__, oh->prcm.omap4.modulemode);
913
914 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
915 oh->clkdm->clkdm_offs,
916 oh->prcm.omap4.clkctrl_offs);
917}
918
45c38252 919/**
bfc141e3
BC
920 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
921 * @oh: struct omap_hwmod *
922 *
923 * Wait for a module @oh to enter slave idle. Returns 0 if the module
924 * does not have an IDLEST bit or if the module successfully enters
925 * slave idle; otherwise, pass along the return value of the
926 * appropriate *_cm*_wait_module_idle() function.
927 */
928static int _omap4_wait_target_disable(struct omap_hwmod *oh)
929{
2b026d13 930 if (!oh)
bfc141e3
BC
931 return -EINVAL;
932
2b026d13 933 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
bfc141e3
BC
934 return 0;
935
936 if (oh->flags & HWMOD_NO_IDLEST)
937 return 0;
938
939 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
940 oh->clkdm->cm_inst,
941 oh->clkdm->clkdm_offs,
942 oh->prcm.omap4.clkctrl_offs);
943}
944
1688bf19
VH
945/**
946 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
947 * @oh: struct omap_hwmod *
948 *
949 * Wait for a module @oh to enter slave idle. Returns 0 if the module
950 * does not have an IDLEST bit or if the module successfully enters
951 * slave idle; otherwise, pass along the return value of the
952 * appropriate *_cm*_wait_module_idle() function.
953 */
954static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
955{
956 if (!oh)
957 return -EINVAL;
958
959 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
960 return 0;
961
962 if (oh->flags & HWMOD_NO_IDLEST)
963 return 0;
964
965 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
966 oh->clkdm->clkdm_offs,
967 oh->prcm.omap4.clkctrl_offs);
968}
969
212738a4
PW
970/**
971 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
972 * @oh: struct omap_hwmod *oh
973 *
974 * Count and return the number of MPU IRQs associated with the hwmod
975 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
976 * NULL.
977 */
978static int _count_mpu_irqs(struct omap_hwmod *oh)
979{
980 struct omap_hwmod_irq_info *ohii;
981 int i = 0;
982
983 if (!oh || !oh->mpu_irqs)
984 return 0;
985
986 do {
987 ohii = &oh->mpu_irqs[i++];
988 } while (ohii->irq != -1);
989
cc1b0765 990 return i-1;
212738a4
PW
991}
992
bc614958
PW
993/**
994 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
995 * @oh: struct omap_hwmod *oh
996 *
997 * Count and return the number of SDMA request lines associated with
998 * the hwmod @oh. Used to allocate struct resource data. Returns 0
999 * if @oh is NULL.
1000 */
1001static int _count_sdma_reqs(struct omap_hwmod *oh)
1002{
1003 struct omap_hwmod_dma_info *ohdi;
1004 int i = 0;
1005
1006 if (!oh || !oh->sdma_reqs)
1007 return 0;
1008
1009 do {
1010 ohdi = &oh->sdma_reqs[i++];
1011 } while (ohdi->dma_req != -1);
1012
cc1b0765 1013 return i-1;
bc614958
PW
1014}
1015
78183f3f
PW
1016/**
1017 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1018 * @oh: struct omap_hwmod *oh
1019 *
1020 * Count and return the number of address space ranges associated with
1021 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1022 * if @oh is NULL.
1023 */
1024static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1025{
1026 struct omap_hwmod_addr_space *mem;
1027 int i = 0;
1028
1029 if (!os || !os->addr)
1030 return 0;
1031
1032 do {
1033 mem = &os->addr[i++];
1034 } while (mem->pa_start != mem->pa_end);
1035
cc1b0765 1036 return i-1;
78183f3f
PW
1037}
1038
5e8370f1
PW
1039/**
1040 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1041 * @oh: struct omap_hwmod * to operate on
1042 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1043 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1044 *
1045 * Retrieve a MPU hardware IRQ line number named by @name associated
1046 * with the IP block pointed to by @oh. The IRQ number will be filled
1047 * into the address pointed to by @dma. When @name is non-null, the
1048 * IRQ line number associated with the named entry will be returned.
1049 * If @name is null, the first matching entry will be returned. Data
1050 * order is not meaningful in hwmod data, so callers are strongly
1051 * encouraged to use a non-null @name whenever possible to avoid
1052 * unpredictable effects if hwmod data is later added that causes data
1053 * ordering to change. Returns 0 upon success or a negative error
1054 * code upon error.
1055 */
1056static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1057 unsigned int *irq)
1058{
1059 int i;
1060 bool found = false;
1061
1062 if (!oh->mpu_irqs)
1063 return -ENOENT;
1064
1065 i = 0;
1066 while (oh->mpu_irqs[i].irq != -1) {
1067 if (name == oh->mpu_irqs[i].name ||
1068 !strcmp(name, oh->mpu_irqs[i].name)) {
1069 found = true;
1070 break;
1071 }
1072 i++;
1073 }
1074
1075 if (!found)
1076 return -ENOENT;
1077
1078 *irq = oh->mpu_irqs[i].irq;
1079
1080 return 0;
1081}
1082
1083/**
1084 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1085 * @oh: struct omap_hwmod * to operate on
1086 * @name: pointer to the name of the SDMA request line to fetch (optional)
1087 * @dma: pointer to an unsigned int to store the request line ID to
1088 *
1089 * Retrieve an SDMA request line ID named by @name on the IP block
1090 * pointed to by @oh. The ID will be filled into the address pointed
1091 * to by @dma. When @name is non-null, the request line ID associated
1092 * with the named entry will be returned. If @name is null, the first
1093 * matching entry will be returned. Data order is not meaningful in
1094 * hwmod data, so callers are strongly encouraged to use a non-null
1095 * @name whenever possible to avoid unpredictable effects if hwmod
1096 * data is later added that causes data ordering to change. Returns 0
1097 * upon success or a negative error code upon error.
1098 */
1099static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1100 unsigned int *dma)
1101{
1102 int i;
1103 bool found = false;
1104
1105 if (!oh->sdma_reqs)
1106 return -ENOENT;
1107
1108 i = 0;
1109 while (oh->sdma_reqs[i].dma_req != -1) {
1110 if (name == oh->sdma_reqs[i].name ||
1111 !strcmp(name, oh->sdma_reqs[i].name)) {
1112 found = true;
1113 break;
1114 }
1115 i++;
1116 }
1117
1118 if (!found)
1119 return -ENOENT;
1120
1121 *dma = oh->sdma_reqs[i].dma_req;
1122
1123 return 0;
1124}
1125
1126/**
1127 * _get_addr_space_by_name - fetch address space start & end by name
1128 * @oh: struct omap_hwmod * to operate on
1129 * @name: pointer to the name of the address space to fetch (optional)
1130 * @pa_start: pointer to a u32 to store the starting address to
1131 * @pa_end: pointer to a u32 to store the ending address to
1132 *
1133 * Retrieve address space start and end addresses for the IP block
1134 * pointed to by @oh. The data will be filled into the addresses
1135 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1136 * address space data associated with the named entry will be
1137 * returned. If @name is null, the first matching entry will be
1138 * returned. Data order is not meaningful in hwmod data, so callers
1139 * are strongly encouraged to use a non-null @name whenever possible
1140 * to avoid unpredictable effects if hwmod data is later added that
1141 * causes data ordering to change. Returns 0 upon success or a
1142 * negative error code upon error.
1143 */
1144static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1145 u32 *pa_start, u32 *pa_end)
1146{
1147 int i, j;
1148 struct omap_hwmod_ocp_if *os;
2221b5cd 1149 struct list_head *p = NULL;
5e8370f1
PW
1150 bool found = false;
1151
11cd4b94 1152 p = oh->slave_ports.next;
2221b5cd 1153
5d95dde7
PW
1154 i = 0;
1155 while (i < oh->slaves_cnt) {
11cd4b94 1156 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1157
1158 if (!os->addr)
1159 return -ENOENT;
1160
1161 j = 0;
1162 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1163 if (name == os->addr[j].name ||
1164 !strcmp(name, os->addr[j].name)) {
1165 found = true;
1166 break;
1167 }
1168 j++;
1169 }
1170
1171 if (found)
1172 break;
1173 }
1174
1175 if (!found)
1176 return -ENOENT;
1177
1178 *pa_start = os->addr[j].pa_start;
1179 *pa_end = os->addr[j].pa_end;
1180
1181 return 0;
1182}
1183
63c85238 1184/**
24dbc213 1185 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1186 * @oh: struct omap_hwmod *
1187 *
24dbc213
PW
1188 * Determines the array index of the OCP slave port that the MPU uses
1189 * to address the device, and saves it into the struct omap_hwmod.
1190 * Intended to be called during hwmod registration only. No return
1191 * value.
63c85238 1192 */
24dbc213 1193static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1194{
24dbc213 1195 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1196 struct list_head *p;
5d95dde7 1197 int i = 0;
63c85238 1198
5d95dde7 1199 if (!oh)
24dbc213
PW
1200 return;
1201
1202 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1203
11cd4b94 1204 p = oh->slave_ports.next;
2221b5cd 1205
5d95dde7 1206 while (i < oh->slaves_cnt) {
11cd4b94 1207 os = _fetch_next_ocp_if(&p, &i);
63c85238 1208 if (os->user & OCP_USER_MPU) {
2221b5cd 1209 oh->_mpu_port = os;
24dbc213 1210 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1211 break;
1212 }
1213 }
1214
24dbc213 1215 return;
63c85238
PW
1216}
1217
2d6141ba
PW
1218/**
1219 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1220 * @oh: struct omap_hwmod *
1221 *
1222 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1223 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1224 * communicate with the IP block. This interface need not be directly
1225 * connected to the MPU (and almost certainly is not), but is directly
1226 * connected to the IP block represented by @oh. Returns a pointer
1227 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1228 * error or if there does not appear to be a path from the MPU to this
1229 * IP block.
1230 */
1231static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1232{
1233 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1234 return NULL;
1235
11cd4b94 1236 return oh->_mpu_port;
2d6141ba
PW
1237};
1238
63c85238 1239/**
c9aafd23 1240 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1241 * @oh: struct omap_hwmod *
1242 *
c9aafd23
PW
1243 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1244 * the register target MPU address space; or returns NULL upon error.
63c85238 1245 */
c9aafd23 1246static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1247{
1248 struct omap_hwmod_ocp_if *os;
1249 struct omap_hwmod_addr_space *mem;
c9aafd23 1250 int found = 0, i = 0;
63c85238 1251
2d6141ba 1252 os = _find_mpu_rt_port(oh);
24dbc213 1253 if (!os || !os->addr)
78183f3f
PW
1254 return NULL;
1255
1256 do {
1257 mem = &os->addr[i++];
1258 if (mem->flags & ADDR_TYPE_RT)
63c85238 1259 found = 1;
78183f3f 1260 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1261
c9aafd23 1262 return (found) ? mem : NULL;
63c85238
PW
1263}
1264
1265/**
74ff3a68 1266 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1267 * @oh: struct omap_hwmod *
1268 *
006c7f18
PW
1269 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1270 * by @oh is set to indicate to the PRCM that the IP block is active.
1271 * Usually this means placing the module into smart-idle mode and
1272 * smart-standby, but if there is a bug in the automatic idle handling
1273 * for the IP block, it may need to be placed into the force-idle or
1274 * no-idle variants of these modes. No return value.
63c85238 1275 */
74ff3a68 1276static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1277{
43b40992 1278 u8 idlemode, sf;
63c85238 1279 u32 v;
006c7f18 1280 bool clkdm_act;
63c85238 1281
43b40992 1282 if (!oh->class->sysc)
63c85238
PW
1283 return;
1284
1285 v = oh->_sysc_cache;
43b40992 1286 sf = oh->class->sysc->sysc_flags;
63c85238 1287
43b40992 1288 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1289 clkdm_act = ((oh->clkdm &&
1290 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1291 (oh->_clk && oh->_clk->clkdm &&
1292 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1293 if (clkdm_act && !(oh->class->sysc->idlemodes &
1294 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1295 idlemode = HWMOD_IDLEMODE_FORCE;
1296 else
1297 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1298 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1299 _set_slave_idlemode(oh, idlemode, &v);
1300 }
1301
43b40992 1302 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1303 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1304 idlemode = HWMOD_IDLEMODE_NO;
1305 } else {
1306 if (sf & SYSC_HAS_ENAWAKEUP)
1307 _enable_wakeup(oh, &v);
1308 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1309 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1310 else
1311 idlemode = HWMOD_IDLEMODE_SMART;
1312 }
63c85238
PW
1313 _set_master_standbymode(oh, idlemode, &v);
1314 }
1315
a16b1f7f
PW
1316 /*
1317 * XXX The clock framework should handle this, by
1318 * calling into this code. But this must wait until the
1319 * clock structures are tagged with omap_hwmod entries
1320 */
43b40992
PW
1321 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1322 (sf & SYSC_HAS_CLOCKACTIVITY))
1323 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1324
9980ce53
RN
1325 /* If slave is in SMARTIDLE, also enable wakeup */
1326 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1327 _enable_wakeup(oh, &v);
1328
1329 _write_sysconfig(v, oh);
78f26e87
HH
1330
1331 /*
1332 * Set the autoidle bit only after setting the smartidle bit
1333 * Setting this will not have any impact on the other modules.
1334 */
1335 if (sf & SYSC_HAS_AUTOIDLE) {
1336 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1337 0 : 1;
1338 _set_module_autoidle(oh, idlemode, &v);
1339 _write_sysconfig(v, oh);
1340 }
63c85238
PW
1341}
1342
1343/**
74ff3a68 1344 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1345 * @oh: struct omap_hwmod *
1346 *
1347 * If module is marked as SWSUP_SIDLE, force the module into slave
1348 * idle; otherwise, configure it for smart-idle. If module is marked
1349 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1350 * configure it for smart-standby. No return value.
1351 */
74ff3a68 1352static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1353{
43b40992 1354 u8 idlemode, sf;
63c85238
PW
1355 u32 v;
1356
43b40992 1357 if (!oh->class->sysc)
63c85238
PW
1358 return;
1359
1360 v = oh->_sysc_cache;
43b40992 1361 sf = oh->class->sysc->sysc_flags;
63c85238 1362
43b40992 1363 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1364 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1365 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1366 !(oh->class->sysc->idlemodes &
1367 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1368 idlemode = HWMOD_IDLEMODE_FORCE;
1369 else
1370 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1371 _set_slave_idlemode(oh, idlemode, &v);
1372 }
1373
43b40992 1374 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1375 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1376 idlemode = HWMOD_IDLEMODE_FORCE;
1377 } else {
1378 if (sf & SYSC_HAS_ENAWAKEUP)
1379 _enable_wakeup(oh, &v);
1380 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1381 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1382 else
1383 idlemode = HWMOD_IDLEMODE_SMART;
1384 }
63c85238
PW
1385 _set_master_standbymode(oh, idlemode, &v);
1386 }
1387
86009eb3
BC
1388 /* If slave is in SMARTIDLE, also enable wakeup */
1389 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1390 _enable_wakeup(oh, &v);
1391
63c85238
PW
1392 _write_sysconfig(v, oh);
1393}
1394
1395/**
74ff3a68 1396 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1397 * @oh: struct omap_hwmod *
1398 *
1399 * Force the module into slave idle and master suspend. No return
1400 * value.
1401 */
74ff3a68 1402static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1403{
1404 u32 v;
43b40992 1405 u8 sf;
63c85238 1406
43b40992 1407 if (!oh->class->sysc)
63c85238
PW
1408 return;
1409
1410 v = oh->_sysc_cache;
43b40992 1411 sf = oh->class->sysc->sysc_flags;
63c85238 1412
43b40992 1413 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1414 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1415
43b40992 1416 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1417 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1418
43b40992 1419 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1420 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1421
1422 _write_sysconfig(v, oh);
1423}
1424
1425/**
1426 * _lookup - find an omap_hwmod by name
1427 * @name: find an omap_hwmod by name
1428 *
1429 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1430 */
1431static struct omap_hwmod *_lookup(const char *name)
1432{
1433 struct omap_hwmod *oh, *temp_oh;
1434
1435 oh = NULL;
1436
1437 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1438 if (!strcmp(name, temp_oh->name)) {
1439 oh = temp_oh;
1440 break;
1441 }
1442 }
1443
1444 return oh;
1445}
868c157d 1446
6ae76997
BC
1447/**
1448 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1449 * @oh: struct omap_hwmod *
1450 *
1451 * Convert a clockdomain name stored in a struct omap_hwmod into a
1452 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1453 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1454 */
1455static int _init_clkdm(struct omap_hwmod *oh)
1456{
3bb05dbf
PW
1457 if (!oh->clkdm_name) {
1458 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
6ae76997 1459 return 0;
3bb05dbf 1460 }
6ae76997 1461
6ae76997
BC
1462 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1463 if (!oh->clkdm) {
1464 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1465 oh->name, oh->clkdm_name);
1466 return -EINVAL;
1467 }
1468
1469 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1470 oh->name, oh->clkdm_name);
1471
1472 return 0;
1473}
63c85238
PW
1474
1475/**
6ae76997
BC
1476 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1477 * well the clockdomain.
63c85238 1478 * @oh: struct omap_hwmod *
97d60162 1479 * @data: not used; pass NULL
63c85238 1480 *
a2debdbd 1481 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1482 * Resolves all clock names embedded in the hwmod. Returns 0 on
1483 * success, or a negative error code on failure.
63c85238 1484 */
97d60162 1485static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1486{
1487 int ret = 0;
1488
48d54f3f
PW
1489 if (oh->_state != _HWMOD_STATE_REGISTERED)
1490 return 0;
63c85238
PW
1491
1492 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1493
1494 ret |= _init_main_clk(oh);
1495 ret |= _init_interface_clks(oh);
1496 ret |= _init_opt_clks(oh);
0a179eaa
KH
1497 if (soc_ops.init_clkdm)
1498 ret |= soc_ops.init_clkdm(oh);
63c85238 1499
f5c1f84b
BC
1500 if (!ret)
1501 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1502 else
1503 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1504
09c35f2f 1505 return ret;
63c85238
PW
1506}
1507
5365efbe 1508/**
cc1226e7 1509 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1510 * @oh: struct omap_hwmod *
1511 * @name: name of the reset line in the context of this hwmod
cc1226e7 1512 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1513 *
1514 * Return the bit position of the reset line that match the
1515 * input name. Return -ENOENT if not found.
1516 */
a032d33b
PW
1517static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1518 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1519{
1520 int i;
1521
1522 for (i = 0; i < oh->rst_lines_cnt; i++) {
1523 const char *rst_line = oh->rst_lines[i].name;
1524 if (!strcmp(rst_line, name)) {
cc1226e7 1525 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1526 ohri->st_shift = oh->rst_lines[i].st_shift;
1527 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1528 oh->name, __func__, rst_line, ohri->rst_shift,
1529 ohri->st_shift);
5365efbe 1530
cc1226e7 1531 return 0;
5365efbe
BC
1532 }
1533 }
1534
1535 return -ENOENT;
1536}
1537
1538/**
1539 * _assert_hardreset - assert the HW reset line of submodules
1540 * contained in the hwmod module.
1541 * @oh: struct omap_hwmod *
1542 * @name: name of the reset line to lookup and assert
1543 *
b8249cf2
KH
1544 * Some IP like dsp, ipu or iva contain processor that require an HW
1545 * reset line to be assert / deassert in order to enable fully the IP.
1546 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1547 * asserting the hardreset line on the currently-booted SoC, or passes
1548 * along the return value from _lookup_hardreset() or the SoC's
1549 * assert_hardreset code.
5365efbe
BC
1550 */
1551static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1552{
cc1226e7 1553 struct omap_hwmod_rst_info ohri;
a032d33b 1554 int ret = -EINVAL;
5365efbe
BC
1555
1556 if (!oh)
1557 return -EINVAL;
1558
b8249cf2
KH
1559 if (!soc_ops.assert_hardreset)
1560 return -ENOSYS;
1561
cc1226e7 1562 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1563 if (ret < 0)
cc1226e7 1564 return ret;
5365efbe 1565
b8249cf2
KH
1566 ret = soc_ops.assert_hardreset(oh, &ohri);
1567
1568 return ret;
5365efbe
BC
1569}
1570
1571/**
1572 * _deassert_hardreset - deassert the HW reset line of submodules contained
1573 * in the hwmod module.
1574 * @oh: struct omap_hwmod *
1575 * @name: name of the reset line to look up and deassert
1576 *
b8249cf2
KH
1577 * Some IP like dsp, ipu or iva contain processor that require an HW
1578 * reset line to be assert / deassert in order to enable fully the IP.
1579 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1580 * deasserting the hardreset line on the currently-booted SoC, or passes
1581 * along the return value from _lookup_hardreset() or the SoC's
1582 * deassert_hardreset code.
5365efbe
BC
1583 */
1584static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1585{
cc1226e7 1586 struct omap_hwmod_rst_info ohri;
b8249cf2 1587 int ret = -EINVAL;
5365efbe
BC
1588
1589 if (!oh)
1590 return -EINVAL;
1591
b8249cf2
KH
1592 if (!soc_ops.deassert_hardreset)
1593 return -ENOSYS;
1594
cc1226e7 1595 ret = _lookup_hardreset(oh, name, &ohri);
1596 if (IS_ERR_VALUE(ret))
1597 return ret;
5365efbe 1598
b8249cf2 1599 ret = soc_ops.deassert_hardreset(oh, &ohri);
cc1226e7 1600 if (ret == -EBUSY)
5365efbe
BC
1601 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1602
cc1226e7 1603 return ret;
5365efbe
BC
1604}
1605
1606/**
1607 * _read_hardreset - read the HW reset line state of submodules
1608 * contained in the hwmod module
1609 * @oh: struct omap_hwmod *
1610 * @name: name of the reset line to look up and read
1611 *
b8249cf2
KH
1612 * Return the state of the reset line. Returns -EINVAL if @oh is
1613 * null, -ENOSYS if we have no way of reading the hardreset line
1614 * status on the currently-booted SoC, or passes along the return
1615 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1616 * code.
5365efbe
BC
1617 */
1618static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1619{
cc1226e7 1620 struct omap_hwmod_rst_info ohri;
a032d33b 1621 int ret = -EINVAL;
5365efbe
BC
1622
1623 if (!oh)
1624 return -EINVAL;
1625
b8249cf2
KH
1626 if (!soc_ops.is_hardreset_asserted)
1627 return -ENOSYS;
1628
cc1226e7 1629 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1630 if (ret < 0)
cc1226e7 1631 return ret;
5365efbe 1632
b8249cf2 1633 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1634}
1635
747834ab
PW
1636/**
1637 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1638 * @oh: struct omap_hwmod *
1639 *
1640 * If any hardreset line associated with @oh is asserted, then return true.
1641 * Otherwise, if @oh has no hardreset lines associated with it, or if
1642 * no hardreset lines associated with @oh are asserted, then return false.
1643 * This function is used to avoid executing some parts of the IP block
1644 * enable/disable sequence if a hardreset line is set.
1645 */
1646static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1647{
1648 int i;
1649
1650 if (oh->rst_lines_cnt == 0)
1651 return false;
1652
1653 for (i = 0; i < oh->rst_lines_cnt; i++)
1654 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1655 return true;
1656
1657 return false;
1658}
1659
1660/**
1661 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1662 * @oh: struct omap_hwmod *
1663 *
1664 * Disable the PRCM module mode related to the hwmod @oh.
1665 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1666 */
1667static int _omap4_disable_module(struct omap_hwmod *oh)
1668{
1669 int v;
1670
747834ab
PW
1671 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1672 return -EINVAL;
1673
1674 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1675
1676 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1677 oh->clkdm->cm_inst,
1678 oh->clkdm->clkdm_offs,
1679 oh->prcm.omap4.clkctrl_offs);
1680
1681 if (_are_any_hardreset_lines_asserted(oh))
1682 return 0;
1683
1684 v = _omap4_wait_target_disable(oh);
1685 if (v)
1686 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1687 oh->name);
1688
1689 return 0;
1690}
1691
1688bf19
VH
1692/**
1693 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1694 * @oh: struct omap_hwmod *
1695 *
1696 * Disable the PRCM module mode related to the hwmod @oh.
1697 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1698 */
1699static int _am33xx_disable_module(struct omap_hwmod *oh)
1700{
1701 int v;
1702
1703 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1704 return -EINVAL;
1705
1706 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1707
1708 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1709 oh->prcm.omap4.clkctrl_offs);
1710
1711 if (_are_any_hardreset_lines_asserted(oh))
1712 return 0;
1713
1714 v = _am33xx_wait_target_disable(oh);
1715 if (v)
1716 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1717 oh->name);
1718
1719 return 0;
1720}
1721
63c85238 1722/**
bd36179e 1723 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1724 * @oh: struct omap_hwmod *
1725 *
1726 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1727 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1728 * reset this way, -EINVAL if the hwmod is in the wrong state,
1729 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1730 *
1731 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1732 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1733 * use the SYSCONFIG softreset bit to provide the status.
1734 *
bd36179e
PW
1735 * Note that some IP like McBSP do have reset control but don't have
1736 * reset status.
63c85238 1737 */
bd36179e 1738static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1739{
387ca5bf 1740 u32 v, softrst_mask;
6f8b7ff5 1741 int c = 0;
96835af9 1742 int ret = 0;
63c85238 1743
43b40992 1744 if (!oh->class->sysc ||
2cb06814 1745 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1746 return -ENOENT;
63c85238
PW
1747
1748 /* clocks must be on for this operation */
1749 if (oh->_state != _HWMOD_STATE_ENABLED) {
7852ec05
PW
1750 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1751 oh->name);
63c85238
PW
1752 return -EINVAL;
1753 }
1754
96835af9
BC
1755 /* For some modules, all optionnal clocks need to be enabled as well */
1756 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1757 _enable_optional_clocks(oh);
1758
bd36179e 1759 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1760
1761 v = oh->_sysc_cache;
96835af9
BC
1762 ret = _set_softreset(oh, &v);
1763 if (ret)
1764 goto dis_opt_clks;
63c85238
PW
1765 _write_sysconfig(v, oh);
1766
d99de7f5
FGL
1767 if (oh->class->sysc->srst_udelay)
1768 udelay(oh->class->sysc->srst_udelay);
1769
2cb06814 1770 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1771 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1772 oh->class->sysc->syss_offs)
1773 & SYSS_RESETDONE_MASK),
1774 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1775 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1776 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1777 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1778 oh->class->sysc->sysc_offs)
387ca5bf 1779 & softrst_mask),
2cb06814 1780 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1781 }
63c85238 1782
5365efbe 1783 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1784 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1785 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1786 else
5365efbe 1787 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1788
1789 /*
1790 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1791 * _wait_target_ready() or _reset()
1792 */
1793
96835af9
BC
1794 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1795
1796dis_opt_clks:
1797 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1798 _disable_optional_clocks(oh);
1799
1800 return ret;
63c85238
PW
1801}
1802
bd36179e
PW
1803/**
1804 * _reset - reset an omap_hwmod
1805 * @oh: struct omap_hwmod *
1806 *
30e105c0
PW
1807 * Resets an omap_hwmod @oh. If the module has a custom reset
1808 * function pointer defined, then call it to reset the IP block, and
1809 * pass along its return value to the caller. Otherwise, if the IP
1810 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1811 * associated with it, call a function to reset the IP block via that
1812 * method, and pass along the return value to the caller. Finally, if
1813 * the IP block has some hardreset lines associated with it, assert
1814 * all of those, but do _not_ deassert them. (This is because driver
1815 * authors have expressed an apparent requirement to control the
1816 * deassertion of the hardreset lines themselves.)
1817 *
1818 * The default software reset mechanism for most OMAP IP blocks is
1819 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1820 * hwmods cannot be reset via this method. Some are not targets and
1821 * therefore have no OCP header registers to access. Others (like the
1822 * IVA) have idiosyncratic reset sequences. So for these relatively
1823 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
1824 * omap_hwmod_class .reset function pointer.
1825 *
1826 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1827 * does not prevent idling of the system. This is necessary for cases
1828 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1829 * kernel without disabling dma.
1830 *
1831 * Passes along the return value from either _ocp_softreset() or the
1832 * custom reset function - these must return -EINVAL if the hwmod
1833 * cannot be reset this way or if the hwmod is in the wrong state,
1834 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
1835 */
1836static int _reset(struct omap_hwmod *oh)
1837{
30e105c0 1838 int i, r;
bd36179e
PW
1839
1840 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1841
30e105c0
PW
1842 if (oh->class->reset) {
1843 r = oh->class->reset(oh);
1844 } else {
1845 if (oh->rst_lines_cnt > 0) {
1846 for (i = 0; i < oh->rst_lines_cnt; i++)
1847 _assert_hardreset(oh, oh->rst_lines[i].name);
1848 return 0;
1849 } else {
1850 r = _ocp_softreset(oh);
1851 if (r == -ENOENT)
1852 r = 0;
1853 }
1854 }
1855
6668546f
KVA
1856 _set_dmadisable(oh);
1857
9c8b0ec7 1858 /*
30e105c0
PW
1859 * OCP_SYSCONFIG bits need to be reprogrammed after a
1860 * softreset. The _enable() function should be split to avoid
1861 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1862 */
2800852a
RN
1863 if (oh->class->sysc) {
1864 _update_sysc_cache(oh);
1865 _enable_sysc(oh);
1866 }
1867
30e105c0 1868 return r;
bd36179e
PW
1869}
1870
5165882a
VB
1871/**
1872 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1873 *
1874 * Call the appropriate PRM function to clear any logged I/O chain
1875 * wakeups and to reconfigure the chain. This apparently needs to be
1876 * done upon every mux change. Since hwmods can be concurrently
1877 * enabled and idled, hold a spinlock around the I/O chain
1878 * reconfiguration sequence. No return value.
1879 *
1880 * XXX When the PRM code is moved to drivers, this function can be removed,
1881 * as the PRM infrastructure should abstract this.
1882 */
1883static void _reconfigure_io_chain(void)
1884{
1885 unsigned long flags;
1886
1887 spin_lock_irqsave(&io_chain_lock, flags);
1888
1889 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1890 omap3xxx_prm_reconfigure_io_chain();
1891 else if (cpu_is_omap44xx())
1892 omap44xx_prm_reconfigure_io_chain();
1893
1894 spin_unlock_irqrestore(&io_chain_lock, flags);
1895}
1896
63c85238 1897/**
dc6d1cda 1898 * _enable - enable an omap_hwmod
63c85238
PW
1899 * @oh: struct omap_hwmod *
1900 *
1901 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1902 * register target. Returns -EINVAL if the hwmod is in the wrong
1903 * state or passes along the return value of _wait_target_ready().
63c85238 1904 */
dc6d1cda 1905static int _enable(struct omap_hwmod *oh)
63c85238 1906{
747834ab 1907 int r;
665d0013 1908 int hwsup = 0;
63c85238 1909
34617e2a
BC
1910 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1911
aacf0941 1912 /*
64813c3f
PW
1913 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1914 * state at init. Now that someone is really trying to enable
1915 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1916 */
1917 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1918 /*
1919 * If the caller has mux data populated, do the mux'ing
1920 * which wouldn't have been done as part of the _enable()
1921 * done during setup.
1922 */
1923 if (oh->mux)
1924 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1925
1926 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1927 return 0;
1928 }
1929
63c85238
PW
1930 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1931 oh->_state != _HWMOD_STATE_IDLE &&
1932 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1933 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1934 oh->name);
63c85238
PW
1935 return -EINVAL;
1936 }
1937
31f62866 1938 /*
747834ab
PW
1939 * If an IP block contains HW reset lines and any of them are
1940 * asserted, we let integration code associated with that
1941 * block handle the enable. We've received very little
1942 * information on what those driver authors need, and until
1943 * detailed information is provided and the driver code is
1944 * posted to the public lists, this is probably the best we
1945 * can do.
31f62866 1946 */
747834ab
PW
1947 if (_are_any_hardreset_lines_asserted(oh))
1948 return 0;
63c85238 1949
665d0013
RN
1950 /* Mux pins for device runtime if populated */
1951 if (oh->mux && (!oh->mux->enabled ||
1952 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 1953 oh->mux->pads_dynamic))) {
665d0013 1954 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a
VB
1955 _reconfigure_io_chain();
1956 }
665d0013
RN
1957
1958 _add_initiator_dep(oh, mpu_oh);
34617e2a 1959
665d0013
RN
1960 if (oh->clkdm) {
1961 /*
1962 * A clockdomain must be in SW_SUP before enabling
1963 * completely the module. The clockdomain can be set
1964 * in HW_AUTO only when the module become ready.
1965 */
1966 hwsup = clkdm_in_hwsup(oh->clkdm);
1967 r = clkdm_hwmod_enable(oh->clkdm, oh);
1968 if (r) {
1969 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1970 oh->name, oh->clkdm->name, r);
1971 return r;
1972 }
34617e2a 1973 }
665d0013
RN
1974
1975 _enable_clocks(oh);
9ebfd285
KH
1976 if (soc_ops.enable_module)
1977 soc_ops.enable_module(oh);
34617e2a 1978
8f6aa8ee
KH
1979 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1980 -EINVAL;
665d0013
RN
1981 if (!r) {
1982 /*
1983 * Set the clockdomain to HW_AUTO only if the target is ready,
1984 * assuming that the previous state was HW_AUTO
1985 */
1986 if (oh->clkdm && hwsup)
1987 clkdm_allow_idle(oh->clkdm);
1988
1989 oh->_state = _HWMOD_STATE_ENABLED;
1990
1991 /* Access the sysconfig only if the target is ready */
1992 if (oh->class->sysc) {
1993 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1994 _update_sysc_cache(oh);
1995 _enable_sysc(oh);
1996 }
1997 } else {
471a009b 1998 _omap4_disable_module(oh);
665d0013
RN
1999 _disable_clocks(oh);
2000 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2001 oh->name, r);
34617e2a 2002
665d0013
RN
2003 if (oh->clkdm)
2004 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
2005 }
2006
63c85238
PW
2007 return r;
2008}
2009
2010/**
dc6d1cda 2011 * _idle - idle an omap_hwmod
63c85238
PW
2012 * @oh: struct omap_hwmod *
2013 *
2014 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
2015 * no further work. Returns -EINVAL if the hwmod is in the wrong
2016 * state or returns 0.
63c85238 2017 */
dc6d1cda 2018static int _idle(struct omap_hwmod *oh)
63c85238 2019{
34617e2a
BC
2020 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2021
63c85238 2022 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2023 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2024 oh->name);
63c85238
PW
2025 return -EINVAL;
2026 }
2027
747834ab
PW
2028 if (_are_any_hardreset_lines_asserted(oh))
2029 return 0;
2030
43b40992 2031 if (oh->class->sysc)
74ff3a68 2032 _idle_sysc(oh);
63c85238 2033 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2034
9ebfd285
KH
2035 if (soc_ops.disable_module)
2036 soc_ops.disable_module(oh);
bfc141e3 2037
45c38252
BC
2038 /*
2039 * The module must be in idle mode before disabling any parents
2040 * clocks. Otherwise, the parent clock might be disabled before
2041 * the module transition is done, and thus will prevent the
2042 * transition to complete properly.
2043 */
2044 _disable_clocks(oh);
665d0013
RN
2045 if (oh->clkdm)
2046 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2047
8d9af88f 2048 /* Mux pins for device idle if populated */
5165882a 2049 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2050 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a
VB
2051 _reconfigure_io_chain();
2052 }
8d9af88f 2053
63c85238
PW
2054 oh->_state = _HWMOD_STATE_IDLE;
2055
2056 return 0;
2057}
2058
9599217a
KVA
2059/**
2060 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2061 * @oh: struct omap_hwmod *
2062 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2063 *
2064 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2065 * local copy. Intended to be used by drivers that require
2066 * direct manipulation of the AUTOIDLE bits.
2067 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2068 * along the return value from _set_module_autoidle().
2069 *
2070 * Any users of this function should be scrutinized carefully.
2071 */
2072int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2073{
2074 u32 v;
2075 int retval = 0;
2076 unsigned long flags;
2077
2078 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2079 return -EINVAL;
2080
2081 spin_lock_irqsave(&oh->_lock, flags);
2082
2083 v = oh->_sysc_cache;
2084
2085 retval = _set_module_autoidle(oh, autoidle, &v);
2086
2087 if (!retval)
2088 _write_sysconfig(v, oh);
2089
2090 spin_unlock_irqrestore(&oh->_lock, flags);
2091
2092 return retval;
2093}
2094
63c85238
PW
2095/**
2096 * _shutdown - shutdown an omap_hwmod
2097 * @oh: struct omap_hwmod *
2098 *
2099 * Shut down an omap_hwmod @oh. This should be called when the driver
2100 * used for the hwmod is removed or unloaded or if the driver is not
2101 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2102 * state or returns 0.
2103 */
2104static int _shutdown(struct omap_hwmod *oh)
2105{
9c8b0ec7 2106 int ret, i;
e4dc8f50
PW
2107 u8 prev_state;
2108
63c85238
PW
2109 if (oh->_state != _HWMOD_STATE_IDLE &&
2110 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2111 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2112 oh->name);
63c85238
PW
2113 return -EINVAL;
2114 }
2115
747834ab
PW
2116 if (_are_any_hardreset_lines_asserted(oh))
2117 return 0;
2118
63c85238
PW
2119 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2120
e4dc8f50
PW
2121 if (oh->class->pre_shutdown) {
2122 prev_state = oh->_state;
2123 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2124 _enable(oh);
e4dc8f50
PW
2125 ret = oh->class->pre_shutdown(oh);
2126 if (ret) {
2127 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2128 _idle(oh);
e4dc8f50
PW
2129 return ret;
2130 }
2131 }
2132
6481c73c
MV
2133 if (oh->class->sysc) {
2134 if (oh->_state == _HWMOD_STATE_IDLE)
2135 _enable(oh);
74ff3a68 2136 _shutdown_sysc(oh);
6481c73c 2137 }
5365efbe 2138
3827f949
BC
2139 /* clocks and deps are already disabled in idle */
2140 if (oh->_state == _HWMOD_STATE_ENABLED) {
2141 _del_initiator_dep(oh, mpu_oh);
2142 /* XXX what about the other system initiators here? dma, dsp */
9ebfd285
KH
2143 if (soc_ops.disable_module)
2144 soc_ops.disable_module(oh);
45c38252 2145 _disable_clocks(oh);
665d0013
RN
2146 if (oh->clkdm)
2147 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2148 }
63c85238
PW
2149 /* XXX Should this code also force-disable the optional clocks? */
2150
9c8b0ec7
PW
2151 for (i = 0; i < oh->rst_lines_cnt; i++)
2152 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2153
8d9af88f
TL
2154 /* Mux pins to safe mode or use populated off mode values */
2155 if (oh->mux)
2156 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2157
2158 oh->_state = _HWMOD_STATE_DISABLED;
2159
2160 return 0;
2161}
2162
381d033a
PW
2163/**
2164 * _init_mpu_rt_base - populate the virtual address for a hwmod
2165 * @oh: struct omap_hwmod * to locate the virtual address
2166 *
2167 * Cache the virtual address used by the MPU to access this IP block's
2168 * registers. This address is needed early so the OCP registers that
2169 * are part of the device's address space can be ioremapped properly.
2170 * No return value.
2171 */
2172static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2173{
c9aafd23
PW
2174 struct omap_hwmod_addr_space *mem;
2175 void __iomem *va_start;
2176
2177 if (!oh)
2178 return;
2179
2221b5cd
PW
2180 _save_mpu_port_index(oh);
2181
381d033a
PW
2182 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2183 return;
2184
c9aafd23
PW
2185 mem = _find_mpu_rt_addr_space(oh);
2186 if (!mem) {
2187 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2188 oh->name);
2189 return;
2190 }
2191
2192 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2193 if (!va_start) {
2194 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2195 return;
2196 }
2197
2198 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2199 oh->name, va_start);
2200
2201 oh->_mpu_rt_va = va_start;
381d033a
PW
2202}
2203
2204/**
2205 * _init - initialize internal data for the hwmod @oh
2206 * @oh: struct omap_hwmod *
2207 * @n: (unused)
2208 *
2209 * Look up the clocks and the address space used by the MPU to access
2210 * registers belonging to the hwmod @oh. @oh must already be
2211 * registered at this point. This is the first of two phases for
2212 * hwmod initialization. Code called here does not touch any hardware
2213 * registers, it simply prepares internal data structures. Returns 0
2214 * upon success or if the hwmod isn't registered, or -EINVAL upon
2215 * failure.
2216 */
2217static int __init _init(struct omap_hwmod *oh, void *data)
2218{
2219 int r;
2220
2221 if (oh->_state != _HWMOD_STATE_REGISTERED)
2222 return 0;
2223
2224 _init_mpu_rt_base(oh, NULL);
2225
2226 r = _init_clocks(oh, NULL);
2227 if (IS_ERR_VALUE(r)) {
2228 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2229 return -EINVAL;
2230 }
2231
2232 oh->_state = _HWMOD_STATE_INITIALIZED;
2233
2234 return 0;
2235}
2236
63c85238 2237/**
64813c3f 2238 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2239 * @oh: struct omap_hwmod *
2240 *
64813c3f
PW
2241 * Set up the module's interface clocks. XXX This function is still mostly
2242 * a stub; implementing this properly requires iclk autoidle usecounting in
2243 * the clock code. No return value.
63c85238 2244 */
64813c3f 2245static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2246{
5d95dde7 2247 struct omap_hwmod_ocp_if *os;
11cd4b94 2248 struct list_head *p;
5d95dde7 2249 int i = 0;
381d033a 2250 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2251 return;
48d54f3f 2252
11cd4b94 2253 p = oh->slave_ports.next;
63c85238 2254
5d95dde7 2255 while (i < oh->slaves_cnt) {
11cd4b94 2256 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2257 if (!os->_clk)
64813c3f 2258 continue;
63c85238 2259
64813c3f
PW
2260 if (os->flags & OCPIF_SWSUP_IDLE) {
2261 /* XXX omap_iclk_deny_idle(c); */
2262 } else {
2263 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2264 clk_enable(os->_clk);
63c85238
PW
2265 }
2266 }
2267
64813c3f
PW
2268 return;
2269}
2270
2271/**
2272 * _setup_reset - reset an IP block during the setup process
2273 * @oh: struct omap_hwmod *
2274 *
2275 * Reset the IP block corresponding to the hwmod @oh during the setup
2276 * process. The IP block is first enabled so it can be successfully
2277 * reset. Returns 0 upon success or a negative error code upon
2278 * failure.
2279 */
2280static int __init _setup_reset(struct omap_hwmod *oh)
2281{
2282 int r;
2283
2284 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2285 return -EINVAL;
63c85238 2286
747834ab
PW
2287 if (oh->rst_lines_cnt == 0) {
2288 r = _enable(oh);
2289 if (r) {
2290 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2291 oh->name, oh->_state);
2292 return -EINVAL;
2293 }
9a23dfe1 2294 }
63c85238 2295
2800852a 2296 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2297 r = _reset(oh);
2298
2299 return r;
2300}
2301
2302/**
2303 * _setup_postsetup - transition to the appropriate state after _setup
2304 * @oh: struct omap_hwmod *
2305 *
2306 * Place an IP block represented by @oh into a "post-setup" state --
2307 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2308 * this function is called at the end of _setup().) The postsetup
2309 * state for an IP block can be changed by calling
2310 * omap_hwmod_enter_postsetup_state() early in the boot process,
2311 * before one of the omap_hwmod_setup*() functions are called for the
2312 * IP block.
2313 *
2314 * The IP block stays in this state until a PM runtime-based driver is
2315 * loaded for that IP block. A post-setup state of IDLE is
2316 * appropriate for almost all IP blocks with runtime PM-enabled
2317 * drivers, since those drivers are able to enable the IP block. A
2318 * post-setup state of ENABLED is appropriate for kernels with PM
2319 * runtime disabled. The DISABLED state is appropriate for unusual IP
2320 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2321 * included, since the WDTIMER starts running on reset and will reset
2322 * the MPU if left active.
2323 *
2324 * This post-setup mechanism is deprecated. Once all of the OMAP
2325 * drivers have been converted to use PM runtime, and all of the IP
2326 * block data and interconnect data is available to the hwmod code, it
2327 * should be possible to replace this mechanism with a "lazy reset"
2328 * arrangement. In a "lazy reset" setup, each IP block is enabled
2329 * when the driver first probes, then all remaining IP blocks without
2330 * drivers are either shut down or enabled after the drivers have
2331 * loaded. However, this cannot take place until the above
2332 * preconditions have been met, since otherwise the late reset code
2333 * has no way of knowing which IP blocks are in use by drivers, and
2334 * which ones are unused.
2335 *
2336 * No return value.
2337 */
2338static void __init _setup_postsetup(struct omap_hwmod *oh)
2339{
2340 u8 postsetup_state;
2341
2342 if (oh->rst_lines_cnt > 0)
2343 return;
76e5589e 2344
2092e5cc
PW
2345 postsetup_state = oh->_postsetup_state;
2346 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2347 postsetup_state = _HWMOD_STATE_ENABLED;
2348
2349 /*
2350 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2351 * it should be set by the core code as a runtime flag during startup
2352 */
2353 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2354 (postsetup_state == _HWMOD_STATE_IDLE)) {
2355 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2356 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2357 }
2092e5cc
PW
2358
2359 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2360 _idle(oh);
2092e5cc
PW
2361 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2362 _shutdown(oh);
2363 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2364 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2365 oh->name, postsetup_state);
63c85238 2366
64813c3f
PW
2367 return;
2368}
2369
2370/**
2371 * _setup - prepare IP block hardware for use
2372 * @oh: struct omap_hwmod *
2373 * @n: (unused, pass NULL)
2374 *
2375 * Configure the IP block represented by @oh. This may include
2376 * enabling the IP block, resetting it, and placing it into a
2377 * post-setup state, depending on the type of IP block and applicable
2378 * flags. IP blocks are reset to prevent any previous configuration
2379 * by the bootloader or previous operating system from interfering
2380 * with power management or other parts of the system. The reset can
2381 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2382 * two phases for hwmod initialization. Code called here generally
2383 * affects the IP block hardware, or system integration hardware
2384 * associated with the IP block. Returns 0.
2385 */
2386static int __init _setup(struct omap_hwmod *oh, void *data)
2387{
2388 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2389 return 0;
2390
2391 _setup_iclk_autoidle(oh);
2392
2393 if (!_setup_reset(oh))
2394 _setup_postsetup(oh);
2395
63c85238
PW
2396 return 0;
2397}
2398
63c85238 2399/**
0102b627 2400 * _register - register a struct omap_hwmod
63c85238
PW
2401 * @oh: struct omap_hwmod *
2402 *
43b40992
PW
2403 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2404 * already has been registered by the same name; -EINVAL if the
2405 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2406 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2407 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2408 * success.
63c85238
PW
2409 *
2410 * XXX The data should be copied into bootmem, so the original data
2411 * should be marked __initdata and freed after init. This would allow
2412 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2413 * that the copy process would be relatively complex due to the large number
2414 * of substructures.
2415 */
01592df9 2416static int __init _register(struct omap_hwmod *oh)
63c85238 2417{
43b40992
PW
2418 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2419 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2420 return -EINVAL;
2421
63c85238
PW
2422 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2423
ce35b244
BC
2424 if (_lookup(oh->name))
2425 return -EEXIST;
63c85238 2426
63c85238
PW
2427 list_add_tail(&oh->node, &omap_hwmod_list);
2428
2221b5cd
PW
2429 INIT_LIST_HEAD(&oh->master_ports);
2430 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2431 spin_lock_init(&oh->_lock);
2092e5cc 2432
63c85238
PW
2433 oh->_state = _HWMOD_STATE_REGISTERED;
2434
569edd70
PW
2435 /*
2436 * XXX Rather than doing a strcmp(), this should test a flag
2437 * set in the hwmod data, inserted by the autogenerator code.
2438 */
2439 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2440 mpu_oh = oh;
63c85238 2441
569edd70 2442 return 0;
63c85238
PW
2443}
2444
2221b5cd
PW
2445/**
2446 * _alloc_links - return allocated memory for hwmod links
2447 * @ml: pointer to a struct omap_hwmod_link * for the master link
2448 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2449 *
2450 * Return pointers to two struct omap_hwmod_link records, via the
2451 * addresses pointed to by @ml and @sl. Will first attempt to return
2452 * memory allocated as part of a large initial block, but if that has
2453 * been exhausted, will allocate memory itself. Since ideally this
2454 * second allocation path will never occur, the number of these
2455 * 'supplemental' allocations will be logged when debugging is
2456 * enabled. Returns 0.
2457 */
2458static int __init _alloc_links(struct omap_hwmod_link **ml,
2459 struct omap_hwmod_link **sl)
2460{
2461 unsigned int sz;
2462
2463 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2464 *ml = &linkspace[free_ls++];
2465 *sl = &linkspace[free_ls++];
2466 return 0;
2467 }
2468
2469 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2470
2471 *sl = NULL;
2472 *ml = alloc_bootmem(sz);
2473
2474 memset(*ml, 0, sz);
2475
2476 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2477
2478 ls_supp++;
2479 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2480 ls_supp * LINKS_PER_OCP_IF);
2481
2482 return 0;
2483};
2484
2485/**
2486 * _add_link - add an interconnect between two IP blocks
2487 * @oi: pointer to a struct omap_hwmod_ocp_if record
2488 *
2489 * Add struct omap_hwmod_link records connecting the master IP block
2490 * specified in @oi->master to @oi, and connecting the slave IP block
2491 * specified in @oi->slave to @oi. This code is assumed to run before
2492 * preemption or SMP has been enabled, thus avoiding the need for
2493 * locking in this code. Changes to this assumption will require
2494 * additional locking. Returns 0.
2495 */
2496static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2497{
2498 struct omap_hwmod_link *ml, *sl;
2499
2500 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2501 oi->slave->name);
2502
2503 _alloc_links(&ml, &sl);
2504
2505 ml->ocp_if = oi;
2506 INIT_LIST_HEAD(&ml->node);
2507 list_add(&ml->node, &oi->master->master_ports);
2508 oi->master->masters_cnt++;
2509
2510 sl->ocp_if = oi;
2511 INIT_LIST_HEAD(&sl->node);
2512 list_add(&sl->node, &oi->slave->slave_ports);
2513 oi->slave->slaves_cnt++;
2514
2515 return 0;
2516}
2517
2518/**
2519 * _register_link - register a struct omap_hwmod_ocp_if
2520 * @oi: struct omap_hwmod_ocp_if *
2521 *
2522 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2523 * has already been registered; -EINVAL if @oi is NULL or if the
2524 * record pointed to by @oi is missing required fields; or 0 upon
2525 * success.
2526 *
2527 * XXX The data should be copied into bootmem, so the original data
2528 * should be marked __initdata and freed after init. This would allow
2529 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2530 */
2531static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2532{
2533 if (!oi || !oi->master || !oi->slave || !oi->user)
2534 return -EINVAL;
2535
2536 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2537 return -EEXIST;
2538
2539 pr_debug("omap_hwmod: registering link from %s to %s\n",
2540 oi->master->name, oi->slave->name);
2541
2542 /*
2543 * Register the connected hwmods, if they haven't been
2544 * registered already
2545 */
2546 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2547 _register(oi->master);
2548
2549 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2550 _register(oi->slave);
2551
2552 _add_link(oi);
2553
2554 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2555
2556 return 0;
2557}
2558
2559/**
2560 * _alloc_linkspace - allocate large block of hwmod links
2561 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2562 *
2563 * Allocate a large block of struct omap_hwmod_link records. This
2564 * improves boot time significantly by avoiding the need to allocate
2565 * individual records one by one. If the number of records to
2566 * allocate in the block hasn't been manually specified, this function
2567 * will count the number of struct omap_hwmod_ocp_if records in @ois
2568 * and use that to determine the allocation size. For SoC families
2569 * that require multiple list registrations, such as OMAP3xxx, this
2570 * estimation process isn't optimal, so manual estimation is advised
2571 * in those cases. Returns -EEXIST if the allocation has already occurred
2572 * or 0 upon success.
2573 */
2574static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2575{
2576 unsigned int i = 0;
2577 unsigned int sz;
2578
2579 if (linkspace) {
2580 WARN(1, "linkspace already allocated\n");
2581 return -EEXIST;
2582 }
2583
2584 if (max_ls == 0)
2585 while (ois[i++])
2586 max_ls += LINKS_PER_OCP_IF;
2587
2588 sz = sizeof(struct omap_hwmod_link) * max_ls;
2589
2590 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2591 __func__, sz, max_ls);
2592
2593 linkspace = alloc_bootmem(sz);
2594
2595 memset(linkspace, 0, sz);
2596
2597 return 0;
2598}
0102b627 2599
8f6aa8ee
KH
2600/* Static functions intended only for use in soc_ops field function pointers */
2601
2602/**
2603 * _omap2_wait_target_ready - wait for a module to leave slave idle
2604 * @oh: struct omap_hwmod *
2605 *
2606 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2607 * does not have an IDLEST bit or if the module successfully leaves
2608 * slave idle; otherwise, pass along the return value of the
2609 * appropriate *_cm*_wait_module_ready() function.
2610 */
2611static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2612{
2613 if (!oh)
2614 return -EINVAL;
2615
2616 if (oh->flags & HWMOD_NO_IDLEST)
2617 return 0;
2618
2619 if (!_find_mpu_rt_port(oh))
2620 return 0;
2621
2622 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2623
2624 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2625 oh->prcm.omap2.idlest_reg_id,
2626 oh->prcm.omap2.idlest_idle_bit);
2627}
2628
2629/**
2630 * _omap4_wait_target_ready - wait for a module to leave slave idle
2631 * @oh: struct omap_hwmod *
2632 *
2633 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2634 * does not have an IDLEST bit or if the module successfully leaves
2635 * slave idle; otherwise, pass along the return value of the
2636 * appropriate *_cm*_wait_module_ready() function.
2637 */
2638static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2639{
2b026d13 2640 if (!oh)
8f6aa8ee
KH
2641 return -EINVAL;
2642
2b026d13 2643 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
8f6aa8ee
KH
2644 return 0;
2645
2646 if (!_find_mpu_rt_port(oh))
2647 return 0;
2648
2649 /* XXX check module SIDLEMODE, hardreset status */
2650
2651 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2652 oh->clkdm->cm_inst,
2653 oh->clkdm->clkdm_offs,
2654 oh->prcm.omap4.clkctrl_offs);
2655}
2656
1688bf19
VH
2657/**
2658 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2659 * @oh: struct omap_hwmod *
2660 *
2661 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2662 * does not have an IDLEST bit or if the module successfully leaves
2663 * slave idle; otherwise, pass along the return value of the
2664 * appropriate *_cm*_wait_module_ready() function.
2665 */
2666static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2667{
2668 if (!oh || !oh->clkdm)
2669 return -EINVAL;
2670
2671 if (oh->flags & HWMOD_NO_IDLEST)
2672 return 0;
2673
2674 if (!_find_mpu_rt_port(oh))
2675 return 0;
2676
2677 /* XXX check module SIDLEMODE, hardreset status */
2678
2679 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2680 oh->clkdm->clkdm_offs,
2681 oh->prcm.omap4.clkctrl_offs);
2682}
2683
b8249cf2
KH
2684/**
2685 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2686 * @oh: struct omap_hwmod * to assert hardreset
2687 * @ohri: hardreset line data
2688 *
2689 * Call omap2_prm_assert_hardreset() with parameters extracted from
2690 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2691 * use as an soc_ops function pointer. Passes along the return value
2692 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2693 * for removal when the PRM code is moved into drivers/.
2694 */
2695static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2696 struct omap_hwmod_rst_info *ohri)
2697{
2698 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2699 ohri->rst_shift);
2700}
2701
2702/**
2703 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2704 * @oh: struct omap_hwmod * to deassert hardreset
2705 * @ohri: hardreset line data
2706 *
2707 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2708 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2709 * use as an soc_ops function pointer. Passes along the return value
2710 * from omap2_prm_deassert_hardreset(). XXX This function is
2711 * scheduled for removal when the PRM code is moved into drivers/.
2712 */
2713static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2714 struct omap_hwmod_rst_info *ohri)
2715{
2716 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2717 ohri->rst_shift,
2718 ohri->st_shift);
2719}
2720
2721/**
2722 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2723 * @oh: struct omap_hwmod * to test hardreset
2724 * @ohri: hardreset line data
2725 *
2726 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2727 * from the hwmod @oh and the hardreset line data @ohri. Only
2728 * intended for use as an soc_ops function pointer. Passes along the
2729 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2730 * function is scheduled for removal when the PRM code is moved into
2731 * drivers/.
2732 */
2733static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2734 struct omap_hwmod_rst_info *ohri)
2735{
2736 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2737 ohri->st_shift);
2738}
2739
2740/**
2741 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2742 * @oh: struct omap_hwmod * to assert hardreset
2743 * @ohri: hardreset line data
2744 *
2745 * Call omap4_prminst_assert_hardreset() with parameters extracted
2746 * from the hwmod @oh and the hardreset line data @ohri. Only
2747 * intended for use as an soc_ops function pointer. Passes along the
2748 * return value from omap4_prminst_assert_hardreset(). XXX This
2749 * function is scheduled for removal when the PRM code is moved into
2750 * drivers/.
2751 */
2752static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2753 struct omap_hwmod_rst_info *ohri)
b8249cf2 2754{
07b3a139
PW
2755 if (!oh->clkdm)
2756 return -EINVAL;
2757
b8249cf2
KH
2758 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2759 oh->clkdm->pwrdm.ptr->prcm_partition,
2760 oh->clkdm->pwrdm.ptr->prcm_offs,
2761 oh->prcm.omap4.rstctrl_offs);
2762}
2763
2764/**
2765 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2766 * @oh: struct omap_hwmod * to deassert hardreset
2767 * @ohri: hardreset line data
2768 *
2769 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2770 * from the hwmod @oh and the hardreset line data @ohri. Only
2771 * intended for use as an soc_ops function pointer. Passes along the
2772 * return value from omap4_prminst_deassert_hardreset(). XXX This
2773 * function is scheduled for removal when the PRM code is moved into
2774 * drivers/.
2775 */
2776static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2777 struct omap_hwmod_rst_info *ohri)
2778{
07b3a139
PW
2779 if (!oh->clkdm)
2780 return -EINVAL;
2781
b8249cf2
KH
2782 if (ohri->st_shift)
2783 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2784 oh->name, ohri->name);
2785 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2786 oh->clkdm->pwrdm.ptr->prcm_partition,
2787 oh->clkdm->pwrdm.ptr->prcm_offs,
2788 oh->prcm.omap4.rstctrl_offs);
2789}
2790
2791/**
2792 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2793 * @oh: struct omap_hwmod * to test hardreset
2794 * @ohri: hardreset line data
2795 *
2796 * Call omap4_prminst_is_hardreset_asserted() with parameters
2797 * extracted from the hwmod @oh and the hardreset line data @ohri.
2798 * Only intended for use as an soc_ops function pointer. Passes along
2799 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2800 * This function is scheduled for removal when the PRM code is moved
2801 * into drivers/.
2802 */
2803static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2804 struct omap_hwmod_rst_info *ohri)
2805{
07b3a139
PW
2806 if (!oh->clkdm)
2807 return -EINVAL;
2808
b8249cf2
KH
2809 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2810 oh->clkdm->pwrdm.ptr->prcm_partition,
2811 oh->clkdm->pwrdm.ptr->prcm_offs,
2812 oh->prcm.omap4.rstctrl_offs);
2813}
2814
1688bf19
VH
2815/**
2816 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2817 * @oh: struct omap_hwmod * to assert hardreset
2818 * @ohri: hardreset line data
2819 *
2820 * Call am33xx_prminst_assert_hardreset() with parameters extracted
2821 * from the hwmod @oh and the hardreset line data @ohri. Only
2822 * intended for use as an soc_ops function pointer. Passes along the
2823 * return value from am33xx_prminst_assert_hardreset(). XXX This
2824 * function is scheduled for removal when the PRM code is moved into
2825 * drivers/.
2826 */
2827static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
2828 struct omap_hwmod_rst_info *ohri)
2829
2830{
2831 return am33xx_prm_assert_hardreset(ohri->rst_shift,
2832 oh->clkdm->pwrdm.ptr->prcm_offs,
2833 oh->prcm.omap4.rstctrl_offs);
2834}
2835
2836/**
2837 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2838 * @oh: struct omap_hwmod * to deassert hardreset
2839 * @ohri: hardreset line data
2840 *
2841 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2842 * from the hwmod @oh and the hardreset line data @ohri. Only
2843 * intended for use as an soc_ops function pointer. Passes along the
2844 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2845 * function is scheduled for removal when the PRM code is moved into
2846 * drivers/.
2847 */
2848static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2849 struct omap_hwmod_rst_info *ohri)
2850{
2851 if (ohri->st_shift)
2852 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2853 oh->name, ohri->name);
2854
2855 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
2856 oh->clkdm->pwrdm.ptr->prcm_offs,
2857 oh->prcm.omap4.rstctrl_offs,
2858 oh->prcm.omap4.rstst_offs);
2859}
2860
2861/**
2862 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
2863 * @oh: struct omap_hwmod * to test hardreset
2864 * @ohri: hardreset line data
2865 *
2866 * Call am33xx_prminst_is_hardreset_asserted() with parameters
2867 * extracted from the hwmod @oh and the hardreset line data @ohri.
2868 * Only intended for use as an soc_ops function pointer. Passes along
2869 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
2870 * This function is scheduled for removal when the PRM code is moved
2871 * into drivers/.
2872 */
2873static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
2874 struct omap_hwmod_rst_info *ohri)
2875{
2876 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
2877 oh->clkdm->pwrdm.ptr->prcm_offs,
2878 oh->prcm.omap4.rstctrl_offs);
2879}
2880
0102b627
BC
2881/* Public functions */
2882
2883u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2884{
2885 if (oh->flags & HWMOD_16BIT_REG)
2886 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2887 else
2888 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2889}
2890
2891void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2892{
2893 if (oh->flags & HWMOD_16BIT_REG)
2894 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2895 else
2896 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2897}
2898
6d3c55fd
A
2899/**
2900 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2901 * @oh: struct omap_hwmod *
2902 *
2903 * This is a public function exposed to drivers. Some drivers may need to do
2904 * some settings before and after resetting the device. Those drivers after
2905 * doing the necessary settings could use this function to start a reset by
2906 * setting the SYSCONFIG.SOFTRESET bit.
2907 */
2908int omap_hwmod_softreset(struct omap_hwmod *oh)
2909{
3c55c1ba
PW
2910 u32 v;
2911 int ret;
2912
2913 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2914 return -EINVAL;
2915
3c55c1ba
PW
2916 v = oh->_sysc_cache;
2917 ret = _set_softreset(oh, &v);
2918 if (ret)
2919 goto error;
2920 _write_sysconfig(v, oh);
2921
2922error:
2923 return ret;
6d3c55fd
A
2924}
2925
0102b627
BC
2926/**
2927 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2928 * @oh: struct omap_hwmod *
2929 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2930 *
2931 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2932 * local copy. Intended to be used by drivers that have some erratum
2933 * that requires direct manipulation of the SIDLEMODE bits. Returns
2934 * -EINVAL if @oh is null, or passes along the return value from
2935 * _set_slave_idlemode().
2936 *
2937 * XXX Does this function have any current users? If not, we should
2938 * remove it; it is better to let the rest of the hwmod code handle this.
2939 * Any users of this function should be scrutinized carefully.
2940 */
2941int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2942{
2943 u32 v;
2944 int retval = 0;
2945
2946 if (!oh)
2947 return -EINVAL;
2948
2949 v = oh->_sysc_cache;
2950
2951 retval = _set_slave_idlemode(oh, idlemode, &v);
2952 if (!retval)
2953 _write_sysconfig(v, oh);
2954
2955 return retval;
2956}
2957
63c85238
PW
2958/**
2959 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2960 * @name: name of the omap_hwmod to look up
2961 *
2962 * Given a @name of an omap_hwmod, return a pointer to the registered
2963 * struct omap_hwmod *, or NULL upon error.
2964 */
2965struct omap_hwmod *omap_hwmod_lookup(const char *name)
2966{
2967 struct omap_hwmod *oh;
2968
2969 if (!name)
2970 return NULL;
2971
63c85238 2972 oh = _lookup(name);
63c85238
PW
2973
2974 return oh;
2975}
2976
2977/**
2978 * omap_hwmod_for_each - call function for each registered omap_hwmod
2979 * @fn: pointer to a callback function
97d60162 2980 * @data: void * data to pass to callback function
63c85238
PW
2981 *
2982 * Call @fn for each registered omap_hwmod, passing @data to each
2983 * function. @fn must return 0 for success or any other value for
2984 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2985 * will stop and the non-zero return value will be passed to the
2986 * caller of omap_hwmod_for_each(). @fn is called with
2987 * omap_hwmod_for_each() held.
2988 */
97d60162
PW
2989int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2990 void *data)
63c85238
PW
2991{
2992 struct omap_hwmod *temp_oh;
30ebad9d 2993 int ret = 0;
63c85238
PW
2994
2995 if (!fn)
2996 return -EINVAL;
2997
63c85238 2998 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2999 ret = (*fn)(temp_oh, data);
63c85238
PW
3000 if (ret)
3001 break;
3002 }
63c85238
PW
3003
3004 return ret;
3005}
3006
2221b5cd
PW
3007/**
3008 * omap_hwmod_register_links - register an array of hwmod links
3009 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3010 *
3011 * Intended to be called early in boot before the clock framework is
3012 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
3013 * listed in @ois that are valid for this chip. Returns -EINVAL if
3014 * omap_hwmod_init() hasn't been called before calling this function,
3015 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3016 * success.
2221b5cd
PW
3017 */
3018int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3019{
3020 int r, i;
3021
9ebfd285
KH
3022 if (!inited)
3023 return -EINVAL;
3024
2221b5cd
PW
3025 if (!ois)
3026 return 0;
3027
2221b5cd
PW
3028 if (!linkspace) {
3029 if (_alloc_linkspace(ois)) {
3030 pr_err("omap_hwmod: could not allocate link space\n");
3031 return -ENOMEM;
3032 }
3033 }
3034
3035 i = 0;
3036 do {
3037 r = _register_link(ois[i]);
3038 WARN(r && r != -EEXIST,
3039 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3040 ois[i]->master->name, ois[i]->slave->name, r);
3041 } while (ois[++i]);
3042
3043 return 0;
3044}
3045
381d033a
PW
3046/**
3047 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3048 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3049 *
3050 * If the hwmod data corresponding to the MPU subsystem IP block
3051 * hasn't been initialized and set up yet, do so now. This must be
3052 * done first since sleep dependencies may be added from other hwmods
3053 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3054 * return value.
63c85238 3055 */
381d033a 3056static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3057{
381d033a
PW
3058 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3059 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3060 __func__, MPU_INITIATOR_NAME);
3061 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3062 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3063}
3064
63c85238 3065/**
a2debdbd
PW
3066 * omap_hwmod_setup_one - set up a single hwmod
3067 * @oh_name: const char * name of the already-registered hwmod to set up
3068 *
381d033a
PW
3069 * Initialize and set up a single hwmod. Intended to be used for a
3070 * small number of early devices, such as the timer IP blocks used for
3071 * the scheduler clock. Must be called after omap2_clk_init().
3072 * Resolves the struct clk names to struct clk pointers for each
3073 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3074 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3075 */
3076int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3077{
3078 struct omap_hwmod *oh;
63c85238 3079
a2debdbd
PW
3080 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3081
a2debdbd
PW
3082 oh = _lookup(oh_name);
3083 if (!oh) {
3084 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3085 return -EINVAL;
3086 }
63c85238 3087
381d033a 3088 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3089
381d033a 3090 _init(oh, NULL);
a2debdbd
PW
3091 _setup(oh, NULL);
3092
63c85238
PW
3093 return 0;
3094}
3095
3096/**
381d033a 3097 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3098 *
381d033a
PW
3099 * Initialize and set up all IP blocks registered with the hwmod code.
3100 * Must be called after omap2_clk_init(). Resolves the struct clk
3101 * names to struct clk pointers for each registered omap_hwmod. Also
3102 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3103 */
550c8092 3104static int __init omap_hwmod_setup_all(void)
63c85238 3105{
381d033a 3106 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3107
381d033a 3108 omap_hwmod_for_each(_init, NULL);
2092e5cc 3109 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3110
3111 return 0;
3112}
550c8092 3113core_initcall(omap_hwmod_setup_all);
63c85238 3114
63c85238
PW
3115/**
3116 * omap_hwmod_enable - enable an omap_hwmod
3117 * @oh: struct omap_hwmod *
3118 *
74ff3a68 3119 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3120 * Returns -EINVAL on error or passes along the return value from _enable().
3121 */
3122int omap_hwmod_enable(struct omap_hwmod *oh)
3123{
3124 int r;
dc6d1cda 3125 unsigned long flags;
63c85238
PW
3126
3127 if (!oh)
3128 return -EINVAL;
3129
dc6d1cda
PW
3130 spin_lock_irqsave(&oh->_lock, flags);
3131 r = _enable(oh);
3132 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3133
3134 return r;
3135}
3136
3137/**
3138 * omap_hwmod_idle - idle an omap_hwmod
3139 * @oh: struct omap_hwmod *
3140 *
74ff3a68 3141 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3142 * Returns -EINVAL on error or passes along the return value from _idle().
3143 */
3144int omap_hwmod_idle(struct omap_hwmod *oh)
3145{
dc6d1cda
PW
3146 unsigned long flags;
3147
63c85238
PW
3148 if (!oh)
3149 return -EINVAL;
3150
dc6d1cda
PW
3151 spin_lock_irqsave(&oh->_lock, flags);
3152 _idle(oh);
3153 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3154
3155 return 0;
3156}
3157
3158/**
3159 * omap_hwmod_shutdown - shutdown an omap_hwmod
3160 * @oh: struct omap_hwmod *
3161 *
74ff3a68 3162 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3163 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3164 * the return value from _shutdown().
3165 */
3166int omap_hwmod_shutdown(struct omap_hwmod *oh)
3167{
dc6d1cda
PW
3168 unsigned long flags;
3169
63c85238
PW
3170 if (!oh)
3171 return -EINVAL;
3172
dc6d1cda 3173 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3174 _shutdown(oh);
dc6d1cda 3175 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3176
3177 return 0;
3178}
3179
3180/**
3181 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3182 * @oh: struct omap_hwmod *oh
3183 *
3184 * Intended to be called by the omap_device code.
3185 */
3186int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3187{
dc6d1cda
PW
3188 unsigned long flags;
3189
3190 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3191 _enable_clocks(oh);
dc6d1cda 3192 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3193
3194 return 0;
3195}
3196
3197/**
3198 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3199 * @oh: struct omap_hwmod *oh
3200 *
3201 * Intended to be called by the omap_device code.
3202 */
3203int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3204{
dc6d1cda
PW
3205 unsigned long flags;
3206
3207 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3208 _disable_clocks(oh);
dc6d1cda 3209 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3210
3211 return 0;
3212}
3213
3214/**
3215 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3216 * @oh: struct omap_hwmod *oh
3217 *
3218 * Intended to be called by drivers and core code when all posted
3219 * writes to a device must complete before continuing further
3220 * execution (for example, after clearing some device IRQSTATUS
3221 * register bits)
3222 *
3223 * XXX what about targets with multiple OCP threads?
3224 */
3225void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3226{
3227 BUG_ON(!oh);
3228
43b40992 3229 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3230 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3231 oh->name);
63c85238
PW
3232 return;
3233 }
3234
3235 /*
3236 * Forces posted writes to complete on the OCP thread handling
3237 * register writes
3238 */
cc7a1d2a 3239 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3240}
3241
3242/**
3243 * omap_hwmod_reset - reset the hwmod
3244 * @oh: struct omap_hwmod *
3245 *
3246 * Under some conditions, a driver may wish to reset the entire device.
3247 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3248 * the return value from _reset().
63c85238
PW
3249 */
3250int omap_hwmod_reset(struct omap_hwmod *oh)
3251{
3252 int r;
dc6d1cda 3253 unsigned long flags;
63c85238 3254
9b579114 3255 if (!oh)
63c85238
PW
3256 return -EINVAL;
3257
dc6d1cda 3258 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3259 r = _reset(oh);
dc6d1cda 3260 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3261
3262 return r;
3263}
3264
5e8370f1
PW
3265/*
3266 * IP block data retrieval functions
3267 */
3268
63c85238
PW
3269/**
3270 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3271 * @oh: struct omap_hwmod *
3272 * @res: pointer to the first element of an array of struct resource to fill
3273 *
3274 * Count the number of struct resource array elements necessary to
3275 * contain omap_hwmod @oh resources. Intended to be called by code
3276 * that registers omap_devices. Intended to be used to determine the
3277 * size of a dynamically-allocated struct resource array, before
3278 * calling omap_hwmod_fill_resources(). Returns the number of struct
3279 * resource array elements needed.
3280 *
3281 * XXX This code is not optimized. It could attempt to merge adjacent
3282 * resource IDs.
3283 *
3284 */
3285int omap_hwmod_count_resources(struct omap_hwmod *oh)
3286{
5d95dde7 3287 struct omap_hwmod_ocp_if *os;
11cd4b94 3288 struct list_head *p;
5d95dde7
PW
3289 int ret;
3290 int i = 0;
63c85238 3291
bc614958 3292 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 3293
11cd4b94 3294 p = oh->slave_ports.next;
2221b5cd 3295
5d95dde7 3296 while (i < oh->slaves_cnt) {
11cd4b94 3297 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
3298 ret += _count_ocp_if_addr_spaces(os);
3299 }
63c85238
PW
3300
3301 return ret;
3302}
3303
3304/**
3305 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3306 * @oh: struct omap_hwmod *
3307 * @res: pointer to the first element of an array of struct resource to fill
3308 *
3309 * Fill the struct resource array @res with resource data from the
3310 * omap_hwmod @oh. Intended to be called by code that registers
3311 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3312 * number of array elements filled.
3313 */
3314int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3315{
5d95dde7 3316 struct omap_hwmod_ocp_if *os;
11cd4b94 3317 struct list_head *p;
5d95dde7 3318 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3319 int r = 0;
3320
3321 /* For each IRQ, DMA, memory area, fill in array.*/
3322
212738a4
PW
3323 mpu_irqs_cnt = _count_mpu_irqs(oh);
3324 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3325 (res + r)->name = (oh->mpu_irqs + i)->name;
3326 (res + r)->start = (oh->mpu_irqs + i)->irq;
3327 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3328 (res + r)->flags = IORESOURCE_IRQ;
3329 r++;
3330 }
3331
bc614958
PW
3332 sdma_reqs_cnt = _count_sdma_reqs(oh);
3333 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3334 (res + r)->name = (oh->sdma_reqs + i)->name;
3335 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3336 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3337 (res + r)->flags = IORESOURCE_DMA;
3338 r++;
3339 }
3340
11cd4b94 3341 p = oh->slave_ports.next;
2221b5cd 3342
5d95dde7
PW
3343 i = 0;
3344 while (i < oh->slaves_cnt) {
11cd4b94 3345 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3346 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3347
78183f3f 3348 for (j = 0; j < addr_cnt; j++) {
cd503802 3349 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3350 (res + r)->start = (os->addr + j)->pa_start;
3351 (res + r)->end = (os->addr + j)->pa_end;
3352 (res + r)->flags = IORESOURCE_MEM;
3353 r++;
3354 }
3355 }
3356
3357 return r;
3358}
3359
5e8370f1
PW
3360/**
3361 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3362 * @oh: struct omap_hwmod * to operate on
3363 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3364 * @name: pointer to the name of the data to fetch (optional)
3365 * @rsrc: pointer to a struct resource, allocated by the caller
3366 *
3367 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3368 * data for the IP block pointed to by @oh. The data will be filled
3369 * into a struct resource record pointed to by @rsrc. The struct
3370 * resource must be allocated by the caller. When @name is non-null,
3371 * the data associated with the matching entry in the IRQ/SDMA/address
3372 * space hwmod data arrays will be returned. If @name is null, the
3373 * first array entry will be returned. Data order is not meaningful
3374 * in hwmod data, so callers are strongly encouraged to use a non-null
3375 * @name whenever possible to avoid unpredictable effects if hwmod
3376 * data is later added that causes data ordering to change. This
3377 * function is only intended for use by OMAP core code. Device
3378 * drivers should not call this function - the appropriate bus-related
3379 * data accessor functions should be used instead. Returns 0 upon
3380 * success or a negative error code upon error.
3381 */
3382int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3383 const char *name, struct resource *rsrc)
3384{
3385 int r;
3386 unsigned int irq, dma;
3387 u32 pa_start, pa_end;
3388
3389 if (!oh || !rsrc)
3390 return -EINVAL;
3391
3392 if (type == IORESOURCE_IRQ) {
3393 r = _get_mpu_irq_by_name(oh, name, &irq);
3394 if (r)
3395 return r;
3396
3397 rsrc->start = irq;
3398 rsrc->end = irq;
3399 } else if (type == IORESOURCE_DMA) {
3400 r = _get_sdma_req_by_name(oh, name, &dma);
3401 if (r)
3402 return r;
3403
3404 rsrc->start = dma;
3405 rsrc->end = dma;
3406 } else if (type == IORESOURCE_MEM) {
3407 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3408 if (r)
3409 return r;
3410
3411 rsrc->start = pa_start;
3412 rsrc->end = pa_end;
3413 } else {
3414 return -EINVAL;
3415 }
3416
3417 rsrc->flags = type;
3418 rsrc->name = name;
3419
3420 return 0;
3421}
3422
63c85238
PW
3423/**
3424 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3425 * @oh: struct omap_hwmod *
3426 *
3427 * Return the powerdomain pointer associated with the OMAP module
3428 * @oh's main clock. If @oh does not have a main clk, return the
3429 * powerdomain associated with the interface clock associated with the
3430 * module's MPU port. (XXX Perhaps this should use the SDMA port
3431 * instead?) Returns NULL on error, or a struct powerdomain * on
3432 * success.
3433 */
3434struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3435{
3436 struct clk *c;
2d6141ba 3437 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3438
3439 if (!oh)
3440 return NULL;
3441
3442 if (oh->_clk) {
3443 c = oh->_clk;
3444 } else {
2d6141ba
PW
3445 oi = _find_mpu_rt_port(oh);
3446 if (!oi)
63c85238 3447 return NULL;
2d6141ba 3448 c = oi->_clk;
63c85238
PW
3449 }
3450
d5647c18
TG
3451 if (!c->clkdm)
3452 return NULL;
3453
63c85238
PW
3454 return c->clkdm->pwrdm.ptr;
3455
3456}
3457
db2a60bf
PW
3458/**
3459 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3460 * @oh: struct omap_hwmod *
3461 *
3462 * Returns the virtual address corresponding to the beginning of the
3463 * module's register target, in the address range that is intended to
3464 * be used by the MPU. Returns the virtual address upon success or NULL
3465 * upon error.
3466 */
3467void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3468{
3469 if (!oh)
3470 return NULL;
3471
3472 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3473 return NULL;
3474
3475 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3476 return NULL;
3477
3478 return oh->_mpu_rt_va;
3479}
3480
63c85238
PW
3481/**
3482 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3483 * @oh: struct omap_hwmod *
3484 * @init_oh: struct omap_hwmod * (initiator)
3485 *
3486 * Add a sleep dependency between the initiator @init_oh and @oh.
3487 * Intended to be called by DSP/Bridge code via platform_data for the
3488 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3489 * code needs to add/del initiator dependencies dynamically
3490 * before/after accessing a device. Returns the return value from
3491 * _add_initiator_dep().
3492 *
3493 * XXX Keep a usecount in the clockdomain code
3494 */
3495int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3496 struct omap_hwmod *init_oh)
3497{
3498 return _add_initiator_dep(oh, init_oh);
3499}
3500
3501/*
3502 * XXX what about functions for drivers to save/restore ocp_sysconfig
3503 * for context save/restore operations?
3504 */
3505
3506/**
3507 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3508 * @oh: struct omap_hwmod *
3509 * @init_oh: struct omap_hwmod * (initiator)
3510 *
3511 * Remove a sleep dependency between the initiator @init_oh and @oh.
3512 * Intended to be called by DSP/Bridge code via platform_data for the
3513 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3514 * code needs to add/del initiator dependencies dynamically
3515 * before/after accessing a device. Returns the return value from
3516 * _del_initiator_dep().
3517 *
3518 * XXX Keep a usecount in the clockdomain code
3519 */
3520int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3521 struct omap_hwmod *init_oh)
3522{
3523 return _del_initiator_dep(oh, init_oh);
3524}
3525
63c85238
PW
3526/**
3527 * omap_hwmod_enable_wakeup - allow device to wake up the system
3528 * @oh: struct omap_hwmod *
3529 *
3530 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3531 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3532 * this IP block if it has dynamic mux entries. Eventually this
3533 * should set PRCM wakeup registers to cause the PRCM to receive
3534 * wakeup events from the module. Does not set any wakeup routing
3535 * registers beyond this point - if the module is to wake up any other
3536 * module or subsystem, that must be set separately. Called by
3537 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3538 */
3539int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3540{
dc6d1cda 3541 unsigned long flags;
5a7ddcbd 3542 u32 v;
dc6d1cda 3543
dc6d1cda 3544 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3545
3546 if (oh->class->sysc &&
3547 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3548 v = oh->_sysc_cache;
3549 _enable_wakeup(oh, &v);
3550 _write_sysconfig(v, oh);
3551 }
3552
eceec009 3553 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3554 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3555
3556 return 0;
3557}
3558
3559/**
3560 * omap_hwmod_disable_wakeup - prevent device from waking the system
3561 * @oh: struct omap_hwmod *
3562 *
3563 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3564 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3565 * events for this IP block if it has dynamic mux entries. Eventually
3566 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3567 * wakeup events from the module. Does not set any wakeup routing
3568 * registers beyond this point - if the module is to wake up any other
3569 * module or subsystem, that must be set separately. Called by
3570 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3571 */
3572int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3573{
dc6d1cda 3574 unsigned long flags;
5a7ddcbd 3575 u32 v;
dc6d1cda 3576
dc6d1cda 3577 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3578
3579 if (oh->class->sysc &&
3580 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3581 v = oh->_sysc_cache;
3582 _disable_wakeup(oh, &v);
3583 _write_sysconfig(v, oh);
3584 }
3585
eceec009 3586 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3587 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3588
3589 return 0;
3590}
43b40992 3591
aee48e3c
PW
3592/**
3593 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3594 * contained in the hwmod module.
3595 * @oh: struct omap_hwmod *
3596 * @name: name of the reset line to lookup and assert
3597 *
3598 * Some IP like dsp, ipu or iva contain processor that require
3599 * an HW reset line to be assert / deassert in order to enable fully
3600 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3601 * yet supported on this OMAP; otherwise, passes along the return value
3602 * from _assert_hardreset().
3603 */
3604int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3605{
3606 int ret;
dc6d1cda 3607 unsigned long flags;
aee48e3c
PW
3608
3609 if (!oh)
3610 return -EINVAL;
3611
dc6d1cda 3612 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3613 ret = _assert_hardreset(oh, name);
dc6d1cda 3614 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3615
3616 return ret;
3617}
3618
3619/**
3620 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3621 * contained in the hwmod module.
3622 * @oh: struct omap_hwmod *
3623 * @name: name of the reset line to look up and deassert
3624 *
3625 * Some IP like dsp, ipu or iva contain processor that require
3626 * an HW reset line to be assert / deassert in order to enable fully
3627 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3628 * yet supported on this OMAP; otherwise, passes along the return value
3629 * from _deassert_hardreset().
3630 */
3631int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3632{
3633 int ret;
dc6d1cda 3634 unsigned long flags;
aee48e3c
PW
3635
3636 if (!oh)
3637 return -EINVAL;
3638
dc6d1cda 3639 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3640 ret = _deassert_hardreset(oh, name);
dc6d1cda 3641 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3642
3643 return ret;
3644}
3645
3646/**
3647 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3648 * contained in the hwmod module
3649 * @oh: struct omap_hwmod *
3650 * @name: name of the reset line to look up and read
3651 *
3652 * Return the current state of the hwmod @oh's reset line named @name:
3653 * returns -EINVAL upon parameter error or if this operation
3654 * is unsupported on the current OMAP; otherwise, passes along the return
3655 * value from _read_hardreset().
3656 */
3657int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3658{
3659 int ret;
dc6d1cda 3660 unsigned long flags;
aee48e3c
PW
3661
3662 if (!oh)
3663 return -EINVAL;
3664
dc6d1cda 3665 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3666 ret = _read_hardreset(oh, name);
dc6d1cda 3667 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3668
3669 return ret;
3670}
3671
3672
43b40992
PW
3673/**
3674 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3675 * @classname: struct omap_hwmod_class name to search for
3676 * @fn: callback function pointer to call for each hwmod in class @classname
3677 * @user: arbitrary context data to pass to the callback function
3678 *
ce35b244
BC
3679 * For each omap_hwmod of class @classname, call @fn.
3680 * If the callback function returns something other than
43b40992
PW
3681 * zero, the iterator is terminated, and the callback function's return
3682 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3683 * if @classname or @fn are NULL, or passes back the error code from @fn.
3684 */
3685int omap_hwmod_for_each_by_class(const char *classname,
3686 int (*fn)(struct omap_hwmod *oh,
3687 void *user),
3688 void *user)
3689{
3690 struct omap_hwmod *temp_oh;
3691 int ret = 0;
3692
3693 if (!classname || !fn)
3694 return -EINVAL;
3695
3696 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3697 __func__, classname);
3698
43b40992
PW
3699 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3700 if (!strcmp(temp_oh->class->name, classname)) {
3701 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3702 __func__, temp_oh->name);
3703 ret = (*fn)(temp_oh, user);
3704 if (ret)
3705 break;
3706 }
3707 }
3708
43b40992
PW
3709 if (ret)
3710 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3711 __func__, ret);
3712
3713 return ret;
3714}
3715
2092e5cc
PW
3716/**
3717 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3718 * @oh: struct omap_hwmod *
3719 * @state: state that _setup() should leave the hwmod in
3720 *
550c8092 3721 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3722 * (called by omap_hwmod_setup_*()). See also the documentation
3723 * for _setup_postsetup(), above. Returns 0 upon success or
3724 * -EINVAL if there is a problem with the arguments or if the hwmod is
3725 * in the wrong state.
2092e5cc
PW
3726 */
3727int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3728{
3729 int ret;
dc6d1cda 3730 unsigned long flags;
2092e5cc
PW
3731
3732 if (!oh)
3733 return -EINVAL;
3734
3735 if (state != _HWMOD_STATE_DISABLED &&
3736 state != _HWMOD_STATE_ENABLED &&
3737 state != _HWMOD_STATE_IDLE)
3738 return -EINVAL;
3739
dc6d1cda 3740 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3741
3742 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3743 ret = -EINVAL;
3744 goto ohsps_unlock;
3745 }
3746
3747 oh->_postsetup_state = state;
3748 ret = 0;
3749
3750ohsps_unlock:
dc6d1cda 3751 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3752
3753 return ret;
3754}
c80705aa
KH
3755
3756/**
3757 * omap_hwmod_get_context_loss_count - get lost context count
3758 * @oh: struct omap_hwmod *
3759 *
3760 * Query the powerdomain of of @oh to get the context loss
3761 * count for this device.
3762 *
3763 * Returns the context loss count of the powerdomain assocated with @oh
3764 * upon success, or zero if no powerdomain exists for @oh.
3765 */
fc013873 3766int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3767{
3768 struct powerdomain *pwrdm;
3769 int ret = 0;
3770
3771 pwrdm = omap_hwmod_get_pwrdm(oh);
3772 if (pwrdm)
3773 ret = pwrdm_get_context_loss_count(pwrdm);
3774
3775 return ret;
3776}
43b01643
PW
3777
3778/**
3779 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3780 * @oh: struct omap_hwmod *
3781 *
3782 * Prevent the hwmod @oh from being reset during the setup process.
3783 * Intended for use by board-*.c files on boards with devices that
3784 * cannot tolerate being reset. Must be called before the hwmod has
3785 * been set up. Returns 0 upon success or negative error code upon
3786 * failure.
3787 */
3788int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3789{
3790 if (!oh)
3791 return -EINVAL;
3792
3793 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3794 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3795 oh->name);
3796 return -EINVAL;
3797 }
3798
3799 oh->flags |= HWMOD_INIT_NO_RESET;
3800
3801 return 0;
3802}
abc2d545
TK
3803
3804/**
3805 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3806 * @oh: struct omap_hwmod * containing hwmod mux entries
3807 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3808 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3809 *
3810 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3811 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3812 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3813 * this function is not called for a given pad_idx, then the ISR
3814 * associated with @oh's first MPU IRQ will be triggered when an I/O
3815 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3816 * the _dynamic or wakeup_ entry: if there are other entries not
3817 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3818 * entries are NOT COUNTED in the dynamic pad index. This function
3819 * must be called separately for each pad that requires its interrupt
3820 * to be re-routed this way. Returns -EINVAL if there is an argument
3821 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3822 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3823 *
3824 * XXX This function interface is fragile. Rather than using array
3825 * indexes, which are subject to unpredictable change, it should be
3826 * using hwmod IRQ names, and some other stable key for the hwmod mux
3827 * pad records.
3828 */
3829int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3830{
3831 int nr_irqs;
3832
3833 might_sleep();
3834
3835 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3836 pad_idx >= oh->mux->nr_pads_dynamic)
3837 return -EINVAL;
3838
3839 /* Check the number of available mpu_irqs */
3840 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3841 ;
3842
3843 if (irq_idx >= nr_irqs)
3844 return -EINVAL;
3845
3846 if (!oh->mux->irqs) {
3847 /* XXX What frees this? */
3848 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3849 GFP_KERNEL);
3850 if (!oh->mux->irqs)
3851 return -ENOMEM;
3852 }
3853 oh->mux->irqs[pad_idx] = irq_idx;
3854
3855 return 0;
3856}
9ebfd285
KH
3857
3858/**
3859 * omap_hwmod_init - initialize the hwmod code
3860 *
3861 * Sets up some function pointers needed by the hwmod code to operate on the
3862 * currently-booted SoC. Intended to be called once during kernel init
3863 * before any hwmods are registered. No return value.
3864 */
3865void __init omap_hwmod_init(void)
3866{
8f6aa8ee
KH
3867 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3868 soc_ops.wait_target_ready = _omap2_wait_target_ready;
b8249cf2
KH
3869 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3870 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3871 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
05e152c7 3872 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
9ebfd285
KH
3873 soc_ops.enable_module = _omap4_enable_module;
3874 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 3875 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
3876 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3877 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3878 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 3879 soc_ops.init_clkdm = _init_clkdm;
1688bf19
VH
3880 } else if (soc_is_am33xx()) {
3881 soc_ops.enable_module = _am33xx_enable_module;
3882 soc_ops.disable_module = _am33xx_disable_module;
3883 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
3884 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
3885 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3886 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
3887 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
3888 } else {
3889 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
3890 }
3891
3892 inited = true;
3893}
68c9a95e
TL
3894
3895/**
3896 * omap_hwmod_get_main_clk - get pointer to main clock name
3897 * @oh: struct omap_hwmod *
3898 *
3899 * Returns the main clock name assocated with @oh upon success,
3900 * or NULL if @oh is NULL.
3901 */
3902const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3903{
3904 if (!oh)
3905 return NULL;
3906
3907 return oh->main_clk;
3908}