ARM: OMAP2+: PRM/CM: Move the stubbed prm and cm functions to prcm.c file and make...
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
4e65331c 142#include "common.h"
ce491cf8 143#include <plat/cpu.h>
1540f214 144#include "clockdomain.h"
72e06d08 145#include "powerdomain.h"
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146#include <plat/clock.h>
147#include <plat/omap_hwmod.h>
5365efbe 148#include <plat/prcm.h>
63c85238 149
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
59fb659b 152#include "prm2xxx_3xxx.h"
d198b514 153#include "prm44xx.h"
eaac329d 154#include "prminst44xx.h"
8d9af88f 155#include "mux.h"
63c85238 156
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157/* Maximum microseconds to wait for OMAP module to softreset */
158#define MAX_MODULE_SOFTRESET_WAIT 10000
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159
160/* Name of the OMAP hwmod for the MPU */
5c2c0296 161#define MPU_INITIATOR_NAME "mpu"
63c85238 162
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163/*
164 * Number of struct omap_hwmod_link records per struct
165 * omap_hwmod_ocp_if record (master->slave and slave->master)
166 */
167#define LINKS_PER_OCP_IF 2
168
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169/* omap_hwmod_list contains all registered struct omap_hwmods */
170static LIST_HEAD(omap_hwmod_list);
171
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172/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
173static struct omap_hwmod *mpu_oh;
174
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175/*
176 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
177 * allocated from - used to reduce the number of small memory
178 * allocations, which has a significant impact on performance
179 */
180static struct omap_hwmod_link *linkspace;
181
182/*
183 * free_ls, max_ls: array indexes into linkspace; representing the
184 * next free struct omap_hwmod_link index, and the maximum number of
185 * struct omap_hwmod_link records allocated (respectively)
186 */
187static unsigned short free_ls, max_ls, ls_supp;
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188
189/* Private functions */
190
5d95dde7 191/**
11cd4b94 192 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 193 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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194 * @i: pointer to the index of the element pointed to by @p in the list
195 *
196 * Return a pointer to the struct omap_hwmod_ocp_if record
197 * containing the struct list_head pointed to by @p, and increment
198 * @p such that a future call to this routine will return the next
199 * record.
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200 */
201static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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202 int *i)
203{
204 struct omap_hwmod_ocp_if *oi;
205
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206 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
207 *p = (*p)->next;
2221b5cd 208
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209 *i = *i + 1;
210
211 return oi;
212}
213
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214/**
215 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
216 * @oh: struct omap_hwmod *
217 *
218 * Load the current value of the hwmod OCP_SYSCONFIG register into the
219 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
220 * OCP_SYSCONFIG register or 0 upon success.
221 */
222static int _update_sysc_cache(struct omap_hwmod *oh)
223{
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224 if (!oh->class->sysc) {
225 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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226 return -EINVAL;
227 }
228
229 /* XXX ensure module interface clock is up */
230
cc7a1d2a 231 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 232
43b40992 233 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 234 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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235
236 return 0;
237}
238
239/**
240 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
241 * @v: OCP_SYSCONFIG value to write
242 * @oh: struct omap_hwmod *
243 *
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244 * Write @v into the module class' OCP_SYSCONFIG register, if it has
245 * one. No return value.
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246 */
247static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
248{
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249 if (!oh->class->sysc) {
250 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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251 return;
252 }
253
254 /* XXX ensure module interface clock is up */
255
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256 /* Module might have lost context, always update cache and register */
257 oh->_sysc_cache = v;
258 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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259}
260
261/**
262 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
263 * @oh: struct omap_hwmod *
264 * @standbymode: MIDLEMODE field bits
265 * @v: pointer to register contents to modify
266 *
267 * Update the master standby mode bits in @v to be @standbymode for
268 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
269 * upon error or 0 upon success.
270 */
271static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
272 u32 *v)
273{
358f0e63
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274 u32 mstandby_mask;
275 u8 mstandby_shift;
276
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277 if (!oh->class->sysc ||
278 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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279 return -EINVAL;
280
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281 if (!oh->class->sysc->sysc_fields) {
282 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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283 return -EINVAL;
284 }
285
43b40992 286 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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287 mstandby_mask = (0x3 << mstandby_shift);
288
289 *v &= ~mstandby_mask;
290 *v |= __ffs(standbymode) << mstandby_shift;
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291
292 return 0;
293}
294
295/**
296 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @idlemode: SIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the slave idle mode bits in @v to be @idlemode for the @oh
302 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
303 * or 0 upon success.
304 */
305static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
306{
358f0e63
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307 u32 sidle_mask;
308 u8 sidle_shift;
309
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310 if (!oh->class->sysc ||
311 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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312 return -EINVAL;
313
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314 if (!oh->class->sysc->sysc_fields) {
315 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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316 return -EINVAL;
317 }
318
43b40992 319 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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320 sidle_mask = (0x3 << sidle_shift);
321
322 *v &= ~sidle_mask;
323 *v |= __ffs(idlemode) << sidle_shift;
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324
325 return 0;
326}
327
328/**
329 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
330 * @oh: struct omap_hwmod *
331 * @clockact: CLOCKACTIVITY field bits
332 * @v: pointer to register contents to modify
333 *
334 * Update the clockactivity mode bits in @v to be @clockact for the
335 * @oh hwmod. Used for additional powersaving on some modules. Does
336 * not write to the hardware. Returns -EINVAL upon error or 0 upon
337 * success.
338 */
339static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
340{
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341 u32 clkact_mask;
342 u8 clkact_shift;
343
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344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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346 return -EINVAL;
347
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348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
350 return -EINVAL;
351 }
352
43b40992 353 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
TG
354 clkact_mask = (0x3 << clkact_shift);
355
356 *v &= ~clkact_mask;
357 *v |= clockact << clkact_shift;
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358
359 return 0;
360}
361
362/**
363 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @v: pointer to register contents to modify
366 *
367 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
368 * error or 0 upon success.
369 */
370static int _set_softreset(struct omap_hwmod *oh, u32 *v)
371{
358f0e63
TG
372 u32 softrst_mask;
373
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374 if (!oh->class->sysc ||
375 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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376 return -EINVAL;
377
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378 if (!oh->class->sysc->sysc_fields) {
379 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
380 return -EINVAL;
381 }
382
43b40992 383 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
384
385 *v |= softrst_mask;
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386
387 return 0;
388}
389
726072e5
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390/**
391 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
392 * @oh: struct omap_hwmod *
393 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
394 * @v: pointer to register contents to modify
395 *
396 * Update the module autoidle bit in @v to be @autoidle for the @oh
397 * hwmod. The autoidle bit controls whether the module can gate
398 * internal clocks automatically when it isn't doing anything; the
399 * exact function of this bit varies on a per-module basis. This
400 * function does not write to the hardware. Returns -EINVAL upon
401 * error or 0 upon success.
402 */
403static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
404 u32 *v)
405{
358f0e63
TG
406 u32 autoidle_mask;
407 u8 autoidle_shift;
408
43b40992
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409 if (!oh->class->sysc ||
410 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
PW
411 return -EINVAL;
412
43b40992
PW
413 if (!oh->class->sysc->sysc_fields) {
414 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
415 return -EINVAL;
416 }
417
43b40992 418 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 419 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
420
421 *v &= ~autoidle_mask;
422 *v |= autoidle << autoidle_shift;
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423
424 return 0;
425}
426
eceec009
G
427/**
428 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
429 * @oh: struct omap_hwmod *
430 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
431 *
432 * Set or clear the I/O pad wakeup flag in the mux entries for the
433 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
434 * in memory. If the hwmod is currently idled, and the new idle
435 * values don't match the previous ones, this function will also
436 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
437 * currently idled, this function won't touch the hardware: the new
438 * mux settings are written to the SCM PADCTRL registers when the
439 * hwmod is idled. No return value.
440 */
441static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
442{
443 struct omap_device_pad *pad;
444 bool change = false;
445 u16 prev_idle;
446 int j;
447
448 if (!oh->mux || !oh->mux->enabled)
449 return;
450
451 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
452 pad = oh->mux->pads_dynamic[j];
453
454 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
455 continue;
456
457 prev_idle = pad->idle;
458
459 if (set_wake)
460 pad->idle |= OMAP_WAKEUP_EN;
461 else
462 pad->idle &= ~OMAP_WAKEUP_EN;
463
464 if (prev_idle != pad->idle)
465 change = true;
466 }
467
468 if (change && oh->_state == _HWMOD_STATE_IDLE)
469 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
470}
471
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472/**
473 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
474 * @oh: struct omap_hwmod *
475 *
476 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
477 * upon error or 0 upon success.
478 */
5a7ddcbd 479static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 480{
43b40992 481 if (!oh->class->sysc ||
86009eb3 482 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
483 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
484 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
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485 return -EINVAL;
486
43b40992
PW
487 if (!oh->class->sysc->sysc_fields) {
488 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
489 return -EINVAL;
490 }
491
1fe74113
BC
492 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
493 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 494
86009eb3
BC
495 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
496 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
497 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
498 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 499
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500 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
501
502 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
503
504 return 0;
505}
506
507/**
508 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
509 * @oh: struct omap_hwmod *
510 *
511 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
512 * upon error or 0 upon success.
513 */
5a7ddcbd 514static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 515{
43b40992 516 if (!oh->class->sysc ||
86009eb3 517 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
518 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
519 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
520 return -EINVAL;
521
43b40992
PW
522 if (!oh->class->sysc->sysc_fields) {
523 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
524 return -EINVAL;
525 }
526
1fe74113
BC
527 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
528 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 529
86009eb3
BC
530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 533 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 534
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PW
535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
536
537 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
538
539 return 0;
540}
541
542/**
543 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
544 * @oh: struct omap_hwmod *
545 *
546 * Prevent the hardware module @oh from entering idle while the
547 * hardare module initiator @init_oh is active. Useful when a module
548 * will be accessed by a particular initiator (e.g., if a module will
549 * be accessed by the IVA, there should be a sleepdep between the IVA
550 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
551 * mode. If the clockdomain is marked as not needing autodeps, return
552 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
553 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
554 */
555static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
556{
557 if (!oh->_clk)
558 return -EINVAL;
559
570b54c7
PW
560 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
561 return 0;
562
55ed9694 563 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
564}
565
566/**
567 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
568 * @oh: struct omap_hwmod *
569 *
570 * Allow the hardware module @oh to enter idle while the hardare
571 * module initiator @init_oh is active. Useful when a module will not
572 * be accessed by a particular initiator (e.g., if a module will not
573 * be accessed by the IVA, there should be no sleepdep between the IVA
574 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
575 * mode. If the clockdomain is marked as not needing autodeps, return
576 * 0 without doing anything. Returns -EINVAL upon error or passes
577 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
578 */
579static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
580{
581 if (!oh->_clk)
582 return -EINVAL;
583
570b54c7
PW
584 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
585 return 0;
586
55ed9694 587 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
588}
589
590/**
591 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
592 * @oh: struct omap_hwmod *
593 *
594 * Called from _init_clocks(). Populates the @oh _clk (main
595 * functional clock pointer) if a main_clk is present. Returns 0 on
596 * success or -EINVAL on error.
597 */
598static int _init_main_clk(struct omap_hwmod *oh)
599{
63c85238
PW
600 int ret = 0;
601
50ebdac2 602 if (!oh->main_clk)
63c85238
PW
603 return 0;
604
63403384 605 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 606 if (!oh->_clk) {
20383d82
BC
607 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
608 oh->name, oh->main_clk);
63403384 609 return -EINVAL;
dc75925d 610 }
63c85238 611
63403384
BC
612 if (!oh->_clk->clkdm)
613 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
614 oh->main_clk, oh->_clk->name);
81d7c6ff 615
63c85238
PW
616 return ret;
617}
618
619/**
887adeac 620 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
621 * @oh: struct omap_hwmod *
622 *
623 * Called from _init_clocks(). Populates the @oh OCP slave interface
624 * clock pointers. Returns 0 on success or -EINVAL on error.
625 */
626static int _init_interface_clks(struct omap_hwmod *oh)
627{
5d95dde7 628 struct omap_hwmod_ocp_if *os;
11cd4b94 629 struct list_head *p;
63c85238 630 struct clk *c;
5d95dde7 631 int i = 0;
63c85238
PW
632 int ret = 0;
633
11cd4b94 634 p = oh->slave_ports.next;
2221b5cd 635
5d95dde7 636 while (i < oh->slaves_cnt) {
11cd4b94 637 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 638 if (!os->clk)
63c85238
PW
639 continue;
640
50ebdac2 641 c = omap_clk_get_by_name(os->clk);
dc75925d 642 if (!c) {
20383d82
BC
643 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
644 oh->name, os->clk);
63c85238 645 ret = -EINVAL;
dc75925d 646 }
63c85238
PW
647 os->_clk = c;
648 }
649
650 return ret;
651}
652
653/**
654 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
655 * @oh: struct omap_hwmod *
656 *
657 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
658 * clock pointers. Returns 0 on success or -EINVAL on error.
659 */
660static int _init_opt_clks(struct omap_hwmod *oh)
661{
662 struct omap_hwmod_opt_clk *oc;
663 struct clk *c;
664 int i;
665 int ret = 0;
666
667 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 668 c = omap_clk_get_by_name(oc->clk);
dc75925d 669 if (!c) {
20383d82
BC
670 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
671 oh->name, oc->clk);
63c85238 672 ret = -EINVAL;
dc75925d 673 }
63c85238
PW
674 oc->_clk = c;
675 }
676
677 return ret;
678}
679
680/**
681 * _enable_clocks - enable hwmod main clock and interface clocks
682 * @oh: struct omap_hwmod *
683 *
684 * Enables all clocks necessary for register reads and writes to succeed
685 * on the hwmod @oh. Returns 0.
686 */
687static int _enable_clocks(struct omap_hwmod *oh)
688{
5d95dde7 689 struct omap_hwmod_ocp_if *os;
11cd4b94 690 struct list_head *p;
5d95dde7 691 int i = 0;
63c85238
PW
692
693 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
694
4d3ae5a9 695 if (oh->_clk)
63c85238
PW
696 clk_enable(oh->_clk);
697
11cd4b94 698 p = oh->slave_ports.next;
2221b5cd 699
5d95dde7 700 while (i < oh->slaves_cnt) {
11cd4b94 701 os = _fetch_next_ocp_if(&p, &i);
63c85238 702
5d95dde7
PW
703 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
704 clk_enable(os->_clk);
63c85238
PW
705 }
706
707 /* The opt clocks are controlled by the device driver. */
708
709 return 0;
710}
711
712/**
713 * _disable_clocks - disable hwmod main clock and interface clocks
714 * @oh: struct omap_hwmod *
715 *
716 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
717 */
718static int _disable_clocks(struct omap_hwmod *oh)
719{
5d95dde7 720 struct omap_hwmod_ocp_if *os;
11cd4b94 721 struct list_head *p;
5d95dde7 722 int i = 0;
63c85238
PW
723
724 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
725
4d3ae5a9 726 if (oh->_clk)
63c85238
PW
727 clk_disable(oh->_clk);
728
11cd4b94 729 p = oh->slave_ports.next;
2221b5cd 730
5d95dde7 731 while (i < oh->slaves_cnt) {
11cd4b94 732 os = _fetch_next_ocp_if(&p, &i);
63c85238 733
5d95dde7
PW
734 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
735 clk_disable(os->_clk);
63c85238
PW
736 }
737
738 /* The opt clocks are controlled by the device driver. */
739
740 return 0;
741}
742
96835af9
BC
743static void _enable_optional_clocks(struct omap_hwmod *oh)
744{
745 struct omap_hwmod_opt_clk *oc;
746 int i;
747
748 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
749
750 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
751 if (oc->_clk) {
752 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
753 oc->_clk->name);
754 clk_enable(oc->_clk);
755 }
756}
757
758static void _disable_optional_clocks(struct omap_hwmod *oh)
759{
760 struct omap_hwmod_opt_clk *oc;
761 int i;
762
763 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
764
765 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
766 if (oc->_clk) {
767 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
768 oc->_clk->name);
769 clk_disable(oc->_clk);
770 }
771}
772
45c38252
BC
773/**
774 * _enable_module - enable CLKCTRL modulemode on OMAP4
775 * @oh: struct omap_hwmod *
776 *
777 * Enables the PRCM module mode related to the hwmod @oh.
778 * No return value.
779 */
780static void _enable_module(struct omap_hwmod *oh)
781{
782 /* The module mode does not exist prior OMAP4 */
783 if (cpu_is_omap24xx() || cpu_is_omap34xx())
784 return;
785
786 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
787 return;
788
789 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
790 oh->name, oh->prcm.omap4.modulemode);
791
792 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
793 oh->clkdm->prcm_partition,
794 oh->clkdm->cm_inst,
795 oh->clkdm->clkdm_offs,
796 oh->prcm.omap4.clkctrl_offs);
797}
798
799/**
bfc141e3
BC
800 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
801 * @oh: struct omap_hwmod *
802 *
803 * Wait for a module @oh to enter slave idle. Returns 0 if the module
804 * does not have an IDLEST bit or if the module successfully enters
805 * slave idle; otherwise, pass along the return value of the
806 * appropriate *_cm*_wait_module_idle() function.
807 */
808static int _omap4_wait_target_disable(struct omap_hwmod *oh)
809{
810 if (!cpu_is_omap44xx())
811 return 0;
812
813 if (!oh)
814 return -EINVAL;
815
816 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
817 return 0;
818
819 if (oh->flags & HWMOD_NO_IDLEST)
820 return 0;
821
822 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
823 oh->clkdm->cm_inst,
824 oh->clkdm->clkdm_offs,
825 oh->prcm.omap4.clkctrl_offs);
826}
827
212738a4
PW
828/**
829 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
830 * @oh: struct omap_hwmod *oh
831 *
832 * Count and return the number of MPU IRQs associated with the hwmod
833 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
834 * NULL.
835 */
836static int _count_mpu_irqs(struct omap_hwmod *oh)
837{
838 struct omap_hwmod_irq_info *ohii;
839 int i = 0;
840
841 if (!oh || !oh->mpu_irqs)
842 return 0;
843
844 do {
845 ohii = &oh->mpu_irqs[i++];
846 } while (ohii->irq != -1);
847
cc1b0765 848 return i-1;
212738a4
PW
849}
850
bc614958
PW
851/**
852 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
853 * @oh: struct omap_hwmod *oh
854 *
855 * Count and return the number of SDMA request lines associated with
856 * the hwmod @oh. Used to allocate struct resource data. Returns 0
857 * if @oh is NULL.
858 */
859static int _count_sdma_reqs(struct omap_hwmod *oh)
860{
861 struct omap_hwmod_dma_info *ohdi;
862 int i = 0;
863
864 if (!oh || !oh->sdma_reqs)
865 return 0;
866
867 do {
868 ohdi = &oh->sdma_reqs[i++];
869 } while (ohdi->dma_req != -1);
870
cc1b0765 871 return i-1;
bc614958
PW
872}
873
78183f3f
PW
874/**
875 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
876 * @oh: struct omap_hwmod *oh
877 *
878 * Count and return the number of address space ranges associated with
879 * the hwmod @oh. Used to allocate struct resource data. Returns 0
880 * if @oh is NULL.
881 */
882static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
883{
884 struct omap_hwmod_addr_space *mem;
885 int i = 0;
886
887 if (!os || !os->addr)
888 return 0;
889
890 do {
891 mem = &os->addr[i++];
892 } while (mem->pa_start != mem->pa_end);
893
cc1b0765 894 return i-1;
78183f3f
PW
895}
896
5e8370f1
PW
897/**
898 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
899 * @oh: struct omap_hwmod * to operate on
900 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
901 * @irq: pointer to an unsigned int to store the MPU IRQ number to
902 *
903 * Retrieve a MPU hardware IRQ line number named by @name associated
904 * with the IP block pointed to by @oh. The IRQ number will be filled
905 * into the address pointed to by @dma. When @name is non-null, the
906 * IRQ line number associated with the named entry will be returned.
907 * If @name is null, the first matching entry will be returned. Data
908 * order is not meaningful in hwmod data, so callers are strongly
909 * encouraged to use a non-null @name whenever possible to avoid
910 * unpredictable effects if hwmod data is later added that causes data
911 * ordering to change. Returns 0 upon success or a negative error
912 * code upon error.
913 */
914static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
915 unsigned int *irq)
916{
917 int i;
918 bool found = false;
919
920 if (!oh->mpu_irqs)
921 return -ENOENT;
922
923 i = 0;
924 while (oh->mpu_irqs[i].irq != -1) {
925 if (name == oh->mpu_irqs[i].name ||
926 !strcmp(name, oh->mpu_irqs[i].name)) {
927 found = true;
928 break;
929 }
930 i++;
931 }
932
933 if (!found)
934 return -ENOENT;
935
936 *irq = oh->mpu_irqs[i].irq;
937
938 return 0;
939}
940
941/**
942 * _get_sdma_req_by_name - fetch SDMA request line ID by name
943 * @oh: struct omap_hwmod * to operate on
944 * @name: pointer to the name of the SDMA request line to fetch (optional)
945 * @dma: pointer to an unsigned int to store the request line ID to
946 *
947 * Retrieve an SDMA request line ID named by @name on the IP block
948 * pointed to by @oh. The ID will be filled into the address pointed
949 * to by @dma. When @name is non-null, the request line ID associated
950 * with the named entry will be returned. If @name is null, the first
951 * matching entry will be returned. Data order is not meaningful in
952 * hwmod data, so callers are strongly encouraged to use a non-null
953 * @name whenever possible to avoid unpredictable effects if hwmod
954 * data is later added that causes data ordering to change. Returns 0
955 * upon success or a negative error code upon error.
956 */
957static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
958 unsigned int *dma)
959{
960 int i;
961 bool found = false;
962
963 if (!oh->sdma_reqs)
964 return -ENOENT;
965
966 i = 0;
967 while (oh->sdma_reqs[i].dma_req != -1) {
968 if (name == oh->sdma_reqs[i].name ||
969 !strcmp(name, oh->sdma_reqs[i].name)) {
970 found = true;
971 break;
972 }
973 i++;
974 }
975
976 if (!found)
977 return -ENOENT;
978
979 *dma = oh->sdma_reqs[i].dma_req;
980
981 return 0;
982}
983
984/**
985 * _get_addr_space_by_name - fetch address space start & end by name
986 * @oh: struct omap_hwmod * to operate on
987 * @name: pointer to the name of the address space to fetch (optional)
988 * @pa_start: pointer to a u32 to store the starting address to
989 * @pa_end: pointer to a u32 to store the ending address to
990 *
991 * Retrieve address space start and end addresses for the IP block
992 * pointed to by @oh. The data will be filled into the addresses
993 * pointed to by @pa_start and @pa_end. When @name is non-null, the
994 * address space data associated with the named entry will be
995 * returned. If @name is null, the first matching entry will be
996 * returned. Data order is not meaningful in hwmod data, so callers
997 * are strongly encouraged to use a non-null @name whenever possible
998 * to avoid unpredictable effects if hwmod data is later added that
999 * causes data ordering to change. Returns 0 upon success or a
1000 * negative error code upon error.
1001 */
1002static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1003 u32 *pa_start, u32 *pa_end)
1004{
1005 int i, j;
1006 struct omap_hwmod_ocp_if *os;
2221b5cd 1007 struct list_head *p = NULL;
5e8370f1
PW
1008 bool found = false;
1009
11cd4b94 1010 p = oh->slave_ports.next;
2221b5cd 1011
5d95dde7
PW
1012 i = 0;
1013 while (i < oh->slaves_cnt) {
11cd4b94 1014 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1015
1016 if (!os->addr)
1017 return -ENOENT;
1018
1019 j = 0;
1020 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1021 if (name == os->addr[j].name ||
1022 !strcmp(name, os->addr[j].name)) {
1023 found = true;
1024 break;
1025 }
1026 j++;
1027 }
1028
1029 if (found)
1030 break;
1031 }
1032
1033 if (!found)
1034 return -ENOENT;
1035
1036 *pa_start = os->addr[j].pa_start;
1037 *pa_end = os->addr[j].pa_end;
1038
1039 return 0;
1040}
1041
63c85238 1042/**
24dbc213 1043 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1044 * @oh: struct omap_hwmod *
1045 *
24dbc213
PW
1046 * Determines the array index of the OCP slave port that the MPU uses
1047 * to address the device, and saves it into the struct omap_hwmod.
1048 * Intended to be called during hwmod registration only. No return
1049 * value.
63c85238 1050 */
24dbc213 1051static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1052{
24dbc213 1053 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1054 struct list_head *p;
5d95dde7 1055 int i = 0;
63c85238 1056
5d95dde7 1057 if (!oh)
24dbc213
PW
1058 return;
1059
1060 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1061
11cd4b94 1062 p = oh->slave_ports.next;
2221b5cd 1063
5d95dde7 1064 while (i < oh->slaves_cnt) {
11cd4b94 1065 os = _fetch_next_ocp_if(&p, &i);
63c85238 1066 if (os->user & OCP_USER_MPU) {
2221b5cd 1067 oh->_mpu_port = os;
24dbc213 1068 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1069 break;
1070 }
1071 }
1072
24dbc213 1073 return;
63c85238
PW
1074}
1075
2d6141ba
PW
1076/**
1077 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1078 * @oh: struct omap_hwmod *
1079 *
1080 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1081 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1082 * communicate with the IP block. This interface need not be directly
1083 * connected to the MPU (and almost certainly is not), but is directly
1084 * connected to the IP block represented by @oh. Returns a pointer
1085 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1086 * error or if there does not appear to be a path from the MPU to this
1087 * IP block.
1088 */
1089static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1090{
1091 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1092 return NULL;
1093
11cd4b94 1094 return oh->_mpu_port;
2d6141ba
PW
1095};
1096
63c85238 1097/**
c9aafd23 1098 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1099 * @oh: struct omap_hwmod *
1100 *
c9aafd23
PW
1101 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1102 * the register target MPU address space; or returns NULL upon error.
63c85238 1103 */
c9aafd23 1104static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1105{
1106 struct omap_hwmod_ocp_if *os;
1107 struct omap_hwmod_addr_space *mem;
c9aafd23 1108 int found = 0, i = 0;
63c85238 1109
2d6141ba 1110 os = _find_mpu_rt_port(oh);
24dbc213 1111 if (!os || !os->addr)
78183f3f
PW
1112 return NULL;
1113
1114 do {
1115 mem = &os->addr[i++];
1116 if (mem->flags & ADDR_TYPE_RT)
63c85238 1117 found = 1;
78183f3f 1118 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1119
c9aafd23 1120 return (found) ? mem : NULL;
63c85238
PW
1121}
1122
1123/**
74ff3a68 1124 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1125 * @oh: struct omap_hwmod *
1126 *
1127 * If module is marked as SWSUP_SIDLE, force the module out of slave
1128 * idle; otherwise, configure it for smart-idle. If module is marked
1129 * as SWSUP_MSUSPEND, force the module out of master standby;
1130 * otherwise, configure it for smart-standby. No return value.
1131 */
74ff3a68 1132static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1133{
43b40992 1134 u8 idlemode, sf;
63c85238
PW
1135 u32 v;
1136
43b40992 1137 if (!oh->class->sysc)
63c85238
PW
1138 return;
1139
1140 v = oh->_sysc_cache;
43b40992 1141 sf = oh->class->sysc->sysc_flags;
63c85238 1142
43b40992 1143 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1144 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1145 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1146 _set_slave_idlemode(oh, idlemode, &v);
1147 }
1148
43b40992 1149 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1150 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1151 idlemode = HWMOD_IDLEMODE_NO;
1152 } else {
1153 if (sf & SYSC_HAS_ENAWAKEUP)
1154 _enable_wakeup(oh, &v);
1155 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1156 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1157 else
1158 idlemode = HWMOD_IDLEMODE_SMART;
1159 }
63c85238
PW
1160 _set_master_standbymode(oh, idlemode, &v);
1161 }
1162
a16b1f7f
PW
1163 /*
1164 * XXX The clock framework should handle this, by
1165 * calling into this code. But this must wait until the
1166 * clock structures are tagged with omap_hwmod entries
1167 */
43b40992
PW
1168 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1169 (sf & SYSC_HAS_CLOCKACTIVITY))
1170 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1171
9980ce53
RN
1172 /* If slave is in SMARTIDLE, also enable wakeup */
1173 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1174 _enable_wakeup(oh, &v);
1175
1176 _write_sysconfig(v, oh);
78f26e87
HH
1177
1178 /*
1179 * Set the autoidle bit only after setting the smartidle bit
1180 * Setting this will not have any impact on the other modules.
1181 */
1182 if (sf & SYSC_HAS_AUTOIDLE) {
1183 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1184 0 : 1;
1185 _set_module_autoidle(oh, idlemode, &v);
1186 _write_sysconfig(v, oh);
1187 }
63c85238
PW
1188}
1189
1190/**
74ff3a68 1191 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1192 * @oh: struct omap_hwmod *
1193 *
1194 * If module is marked as SWSUP_SIDLE, force the module into slave
1195 * idle; otherwise, configure it for smart-idle. If module is marked
1196 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1197 * configure it for smart-standby. No return value.
1198 */
74ff3a68 1199static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1200{
43b40992 1201 u8 idlemode, sf;
63c85238
PW
1202 u32 v;
1203
43b40992 1204 if (!oh->class->sysc)
63c85238
PW
1205 return;
1206
1207 v = oh->_sysc_cache;
43b40992 1208 sf = oh->class->sysc->sysc_flags;
63c85238 1209
43b40992 1210 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1211 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1212 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1213 _set_slave_idlemode(oh, idlemode, &v);
1214 }
1215
43b40992 1216 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1217 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1218 idlemode = HWMOD_IDLEMODE_FORCE;
1219 } else {
1220 if (sf & SYSC_HAS_ENAWAKEUP)
1221 _enable_wakeup(oh, &v);
1222 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1223 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1224 else
1225 idlemode = HWMOD_IDLEMODE_SMART;
1226 }
63c85238
PW
1227 _set_master_standbymode(oh, idlemode, &v);
1228 }
1229
86009eb3
BC
1230 /* If slave is in SMARTIDLE, also enable wakeup */
1231 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1232 _enable_wakeup(oh, &v);
1233
63c85238
PW
1234 _write_sysconfig(v, oh);
1235}
1236
1237/**
74ff3a68 1238 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1239 * @oh: struct omap_hwmod *
1240 *
1241 * Force the module into slave idle and master suspend. No return
1242 * value.
1243 */
74ff3a68 1244static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1245{
1246 u32 v;
43b40992 1247 u8 sf;
63c85238 1248
43b40992 1249 if (!oh->class->sysc)
63c85238
PW
1250 return;
1251
1252 v = oh->_sysc_cache;
43b40992 1253 sf = oh->class->sysc->sysc_flags;
63c85238 1254
43b40992 1255 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1256 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1257
43b40992 1258 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1259 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1260
43b40992 1261 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1262 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1263
1264 _write_sysconfig(v, oh);
1265}
1266
1267/**
1268 * _lookup - find an omap_hwmod by name
1269 * @name: find an omap_hwmod by name
1270 *
1271 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1272 */
1273static struct omap_hwmod *_lookup(const char *name)
1274{
1275 struct omap_hwmod *oh, *temp_oh;
1276
1277 oh = NULL;
1278
1279 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1280 if (!strcmp(name, temp_oh->name)) {
1281 oh = temp_oh;
1282 break;
1283 }
1284 }
1285
1286 return oh;
1287}
6ae76997
BC
1288/**
1289 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1290 * @oh: struct omap_hwmod *
1291 *
1292 * Convert a clockdomain name stored in a struct omap_hwmod into a
1293 * clockdomain pointer, and save it into the struct omap_hwmod.
1294 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1295 */
1296static int _init_clkdm(struct omap_hwmod *oh)
1297{
1298 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1299 return 0;
1300
1301 if (!oh->clkdm_name) {
1302 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1303 return -EINVAL;
1304 }
1305
1306 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1307 if (!oh->clkdm) {
1308 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1309 oh->name, oh->clkdm_name);
1310 return -EINVAL;
1311 }
1312
1313 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1314 oh->name, oh->clkdm_name);
1315
1316 return 0;
1317}
63c85238
PW
1318
1319/**
6ae76997
BC
1320 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1321 * well the clockdomain.
63c85238 1322 * @oh: struct omap_hwmod *
97d60162 1323 * @data: not used; pass NULL
63c85238 1324 *
a2debdbd 1325 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1326 * Resolves all clock names embedded in the hwmod. Returns 0 on
1327 * success, or a negative error code on failure.
63c85238 1328 */
97d60162 1329static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1330{
1331 int ret = 0;
1332
48d54f3f
PW
1333 if (oh->_state != _HWMOD_STATE_REGISTERED)
1334 return 0;
63c85238
PW
1335
1336 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1337
1338 ret |= _init_main_clk(oh);
1339 ret |= _init_interface_clks(oh);
1340 ret |= _init_opt_clks(oh);
6ae76997 1341 ret |= _init_clkdm(oh);
63c85238 1342
f5c1f84b
BC
1343 if (!ret)
1344 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1345 else
1346 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1347
09c35f2f 1348 return ret;
63c85238
PW
1349}
1350
1351/**
1352 * _wait_target_ready - wait for a module to leave slave idle
1353 * @oh: struct omap_hwmod *
1354 *
1355 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1356 * does not have an IDLEST bit or if the module successfully leaves
1357 * slave idle; otherwise, pass along the return value of the
d0f0631d 1358 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1359 */
1360static int _wait_target_ready(struct omap_hwmod *oh)
1361{
1362 struct omap_hwmod_ocp_if *os;
1363 int ret;
1364
1365 if (!oh)
1366 return -EINVAL;
1367
2d6141ba 1368 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1369 return 0;
1370
2d6141ba
PW
1371 os = _find_mpu_rt_port(oh);
1372 if (!os)
63c85238
PW
1373 return 0;
1374
1375 /* XXX check module SIDLEMODE */
1376
1377 /* XXX check clock enable states */
1378
1379 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1380 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1381 oh->prcm.omap2.idlest_reg_id,
1382 oh->prcm.omap2.idlest_idle_bit);
63c85238 1383 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1384 if (!oh->clkdm)
1385 return -EINVAL;
1386
1387 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1388 oh->clkdm->cm_inst,
1389 oh->clkdm->clkdm_offs,
1390 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1391 } else {
1392 BUG();
1393 };
1394
1395 return ret;
1396}
1397
5365efbe 1398/**
cc1226e7 1399 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1400 * @oh: struct omap_hwmod *
1401 * @name: name of the reset line in the context of this hwmod
cc1226e7 1402 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1403 *
1404 * Return the bit position of the reset line that match the
1405 * input name. Return -ENOENT if not found.
1406 */
cc1226e7 1407static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1408 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1409{
1410 int i;
1411
1412 for (i = 0; i < oh->rst_lines_cnt; i++) {
1413 const char *rst_line = oh->rst_lines[i].name;
1414 if (!strcmp(rst_line, name)) {
cc1226e7 1415 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1416 ohri->st_shift = oh->rst_lines[i].st_shift;
1417 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1418 oh->name, __func__, rst_line, ohri->rst_shift,
1419 ohri->st_shift);
5365efbe 1420
cc1226e7 1421 return 0;
5365efbe
BC
1422 }
1423 }
1424
1425 return -ENOENT;
1426}
1427
1428/**
1429 * _assert_hardreset - assert the HW reset line of submodules
1430 * contained in the hwmod module.
1431 * @oh: struct omap_hwmod *
1432 * @name: name of the reset line to lookup and assert
1433 *
1434 * Some IP like dsp, ipu or iva contain processor that require
1435 * an HW reset line to be assert / deassert in order to enable fully
1436 * the IP.
1437 */
1438static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1439{
cc1226e7 1440 struct omap_hwmod_rst_info ohri;
1441 u8 ret;
5365efbe
BC
1442
1443 if (!oh)
1444 return -EINVAL;
1445
cc1226e7 1446 ret = _lookup_hardreset(oh, name, &ohri);
1447 if (IS_ERR_VALUE(ret))
1448 return ret;
5365efbe
BC
1449
1450 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1451 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1452 ohri.rst_shift);
5365efbe 1453 else if (cpu_is_omap44xx())
eaac329d
BC
1454 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1455 oh->clkdm->pwrdm.ptr->prcm_partition,
1456 oh->clkdm->pwrdm.ptr->prcm_offs,
1457 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1458 else
1459 return -EINVAL;
1460}
1461
1462/**
1463 * _deassert_hardreset - deassert the HW reset line of submodules contained
1464 * in the hwmod module.
1465 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line to look up and deassert
1467 *
1468 * Some IP like dsp, ipu or iva contain processor that require
1469 * an HW reset line to be assert / deassert in order to enable fully
1470 * the IP.
1471 */
1472static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1473{
cc1226e7 1474 struct omap_hwmod_rst_info ohri;
1475 int ret;
5365efbe
BC
1476
1477 if (!oh)
1478 return -EINVAL;
1479
cc1226e7 1480 ret = _lookup_hardreset(oh, name, &ohri);
1481 if (IS_ERR_VALUE(ret))
1482 return ret;
5365efbe 1483
cc1226e7 1484 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1485 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1486 ohri.rst_shift,
1487 ohri.st_shift);
1488 } else if (cpu_is_omap44xx()) {
1489 if (ohri.st_shift)
1490 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1491 oh->name, name);
eaac329d
BC
1492 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1493 oh->clkdm->pwrdm.ptr->prcm_partition,
1494 oh->clkdm->pwrdm.ptr->prcm_offs,
1495 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1496 } else {
5365efbe 1497 return -EINVAL;
cc1226e7 1498 }
5365efbe 1499
cc1226e7 1500 if (ret == -EBUSY)
5365efbe
BC
1501 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1502
cc1226e7 1503 return ret;
5365efbe
BC
1504}
1505
1506/**
1507 * _read_hardreset - read the HW reset line state of submodules
1508 * contained in the hwmod module
1509 * @oh: struct omap_hwmod *
1510 * @name: name of the reset line to look up and read
1511 *
1512 * Return the state of the reset line.
1513 */
1514static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1515{
cc1226e7 1516 struct omap_hwmod_rst_info ohri;
1517 u8 ret;
5365efbe
BC
1518
1519 if (!oh)
1520 return -EINVAL;
1521
cc1226e7 1522 ret = _lookup_hardreset(oh, name, &ohri);
1523 if (IS_ERR_VALUE(ret))
1524 return ret;
5365efbe
BC
1525
1526 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1527 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1528 ohri.st_shift);
5365efbe 1529 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1530 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1531 oh->clkdm->pwrdm.ptr->prcm_partition,
1532 oh->clkdm->pwrdm.ptr->prcm_offs,
1533 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1534 } else {
1535 return -EINVAL;
1536 }
1537}
1538
747834ab
PW
1539/**
1540 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1541 * @oh: struct omap_hwmod *
1542 *
1543 * If any hardreset line associated with @oh is asserted, then return true.
1544 * Otherwise, if @oh has no hardreset lines associated with it, or if
1545 * no hardreset lines associated with @oh are asserted, then return false.
1546 * This function is used to avoid executing some parts of the IP block
1547 * enable/disable sequence if a hardreset line is set.
1548 */
1549static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1550{
1551 int i;
1552
1553 if (oh->rst_lines_cnt == 0)
1554 return false;
1555
1556 for (i = 0; i < oh->rst_lines_cnt; i++)
1557 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1558 return true;
1559
1560 return false;
1561}
1562
1563/**
1564 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1565 * @oh: struct omap_hwmod *
1566 *
1567 * Disable the PRCM module mode related to the hwmod @oh.
1568 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1569 */
1570static int _omap4_disable_module(struct omap_hwmod *oh)
1571{
1572 int v;
1573
1574 /* The module mode does not exist prior OMAP4 */
1575 if (!cpu_is_omap44xx())
1576 return -EINVAL;
1577
1578 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1579 return -EINVAL;
1580
1581 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1582
1583 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1584 oh->clkdm->cm_inst,
1585 oh->clkdm->clkdm_offs,
1586 oh->prcm.omap4.clkctrl_offs);
1587
1588 if (_are_any_hardreset_lines_asserted(oh))
1589 return 0;
1590
1591 v = _omap4_wait_target_disable(oh);
1592 if (v)
1593 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1594 oh->name);
1595
1596 return 0;
1597}
1598
63c85238 1599/**
bd36179e 1600 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1601 * @oh: struct omap_hwmod *
1602 *
1603 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1604 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1605 * reset this way, -EINVAL if the hwmod is in the wrong state,
1606 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1607 *
1608 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1609 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1610 * use the SYSCONFIG softreset bit to provide the status.
1611 *
bd36179e
PW
1612 * Note that some IP like McBSP do have reset control but don't have
1613 * reset status.
63c85238 1614 */
bd36179e 1615static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1616{
387ca5bf 1617 u32 v, softrst_mask;
6f8b7ff5 1618 int c = 0;
96835af9 1619 int ret = 0;
63c85238 1620
43b40992 1621 if (!oh->class->sysc ||
2cb06814 1622 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1623 return -ENOENT;
63c85238
PW
1624
1625 /* clocks must be on for this operation */
1626 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1627 pr_warning("omap_hwmod: %s: reset can only be entered from "
1628 "enabled state\n", oh->name);
63c85238
PW
1629 return -EINVAL;
1630 }
1631
96835af9
BC
1632 /* For some modules, all optionnal clocks need to be enabled as well */
1633 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1634 _enable_optional_clocks(oh);
1635
bd36179e 1636 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1637
1638 v = oh->_sysc_cache;
96835af9
BC
1639 ret = _set_softreset(oh, &v);
1640 if (ret)
1641 goto dis_opt_clks;
63c85238
PW
1642 _write_sysconfig(v, oh);
1643
d99de7f5
FGL
1644 if (oh->class->sysc->srst_udelay)
1645 udelay(oh->class->sysc->srst_udelay);
1646
2cb06814 1647 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1648 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1649 oh->class->sysc->syss_offs)
1650 & SYSS_RESETDONE_MASK),
1651 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1652 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1653 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1654 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1655 oh->class->sysc->sysc_offs)
387ca5bf 1656 & softrst_mask),
2cb06814 1657 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1658 }
63c85238 1659
5365efbe 1660 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1661 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1662 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1663 else
5365efbe 1664 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1665
1666 /*
1667 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1668 * _wait_target_ready() or _reset()
1669 */
1670
96835af9
BC
1671 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1672
1673dis_opt_clks:
1674 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1675 _disable_optional_clocks(oh);
1676
1677 return ret;
63c85238
PW
1678}
1679
bd36179e
PW
1680/**
1681 * _reset - reset an omap_hwmod
1682 * @oh: struct omap_hwmod *
1683 *
30e105c0
PW
1684 * Resets an omap_hwmod @oh. If the module has a custom reset
1685 * function pointer defined, then call it to reset the IP block, and
1686 * pass along its return value to the caller. Otherwise, if the IP
1687 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1688 * associated with it, call a function to reset the IP block via that
1689 * method, and pass along the return value to the caller. Finally, if
1690 * the IP block has some hardreset lines associated with it, assert
1691 * all of those, but do _not_ deassert them. (This is because driver
1692 * authors have expressed an apparent requirement to control the
1693 * deassertion of the hardreset lines themselves.)
1694 *
1695 * The default software reset mechanism for most OMAP IP blocks is
1696 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1697 * hwmods cannot be reset via this method. Some are not targets and
1698 * therefore have no OCP header registers to access. Others (like the
1699 * IVA) have idiosyncratic reset sequences. So for these relatively
1700 * rare cases, custom reset code can be supplied in the struct
1701 * omap_hwmod_class .reset function pointer. Passes along the return
1702 * value from either _ocp_softreset() or the custom reset function -
1703 * these must return -EINVAL if the hwmod cannot be reset this way or
1704 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1705 * not reset in time, or 0 upon success.
bd36179e
PW
1706 */
1707static int _reset(struct omap_hwmod *oh)
1708{
30e105c0 1709 int i, r;
bd36179e
PW
1710
1711 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1712
30e105c0
PW
1713 if (oh->class->reset) {
1714 r = oh->class->reset(oh);
1715 } else {
1716 if (oh->rst_lines_cnt > 0) {
1717 for (i = 0; i < oh->rst_lines_cnt; i++)
1718 _assert_hardreset(oh, oh->rst_lines[i].name);
1719 return 0;
1720 } else {
1721 r = _ocp_softreset(oh);
1722 if (r == -ENOENT)
1723 r = 0;
1724 }
1725 }
1726
9c8b0ec7 1727 /*
30e105c0
PW
1728 * OCP_SYSCONFIG bits need to be reprogrammed after a
1729 * softreset. The _enable() function should be split to avoid
1730 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1731 */
2800852a
RN
1732 if (oh->class->sysc) {
1733 _update_sysc_cache(oh);
1734 _enable_sysc(oh);
1735 }
1736
30e105c0 1737 return r;
bd36179e
PW
1738}
1739
63c85238 1740/**
dc6d1cda 1741 * _enable - enable an omap_hwmod
63c85238
PW
1742 * @oh: struct omap_hwmod *
1743 *
1744 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1745 * register target. Returns -EINVAL if the hwmod is in the wrong
1746 * state or passes along the return value of _wait_target_ready().
63c85238 1747 */
dc6d1cda 1748static int _enable(struct omap_hwmod *oh)
63c85238 1749{
747834ab 1750 int r;
665d0013 1751 int hwsup = 0;
63c85238 1752
34617e2a
BC
1753 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1754
aacf0941 1755 /*
64813c3f
PW
1756 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1757 * state at init. Now that someone is really trying to enable
1758 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1759 */
1760 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1761 /*
1762 * If the caller has mux data populated, do the mux'ing
1763 * which wouldn't have been done as part of the _enable()
1764 * done during setup.
1765 */
1766 if (oh->mux)
1767 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1768
1769 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1770 return 0;
1771 }
1772
63c85238
PW
1773 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1774 oh->_state != _HWMOD_STATE_IDLE &&
1775 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1776 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1777 oh->name);
63c85238
PW
1778 return -EINVAL;
1779 }
1780
31f62866 1781 /*
747834ab
PW
1782 * If an IP block contains HW reset lines and any of them are
1783 * asserted, we let integration code associated with that
1784 * block handle the enable. We've received very little
1785 * information on what those driver authors need, and until
1786 * detailed information is provided and the driver code is
1787 * posted to the public lists, this is probably the best we
1788 * can do.
31f62866 1789 */
747834ab
PW
1790 if (_are_any_hardreset_lines_asserted(oh))
1791 return 0;
63c85238 1792
665d0013
RN
1793 /* Mux pins for device runtime if populated */
1794 if (oh->mux && (!oh->mux->enabled ||
1795 ((oh->_state == _HWMOD_STATE_IDLE) &&
1796 oh->mux->pads_dynamic)))
1797 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1798
1799 _add_initiator_dep(oh, mpu_oh);
34617e2a 1800
665d0013
RN
1801 if (oh->clkdm) {
1802 /*
1803 * A clockdomain must be in SW_SUP before enabling
1804 * completely the module. The clockdomain can be set
1805 * in HW_AUTO only when the module become ready.
1806 */
1807 hwsup = clkdm_in_hwsup(oh->clkdm);
1808 r = clkdm_hwmod_enable(oh->clkdm, oh);
1809 if (r) {
1810 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1811 oh->name, oh->clkdm->name, r);
1812 return r;
1813 }
34617e2a 1814 }
665d0013
RN
1815
1816 _enable_clocks(oh);
45c38252 1817 _enable_module(oh);
34617e2a 1818
665d0013
RN
1819 r = _wait_target_ready(oh);
1820 if (!r) {
1821 /*
1822 * Set the clockdomain to HW_AUTO only if the target is ready,
1823 * assuming that the previous state was HW_AUTO
1824 */
1825 if (oh->clkdm && hwsup)
1826 clkdm_allow_idle(oh->clkdm);
1827
1828 oh->_state = _HWMOD_STATE_ENABLED;
1829
1830 /* Access the sysconfig only if the target is ready */
1831 if (oh->class->sysc) {
1832 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1833 _update_sysc_cache(oh);
1834 _enable_sysc(oh);
1835 }
1836 } else {
1837 _disable_clocks(oh);
1838 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1839 oh->name, r);
34617e2a 1840
665d0013
RN
1841 if (oh->clkdm)
1842 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1843 }
1844
63c85238
PW
1845 return r;
1846}
1847
1848/**
dc6d1cda 1849 * _idle - idle an omap_hwmod
63c85238
PW
1850 * @oh: struct omap_hwmod *
1851 *
1852 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1853 * no further work. Returns -EINVAL if the hwmod is in the wrong
1854 * state or returns 0.
63c85238 1855 */
dc6d1cda 1856static int _idle(struct omap_hwmod *oh)
63c85238 1857{
34617e2a
BC
1858 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1859
63c85238 1860 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1861 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1862 oh->name);
63c85238
PW
1863 return -EINVAL;
1864 }
1865
747834ab
PW
1866 if (_are_any_hardreset_lines_asserted(oh))
1867 return 0;
1868
43b40992 1869 if (oh->class->sysc)
74ff3a68 1870 _idle_sysc(oh);
63c85238 1871 _del_initiator_dep(oh, mpu_oh);
bfc141e3
BC
1872
1873 _omap4_disable_module(oh);
1874
45c38252
BC
1875 /*
1876 * The module must be in idle mode before disabling any parents
1877 * clocks. Otherwise, the parent clock might be disabled before
1878 * the module transition is done, and thus will prevent the
1879 * transition to complete properly.
1880 */
1881 _disable_clocks(oh);
665d0013
RN
1882 if (oh->clkdm)
1883 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1884
8d9af88f 1885 /* Mux pins for device idle if populated */
029268e4 1886 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1887 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1888
63c85238
PW
1889 oh->_state = _HWMOD_STATE_IDLE;
1890
1891 return 0;
1892}
1893
9599217a
KVA
1894/**
1895 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1896 * @oh: struct omap_hwmod *
1897 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1898 *
1899 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1900 * local copy. Intended to be used by drivers that require
1901 * direct manipulation of the AUTOIDLE bits.
1902 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1903 * along the return value from _set_module_autoidle().
1904 *
1905 * Any users of this function should be scrutinized carefully.
1906 */
1907int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1908{
1909 u32 v;
1910 int retval = 0;
1911 unsigned long flags;
1912
1913 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1914 return -EINVAL;
1915
1916 spin_lock_irqsave(&oh->_lock, flags);
1917
1918 v = oh->_sysc_cache;
1919
1920 retval = _set_module_autoidle(oh, autoidle, &v);
1921
1922 if (!retval)
1923 _write_sysconfig(v, oh);
1924
1925 spin_unlock_irqrestore(&oh->_lock, flags);
1926
1927 return retval;
1928}
1929
63c85238
PW
1930/**
1931 * _shutdown - shutdown an omap_hwmod
1932 * @oh: struct omap_hwmod *
1933 *
1934 * Shut down an omap_hwmod @oh. This should be called when the driver
1935 * used for the hwmod is removed or unloaded or if the driver is not
1936 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1937 * state or returns 0.
1938 */
1939static int _shutdown(struct omap_hwmod *oh)
1940{
9c8b0ec7 1941 int ret, i;
e4dc8f50
PW
1942 u8 prev_state;
1943
63c85238
PW
1944 if (oh->_state != _HWMOD_STATE_IDLE &&
1945 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1946 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1947 oh->name);
63c85238
PW
1948 return -EINVAL;
1949 }
1950
747834ab
PW
1951 if (_are_any_hardreset_lines_asserted(oh))
1952 return 0;
1953
63c85238
PW
1954 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1955
e4dc8f50
PW
1956 if (oh->class->pre_shutdown) {
1957 prev_state = oh->_state;
1958 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1959 _enable(oh);
e4dc8f50
PW
1960 ret = oh->class->pre_shutdown(oh);
1961 if (ret) {
1962 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1963 _idle(oh);
e4dc8f50
PW
1964 return ret;
1965 }
1966 }
1967
6481c73c
MV
1968 if (oh->class->sysc) {
1969 if (oh->_state == _HWMOD_STATE_IDLE)
1970 _enable(oh);
74ff3a68 1971 _shutdown_sysc(oh);
6481c73c 1972 }
5365efbe 1973
3827f949
BC
1974 /* clocks and deps are already disabled in idle */
1975 if (oh->_state == _HWMOD_STATE_ENABLED) {
1976 _del_initiator_dep(oh, mpu_oh);
1977 /* XXX what about the other system initiators here? dma, dsp */
bfc141e3 1978 _omap4_disable_module(oh);
45c38252 1979 _disable_clocks(oh);
665d0013
RN
1980 if (oh->clkdm)
1981 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 1982 }
63c85238
PW
1983 /* XXX Should this code also force-disable the optional clocks? */
1984
9c8b0ec7
PW
1985 for (i = 0; i < oh->rst_lines_cnt; i++)
1986 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 1987
8d9af88f
TL
1988 /* Mux pins to safe mode or use populated off mode values */
1989 if (oh->mux)
1990 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1991
1992 oh->_state = _HWMOD_STATE_DISABLED;
1993
1994 return 0;
1995}
1996
381d033a
PW
1997/**
1998 * _init_mpu_rt_base - populate the virtual address for a hwmod
1999 * @oh: struct omap_hwmod * to locate the virtual address
2000 *
2001 * Cache the virtual address used by the MPU to access this IP block's
2002 * registers. This address is needed early so the OCP registers that
2003 * are part of the device's address space can be ioremapped properly.
2004 * No return value.
2005 */
2006static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2007{
c9aafd23
PW
2008 struct omap_hwmod_addr_space *mem;
2009 void __iomem *va_start;
2010
2011 if (!oh)
2012 return;
2013
2221b5cd
PW
2014 _save_mpu_port_index(oh);
2015
381d033a
PW
2016 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2017 return;
2018
c9aafd23
PW
2019 mem = _find_mpu_rt_addr_space(oh);
2020 if (!mem) {
2021 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2022 oh->name);
2023 return;
2024 }
2025
2026 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2027 if (!va_start) {
2028 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2029 return;
2030 }
2031
2032 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2033 oh->name, va_start);
2034
2035 oh->_mpu_rt_va = va_start;
381d033a
PW
2036}
2037
2038/**
2039 * _init - initialize internal data for the hwmod @oh
2040 * @oh: struct omap_hwmod *
2041 * @n: (unused)
2042 *
2043 * Look up the clocks and the address space used by the MPU to access
2044 * registers belonging to the hwmod @oh. @oh must already be
2045 * registered at this point. This is the first of two phases for
2046 * hwmod initialization. Code called here does not touch any hardware
2047 * registers, it simply prepares internal data structures. Returns 0
2048 * upon success or if the hwmod isn't registered, or -EINVAL upon
2049 * failure.
2050 */
2051static int __init _init(struct omap_hwmod *oh, void *data)
2052{
2053 int r;
2054
2055 if (oh->_state != _HWMOD_STATE_REGISTERED)
2056 return 0;
2057
2058 _init_mpu_rt_base(oh, NULL);
2059
2060 r = _init_clocks(oh, NULL);
2061 if (IS_ERR_VALUE(r)) {
2062 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2063 return -EINVAL;
2064 }
2065
2066 oh->_state = _HWMOD_STATE_INITIALIZED;
2067
2068 return 0;
2069}
2070
63c85238 2071/**
64813c3f 2072 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2073 * @oh: struct omap_hwmod *
2074 *
64813c3f
PW
2075 * Set up the module's interface clocks. XXX This function is still mostly
2076 * a stub; implementing this properly requires iclk autoidle usecounting in
2077 * the clock code. No return value.
63c85238 2078 */
64813c3f 2079static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2080{
5d95dde7 2081 struct omap_hwmod_ocp_if *os;
11cd4b94 2082 struct list_head *p;
5d95dde7 2083 int i = 0;
381d033a 2084 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2085 return;
48d54f3f 2086
11cd4b94 2087 p = oh->slave_ports.next;
63c85238 2088
5d95dde7 2089 while (i < oh->slaves_cnt) {
11cd4b94 2090 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2091 if (!os->_clk)
64813c3f 2092 continue;
63c85238 2093
64813c3f
PW
2094 if (os->flags & OCPIF_SWSUP_IDLE) {
2095 /* XXX omap_iclk_deny_idle(c); */
2096 } else {
2097 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2098 clk_enable(os->_clk);
63c85238
PW
2099 }
2100 }
2101
64813c3f
PW
2102 return;
2103}
2104
2105/**
2106 * _setup_reset - reset an IP block during the setup process
2107 * @oh: struct omap_hwmod *
2108 *
2109 * Reset the IP block corresponding to the hwmod @oh during the setup
2110 * process. The IP block is first enabled so it can be successfully
2111 * reset. Returns 0 upon success or a negative error code upon
2112 * failure.
2113 */
2114static int __init _setup_reset(struct omap_hwmod *oh)
2115{
2116 int r;
2117
2118 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2119 return -EINVAL;
63c85238 2120
747834ab
PW
2121 if (oh->rst_lines_cnt == 0) {
2122 r = _enable(oh);
2123 if (r) {
2124 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2125 oh->name, oh->_state);
2126 return -EINVAL;
2127 }
9a23dfe1 2128 }
63c85238 2129
2800852a 2130 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2131 r = _reset(oh);
2132
2133 return r;
2134}
2135
2136/**
2137 * _setup_postsetup - transition to the appropriate state after _setup
2138 * @oh: struct omap_hwmod *
2139 *
2140 * Place an IP block represented by @oh into a "post-setup" state --
2141 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2142 * this function is called at the end of _setup().) The postsetup
2143 * state for an IP block can be changed by calling
2144 * omap_hwmod_enter_postsetup_state() early in the boot process,
2145 * before one of the omap_hwmod_setup*() functions are called for the
2146 * IP block.
2147 *
2148 * The IP block stays in this state until a PM runtime-based driver is
2149 * loaded for that IP block. A post-setup state of IDLE is
2150 * appropriate for almost all IP blocks with runtime PM-enabled
2151 * drivers, since those drivers are able to enable the IP block. A
2152 * post-setup state of ENABLED is appropriate for kernels with PM
2153 * runtime disabled. The DISABLED state is appropriate for unusual IP
2154 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2155 * included, since the WDTIMER starts running on reset and will reset
2156 * the MPU if left active.
2157 *
2158 * This post-setup mechanism is deprecated. Once all of the OMAP
2159 * drivers have been converted to use PM runtime, and all of the IP
2160 * block data and interconnect data is available to the hwmod code, it
2161 * should be possible to replace this mechanism with a "lazy reset"
2162 * arrangement. In a "lazy reset" setup, each IP block is enabled
2163 * when the driver first probes, then all remaining IP blocks without
2164 * drivers are either shut down or enabled after the drivers have
2165 * loaded. However, this cannot take place until the above
2166 * preconditions have been met, since otherwise the late reset code
2167 * has no way of knowing which IP blocks are in use by drivers, and
2168 * which ones are unused.
2169 *
2170 * No return value.
2171 */
2172static void __init _setup_postsetup(struct omap_hwmod *oh)
2173{
2174 u8 postsetup_state;
2175
2176 if (oh->rst_lines_cnt > 0)
2177 return;
76e5589e 2178
2092e5cc
PW
2179 postsetup_state = oh->_postsetup_state;
2180 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2181 postsetup_state = _HWMOD_STATE_ENABLED;
2182
2183 /*
2184 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2185 * it should be set by the core code as a runtime flag during startup
2186 */
2187 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2188 (postsetup_state == _HWMOD_STATE_IDLE)) {
2189 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2190 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2191 }
2092e5cc
PW
2192
2193 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2194 _idle(oh);
2092e5cc
PW
2195 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2196 _shutdown(oh);
2197 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2198 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2199 oh->name, postsetup_state);
63c85238 2200
64813c3f
PW
2201 return;
2202}
2203
2204/**
2205 * _setup - prepare IP block hardware for use
2206 * @oh: struct omap_hwmod *
2207 * @n: (unused, pass NULL)
2208 *
2209 * Configure the IP block represented by @oh. This may include
2210 * enabling the IP block, resetting it, and placing it into a
2211 * post-setup state, depending on the type of IP block and applicable
2212 * flags. IP blocks are reset to prevent any previous configuration
2213 * by the bootloader or previous operating system from interfering
2214 * with power management or other parts of the system. The reset can
2215 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2216 * two phases for hwmod initialization. Code called here generally
2217 * affects the IP block hardware, or system integration hardware
2218 * associated with the IP block. Returns 0.
2219 */
2220static int __init _setup(struct omap_hwmod *oh, void *data)
2221{
2222 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2223 return 0;
2224
2225 _setup_iclk_autoidle(oh);
2226
2227 if (!_setup_reset(oh))
2228 _setup_postsetup(oh);
2229
63c85238
PW
2230 return 0;
2231}
2232
63c85238 2233/**
0102b627 2234 * _register - register a struct omap_hwmod
63c85238
PW
2235 * @oh: struct omap_hwmod *
2236 *
43b40992
PW
2237 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2238 * already has been registered by the same name; -EINVAL if the
2239 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2240 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2241 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2242 * success.
63c85238
PW
2243 *
2244 * XXX The data should be copied into bootmem, so the original data
2245 * should be marked __initdata and freed after init. This would allow
2246 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2247 * that the copy process would be relatively complex due to the large number
2248 * of substructures.
2249 */
01592df9 2250static int __init _register(struct omap_hwmod *oh)
63c85238 2251{
43b40992
PW
2252 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2253 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2254 return -EINVAL;
2255
63c85238
PW
2256 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2257
ce35b244
BC
2258 if (_lookup(oh->name))
2259 return -EEXIST;
63c85238 2260
63c85238
PW
2261 list_add_tail(&oh->node, &omap_hwmod_list);
2262
2221b5cd
PW
2263 INIT_LIST_HEAD(&oh->master_ports);
2264 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2265 spin_lock_init(&oh->_lock);
2092e5cc 2266
63c85238
PW
2267 oh->_state = _HWMOD_STATE_REGISTERED;
2268
569edd70
PW
2269 /*
2270 * XXX Rather than doing a strcmp(), this should test a flag
2271 * set in the hwmod data, inserted by the autogenerator code.
2272 */
2273 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2274 mpu_oh = oh;
63c85238 2275
569edd70 2276 return 0;
63c85238
PW
2277}
2278
2221b5cd
PW
2279/**
2280 * _alloc_links - return allocated memory for hwmod links
2281 * @ml: pointer to a struct omap_hwmod_link * for the master link
2282 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2283 *
2284 * Return pointers to two struct omap_hwmod_link records, via the
2285 * addresses pointed to by @ml and @sl. Will first attempt to return
2286 * memory allocated as part of a large initial block, but if that has
2287 * been exhausted, will allocate memory itself. Since ideally this
2288 * second allocation path will never occur, the number of these
2289 * 'supplemental' allocations will be logged when debugging is
2290 * enabled. Returns 0.
2291 */
2292static int __init _alloc_links(struct omap_hwmod_link **ml,
2293 struct omap_hwmod_link **sl)
2294{
2295 unsigned int sz;
2296
2297 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2298 *ml = &linkspace[free_ls++];
2299 *sl = &linkspace[free_ls++];
2300 return 0;
2301 }
2302
2303 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2304
2305 *sl = NULL;
2306 *ml = alloc_bootmem(sz);
2307
2308 memset(*ml, 0, sz);
2309
2310 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2311
2312 ls_supp++;
2313 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2314 ls_supp * LINKS_PER_OCP_IF);
2315
2316 return 0;
2317};
2318
2319/**
2320 * _add_link - add an interconnect between two IP blocks
2321 * @oi: pointer to a struct omap_hwmod_ocp_if record
2322 *
2323 * Add struct omap_hwmod_link records connecting the master IP block
2324 * specified in @oi->master to @oi, and connecting the slave IP block
2325 * specified in @oi->slave to @oi. This code is assumed to run before
2326 * preemption or SMP has been enabled, thus avoiding the need for
2327 * locking in this code. Changes to this assumption will require
2328 * additional locking. Returns 0.
2329 */
2330static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2331{
2332 struct omap_hwmod_link *ml, *sl;
2333
2334 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2335 oi->slave->name);
2336
2337 _alloc_links(&ml, &sl);
2338
2339 ml->ocp_if = oi;
2340 INIT_LIST_HEAD(&ml->node);
2341 list_add(&ml->node, &oi->master->master_ports);
2342 oi->master->masters_cnt++;
2343
2344 sl->ocp_if = oi;
2345 INIT_LIST_HEAD(&sl->node);
2346 list_add(&sl->node, &oi->slave->slave_ports);
2347 oi->slave->slaves_cnt++;
2348
2349 return 0;
2350}
2351
2352/**
2353 * _register_link - register a struct omap_hwmod_ocp_if
2354 * @oi: struct omap_hwmod_ocp_if *
2355 *
2356 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2357 * has already been registered; -EINVAL if @oi is NULL or if the
2358 * record pointed to by @oi is missing required fields; or 0 upon
2359 * success.
2360 *
2361 * XXX The data should be copied into bootmem, so the original data
2362 * should be marked __initdata and freed after init. This would allow
2363 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2364 */
2365static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2366{
2367 if (!oi || !oi->master || !oi->slave || !oi->user)
2368 return -EINVAL;
2369
2370 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2371 return -EEXIST;
2372
2373 pr_debug("omap_hwmod: registering link from %s to %s\n",
2374 oi->master->name, oi->slave->name);
2375
2376 /*
2377 * Register the connected hwmods, if they haven't been
2378 * registered already
2379 */
2380 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2381 _register(oi->master);
2382
2383 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2384 _register(oi->slave);
2385
2386 _add_link(oi);
2387
2388 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2389
2390 return 0;
2391}
2392
2393/**
2394 * _alloc_linkspace - allocate large block of hwmod links
2395 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2396 *
2397 * Allocate a large block of struct omap_hwmod_link records. This
2398 * improves boot time significantly by avoiding the need to allocate
2399 * individual records one by one. If the number of records to
2400 * allocate in the block hasn't been manually specified, this function
2401 * will count the number of struct omap_hwmod_ocp_if records in @ois
2402 * and use that to determine the allocation size. For SoC families
2403 * that require multiple list registrations, such as OMAP3xxx, this
2404 * estimation process isn't optimal, so manual estimation is advised
2405 * in those cases. Returns -EEXIST if the allocation has already occurred
2406 * or 0 upon success.
2407 */
2408static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2409{
2410 unsigned int i = 0;
2411 unsigned int sz;
2412
2413 if (linkspace) {
2414 WARN(1, "linkspace already allocated\n");
2415 return -EEXIST;
2416 }
2417
2418 if (max_ls == 0)
2419 while (ois[i++])
2420 max_ls += LINKS_PER_OCP_IF;
2421
2422 sz = sizeof(struct omap_hwmod_link) * max_ls;
2423
2424 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2425 __func__, sz, max_ls);
2426
2427 linkspace = alloc_bootmem(sz);
2428
2429 memset(linkspace, 0, sz);
2430
2431 return 0;
2432}
0102b627
BC
2433
2434/* Public functions */
2435
2436u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2437{
2438 if (oh->flags & HWMOD_16BIT_REG)
2439 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2440 else
2441 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2442}
2443
2444void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2445{
2446 if (oh->flags & HWMOD_16BIT_REG)
2447 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2448 else
2449 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2450}
2451
6d3c55fd
A
2452/**
2453 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2454 * @oh: struct omap_hwmod *
2455 *
2456 * This is a public function exposed to drivers. Some drivers may need to do
2457 * some settings before and after resetting the device. Those drivers after
2458 * doing the necessary settings could use this function to start a reset by
2459 * setting the SYSCONFIG.SOFTRESET bit.
2460 */
2461int omap_hwmod_softreset(struct omap_hwmod *oh)
2462{
3c55c1ba
PW
2463 u32 v;
2464 int ret;
2465
2466 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2467 return -EINVAL;
2468
3c55c1ba
PW
2469 v = oh->_sysc_cache;
2470 ret = _set_softreset(oh, &v);
2471 if (ret)
2472 goto error;
2473 _write_sysconfig(v, oh);
2474
2475error:
2476 return ret;
6d3c55fd
A
2477}
2478
0102b627
BC
2479/**
2480 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2481 * @oh: struct omap_hwmod *
2482 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2483 *
2484 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2485 * local copy. Intended to be used by drivers that have some erratum
2486 * that requires direct manipulation of the SIDLEMODE bits. Returns
2487 * -EINVAL if @oh is null, or passes along the return value from
2488 * _set_slave_idlemode().
2489 *
2490 * XXX Does this function have any current users? If not, we should
2491 * remove it; it is better to let the rest of the hwmod code handle this.
2492 * Any users of this function should be scrutinized carefully.
2493 */
2494int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2495{
2496 u32 v;
2497 int retval = 0;
2498
2499 if (!oh)
2500 return -EINVAL;
2501
2502 v = oh->_sysc_cache;
2503
2504 retval = _set_slave_idlemode(oh, idlemode, &v);
2505 if (!retval)
2506 _write_sysconfig(v, oh);
2507
2508 return retval;
2509}
2510
63c85238
PW
2511/**
2512 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2513 * @name: name of the omap_hwmod to look up
2514 *
2515 * Given a @name of an omap_hwmod, return a pointer to the registered
2516 * struct omap_hwmod *, or NULL upon error.
2517 */
2518struct omap_hwmod *omap_hwmod_lookup(const char *name)
2519{
2520 struct omap_hwmod *oh;
2521
2522 if (!name)
2523 return NULL;
2524
63c85238 2525 oh = _lookup(name);
63c85238
PW
2526
2527 return oh;
2528}
2529
2530/**
2531 * omap_hwmod_for_each - call function for each registered omap_hwmod
2532 * @fn: pointer to a callback function
97d60162 2533 * @data: void * data to pass to callback function
63c85238
PW
2534 *
2535 * Call @fn for each registered omap_hwmod, passing @data to each
2536 * function. @fn must return 0 for success or any other value for
2537 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2538 * will stop and the non-zero return value will be passed to the
2539 * caller of omap_hwmod_for_each(). @fn is called with
2540 * omap_hwmod_for_each() held.
2541 */
97d60162
PW
2542int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2543 void *data)
63c85238
PW
2544{
2545 struct omap_hwmod *temp_oh;
30ebad9d 2546 int ret = 0;
63c85238
PW
2547
2548 if (!fn)
2549 return -EINVAL;
2550
63c85238 2551 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2552 ret = (*fn)(temp_oh, data);
63c85238
PW
2553 if (ret)
2554 break;
2555 }
63c85238
PW
2556
2557 return ret;
2558}
2559
2221b5cd
PW
2560/**
2561 * omap_hwmod_register_links - register an array of hwmod links
2562 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2563 *
2564 * Intended to be called early in boot before the clock framework is
2565 * initialized. If @ois is not null, will register all omap_hwmods
2566 * listed in @ois that are valid for this chip. Returns 0.
2567 */
2568int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2569{
2570 int r, i;
2571
2572 if (!ois)
2573 return 0;
2574
2221b5cd
PW
2575 if (!linkspace) {
2576 if (_alloc_linkspace(ois)) {
2577 pr_err("omap_hwmod: could not allocate link space\n");
2578 return -ENOMEM;
2579 }
2580 }
2581
2582 i = 0;
2583 do {
2584 r = _register_link(ois[i]);
2585 WARN(r && r != -EEXIST,
2586 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
2587 ois[i]->master->name, ois[i]->slave->name, r);
2588 } while (ois[++i]);
2589
2590 return 0;
2591}
2592
381d033a
PW
2593/**
2594 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2595 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2596 *
2597 * If the hwmod data corresponding to the MPU subsystem IP block
2598 * hasn't been initialized and set up yet, do so now. This must be
2599 * done first since sleep dependencies may be added from other hwmods
2600 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2601 * return value.
63c85238 2602 */
381d033a 2603static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 2604{
381d033a
PW
2605 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2606 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2607 __func__, MPU_INITIATOR_NAME);
2608 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2609 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
2610}
2611
63c85238 2612/**
a2debdbd
PW
2613 * omap_hwmod_setup_one - set up a single hwmod
2614 * @oh_name: const char * name of the already-registered hwmod to set up
2615 *
381d033a
PW
2616 * Initialize and set up a single hwmod. Intended to be used for a
2617 * small number of early devices, such as the timer IP blocks used for
2618 * the scheduler clock. Must be called after omap2_clk_init().
2619 * Resolves the struct clk names to struct clk pointers for each
2620 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2621 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
2622 */
2623int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2624{
2625 struct omap_hwmod *oh;
63c85238 2626
a2debdbd
PW
2627 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2628
a2debdbd
PW
2629 oh = _lookup(oh_name);
2630 if (!oh) {
2631 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2632 return -EINVAL;
2633 }
63c85238 2634
381d033a 2635 _ensure_mpu_hwmod_is_setup(oh);
63c85238 2636
381d033a 2637 _init(oh, NULL);
a2debdbd
PW
2638 _setup(oh, NULL);
2639
63c85238
PW
2640 return 0;
2641}
2642
2643/**
381d033a 2644 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 2645 *
381d033a
PW
2646 * Initialize and set up all IP blocks registered with the hwmod code.
2647 * Must be called after omap2_clk_init(). Resolves the struct clk
2648 * names to struct clk pointers for each registered omap_hwmod. Also
2649 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 2650 */
550c8092 2651static int __init omap_hwmod_setup_all(void)
63c85238 2652{
381d033a 2653 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 2654
381d033a 2655 omap_hwmod_for_each(_init, NULL);
2092e5cc 2656 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2657
2658 return 0;
2659}
550c8092 2660core_initcall(omap_hwmod_setup_all);
63c85238 2661
63c85238
PW
2662/**
2663 * omap_hwmod_enable - enable an omap_hwmod
2664 * @oh: struct omap_hwmod *
2665 *
74ff3a68 2666 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2667 * Returns -EINVAL on error or passes along the return value from _enable().
2668 */
2669int omap_hwmod_enable(struct omap_hwmod *oh)
2670{
2671 int r;
dc6d1cda 2672 unsigned long flags;
63c85238
PW
2673
2674 if (!oh)
2675 return -EINVAL;
2676
dc6d1cda
PW
2677 spin_lock_irqsave(&oh->_lock, flags);
2678 r = _enable(oh);
2679 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2680
2681 return r;
2682}
2683
2684/**
2685 * omap_hwmod_idle - idle an omap_hwmod
2686 * @oh: struct omap_hwmod *
2687 *
74ff3a68 2688 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2689 * Returns -EINVAL on error or passes along the return value from _idle().
2690 */
2691int omap_hwmod_idle(struct omap_hwmod *oh)
2692{
dc6d1cda
PW
2693 unsigned long flags;
2694
63c85238
PW
2695 if (!oh)
2696 return -EINVAL;
2697
dc6d1cda
PW
2698 spin_lock_irqsave(&oh->_lock, flags);
2699 _idle(oh);
2700 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2701
2702 return 0;
2703}
2704
2705/**
2706 * omap_hwmod_shutdown - shutdown an omap_hwmod
2707 * @oh: struct omap_hwmod *
2708 *
74ff3a68 2709 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2710 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2711 * the return value from _shutdown().
2712 */
2713int omap_hwmod_shutdown(struct omap_hwmod *oh)
2714{
dc6d1cda
PW
2715 unsigned long flags;
2716
63c85238
PW
2717 if (!oh)
2718 return -EINVAL;
2719
dc6d1cda 2720 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2721 _shutdown(oh);
dc6d1cda 2722 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2723
2724 return 0;
2725}
2726
2727/**
2728 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2729 * @oh: struct omap_hwmod *oh
2730 *
2731 * Intended to be called by the omap_device code.
2732 */
2733int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2734{
dc6d1cda
PW
2735 unsigned long flags;
2736
2737 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2738 _enable_clocks(oh);
dc6d1cda 2739 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2740
2741 return 0;
2742}
2743
2744/**
2745 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2746 * @oh: struct omap_hwmod *oh
2747 *
2748 * Intended to be called by the omap_device code.
2749 */
2750int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2751{
dc6d1cda
PW
2752 unsigned long flags;
2753
2754 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2755 _disable_clocks(oh);
dc6d1cda 2756 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2757
2758 return 0;
2759}
2760
2761/**
2762 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2763 * @oh: struct omap_hwmod *oh
2764 *
2765 * Intended to be called by drivers and core code when all posted
2766 * writes to a device must complete before continuing further
2767 * execution (for example, after clearing some device IRQSTATUS
2768 * register bits)
2769 *
2770 * XXX what about targets with multiple OCP threads?
2771 */
2772void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2773{
2774 BUG_ON(!oh);
2775
43b40992 2776 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2777 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2778 oh->name);
63c85238
PW
2779 return;
2780 }
2781
2782 /*
2783 * Forces posted writes to complete on the OCP thread handling
2784 * register writes
2785 */
cc7a1d2a 2786 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2787}
2788
2789/**
2790 * omap_hwmod_reset - reset the hwmod
2791 * @oh: struct omap_hwmod *
2792 *
2793 * Under some conditions, a driver may wish to reset the entire device.
2794 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2795 * the return value from _reset().
63c85238
PW
2796 */
2797int omap_hwmod_reset(struct omap_hwmod *oh)
2798{
2799 int r;
dc6d1cda 2800 unsigned long flags;
63c85238 2801
9b579114 2802 if (!oh)
63c85238
PW
2803 return -EINVAL;
2804
dc6d1cda 2805 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2806 r = _reset(oh);
dc6d1cda 2807 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2808
2809 return r;
2810}
2811
5e8370f1
PW
2812/*
2813 * IP block data retrieval functions
2814 */
2815
63c85238
PW
2816/**
2817 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2818 * @oh: struct omap_hwmod *
2819 * @res: pointer to the first element of an array of struct resource to fill
2820 *
2821 * Count the number of struct resource array elements necessary to
2822 * contain omap_hwmod @oh resources. Intended to be called by code
2823 * that registers omap_devices. Intended to be used to determine the
2824 * size of a dynamically-allocated struct resource array, before
2825 * calling omap_hwmod_fill_resources(). Returns the number of struct
2826 * resource array elements needed.
2827 *
2828 * XXX This code is not optimized. It could attempt to merge adjacent
2829 * resource IDs.
2830 *
2831 */
2832int omap_hwmod_count_resources(struct omap_hwmod *oh)
2833{
5d95dde7 2834 struct omap_hwmod_ocp_if *os;
11cd4b94 2835 struct list_head *p;
5d95dde7
PW
2836 int ret;
2837 int i = 0;
63c85238 2838
bc614958 2839 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 2840
11cd4b94 2841 p = oh->slave_ports.next;
2221b5cd 2842
5d95dde7 2843 while (i < oh->slaves_cnt) {
11cd4b94 2844 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
2845 ret += _count_ocp_if_addr_spaces(os);
2846 }
63c85238
PW
2847
2848 return ret;
2849}
2850
2851/**
2852 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2853 * @oh: struct omap_hwmod *
2854 * @res: pointer to the first element of an array of struct resource to fill
2855 *
2856 * Fill the struct resource array @res with resource data from the
2857 * omap_hwmod @oh. Intended to be called by code that registers
2858 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2859 * number of array elements filled.
2860 */
2861int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2862{
5d95dde7 2863 struct omap_hwmod_ocp_if *os;
11cd4b94 2864 struct list_head *p;
5d95dde7 2865 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
2866 int r = 0;
2867
2868 /* For each IRQ, DMA, memory area, fill in array.*/
2869
212738a4
PW
2870 mpu_irqs_cnt = _count_mpu_irqs(oh);
2871 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2872 (res + r)->name = (oh->mpu_irqs + i)->name;
2873 (res + r)->start = (oh->mpu_irqs + i)->irq;
2874 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2875 (res + r)->flags = IORESOURCE_IRQ;
2876 r++;
2877 }
2878
bc614958
PW
2879 sdma_reqs_cnt = _count_sdma_reqs(oh);
2880 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2881 (res + r)->name = (oh->sdma_reqs + i)->name;
2882 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2883 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2884 (res + r)->flags = IORESOURCE_DMA;
2885 r++;
2886 }
2887
11cd4b94 2888 p = oh->slave_ports.next;
2221b5cd 2889
5d95dde7
PW
2890 i = 0;
2891 while (i < oh->slaves_cnt) {
11cd4b94 2892 os = _fetch_next_ocp_if(&p, &i);
78183f3f 2893 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2894
78183f3f 2895 for (j = 0; j < addr_cnt; j++) {
cd503802 2896 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2897 (res + r)->start = (os->addr + j)->pa_start;
2898 (res + r)->end = (os->addr + j)->pa_end;
2899 (res + r)->flags = IORESOURCE_MEM;
2900 r++;
2901 }
2902 }
2903
2904 return r;
2905}
2906
5e8370f1
PW
2907/**
2908 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2909 * @oh: struct omap_hwmod * to operate on
2910 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2911 * @name: pointer to the name of the data to fetch (optional)
2912 * @rsrc: pointer to a struct resource, allocated by the caller
2913 *
2914 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2915 * data for the IP block pointed to by @oh. The data will be filled
2916 * into a struct resource record pointed to by @rsrc. The struct
2917 * resource must be allocated by the caller. When @name is non-null,
2918 * the data associated with the matching entry in the IRQ/SDMA/address
2919 * space hwmod data arrays will be returned. If @name is null, the
2920 * first array entry will be returned. Data order is not meaningful
2921 * in hwmod data, so callers are strongly encouraged to use a non-null
2922 * @name whenever possible to avoid unpredictable effects if hwmod
2923 * data is later added that causes data ordering to change. This
2924 * function is only intended for use by OMAP core code. Device
2925 * drivers should not call this function - the appropriate bus-related
2926 * data accessor functions should be used instead. Returns 0 upon
2927 * success or a negative error code upon error.
2928 */
2929int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2930 const char *name, struct resource *rsrc)
2931{
2932 int r;
2933 unsigned int irq, dma;
2934 u32 pa_start, pa_end;
2935
2936 if (!oh || !rsrc)
2937 return -EINVAL;
2938
2939 if (type == IORESOURCE_IRQ) {
2940 r = _get_mpu_irq_by_name(oh, name, &irq);
2941 if (r)
2942 return r;
2943
2944 rsrc->start = irq;
2945 rsrc->end = irq;
2946 } else if (type == IORESOURCE_DMA) {
2947 r = _get_sdma_req_by_name(oh, name, &dma);
2948 if (r)
2949 return r;
2950
2951 rsrc->start = dma;
2952 rsrc->end = dma;
2953 } else if (type == IORESOURCE_MEM) {
2954 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
2955 if (r)
2956 return r;
2957
2958 rsrc->start = pa_start;
2959 rsrc->end = pa_end;
2960 } else {
2961 return -EINVAL;
2962 }
2963
2964 rsrc->flags = type;
2965 rsrc->name = name;
2966
2967 return 0;
2968}
2969
63c85238
PW
2970/**
2971 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2972 * @oh: struct omap_hwmod *
2973 *
2974 * Return the powerdomain pointer associated with the OMAP module
2975 * @oh's main clock. If @oh does not have a main clk, return the
2976 * powerdomain associated with the interface clock associated with the
2977 * module's MPU port. (XXX Perhaps this should use the SDMA port
2978 * instead?) Returns NULL on error, or a struct powerdomain * on
2979 * success.
2980 */
2981struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2982{
2983 struct clk *c;
2d6141ba 2984 struct omap_hwmod_ocp_if *oi;
63c85238
PW
2985
2986 if (!oh)
2987 return NULL;
2988
2989 if (oh->_clk) {
2990 c = oh->_clk;
2991 } else {
2d6141ba
PW
2992 oi = _find_mpu_rt_port(oh);
2993 if (!oi)
63c85238 2994 return NULL;
2d6141ba 2995 c = oi->_clk;
63c85238
PW
2996 }
2997
d5647c18
TG
2998 if (!c->clkdm)
2999 return NULL;
3000
63c85238
PW
3001 return c->clkdm->pwrdm.ptr;
3002
3003}
3004
db2a60bf
PW
3005/**
3006 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3007 * @oh: struct omap_hwmod *
3008 *
3009 * Returns the virtual address corresponding to the beginning of the
3010 * module's register target, in the address range that is intended to
3011 * be used by the MPU. Returns the virtual address upon success or NULL
3012 * upon error.
3013 */
3014void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3015{
3016 if (!oh)
3017 return NULL;
3018
3019 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3020 return NULL;
3021
3022 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3023 return NULL;
3024
3025 return oh->_mpu_rt_va;
3026}
3027
63c85238
PW
3028/**
3029 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3030 * @oh: struct omap_hwmod *
3031 * @init_oh: struct omap_hwmod * (initiator)
3032 *
3033 * Add a sleep dependency between the initiator @init_oh and @oh.
3034 * Intended to be called by DSP/Bridge code via platform_data for the
3035 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3036 * code needs to add/del initiator dependencies dynamically
3037 * before/after accessing a device. Returns the return value from
3038 * _add_initiator_dep().
3039 *
3040 * XXX Keep a usecount in the clockdomain code
3041 */
3042int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3043 struct omap_hwmod *init_oh)
3044{
3045 return _add_initiator_dep(oh, init_oh);
3046}
3047
3048/*
3049 * XXX what about functions for drivers to save/restore ocp_sysconfig
3050 * for context save/restore operations?
3051 */
3052
3053/**
3054 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3055 * @oh: struct omap_hwmod *
3056 * @init_oh: struct omap_hwmod * (initiator)
3057 *
3058 * Remove a sleep dependency between the initiator @init_oh and @oh.
3059 * Intended to be called by DSP/Bridge code via platform_data for the
3060 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3061 * code needs to add/del initiator dependencies dynamically
3062 * before/after accessing a device. Returns the return value from
3063 * _del_initiator_dep().
3064 *
3065 * XXX Keep a usecount in the clockdomain code
3066 */
3067int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3068 struct omap_hwmod *init_oh)
3069{
3070 return _del_initiator_dep(oh, init_oh);
3071}
3072
63c85238
PW
3073/**
3074 * omap_hwmod_enable_wakeup - allow device to wake up the system
3075 * @oh: struct omap_hwmod *
3076 *
3077 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3078 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3079 * this IP block if it has dynamic mux entries. Eventually this
3080 * should set PRCM wakeup registers to cause the PRCM to receive
3081 * wakeup events from the module. Does not set any wakeup routing
3082 * registers beyond this point - if the module is to wake up any other
3083 * module or subsystem, that must be set separately. Called by
3084 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3085 */
3086int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3087{
dc6d1cda 3088 unsigned long flags;
5a7ddcbd 3089 u32 v;
dc6d1cda 3090
dc6d1cda 3091 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3092
3093 if (oh->class->sysc &&
3094 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3095 v = oh->_sysc_cache;
3096 _enable_wakeup(oh, &v);
3097 _write_sysconfig(v, oh);
3098 }
3099
eceec009 3100 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3101 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3102
3103 return 0;
3104}
3105
3106/**
3107 * omap_hwmod_disable_wakeup - prevent device from waking the system
3108 * @oh: struct omap_hwmod *
3109 *
3110 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3111 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3112 * events for this IP block if it has dynamic mux entries. Eventually
3113 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3114 * wakeup events from the module. Does not set any wakeup routing
3115 * registers beyond this point - if the module is to wake up any other
3116 * module or subsystem, that must be set separately. Called by
3117 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3118 */
3119int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3120{
dc6d1cda 3121 unsigned long flags;
5a7ddcbd 3122 u32 v;
dc6d1cda 3123
dc6d1cda 3124 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3125
3126 if (oh->class->sysc &&
3127 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3128 v = oh->_sysc_cache;
3129 _disable_wakeup(oh, &v);
3130 _write_sysconfig(v, oh);
3131 }
3132
eceec009 3133 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3134 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3135
3136 return 0;
3137}
43b40992 3138
aee48e3c
PW
3139/**
3140 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3141 * contained in the hwmod module.
3142 * @oh: struct omap_hwmod *
3143 * @name: name of the reset line to lookup and assert
3144 *
3145 * Some IP like dsp, ipu or iva contain processor that require
3146 * an HW reset line to be assert / deassert in order to enable fully
3147 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3148 * yet supported on this OMAP; otherwise, passes along the return value
3149 * from _assert_hardreset().
3150 */
3151int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3152{
3153 int ret;
dc6d1cda 3154 unsigned long flags;
aee48e3c
PW
3155
3156 if (!oh)
3157 return -EINVAL;
3158
dc6d1cda 3159 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3160 ret = _assert_hardreset(oh, name);
dc6d1cda 3161 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3162
3163 return ret;
3164}
3165
3166/**
3167 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3168 * contained in the hwmod module.
3169 * @oh: struct omap_hwmod *
3170 * @name: name of the reset line to look up and deassert
3171 *
3172 * Some IP like dsp, ipu or iva contain processor that require
3173 * an HW reset line to be assert / deassert in order to enable fully
3174 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3175 * yet supported on this OMAP; otherwise, passes along the return value
3176 * from _deassert_hardreset().
3177 */
3178int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3179{
3180 int ret;
dc6d1cda 3181 unsigned long flags;
aee48e3c
PW
3182
3183 if (!oh)
3184 return -EINVAL;
3185
dc6d1cda 3186 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3187 ret = _deassert_hardreset(oh, name);
dc6d1cda 3188 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3189
3190 return ret;
3191}
3192
3193/**
3194 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3195 * contained in the hwmod module
3196 * @oh: struct omap_hwmod *
3197 * @name: name of the reset line to look up and read
3198 *
3199 * Return the current state of the hwmod @oh's reset line named @name:
3200 * returns -EINVAL upon parameter error or if this operation
3201 * is unsupported on the current OMAP; otherwise, passes along the return
3202 * value from _read_hardreset().
3203 */
3204int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3205{
3206 int ret;
dc6d1cda 3207 unsigned long flags;
aee48e3c
PW
3208
3209 if (!oh)
3210 return -EINVAL;
3211
dc6d1cda 3212 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3213 ret = _read_hardreset(oh, name);
dc6d1cda 3214 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3215
3216 return ret;
3217}
3218
3219
43b40992
PW
3220/**
3221 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3222 * @classname: struct omap_hwmod_class name to search for
3223 * @fn: callback function pointer to call for each hwmod in class @classname
3224 * @user: arbitrary context data to pass to the callback function
3225 *
ce35b244
BC
3226 * For each omap_hwmod of class @classname, call @fn.
3227 * If the callback function returns something other than
43b40992
PW
3228 * zero, the iterator is terminated, and the callback function's return
3229 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3230 * if @classname or @fn are NULL, or passes back the error code from @fn.
3231 */
3232int omap_hwmod_for_each_by_class(const char *classname,
3233 int (*fn)(struct omap_hwmod *oh,
3234 void *user),
3235 void *user)
3236{
3237 struct omap_hwmod *temp_oh;
3238 int ret = 0;
3239
3240 if (!classname || !fn)
3241 return -EINVAL;
3242
3243 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3244 __func__, classname);
3245
43b40992
PW
3246 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3247 if (!strcmp(temp_oh->class->name, classname)) {
3248 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3249 __func__, temp_oh->name);
3250 ret = (*fn)(temp_oh, user);
3251 if (ret)
3252 break;
3253 }
3254 }
3255
43b40992
PW
3256 if (ret)
3257 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3258 __func__, ret);
3259
3260 return ret;
3261}
3262
2092e5cc
PW
3263/**
3264 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3265 * @oh: struct omap_hwmod *
3266 * @state: state that _setup() should leave the hwmod in
3267 *
550c8092 3268 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3269 * (called by omap_hwmod_setup_*()). See also the documentation
3270 * for _setup_postsetup(), above. Returns 0 upon success or
3271 * -EINVAL if there is a problem with the arguments or if the hwmod is
3272 * in the wrong state.
2092e5cc
PW
3273 */
3274int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3275{
3276 int ret;
dc6d1cda 3277 unsigned long flags;
2092e5cc
PW
3278
3279 if (!oh)
3280 return -EINVAL;
3281
3282 if (state != _HWMOD_STATE_DISABLED &&
3283 state != _HWMOD_STATE_ENABLED &&
3284 state != _HWMOD_STATE_IDLE)
3285 return -EINVAL;
3286
dc6d1cda 3287 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3288
3289 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3290 ret = -EINVAL;
3291 goto ohsps_unlock;
3292 }
3293
3294 oh->_postsetup_state = state;
3295 ret = 0;
3296
3297ohsps_unlock:
dc6d1cda 3298 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3299
3300 return ret;
3301}
c80705aa
KH
3302
3303/**
3304 * omap_hwmod_get_context_loss_count - get lost context count
3305 * @oh: struct omap_hwmod *
3306 *
3307 * Query the powerdomain of of @oh to get the context loss
3308 * count for this device.
3309 *
3310 * Returns the context loss count of the powerdomain assocated with @oh
3311 * upon success, or zero if no powerdomain exists for @oh.
3312 */
fc013873 3313int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3314{
3315 struct powerdomain *pwrdm;
3316 int ret = 0;
3317
3318 pwrdm = omap_hwmod_get_pwrdm(oh);
3319 if (pwrdm)
3320 ret = pwrdm_get_context_loss_count(pwrdm);
3321
3322 return ret;
3323}
43b01643
PW
3324
3325/**
3326 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3327 * @oh: struct omap_hwmod *
3328 *
3329 * Prevent the hwmod @oh from being reset during the setup process.
3330 * Intended for use by board-*.c files on boards with devices that
3331 * cannot tolerate being reset. Must be called before the hwmod has
3332 * been set up. Returns 0 upon success or negative error code upon
3333 * failure.
3334 */
3335int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3336{
3337 if (!oh)
3338 return -EINVAL;
3339
3340 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3341 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3342 oh->name);
3343 return -EINVAL;
3344 }
3345
3346 oh->flags |= HWMOD_INIT_NO_RESET;
3347
3348 return 0;
3349}
abc2d545
TK
3350
3351/**
3352 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3353 * @oh: struct omap_hwmod * containing hwmod mux entries
3354 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3355 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3356 *
3357 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3358 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3359 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3360 * this function is not called for a given pad_idx, then the ISR
3361 * associated with @oh's first MPU IRQ will be triggered when an I/O
3362 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3363 * the _dynamic or wakeup_ entry: if there are other entries not
3364 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3365 * entries are NOT COUNTED in the dynamic pad index. This function
3366 * must be called separately for each pad that requires its interrupt
3367 * to be re-routed this way. Returns -EINVAL if there is an argument
3368 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3369 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3370 *
3371 * XXX This function interface is fragile. Rather than using array
3372 * indexes, which are subject to unpredictable change, it should be
3373 * using hwmod IRQ names, and some other stable key for the hwmod mux
3374 * pad records.
3375 */
3376int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3377{
3378 int nr_irqs;
3379
3380 might_sleep();
3381
3382 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3383 pad_idx >= oh->mux->nr_pads_dynamic)
3384 return -EINVAL;
3385
3386 /* Check the number of available mpu_irqs */
3387 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3388 ;
3389
3390 if (irq_idx >= nr_irqs)
3391 return -EINVAL;
3392
3393 if (!oh->mux->irqs) {
3394 /* XXX What frees this? */
3395 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3396 GFP_KERNEL);
3397 if (!oh->mux->irqs)
3398 return -ENOMEM;
3399 }
3400 oh->mux->irqs[pad_idx] = irq_idx;
3401
3402 return 0;
3403}
bed9d1bb
TKD
3404
3405/**
3406 * omap_hwmod_get_main_clk - get pointer to main clock name
3407 * @oh: struct omap_hwmod *
3408 *
3409 * Returns the main clock name assocated with @oh upon success,
3410 * or NULL if @oh is NULL.
3411 */
3412const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3413{
3414 if (!oh)
3415 return NULL;
3416
3417 return oh->main_clk;
3418}