OMAP2+: hwmod: Fix the HW reset management
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
63c85238 5 *
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
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16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
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27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
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112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
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119 * - handle IO mapping
120 * - bus throughput & module latency measurement code
121 *
122 * XXX add tests at the beginning of each function to ensure the hwmod is
123 * in the appropriate state
124 * XXX error return values should be checked to ensure that they are
125 * appropriate
126 */
127#undef DEBUG
128
129#include <linux/kernel.h>
130#include <linux/errno.h>
131#include <linux/io.h>
132#include <linux/clk.h>
133#include <linux/delay.h>
134#include <linux/err.h>
135#include <linux/list.h>
136#include <linux/mutex.h>
dc6d1cda 137#include <linux/spinlock.h>
63c85238 138
6f8b7ff5 139#include <plat/common.h>
ce491cf8 140#include <plat/cpu.h>
1540f214 141#include "clockdomain.h"
72e06d08 142#include "powerdomain.h"
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143#include <plat/clock.h>
144#include <plat/omap_hwmod.h>
5365efbe 145#include <plat/prcm.h>
63c85238 146
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147#include "cm2xxx_3xxx.h"
148#include "cm44xx.h"
149#include "prm2xxx_3xxx.h"
d198b514 150#include "prm44xx.h"
8d9af88f 151#include "mux.h"
63c85238 152
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153/* Maximum microseconds to wait for OMAP module to softreset */
154#define MAX_MODULE_SOFTRESET_WAIT 10000
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155
156/* Name of the OMAP hwmod for the MPU */
5c2c0296 157#define MPU_INITIATOR_NAME "mpu"
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158
159/* omap_hwmod_list contains all registered struct omap_hwmods */
160static LIST_HEAD(omap_hwmod_list);
161
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162/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163static struct omap_hwmod *mpu_oh;
164
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165
166/* Private functions */
167
168/**
169 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
170 * @oh: struct omap_hwmod *
171 *
172 * Load the current value of the hwmod OCP_SYSCONFIG register into the
173 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
174 * OCP_SYSCONFIG register or 0 upon success.
175 */
176static int _update_sysc_cache(struct omap_hwmod *oh)
177{
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178 if (!oh->class->sysc) {
179 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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180 return -EINVAL;
181 }
182
183 /* XXX ensure module interface clock is up */
184
cc7a1d2a 185 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 186
43b40992 187 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 188 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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189
190 return 0;
191}
192
193/**
194 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
195 * @v: OCP_SYSCONFIG value to write
196 * @oh: struct omap_hwmod *
197 *
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198 * Write @v into the module class' OCP_SYSCONFIG register, if it has
199 * one. No return value.
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200 */
201static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
202{
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203 if (!oh->class->sysc) {
204 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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205 return;
206 }
207
208 /* XXX ensure module interface clock is up */
209
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210 /* Module might have lost context, always update cache and register */
211 oh->_sysc_cache = v;
212 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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213}
214
215/**
216 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
217 * @oh: struct omap_hwmod *
218 * @standbymode: MIDLEMODE field bits
219 * @v: pointer to register contents to modify
220 *
221 * Update the master standby mode bits in @v to be @standbymode for
222 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
223 * upon error or 0 upon success.
224 */
225static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
226 u32 *v)
227{
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228 u32 mstandby_mask;
229 u8 mstandby_shift;
230
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231 if (!oh->class->sysc ||
232 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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233 return -EINVAL;
234
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235 if (!oh->class->sysc->sysc_fields) {
236 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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237 return -EINVAL;
238 }
239
43b40992 240 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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241 mstandby_mask = (0x3 << mstandby_shift);
242
243 *v &= ~mstandby_mask;
244 *v |= __ffs(standbymode) << mstandby_shift;
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245
246 return 0;
247}
248
249/**
250 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
251 * @oh: struct omap_hwmod *
252 * @idlemode: SIDLEMODE field bits
253 * @v: pointer to register contents to modify
254 *
255 * Update the slave idle mode bits in @v to be @idlemode for the @oh
256 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
257 * or 0 upon success.
258 */
259static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
260{
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261 u32 sidle_mask;
262 u8 sidle_shift;
263
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264 if (!oh->class->sysc ||
265 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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266 return -EINVAL;
267
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268 if (!oh->class->sysc->sysc_fields) {
269 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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270 return -EINVAL;
271 }
272
43b40992 273 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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274 sidle_mask = (0x3 << sidle_shift);
275
276 *v &= ~sidle_mask;
277 *v |= __ffs(idlemode) << sidle_shift;
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278
279 return 0;
280}
281
282/**
283 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
284 * @oh: struct omap_hwmod *
285 * @clockact: CLOCKACTIVITY field bits
286 * @v: pointer to register contents to modify
287 *
288 * Update the clockactivity mode bits in @v to be @clockact for the
289 * @oh hwmod. Used for additional powersaving on some modules. Does
290 * not write to the hardware. Returns -EINVAL upon error or 0 upon
291 * success.
292 */
293static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
294{
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295 u32 clkact_mask;
296 u8 clkact_shift;
297
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298 if (!oh->class->sysc ||
299 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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300 return -EINVAL;
301
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302 if (!oh->class->sysc->sysc_fields) {
303 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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304 return -EINVAL;
305 }
306
43b40992 307 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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308 clkact_mask = (0x3 << clkact_shift);
309
310 *v &= ~clkact_mask;
311 *v |= clockact << clkact_shift;
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312
313 return 0;
314}
315
316/**
317 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
318 * @oh: struct omap_hwmod *
319 * @v: pointer to register contents to modify
320 *
321 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
322 * error or 0 upon success.
323 */
324static int _set_softreset(struct omap_hwmod *oh, u32 *v)
325{
358f0e63
TG
326 u32 softrst_mask;
327
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328 if (!oh->class->sysc ||
329 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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330 return -EINVAL;
331
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332 if (!oh->class->sysc->sysc_fields) {
333 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
334 return -EINVAL;
335 }
336
43b40992 337 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
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338
339 *v |= softrst_mask;
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340
341 return 0;
342}
343
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344/**
345 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
346 * @oh: struct omap_hwmod *
347 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
348 * @v: pointer to register contents to modify
349 *
350 * Update the module autoidle bit in @v to be @autoidle for the @oh
351 * hwmod. The autoidle bit controls whether the module can gate
352 * internal clocks automatically when it isn't doing anything; the
353 * exact function of this bit varies on a per-module basis. This
354 * function does not write to the hardware. Returns -EINVAL upon
355 * error or 0 upon success.
356 */
357static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
358 u32 *v)
359{
358f0e63
TG
360 u32 autoidle_mask;
361 u8 autoidle_shift;
362
43b40992
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363 if (!oh->class->sysc ||
364 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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365 return -EINVAL;
366
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367 if (!oh->class->sysc->sysc_fields) {
368 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
369 return -EINVAL;
370 }
371
43b40992 372 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 373 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
374
375 *v &= ~autoidle_mask;
376 *v |= autoidle << autoidle_shift;
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377
378 return 0;
379}
380
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381/**
382 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
383 * @oh: struct omap_hwmod *
384 *
385 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
386 * upon error or 0 upon success.
387 */
5a7ddcbd 388static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 389{
43b40992 390 if (!oh->class->sysc ||
86009eb3 391 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
392 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
393 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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394 return -EINVAL;
395
43b40992
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396 if (!oh->class->sysc->sysc_fields) {
397 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
398 return -EINVAL;
399 }
400
1fe74113
BC
401 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
402 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 403
86009eb3
BC
404 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
405 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
406 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
407 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 408
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409 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
410
411 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
412
413 return 0;
414}
415
416/**
417 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
418 * @oh: struct omap_hwmod *
419 *
420 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
421 * upon error or 0 upon success.
422 */
5a7ddcbd 423static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 424{
43b40992 425 if (!oh->class->sysc ||
86009eb3 426 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
427 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
428 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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429 return -EINVAL;
430
43b40992
PW
431 if (!oh->class->sysc->sysc_fields) {
432 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
433 return -EINVAL;
434 }
435
1fe74113
BC
436 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
437 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 438
86009eb3
BC
439 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
440 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
441 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
442 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 443
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444 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
445
446 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
447
448 return 0;
449}
450
451/**
452 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
453 * @oh: struct omap_hwmod *
454 *
455 * Prevent the hardware module @oh from entering idle while the
456 * hardare module initiator @init_oh is active. Useful when a module
457 * will be accessed by a particular initiator (e.g., if a module will
458 * be accessed by the IVA, there should be a sleepdep between the IVA
459 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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460 * mode. If the clockdomain is marked as not needing autodeps, return
461 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
462 * passes along clkdm_add_sleepdep() value upon success.
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463 */
464static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
465{
466 if (!oh->_clk)
467 return -EINVAL;
468
570b54c7
PW
469 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
470 return 0;
471
55ed9694 472 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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473}
474
475/**
476 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
477 * @oh: struct omap_hwmod *
478 *
479 * Allow the hardware module @oh to enter idle while the hardare
480 * module initiator @init_oh is active. Useful when a module will not
481 * be accessed by a particular initiator (e.g., if a module will not
482 * be accessed by the IVA, there should be no sleepdep between the IVA
483 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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484 * mode. If the clockdomain is marked as not needing autodeps, return
485 * 0 without doing anything. Returns -EINVAL upon error or passes
486 * along clkdm_del_sleepdep() value upon success.
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487 */
488static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
489{
490 if (!oh->_clk)
491 return -EINVAL;
492
570b54c7
PW
493 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
494 return 0;
495
55ed9694 496 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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497}
498
499/**
500 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
501 * @oh: struct omap_hwmod *
502 *
503 * Called from _init_clocks(). Populates the @oh _clk (main
504 * functional clock pointer) if a main_clk is present. Returns 0 on
505 * success or -EINVAL on error.
506 */
507static int _init_main_clk(struct omap_hwmod *oh)
508{
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509 int ret = 0;
510
50ebdac2 511 if (!oh->main_clk)
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512 return 0;
513
63403384 514 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 515 if (!oh->_clk) {
20383d82
BC
516 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
517 oh->name, oh->main_clk);
63403384 518 return -EINVAL;
dc75925d 519 }
63c85238 520
63403384
BC
521 if (!oh->_clk->clkdm)
522 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
523 oh->main_clk, oh->_clk->name);
81d7c6ff 524
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525 return ret;
526}
527
528/**
887adeac 529 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
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530 * @oh: struct omap_hwmod *
531 *
532 * Called from _init_clocks(). Populates the @oh OCP slave interface
533 * clock pointers. Returns 0 on success or -EINVAL on error.
534 */
535static int _init_interface_clks(struct omap_hwmod *oh)
536{
63c85238
PW
537 struct clk *c;
538 int i;
539 int ret = 0;
540
541 if (oh->slaves_cnt == 0)
542 return 0;
543
682fdc96
BC
544 for (i = 0; i < oh->slaves_cnt; i++) {
545 struct omap_hwmod_ocp_if *os = oh->slaves[i];
546
50ebdac2 547 if (!os->clk)
63c85238
PW
548 continue;
549
50ebdac2 550 c = omap_clk_get_by_name(os->clk);
dc75925d 551 if (!c) {
20383d82
BC
552 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
553 oh->name, os->clk);
63c85238 554 ret = -EINVAL;
dc75925d 555 }
63c85238
PW
556 os->_clk = c;
557 }
558
559 return ret;
560}
561
562/**
563 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
564 * @oh: struct omap_hwmod *
565 *
566 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
567 * clock pointers. Returns 0 on success or -EINVAL on error.
568 */
569static int _init_opt_clks(struct omap_hwmod *oh)
570{
571 struct omap_hwmod_opt_clk *oc;
572 struct clk *c;
573 int i;
574 int ret = 0;
575
576 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 577 c = omap_clk_get_by_name(oc->clk);
dc75925d 578 if (!c) {
20383d82
BC
579 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
580 oh->name, oc->clk);
63c85238 581 ret = -EINVAL;
dc75925d 582 }
63c85238
PW
583 oc->_clk = c;
584 }
585
586 return ret;
587}
588
589/**
590 * _enable_clocks - enable hwmod main clock and interface clocks
591 * @oh: struct omap_hwmod *
592 *
593 * Enables all clocks necessary for register reads and writes to succeed
594 * on the hwmod @oh. Returns 0.
595 */
596static int _enable_clocks(struct omap_hwmod *oh)
597{
63c85238
PW
598 int i;
599
600 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
601
4d3ae5a9 602 if (oh->_clk)
63c85238
PW
603 clk_enable(oh->_clk);
604
605 if (oh->slaves_cnt > 0) {
682fdc96
BC
606 for (i = 0; i < oh->slaves_cnt; i++) {
607 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
608 struct clk *c = os->_clk;
609
4d3ae5a9 610 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
611 clk_enable(c);
612 }
613 }
614
615 /* The opt clocks are controlled by the device driver. */
616
617 return 0;
618}
619
620/**
621 * _disable_clocks - disable hwmod main clock and interface clocks
622 * @oh: struct omap_hwmod *
623 *
624 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
625 */
626static int _disable_clocks(struct omap_hwmod *oh)
627{
63c85238
PW
628 int i;
629
630 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
631
4d3ae5a9 632 if (oh->_clk)
63c85238
PW
633 clk_disable(oh->_clk);
634
635 if (oh->slaves_cnt > 0) {
682fdc96
BC
636 for (i = 0; i < oh->slaves_cnt; i++) {
637 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
638 struct clk *c = os->_clk;
639
4d3ae5a9 640 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
641 clk_disable(c);
642 }
643 }
644
645 /* The opt clocks are controlled by the device driver. */
646
647 return 0;
648}
649
96835af9
BC
650static void _enable_optional_clocks(struct omap_hwmod *oh)
651{
652 struct omap_hwmod_opt_clk *oc;
653 int i;
654
655 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
656
657 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
658 if (oc->_clk) {
659 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
660 oc->_clk->name);
661 clk_enable(oc->_clk);
662 }
663}
664
665static void _disable_optional_clocks(struct omap_hwmod *oh)
666{
667 struct omap_hwmod_opt_clk *oc;
668 int i;
669
670 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
671
672 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
673 if (oc->_clk) {
674 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
675 oc->_clk->name);
676 clk_disable(oc->_clk);
677 }
678}
679
63c85238
PW
680/**
681 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
682 * @oh: struct omap_hwmod *
683 *
684 * Returns the array index of the OCP slave port that the MPU
685 * addresses the device on, or -EINVAL upon error or not found.
686 */
01592df9 687static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 688{
63c85238
PW
689 int i;
690 int found = 0;
691
692 if (!oh || oh->slaves_cnt == 0)
693 return -EINVAL;
694
682fdc96
BC
695 for (i = 0; i < oh->slaves_cnt; i++) {
696 struct omap_hwmod_ocp_if *os = oh->slaves[i];
697
63c85238
PW
698 if (os->user & OCP_USER_MPU) {
699 found = 1;
700 break;
701 }
702 }
703
704 if (found)
705 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
706 oh->name, i);
707 else
708 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
709 oh->name);
710
711 return (found) ? i : -EINVAL;
712}
713
714/**
715 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
716 * @oh: struct omap_hwmod *
717 *
718 * Return the virtual address of the base of the register target of
719 * device @oh, or NULL on error.
720 */
01592df9 721static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
722{
723 struct omap_hwmod_ocp_if *os;
724 struct omap_hwmod_addr_space *mem;
725 int i;
726 int found = 0;
986a13f5 727 void __iomem *va_start;
63c85238
PW
728
729 if (!oh || oh->slaves_cnt == 0)
730 return NULL;
731
682fdc96 732 os = oh->slaves[index];
63c85238
PW
733
734 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
735 if (mem->flags & ADDR_TYPE_RT) {
736 found = 1;
737 break;
738 }
739 }
740
986a13f5
TL
741 if (found) {
742 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
743 if (!va_start) {
744 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
745 return NULL;
746 }
63c85238 747 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
748 oh->name, va_start);
749 } else {
63c85238
PW
750 pr_debug("omap_hwmod: %s: no MPU register target found\n",
751 oh->name);
986a13f5 752 }
63c85238 753
986a13f5 754 return (found) ? va_start : NULL;
63c85238
PW
755}
756
757/**
74ff3a68 758 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
759 * @oh: struct omap_hwmod *
760 *
761 * If module is marked as SWSUP_SIDLE, force the module out of slave
762 * idle; otherwise, configure it for smart-idle. If module is marked
763 * as SWSUP_MSUSPEND, force the module out of master standby;
764 * otherwise, configure it for smart-standby. No return value.
765 */
74ff3a68 766static void _enable_sysc(struct omap_hwmod *oh)
63c85238 767{
43b40992 768 u8 idlemode, sf;
63c85238
PW
769 u32 v;
770
43b40992 771 if (!oh->class->sysc)
63c85238
PW
772 return;
773
774 v = oh->_sysc_cache;
43b40992 775 sf = oh->class->sysc->sysc_flags;
63c85238 776
43b40992 777 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
778 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
779 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
780 _set_slave_idlemode(oh, idlemode, &v);
781 }
782
43b40992 783 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
784 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
785 idlemode = HWMOD_IDLEMODE_NO;
786 } else {
787 if (sf & SYSC_HAS_ENAWAKEUP)
788 _enable_wakeup(oh, &v);
789 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
790 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
791 else
792 idlemode = HWMOD_IDLEMODE_SMART;
793 }
63c85238
PW
794 _set_master_standbymode(oh, idlemode, &v);
795 }
796
a16b1f7f
PW
797 /*
798 * XXX The clock framework should handle this, by
799 * calling into this code. But this must wait until the
800 * clock structures are tagged with omap_hwmod entries
801 */
43b40992
PW
802 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
803 (sf & SYSC_HAS_CLOCKACTIVITY))
804 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 805
9980ce53
RN
806 /* If slave is in SMARTIDLE, also enable wakeup */
807 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
808 _enable_wakeup(oh, &v);
809
810 _write_sysconfig(v, oh);
78f26e87
HH
811
812 /*
813 * Set the autoidle bit only after setting the smartidle bit
814 * Setting this will not have any impact on the other modules.
815 */
816 if (sf & SYSC_HAS_AUTOIDLE) {
817 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
818 0 : 1;
819 _set_module_autoidle(oh, idlemode, &v);
820 _write_sysconfig(v, oh);
821 }
63c85238
PW
822}
823
824/**
74ff3a68 825 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
826 * @oh: struct omap_hwmod *
827 *
828 * If module is marked as SWSUP_SIDLE, force the module into slave
829 * idle; otherwise, configure it for smart-idle. If module is marked
830 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
831 * configure it for smart-standby. No return value.
832 */
74ff3a68 833static void _idle_sysc(struct omap_hwmod *oh)
63c85238 834{
43b40992 835 u8 idlemode, sf;
63c85238
PW
836 u32 v;
837
43b40992 838 if (!oh->class->sysc)
63c85238
PW
839 return;
840
841 v = oh->_sysc_cache;
43b40992 842 sf = oh->class->sysc->sysc_flags;
63c85238 843
43b40992 844 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
845 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
846 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
847 _set_slave_idlemode(oh, idlemode, &v);
848 }
849
43b40992 850 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
851 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
852 idlemode = HWMOD_IDLEMODE_FORCE;
853 } else {
854 if (sf & SYSC_HAS_ENAWAKEUP)
855 _enable_wakeup(oh, &v);
856 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
857 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
858 else
859 idlemode = HWMOD_IDLEMODE_SMART;
860 }
63c85238
PW
861 _set_master_standbymode(oh, idlemode, &v);
862 }
863
86009eb3
BC
864 /* If slave is in SMARTIDLE, also enable wakeup */
865 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
866 _enable_wakeup(oh, &v);
867
63c85238
PW
868 _write_sysconfig(v, oh);
869}
870
871/**
74ff3a68 872 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
873 * @oh: struct omap_hwmod *
874 *
875 * Force the module into slave idle and master suspend. No return
876 * value.
877 */
74ff3a68 878static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
879{
880 u32 v;
43b40992 881 u8 sf;
63c85238 882
43b40992 883 if (!oh->class->sysc)
63c85238
PW
884 return;
885
886 v = oh->_sysc_cache;
43b40992 887 sf = oh->class->sysc->sysc_flags;
63c85238 888
43b40992 889 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
890 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
891
43b40992 892 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
893 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
894
43b40992 895 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 896 _set_module_autoidle(oh, 1, &v);
63c85238
PW
897
898 _write_sysconfig(v, oh);
899}
900
901/**
902 * _lookup - find an omap_hwmod by name
903 * @name: find an omap_hwmod by name
904 *
905 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
906 */
907static struct omap_hwmod *_lookup(const char *name)
908{
909 struct omap_hwmod *oh, *temp_oh;
910
911 oh = NULL;
912
913 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
914 if (!strcmp(name, temp_oh->name)) {
915 oh = temp_oh;
916 break;
917 }
918 }
919
920 return oh;
921}
922
923/**
924 * _init_clocks - clk_get() all clocks associated with this hwmod
925 * @oh: struct omap_hwmod *
97d60162 926 * @data: not used; pass NULL
63c85238 927 *
a2debdbd 928 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
929 * Resolves all clock names embedded in the hwmod. Returns 0 on
930 * success, or a negative error code on failure.
63c85238 931 */
97d60162 932static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
933{
934 int ret = 0;
935
48d54f3f
PW
936 if (oh->_state != _HWMOD_STATE_REGISTERED)
937 return 0;
63c85238
PW
938
939 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
940
941 ret |= _init_main_clk(oh);
942 ret |= _init_interface_clks(oh);
943 ret |= _init_opt_clks(oh);
944
f5c1f84b
BC
945 if (!ret)
946 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 947
09c35f2f 948 return ret;
63c85238
PW
949}
950
951/**
952 * _wait_target_ready - wait for a module to leave slave idle
953 * @oh: struct omap_hwmod *
954 *
955 * Wait for a module @oh to leave slave idle. Returns 0 if the module
956 * does not have an IDLEST bit or if the module successfully leaves
957 * slave idle; otherwise, pass along the return value of the
958 * appropriate *_cm_wait_module_ready() function.
959 */
960static int _wait_target_ready(struct omap_hwmod *oh)
961{
962 struct omap_hwmod_ocp_if *os;
963 int ret;
964
965 if (!oh)
966 return -EINVAL;
967
968 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
969 return 0;
970
682fdc96 971 os = oh->slaves[oh->_mpu_port_index];
63c85238 972
33f7ec81 973 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
974 return 0;
975
976 /* XXX check module SIDLEMODE */
977
978 /* XXX check clock enable states */
979
980 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
981 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
982 oh->prcm.omap2.idlest_reg_id,
983 oh->prcm.omap2.idlest_idle_bit);
63c85238 984 } else if (cpu_is_omap44xx()) {
9a23dfe1 985 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
986 } else {
987 BUG();
988 };
989
990 return ret;
991}
992
5365efbe 993/**
cc1226e7 994 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
995 * @oh: struct omap_hwmod *
996 * @name: name of the reset line in the context of this hwmod
cc1226e7 997 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
998 *
999 * Return the bit position of the reset line that match the
1000 * input name. Return -ENOENT if not found.
1001 */
cc1226e7 1002static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1003 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1004{
1005 int i;
1006
1007 for (i = 0; i < oh->rst_lines_cnt; i++) {
1008 const char *rst_line = oh->rst_lines[i].name;
1009 if (!strcmp(rst_line, name)) {
cc1226e7 1010 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1011 ohri->st_shift = oh->rst_lines[i].st_shift;
1012 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1013 oh->name, __func__, rst_line, ohri->rst_shift,
1014 ohri->st_shift);
5365efbe 1015
cc1226e7 1016 return 0;
5365efbe
BC
1017 }
1018 }
1019
1020 return -ENOENT;
1021}
1022
1023/**
1024 * _assert_hardreset - assert the HW reset line of submodules
1025 * contained in the hwmod module.
1026 * @oh: struct omap_hwmod *
1027 * @name: name of the reset line to lookup and assert
1028 *
1029 * Some IP like dsp, ipu or iva contain processor that require
1030 * an HW reset line to be assert / deassert in order to enable fully
1031 * the IP.
1032 */
1033static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1034{
cc1226e7 1035 struct omap_hwmod_rst_info ohri;
1036 u8 ret;
5365efbe
BC
1037
1038 if (!oh)
1039 return -EINVAL;
1040
cc1226e7 1041 ret = _lookup_hardreset(oh, name, &ohri);
1042 if (IS_ERR_VALUE(ret))
1043 return ret;
5365efbe
BC
1044
1045 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1046 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1047 ohri.rst_shift);
5365efbe
BC
1048 else if (cpu_is_omap44xx())
1049 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1050 ohri.rst_shift);
5365efbe
BC
1051 else
1052 return -EINVAL;
1053}
1054
1055/**
1056 * _deassert_hardreset - deassert the HW reset line of submodules contained
1057 * in the hwmod module.
1058 * @oh: struct omap_hwmod *
1059 * @name: name of the reset line to look up and deassert
1060 *
1061 * Some IP like dsp, ipu or iva contain processor that require
1062 * an HW reset line to be assert / deassert in order to enable fully
1063 * the IP.
1064 */
1065static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1066{
cc1226e7 1067 struct omap_hwmod_rst_info ohri;
1068 int ret;
5365efbe
BC
1069
1070 if (!oh)
1071 return -EINVAL;
1072
cc1226e7 1073 ret = _lookup_hardreset(oh, name, &ohri);
1074 if (IS_ERR_VALUE(ret))
1075 return ret;
5365efbe 1076
cc1226e7 1077 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1078 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1079 ohri.rst_shift,
1080 ohri.st_shift);
1081 } else if (cpu_is_omap44xx()) {
1082 if (ohri.st_shift)
1083 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1084 oh->name, name);
1085 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1086 ohri.rst_shift);
1087 } else {
5365efbe 1088 return -EINVAL;
cc1226e7 1089 }
5365efbe 1090
cc1226e7 1091 if (ret == -EBUSY)
5365efbe
BC
1092 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1093
cc1226e7 1094 return ret;
5365efbe
BC
1095}
1096
1097/**
1098 * _read_hardreset - read the HW reset line state of submodules
1099 * contained in the hwmod module
1100 * @oh: struct omap_hwmod *
1101 * @name: name of the reset line to look up and read
1102 *
1103 * Return the state of the reset line.
1104 */
1105static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1106{
cc1226e7 1107 struct omap_hwmod_rst_info ohri;
1108 u8 ret;
5365efbe
BC
1109
1110 if (!oh)
1111 return -EINVAL;
1112
cc1226e7 1113 ret = _lookup_hardreset(oh, name, &ohri);
1114 if (IS_ERR_VALUE(ret))
1115 return ret;
5365efbe
BC
1116
1117 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1118 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1119 ohri.st_shift);
5365efbe
BC
1120 } else if (cpu_is_omap44xx()) {
1121 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1122 ohri.rst_shift);
5365efbe
BC
1123 } else {
1124 return -EINVAL;
1125 }
1126}
1127
63c85238 1128/**
bd36179e 1129 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1130 * @oh: struct omap_hwmod *
1131 *
1132 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1133 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1134 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1135 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1136 *
1137 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1138 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1139 * use the SYSCONFIG softreset bit to provide the status.
1140 *
bd36179e
PW
1141 * Note that some IP like McBSP do have reset control but don't have
1142 * reset status.
63c85238 1143 */
bd36179e 1144static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1145{
96835af9 1146 u32 v;
6f8b7ff5 1147 int c = 0;
96835af9 1148 int ret = 0;
63c85238 1149
43b40992 1150 if (!oh->class->sysc ||
2cb06814 1151 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1152 return -EINVAL;
1153
1154 /* clocks must be on for this operation */
1155 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1156 pr_warning("omap_hwmod: %s: reset can only be entered from "
1157 "enabled state\n", oh->name);
63c85238
PW
1158 return -EINVAL;
1159 }
1160
96835af9
BC
1161 /* For some modules, all optionnal clocks need to be enabled as well */
1162 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1163 _enable_optional_clocks(oh);
1164
bd36179e 1165 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1166
1167 v = oh->_sysc_cache;
96835af9
BC
1168 ret = _set_softreset(oh, &v);
1169 if (ret)
1170 goto dis_opt_clks;
63c85238
PW
1171 _write_sysconfig(v, oh);
1172
2cb06814 1173 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1174 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1175 oh->class->sysc->syss_offs)
1176 & SYSS_RESETDONE_MASK),
1177 MAX_MODULE_SOFTRESET_WAIT, c);
1178 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1179 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1180 oh->class->sysc->sysc_offs)
1181 & SYSC_TYPE2_SOFTRESET_MASK),
1182 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1183
5365efbe 1184 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1185 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1186 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1187 else
5365efbe 1188 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1189
1190 /*
1191 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1192 * _wait_target_ready() or _reset()
1193 */
1194
96835af9
BC
1195 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1196
1197dis_opt_clks:
1198 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1199 _disable_optional_clocks(oh);
1200
1201 return ret;
63c85238
PW
1202}
1203
bd36179e
PW
1204/**
1205 * _reset - reset an omap_hwmod
1206 * @oh: struct omap_hwmod *
1207 *
1208 * Resets an omap_hwmod @oh. The default software reset mechanism for
1209 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1210 * bit. However, some hwmods cannot be reset via this method: some
1211 * are not targets and therefore have no OCP header registers to
1212 * access; others (like the IVA) have idiosyncratic reset sequences.
1213 * So for these relatively rare cases, custom reset code can be
1214 * supplied in the struct omap_hwmod_class .reset function pointer.
1215 * Passes along the return value from either _reset() or the custom
1216 * reset function - these must return -EINVAL if the hwmod cannot be
1217 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1218 * the module did not reset in time, or 0 upon success.
1219 */
1220static int _reset(struct omap_hwmod *oh)
1221{
1222 int ret;
1223
1224 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1225
1226 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1227
1228 return ret;
1229}
1230
63c85238 1231/**
dc6d1cda 1232 * _enable - enable an omap_hwmod
63c85238
PW
1233 * @oh: struct omap_hwmod *
1234 *
1235 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1236 * register target. Returns -EINVAL if the hwmod is in the wrong
1237 * state or passes along the return value of _wait_target_ready().
63c85238 1238 */
dc6d1cda 1239static int _enable(struct omap_hwmod *oh)
63c85238
PW
1240{
1241 int r;
1242
1243 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1244 oh->_state != _HWMOD_STATE_IDLE &&
1245 oh->_state != _HWMOD_STATE_DISABLED) {
1246 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1247 "from initialized, idle, or disabled state\n", oh->name);
1248 return -EINVAL;
1249 }
1250
1251 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1252
8d9af88f 1253 /* Mux pins for device runtime if populated */
029268e4
TL
1254 if (oh->mux && (!oh->mux->enabled ||
1255 ((oh->_state == _HWMOD_STATE_IDLE) &&
1256 oh->mux->pads_dynamic)))
8d9af88f 1257 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1258
1259 _add_initiator_dep(oh, mpu_oh);
1260 _enable_clocks(oh);
1261
31f62866
BC
1262 /*
1263 * If an IP contains only one HW reset line, then de-assert it in order
1264 * to allow the module state transition. Otherwise the PRCM will return
1265 * Intransition status, and the init will failed.
1266 */
1267 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1268 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1269 _deassert_hardreset(oh, oh->rst_lines[0].name);
1270
63c85238 1271 r = _wait_target_ready(oh);
9a23dfe1 1272 if (!r) {
63c85238
PW
1273 oh->_state = _HWMOD_STATE_ENABLED;
1274
9a23dfe1
BC
1275 /* Access the sysconfig only if the target is ready */
1276 if (oh->class->sysc) {
1277 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1278 _update_sysc_cache(oh);
74ff3a68 1279 _enable_sysc(oh);
9a23dfe1
BC
1280 }
1281 } else {
f2dd7e09 1282 _disable_clocks(oh);
9a23dfe1
BC
1283 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1284 oh->name, r);
1285 }
1286
63c85238
PW
1287 return r;
1288}
1289
1290/**
dc6d1cda 1291 * _idle - idle an omap_hwmod
63c85238
PW
1292 * @oh: struct omap_hwmod *
1293 *
1294 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1295 * no further work. Returns -EINVAL if the hwmod is in the wrong
1296 * state or returns 0.
63c85238 1297 */
dc6d1cda 1298static int _idle(struct omap_hwmod *oh)
63c85238
PW
1299{
1300 if (oh->_state != _HWMOD_STATE_ENABLED) {
1301 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1302 "enabled state\n", oh->name);
1303 return -EINVAL;
1304 }
1305
1306 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1307
43b40992 1308 if (oh->class->sysc)
74ff3a68 1309 _idle_sysc(oh);
63c85238
PW
1310 _del_initiator_dep(oh, mpu_oh);
1311 _disable_clocks(oh);
1312
8d9af88f 1313 /* Mux pins for device idle if populated */
029268e4 1314 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1315 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1316
63c85238
PW
1317 oh->_state = _HWMOD_STATE_IDLE;
1318
1319 return 0;
1320}
1321
9599217a
KVA
1322/**
1323 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1324 * @oh: struct omap_hwmod *
1325 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1326 *
1327 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1328 * local copy. Intended to be used by drivers that require
1329 * direct manipulation of the AUTOIDLE bits.
1330 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1331 * along the return value from _set_module_autoidle().
1332 *
1333 * Any users of this function should be scrutinized carefully.
1334 */
1335int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1336{
1337 u32 v;
1338 int retval = 0;
1339 unsigned long flags;
1340
1341 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1342 return -EINVAL;
1343
1344 spin_lock_irqsave(&oh->_lock, flags);
1345
1346 v = oh->_sysc_cache;
1347
1348 retval = _set_module_autoidle(oh, autoidle, &v);
1349
1350 if (!retval)
1351 _write_sysconfig(v, oh);
1352
1353 spin_unlock_irqrestore(&oh->_lock, flags);
1354
1355 return retval;
1356}
1357
63c85238
PW
1358/**
1359 * _shutdown - shutdown an omap_hwmod
1360 * @oh: struct omap_hwmod *
1361 *
1362 * Shut down an omap_hwmod @oh. This should be called when the driver
1363 * used for the hwmod is removed or unloaded or if the driver is not
1364 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1365 * state or returns 0.
1366 */
1367static int _shutdown(struct omap_hwmod *oh)
1368{
e4dc8f50
PW
1369 int ret;
1370 u8 prev_state;
1371
63c85238
PW
1372 if (oh->_state != _HWMOD_STATE_IDLE &&
1373 oh->_state != _HWMOD_STATE_ENABLED) {
1374 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1375 "from idle, or enabled state\n", oh->name);
1376 return -EINVAL;
1377 }
1378
1379 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1380
e4dc8f50
PW
1381 if (oh->class->pre_shutdown) {
1382 prev_state = oh->_state;
1383 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1384 _enable(oh);
e4dc8f50
PW
1385 ret = oh->class->pre_shutdown(oh);
1386 if (ret) {
1387 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1388 _idle(oh);
e4dc8f50
PW
1389 return ret;
1390 }
1391 }
1392
6481c73c
MV
1393 if (oh->class->sysc) {
1394 if (oh->_state == _HWMOD_STATE_IDLE)
1395 _enable(oh);
74ff3a68 1396 _shutdown_sysc(oh);
6481c73c 1397 }
3827f949
BC
1398
1399 /* clocks and deps are already disabled in idle */
1400 if (oh->_state == _HWMOD_STATE_ENABLED) {
1401 _del_initiator_dep(oh, mpu_oh);
1402 /* XXX what about the other system initiators here? dma, dsp */
1403 _disable_clocks(oh);
1404 }
63c85238
PW
1405 /* XXX Should this code also force-disable the optional clocks? */
1406
31f62866
BC
1407 /*
1408 * If an IP contains only one HW reset line, then assert it
1409 * after disabling the clocks and before shutting down the IP.
1410 */
1411 if (oh->rst_lines_cnt == 1)
1412 _assert_hardreset(oh, oh->rst_lines[0].name);
1413
8d9af88f
TL
1414 /* Mux pins to safe mode or use populated off mode values */
1415 if (oh->mux)
1416 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1417
1418 oh->_state = _HWMOD_STATE_DISABLED;
1419
1420 return 0;
1421}
1422
63c85238
PW
1423/**
1424 * _setup - do initial configuration of omap_hwmod
1425 * @oh: struct omap_hwmod *
1426 *
1427 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1428 * OCP_SYSCONFIG register. Returns 0.
63c85238 1429 */
97d60162 1430static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1431{
9a23dfe1 1432 int i, r;
2092e5cc 1433 u8 postsetup_state;
97d60162 1434
48d54f3f
PW
1435 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1436 return 0;
1437
63c85238
PW
1438 /* Set iclk autoidle mode */
1439 if (oh->slaves_cnt > 0) {
682fdc96
BC
1440 for (i = 0; i < oh->slaves_cnt; i++) {
1441 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1442 struct clk *c = os->_clk;
1443
4d3ae5a9 1444 if (!c)
63c85238
PW
1445 continue;
1446
1447 if (os->flags & OCPIF_SWSUP_IDLE) {
1448 /* XXX omap_iclk_deny_idle(c); */
1449 } else {
1450 /* XXX omap_iclk_allow_idle(c); */
1451 clk_enable(c);
1452 }
1453 }
1454 }
1455
1456 oh->_state = _HWMOD_STATE_INITIALIZED;
1457
5365efbe
BC
1458 /*
1459 * In the case of hwmod with hardreset that should not be
1460 * de-assert at boot time, we have to keep the module
1461 * initialized, because we cannot enable it properly with the
1462 * reset asserted. Exit without warning because that behavior is
1463 * expected.
1464 */
1465 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1466 return 0;
1467
dc6d1cda 1468 r = _enable(oh);
9a23dfe1
BC
1469 if (r) {
1470 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1471 oh->name, oh->_state);
1472 return 0;
1473 }
63c85238 1474
b835d014 1475 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1476 _reset(oh);
1477
b835d014 1478 /*
76e5589e 1479 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1480 * The _enable() function should be split to
76e5589e 1481 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1482 */
43b40992 1483 if (oh->class->sysc) {
b835d014 1484 _update_sysc_cache(oh);
74ff3a68 1485 _enable_sysc(oh);
b835d014
PW
1486 }
1487 }
63c85238 1488
2092e5cc
PW
1489 postsetup_state = oh->_postsetup_state;
1490 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1491 postsetup_state = _HWMOD_STATE_ENABLED;
1492
1493 /*
1494 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1495 * it should be set by the core code as a runtime flag during startup
1496 */
1497 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1498 (postsetup_state == _HWMOD_STATE_IDLE))
1499 postsetup_state = _HWMOD_STATE_ENABLED;
1500
1501 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1502 _idle(oh);
2092e5cc
PW
1503 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1504 _shutdown(oh);
1505 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1506 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1507 oh->name, postsetup_state);
63c85238
PW
1508
1509 return 0;
1510}
1511
63c85238 1512/**
0102b627 1513 * _register - register a struct omap_hwmod
63c85238
PW
1514 * @oh: struct omap_hwmod *
1515 *
43b40992
PW
1516 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1517 * already has been registered by the same name; -EINVAL if the
1518 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1519 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1520 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1521 * success.
63c85238
PW
1522 *
1523 * XXX The data should be copied into bootmem, so the original data
1524 * should be marked __initdata and freed after init. This would allow
1525 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1526 * that the copy process would be relatively complex due to the large number
1527 * of substructures.
1528 */
01592df9 1529static int __init _register(struct omap_hwmod *oh)
63c85238 1530{
569edd70 1531 int ms_id;
63c85238 1532
43b40992
PW
1533 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1534 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1535 return -EINVAL;
1536
63c85238
PW
1537 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1538
ce35b244
BC
1539 if (_lookup(oh->name))
1540 return -EEXIST;
63c85238
PW
1541
1542 ms_id = _find_mpu_port_index(oh);
e7c7d760 1543 if (!IS_ERR_VALUE(ms_id))
63c85238 1544 oh->_mpu_port_index = ms_id;
e7c7d760 1545 else
63c85238 1546 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1547
1548 list_add_tail(&oh->node, &omap_hwmod_list);
1549
dc6d1cda 1550 spin_lock_init(&oh->_lock);
2092e5cc 1551
63c85238
PW
1552 oh->_state = _HWMOD_STATE_REGISTERED;
1553
569edd70
PW
1554 /*
1555 * XXX Rather than doing a strcmp(), this should test a flag
1556 * set in the hwmod data, inserted by the autogenerator code.
1557 */
1558 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1559 mpu_oh = oh;
63c85238 1560
569edd70 1561 return 0;
63c85238
PW
1562}
1563
0102b627
BC
1564
1565/* Public functions */
1566
1567u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1568{
1569 if (oh->flags & HWMOD_16BIT_REG)
1570 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1571 else
1572 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1573}
1574
1575void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1576{
1577 if (oh->flags & HWMOD_16BIT_REG)
1578 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1579 else
1580 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1581}
1582
1583/**
1584 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1585 * @oh: struct omap_hwmod *
1586 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1587 *
1588 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1589 * local copy. Intended to be used by drivers that have some erratum
1590 * that requires direct manipulation of the SIDLEMODE bits. Returns
1591 * -EINVAL if @oh is null, or passes along the return value from
1592 * _set_slave_idlemode().
1593 *
1594 * XXX Does this function have any current users? If not, we should
1595 * remove it; it is better to let the rest of the hwmod code handle this.
1596 * Any users of this function should be scrutinized carefully.
1597 */
1598int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1599{
1600 u32 v;
1601 int retval = 0;
1602
1603 if (!oh)
1604 return -EINVAL;
1605
1606 v = oh->_sysc_cache;
1607
1608 retval = _set_slave_idlemode(oh, idlemode, &v);
1609 if (!retval)
1610 _write_sysconfig(v, oh);
1611
1612 return retval;
1613}
1614
63c85238
PW
1615/**
1616 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1617 * @name: name of the omap_hwmod to look up
1618 *
1619 * Given a @name of an omap_hwmod, return a pointer to the registered
1620 * struct omap_hwmod *, or NULL upon error.
1621 */
1622struct omap_hwmod *omap_hwmod_lookup(const char *name)
1623{
1624 struct omap_hwmod *oh;
1625
1626 if (!name)
1627 return NULL;
1628
63c85238 1629 oh = _lookup(name);
63c85238
PW
1630
1631 return oh;
1632}
1633
1634/**
1635 * omap_hwmod_for_each - call function for each registered omap_hwmod
1636 * @fn: pointer to a callback function
97d60162 1637 * @data: void * data to pass to callback function
63c85238
PW
1638 *
1639 * Call @fn for each registered omap_hwmod, passing @data to each
1640 * function. @fn must return 0 for success or any other value for
1641 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1642 * will stop and the non-zero return value will be passed to the
1643 * caller of omap_hwmod_for_each(). @fn is called with
1644 * omap_hwmod_for_each() held.
1645 */
97d60162
PW
1646int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1647 void *data)
63c85238
PW
1648{
1649 struct omap_hwmod *temp_oh;
30ebad9d 1650 int ret = 0;
63c85238
PW
1651
1652 if (!fn)
1653 return -EINVAL;
1654
63c85238 1655 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1656 ret = (*fn)(temp_oh, data);
63c85238
PW
1657 if (ret)
1658 break;
1659 }
63c85238
PW
1660
1661 return ret;
1662}
1663
63c85238 1664/**
550c8092 1665 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1666 * @ohs: pointer to an array of omap_hwmods to register
1667 *
1668 * Intended to be called early in boot before the clock framework is
1669 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1670 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1671 */
550c8092 1672int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1673{
bac1a0f0 1674 int r, i;
63c85238
PW
1675
1676 if (!ohs)
1677 return 0;
1678
bac1a0f0
PW
1679 i = 0;
1680 do {
1681 if (!omap_chip_is(ohs[i]->omap_chip))
1682 continue;
1683
1684 r = _register(ohs[i]);
1685 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1686 r);
1687 } while (ohs[++i]);
63c85238
PW
1688
1689 return 0;
1690}
1691
e7c7d760
TL
1692/*
1693 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1694 *
a2debdbd 1695 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1696 * Assumes the caller takes care of locking if needed.
63c85238 1697 */
e7c7d760
TL
1698static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1699{
48d54f3f
PW
1700 if (oh->_state != _HWMOD_STATE_REGISTERED)
1701 return 0;
1702
e7c7d760
TL
1703 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1704 return 0;
1705
1706 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
e7c7d760
TL
1707
1708 return 0;
1709}
1710
63c85238 1711/**
a2debdbd
PW
1712 * omap_hwmod_setup_one - set up a single hwmod
1713 * @oh_name: const char * name of the already-registered hwmod to set up
1714 *
1715 * Must be called after omap2_clk_init(). Resolves the struct clk
1716 * names to struct clk pointers for each registered omap_hwmod. Also
1717 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1718 * success.
1719 */
1720int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1721{
1722 struct omap_hwmod *oh;
1723 int r;
1724
a2debdbd
PW
1725 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1726
1727 if (!mpu_oh) {
1728 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1729 oh_name, MPU_INITIATOR_NAME);
63c85238 1730 return -EINVAL;
a2debdbd 1731 }
63c85238 1732
a2debdbd
PW
1733 oh = _lookup(oh_name);
1734 if (!oh) {
1735 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1736 return -EINVAL;
1737 }
63c85238 1738
a2debdbd
PW
1739 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1740 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1741
a2debdbd
PW
1742 r = _populate_mpu_rt_base(oh, NULL);
1743 if (IS_ERR_VALUE(r)) {
1744 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1745 return -EINVAL;
1746 }
1747
1748 r = _init_clocks(oh, NULL);
1749 if (IS_ERR_VALUE(r)) {
1750 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1751 return -EINVAL;
63c85238
PW
1752 }
1753
a2debdbd
PW
1754 _setup(oh, NULL);
1755
63c85238
PW
1756 return 0;
1757}
1758
1759/**
550c8092 1760 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
1761 *
1762 * Must be called after omap2_clk_init(). Resolves the struct clk names
1763 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 1764 * _setup() on each hwmod. Returns 0 upon success.
63c85238 1765 */
550c8092 1766static int __init omap_hwmod_setup_all(void)
63c85238
PW
1767{
1768 int r;
1769
569edd70
PW
1770 if (!mpu_oh) {
1771 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1772 __func__, MPU_INITIATOR_NAME);
1773 return -EINVAL;
1774 }
1775
e7c7d760 1776 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 1777
97d60162 1778 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
1779 WARN(IS_ERR_VALUE(r),
1780 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 1781
2092e5cc 1782 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1783
1784 return 0;
1785}
550c8092 1786core_initcall(omap_hwmod_setup_all);
63c85238 1787
63c85238
PW
1788/**
1789 * omap_hwmod_enable - enable an omap_hwmod
1790 * @oh: struct omap_hwmod *
1791 *
74ff3a68 1792 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1793 * Returns -EINVAL on error or passes along the return value from _enable().
1794 */
1795int omap_hwmod_enable(struct omap_hwmod *oh)
1796{
1797 int r;
dc6d1cda 1798 unsigned long flags;
63c85238
PW
1799
1800 if (!oh)
1801 return -EINVAL;
1802
dc6d1cda
PW
1803 spin_lock_irqsave(&oh->_lock, flags);
1804 r = _enable(oh);
1805 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1806
1807 return r;
1808}
1809
1810/**
1811 * omap_hwmod_idle - idle an omap_hwmod
1812 * @oh: struct omap_hwmod *
1813 *
74ff3a68 1814 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1815 * Returns -EINVAL on error or passes along the return value from _idle().
1816 */
1817int omap_hwmod_idle(struct omap_hwmod *oh)
1818{
dc6d1cda
PW
1819 unsigned long flags;
1820
63c85238
PW
1821 if (!oh)
1822 return -EINVAL;
1823
dc6d1cda
PW
1824 spin_lock_irqsave(&oh->_lock, flags);
1825 _idle(oh);
1826 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1827
1828 return 0;
1829}
1830
1831/**
1832 * omap_hwmod_shutdown - shutdown an omap_hwmod
1833 * @oh: struct omap_hwmod *
1834 *
74ff3a68 1835 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1836 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1837 * the return value from _shutdown().
1838 */
1839int omap_hwmod_shutdown(struct omap_hwmod *oh)
1840{
dc6d1cda
PW
1841 unsigned long flags;
1842
63c85238
PW
1843 if (!oh)
1844 return -EINVAL;
1845
dc6d1cda 1846 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1847 _shutdown(oh);
dc6d1cda 1848 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1849
1850 return 0;
1851}
1852
1853/**
1854 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1855 * @oh: struct omap_hwmod *oh
1856 *
1857 * Intended to be called by the omap_device code.
1858 */
1859int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1860{
dc6d1cda
PW
1861 unsigned long flags;
1862
1863 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1864 _enable_clocks(oh);
dc6d1cda 1865 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1866
1867 return 0;
1868}
1869
1870/**
1871 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1872 * @oh: struct omap_hwmod *oh
1873 *
1874 * Intended to be called by the omap_device code.
1875 */
1876int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1877{
dc6d1cda
PW
1878 unsigned long flags;
1879
1880 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1881 _disable_clocks(oh);
dc6d1cda 1882 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1883
1884 return 0;
1885}
1886
1887/**
1888 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1889 * @oh: struct omap_hwmod *oh
1890 *
1891 * Intended to be called by drivers and core code when all posted
1892 * writes to a device must complete before continuing further
1893 * execution (for example, after clearing some device IRQSTATUS
1894 * register bits)
1895 *
1896 * XXX what about targets with multiple OCP threads?
1897 */
1898void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1899{
1900 BUG_ON(!oh);
1901
43b40992 1902 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1903 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1904 "device configuration\n", oh->name);
1905 return;
1906 }
1907
1908 /*
1909 * Forces posted writes to complete on the OCP thread handling
1910 * register writes
1911 */
cc7a1d2a 1912 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1913}
1914
1915/**
1916 * omap_hwmod_reset - reset the hwmod
1917 * @oh: struct omap_hwmod *
1918 *
1919 * Under some conditions, a driver may wish to reset the entire device.
1920 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1921 * the return value from _reset().
63c85238
PW
1922 */
1923int omap_hwmod_reset(struct omap_hwmod *oh)
1924{
1925 int r;
dc6d1cda 1926 unsigned long flags;
63c85238 1927
9b579114 1928 if (!oh)
63c85238
PW
1929 return -EINVAL;
1930
dc6d1cda 1931 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1932 r = _reset(oh);
dc6d1cda 1933 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1934
1935 return r;
1936}
1937
1938/**
1939 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1940 * @oh: struct omap_hwmod *
1941 * @res: pointer to the first element of an array of struct resource to fill
1942 *
1943 * Count the number of struct resource array elements necessary to
1944 * contain omap_hwmod @oh resources. Intended to be called by code
1945 * that registers omap_devices. Intended to be used to determine the
1946 * size of a dynamically-allocated struct resource array, before
1947 * calling omap_hwmod_fill_resources(). Returns the number of struct
1948 * resource array elements needed.
1949 *
1950 * XXX This code is not optimized. It could attempt to merge adjacent
1951 * resource IDs.
1952 *
1953 */
1954int omap_hwmod_count_resources(struct omap_hwmod *oh)
1955{
1956 int ret, i;
1957
9ee9fff9 1958 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1959
1960 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1961 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1962
1963 return ret;
1964}
1965
1966/**
1967 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1968 * @oh: struct omap_hwmod *
1969 * @res: pointer to the first element of an array of struct resource to fill
1970 *
1971 * Fill the struct resource array @res with resource data from the
1972 * omap_hwmod @oh. Intended to be called by code that registers
1973 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1974 * number of array elements filled.
1975 */
1976int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1977{
1978 int i, j;
1979 int r = 0;
1980
1981 /* For each IRQ, DMA, memory area, fill in array.*/
1982
1983 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1984 (res + r)->name = (oh->mpu_irqs + i)->name;
1985 (res + r)->start = (oh->mpu_irqs + i)->irq;
1986 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1987 (res + r)->flags = IORESOURCE_IRQ;
1988 r++;
1989 }
1990
9ee9fff9
BC
1991 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1992 (res + r)->name = (oh->sdma_reqs + i)->name;
1993 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1994 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
1995 (res + r)->flags = IORESOURCE_DMA;
1996 r++;
1997 }
1998
1999 for (i = 0; i < oh->slaves_cnt; i++) {
2000 struct omap_hwmod_ocp_if *os;
2001
682fdc96 2002 os = oh->slaves[i];
63c85238
PW
2003
2004 for (j = 0; j < os->addr_cnt; j++) {
cd503802 2005 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2006 (res + r)->start = (os->addr + j)->pa_start;
2007 (res + r)->end = (os->addr + j)->pa_end;
2008 (res + r)->flags = IORESOURCE_MEM;
2009 r++;
2010 }
2011 }
2012
2013 return r;
2014}
2015
2016/**
2017 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2018 * @oh: struct omap_hwmod *
2019 *
2020 * Return the powerdomain pointer associated with the OMAP module
2021 * @oh's main clock. If @oh does not have a main clk, return the
2022 * powerdomain associated with the interface clock associated with the
2023 * module's MPU port. (XXX Perhaps this should use the SDMA port
2024 * instead?) Returns NULL on error, or a struct powerdomain * on
2025 * success.
2026 */
2027struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2028{
2029 struct clk *c;
2030
2031 if (!oh)
2032 return NULL;
2033
2034 if (oh->_clk) {
2035 c = oh->_clk;
2036 } else {
2037 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2038 return NULL;
2039 c = oh->slaves[oh->_mpu_port_index]->_clk;
2040 }
2041
d5647c18
TG
2042 if (!c->clkdm)
2043 return NULL;
2044
63c85238
PW
2045 return c->clkdm->pwrdm.ptr;
2046
2047}
2048
db2a60bf
PW
2049/**
2050 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2051 * @oh: struct omap_hwmod *
2052 *
2053 * Returns the virtual address corresponding to the beginning of the
2054 * module's register target, in the address range that is intended to
2055 * be used by the MPU. Returns the virtual address upon success or NULL
2056 * upon error.
2057 */
2058void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2059{
2060 if (!oh)
2061 return NULL;
2062
2063 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2064 return NULL;
2065
2066 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2067 return NULL;
2068
2069 return oh->_mpu_rt_va;
2070}
2071
63c85238
PW
2072/**
2073 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2074 * @oh: struct omap_hwmod *
2075 * @init_oh: struct omap_hwmod * (initiator)
2076 *
2077 * Add a sleep dependency between the initiator @init_oh and @oh.
2078 * Intended to be called by DSP/Bridge code via platform_data for the
2079 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2080 * code needs to add/del initiator dependencies dynamically
2081 * before/after accessing a device. Returns the return value from
2082 * _add_initiator_dep().
2083 *
2084 * XXX Keep a usecount in the clockdomain code
2085 */
2086int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2087 struct omap_hwmod *init_oh)
2088{
2089 return _add_initiator_dep(oh, init_oh);
2090}
2091
2092/*
2093 * XXX what about functions for drivers to save/restore ocp_sysconfig
2094 * for context save/restore operations?
2095 */
2096
2097/**
2098 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2099 * @oh: struct omap_hwmod *
2100 * @init_oh: struct omap_hwmod * (initiator)
2101 *
2102 * Remove a sleep dependency between the initiator @init_oh and @oh.
2103 * Intended to be called by DSP/Bridge code via platform_data for the
2104 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2105 * code needs to add/del initiator dependencies dynamically
2106 * before/after accessing a device. Returns the return value from
2107 * _del_initiator_dep().
2108 *
2109 * XXX Keep a usecount in the clockdomain code
2110 */
2111int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2112 struct omap_hwmod *init_oh)
2113{
2114 return _del_initiator_dep(oh, init_oh);
2115}
2116
63c85238
PW
2117/**
2118 * omap_hwmod_enable_wakeup - allow device to wake up the system
2119 * @oh: struct omap_hwmod *
2120 *
2121 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2122 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2123 * registers to cause the PRCM to receive wakeup events from the
2124 * module. Does not set any wakeup routing registers beyond this
2125 * point - if the module is to wake up any other module or subsystem,
2126 * that must be set separately. Called by omap_device code. Returns
2127 * -EINVAL on error or 0 upon success.
2128 */
2129int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2130{
dc6d1cda 2131 unsigned long flags;
5a7ddcbd 2132 u32 v;
dc6d1cda 2133
43b40992
PW
2134 if (!oh->class->sysc ||
2135 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2136 return -EINVAL;
2137
dc6d1cda 2138 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2139 v = oh->_sysc_cache;
2140 _enable_wakeup(oh, &v);
2141 _write_sysconfig(v, oh);
dc6d1cda 2142 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2143
2144 return 0;
2145}
2146
2147/**
2148 * omap_hwmod_disable_wakeup - prevent device from waking the system
2149 * @oh: struct omap_hwmod *
2150 *
2151 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2152 * from sending wakeups to the PRCM. Eventually this should clear
2153 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2154 * from the module. Does not set any wakeup routing registers beyond
2155 * this point - if the module is to wake up any other module or
2156 * subsystem, that must be set separately. Called by omap_device
2157 * code. Returns -EINVAL on error or 0 upon success.
2158 */
2159int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2160{
dc6d1cda 2161 unsigned long flags;
5a7ddcbd 2162 u32 v;
dc6d1cda 2163
43b40992
PW
2164 if (!oh->class->sysc ||
2165 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2166 return -EINVAL;
2167
dc6d1cda 2168 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2169 v = oh->_sysc_cache;
2170 _disable_wakeup(oh, &v);
2171 _write_sysconfig(v, oh);
dc6d1cda 2172 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2173
2174 return 0;
2175}
43b40992 2176
aee48e3c
PW
2177/**
2178 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2179 * contained in the hwmod module.
2180 * @oh: struct omap_hwmod *
2181 * @name: name of the reset line to lookup and assert
2182 *
2183 * Some IP like dsp, ipu or iva contain processor that require
2184 * an HW reset line to be assert / deassert in order to enable fully
2185 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2186 * yet supported on this OMAP; otherwise, passes along the return value
2187 * from _assert_hardreset().
2188 */
2189int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2190{
2191 int ret;
dc6d1cda 2192 unsigned long flags;
aee48e3c
PW
2193
2194 if (!oh)
2195 return -EINVAL;
2196
dc6d1cda 2197 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2198 ret = _assert_hardreset(oh, name);
dc6d1cda 2199 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2200
2201 return ret;
2202}
2203
2204/**
2205 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2206 * contained in the hwmod module.
2207 * @oh: struct omap_hwmod *
2208 * @name: name of the reset line to look up and deassert
2209 *
2210 * Some IP like dsp, ipu or iva contain processor that require
2211 * an HW reset line to be assert / deassert in order to enable fully
2212 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2213 * yet supported on this OMAP; otherwise, passes along the return value
2214 * from _deassert_hardreset().
2215 */
2216int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2217{
2218 int ret;
dc6d1cda 2219 unsigned long flags;
aee48e3c
PW
2220
2221 if (!oh)
2222 return -EINVAL;
2223
dc6d1cda 2224 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2225 ret = _deassert_hardreset(oh, name);
dc6d1cda 2226 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2227
2228 return ret;
2229}
2230
2231/**
2232 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2233 * contained in the hwmod module
2234 * @oh: struct omap_hwmod *
2235 * @name: name of the reset line to look up and read
2236 *
2237 * Return the current state of the hwmod @oh's reset line named @name:
2238 * returns -EINVAL upon parameter error or if this operation
2239 * is unsupported on the current OMAP; otherwise, passes along the return
2240 * value from _read_hardreset().
2241 */
2242int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2243{
2244 int ret;
dc6d1cda 2245 unsigned long flags;
aee48e3c
PW
2246
2247 if (!oh)
2248 return -EINVAL;
2249
dc6d1cda 2250 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2251 ret = _read_hardreset(oh, name);
dc6d1cda 2252 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2253
2254 return ret;
2255}
2256
2257
43b40992
PW
2258/**
2259 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2260 * @classname: struct omap_hwmod_class name to search for
2261 * @fn: callback function pointer to call for each hwmod in class @classname
2262 * @user: arbitrary context data to pass to the callback function
2263 *
ce35b244
BC
2264 * For each omap_hwmod of class @classname, call @fn.
2265 * If the callback function returns something other than
43b40992
PW
2266 * zero, the iterator is terminated, and the callback function's return
2267 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2268 * if @classname or @fn are NULL, or passes back the error code from @fn.
2269 */
2270int omap_hwmod_for_each_by_class(const char *classname,
2271 int (*fn)(struct omap_hwmod *oh,
2272 void *user),
2273 void *user)
2274{
2275 struct omap_hwmod *temp_oh;
2276 int ret = 0;
2277
2278 if (!classname || !fn)
2279 return -EINVAL;
2280
2281 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2282 __func__, classname);
2283
43b40992
PW
2284 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2285 if (!strcmp(temp_oh->class->name, classname)) {
2286 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2287 __func__, temp_oh->name);
2288 ret = (*fn)(temp_oh, user);
2289 if (ret)
2290 break;
2291 }
2292 }
2293
43b40992
PW
2294 if (ret)
2295 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2296 __func__, ret);
2297
2298 return ret;
2299}
2300
2092e5cc
PW
2301/**
2302 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2303 * @oh: struct omap_hwmod *
2304 * @state: state that _setup() should leave the hwmod in
2305 *
550c8092 2306 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2307 * (called by omap_hwmod_setup_*()). Only valid to call between
2308 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2309 * 0 upon success or -EINVAL if there is a problem with the arguments
2310 * or if the hwmod is in the wrong state.
2092e5cc
PW
2311 */
2312int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2313{
2314 int ret;
dc6d1cda 2315 unsigned long flags;
2092e5cc
PW
2316
2317 if (!oh)
2318 return -EINVAL;
2319
2320 if (state != _HWMOD_STATE_DISABLED &&
2321 state != _HWMOD_STATE_ENABLED &&
2322 state != _HWMOD_STATE_IDLE)
2323 return -EINVAL;
2324
dc6d1cda 2325 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2326
2327 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2328 ret = -EINVAL;
2329 goto ohsps_unlock;
2330 }
2331
2332 oh->_postsetup_state = state;
2333 ret = 0;
2334
2335ohsps_unlock:
dc6d1cda 2336 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2337
2338 return ret;
2339}
c80705aa
KH
2340
2341/**
2342 * omap_hwmod_get_context_loss_count - get lost context count
2343 * @oh: struct omap_hwmod *
2344 *
2345 * Query the powerdomain of of @oh to get the context loss
2346 * count for this device.
2347 *
2348 * Returns the context loss count of the powerdomain assocated with @oh
2349 * upon success, or zero if no powerdomain exists for @oh.
2350 */
2351u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2352{
2353 struct powerdomain *pwrdm;
2354 int ret = 0;
2355
2356 pwrdm = omap_hwmod_get_pwrdm(oh);
2357 if (pwrdm)
2358 ret = pwrdm_get_context_loss_count(pwrdm);
2359
2360 return ret;
2361}
43b01643
PW
2362
2363/**
2364 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2365 * @oh: struct omap_hwmod *
2366 *
2367 * Prevent the hwmod @oh from being reset during the setup process.
2368 * Intended for use by board-*.c files on boards with devices that
2369 * cannot tolerate being reset. Must be called before the hwmod has
2370 * been set up. Returns 0 upon success or negative error code upon
2371 * failure.
2372 */
2373int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2374{
2375 if (!oh)
2376 return -EINVAL;
2377
2378 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2379 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2380 oh->name);
2381 return -EINVAL;
2382 }
2383
2384 oh->flags |= HWMOD_INIT_NO_RESET;
2385
2386 return 0;
2387}