ARM: OMAP2+: hwmod: add _find_mpu_rt_port()
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
63c85238 140
4e65331c 141#include "common.h"
ce491cf8 142#include <plat/cpu.h>
1540f214 143#include "clockdomain.h"
72e06d08 144#include "powerdomain.h"
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145#include <plat/clock.h>
146#include <plat/omap_hwmod.h>
5365efbe 147#include <plat/prcm.h>
63c85238 148
59fb659b 149#include "cm2xxx_3xxx.h"
d0f0631d 150#include "cminst44xx.h"
59fb659b 151#include "prm2xxx_3xxx.h"
d198b514 152#include "prm44xx.h"
eaac329d 153#include "prminst44xx.h"
8d9af88f 154#include "mux.h"
63c85238 155
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156/* Maximum microseconds to wait for OMAP module to softreset */
157#define MAX_MODULE_SOFTRESET_WAIT 10000
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158
159/* Name of the OMAP hwmod for the MPU */
5c2c0296 160#define MPU_INITIATOR_NAME "mpu"
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161
162/* omap_hwmod_list contains all registered struct omap_hwmods */
163static LIST_HEAD(omap_hwmod_list);
164
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165/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
166static struct omap_hwmod *mpu_oh;
167
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168
169/* Private functions */
170
171/**
172 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
173 * @oh: struct omap_hwmod *
174 *
175 * Load the current value of the hwmod OCP_SYSCONFIG register into the
176 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
177 * OCP_SYSCONFIG register or 0 upon success.
178 */
179static int _update_sysc_cache(struct omap_hwmod *oh)
180{
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181 if (!oh->class->sysc) {
182 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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183 return -EINVAL;
184 }
185
186 /* XXX ensure module interface clock is up */
187
cc7a1d2a 188 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 189
43b40992 190 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 191 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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192
193 return 0;
194}
195
196/**
197 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
198 * @v: OCP_SYSCONFIG value to write
199 * @oh: struct omap_hwmod *
200 *
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201 * Write @v into the module class' OCP_SYSCONFIG register, if it has
202 * one. No return value.
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203 */
204static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
205{
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206 if (!oh->class->sysc) {
207 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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208 return;
209 }
210
211 /* XXX ensure module interface clock is up */
212
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213 /* Module might have lost context, always update cache and register */
214 oh->_sysc_cache = v;
215 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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216}
217
218/**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
228static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230{
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231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
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234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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236 return -EINVAL;
237
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238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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240 return -EINVAL;
241 }
242
43b40992 243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
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248
249 return 0;
250}
251
252/**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
262static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263{
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264 u32 sidle_mask;
265 u8 sidle_shift;
266
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267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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269 return -EINVAL;
270
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271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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273 return -EINVAL;
274 }
275
43b40992 276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
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281
282 return 0;
283}
284
285/**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
296static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297{
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298 u32 clkact_mask;
299 u8 clkact_shift;
300
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301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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303 return -EINVAL;
304
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305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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307 return -EINVAL;
308 }
309
43b40992 310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
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315
316 return 0;
317}
318
319/**
320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
327static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328{
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329 u32 softrst_mask;
330
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331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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333 return -EINVAL;
334
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335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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337 return -EINVAL;
338 }
339
43b40992 340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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341
342 *v |= softrst_mask;
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343
344 return 0;
345}
346
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347/**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
360static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362{
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TG
363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
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366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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368 return -EINVAL;
369
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370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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TG
372 return -EINVAL;
373 }
374
43b40992 375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 376 autoidle_mask = (0x1 << autoidle_shift);
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TG
377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
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380
381 return 0;
382}
383
eceec009
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384/**
385 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
386 * @oh: struct omap_hwmod *
387 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
388 *
389 * Set or clear the I/O pad wakeup flag in the mux entries for the
390 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
391 * in memory. If the hwmod is currently idled, and the new idle
392 * values don't match the previous ones, this function will also
393 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
394 * currently idled, this function won't touch the hardware: the new
395 * mux settings are written to the SCM PADCTRL registers when the
396 * hwmod is idled. No return value.
397 */
398static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
399{
400 struct omap_device_pad *pad;
401 bool change = false;
402 u16 prev_idle;
403 int j;
404
405 if (!oh->mux || !oh->mux->enabled)
406 return;
407
408 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
409 pad = oh->mux->pads_dynamic[j];
410
411 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
412 continue;
413
414 prev_idle = pad->idle;
415
416 if (set_wake)
417 pad->idle |= OMAP_WAKEUP_EN;
418 else
419 pad->idle &= ~OMAP_WAKEUP_EN;
420
421 if (prev_idle != pad->idle)
422 change = true;
423 }
424
425 if (change && oh->_state == _HWMOD_STATE_IDLE)
426 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
427}
428
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429/**
430 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
431 * @oh: struct omap_hwmod *
432 *
433 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
434 * upon error or 0 upon success.
435 */
5a7ddcbd 436static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 437{
43b40992 438 if (!oh->class->sysc ||
86009eb3 439 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
440 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
441 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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442 return -EINVAL;
443
43b40992
PW
444 if (!oh->class->sysc->sysc_fields) {
445 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
446 return -EINVAL;
447 }
448
1fe74113
BC
449 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
450 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 451
86009eb3
BC
452 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
453 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
454 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
455 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 456
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457 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
458
459 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
460
461 return 0;
462}
463
464/**
465 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
466 * @oh: struct omap_hwmod *
467 *
468 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
469 * upon error or 0 upon success.
470 */
5a7ddcbd 471static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 472{
43b40992 473 if (!oh->class->sysc ||
86009eb3 474 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
475 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
476 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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477 return -EINVAL;
478
43b40992
PW
479 if (!oh->class->sysc->sysc_fields) {
480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
481 return -EINVAL;
482 }
483
1fe74113
BC
484 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
485 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 486
86009eb3
BC
487 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
488 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
489 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
490 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 491
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492 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
493
494 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
495
496 return 0;
497}
498
499/**
500 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
501 * @oh: struct omap_hwmod *
502 *
503 * Prevent the hardware module @oh from entering idle while the
504 * hardare module initiator @init_oh is active. Useful when a module
505 * will be accessed by a particular initiator (e.g., if a module will
506 * be accessed by the IVA, there should be a sleepdep between the IVA
507 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
508 * mode. If the clockdomain is marked as not needing autodeps, return
509 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
510 * passes along clkdm_add_sleepdep() value upon success.
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511 */
512static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
513{
514 if (!oh->_clk)
515 return -EINVAL;
516
570b54c7
PW
517 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
518 return 0;
519
55ed9694 520 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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521}
522
523/**
524 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
525 * @oh: struct omap_hwmod *
526 *
527 * Allow the hardware module @oh to enter idle while the hardare
528 * module initiator @init_oh is active. Useful when a module will not
529 * be accessed by a particular initiator (e.g., if a module will not
530 * be accessed by the IVA, there should be no sleepdep between the IVA
531 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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532 * mode. If the clockdomain is marked as not needing autodeps, return
533 * 0 without doing anything. Returns -EINVAL upon error or passes
534 * along clkdm_del_sleepdep() value upon success.
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535 */
536static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
537{
538 if (!oh->_clk)
539 return -EINVAL;
540
570b54c7
PW
541 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
542 return 0;
543
55ed9694 544 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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545}
546
547/**
548 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
549 * @oh: struct omap_hwmod *
550 *
551 * Called from _init_clocks(). Populates the @oh _clk (main
552 * functional clock pointer) if a main_clk is present. Returns 0 on
553 * success or -EINVAL on error.
554 */
555static int _init_main_clk(struct omap_hwmod *oh)
556{
63c85238
PW
557 int ret = 0;
558
50ebdac2 559 if (!oh->main_clk)
63c85238
PW
560 return 0;
561
63403384 562 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 563 if (!oh->_clk) {
20383d82
BC
564 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
565 oh->name, oh->main_clk);
63403384 566 return -EINVAL;
dc75925d 567 }
63c85238 568
63403384
BC
569 if (!oh->_clk->clkdm)
570 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
571 oh->main_clk, oh->_clk->name);
81d7c6ff 572
63c85238
PW
573 return ret;
574}
575
576/**
887adeac 577 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
578 * @oh: struct omap_hwmod *
579 *
580 * Called from _init_clocks(). Populates the @oh OCP slave interface
581 * clock pointers. Returns 0 on success or -EINVAL on error.
582 */
583static int _init_interface_clks(struct omap_hwmod *oh)
584{
63c85238
PW
585 struct clk *c;
586 int i;
587 int ret = 0;
588
589 if (oh->slaves_cnt == 0)
590 return 0;
591
682fdc96
BC
592 for (i = 0; i < oh->slaves_cnt; i++) {
593 struct omap_hwmod_ocp_if *os = oh->slaves[i];
594
50ebdac2 595 if (!os->clk)
63c85238
PW
596 continue;
597
50ebdac2 598 c = omap_clk_get_by_name(os->clk);
dc75925d 599 if (!c) {
20383d82
BC
600 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
601 oh->name, os->clk);
63c85238 602 ret = -EINVAL;
dc75925d 603 }
63c85238
PW
604 os->_clk = c;
605 }
606
607 return ret;
608}
609
610/**
611 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
612 * @oh: struct omap_hwmod *
613 *
614 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
615 * clock pointers. Returns 0 on success or -EINVAL on error.
616 */
617static int _init_opt_clks(struct omap_hwmod *oh)
618{
619 struct omap_hwmod_opt_clk *oc;
620 struct clk *c;
621 int i;
622 int ret = 0;
623
624 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 625 c = omap_clk_get_by_name(oc->clk);
dc75925d 626 if (!c) {
20383d82
BC
627 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
628 oh->name, oc->clk);
63c85238 629 ret = -EINVAL;
dc75925d 630 }
63c85238
PW
631 oc->_clk = c;
632 }
633
634 return ret;
635}
636
637/**
638 * _enable_clocks - enable hwmod main clock and interface clocks
639 * @oh: struct omap_hwmod *
640 *
641 * Enables all clocks necessary for register reads and writes to succeed
642 * on the hwmod @oh. Returns 0.
643 */
644static int _enable_clocks(struct omap_hwmod *oh)
645{
63c85238
PW
646 int i;
647
648 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
649
4d3ae5a9 650 if (oh->_clk)
63c85238
PW
651 clk_enable(oh->_clk);
652
653 if (oh->slaves_cnt > 0) {
682fdc96
BC
654 for (i = 0; i < oh->slaves_cnt; i++) {
655 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
656 struct clk *c = os->_clk;
657
4d3ae5a9 658 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
659 clk_enable(c);
660 }
661 }
662
663 /* The opt clocks are controlled by the device driver. */
664
665 return 0;
666}
667
668/**
669 * _disable_clocks - disable hwmod main clock and interface clocks
670 * @oh: struct omap_hwmod *
671 *
672 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
673 */
674static int _disable_clocks(struct omap_hwmod *oh)
675{
63c85238
PW
676 int i;
677
678 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
679
4d3ae5a9 680 if (oh->_clk)
63c85238
PW
681 clk_disable(oh->_clk);
682
683 if (oh->slaves_cnt > 0) {
682fdc96
BC
684 for (i = 0; i < oh->slaves_cnt; i++) {
685 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
686 struct clk *c = os->_clk;
687
4d3ae5a9 688 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
689 clk_disable(c);
690 }
691 }
692
693 /* The opt clocks are controlled by the device driver. */
694
695 return 0;
696}
697
96835af9
BC
698static void _enable_optional_clocks(struct omap_hwmod *oh)
699{
700 struct omap_hwmod_opt_clk *oc;
701 int i;
702
703 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
704
705 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
706 if (oc->_clk) {
707 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
708 oc->_clk->name);
709 clk_enable(oc->_clk);
710 }
711}
712
713static void _disable_optional_clocks(struct omap_hwmod *oh)
714{
715 struct omap_hwmod_opt_clk *oc;
716 int i;
717
718 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
719
720 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
721 if (oc->_clk) {
722 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
723 oc->_clk->name);
724 clk_disable(oc->_clk);
725 }
726}
727
45c38252
BC
728/**
729 * _enable_module - enable CLKCTRL modulemode on OMAP4
730 * @oh: struct omap_hwmod *
731 *
732 * Enables the PRCM module mode related to the hwmod @oh.
733 * No return value.
734 */
735static void _enable_module(struct omap_hwmod *oh)
736{
737 /* The module mode does not exist prior OMAP4 */
738 if (cpu_is_omap24xx() || cpu_is_omap34xx())
739 return;
740
741 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
742 return;
743
744 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
745 oh->name, oh->prcm.omap4.modulemode);
746
747 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
748 oh->clkdm->prcm_partition,
749 oh->clkdm->cm_inst,
750 oh->clkdm->clkdm_offs,
751 oh->prcm.omap4.clkctrl_offs);
752}
753
754/**
bfc141e3
BC
755 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
756 * @oh: struct omap_hwmod *
757 *
758 * Wait for a module @oh to enter slave idle. Returns 0 if the module
759 * does not have an IDLEST bit or if the module successfully enters
760 * slave idle; otherwise, pass along the return value of the
761 * appropriate *_cm*_wait_module_idle() function.
762 */
763static int _omap4_wait_target_disable(struct omap_hwmod *oh)
764{
765 if (!cpu_is_omap44xx())
766 return 0;
767
768 if (!oh)
769 return -EINVAL;
770
771 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
772 return 0;
773
774 if (oh->flags & HWMOD_NO_IDLEST)
775 return 0;
776
777 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
778 oh->clkdm->cm_inst,
779 oh->clkdm->clkdm_offs,
780 oh->prcm.omap4.clkctrl_offs);
781}
782
212738a4
PW
783/**
784 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
785 * @oh: struct omap_hwmod *oh
786 *
787 * Count and return the number of MPU IRQs associated with the hwmod
788 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
789 * NULL.
790 */
791static int _count_mpu_irqs(struct omap_hwmod *oh)
792{
793 struct omap_hwmod_irq_info *ohii;
794 int i = 0;
795
796 if (!oh || !oh->mpu_irqs)
797 return 0;
798
799 do {
800 ohii = &oh->mpu_irqs[i++];
801 } while (ohii->irq != -1);
802
cc1b0765 803 return i-1;
212738a4
PW
804}
805
bc614958
PW
806/**
807 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
808 * @oh: struct omap_hwmod *oh
809 *
810 * Count and return the number of SDMA request lines associated with
811 * the hwmod @oh. Used to allocate struct resource data. Returns 0
812 * if @oh is NULL.
813 */
814static int _count_sdma_reqs(struct omap_hwmod *oh)
815{
816 struct omap_hwmod_dma_info *ohdi;
817 int i = 0;
818
819 if (!oh || !oh->sdma_reqs)
820 return 0;
821
822 do {
823 ohdi = &oh->sdma_reqs[i++];
824 } while (ohdi->dma_req != -1);
825
cc1b0765 826 return i-1;
bc614958
PW
827}
828
78183f3f
PW
829/**
830 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
831 * @oh: struct omap_hwmod *oh
832 *
833 * Count and return the number of address space ranges associated with
834 * the hwmod @oh. Used to allocate struct resource data. Returns 0
835 * if @oh is NULL.
836 */
837static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
838{
839 struct omap_hwmod_addr_space *mem;
840 int i = 0;
841
842 if (!os || !os->addr)
843 return 0;
844
845 do {
846 mem = &os->addr[i++];
847 } while (mem->pa_start != mem->pa_end);
848
cc1b0765 849 return i-1;
78183f3f
PW
850}
851
5e8370f1
PW
852/**
853 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
854 * @oh: struct omap_hwmod * to operate on
855 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
856 * @irq: pointer to an unsigned int to store the MPU IRQ number to
857 *
858 * Retrieve a MPU hardware IRQ line number named by @name associated
859 * with the IP block pointed to by @oh. The IRQ number will be filled
860 * into the address pointed to by @dma. When @name is non-null, the
861 * IRQ line number associated with the named entry will be returned.
862 * If @name is null, the first matching entry will be returned. Data
863 * order is not meaningful in hwmod data, so callers are strongly
864 * encouraged to use a non-null @name whenever possible to avoid
865 * unpredictable effects if hwmod data is later added that causes data
866 * ordering to change. Returns 0 upon success or a negative error
867 * code upon error.
868 */
869static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
870 unsigned int *irq)
871{
872 int i;
873 bool found = false;
874
875 if (!oh->mpu_irqs)
876 return -ENOENT;
877
878 i = 0;
879 while (oh->mpu_irqs[i].irq != -1) {
880 if (name == oh->mpu_irqs[i].name ||
881 !strcmp(name, oh->mpu_irqs[i].name)) {
882 found = true;
883 break;
884 }
885 i++;
886 }
887
888 if (!found)
889 return -ENOENT;
890
891 *irq = oh->mpu_irqs[i].irq;
892
893 return 0;
894}
895
896/**
897 * _get_sdma_req_by_name - fetch SDMA request line ID by name
898 * @oh: struct omap_hwmod * to operate on
899 * @name: pointer to the name of the SDMA request line to fetch (optional)
900 * @dma: pointer to an unsigned int to store the request line ID to
901 *
902 * Retrieve an SDMA request line ID named by @name on the IP block
903 * pointed to by @oh. The ID will be filled into the address pointed
904 * to by @dma. When @name is non-null, the request line ID associated
905 * with the named entry will be returned. If @name is null, the first
906 * matching entry will be returned. Data order is not meaningful in
907 * hwmod data, so callers are strongly encouraged to use a non-null
908 * @name whenever possible to avoid unpredictable effects if hwmod
909 * data is later added that causes data ordering to change. Returns 0
910 * upon success or a negative error code upon error.
911 */
912static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
913 unsigned int *dma)
914{
915 int i;
916 bool found = false;
917
918 if (!oh->sdma_reqs)
919 return -ENOENT;
920
921 i = 0;
922 while (oh->sdma_reqs[i].dma_req != -1) {
923 if (name == oh->sdma_reqs[i].name ||
924 !strcmp(name, oh->sdma_reqs[i].name)) {
925 found = true;
926 break;
927 }
928 i++;
929 }
930
931 if (!found)
932 return -ENOENT;
933
934 *dma = oh->sdma_reqs[i].dma_req;
935
936 return 0;
937}
938
939/**
940 * _get_addr_space_by_name - fetch address space start & end by name
941 * @oh: struct omap_hwmod * to operate on
942 * @name: pointer to the name of the address space to fetch (optional)
943 * @pa_start: pointer to a u32 to store the starting address to
944 * @pa_end: pointer to a u32 to store the ending address to
945 *
946 * Retrieve address space start and end addresses for the IP block
947 * pointed to by @oh. The data will be filled into the addresses
948 * pointed to by @pa_start and @pa_end. When @name is non-null, the
949 * address space data associated with the named entry will be
950 * returned. If @name is null, the first matching entry will be
951 * returned. Data order is not meaningful in hwmod data, so callers
952 * are strongly encouraged to use a non-null @name whenever possible
953 * to avoid unpredictable effects if hwmod data is later added that
954 * causes data ordering to change. Returns 0 upon success or a
955 * negative error code upon error.
956 */
957static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
958 u32 *pa_start, u32 *pa_end)
959{
960 int i, j;
961 struct omap_hwmod_ocp_if *os;
962 bool found = false;
963
964 for (i = 0; i < oh->slaves_cnt; i++) {
965 os = oh->slaves[i];
966
967 if (!os->addr)
968 return -ENOENT;
969
970 j = 0;
971 while (os->addr[j].pa_start != os->addr[j].pa_end) {
972 if (name == os->addr[j].name ||
973 !strcmp(name, os->addr[j].name)) {
974 found = true;
975 break;
976 }
977 j++;
978 }
979
980 if (found)
981 break;
982 }
983
984 if (!found)
985 return -ENOENT;
986
987 *pa_start = os->addr[j].pa_start;
988 *pa_end = os->addr[j].pa_end;
989
990 return 0;
991}
992
63c85238
PW
993/**
994 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
995 * @oh: struct omap_hwmod *
996 *
997 * Returns the array index of the OCP slave port that the MPU
998 * addresses the device on, or -EINVAL upon error or not found.
999 */
01592df9 1000static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 1001{
63c85238
PW
1002 int i;
1003 int found = 0;
1004
1005 if (!oh || oh->slaves_cnt == 0)
1006 return -EINVAL;
1007
682fdc96
BC
1008 for (i = 0; i < oh->slaves_cnt; i++) {
1009 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1010
63c85238
PW
1011 if (os->user & OCP_USER_MPU) {
1012 found = 1;
1013 break;
1014 }
1015 }
1016
1017 if (found)
1018 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
1019 oh->name, i);
1020 else
1021 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
1022 oh->name);
1023
1024 return (found) ? i : -EINVAL;
1025}
1026
2d6141ba
PW
1027/**
1028 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1029 * @oh: struct omap_hwmod *
1030 *
1031 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1032 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1033 * communicate with the IP block. This interface need not be directly
1034 * connected to the MPU (and almost certainly is not), but is directly
1035 * connected to the IP block represented by @oh. Returns a pointer
1036 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1037 * error or if there does not appear to be a path from the MPU to this
1038 * IP block.
1039 */
1040static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1041{
1042 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1043 return NULL;
1044
1045 return oh->slaves[oh->_mpu_port_index];
1046};
1047
63c85238 1048/**
c9aafd23 1049 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1050 * @oh: struct omap_hwmod *
1051 *
c9aafd23
PW
1052 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1053 * the register target MPU address space; or returns NULL upon error.
63c85238 1054 */
c9aafd23 1055static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1056{
1057 struct omap_hwmod_ocp_if *os;
1058 struct omap_hwmod_addr_space *mem;
c9aafd23 1059 int found = 0, i = 0;
63c85238 1060
2d6141ba 1061 os = _find_mpu_rt_port(oh);
78183f3f
PW
1062 if (!os->addr)
1063 return NULL;
1064
1065 do {
1066 mem = &os->addr[i++];
1067 if (mem->flags & ADDR_TYPE_RT)
63c85238 1068 found = 1;
78183f3f 1069 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1070
c9aafd23 1071 return (found) ? mem : NULL;
63c85238
PW
1072}
1073
1074/**
74ff3a68 1075 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1076 * @oh: struct omap_hwmod *
1077 *
1078 * If module is marked as SWSUP_SIDLE, force the module out of slave
1079 * idle; otherwise, configure it for smart-idle. If module is marked
1080 * as SWSUP_MSUSPEND, force the module out of master standby;
1081 * otherwise, configure it for smart-standby. No return value.
1082 */
74ff3a68 1083static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1084{
43b40992 1085 u8 idlemode, sf;
63c85238
PW
1086 u32 v;
1087
43b40992 1088 if (!oh->class->sysc)
63c85238
PW
1089 return;
1090
1091 v = oh->_sysc_cache;
43b40992 1092 sf = oh->class->sysc->sysc_flags;
63c85238 1093
43b40992 1094 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1095 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1096 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1097 _set_slave_idlemode(oh, idlemode, &v);
1098 }
1099
43b40992 1100 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1101 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1102 idlemode = HWMOD_IDLEMODE_NO;
1103 } else {
1104 if (sf & SYSC_HAS_ENAWAKEUP)
1105 _enable_wakeup(oh, &v);
1106 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1107 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1108 else
1109 idlemode = HWMOD_IDLEMODE_SMART;
1110 }
63c85238
PW
1111 _set_master_standbymode(oh, idlemode, &v);
1112 }
1113
a16b1f7f
PW
1114 /*
1115 * XXX The clock framework should handle this, by
1116 * calling into this code. But this must wait until the
1117 * clock structures are tagged with omap_hwmod entries
1118 */
43b40992
PW
1119 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1120 (sf & SYSC_HAS_CLOCKACTIVITY))
1121 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1122
9980ce53
RN
1123 /* If slave is in SMARTIDLE, also enable wakeup */
1124 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1125 _enable_wakeup(oh, &v);
1126
1127 _write_sysconfig(v, oh);
78f26e87
HH
1128
1129 /*
1130 * Set the autoidle bit only after setting the smartidle bit
1131 * Setting this will not have any impact on the other modules.
1132 */
1133 if (sf & SYSC_HAS_AUTOIDLE) {
1134 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1135 0 : 1;
1136 _set_module_autoidle(oh, idlemode, &v);
1137 _write_sysconfig(v, oh);
1138 }
63c85238
PW
1139}
1140
1141/**
74ff3a68 1142 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1143 * @oh: struct omap_hwmod *
1144 *
1145 * If module is marked as SWSUP_SIDLE, force the module into slave
1146 * idle; otherwise, configure it for smart-idle. If module is marked
1147 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1148 * configure it for smart-standby. No return value.
1149 */
74ff3a68 1150static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1151{
43b40992 1152 u8 idlemode, sf;
63c85238
PW
1153 u32 v;
1154
43b40992 1155 if (!oh->class->sysc)
63c85238
PW
1156 return;
1157
1158 v = oh->_sysc_cache;
43b40992 1159 sf = oh->class->sysc->sysc_flags;
63c85238 1160
43b40992 1161 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1162 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1163 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1164 _set_slave_idlemode(oh, idlemode, &v);
1165 }
1166
43b40992 1167 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1168 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1169 idlemode = HWMOD_IDLEMODE_FORCE;
1170 } else {
1171 if (sf & SYSC_HAS_ENAWAKEUP)
1172 _enable_wakeup(oh, &v);
1173 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1174 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1175 else
1176 idlemode = HWMOD_IDLEMODE_SMART;
1177 }
63c85238
PW
1178 _set_master_standbymode(oh, idlemode, &v);
1179 }
1180
86009eb3
BC
1181 /* If slave is in SMARTIDLE, also enable wakeup */
1182 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1183 _enable_wakeup(oh, &v);
1184
63c85238
PW
1185 _write_sysconfig(v, oh);
1186}
1187
1188/**
74ff3a68 1189 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1190 * @oh: struct omap_hwmod *
1191 *
1192 * Force the module into slave idle and master suspend. No return
1193 * value.
1194 */
74ff3a68 1195static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1196{
1197 u32 v;
43b40992 1198 u8 sf;
63c85238 1199
43b40992 1200 if (!oh->class->sysc)
63c85238
PW
1201 return;
1202
1203 v = oh->_sysc_cache;
43b40992 1204 sf = oh->class->sysc->sysc_flags;
63c85238 1205
43b40992 1206 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1207 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1208
43b40992 1209 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1210 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1211
43b40992 1212 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1213 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1214
1215 _write_sysconfig(v, oh);
1216}
1217
1218/**
1219 * _lookup - find an omap_hwmod by name
1220 * @name: find an omap_hwmod by name
1221 *
1222 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1223 */
1224static struct omap_hwmod *_lookup(const char *name)
1225{
1226 struct omap_hwmod *oh, *temp_oh;
1227
1228 oh = NULL;
1229
1230 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1231 if (!strcmp(name, temp_oh->name)) {
1232 oh = temp_oh;
1233 break;
1234 }
1235 }
1236
1237 return oh;
1238}
6ae76997
BC
1239/**
1240 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1241 * @oh: struct omap_hwmod *
1242 *
1243 * Convert a clockdomain name stored in a struct omap_hwmod into a
1244 * clockdomain pointer, and save it into the struct omap_hwmod.
1245 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1246 */
1247static int _init_clkdm(struct omap_hwmod *oh)
1248{
1249 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1250 return 0;
1251
1252 if (!oh->clkdm_name) {
1253 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1254 return -EINVAL;
1255 }
1256
1257 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1258 if (!oh->clkdm) {
1259 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1260 oh->name, oh->clkdm_name);
1261 return -EINVAL;
1262 }
1263
1264 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1265 oh->name, oh->clkdm_name);
1266
1267 return 0;
1268}
63c85238
PW
1269
1270/**
6ae76997
BC
1271 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1272 * well the clockdomain.
63c85238 1273 * @oh: struct omap_hwmod *
97d60162 1274 * @data: not used; pass NULL
63c85238 1275 *
a2debdbd 1276 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1277 * Resolves all clock names embedded in the hwmod. Returns 0 on
1278 * success, or a negative error code on failure.
63c85238 1279 */
97d60162 1280static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1281{
1282 int ret = 0;
1283
48d54f3f
PW
1284 if (oh->_state != _HWMOD_STATE_REGISTERED)
1285 return 0;
63c85238
PW
1286
1287 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1288
1289 ret |= _init_main_clk(oh);
1290 ret |= _init_interface_clks(oh);
1291 ret |= _init_opt_clks(oh);
6ae76997 1292 ret |= _init_clkdm(oh);
63c85238 1293
f5c1f84b
BC
1294 if (!ret)
1295 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1296 else
1297 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1298
09c35f2f 1299 return ret;
63c85238
PW
1300}
1301
1302/**
1303 * _wait_target_ready - wait for a module to leave slave idle
1304 * @oh: struct omap_hwmod *
1305 *
1306 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1307 * does not have an IDLEST bit or if the module successfully leaves
1308 * slave idle; otherwise, pass along the return value of the
d0f0631d 1309 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1310 */
1311static int _wait_target_ready(struct omap_hwmod *oh)
1312{
1313 struct omap_hwmod_ocp_if *os;
1314 int ret;
1315
1316 if (!oh)
1317 return -EINVAL;
1318
2d6141ba 1319 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1320 return 0;
1321
2d6141ba
PW
1322 os = _find_mpu_rt_port(oh);
1323 if (!os)
63c85238
PW
1324 return 0;
1325
1326 /* XXX check module SIDLEMODE */
1327
1328 /* XXX check clock enable states */
1329
1330 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1331 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1332 oh->prcm.omap2.idlest_reg_id,
1333 oh->prcm.omap2.idlest_idle_bit);
63c85238 1334 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1335 if (!oh->clkdm)
1336 return -EINVAL;
1337
1338 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1339 oh->clkdm->cm_inst,
1340 oh->clkdm->clkdm_offs,
1341 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1342 } else {
1343 BUG();
1344 };
1345
1346 return ret;
1347}
1348
5365efbe 1349/**
cc1226e7 1350 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1351 * @oh: struct omap_hwmod *
1352 * @name: name of the reset line in the context of this hwmod
cc1226e7 1353 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1354 *
1355 * Return the bit position of the reset line that match the
1356 * input name. Return -ENOENT if not found.
1357 */
cc1226e7 1358static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1359 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1360{
1361 int i;
1362
1363 for (i = 0; i < oh->rst_lines_cnt; i++) {
1364 const char *rst_line = oh->rst_lines[i].name;
1365 if (!strcmp(rst_line, name)) {
cc1226e7 1366 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1367 ohri->st_shift = oh->rst_lines[i].st_shift;
1368 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1369 oh->name, __func__, rst_line, ohri->rst_shift,
1370 ohri->st_shift);
5365efbe 1371
cc1226e7 1372 return 0;
5365efbe
BC
1373 }
1374 }
1375
1376 return -ENOENT;
1377}
1378
1379/**
1380 * _assert_hardreset - assert the HW reset line of submodules
1381 * contained in the hwmod module.
1382 * @oh: struct omap_hwmod *
1383 * @name: name of the reset line to lookup and assert
1384 *
1385 * Some IP like dsp, ipu or iva contain processor that require
1386 * an HW reset line to be assert / deassert in order to enable fully
1387 * the IP.
1388 */
1389static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1390{
cc1226e7 1391 struct omap_hwmod_rst_info ohri;
1392 u8 ret;
5365efbe
BC
1393
1394 if (!oh)
1395 return -EINVAL;
1396
cc1226e7 1397 ret = _lookup_hardreset(oh, name, &ohri);
1398 if (IS_ERR_VALUE(ret))
1399 return ret;
5365efbe
BC
1400
1401 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1402 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1403 ohri.rst_shift);
5365efbe 1404 else if (cpu_is_omap44xx())
eaac329d
BC
1405 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1406 oh->clkdm->pwrdm.ptr->prcm_partition,
1407 oh->clkdm->pwrdm.ptr->prcm_offs,
1408 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1409 else
1410 return -EINVAL;
1411}
1412
1413/**
1414 * _deassert_hardreset - deassert the HW reset line of submodules contained
1415 * in the hwmod module.
1416 * @oh: struct omap_hwmod *
1417 * @name: name of the reset line to look up and deassert
1418 *
1419 * Some IP like dsp, ipu or iva contain processor that require
1420 * an HW reset line to be assert / deassert in order to enable fully
1421 * the IP.
1422 */
1423static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1424{
cc1226e7 1425 struct omap_hwmod_rst_info ohri;
1426 int ret;
5365efbe
BC
1427
1428 if (!oh)
1429 return -EINVAL;
1430
cc1226e7 1431 ret = _lookup_hardreset(oh, name, &ohri);
1432 if (IS_ERR_VALUE(ret))
1433 return ret;
5365efbe 1434
cc1226e7 1435 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1436 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1437 ohri.rst_shift,
1438 ohri.st_shift);
1439 } else if (cpu_is_omap44xx()) {
1440 if (ohri.st_shift)
1441 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1442 oh->name, name);
eaac329d
BC
1443 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1444 oh->clkdm->pwrdm.ptr->prcm_partition,
1445 oh->clkdm->pwrdm.ptr->prcm_offs,
1446 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1447 } else {
5365efbe 1448 return -EINVAL;
cc1226e7 1449 }
5365efbe 1450
cc1226e7 1451 if (ret == -EBUSY)
5365efbe
BC
1452 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1453
cc1226e7 1454 return ret;
5365efbe
BC
1455}
1456
1457/**
1458 * _read_hardreset - read the HW reset line state of submodules
1459 * contained in the hwmod module
1460 * @oh: struct omap_hwmod *
1461 * @name: name of the reset line to look up and read
1462 *
1463 * Return the state of the reset line.
1464 */
1465static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1466{
cc1226e7 1467 struct omap_hwmod_rst_info ohri;
1468 u8 ret;
5365efbe
BC
1469
1470 if (!oh)
1471 return -EINVAL;
1472
cc1226e7 1473 ret = _lookup_hardreset(oh, name, &ohri);
1474 if (IS_ERR_VALUE(ret))
1475 return ret;
5365efbe
BC
1476
1477 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1478 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1479 ohri.st_shift);
5365efbe 1480 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1481 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1482 oh->clkdm->pwrdm.ptr->prcm_partition,
1483 oh->clkdm->pwrdm.ptr->prcm_offs,
1484 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1485 } else {
1486 return -EINVAL;
1487 }
1488}
1489
747834ab
PW
1490/**
1491 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1492 * @oh: struct omap_hwmod *
1493 *
1494 * If any hardreset line associated with @oh is asserted, then return true.
1495 * Otherwise, if @oh has no hardreset lines associated with it, or if
1496 * no hardreset lines associated with @oh are asserted, then return false.
1497 * This function is used to avoid executing some parts of the IP block
1498 * enable/disable sequence if a hardreset line is set.
1499 */
1500static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1501{
1502 int i;
1503
1504 if (oh->rst_lines_cnt == 0)
1505 return false;
1506
1507 for (i = 0; i < oh->rst_lines_cnt; i++)
1508 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1509 return true;
1510
1511 return false;
1512}
1513
1514/**
1515 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1516 * @oh: struct omap_hwmod *
1517 *
1518 * Disable the PRCM module mode related to the hwmod @oh.
1519 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1520 */
1521static int _omap4_disable_module(struct omap_hwmod *oh)
1522{
1523 int v;
1524
1525 /* The module mode does not exist prior OMAP4 */
1526 if (!cpu_is_omap44xx())
1527 return -EINVAL;
1528
1529 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1530 return -EINVAL;
1531
1532 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1533
1534 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1535 oh->clkdm->cm_inst,
1536 oh->clkdm->clkdm_offs,
1537 oh->prcm.omap4.clkctrl_offs);
1538
1539 if (_are_any_hardreset_lines_asserted(oh))
1540 return 0;
1541
1542 v = _omap4_wait_target_disable(oh);
1543 if (v)
1544 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1545 oh->name);
1546
1547 return 0;
1548}
1549
63c85238 1550/**
bd36179e 1551 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1552 * @oh: struct omap_hwmod *
1553 *
1554 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1555 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1556 * reset this way, -EINVAL if the hwmod is in the wrong state,
1557 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1558 *
1559 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1560 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1561 * use the SYSCONFIG softreset bit to provide the status.
1562 *
bd36179e
PW
1563 * Note that some IP like McBSP do have reset control but don't have
1564 * reset status.
63c85238 1565 */
bd36179e 1566static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1567{
387ca5bf 1568 u32 v, softrst_mask;
6f8b7ff5 1569 int c = 0;
96835af9 1570 int ret = 0;
63c85238 1571
43b40992 1572 if (!oh->class->sysc ||
2cb06814 1573 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1574 return -ENOENT;
63c85238
PW
1575
1576 /* clocks must be on for this operation */
1577 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1578 pr_warning("omap_hwmod: %s: reset can only be entered from "
1579 "enabled state\n", oh->name);
63c85238
PW
1580 return -EINVAL;
1581 }
1582
96835af9
BC
1583 /* For some modules, all optionnal clocks need to be enabled as well */
1584 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1585 _enable_optional_clocks(oh);
1586
bd36179e 1587 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1588
1589 v = oh->_sysc_cache;
96835af9
BC
1590 ret = _set_softreset(oh, &v);
1591 if (ret)
1592 goto dis_opt_clks;
63c85238
PW
1593 _write_sysconfig(v, oh);
1594
d99de7f5
FGL
1595 if (oh->class->sysc->srst_udelay)
1596 udelay(oh->class->sysc->srst_udelay);
1597
2cb06814 1598 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1599 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1600 oh->class->sysc->syss_offs)
1601 & SYSS_RESETDONE_MASK),
1602 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1603 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1604 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1605 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1606 oh->class->sysc->sysc_offs)
387ca5bf 1607 & softrst_mask),
2cb06814 1608 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1609 }
63c85238 1610
5365efbe 1611 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1612 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1613 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1614 else
5365efbe 1615 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1616
1617 /*
1618 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1619 * _wait_target_ready() or _reset()
1620 */
1621
96835af9
BC
1622 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1623
1624dis_opt_clks:
1625 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1626 _disable_optional_clocks(oh);
1627
1628 return ret;
63c85238
PW
1629}
1630
bd36179e
PW
1631/**
1632 * _reset - reset an omap_hwmod
1633 * @oh: struct omap_hwmod *
1634 *
30e105c0
PW
1635 * Resets an omap_hwmod @oh. If the module has a custom reset
1636 * function pointer defined, then call it to reset the IP block, and
1637 * pass along its return value to the caller. Otherwise, if the IP
1638 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1639 * associated with it, call a function to reset the IP block via that
1640 * method, and pass along the return value to the caller. Finally, if
1641 * the IP block has some hardreset lines associated with it, assert
1642 * all of those, but do _not_ deassert them. (This is because driver
1643 * authors have expressed an apparent requirement to control the
1644 * deassertion of the hardreset lines themselves.)
1645 *
1646 * The default software reset mechanism for most OMAP IP blocks is
1647 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1648 * hwmods cannot be reset via this method. Some are not targets and
1649 * therefore have no OCP header registers to access. Others (like the
1650 * IVA) have idiosyncratic reset sequences. So for these relatively
1651 * rare cases, custom reset code can be supplied in the struct
1652 * omap_hwmod_class .reset function pointer. Passes along the return
1653 * value from either _ocp_softreset() or the custom reset function -
1654 * these must return -EINVAL if the hwmod cannot be reset this way or
1655 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1656 * not reset in time, or 0 upon success.
bd36179e
PW
1657 */
1658static int _reset(struct omap_hwmod *oh)
1659{
30e105c0 1660 int i, r;
bd36179e
PW
1661
1662 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1663
30e105c0
PW
1664 if (oh->class->reset) {
1665 r = oh->class->reset(oh);
1666 } else {
1667 if (oh->rst_lines_cnt > 0) {
1668 for (i = 0; i < oh->rst_lines_cnt; i++)
1669 _assert_hardreset(oh, oh->rst_lines[i].name);
1670 return 0;
1671 } else {
1672 r = _ocp_softreset(oh);
1673 if (r == -ENOENT)
1674 r = 0;
1675 }
1676 }
1677
9c8b0ec7 1678 /*
30e105c0
PW
1679 * OCP_SYSCONFIG bits need to be reprogrammed after a
1680 * softreset. The _enable() function should be split to avoid
1681 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1682 */
2800852a
RN
1683 if (oh->class->sysc) {
1684 _update_sysc_cache(oh);
1685 _enable_sysc(oh);
1686 }
1687
30e105c0 1688 return r;
bd36179e
PW
1689}
1690
63c85238 1691/**
dc6d1cda 1692 * _enable - enable an omap_hwmod
63c85238
PW
1693 * @oh: struct omap_hwmod *
1694 *
1695 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1696 * register target. Returns -EINVAL if the hwmod is in the wrong
1697 * state or passes along the return value of _wait_target_ready().
63c85238 1698 */
dc6d1cda 1699static int _enable(struct omap_hwmod *oh)
63c85238 1700{
747834ab 1701 int r;
665d0013 1702 int hwsup = 0;
63c85238 1703
34617e2a
BC
1704 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1705
aacf0941 1706 /*
64813c3f
PW
1707 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1708 * state at init. Now that someone is really trying to enable
1709 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1710 */
1711 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1712 /*
1713 * If the caller has mux data populated, do the mux'ing
1714 * which wouldn't have been done as part of the _enable()
1715 * done during setup.
1716 */
1717 if (oh->mux)
1718 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1719
1720 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1721 return 0;
1722 }
1723
63c85238
PW
1724 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1725 oh->_state != _HWMOD_STATE_IDLE &&
1726 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1727 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1728 oh->name);
63c85238
PW
1729 return -EINVAL;
1730 }
1731
31f62866 1732 /*
747834ab
PW
1733 * If an IP block contains HW reset lines and any of them are
1734 * asserted, we let integration code associated with that
1735 * block handle the enable. We've received very little
1736 * information on what those driver authors need, and until
1737 * detailed information is provided and the driver code is
1738 * posted to the public lists, this is probably the best we
1739 * can do.
31f62866 1740 */
747834ab
PW
1741 if (_are_any_hardreset_lines_asserted(oh))
1742 return 0;
63c85238 1743
665d0013
RN
1744 /* Mux pins for device runtime if populated */
1745 if (oh->mux && (!oh->mux->enabled ||
1746 ((oh->_state == _HWMOD_STATE_IDLE) &&
1747 oh->mux->pads_dynamic)))
1748 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1749
1750 _add_initiator_dep(oh, mpu_oh);
34617e2a 1751
665d0013
RN
1752 if (oh->clkdm) {
1753 /*
1754 * A clockdomain must be in SW_SUP before enabling
1755 * completely the module. The clockdomain can be set
1756 * in HW_AUTO only when the module become ready.
1757 */
1758 hwsup = clkdm_in_hwsup(oh->clkdm);
1759 r = clkdm_hwmod_enable(oh->clkdm, oh);
1760 if (r) {
1761 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1762 oh->name, oh->clkdm->name, r);
1763 return r;
1764 }
34617e2a 1765 }
665d0013
RN
1766
1767 _enable_clocks(oh);
45c38252 1768 _enable_module(oh);
34617e2a 1769
665d0013
RN
1770 r = _wait_target_ready(oh);
1771 if (!r) {
1772 /*
1773 * Set the clockdomain to HW_AUTO only if the target is ready,
1774 * assuming that the previous state was HW_AUTO
1775 */
1776 if (oh->clkdm && hwsup)
1777 clkdm_allow_idle(oh->clkdm);
1778
1779 oh->_state = _HWMOD_STATE_ENABLED;
1780
1781 /* Access the sysconfig only if the target is ready */
1782 if (oh->class->sysc) {
1783 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1784 _update_sysc_cache(oh);
1785 _enable_sysc(oh);
1786 }
1787 } else {
1788 _disable_clocks(oh);
1789 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1790 oh->name, r);
34617e2a 1791
665d0013
RN
1792 if (oh->clkdm)
1793 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1794 }
1795
63c85238
PW
1796 return r;
1797}
1798
1799/**
dc6d1cda 1800 * _idle - idle an omap_hwmod
63c85238
PW
1801 * @oh: struct omap_hwmod *
1802 *
1803 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1804 * no further work. Returns -EINVAL if the hwmod is in the wrong
1805 * state or returns 0.
63c85238 1806 */
dc6d1cda 1807static int _idle(struct omap_hwmod *oh)
63c85238 1808{
34617e2a
BC
1809 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1810
63c85238 1811 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1812 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1813 oh->name);
63c85238
PW
1814 return -EINVAL;
1815 }
1816
747834ab
PW
1817 if (_are_any_hardreset_lines_asserted(oh))
1818 return 0;
1819
43b40992 1820 if (oh->class->sysc)
74ff3a68 1821 _idle_sysc(oh);
63c85238 1822 _del_initiator_dep(oh, mpu_oh);
bfc141e3
BC
1823
1824 _omap4_disable_module(oh);
1825
45c38252
BC
1826 /*
1827 * The module must be in idle mode before disabling any parents
1828 * clocks. Otherwise, the parent clock might be disabled before
1829 * the module transition is done, and thus will prevent the
1830 * transition to complete properly.
1831 */
1832 _disable_clocks(oh);
665d0013
RN
1833 if (oh->clkdm)
1834 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1835
8d9af88f 1836 /* Mux pins for device idle if populated */
029268e4 1837 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1838 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1839
63c85238
PW
1840 oh->_state = _HWMOD_STATE_IDLE;
1841
1842 return 0;
1843}
1844
9599217a
KVA
1845/**
1846 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1847 * @oh: struct omap_hwmod *
1848 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1849 *
1850 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1851 * local copy. Intended to be used by drivers that require
1852 * direct manipulation of the AUTOIDLE bits.
1853 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1854 * along the return value from _set_module_autoidle().
1855 *
1856 * Any users of this function should be scrutinized carefully.
1857 */
1858int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1859{
1860 u32 v;
1861 int retval = 0;
1862 unsigned long flags;
1863
1864 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1865 return -EINVAL;
1866
1867 spin_lock_irqsave(&oh->_lock, flags);
1868
1869 v = oh->_sysc_cache;
1870
1871 retval = _set_module_autoidle(oh, autoidle, &v);
1872
1873 if (!retval)
1874 _write_sysconfig(v, oh);
1875
1876 spin_unlock_irqrestore(&oh->_lock, flags);
1877
1878 return retval;
1879}
1880
63c85238
PW
1881/**
1882 * _shutdown - shutdown an omap_hwmod
1883 * @oh: struct omap_hwmod *
1884 *
1885 * Shut down an omap_hwmod @oh. This should be called when the driver
1886 * used for the hwmod is removed or unloaded or if the driver is not
1887 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1888 * state or returns 0.
1889 */
1890static int _shutdown(struct omap_hwmod *oh)
1891{
9c8b0ec7 1892 int ret, i;
e4dc8f50
PW
1893 u8 prev_state;
1894
63c85238
PW
1895 if (oh->_state != _HWMOD_STATE_IDLE &&
1896 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1897 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1898 oh->name);
63c85238
PW
1899 return -EINVAL;
1900 }
1901
747834ab
PW
1902 if (_are_any_hardreset_lines_asserted(oh))
1903 return 0;
1904
63c85238
PW
1905 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1906
e4dc8f50
PW
1907 if (oh->class->pre_shutdown) {
1908 prev_state = oh->_state;
1909 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1910 _enable(oh);
e4dc8f50
PW
1911 ret = oh->class->pre_shutdown(oh);
1912 if (ret) {
1913 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1914 _idle(oh);
e4dc8f50
PW
1915 return ret;
1916 }
1917 }
1918
6481c73c
MV
1919 if (oh->class->sysc) {
1920 if (oh->_state == _HWMOD_STATE_IDLE)
1921 _enable(oh);
74ff3a68 1922 _shutdown_sysc(oh);
6481c73c 1923 }
5365efbe 1924
3827f949
BC
1925 /* clocks and deps are already disabled in idle */
1926 if (oh->_state == _HWMOD_STATE_ENABLED) {
1927 _del_initiator_dep(oh, mpu_oh);
1928 /* XXX what about the other system initiators here? dma, dsp */
bfc141e3 1929 _omap4_disable_module(oh);
45c38252 1930 _disable_clocks(oh);
665d0013
RN
1931 if (oh->clkdm)
1932 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 1933 }
63c85238
PW
1934 /* XXX Should this code also force-disable the optional clocks? */
1935
9c8b0ec7
PW
1936 for (i = 0; i < oh->rst_lines_cnt; i++)
1937 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 1938
8d9af88f
TL
1939 /* Mux pins to safe mode or use populated off mode values */
1940 if (oh->mux)
1941 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1942
1943 oh->_state = _HWMOD_STATE_DISABLED;
1944
1945 return 0;
1946}
1947
381d033a
PW
1948/**
1949 * _init_mpu_rt_base - populate the virtual address for a hwmod
1950 * @oh: struct omap_hwmod * to locate the virtual address
1951 *
1952 * Cache the virtual address used by the MPU to access this IP block's
1953 * registers. This address is needed early so the OCP registers that
1954 * are part of the device's address space can be ioremapped properly.
1955 * No return value.
1956 */
1957static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
1958{
c9aafd23
PW
1959 struct omap_hwmod_addr_space *mem;
1960 void __iomem *va_start;
1961
1962 if (!oh)
1963 return;
1964
381d033a
PW
1965 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1966 return;
1967
c9aafd23
PW
1968 mem = _find_mpu_rt_addr_space(oh);
1969 if (!mem) {
1970 pr_debug("omap_hwmod: %s: no MPU register target found\n",
1971 oh->name);
1972 return;
1973 }
1974
1975 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
1976 if (!va_start) {
1977 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
1978 return;
1979 }
1980
1981 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
1982 oh->name, va_start);
1983
1984 oh->_mpu_rt_va = va_start;
381d033a
PW
1985}
1986
1987/**
1988 * _init - initialize internal data for the hwmod @oh
1989 * @oh: struct omap_hwmod *
1990 * @n: (unused)
1991 *
1992 * Look up the clocks and the address space used by the MPU to access
1993 * registers belonging to the hwmod @oh. @oh must already be
1994 * registered at this point. This is the first of two phases for
1995 * hwmod initialization. Code called here does not touch any hardware
1996 * registers, it simply prepares internal data structures. Returns 0
1997 * upon success or if the hwmod isn't registered, or -EINVAL upon
1998 * failure.
1999 */
2000static int __init _init(struct omap_hwmod *oh, void *data)
2001{
2002 int r;
2003
2004 if (oh->_state != _HWMOD_STATE_REGISTERED)
2005 return 0;
2006
2007 _init_mpu_rt_base(oh, NULL);
2008
2009 r = _init_clocks(oh, NULL);
2010 if (IS_ERR_VALUE(r)) {
2011 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2012 return -EINVAL;
2013 }
2014
2015 oh->_state = _HWMOD_STATE_INITIALIZED;
2016
2017 return 0;
2018}
2019
63c85238 2020/**
64813c3f 2021 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2022 * @oh: struct omap_hwmod *
2023 *
64813c3f
PW
2024 * Set up the module's interface clocks. XXX This function is still mostly
2025 * a stub; implementing this properly requires iclk autoidle usecounting in
2026 * the clock code. No return value.
63c85238 2027 */
64813c3f 2028static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2029{
64813c3f 2030 int i;
97d60162 2031
381d033a 2032 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2033 return;
48d54f3f 2034
64813c3f
PW
2035 for (i = 0; i < oh->slaves_cnt; i++) {
2036 struct omap_hwmod_ocp_if *os = oh->slaves[i];
2037 struct clk *c = os->_clk;
63c85238 2038
64813c3f
PW
2039 if (!c)
2040 continue;
63c85238 2041
64813c3f
PW
2042 if (os->flags & OCPIF_SWSUP_IDLE) {
2043 /* XXX omap_iclk_deny_idle(c); */
2044 } else {
2045 /* XXX omap_iclk_allow_idle(c); */
2046 clk_enable(c);
63c85238
PW
2047 }
2048 }
2049
64813c3f
PW
2050 return;
2051}
2052
2053/**
2054 * _setup_reset - reset an IP block during the setup process
2055 * @oh: struct omap_hwmod *
2056 *
2057 * Reset the IP block corresponding to the hwmod @oh during the setup
2058 * process. The IP block is first enabled so it can be successfully
2059 * reset. Returns 0 upon success or a negative error code upon
2060 * failure.
2061 */
2062static int __init _setup_reset(struct omap_hwmod *oh)
2063{
2064 int r;
2065
2066 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2067 return -EINVAL;
63c85238 2068
747834ab
PW
2069 if (oh->rst_lines_cnt == 0) {
2070 r = _enable(oh);
2071 if (r) {
2072 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2073 oh->name, oh->_state);
2074 return -EINVAL;
2075 }
9a23dfe1 2076 }
63c85238 2077
2800852a 2078 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2079 r = _reset(oh);
2080
2081 return r;
2082}
2083
2084/**
2085 * _setup_postsetup - transition to the appropriate state after _setup
2086 * @oh: struct omap_hwmod *
2087 *
2088 * Place an IP block represented by @oh into a "post-setup" state --
2089 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2090 * this function is called at the end of _setup().) The postsetup
2091 * state for an IP block can be changed by calling
2092 * omap_hwmod_enter_postsetup_state() early in the boot process,
2093 * before one of the omap_hwmod_setup*() functions are called for the
2094 * IP block.
2095 *
2096 * The IP block stays in this state until a PM runtime-based driver is
2097 * loaded for that IP block. A post-setup state of IDLE is
2098 * appropriate for almost all IP blocks with runtime PM-enabled
2099 * drivers, since those drivers are able to enable the IP block. A
2100 * post-setup state of ENABLED is appropriate for kernels with PM
2101 * runtime disabled. The DISABLED state is appropriate for unusual IP
2102 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2103 * included, since the WDTIMER starts running on reset and will reset
2104 * the MPU if left active.
2105 *
2106 * This post-setup mechanism is deprecated. Once all of the OMAP
2107 * drivers have been converted to use PM runtime, and all of the IP
2108 * block data and interconnect data is available to the hwmod code, it
2109 * should be possible to replace this mechanism with a "lazy reset"
2110 * arrangement. In a "lazy reset" setup, each IP block is enabled
2111 * when the driver first probes, then all remaining IP blocks without
2112 * drivers are either shut down or enabled after the drivers have
2113 * loaded. However, this cannot take place until the above
2114 * preconditions have been met, since otherwise the late reset code
2115 * has no way of knowing which IP blocks are in use by drivers, and
2116 * which ones are unused.
2117 *
2118 * No return value.
2119 */
2120static void __init _setup_postsetup(struct omap_hwmod *oh)
2121{
2122 u8 postsetup_state;
2123
2124 if (oh->rst_lines_cnt > 0)
2125 return;
76e5589e 2126
2092e5cc
PW
2127 postsetup_state = oh->_postsetup_state;
2128 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2129 postsetup_state = _HWMOD_STATE_ENABLED;
2130
2131 /*
2132 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2133 * it should be set by the core code as a runtime flag during startup
2134 */
2135 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2136 (postsetup_state == _HWMOD_STATE_IDLE)) {
2137 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2138 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2139 }
2092e5cc
PW
2140
2141 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2142 _idle(oh);
2092e5cc
PW
2143 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2144 _shutdown(oh);
2145 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2146 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2147 oh->name, postsetup_state);
63c85238 2148
64813c3f
PW
2149 return;
2150}
2151
2152/**
2153 * _setup - prepare IP block hardware for use
2154 * @oh: struct omap_hwmod *
2155 * @n: (unused, pass NULL)
2156 *
2157 * Configure the IP block represented by @oh. This may include
2158 * enabling the IP block, resetting it, and placing it into a
2159 * post-setup state, depending on the type of IP block and applicable
2160 * flags. IP blocks are reset to prevent any previous configuration
2161 * by the bootloader or previous operating system from interfering
2162 * with power management or other parts of the system. The reset can
2163 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2164 * two phases for hwmod initialization. Code called here generally
2165 * affects the IP block hardware, or system integration hardware
2166 * associated with the IP block. Returns 0.
2167 */
2168static int __init _setup(struct omap_hwmod *oh, void *data)
2169{
2170 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2171 return 0;
2172
2173 _setup_iclk_autoidle(oh);
2174
2175 if (!_setup_reset(oh))
2176 _setup_postsetup(oh);
2177
63c85238
PW
2178 return 0;
2179}
2180
63c85238 2181/**
0102b627 2182 * _register - register a struct omap_hwmod
63c85238
PW
2183 * @oh: struct omap_hwmod *
2184 *
43b40992
PW
2185 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2186 * already has been registered by the same name; -EINVAL if the
2187 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2188 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2189 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2190 * success.
63c85238
PW
2191 *
2192 * XXX The data should be copied into bootmem, so the original data
2193 * should be marked __initdata and freed after init. This would allow
2194 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2195 * that the copy process would be relatively complex due to the large number
2196 * of substructures.
2197 */
01592df9 2198static int __init _register(struct omap_hwmod *oh)
63c85238 2199{
569edd70 2200 int ms_id;
63c85238 2201
43b40992
PW
2202 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2203 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2204 return -EINVAL;
2205
63c85238
PW
2206 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2207
ce35b244
BC
2208 if (_lookup(oh->name))
2209 return -EEXIST;
63c85238
PW
2210
2211 ms_id = _find_mpu_port_index(oh);
e7c7d760 2212 if (!IS_ERR_VALUE(ms_id))
63c85238 2213 oh->_mpu_port_index = ms_id;
e7c7d760 2214 else
63c85238 2215 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
2216
2217 list_add_tail(&oh->node, &omap_hwmod_list);
2218
dc6d1cda 2219 spin_lock_init(&oh->_lock);
2092e5cc 2220
63c85238
PW
2221 oh->_state = _HWMOD_STATE_REGISTERED;
2222
569edd70
PW
2223 /*
2224 * XXX Rather than doing a strcmp(), this should test a flag
2225 * set in the hwmod data, inserted by the autogenerator code.
2226 */
2227 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2228 mpu_oh = oh;
63c85238 2229
569edd70 2230 return 0;
63c85238
PW
2231}
2232
0102b627
BC
2233
2234/* Public functions */
2235
2236u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2237{
2238 if (oh->flags & HWMOD_16BIT_REG)
2239 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2240 else
2241 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2242}
2243
2244void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2245{
2246 if (oh->flags & HWMOD_16BIT_REG)
2247 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2248 else
2249 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2250}
2251
6d3c55fd
A
2252/**
2253 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2254 * @oh: struct omap_hwmod *
2255 *
2256 * This is a public function exposed to drivers. Some drivers may need to do
2257 * some settings before and after resetting the device. Those drivers after
2258 * doing the necessary settings could use this function to start a reset by
2259 * setting the SYSCONFIG.SOFTRESET bit.
2260 */
2261int omap_hwmod_softreset(struct omap_hwmod *oh)
2262{
3c55c1ba
PW
2263 u32 v;
2264 int ret;
2265
2266 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2267 return -EINVAL;
2268
3c55c1ba
PW
2269 v = oh->_sysc_cache;
2270 ret = _set_softreset(oh, &v);
2271 if (ret)
2272 goto error;
2273 _write_sysconfig(v, oh);
2274
2275error:
2276 return ret;
6d3c55fd
A
2277}
2278
0102b627
BC
2279/**
2280 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2281 * @oh: struct omap_hwmod *
2282 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2283 *
2284 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2285 * local copy. Intended to be used by drivers that have some erratum
2286 * that requires direct manipulation of the SIDLEMODE bits. Returns
2287 * -EINVAL if @oh is null, or passes along the return value from
2288 * _set_slave_idlemode().
2289 *
2290 * XXX Does this function have any current users? If not, we should
2291 * remove it; it is better to let the rest of the hwmod code handle this.
2292 * Any users of this function should be scrutinized carefully.
2293 */
2294int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2295{
2296 u32 v;
2297 int retval = 0;
2298
2299 if (!oh)
2300 return -EINVAL;
2301
2302 v = oh->_sysc_cache;
2303
2304 retval = _set_slave_idlemode(oh, idlemode, &v);
2305 if (!retval)
2306 _write_sysconfig(v, oh);
2307
2308 return retval;
2309}
2310
63c85238
PW
2311/**
2312 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2313 * @name: name of the omap_hwmod to look up
2314 *
2315 * Given a @name of an omap_hwmod, return a pointer to the registered
2316 * struct omap_hwmod *, or NULL upon error.
2317 */
2318struct omap_hwmod *omap_hwmod_lookup(const char *name)
2319{
2320 struct omap_hwmod *oh;
2321
2322 if (!name)
2323 return NULL;
2324
63c85238 2325 oh = _lookup(name);
63c85238
PW
2326
2327 return oh;
2328}
2329
2330/**
2331 * omap_hwmod_for_each - call function for each registered omap_hwmod
2332 * @fn: pointer to a callback function
97d60162 2333 * @data: void * data to pass to callback function
63c85238
PW
2334 *
2335 * Call @fn for each registered omap_hwmod, passing @data to each
2336 * function. @fn must return 0 for success or any other value for
2337 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2338 * will stop and the non-zero return value will be passed to the
2339 * caller of omap_hwmod_for_each(). @fn is called with
2340 * omap_hwmod_for_each() held.
2341 */
97d60162
PW
2342int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2343 void *data)
63c85238
PW
2344{
2345 struct omap_hwmod *temp_oh;
30ebad9d 2346 int ret = 0;
63c85238
PW
2347
2348 if (!fn)
2349 return -EINVAL;
2350
63c85238 2351 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2352 ret = (*fn)(temp_oh, data);
63c85238
PW
2353 if (ret)
2354 break;
2355 }
63c85238
PW
2356
2357 return ret;
2358}
2359
63c85238 2360/**
550c8092 2361 * omap_hwmod_register - register an array of hwmods
63c85238
PW
2362 * @ohs: pointer to an array of omap_hwmods to register
2363 *
2364 * Intended to be called early in boot before the clock framework is
2365 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 2366 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 2367 */
550c8092 2368int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 2369{
bac1a0f0 2370 int r, i;
63c85238
PW
2371
2372 if (!ohs)
2373 return 0;
2374
bac1a0f0
PW
2375 i = 0;
2376 do {
bac1a0f0
PW
2377 r = _register(ohs[i]);
2378 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2379 r);
2380 } while (ohs[++i]);
63c85238
PW
2381
2382 return 0;
2383}
2384
381d033a
PW
2385/**
2386 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2387 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2388 *
2389 * If the hwmod data corresponding to the MPU subsystem IP block
2390 * hasn't been initialized and set up yet, do so now. This must be
2391 * done first since sleep dependencies may be added from other hwmods
2392 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2393 * return value.
63c85238 2394 */
381d033a 2395static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 2396{
381d033a
PW
2397 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2398 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2399 __func__, MPU_INITIATOR_NAME);
2400 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2401 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
2402}
2403
63c85238 2404/**
a2debdbd
PW
2405 * omap_hwmod_setup_one - set up a single hwmod
2406 * @oh_name: const char * name of the already-registered hwmod to set up
2407 *
381d033a
PW
2408 * Initialize and set up a single hwmod. Intended to be used for a
2409 * small number of early devices, such as the timer IP blocks used for
2410 * the scheduler clock. Must be called after omap2_clk_init().
2411 * Resolves the struct clk names to struct clk pointers for each
2412 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2413 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
2414 */
2415int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2416{
2417 struct omap_hwmod *oh;
63c85238 2418
a2debdbd
PW
2419 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2420
a2debdbd
PW
2421 oh = _lookup(oh_name);
2422 if (!oh) {
2423 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2424 return -EINVAL;
2425 }
63c85238 2426
381d033a 2427 _ensure_mpu_hwmod_is_setup(oh);
63c85238 2428
381d033a 2429 _init(oh, NULL);
a2debdbd
PW
2430 _setup(oh, NULL);
2431
63c85238
PW
2432 return 0;
2433}
2434
2435/**
381d033a 2436 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 2437 *
381d033a
PW
2438 * Initialize and set up all IP blocks registered with the hwmod code.
2439 * Must be called after omap2_clk_init(). Resolves the struct clk
2440 * names to struct clk pointers for each registered omap_hwmod. Also
2441 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 2442 */
550c8092 2443static int __init omap_hwmod_setup_all(void)
63c85238 2444{
381d033a 2445 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 2446
381d033a 2447 omap_hwmod_for_each(_init, NULL);
2092e5cc 2448 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2449
2450 return 0;
2451}
550c8092 2452core_initcall(omap_hwmod_setup_all);
63c85238 2453
63c85238
PW
2454/**
2455 * omap_hwmod_enable - enable an omap_hwmod
2456 * @oh: struct omap_hwmod *
2457 *
74ff3a68 2458 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2459 * Returns -EINVAL on error or passes along the return value from _enable().
2460 */
2461int omap_hwmod_enable(struct omap_hwmod *oh)
2462{
2463 int r;
dc6d1cda 2464 unsigned long flags;
63c85238
PW
2465
2466 if (!oh)
2467 return -EINVAL;
2468
dc6d1cda
PW
2469 spin_lock_irqsave(&oh->_lock, flags);
2470 r = _enable(oh);
2471 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2472
2473 return r;
2474}
2475
2476/**
2477 * omap_hwmod_idle - idle an omap_hwmod
2478 * @oh: struct omap_hwmod *
2479 *
74ff3a68 2480 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2481 * Returns -EINVAL on error or passes along the return value from _idle().
2482 */
2483int omap_hwmod_idle(struct omap_hwmod *oh)
2484{
dc6d1cda
PW
2485 unsigned long flags;
2486
63c85238
PW
2487 if (!oh)
2488 return -EINVAL;
2489
dc6d1cda
PW
2490 spin_lock_irqsave(&oh->_lock, flags);
2491 _idle(oh);
2492 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2493
2494 return 0;
2495}
2496
2497/**
2498 * omap_hwmod_shutdown - shutdown an omap_hwmod
2499 * @oh: struct omap_hwmod *
2500 *
74ff3a68 2501 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2502 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2503 * the return value from _shutdown().
2504 */
2505int omap_hwmod_shutdown(struct omap_hwmod *oh)
2506{
dc6d1cda
PW
2507 unsigned long flags;
2508
63c85238
PW
2509 if (!oh)
2510 return -EINVAL;
2511
dc6d1cda 2512 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2513 _shutdown(oh);
dc6d1cda 2514 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2515
2516 return 0;
2517}
2518
2519/**
2520 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2521 * @oh: struct omap_hwmod *oh
2522 *
2523 * Intended to be called by the omap_device code.
2524 */
2525int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2526{
dc6d1cda
PW
2527 unsigned long flags;
2528
2529 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2530 _enable_clocks(oh);
dc6d1cda 2531 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2532
2533 return 0;
2534}
2535
2536/**
2537 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2538 * @oh: struct omap_hwmod *oh
2539 *
2540 * Intended to be called by the omap_device code.
2541 */
2542int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2543{
dc6d1cda
PW
2544 unsigned long flags;
2545
2546 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2547 _disable_clocks(oh);
dc6d1cda 2548 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2549
2550 return 0;
2551}
2552
2553/**
2554 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2555 * @oh: struct omap_hwmod *oh
2556 *
2557 * Intended to be called by drivers and core code when all posted
2558 * writes to a device must complete before continuing further
2559 * execution (for example, after clearing some device IRQSTATUS
2560 * register bits)
2561 *
2562 * XXX what about targets with multiple OCP threads?
2563 */
2564void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2565{
2566 BUG_ON(!oh);
2567
43b40992 2568 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2569 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2570 oh->name);
63c85238
PW
2571 return;
2572 }
2573
2574 /*
2575 * Forces posted writes to complete on the OCP thread handling
2576 * register writes
2577 */
cc7a1d2a 2578 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2579}
2580
2581/**
2582 * omap_hwmod_reset - reset the hwmod
2583 * @oh: struct omap_hwmod *
2584 *
2585 * Under some conditions, a driver may wish to reset the entire device.
2586 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2587 * the return value from _reset().
63c85238
PW
2588 */
2589int omap_hwmod_reset(struct omap_hwmod *oh)
2590{
2591 int r;
dc6d1cda 2592 unsigned long flags;
63c85238 2593
9b579114 2594 if (!oh)
63c85238
PW
2595 return -EINVAL;
2596
dc6d1cda 2597 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2598 r = _reset(oh);
dc6d1cda 2599 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2600
2601 return r;
2602}
2603
5e8370f1
PW
2604/*
2605 * IP block data retrieval functions
2606 */
2607
63c85238
PW
2608/**
2609 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2610 * @oh: struct omap_hwmod *
2611 * @res: pointer to the first element of an array of struct resource to fill
2612 *
2613 * Count the number of struct resource array elements necessary to
2614 * contain omap_hwmod @oh resources. Intended to be called by code
2615 * that registers omap_devices. Intended to be used to determine the
2616 * size of a dynamically-allocated struct resource array, before
2617 * calling omap_hwmod_fill_resources(). Returns the number of struct
2618 * resource array elements needed.
2619 *
2620 * XXX This code is not optimized. It could attempt to merge adjacent
2621 * resource IDs.
2622 *
2623 */
2624int omap_hwmod_count_resources(struct omap_hwmod *oh)
2625{
2626 int ret, i;
2627
bc614958 2628 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238
PW
2629
2630 for (i = 0; i < oh->slaves_cnt; i++)
78183f3f 2631 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
63c85238
PW
2632
2633 return ret;
2634}
2635
2636/**
2637 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2638 * @oh: struct omap_hwmod *
2639 * @res: pointer to the first element of an array of struct resource to fill
2640 *
2641 * Fill the struct resource array @res with resource data from the
2642 * omap_hwmod @oh. Intended to be called by code that registers
2643 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2644 * number of array elements filled.
2645 */
2646int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2647{
bc614958 2648 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
63c85238
PW
2649 int r = 0;
2650
2651 /* For each IRQ, DMA, memory area, fill in array.*/
2652
212738a4
PW
2653 mpu_irqs_cnt = _count_mpu_irqs(oh);
2654 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2655 (res + r)->name = (oh->mpu_irqs + i)->name;
2656 (res + r)->start = (oh->mpu_irqs + i)->irq;
2657 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2658 (res + r)->flags = IORESOURCE_IRQ;
2659 r++;
2660 }
2661
bc614958
PW
2662 sdma_reqs_cnt = _count_sdma_reqs(oh);
2663 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2664 (res + r)->name = (oh->sdma_reqs + i)->name;
2665 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2666 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2667 (res + r)->flags = IORESOURCE_DMA;
2668 r++;
2669 }
2670
2671 for (i = 0; i < oh->slaves_cnt; i++) {
2672 struct omap_hwmod_ocp_if *os;
78183f3f 2673 int addr_cnt;
63c85238 2674
682fdc96 2675 os = oh->slaves[i];
78183f3f 2676 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2677
78183f3f 2678 for (j = 0; j < addr_cnt; j++) {
cd503802 2679 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2680 (res + r)->start = (os->addr + j)->pa_start;
2681 (res + r)->end = (os->addr + j)->pa_end;
2682 (res + r)->flags = IORESOURCE_MEM;
2683 r++;
2684 }
2685 }
2686
2687 return r;
2688}
2689
5e8370f1
PW
2690/**
2691 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2692 * @oh: struct omap_hwmod * to operate on
2693 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2694 * @name: pointer to the name of the data to fetch (optional)
2695 * @rsrc: pointer to a struct resource, allocated by the caller
2696 *
2697 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2698 * data for the IP block pointed to by @oh. The data will be filled
2699 * into a struct resource record pointed to by @rsrc. The struct
2700 * resource must be allocated by the caller. When @name is non-null,
2701 * the data associated with the matching entry in the IRQ/SDMA/address
2702 * space hwmod data arrays will be returned. If @name is null, the
2703 * first array entry will be returned. Data order is not meaningful
2704 * in hwmod data, so callers are strongly encouraged to use a non-null
2705 * @name whenever possible to avoid unpredictable effects if hwmod
2706 * data is later added that causes data ordering to change. This
2707 * function is only intended for use by OMAP core code. Device
2708 * drivers should not call this function - the appropriate bus-related
2709 * data accessor functions should be used instead. Returns 0 upon
2710 * success or a negative error code upon error.
2711 */
2712int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2713 const char *name, struct resource *rsrc)
2714{
2715 int r;
2716 unsigned int irq, dma;
2717 u32 pa_start, pa_end;
2718
2719 if (!oh || !rsrc)
2720 return -EINVAL;
2721
2722 if (type == IORESOURCE_IRQ) {
2723 r = _get_mpu_irq_by_name(oh, name, &irq);
2724 if (r)
2725 return r;
2726
2727 rsrc->start = irq;
2728 rsrc->end = irq;
2729 } else if (type == IORESOURCE_DMA) {
2730 r = _get_sdma_req_by_name(oh, name, &dma);
2731 if (r)
2732 return r;
2733
2734 rsrc->start = dma;
2735 rsrc->end = dma;
2736 } else if (type == IORESOURCE_MEM) {
2737 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
2738 if (r)
2739 return r;
2740
2741 rsrc->start = pa_start;
2742 rsrc->end = pa_end;
2743 } else {
2744 return -EINVAL;
2745 }
2746
2747 rsrc->flags = type;
2748 rsrc->name = name;
2749
2750 return 0;
2751}
2752
63c85238
PW
2753/**
2754 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2755 * @oh: struct omap_hwmod *
2756 *
2757 * Return the powerdomain pointer associated with the OMAP module
2758 * @oh's main clock. If @oh does not have a main clk, return the
2759 * powerdomain associated with the interface clock associated with the
2760 * module's MPU port. (XXX Perhaps this should use the SDMA port
2761 * instead?) Returns NULL on error, or a struct powerdomain * on
2762 * success.
2763 */
2764struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2765{
2766 struct clk *c;
2d6141ba 2767 struct omap_hwmod_ocp_if *oi;
63c85238
PW
2768
2769 if (!oh)
2770 return NULL;
2771
2772 if (oh->_clk) {
2773 c = oh->_clk;
2774 } else {
2d6141ba
PW
2775 oi = _find_mpu_rt_port(oh);
2776 if (!oi)
63c85238 2777 return NULL;
2d6141ba 2778 c = oi->_clk;
63c85238
PW
2779 }
2780
d5647c18
TG
2781 if (!c->clkdm)
2782 return NULL;
2783
63c85238
PW
2784 return c->clkdm->pwrdm.ptr;
2785
2786}
2787
db2a60bf
PW
2788/**
2789 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2790 * @oh: struct omap_hwmod *
2791 *
2792 * Returns the virtual address corresponding to the beginning of the
2793 * module's register target, in the address range that is intended to
2794 * be used by the MPU. Returns the virtual address upon success or NULL
2795 * upon error.
2796 */
2797void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2798{
2799 if (!oh)
2800 return NULL;
2801
2802 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2803 return NULL;
2804
2805 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2806 return NULL;
2807
2808 return oh->_mpu_rt_va;
2809}
2810
63c85238
PW
2811/**
2812 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2813 * @oh: struct omap_hwmod *
2814 * @init_oh: struct omap_hwmod * (initiator)
2815 *
2816 * Add a sleep dependency between the initiator @init_oh and @oh.
2817 * Intended to be called by DSP/Bridge code via platform_data for the
2818 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2819 * code needs to add/del initiator dependencies dynamically
2820 * before/after accessing a device. Returns the return value from
2821 * _add_initiator_dep().
2822 *
2823 * XXX Keep a usecount in the clockdomain code
2824 */
2825int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2826 struct omap_hwmod *init_oh)
2827{
2828 return _add_initiator_dep(oh, init_oh);
2829}
2830
2831/*
2832 * XXX what about functions for drivers to save/restore ocp_sysconfig
2833 * for context save/restore operations?
2834 */
2835
2836/**
2837 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2838 * @oh: struct omap_hwmod *
2839 * @init_oh: struct omap_hwmod * (initiator)
2840 *
2841 * Remove a sleep dependency between the initiator @init_oh and @oh.
2842 * Intended to be called by DSP/Bridge code via platform_data for the
2843 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2844 * code needs to add/del initiator dependencies dynamically
2845 * before/after accessing a device. Returns the return value from
2846 * _del_initiator_dep().
2847 *
2848 * XXX Keep a usecount in the clockdomain code
2849 */
2850int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2851 struct omap_hwmod *init_oh)
2852{
2853 return _del_initiator_dep(oh, init_oh);
2854}
2855
63c85238
PW
2856/**
2857 * omap_hwmod_enable_wakeup - allow device to wake up the system
2858 * @oh: struct omap_hwmod *
2859 *
2860 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
2861 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2862 * this IP block if it has dynamic mux entries. Eventually this
2863 * should set PRCM wakeup registers to cause the PRCM to receive
2864 * wakeup events from the module. Does not set any wakeup routing
2865 * registers beyond this point - if the module is to wake up any other
2866 * module or subsystem, that must be set separately. Called by
2867 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
2868 */
2869int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2870{
dc6d1cda 2871 unsigned long flags;
5a7ddcbd 2872 u32 v;
dc6d1cda 2873
dc6d1cda 2874 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
2875
2876 if (oh->class->sysc &&
2877 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2878 v = oh->_sysc_cache;
2879 _enable_wakeup(oh, &v);
2880 _write_sysconfig(v, oh);
2881 }
2882
eceec009 2883 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 2884 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2885
2886 return 0;
2887}
2888
2889/**
2890 * omap_hwmod_disable_wakeup - prevent device from waking the system
2891 * @oh: struct omap_hwmod *
2892 *
2893 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
2894 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2895 * events for this IP block if it has dynamic mux entries. Eventually
2896 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2897 * wakeup events from the module. Does not set any wakeup routing
2898 * registers beyond this point - if the module is to wake up any other
2899 * module or subsystem, that must be set separately. Called by
2900 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
2901 */
2902int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2903{
dc6d1cda 2904 unsigned long flags;
5a7ddcbd 2905 u32 v;
dc6d1cda 2906
dc6d1cda 2907 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
2908
2909 if (oh->class->sysc &&
2910 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2911 v = oh->_sysc_cache;
2912 _disable_wakeup(oh, &v);
2913 _write_sysconfig(v, oh);
2914 }
2915
eceec009 2916 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 2917 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2918
2919 return 0;
2920}
43b40992 2921
aee48e3c
PW
2922/**
2923 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2924 * contained in the hwmod module.
2925 * @oh: struct omap_hwmod *
2926 * @name: name of the reset line to lookup and assert
2927 *
2928 * Some IP like dsp, ipu or iva contain processor that require
2929 * an HW reset line to be assert / deassert in order to enable fully
2930 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2931 * yet supported on this OMAP; otherwise, passes along the return value
2932 * from _assert_hardreset().
2933 */
2934int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2935{
2936 int ret;
dc6d1cda 2937 unsigned long flags;
aee48e3c
PW
2938
2939 if (!oh)
2940 return -EINVAL;
2941
dc6d1cda 2942 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2943 ret = _assert_hardreset(oh, name);
dc6d1cda 2944 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2945
2946 return ret;
2947}
2948
2949/**
2950 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2951 * contained in the hwmod module.
2952 * @oh: struct omap_hwmod *
2953 * @name: name of the reset line to look up and deassert
2954 *
2955 * Some IP like dsp, ipu or iva contain processor that require
2956 * an HW reset line to be assert / deassert in order to enable fully
2957 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2958 * yet supported on this OMAP; otherwise, passes along the return value
2959 * from _deassert_hardreset().
2960 */
2961int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2962{
2963 int ret;
dc6d1cda 2964 unsigned long flags;
aee48e3c
PW
2965
2966 if (!oh)
2967 return -EINVAL;
2968
dc6d1cda 2969 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2970 ret = _deassert_hardreset(oh, name);
dc6d1cda 2971 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2972
2973 return ret;
2974}
2975
2976/**
2977 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2978 * contained in the hwmod module
2979 * @oh: struct omap_hwmod *
2980 * @name: name of the reset line to look up and read
2981 *
2982 * Return the current state of the hwmod @oh's reset line named @name:
2983 * returns -EINVAL upon parameter error or if this operation
2984 * is unsupported on the current OMAP; otherwise, passes along the return
2985 * value from _read_hardreset().
2986 */
2987int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2988{
2989 int ret;
dc6d1cda 2990 unsigned long flags;
aee48e3c
PW
2991
2992 if (!oh)
2993 return -EINVAL;
2994
dc6d1cda 2995 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2996 ret = _read_hardreset(oh, name);
dc6d1cda 2997 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2998
2999 return ret;
3000}
3001
3002
43b40992
PW
3003/**
3004 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3005 * @classname: struct omap_hwmod_class name to search for
3006 * @fn: callback function pointer to call for each hwmod in class @classname
3007 * @user: arbitrary context data to pass to the callback function
3008 *
ce35b244
BC
3009 * For each omap_hwmod of class @classname, call @fn.
3010 * If the callback function returns something other than
43b40992
PW
3011 * zero, the iterator is terminated, and the callback function's return
3012 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3013 * if @classname or @fn are NULL, or passes back the error code from @fn.
3014 */
3015int omap_hwmod_for_each_by_class(const char *classname,
3016 int (*fn)(struct omap_hwmod *oh,
3017 void *user),
3018 void *user)
3019{
3020 struct omap_hwmod *temp_oh;
3021 int ret = 0;
3022
3023 if (!classname || !fn)
3024 return -EINVAL;
3025
3026 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3027 __func__, classname);
3028
43b40992
PW
3029 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3030 if (!strcmp(temp_oh->class->name, classname)) {
3031 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3032 __func__, temp_oh->name);
3033 ret = (*fn)(temp_oh, user);
3034 if (ret)
3035 break;
3036 }
3037 }
3038
43b40992
PW
3039 if (ret)
3040 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3041 __func__, ret);
3042
3043 return ret;
3044}
3045
2092e5cc
PW
3046/**
3047 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3048 * @oh: struct omap_hwmod *
3049 * @state: state that _setup() should leave the hwmod in
3050 *
550c8092 3051 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3052 * (called by omap_hwmod_setup_*()). See also the documentation
3053 * for _setup_postsetup(), above. Returns 0 upon success or
3054 * -EINVAL if there is a problem with the arguments or if the hwmod is
3055 * in the wrong state.
2092e5cc
PW
3056 */
3057int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3058{
3059 int ret;
dc6d1cda 3060 unsigned long flags;
2092e5cc
PW
3061
3062 if (!oh)
3063 return -EINVAL;
3064
3065 if (state != _HWMOD_STATE_DISABLED &&
3066 state != _HWMOD_STATE_ENABLED &&
3067 state != _HWMOD_STATE_IDLE)
3068 return -EINVAL;
3069
dc6d1cda 3070 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3071
3072 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3073 ret = -EINVAL;
3074 goto ohsps_unlock;
3075 }
3076
3077 oh->_postsetup_state = state;
3078 ret = 0;
3079
3080ohsps_unlock:
dc6d1cda 3081 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3082
3083 return ret;
3084}
c80705aa
KH
3085
3086/**
3087 * omap_hwmod_get_context_loss_count - get lost context count
3088 * @oh: struct omap_hwmod *
3089 *
3090 * Query the powerdomain of of @oh to get the context loss
3091 * count for this device.
3092 *
3093 * Returns the context loss count of the powerdomain assocated with @oh
3094 * upon success, or zero if no powerdomain exists for @oh.
3095 */
fc013873 3096int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3097{
3098 struct powerdomain *pwrdm;
3099 int ret = 0;
3100
3101 pwrdm = omap_hwmod_get_pwrdm(oh);
3102 if (pwrdm)
3103 ret = pwrdm_get_context_loss_count(pwrdm);
3104
3105 return ret;
3106}
43b01643
PW
3107
3108/**
3109 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3110 * @oh: struct omap_hwmod *
3111 *
3112 * Prevent the hwmod @oh from being reset during the setup process.
3113 * Intended for use by board-*.c files on boards with devices that
3114 * cannot tolerate being reset. Must be called before the hwmod has
3115 * been set up. Returns 0 upon success or negative error code upon
3116 * failure.
3117 */
3118int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3119{
3120 if (!oh)
3121 return -EINVAL;
3122
3123 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3124 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3125 oh->name);
3126 return -EINVAL;
3127 }
3128
3129 oh->flags |= HWMOD_INIT_NO_RESET;
3130
3131 return 0;
3132}
abc2d545
TK
3133
3134/**
3135 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3136 * @oh: struct omap_hwmod * containing hwmod mux entries
3137 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3138 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3139 *
3140 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3141 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3142 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3143 * this function is not called for a given pad_idx, then the ISR
3144 * associated with @oh's first MPU IRQ will be triggered when an I/O
3145 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3146 * the _dynamic or wakeup_ entry: if there are other entries not
3147 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3148 * entries are NOT COUNTED in the dynamic pad index. This function
3149 * must be called separately for each pad that requires its interrupt
3150 * to be re-routed this way. Returns -EINVAL if there is an argument
3151 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3152 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3153 *
3154 * XXX This function interface is fragile. Rather than using array
3155 * indexes, which are subject to unpredictable change, it should be
3156 * using hwmod IRQ names, and some other stable key for the hwmod mux
3157 * pad records.
3158 */
3159int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3160{
3161 int nr_irqs;
3162
3163 might_sleep();
3164
3165 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3166 pad_idx >= oh->mux->nr_pads_dynamic)
3167 return -EINVAL;
3168
3169 /* Check the number of available mpu_irqs */
3170 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3171 ;
3172
3173 if (irq_idx >= nr_irqs)
3174 return -EINVAL;
3175
3176 if (!oh->mux->irqs) {
3177 /* XXX What frees this? */
3178 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3179 GFP_KERNEL);
3180 if (!oh->mux->irqs)
3181 return -ENOMEM;
3182 }
3183 oh->mux->irqs[pad_idx] = irq_idx;
3184
3185 return 0;
3186}