Merge branch 'omap-for-v3.8/cleanup-headers-asoc' into omap-for-v3.8/cleanup-headers
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
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142#include <plat/clock.h>
143#include <plat/omap_hwmod.h>
5365efbe 144#include <plat/prcm.h>
63c85238 145
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146#include "soc.h"
147#include "common.h"
148#include "clockdomain.h"
149#include "powerdomain.h"
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
1688bf19 152#include "cm33xx.h"
59fb659b 153#include "prm2xxx_3xxx.h"
d198b514 154#include "prm44xx.h"
1688bf19 155#include "prm33xx.h"
eaac329d 156#include "prminst44xx.h"
8d9af88f 157#include "mux.h"
5165882a 158#include "pm.h"
63c85238 159
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160/* Maximum microseconds to wait for OMAP module to softreset */
161#define MAX_MODULE_SOFTRESET_WAIT 10000
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162
163/* Name of the OMAP hwmod for the MPU */
5c2c0296 164#define MPU_INITIATOR_NAME "mpu"
63c85238 165
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166/*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170#define LINKS_PER_OCP_IF 2
171
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172/**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 184 int (*wait_target_ready)(struct omap_hwmod *oh);
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185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
0a179eaa 191 int (*init_clkdm)(struct omap_hwmod *oh);
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192};
193
194/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
195static struct omap_hwmod_soc_ops soc_ops;
196
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197/* omap_hwmod_list contains all registered struct omap_hwmods */
198static LIST_HEAD(omap_hwmod_list);
199
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200/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
201static struct omap_hwmod *mpu_oh;
202
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203/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
204static DEFINE_SPINLOCK(io_chain_lock);
205
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206/*
207 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
208 * allocated from - used to reduce the number of small memory
209 * allocations, which has a significant impact on performance
210 */
211static struct omap_hwmod_link *linkspace;
212
213/*
214 * free_ls, max_ls: array indexes into linkspace; representing the
215 * next free struct omap_hwmod_link index, and the maximum number of
216 * struct omap_hwmod_link records allocated (respectively)
217 */
218static unsigned short free_ls, max_ls, ls_supp;
63c85238 219
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220/* inited: set to true once the hwmod code is initialized */
221static bool inited;
222
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223/* Private functions */
224
5d95dde7 225/**
11cd4b94 226 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 227 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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228 * @i: pointer to the index of the element pointed to by @p in the list
229 *
230 * Return a pointer to the struct omap_hwmod_ocp_if record
231 * containing the struct list_head pointed to by @p, and increment
232 * @p such that a future call to this routine will return the next
233 * record.
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234 */
235static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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236 int *i)
237{
238 struct omap_hwmod_ocp_if *oi;
239
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240 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
241 *p = (*p)->next;
2221b5cd 242
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243 *i = *i + 1;
244
245 return oi;
246}
247
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248/**
249 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
250 * @oh: struct omap_hwmod *
251 *
252 * Load the current value of the hwmod OCP_SYSCONFIG register into the
253 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
254 * OCP_SYSCONFIG register or 0 upon success.
255 */
256static int _update_sysc_cache(struct omap_hwmod *oh)
257{
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258 if (!oh->class->sysc) {
259 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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260 return -EINVAL;
261 }
262
263 /* XXX ensure module interface clock is up */
264
cc7a1d2a 265 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 266
43b40992 267 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 268 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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269
270 return 0;
271}
272
273/**
274 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
275 * @v: OCP_SYSCONFIG value to write
276 * @oh: struct omap_hwmod *
277 *
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278 * Write @v into the module class' OCP_SYSCONFIG register, if it has
279 * one. No return value.
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280 */
281static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282{
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283 if (!oh->class->sysc) {
284 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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285 return;
286 }
287
288 /* XXX ensure module interface clock is up */
289
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290 /* Module might have lost context, always update cache and register */
291 oh->_sysc_cache = v;
292 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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293}
294
295/**
296 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @standbymode: MIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the master standby mode bits in @v to be @standbymode for
302 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
303 * upon error or 0 upon success.
304 */
305static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
306 u32 *v)
307{
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308 u32 mstandby_mask;
309 u8 mstandby_shift;
310
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311 if (!oh->class->sysc ||
312 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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313 return -EINVAL;
314
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315 if (!oh->class->sysc->sysc_fields) {
316 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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317 return -EINVAL;
318 }
319
43b40992 320 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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321 mstandby_mask = (0x3 << mstandby_shift);
322
323 *v &= ~mstandby_mask;
324 *v |= __ffs(standbymode) << mstandby_shift;
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325
326 return 0;
327}
328
329/**
330 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
331 * @oh: struct omap_hwmod *
332 * @idlemode: SIDLEMODE field bits
333 * @v: pointer to register contents to modify
334 *
335 * Update the slave idle mode bits in @v to be @idlemode for the @oh
336 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
337 * or 0 upon success.
338 */
339static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
340{
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341 u32 sidle_mask;
342 u8 sidle_shift;
343
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344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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346 return -EINVAL;
347
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348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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350 return -EINVAL;
351 }
352
43b40992 353 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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354 sidle_mask = (0x3 << sidle_shift);
355
356 *v &= ~sidle_mask;
357 *v |= __ffs(idlemode) << sidle_shift;
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358
359 return 0;
360}
361
362/**
363 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @clockact: CLOCKACTIVITY field bits
366 * @v: pointer to register contents to modify
367 *
368 * Update the clockactivity mode bits in @v to be @clockact for the
369 * @oh hwmod. Used for additional powersaving on some modules. Does
370 * not write to the hardware. Returns -EINVAL upon error or 0 upon
371 * success.
372 */
373static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
374{
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375 u32 clkact_mask;
376 u8 clkact_shift;
377
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378 if (!oh->class->sysc ||
379 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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380 return -EINVAL;
381
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382 if (!oh->class->sysc->sysc_fields) {
383 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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384 return -EINVAL;
385 }
386
43b40992 387 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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388 clkact_mask = (0x3 << clkact_shift);
389
390 *v &= ~clkact_mask;
391 *v |= clockact << clkact_shift;
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392
393 return 0;
394}
395
396/**
397 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
398 * @oh: struct omap_hwmod *
399 * @v: pointer to register contents to modify
400 *
401 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
402 * error or 0 upon success.
403 */
404static int _set_softreset(struct omap_hwmod *oh, u32 *v)
405{
358f0e63
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406 u32 softrst_mask;
407
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408 if (!oh->class->sysc ||
409 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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410 return -EINVAL;
411
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412 if (!oh->class->sysc->sysc_fields) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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414 return -EINVAL;
415 }
416
43b40992 417 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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418
419 *v |= softrst_mask;
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420
421 return 0;
422}
423
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424/**
425 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426 * @oh: struct omap_hwmod *
427 *
428 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
429 * of some modules. When the DMA must perform read/write accesses, the
430 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
431 * for power management, software must set the DMADISABLE bit back to 1.
432 *
433 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
434 * error or 0 upon success.
435 */
436static int _set_dmadisable(struct omap_hwmod *oh)
437{
438 u32 v;
439 u32 dmadisable_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
447 return -EINVAL;
448 }
449
450 /* clocks must be on for this operation */
451 if (oh->_state != _HWMOD_STATE_ENABLED) {
452 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
453 return -EINVAL;
454 }
455
456 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
457
458 v = oh->_sysc_cache;
459 dmadisable_mask =
460 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
461 v |= dmadisable_mask;
462 _write_sysconfig(v, oh);
463
464 return 0;
465}
466
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467/**
468 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
469 * @oh: struct omap_hwmod *
470 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
471 * @v: pointer to register contents to modify
472 *
473 * Update the module autoidle bit in @v to be @autoidle for the @oh
474 * hwmod. The autoidle bit controls whether the module can gate
475 * internal clocks automatically when it isn't doing anything; the
476 * exact function of this bit varies on a per-module basis. This
477 * function does not write to the hardware. Returns -EINVAL upon
478 * error or 0 upon success.
479 */
480static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
481 u32 *v)
482{
358f0e63
TG
483 u32 autoidle_mask;
484 u8 autoidle_shift;
485
43b40992
PW
486 if (!oh->class->sysc ||
487 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
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488 return -EINVAL;
489
43b40992
PW
490 if (!oh->class->sysc->sysc_fields) {
491 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
492 return -EINVAL;
493 }
494
43b40992 495 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 496 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
497
498 *v &= ~autoidle_mask;
499 *v |= autoidle << autoidle_shift;
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PW
500
501 return 0;
502}
503
eceec009
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504/**
505 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
506 * @oh: struct omap_hwmod *
507 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
508 *
509 * Set or clear the I/O pad wakeup flag in the mux entries for the
510 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
511 * in memory. If the hwmod is currently idled, and the new idle
512 * values don't match the previous ones, this function will also
513 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
514 * currently idled, this function won't touch the hardware: the new
515 * mux settings are written to the SCM PADCTRL registers when the
516 * hwmod is idled. No return value.
517 */
518static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
519{
520 struct omap_device_pad *pad;
521 bool change = false;
522 u16 prev_idle;
523 int j;
524
525 if (!oh->mux || !oh->mux->enabled)
526 return;
527
528 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
529 pad = oh->mux->pads_dynamic[j];
530
531 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
532 continue;
533
534 prev_idle = pad->idle;
535
536 if (set_wake)
537 pad->idle |= OMAP_WAKEUP_EN;
538 else
539 pad->idle &= ~OMAP_WAKEUP_EN;
540
541 if (prev_idle != pad->idle)
542 change = true;
543 }
544
545 if (change && oh->_state == _HWMOD_STATE_IDLE)
546 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
547}
548
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549/**
550 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
551 * @oh: struct omap_hwmod *
552 *
553 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
554 * upon error or 0 upon success.
555 */
5a7ddcbd 556static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 557{
43b40992 558 if (!oh->class->sysc ||
86009eb3 559 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
560 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
561 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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562 return -EINVAL;
563
43b40992
PW
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
566 return -EINVAL;
567 }
568
1fe74113
BC
569 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
570 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 571
86009eb3
BC
572 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
573 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
574 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
575 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 576
63c85238
PW
577 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
578
579 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
580
581 return 0;
582}
583
584/**
585 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
586 * @oh: struct omap_hwmod *
587 *
588 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
589 * upon error or 0 upon success.
590 */
5a7ddcbd 591static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 592{
43b40992 593 if (!oh->class->sysc ||
86009eb3 594 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
595 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
596 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
597 return -EINVAL;
598
43b40992
PW
599 if (!oh->class->sysc->sysc_fields) {
600 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
601 return -EINVAL;
602 }
603
1fe74113
BC
604 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
605 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 606
86009eb3
BC
607 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
608 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 609 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 610 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 611
63c85238
PW
612 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
613
614 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
615
616 return 0;
617}
618
619/**
620 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
621 * @oh: struct omap_hwmod *
622 *
623 * Prevent the hardware module @oh from entering idle while the
624 * hardare module initiator @init_oh is active. Useful when a module
625 * will be accessed by a particular initiator (e.g., if a module will
626 * be accessed by the IVA, there should be a sleepdep between the IVA
627 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
628 * mode. If the clockdomain is marked as not needing autodeps, return
629 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
630 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
631 */
632static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
633{
634 if (!oh->_clk)
635 return -EINVAL;
636
570b54c7
PW
637 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
638 return 0;
639
55ed9694 640 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
641}
642
643/**
644 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
645 * @oh: struct omap_hwmod *
646 *
647 * Allow the hardware module @oh to enter idle while the hardare
648 * module initiator @init_oh is active. Useful when a module will not
649 * be accessed by a particular initiator (e.g., if a module will not
650 * be accessed by the IVA, there should be no sleepdep between the IVA
651 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
652 * mode. If the clockdomain is marked as not needing autodeps, return
653 * 0 without doing anything. Returns -EINVAL upon error or passes
654 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
655 */
656static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
657{
658 if (!oh->_clk)
659 return -EINVAL;
660
570b54c7
PW
661 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
662 return 0;
663
55ed9694 664 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
665}
666
667/**
668 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
669 * @oh: struct omap_hwmod *
670 *
671 * Called from _init_clocks(). Populates the @oh _clk (main
672 * functional clock pointer) if a main_clk is present. Returns 0 on
673 * success or -EINVAL on error.
674 */
675static int _init_main_clk(struct omap_hwmod *oh)
676{
63c85238
PW
677 int ret = 0;
678
50ebdac2 679 if (!oh->main_clk)
63c85238
PW
680 return 0;
681
6ea74cb9
RN
682 oh->_clk = clk_get(NULL, oh->main_clk);
683 if (IS_ERR(oh->_clk)) {
20383d82
BC
684 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
685 oh->name, oh->main_clk);
63403384 686 return -EINVAL;
dc75925d 687 }
4d7cb45e
RN
688 /*
689 * HACK: This needs a re-visit once clk_prepare() is implemented
690 * to do something meaningful. Today its just a no-op.
691 * If clk_prepare() is used at some point to do things like
692 * voltage scaling etc, then this would have to be moved to
693 * some point where subsystems like i2c and pmic become
694 * available.
695 */
696 clk_prepare(oh->_clk);
63c85238 697
63403384 698 if (!oh->_clk->clkdm)
3bb05dbf 699 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
5dcc3b97 700 oh->name, oh->main_clk);
81d7c6ff 701
63c85238
PW
702 return ret;
703}
704
705/**
887adeac 706 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
707 * @oh: struct omap_hwmod *
708 *
709 * Called from _init_clocks(). Populates the @oh OCP slave interface
710 * clock pointers. Returns 0 on success or -EINVAL on error.
711 */
712static int _init_interface_clks(struct omap_hwmod *oh)
713{
5d95dde7 714 struct omap_hwmod_ocp_if *os;
11cd4b94 715 struct list_head *p;
63c85238 716 struct clk *c;
5d95dde7 717 int i = 0;
63c85238
PW
718 int ret = 0;
719
11cd4b94 720 p = oh->slave_ports.next;
2221b5cd 721
5d95dde7 722 while (i < oh->slaves_cnt) {
11cd4b94 723 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 724 if (!os->clk)
63c85238
PW
725 continue;
726
6ea74cb9
RN
727 c = clk_get(NULL, os->clk);
728 if (IS_ERR(c)) {
20383d82
BC
729 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
730 oh->name, os->clk);
63c85238 731 ret = -EINVAL;
dc75925d 732 }
63c85238 733 os->_clk = c;
4d7cb45e
RN
734 /*
735 * HACK: This needs a re-visit once clk_prepare() is implemented
736 * to do something meaningful. Today its just a no-op.
737 * If clk_prepare() is used at some point to do things like
738 * voltage scaling etc, then this would have to be moved to
739 * some point where subsystems like i2c and pmic become
740 * available.
741 */
742 clk_prepare(os->_clk);
63c85238
PW
743 }
744
745 return ret;
746}
747
748/**
749 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
750 * @oh: struct omap_hwmod *
751 *
752 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
753 * clock pointers. Returns 0 on success or -EINVAL on error.
754 */
755static int _init_opt_clks(struct omap_hwmod *oh)
756{
757 struct omap_hwmod_opt_clk *oc;
758 struct clk *c;
759 int i;
760 int ret = 0;
761
762 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
6ea74cb9
RN
763 c = clk_get(NULL, oc->clk);
764 if (IS_ERR(c)) {
20383d82
BC
765 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
766 oh->name, oc->clk);
63c85238 767 ret = -EINVAL;
dc75925d 768 }
63c85238 769 oc->_clk = c;
4d7cb45e
RN
770 /*
771 * HACK: This needs a re-visit once clk_prepare() is implemented
772 * to do something meaningful. Today its just a no-op.
773 * If clk_prepare() is used at some point to do things like
774 * voltage scaling etc, then this would have to be moved to
775 * some point where subsystems like i2c and pmic become
776 * available.
777 */
778 clk_prepare(oc->_clk);
63c85238
PW
779 }
780
781 return ret;
782}
783
784/**
785 * _enable_clocks - enable hwmod main clock and interface clocks
786 * @oh: struct omap_hwmod *
787 *
788 * Enables all clocks necessary for register reads and writes to succeed
789 * on the hwmod @oh. Returns 0.
790 */
791static int _enable_clocks(struct omap_hwmod *oh)
792{
5d95dde7 793 struct omap_hwmod_ocp_if *os;
11cd4b94 794 struct list_head *p;
5d95dde7 795 int i = 0;
63c85238
PW
796
797 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
798
4d3ae5a9 799 if (oh->_clk)
63c85238
PW
800 clk_enable(oh->_clk);
801
11cd4b94 802 p = oh->slave_ports.next;
2221b5cd 803
5d95dde7 804 while (i < oh->slaves_cnt) {
11cd4b94 805 os = _fetch_next_ocp_if(&p, &i);
63c85238 806
5d95dde7
PW
807 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
808 clk_enable(os->_clk);
63c85238
PW
809 }
810
811 /* The opt clocks are controlled by the device driver. */
812
813 return 0;
814}
815
816/**
817 * _disable_clocks - disable hwmod main clock and interface clocks
818 * @oh: struct omap_hwmod *
819 *
820 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
821 */
822static int _disable_clocks(struct omap_hwmod *oh)
823{
5d95dde7 824 struct omap_hwmod_ocp_if *os;
11cd4b94 825 struct list_head *p;
5d95dde7 826 int i = 0;
63c85238
PW
827
828 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
829
4d3ae5a9 830 if (oh->_clk)
63c85238
PW
831 clk_disable(oh->_clk);
832
11cd4b94 833 p = oh->slave_ports.next;
2221b5cd 834
5d95dde7 835 while (i < oh->slaves_cnt) {
11cd4b94 836 os = _fetch_next_ocp_if(&p, &i);
63c85238 837
5d95dde7
PW
838 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
839 clk_disable(os->_clk);
63c85238
PW
840 }
841
842 /* The opt clocks are controlled by the device driver. */
843
844 return 0;
845}
846
96835af9
BC
847static void _enable_optional_clocks(struct omap_hwmod *oh)
848{
849 struct omap_hwmod_opt_clk *oc;
850 int i;
851
852 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
853
854 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
855 if (oc->_clk) {
856 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
5dcc3b97 857 __clk_get_name(oc->_clk));
96835af9
BC
858 clk_enable(oc->_clk);
859 }
860}
861
862static void _disable_optional_clocks(struct omap_hwmod *oh)
863{
864 struct omap_hwmod_opt_clk *oc;
865 int i;
866
867 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
868
869 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
870 if (oc->_clk) {
871 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
5dcc3b97 872 __clk_get_name(oc->_clk));
96835af9
BC
873 clk_disable(oc->_clk);
874 }
875}
876
45c38252 877/**
3d9f0327 878 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
879 * @oh: struct omap_hwmod *
880 *
881 * Enables the PRCM module mode related to the hwmod @oh.
882 * No return value.
883 */
3d9f0327 884static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 885{
45c38252
BC
886 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
887 return;
888
3d9f0327
KH
889 pr_debug("omap_hwmod: %s: %s: %d\n",
890 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
891
892 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
893 oh->clkdm->prcm_partition,
894 oh->clkdm->cm_inst,
895 oh->clkdm->clkdm_offs,
896 oh->prcm.omap4.clkctrl_offs);
897}
898
1688bf19
VH
899/**
900 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
901 * @oh: struct omap_hwmod *
902 *
903 * Enables the PRCM module mode related to the hwmod @oh.
904 * No return value.
905 */
906static void _am33xx_enable_module(struct omap_hwmod *oh)
907{
908 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
909 return;
910
911 pr_debug("omap_hwmod: %s: %s: %d\n",
912 oh->name, __func__, oh->prcm.omap4.modulemode);
913
914 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
915 oh->clkdm->clkdm_offs,
916 oh->prcm.omap4.clkctrl_offs);
917}
918
45c38252 919/**
bfc141e3
BC
920 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
921 * @oh: struct omap_hwmod *
922 *
923 * Wait for a module @oh to enter slave idle. Returns 0 if the module
924 * does not have an IDLEST bit or if the module successfully enters
925 * slave idle; otherwise, pass along the return value of the
926 * appropriate *_cm*_wait_module_idle() function.
927 */
928static int _omap4_wait_target_disable(struct omap_hwmod *oh)
929{
2b026d13 930 if (!oh)
bfc141e3
BC
931 return -EINVAL;
932
2b026d13 933 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
bfc141e3
BC
934 return 0;
935
936 if (oh->flags & HWMOD_NO_IDLEST)
937 return 0;
938
939 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
940 oh->clkdm->cm_inst,
941 oh->clkdm->clkdm_offs,
942 oh->prcm.omap4.clkctrl_offs);
943}
944
1688bf19
VH
945/**
946 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
947 * @oh: struct omap_hwmod *
948 *
949 * Wait for a module @oh to enter slave idle. Returns 0 if the module
950 * does not have an IDLEST bit or if the module successfully enters
951 * slave idle; otherwise, pass along the return value of the
952 * appropriate *_cm*_wait_module_idle() function.
953 */
954static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
955{
956 if (!oh)
957 return -EINVAL;
958
959 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
960 return 0;
961
962 if (oh->flags & HWMOD_NO_IDLEST)
963 return 0;
964
965 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
966 oh->clkdm->clkdm_offs,
967 oh->prcm.omap4.clkctrl_offs);
968}
969
212738a4
PW
970/**
971 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
972 * @oh: struct omap_hwmod *oh
973 *
974 * Count and return the number of MPU IRQs associated with the hwmod
975 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
976 * NULL.
977 */
978static int _count_mpu_irqs(struct omap_hwmod *oh)
979{
980 struct omap_hwmod_irq_info *ohii;
981 int i = 0;
982
983 if (!oh || !oh->mpu_irqs)
984 return 0;
985
986 do {
987 ohii = &oh->mpu_irqs[i++];
988 } while (ohii->irq != -1);
989
cc1b0765 990 return i-1;
212738a4
PW
991}
992
bc614958
PW
993/**
994 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
995 * @oh: struct omap_hwmod *oh
996 *
997 * Count and return the number of SDMA request lines associated with
998 * the hwmod @oh. Used to allocate struct resource data. Returns 0
999 * if @oh is NULL.
1000 */
1001static int _count_sdma_reqs(struct omap_hwmod *oh)
1002{
1003 struct omap_hwmod_dma_info *ohdi;
1004 int i = 0;
1005
1006 if (!oh || !oh->sdma_reqs)
1007 return 0;
1008
1009 do {
1010 ohdi = &oh->sdma_reqs[i++];
1011 } while (ohdi->dma_req != -1);
1012
cc1b0765 1013 return i-1;
bc614958
PW
1014}
1015
78183f3f
PW
1016/**
1017 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1018 * @oh: struct omap_hwmod *oh
1019 *
1020 * Count and return the number of address space ranges associated with
1021 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1022 * if @oh is NULL.
1023 */
1024static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1025{
1026 struct omap_hwmod_addr_space *mem;
1027 int i = 0;
1028
1029 if (!os || !os->addr)
1030 return 0;
1031
1032 do {
1033 mem = &os->addr[i++];
1034 } while (mem->pa_start != mem->pa_end);
1035
cc1b0765 1036 return i-1;
78183f3f
PW
1037}
1038
5e8370f1
PW
1039/**
1040 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1041 * @oh: struct omap_hwmod * to operate on
1042 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1043 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1044 *
1045 * Retrieve a MPU hardware IRQ line number named by @name associated
1046 * with the IP block pointed to by @oh. The IRQ number will be filled
1047 * into the address pointed to by @dma. When @name is non-null, the
1048 * IRQ line number associated with the named entry will be returned.
1049 * If @name is null, the first matching entry will be returned. Data
1050 * order is not meaningful in hwmod data, so callers are strongly
1051 * encouraged to use a non-null @name whenever possible to avoid
1052 * unpredictable effects if hwmod data is later added that causes data
1053 * ordering to change. Returns 0 upon success or a negative error
1054 * code upon error.
1055 */
1056static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1057 unsigned int *irq)
1058{
1059 int i;
1060 bool found = false;
1061
1062 if (!oh->mpu_irqs)
1063 return -ENOENT;
1064
1065 i = 0;
1066 while (oh->mpu_irqs[i].irq != -1) {
1067 if (name == oh->mpu_irqs[i].name ||
1068 !strcmp(name, oh->mpu_irqs[i].name)) {
1069 found = true;
1070 break;
1071 }
1072 i++;
1073 }
1074
1075 if (!found)
1076 return -ENOENT;
1077
1078 *irq = oh->mpu_irqs[i].irq;
1079
1080 return 0;
1081}
1082
1083/**
1084 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1085 * @oh: struct omap_hwmod * to operate on
1086 * @name: pointer to the name of the SDMA request line to fetch (optional)
1087 * @dma: pointer to an unsigned int to store the request line ID to
1088 *
1089 * Retrieve an SDMA request line ID named by @name on the IP block
1090 * pointed to by @oh. The ID will be filled into the address pointed
1091 * to by @dma. When @name is non-null, the request line ID associated
1092 * with the named entry will be returned. If @name is null, the first
1093 * matching entry will be returned. Data order is not meaningful in
1094 * hwmod data, so callers are strongly encouraged to use a non-null
1095 * @name whenever possible to avoid unpredictable effects if hwmod
1096 * data is later added that causes data ordering to change. Returns 0
1097 * upon success or a negative error code upon error.
1098 */
1099static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1100 unsigned int *dma)
1101{
1102 int i;
1103 bool found = false;
1104
1105 if (!oh->sdma_reqs)
1106 return -ENOENT;
1107
1108 i = 0;
1109 while (oh->sdma_reqs[i].dma_req != -1) {
1110 if (name == oh->sdma_reqs[i].name ||
1111 !strcmp(name, oh->sdma_reqs[i].name)) {
1112 found = true;
1113 break;
1114 }
1115 i++;
1116 }
1117
1118 if (!found)
1119 return -ENOENT;
1120
1121 *dma = oh->sdma_reqs[i].dma_req;
1122
1123 return 0;
1124}
1125
1126/**
1127 * _get_addr_space_by_name - fetch address space start & end by name
1128 * @oh: struct omap_hwmod * to operate on
1129 * @name: pointer to the name of the address space to fetch (optional)
1130 * @pa_start: pointer to a u32 to store the starting address to
1131 * @pa_end: pointer to a u32 to store the ending address to
1132 *
1133 * Retrieve address space start and end addresses for the IP block
1134 * pointed to by @oh. The data will be filled into the addresses
1135 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1136 * address space data associated with the named entry will be
1137 * returned. If @name is null, the first matching entry will be
1138 * returned. Data order is not meaningful in hwmod data, so callers
1139 * are strongly encouraged to use a non-null @name whenever possible
1140 * to avoid unpredictable effects if hwmod data is later added that
1141 * causes data ordering to change. Returns 0 upon success or a
1142 * negative error code upon error.
1143 */
1144static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1145 u32 *pa_start, u32 *pa_end)
1146{
1147 int i, j;
1148 struct omap_hwmod_ocp_if *os;
2221b5cd 1149 struct list_head *p = NULL;
5e8370f1
PW
1150 bool found = false;
1151
11cd4b94 1152 p = oh->slave_ports.next;
2221b5cd 1153
5d95dde7
PW
1154 i = 0;
1155 while (i < oh->slaves_cnt) {
11cd4b94 1156 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1157
1158 if (!os->addr)
1159 return -ENOENT;
1160
1161 j = 0;
1162 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1163 if (name == os->addr[j].name ||
1164 !strcmp(name, os->addr[j].name)) {
1165 found = true;
1166 break;
1167 }
1168 j++;
1169 }
1170
1171 if (found)
1172 break;
1173 }
1174
1175 if (!found)
1176 return -ENOENT;
1177
1178 *pa_start = os->addr[j].pa_start;
1179 *pa_end = os->addr[j].pa_end;
1180
1181 return 0;
1182}
1183
63c85238 1184/**
24dbc213 1185 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1186 * @oh: struct omap_hwmod *
1187 *
24dbc213
PW
1188 * Determines the array index of the OCP slave port that the MPU uses
1189 * to address the device, and saves it into the struct omap_hwmod.
1190 * Intended to be called during hwmod registration only. No return
1191 * value.
63c85238 1192 */
24dbc213 1193static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1194{
24dbc213 1195 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1196 struct list_head *p;
5d95dde7 1197 int i = 0;
63c85238 1198
5d95dde7 1199 if (!oh)
24dbc213
PW
1200 return;
1201
1202 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1203
11cd4b94 1204 p = oh->slave_ports.next;
2221b5cd 1205
5d95dde7 1206 while (i < oh->slaves_cnt) {
11cd4b94 1207 os = _fetch_next_ocp_if(&p, &i);
63c85238 1208 if (os->user & OCP_USER_MPU) {
2221b5cd 1209 oh->_mpu_port = os;
24dbc213 1210 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1211 break;
1212 }
1213 }
1214
24dbc213 1215 return;
63c85238
PW
1216}
1217
2d6141ba
PW
1218/**
1219 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1220 * @oh: struct omap_hwmod *
1221 *
1222 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1223 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1224 * communicate with the IP block. This interface need not be directly
1225 * connected to the MPU (and almost certainly is not), but is directly
1226 * connected to the IP block represented by @oh. Returns a pointer
1227 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1228 * error or if there does not appear to be a path from the MPU to this
1229 * IP block.
1230 */
1231static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1232{
1233 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1234 return NULL;
1235
11cd4b94 1236 return oh->_mpu_port;
2d6141ba
PW
1237};
1238
63c85238 1239/**
c9aafd23 1240 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1241 * @oh: struct omap_hwmod *
1242 *
c9aafd23
PW
1243 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1244 * the register target MPU address space; or returns NULL upon error.
63c85238 1245 */
c9aafd23 1246static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1247{
1248 struct omap_hwmod_ocp_if *os;
1249 struct omap_hwmod_addr_space *mem;
c9aafd23 1250 int found = 0, i = 0;
63c85238 1251
2d6141ba 1252 os = _find_mpu_rt_port(oh);
24dbc213 1253 if (!os || !os->addr)
78183f3f
PW
1254 return NULL;
1255
1256 do {
1257 mem = &os->addr[i++];
1258 if (mem->flags & ADDR_TYPE_RT)
63c85238 1259 found = 1;
78183f3f 1260 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1261
c9aafd23 1262 return (found) ? mem : NULL;
63c85238
PW
1263}
1264
1265/**
74ff3a68 1266 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1267 * @oh: struct omap_hwmod *
1268 *
006c7f18
PW
1269 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1270 * by @oh is set to indicate to the PRCM that the IP block is active.
1271 * Usually this means placing the module into smart-idle mode and
1272 * smart-standby, but if there is a bug in the automatic idle handling
1273 * for the IP block, it may need to be placed into the force-idle or
1274 * no-idle variants of these modes. No return value.
63c85238 1275 */
74ff3a68 1276static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1277{
43b40992 1278 u8 idlemode, sf;
63c85238 1279 u32 v;
006c7f18 1280 bool clkdm_act;
63c85238 1281
43b40992 1282 if (!oh->class->sysc)
63c85238
PW
1283 return;
1284
1285 v = oh->_sysc_cache;
43b40992 1286 sf = oh->class->sysc->sysc_flags;
63c85238 1287
43b40992 1288 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1289 clkdm_act = ((oh->clkdm &&
1290 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1291 (oh->_clk && oh->_clk->clkdm &&
1292 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1293 if (clkdm_act && !(oh->class->sysc->idlemodes &
1294 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1295 idlemode = HWMOD_IDLEMODE_FORCE;
1296 else
1297 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1298 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1299 _set_slave_idlemode(oh, idlemode, &v);
1300 }
1301
43b40992 1302 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1303 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1304 idlemode = HWMOD_IDLEMODE_NO;
1305 } else {
1306 if (sf & SYSC_HAS_ENAWAKEUP)
1307 _enable_wakeup(oh, &v);
1308 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1309 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1310 else
1311 idlemode = HWMOD_IDLEMODE_SMART;
1312 }
63c85238
PW
1313 _set_master_standbymode(oh, idlemode, &v);
1314 }
1315
a16b1f7f
PW
1316 /*
1317 * XXX The clock framework should handle this, by
1318 * calling into this code. But this must wait until the
1319 * clock structures are tagged with omap_hwmod entries
1320 */
43b40992
PW
1321 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1322 (sf & SYSC_HAS_CLOCKACTIVITY))
1323 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1324
9980ce53
RN
1325 /* If slave is in SMARTIDLE, also enable wakeup */
1326 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1327 _enable_wakeup(oh, &v);
1328
1329 _write_sysconfig(v, oh);
78f26e87
HH
1330
1331 /*
1332 * Set the autoidle bit only after setting the smartidle bit
1333 * Setting this will not have any impact on the other modules.
1334 */
1335 if (sf & SYSC_HAS_AUTOIDLE) {
1336 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1337 0 : 1;
1338 _set_module_autoidle(oh, idlemode, &v);
1339 _write_sysconfig(v, oh);
1340 }
63c85238
PW
1341}
1342
1343/**
74ff3a68 1344 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1345 * @oh: struct omap_hwmod *
1346 *
1347 * If module is marked as SWSUP_SIDLE, force the module into slave
1348 * idle; otherwise, configure it for smart-idle. If module is marked
1349 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1350 * configure it for smart-standby. No return value.
1351 */
74ff3a68 1352static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1353{
43b40992 1354 u8 idlemode, sf;
63c85238
PW
1355 u32 v;
1356
43b40992 1357 if (!oh->class->sysc)
63c85238
PW
1358 return;
1359
1360 v = oh->_sysc_cache;
43b40992 1361 sf = oh->class->sysc->sysc_flags;
63c85238 1362
43b40992 1363 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1364 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1365 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1366 !(oh->class->sysc->idlemodes &
1367 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1368 idlemode = HWMOD_IDLEMODE_FORCE;
1369 else
1370 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1371 _set_slave_idlemode(oh, idlemode, &v);
1372 }
1373
43b40992 1374 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1375 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1376 idlemode = HWMOD_IDLEMODE_FORCE;
1377 } else {
1378 if (sf & SYSC_HAS_ENAWAKEUP)
1379 _enable_wakeup(oh, &v);
1380 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1381 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1382 else
1383 idlemode = HWMOD_IDLEMODE_SMART;
1384 }
63c85238
PW
1385 _set_master_standbymode(oh, idlemode, &v);
1386 }
1387
86009eb3
BC
1388 /* If slave is in SMARTIDLE, also enable wakeup */
1389 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1390 _enable_wakeup(oh, &v);
1391
63c85238
PW
1392 _write_sysconfig(v, oh);
1393}
1394
1395/**
74ff3a68 1396 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1397 * @oh: struct omap_hwmod *
1398 *
1399 * Force the module into slave idle and master suspend. No return
1400 * value.
1401 */
74ff3a68 1402static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1403{
1404 u32 v;
43b40992 1405 u8 sf;
63c85238 1406
43b40992 1407 if (!oh->class->sysc)
63c85238
PW
1408 return;
1409
1410 v = oh->_sysc_cache;
43b40992 1411 sf = oh->class->sysc->sysc_flags;
63c85238 1412
43b40992 1413 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1414 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1415
43b40992 1416 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1417 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1418
43b40992 1419 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1420 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1421
1422 _write_sysconfig(v, oh);
1423}
1424
1425/**
1426 * _lookup - find an omap_hwmod by name
1427 * @name: find an omap_hwmod by name
1428 *
1429 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1430 */
1431static struct omap_hwmod *_lookup(const char *name)
1432{
1433 struct omap_hwmod *oh, *temp_oh;
1434
1435 oh = NULL;
1436
1437 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1438 if (!strcmp(name, temp_oh->name)) {
1439 oh = temp_oh;
1440 break;
1441 }
1442 }
1443
1444 return oh;
1445}
868c157d 1446
6ae76997
BC
1447/**
1448 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1449 * @oh: struct omap_hwmod *
1450 *
1451 * Convert a clockdomain name stored in a struct omap_hwmod into a
1452 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1453 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1454 */
1455static int _init_clkdm(struct omap_hwmod *oh)
1456{
3bb05dbf
PW
1457 if (!oh->clkdm_name) {
1458 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
6ae76997 1459 return 0;
3bb05dbf 1460 }
6ae76997 1461
6ae76997
BC
1462 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1463 if (!oh->clkdm) {
1464 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1465 oh->name, oh->clkdm_name);
1466 return -EINVAL;
1467 }
1468
1469 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1470 oh->name, oh->clkdm_name);
1471
1472 return 0;
1473}
63c85238
PW
1474
1475/**
6ae76997
BC
1476 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1477 * well the clockdomain.
63c85238 1478 * @oh: struct omap_hwmod *
97d60162 1479 * @data: not used; pass NULL
63c85238 1480 *
a2debdbd 1481 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1482 * Resolves all clock names embedded in the hwmod. Returns 0 on
1483 * success, or a negative error code on failure.
63c85238 1484 */
97d60162 1485static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1486{
1487 int ret = 0;
1488
48d54f3f
PW
1489 if (oh->_state != _HWMOD_STATE_REGISTERED)
1490 return 0;
63c85238
PW
1491
1492 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1493
1494 ret |= _init_main_clk(oh);
1495 ret |= _init_interface_clks(oh);
1496 ret |= _init_opt_clks(oh);
0a179eaa
KH
1497 if (soc_ops.init_clkdm)
1498 ret |= soc_ops.init_clkdm(oh);
63c85238 1499
f5c1f84b
BC
1500 if (!ret)
1501 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1502 else
1503 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1504
09c35f2f 1505 return ret;
63c85238
PW
1506}
1507
5365efbe 1508/**
cc1226e7 1509 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1510 * @oh: struct omap_hwmod *
1511 * @name: name of the reset line in the context of this hwmod
cc1226e7 1512 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1513 *
1514 * Return the bit position of the reset line that match the
1515 * input name. Return -ENOENT if not found.
1516 */
a032d33b
PW
1517static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1518 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1519{
1520 int i;
1521
1522 for (i = 0; i < oh->rst_lines_cnt; i++) {
1523 const char *rst_line = oh->rst_lines[i].name;
1524 if (!strcmp(rst_line, name)) {
cc1226e7 1525 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1526 ohri->st_shift = oh->rst_lines[i].st_shift;
1527 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1528 oh->name, __func__, rst_line, ohri->rst_shift,
1529 ohri->st_shift);
5365efbe 1530
cc1226e7 1531 return 0;
5365efbe
BC
1532 }
1533 }
1534
1535 return -ENOENT;
1536}
1537
1538/**
1539 * _assert_hardreset - assert the HW reset line of submodules
1540 * contained in the hwmod module.
1541 * @oh: struct omap_hwmod *
1542 * @name: name of the reset line to lookup and assert
1543 *
b8249cf2
KH
1544 * Some IP like dsp, ipu or iva contain processor that require an HW
1545 * reset line to be assert / deassert in order to enable fully the IP.
1546 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1547 * asserting the hardreset line on the currently-booted SoC, or passes
1548 * along the return value from _lookup_hardreset() or the SoC's
1549 * assert_hardreset code.
5365efbe
BC
1550 */
1551static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1552{
cc1226e7 1553 struct omap_hwmod_rst_info ohri;
a032d33b 1554 int ret = -EINVAL;
5365efbe
BC
1555
1556 if (!oh)
1557 return -EINVAL;
1558
b8249cf2
KH
1559 if (!soc_ops.assert_hardreset)
1560 return -ENOSYS;
1561
cc1226e7 1562 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1563 if (ret < 0)
cc1226e7 1564 return ret;
5365efbe 1565
b8249cf2
KH
1566 ret = soc_ops.assert_hardreset(oh, &ohri);
1567
1568 return ret;
5365efbe
BC
1569}
1570
1571/**
1572 * _deassert_hardreset - deassert the HW reset line of submodules contained
1573 * in the hwmod module.
1574 * @oh: struct omap_hwmod *
1575 * @name: name of the reset line to look up and deassert
1576 *
b8249cf2
KH
1577 * Some IP like dsp, ipu or iva contain processor that require an HW
1578 * reset line to be assert / deassert in order to enable fully the IP.
1579 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1580 * deasserting the hardreset line on the currently-booted SoC, or passes
1581 * along the return value from _lookup_hardreset() or the SoC's
1582 * deassert_hardreset code.
5365efbe
BC
1583 */
1584static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1585{
cc1226e7 1586 struct omap_hwmod_rst_info ohri;
b8249cf2 1587 int ret = -EINVAL;
e8e96dff 1588 int hwsup = 0;
5365efbe
BC
1589
1590 if (!oh)
1591 return -EINVAL;
1592
b8249cf2
KH
1593 if (!soc_ops.deassert_hardreset)
1594 return -ENOSYS;
1595
cc1226e7 1596 ret = _lookup_hardreset(oh, name, &ohri);
1597 if (IS_ERR_VALUE(ret))
1598 return ret;
5365efbe 1599
e8e96dff
ORL
1600 if (oh->clkdm) {
1601 /*
1602 * A clockdomain must be in SW_SUP otherwise reset
1603 * might not be completed. The clockdomain can be set
1604 * in HW_AUTO only when the module become ready.
1605 */
1606 hwsup = clkdm_in_hwsup(oh->clkdm);
1607 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1608 if (ret) {
1609 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1610 oh->name, oh->clkdm->name, ret);
1611 return ret;
1612 }
1613 }
1614
1615 _enable_clocks(oh);
1616 if (soc_ops.enable_module)
1617 soc_ops.enable_module(oh);
1618
b8249cf2 1619 ret = soc_ops.deassert_hardreset(oh, &ohri);
e8e96dff
ORL
1620
1621 if (soc_ops.disable_module)
1622 soc_ops.disable_module(oh);
1623 _disable_clocks(oh);
1624
cc1226e7 1625 if (ret == -EBUSY)
5365efbe
BC
1626 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1627
e8e96dff
ORL
1628 if (!ret) {
1629 /*
1630 * Set the clockdomain to HW_AUTO, assuming that the
1631 * previous state was HW_AUTO.
1632 */
1633 if (oh->clkdm && hwsup)
1634 clkdm_allow_idle(oh->clkdm);
1635 } else {
1636 if (oh->clkdm)
1637 clkdm_hwmod_disable(oh->clkdm, oh);
1638 }
1639
cc1226e7 1640 return ret;
5365efbe
BC
1641}
1642
1643/**
1644 * _read_hardreset - read the HW reset line state of submodules
1645 * contained in the hwmod module
1646 * @oh: struct omap_hwmod *
1647 * @name: name of the reset line to look up and read
1648 *
b8249cf2
KH
1649 * Return the state of the reset line. Returns -EINVAL if @oh is
1650 * null, -ENOSYS if we have no way of reading the hardreset line
1651 * status on the currently-booted SoC, or passes along the return
1652 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1653 * code.
5365efbe
BC
1654 */
1655static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1656{
cc1226e7 1657 struct omap_hwmod_rst_info ohri;
a032d33b 1658 int ret = -EINVAL;
5365efbe
BC
1659
1660 if (!oh)
1661 return -EINVAL;
1662
b8249cf2
KH
1663 if (!soc_ops.is_hardreset_asserted)
1664 return -ENOSYS;
1665
cc1226e7 1666 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1667 if (ret < 0)
cc1226e7 1668 return ret;
5365efbe 1669
b8249cf2 1670 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1671}
1672
747834ab 1673/**
eb05f691 1674 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
747834ab
PW
1675 * @oh: struct omap_hwmod *
1676 *
eb05f691
ORL
1677 * If all hardreset lines associated with @oh are asserted, then return true.
1678 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1679 * associated with @oh are asserted, then return false.
747834ab 1680 * This function is used to avoid executing some parts of the IP block
eb05f691 1681 * enable/disable sequence if its hardreset line is set.
747834ab 1682 */
eb05f691 1683static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
747834ab 1684{
eb05f691 1685 int i, rst_cnt = 0;
747834ab
PW
1686
1687 if (oh->rst_lines_cnt == 0)
1688 return false;
1689
1690 for (i = 0; i < oh->rst_lines_cnt; i++)
1691 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
eb05f691
ORL
1692 rst_cnt++;
1693
1694 if (oh->rst_lines_cnt == rst_cnt)
1695 return true;
747834ab
PW
1696
1697 return false;
1698}
1699
e9332b6e
PW
1700/**
1701 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1702 * hard-reset
1703 * @oh: struct omap_hwmod *
1704 *
1705 * If any hardreset lines associated with @oh are asserted, then
1706 * return true. Otherwise, if no hardreset lines associated with @oh
1707 * are asserted, or if @oh has no hardreset lines, then return false.
1708 * This function is used to avoid executing some parts of the IP block
1709 * enable/disable sequence if any hardreset line is set.
1710 */
1711static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1712{
1713 int rst_cnt = 0;
1714 int i;
1715
1716 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1717 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1718 rst_cnt++;
1719
1720 return (rst_cnt) ? true : false;
1721}
1722
747834ab
PW
1723/**
1724 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1725 * @oh: struct omap_hwmod *
1726 *
1727 * Disable the PRCM module mode related to the hwmod @oh.
1728 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1729 */
1730static int _omap4_disable_module(struct omap_hwmod *oh)
1731{
1732 int v;
1733
747834ab
PW
1734 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1735 return -EINVAL;
1736
eb05f691
ORL
1737 /*
1738 * Since integration code might still be doing something, only
1739 * disable if all lines are under hardreset.
1740 */
e9332b6e 1741 if (_are_any_hardreset_lines_asserted(oh))
eb05f691
ORL
1742 return 0;
1743
747834ab
PW
1744 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1745
1746 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1747 oh->clkdm->cm_inst,
1748 oh->clkdm->clkdm_offs,
1749 oh->prcm.omap4.clkctrl_offs);
1750
747834ab
PW
1751 v = _omap4_wait_target_disable(oh);
1752 if (v)
1753 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1754 oh->name);
1755
1756 return 0;
1757}
1758
1688bf19
VH
1759/**
1760 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1761 * @oh: struct omap_hwmod *
1762 *
1763 * Disable the PRCM module mode related to the hwmod @oh.
1764 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1765 */
1766static int _am33xx_disable_module(struct omap_hwmod *oh)
1767{
1768 int v;
1769
1770 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1771 return -EINVAL;
1772
1773 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1774
e9332b6e
PW
1775 if (_are_any_hardreset_lines_asserted(oh))
1776 return 0;
1777
1688bf19
VH
1778 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1779 oh->prcm.omap4.clkctrl_offs);
1780
1688bf19
VH
1781 v = _am33xx_wait_target_disable(oh);
1782 if (v)
1783 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1784 oh->name);
1785
1786 return 0;
1787}
1788
63c85238 1789/**
bd36179e 1790 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1791 * @oh: struct omap_hwmod *
1792 *
1793 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1794 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1795 * reset this way, -EINVAL if the hwmod is in the wrong state,
1796 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1797 *
1798 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1799 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1800 * use the SYSCONFIG softreset bit to provide the status.
1801 *
bd36179e
PW
1802 * Note that some IP like McBSP do have reset control but don't have
1803 * reset status.
63c85238 1804 */
bd36179e 1805static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1806{
387ca5bf 1807 u32 v, softrst_mask;
6f8b7ff5 1808 int c = 0;
96835af9 1809 int ret = 0;
63c85238 1810
43b40992 1811 if (!oh->class->sysc ||
2cb06814 1812 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1813 return -ENOENT;
63c85238
PW
1814
1815 /* clocks must be on for this operation */
1816 if (oh->_state != _HWMOD_STATE_ENABLED) {
7852ec05
PW
1817 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1818 oh->name);
63c85238
PW
1819 return -EINVAL;
1820 }
1821
96835af9
BC
1822 /* For some modules, all optionnal clocks need to be enabled as well */
1823 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1824 _enable_optional_clocks(oh);
1825
bd36179e 1826 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1827
1828 v = oh->_sysc_cache;
96835af9
BC
1829 ret = _set_softreset(oh, &v);
1830 if (ret)
1831 goto dis_opt_clks;
63c85238
PW
1832 _write_sysconfig(v, oh);
1833
d99de7f5
FGL
1834 if (oh->class->sysc->srst_udelay)
1835 udelay(oh->class->sysc->srst_udelay);
1836
2cb06814 1837 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1838 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1839 oh->class->sysc->syss_offs)
1840 & SYSS_RESETDONE_MASK),
1841 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1842 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1843 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1844 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1845 oh->class->sysc->sysc_offs)
387ca5bf 1846 & softrst_mask),
2cb06814 1847 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1848 }
63c85238 1849
5365efbe 1850 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1851 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1852 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1853 else
5365efbe 1854 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1855
1856 /*
1857 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1858 * _wait_target_ready() or _reset()
1859 */
1860
96835af9
BC
1861 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1862
1863dis_opt_clks:
1864 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1865 _disable_optional_clocks(oh);
1866
1867 return ret;
63c85238
PW
1868}
1869
bd36179e
PW
1870/**
1871 * _reset - reset an omap_hwmod
1872 * @oh: struct omap_hwmod *
1873 *
30e105c0
PW
1874 * Resets an omap_hwmod @oh. If the module has a custom reset
1875 * function pointer defined, then call it to reset the IP block, and
1876 * pass along its return value to the caller. Otherwise, if the IP
1877 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1878 * associated with it, call a function to reset the IP block via that
1879 * method, and pass along the return value to the caller. Finally, if
1880 * the IP block has some hardreset lines associated with it, assert
1881 * all of those, but do _not_ deassert them. (This is because driver
1882 * authors have expressed an apparent requirement to control the
1883 * deassertion of the hardreset lines themselves.)
1884 *
1885 * The default software reset mechanism for most OMAP IP blocks is
1886 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1887 * hwmods cannot be reset via this method. Some are not targets and
1888 * therefore have no OCP header registers to access. Others (like the
1889 * IVA) have idiosyncratic reset sequences. So for these relatively
1890 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
1891 * omap_hwmod_class .reset function pointer.
1892 *
1893 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1894 * does not prevent idling of the system. This is necessary for cases
1895 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1896 * kernel without disabling dma.
1897 *
1898 * Passes along the return value from either _ocp_softreset() or the
1899 * custom reset function - these must return -EINVAL if the hwmod
1900 * cannot be reset this way or if the hwmod is in the wrong state,
1901 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
1902 */
1903static int _reset(struct omap_hwmod *oh)
1904{
30e105c0 1905 int i, r;
bd36179e
PW
1906
1907 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1908
30e105c0
PW
1909 if (oh->class->reset) {
1910 r = oh->class->reset(oh);
1911 } else {
1912 if (oh->rst_lines_cnt > 0) {
1913 for (i = 0; i < oh->rst_lines_cnt; i++)
1914 _assert_hardreset(oh, oh->rst_lines[i].name);
1915 return 0;
1916 } else {
1917 r = _ocp_softreset(oh);
1918 if (r == -ENOENT)
1919 r = 0;
1920 }
1921 }
1922
6668546f
KVA
1923 _set_dmadisable(oh);
1924
9c8b0ec7 1925 /*
30e105c0
PW
1926 * OCP_SYSCONFIG bits need to be reprogrammed after a
1927 * softreset. The _enable() function should be split to avoid
1928 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1929 */
2800852a
RN
1930 if (oh->class->sysc) {
1931 _update_sysc_cache(oh);
1932 _enable_sysc(oh);
1933 }
1934
30e105c0 1935 return r;
bd36179e
PW
1936}
1937
5165882a
VB
1938/**
1939 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1940 *
1941 * Call the appropriate PRM function to clear any logged I/O chain
1942 * wakeups and to reconfigure the chain. This apparently needs to be
1943 * done upon every mux change. Since hwmods can be concurrently
1944 * enabled and idled, hold a spinlock around the I/O chain
1945 * reconfiguration sequence. No return value.
1946 *
1947 * XXX When the PRM code is moved to drivers, this function can be removed,
1948 * as the PRM infrastructure should abstract this.
1949 */
1950static void _reconfigure_io_chain(void)
1951{
1952 unsigned long flags;
1953
1954 spin_lock_irqsave(&io_chain_lock, flags);
1955
1956 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1957 omap3xxx_prm_reconfigure_io_chain();
1958 else if (cpu_is_omap44xx())
1959 omap44xx_prm_reconfigure_io_chain();
1960
1961 spin_unlock_irqrestore(&io_chain_lock, flags);
1962}
1963
63c85238 1964/**
dc6d1cda 1965 * _enable - enable an omap_hwmod
63c85238
PW
1966 * @oh: struct omap_hwmod *
1967 *
1968 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1969 * register target. Returns -EINVAL if the hwmod is in the wrong
1970 * state or passes along the return value of _wait_target_ready().
63c85238 1971 */
dc6d1cda 1972static int _enable(struct omap_hwmod *oh)
63c85238 1973{
747834ab 1974 int r;
665d0013 1975 int hwsup = 0;
63c85238 1976
34617e2a
BC
1977 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1978
aacf0941 1979 /*
64813c3f
PW
1980 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1981 * state at init. Now that someone is really trying to enable
1982 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1983 */
1984 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1985 /*
1986 * If the caller has mux data populated, do the mux'ing
1987 * which wouldn't have been done as part of the _enable()
1988 * done during setup.
1989 */
1990 if (oh->mux)
1991 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1992
1993 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1994 return 0;
1995 }
1996
63c85238
PW
1997 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1998 oh->_state != _HWMOD_STATE_IDLE &&
1999 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
2000 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2001 oh->name);
63c85238
PW
2002 return -EINVAL;
2003 }
2004
31f62866 2005 /*
eb05f691 2006 * If an IP block contains HW reset lines and all of them are
747834ab
PW
2007 * asserted, we let integration code associated with that
2008 * block handle the enable. We've received very little
2009 * information on what those driver authors need, and until
2010 * detailed information is provided and the driver code is
2011 * posted to the public lists, this is probably the best we
2012 * can do.
31f62866 2013 */
eb05f691 2014 if (_are_all_hardreset_lines_asserted(oh))
747834ab 2015 return 0;
63c85238 2016
665d0013
RN
2017 /* Mux pins for device runtime if populated */
2018 if (oh->mux && (!oh->mux->enabled ||
2019 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 2020 oh->mux->pads_dynamic))) {
665d0013 2021 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a
VB
2022 _reconfigure_io_chain();
2023 }
665d0013
RN
2024
2025 _add_initiator_dep(oh, mpu_oh);
34617e2a 2026
665d0013
RN
2027 if (oh->clkdm) {
2028 /*
2029 * A clockdomain must be in SW_SUP before enabling
2030 * completely the module. The clockdomain can be set
2031 * in HW_AUTO only when the module become ready.
2032 */
b71c7217
PW
2033 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2034 !clkdm_missing_idle_reporting(oh->clkdm);
665d0013
RN
2035 r = clkdm_hwmod_enable(oh->clkdm, oh);
2036 if (r) {
2037 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2038 oh->name, oh->clkdm->name, r);
2039 return r;
2040 }
34617e2a 2041 }
665d0013
RN
2042
2043 _enable_clocks(oh);
9ebfd285
KH
2044 if (soc_ops.enable_module)
2045 soc_ops.enable_module(oh);
34617e2a 2046
8f6aa8ee
KH
2047 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2048 -EINVAL;
665d0013
RN
2049 if (!r) {
2050 /*
2051 * Set the clockdomain to HW_AUTO only if the target is ready,
2052 * assuming that the previous state was HW_AUTO
2053 */
2054 if (oh->clkdm && hwsup)
2055 clkdm_allow_idle(oh->clkdm);
2056
2057 oh->_state = _HWMOD_STATE_ENABLED;
2058
2059 /* Access the sysconfig only if the target is ready */
2060 if (oh->class->sysc) {
2061 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2062 _update_sysc_cache(oh);
2063 _enable_sysc(oh);
2064 }
2065 } else {
471a009b 2066 _omap4_disable_module(oh);
665d0013
RN
2067 _disable_clocks(oh);
2068 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2069 oh->name, r);
34617e2a 2070
665d0013
RN
2071 if (oh->clkdm)
2072 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
2073 }
2074
63c85238
PW
2075 return r;
2076}
2077
2078/**
dc6d1cda 2079 * _idle - idle an omap_hwmod
63c85238
PW
2080 * @oh: struct omap_hwmod *
2081 *
2082 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
2083 * no further work. Returns -EINVAL if the hwmod is in the wrong
2084 * state or returns 0.
63c85238 2085 */
dc6d1cda 2086static int _idle(struct omap_hwmod *oh)
63c85238 2087{
34617e2a
BC
2088 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2089
63c85238 2090 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2091 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2092 oh->name);
63c85238
PW
2093 return -EINVAL;
2094 }
2095
eb05f691 2096 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2097 return 0;
2098
43b40992 2099 if (oh->class->sysc)
74ff3a68 2100 _idle_sysc(oh);
63c85238 2101 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2102
9ebfd285
KH
2103 if (soc_ops.disable_module)
2104 soc_ops.disable_module(oh);
bfc141e3 2105
45c38252
BC
2106 /*
2107 * The module must be in idle mode before disabling any parents
2108 * clocks. Otherwise, the parent clock might be disabled before
2109 * the module transition is done, and thus will prevent the
2110 * transition to complete properly.
2111 */
2112 _disable_clocks(oh);
665d0013
RN
2113 if (oh->clkdm)
2114 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2115
8d9af88f 2116 /* Mux pins for device idle if populated */
5165882a 2117 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2118 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a
VB
2119 _reconfigure_io_chain();
2120 }
8d9af88f 2121
63c85238
PW
2122 oh->_state = _HWMOD_STATE_IDLE;
2123
2124 return 0;
2125}
2126
9599217a
KVA
2127/**
2128 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2129 * @oh: struct omap_hwmod *
2130 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2131 *
2132 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2133 * local copy. Intended to be used by drivers that require
2134 * direct manipulation of the AUTOIDLE bits.
2135 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2136 * along the return value from _set_module_autoidle().
2137 *
2138 * Any users of this function should be scrutinized carefully.
2139 */
2140int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2141{
2142 u32 v;
2143 int retval = 0;
2144 unsigned long flags;
2145
2146 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2147 return -EINVAL;
2148
2149 spin_lock_irqsave(&oh->_lock, flags);
2150
2151 v = oh->_sysc_cache;
2152
2153 retval = _set_module_autoidle(oh, autoidle, &v);
2154
2155 if (!retval)
2156 _write_sysconfig(v, oh);
2157
2158 spin_unlock_irqrestore(&oh->_lock, flags);
2159
2160 return retval;
2161}
2162
63c85238
PW
2163/**
2164 * _shutdown - shutdown an omap_hwmod
2165 * @oh: struct omap_hwmod *
2166 *
2167 * Shut down an omap_hwmod @oh. This should be called when the driver
2168 * used for the hwmod is removed or unloaded or if the driver is not
2169 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2170 * state or returns 0.
2171 */
2172static int _shutdown(struct omap_hwmod *oh)
2173{
9c8b0ec7 2174 int ret, i;
e4dc8f50
PW
2175 u8 prev_state;
2176
63c85238
PW
2177 if (oh->_state != _HWMOD_STATE_IDLE &&
2178 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2179 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2180 oh->name);
63c85238
PW
2181 return -EINVAL;
2182 }
2183
eb05f691 2184 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2185 return 0;
2186
63c85238
PW
2187 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2188
e4dc8f50
PW
2189 if (oh->class->pre_shutdown) {
2190 prev_state = oh->_state;
2191 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2192 _enable(oh);
e4dc8f50
PW
2193 ret = oh->class->pre_shutdown(oh);
2194 if (ret) {
2195 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2196 _idle(oh);
e4dc8f50
PW
2197 return ret;
2198 }
2199 }
2200
6481c73c
MV
2201 if (oh->class->sysc) {
2202 if (oh->_state == _HWMOD_STATE_IDLE)
2203 _enable(oh);
74ff3a68 2204 _shutdown_sysc(oh);
6481c73c 2205 }
5365efbe 2206
3827f949
BC
2207 /* clocks and deps are already disabled in idle */
2208 if (oh->_state == _HWMOD_STATE_ENABLED) {
2209 _del_initiator_dep(oh, mpu_oh);
2210 /* XXX what about the other system initiators here? dma, dsp */
9ebfd285
KH
2211 if (soc_ops.disable_module)
2212 soc_ops.disable_module(oh);
45c38252 2213 _disable_clocks(oh);
665d0013
RN
2214 if (oh->clkdm)
2215 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2216 }
63c85238
PW
2217 /* XXX Should this code also force-disable the optional clocks? */
2218
9c8b0ec7
PW
2219 for (i = 0; i < oh->rst_lines_cnt; i++)
2220 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2221
8d9af88f
TL
2222 /* Mux pins to safe mode or use populated off mode values */
2223 if (oh->mux)
2224 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2225
2226 oh->_state = _HWMOD_STATE_DISABLED;
2227
2228 return 0;
2229}
2230
381d033a
PW
2231/**
2232 * _init_mpu_rt_base - populate the virtual address for a hwmod
2233 * @oh: struct omap_hwmod * to locate the virtual address
2234 *
2235 * Cache the virtual address used by the MPU to access this IP block's
2236 * registers. This address is needed early so the OCP registers that
2237 * are part of the device's address space can be ioremapped properly.
2238 * No return value.
2239 */
2240static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2241{
c9aafd23
PW
2242 struct omap_hwmod_addr_space *mem;
2243 void __iomem *va_start;
2244
2245 if (!oh)
2246 return;
2247
2221b5cd
PW
2248 _save_mpu_port_index(oh);
2249
381d033a
PW
2250 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2251 return;
2252
c9aafd23
PW
2253 mem = _find_mpu_rt_addr_space(oh);
2254 if (!mem) {
2255 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2256 oh->name);
2257 return;
2258 }
2259
2260 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2261 if (!va_start) {
2262 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2263 return;
2264 }
2265
2266 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2267 oh->name, va_start);
2268
2269 oh->_mpu_rt_va = va_start;
381d033a
PW
2270}
2271
2272/**
2273 * _init - initialize internal data for the hwmod @oh
2274 * @oh: struct omap_hwmod *
2275 * @n: (unused)
2276 *
2277 * Look up the clocks and the address space used by the MPU to access
2278 * registers belonging to the hwmod @oh. @oh must already be
2279 * registered at this point. This is the first of two phases for
2280 * hwmod initialization. Code called here does not touch any hardware
2281 * registers, it simply prepares internal data structures. Returns 0
2282 * upon success or if the hwmod isn't registered, or -EINVAL upon
2283 * failure.
2284 */
2285static int __init _init(struct omap_hwmod *oh, void *data)
2286{
2287 int r;
2288
2289 if (oh->_state != _HWMOD_STATE_REGISTERED)
2290 return 0;
2291
2292 _init_mpu_rt_base(oh, NULL);
2293
2294 r = _init_clocks(oh, NULL);
2295 if (IS_ERR_VALUE(r)) {
2296 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2297 return -EINVAL;
2298 }
2299
2300 oh->_state = _HWMOD_STATE_INITIALIZED;
2301
2302 return 0;
2303}
2304
63c85238 2305/**
64813c3f 2306 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2307 * @oh: struct omap_hwmod *
2308 *
64813c3f
PW
2309 * Set up the module's interface clocks. XXX This function is still mostly
2310 * a stub; implementing this properly requires iclk autoidle usecounting in
2311 * the clock code. No return value.
63c85238 2312 */
64813c3f 2313static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2314{
5d95dde7 2315 struct omap_hwmod_ocp_if *os;
11cd4b94 2316 struct list_head *p;
5d95dde7 2317 int i = 0;
381d033a 2318 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2319 return;
48d54f3f 2320
11cd4b94 2321 p = oh->slave_ports.next;
63c85238 2322
5d95dde7 2323 while (i < oh->slaves_cnt) {
11cd4b94 2324 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2325 if (!os->_clk)
64813c3f 2326 continue;
63c85238 2327
64813c3f
PW
2328 if (os->flags & OCPIF_SWSUP_IDLE) {
2329 /* XXX omap_iclk_deny_idle(c); */
2330 } else {
2331 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2332 clk_enable(os->_clk);
63c85238
PW
2333 }
2334 }
2335
64813c3f
PW
2336 return;
2337}
2338
2339/**
2340 * _setup_reset - reset an IP block during the setup process
2341 * @oh: struct omap_hwmod *
2342 *
2343 * Reset the IP block corresponding to the hwmod @oh during the setup
2344 * process. The IP block is first enabled so it can be successfully
2345 * reset. Returns 0 upon success or a negative error code upon
2346 * failure.
2347 */
2348static int __init _setup_reset(struct omap_hwmod *oh)
2349{
2350 int r;
2351
2352 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2353 return -EINVAL;
63c85238 2354
747834ab
PW
2355 if (oh->rst_lines_cnt == 0) {
2356 r = _enable(oh);
2357 if (r) {
2358 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2359 oh->name, oh->_state);
2360 return -EINVAL;
2361 }
9a23dfe1 2362 }
63c85238 2363
2800852a 2364 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2365 r = _reset(oh);
2366
2367 return r;
2368}
2369
2370/**
2371 * _setup_postsetup - transition to the appropriate state after _setup
2372 * @oh: struct omap_hwmod *
2373 *
2374 * Place an IP block represented by @oh into a "post-setup" state --
2375 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2376 * this function is called at the end of _setup().) The postsetup
2377 * state for an IP block can be changed by calling
2378 * omap_hwmod_enter_postsetup_state() early in the boot process,
2379 * before one of the omap_hwmod_setup*() functions are called for the
2380 * IP block.
2381 *
2382 * The IP block stays in this state until a PM runtime-based driver is
2383 * loaded for that IP block. A post-setup state of IDLE is
2384 * appropriate for almost all IP blocks with runtime PM-enabled
2385 * drivers, since those drivers are able to enable the IP block. A
2386 * post-setup state of ENABLED is appropriate for kernels with PM
2387 * runtime disabled. The DISABLED state is appropriate for unusual IP
2388 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2389 * included, since the WDTIMER starts running on reset and will reset
2390 * the MPU if left active.
2391 *
2392 * This post-setup mechanism is deprecated. Once all of the OMAP
2393 * drivers have been converted to use PM runtime, and all of the IP
2394 * block data and interconnect data is available to the hwmod code, it
2395 * should be possible to replace this mechanism with a "lazy reset"
2396 * arrangement. In a "lazy reset" setup, each IP block is enabled
2397 * when the driver first probes, then all remaining IP blocks without
2398 * drivers are either shut down or enabled after the drivers have
2399 * loaded. However, this cannot take place until the above
2400 * preconditions have been met, since otherwise the late reset code
2401 * has no way of knowing which IP blocks are in use by drivers, and
2402 * which ones are unused.
2403 *
2404 * No return value.
2405 */
2406static void __init _setup_postsetup(struct omap_hwmod *oh)
2407{
2408 u8 postsetup_state;
2409
2410 if (oh->rst_lines_cnt > 0)
2411 return;
76e5589e 2412
2092e5cc
PW
2413 postsetup_state = oh->_postsetup_state;
2414 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2415 postsetup_state = _HWMOD_STATE_ENABLED;
2416
2417 /*
2418 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2419 * it should be set by the core code as a runtime flag during startup
2420 */
2421 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2422 (postsetup_state == _HWMOD_STATE_IDLE)) {
2423 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2424 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2425 }
2092e5cc
PW
2426
2427 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2428 _idle(oh);
2092e5cc
PW
2429 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2430 _shutdown(oh);
2431 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2432 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2433 oh->name, postsetup_state);
63c85238 2434
64813c3f
PW
2435 return;
2436}
2437
2438/**
2439 * _setup - prepare IP block hardware for use
2440 * @oh: struct omap_hwmod *
2441 * @n: (unused, pass NULL)
2442 *
2443 * Configure the IP block represented by @oh. This may include
2444 * enabling the IP block, resetting it, and placing it into a
2445 * post-setup state, depending on the type of IP block and applicable
2446 * flags. IP blocks are reset to prevent any previous configuration
2447 * by the bootloader or previous operating system from interfering
2448 * with power management or other parts of the system. The reset can
2449 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2450 * two phases for hwmod initialization. Code called here generally
2451 * affects the IP block hardware, or system integration hardware
2452 * associated with the IP block. Returns 0.
2453 */
2454static int __init _setup(struct omap_hwmod *oh, void *data)
2455{
2456 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2457 return 0;
2458
2459 _setup_iclk_autoidle(oh);
2460
2461 if (!_setup_reset(oh))
2462 _setup_postsetup(oh);
2463
63c85238
PW
2464 return 0;
2465}
2466
63c85238 2467/**
0102b627 2468 * _register - register a struct omap_hwmod
63c85238
PW
2469 * @oh: struct omap_hwmod *
2470 *
43b40992
PW
2471 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2472 * already has been registered by the same name; -EINVAL if the
2473 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2474 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2475 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2476 * success.
63c85238
PW
2477 *
2478 * XXX The data should be copied into bootmem, so the original data
2479 * should be marked __initdata and freed after init. This would allow
2480 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2481 * that the copy process would be relatively complex due to the large number
2482 * of substructures.
2483 */
01592df9 2484static int __init _register(struct omap_hwmod *oh)
63c85238 2485{
43b40992
PW
2486 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2487 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2488 return -EINVAL;
2489
63c85238
PW
2490 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2491
ce35b244
BC
2492 if (_lookup(oh->name))
2493 return -EEXIST;
63c85238 2494
63c85238
PW
2495 list_add_tail(&oh->node, &omap_hwmod_list);
2496
2221b5cd
PW
2497 INIT_LIST_HEAD(&oh->master_ports);
2498 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2499 spin_lock_init(&oh->_lock);
2092e5cc 2500
63c85238
PW
2501 oh->_state = _HWMOD_STATE_REGISTERED;
2502
569edd70
PW
2503 /*
2504 * XXX Rather than doing a strcmp(), this should test a flag
2505 * set in the hwmod data, inserted by the autogenerator code.
2506 */
2507 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2508 mpu_oh = oh;
63c85238 2509
569edd70 2510 return 0;
63c85238
PW
2511}
2512
2221b5cd
PW
2513/**
2514 * _alloc_links - return allocated memory for hwmod links
2515 * @ml: pointer to a struct omap_hwmod_link * for the master link
2516 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2517 *
2518 * Return pointers to two struct omap_hwmod_link records, via the
2519 * addresses pointed to by @ml and @sl. Will first attempt to return
2520 * memory allocated as part of a large initial block, but if that has
2521 * been exhausted, will allocate memory itself. Since ideally this
2522 * second allocation path will never occur, the number of these
2523 * 'supplemental' allocations will be logged when debugging is
2524 * enabled. Returns 0.
2525 */
2526static int __init _alloc_links(struct omap_hwmod_link **ml,
2527 struct omap_hwmod_link **sl)
2528{
2529 unsigned int sz;
2530
2531 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2532 *ml = &linkspace[free_ls++];
2533 *sl = &linkspace[free_ls++];
2534 return 0;
2535 }
2536
2537 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2538
2539 *sl = NULL;
2540 *ml = alloc_bootmem(sz);
2541
2542 memset(*ml, 0, sz);
2543
2544 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2545
2546 ls_supp++;
2547 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2548 ls_supp * LINKS_PER_OCP_IF);
2549
2550 return 0;
2551};
2552
2553/**
2554 * _add_link - add an interconnect between two IP blocks
2555 * @oi: pointer to a struct omap_hwmod_ocp_if record
2556 *
2557 * Add struct omap_hwmod_link records connecting the master IP block
2558 * specified in @oi->master to @oi, and connecting the slave IP block
2559 * specified in @oi->slave to @oi. This code is assumed to run before
2560 * preemption or SMP has been enabled, thus avoiding the need for
2561 * locking in this code. Changes to this assumption will require
2562 * additional locking. Returns 0.
2563 */
2564static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2565{
2566 struct omap_hwmod_link *ml, *sl;
2567
2568 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2569 oi->slave->name);
2570
2571 _alloc_links(&ml, &sl);
2572
2573 ml->ocp_if = oi;
2574 INIT_LIST_HEAD(&ml->node);
2575 list_add(&ml->node, &oi->master->master_ports);
2576 oi->master->masters_cnt++;
2577
2578 sl->ocp_if = oi;
2579 INIT_LIST_HEAD(&sl->node);
2580 list_add(&sl->node, &oi->slave->slave_ports);
2581 oi->slave->slaves_cnt++;
2582
2583 return 0;
2584}
2585
2586/**
2587 * _register_link - register a struct omap_hwmod_ocp_if
2588 * @oi: struct omap_hwmod_ocp_if *
2589 *
2590 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2591 * has already been registered; -EINVAL if @oi is NULL or if the
2592 * record pointed to by @oi is missing required fields; or 0 upon
2593 * success.
2594 *
2595 * XXX The data should be copied into bootmem, so the original data
2596 * should be marked __initdata and freed after init. This would allow
2597 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2598 */
2599static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2600{
2601 if (!oi || !oi->master || !oi->slave || !oi->user)
2602 return -EINVAL;
2603
2604 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2605 return -EEXIST;
2606
2607 pr_debug("omap_hwmod: registering link from %s to %s\n",
2608 oi->master->name, oi->slave->name);
2609
2610 /*
2611 * Register the connected hwmods, if they haven't been
2612 * registered already
2613 */
2614 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2615 _register(oi->master);
2616
2617 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2618 _register(oi->slave);
2619
2620 _add_link(oi);
2621
2622 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2623
2624 return 0;
2625}
2626
2627/**
2628 * _alloc_linkspace - allocate large block of hwmod links
2629 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2630 *
2631 * Allocate a large block of struct omap_hwmod_link records. This
2632 * improves boot time significantly by avoiding the need to allocate
2633 * individual records one by one. If the number of records to
2634 * allocate in the block hasn't been manually specified, this function
2635 * will count the number of struct omap_hwmod_ocp_if records in @ois
2636 * and use that to determine the allocation size. For SoC families
2637 * that require multiple list registrations, such as OMAP3xxx, this
2638 * estimation process isn't optimal, so manual estimation is advised
2639 * in those cases. Returns -EEXIST if the allocation has already occurred
2640 * or 0 upon success.
2641 */
2642static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2643{
2644 unsigned int i = 0;
2645 unsigned int sz;
2646
2647 if (linkspace) {
2648 WARN(1, "linkspace already allocated\n");
2649 return -EEXIST;
2650 }
2651
2652 if (max_ls == 0)
2653 while (ois[i++])
2654 max_ls += LINKS_PER_OCP_IF;
2655
2656 sz = sizeof(struct omap_hwmod_link) * max_ls;
2657
2658 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2659 __func__, sz, max_ls);
2660
2661 linkspace = alloc_bootmem(sz);
2662
2663 memset(linkspace, 0, sz);
2664
2665 return 0;
2666}
0102b627 2667
8f6aa8ee
KH
2668/* Static functions intended only for use in soc_ops field function pointers */
2669
2670/**
2671 * _omap2_wait_target_ready - wait for a module to leave slave idle
2672 * @oh: struct omap_hwmod *
2673 *
2674 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2675 * does not have an IDLEST bit or if the module successfully leaves
2676 * slave idle; otherwise, pass along the return value of the
2677 * appropriate *_cm*_wait_module_ready() function.
2678 */
2679static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2680{
2681 if (!oh)
2682 return -EINVAL;
2683
2684 if (oh->flags & HWMOD_NO_IDLEST)
2685 return 0;
2686
2687 if (!_find_mpu_rt_port(oh))
2688 return 0;
2689
2690 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2691
2692 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2693 oh->prcm.omap2.idlest_reg_id,
2694 oh->prcm.omap2.idlest_idle_bit);
2695}
2696
2697/**
2698 * _omap4_wait_target_ready - wait for a module to leave slave idle
2699 * @oh: struct omap_hwmod *
2700 *
2701 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2702 * does not have an IDLEST bit or if the module successfully leaves
2703 * slave idle; otherwise, pass along the return value of the
2704 * appropriate *_cm*_wait_module_ready() function.
2705 */
2706static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2707{
2b026d13 2708 if (!oh)
8f6aa8ee
KH
2709 return -EINVAL;
2710
2b026d13 2711 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
8f6aa8ee
KH
2712 return 0;
2713
2714 if (!_find_mpu_rt_port(oh))
2715 return 0;
2716
2717 /* XXX check module SIDLEMODE, hardreset status */
2718
2719 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2720 oh->clkdm->cm_inst,
2721 oh->clkdm->clkdm_offs,
2722 oh->prcm.omap4.clkctrl_offs);
2723}
2724
1688bf19
VH
2725/**
2726 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2727 * @oh: struct omap_hwmod *
2728 *
2729 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2730 * does not have an IDLEST bit or if the module successfully leaves
2731 * slave idle; otherwise, pass along the return value of the
2732 * appropriate *_cm*_wait_module_ready() function.
2733 */
2734static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2735{
2736 if (!oh || !oh->clkdm)
2737 return -EINVAL;
2738
2739 if (oh->flags & HWMOD_NO_IDLEST)
2740 return 0;
2741
2742 if (!_find_mpu_rt_port(oh))
2743 return 0;
2744
2745 /* XXX check module SIDLEMODE, hardreset status */
2746
2747 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2748 oh->clkdm->clkdm_offs,
2749 oh->prcm.omap4.clkctrl_offs);
2750}
2751
b8249cf2
KH
2752/**
2753 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2754 * @oh: struct omap_hwmod * to assert hardreset
2755 * @ohri: hardreset line data
2756 *
2757 * Call omap2_prm_assert_hardreset() with parameters extracted from
2758 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2759 * use as an soc_ops function pointer. Passes along the return value
2760 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2761 * for removal when the PRM code is moved into drivers/.
2762 */
2763static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2764 struct omap_hwmod_rst_info *ohri)
2765{
2766 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2767 ohri->rst_shift);
2768}
2769
2770/**
2771 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2772 * @oh: struct omap_hwmod * to deassert hardreset
2773 * @ohri: hardreset line data
2774 *
2775 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2776 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2777 * use as an soc_ops function pointer. Passes along the return value
2778 * from omap2_prm_deassert_hardreset(). XXX This function is
2779 * scheduled for removal when the PRM code is moved into drivers/.
2780 */
2781static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2782 struct omap_hwmod_rst_info *ohri)
2783{
2784 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2785 ohri->rst_shift,
2786 ohri->st_shift);
2787}
2788
2789/**
2790 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2791 * @oh: struct omap_hwmod * to test hardreset
2792 * @ohri: hardreset line data
2793 *
2794 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2795 * from the hwmod @oh and the hardreset line data @ohri. Only
2796 * intended for use as an soc_ops function pointer. Passes along the
2797 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2798 * function is scheduled for removal when the PRM code is moved into
2799 * drivers/.
2800 */
2801static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2802 struct omap_hwmod_rst_info *ohri)
2803{
2804 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2805 ohri->st_shift);
2806}
2807
2808/**
2809 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2810 * @oh: struct omap_hwmod * to assert hardreset
2811 * @ohri: hardreset line data
2812 *
2813 * Call omap4_prminst_assert_hardreset() with parameters extracted
2814 * from the hwmod @oh and the hardreset line data @ohri. Only
2815 * intended for use as an soc_ops function pointer. Passes along the
2816 * return value from omap4_prminst_assert_hardreset(). XXX This
2817 * function is scheduled for removal when the PRM code is moved into
2818 * drivers/.
2819 */
2820static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2821 struct omap_hwmod_rst_info *ohri)
b8249cf2 2822{
07b3a139
PW
2823 if (!oh->clkdm)
2824 return -EINVAL;
2825
b8249cf2
KH
2826 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2827 oh->clkdm->pwrdm.ptr->prcm_partition,
2828 oh->clkdm->pwrdm.ptr->prcm_offs,
2829 oh->prcm.omap4.rstctrl_offs);
2830}
2831
2832/**
2833 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2834 * @oh: struct omap_hwmod * to deassert hardreset
2835 * @ohri: hardreset line data
2836 *
2837 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2838 * from the hwmod @oh and the hardreset line data @ohri. Only
2839 * intended for use as an soc_ops function pointer. Passes along the
2840 * return value from omap4_prminst_deassert_hardreset(). XXX This
2841 * function is scheduled for removal when the PRM code is moved into
2842 * drivers/.
2843 */
2844static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2845 struct omap_hwmod_rst_info *ohri)
2846{
07b3a139
PW
2847 if (!oh->clkdm)
2848 return -EINVAL;
2849
b8249cf2
KH
2850 if (ohri->st_shift)
2851 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2852 oh->name, ohri->name);
2853 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2854 oh->clkdm->pwrdm.ptr->prcm_partition,
2855 oh->clkdm->pwrdm.ptr->prcm_offs,
2856 oh->prcm.omap4.rstctrl_offs);
2857}
2858
2859/**
2860 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2861 * @oh: struct omap_hwmod * to test hardreset
2862 * @ohri: hardreset line data
2863 *
2864 * Call omap4_prminst_is_hardreset_asserted() with parameters
2865 * extracted from the hwmod @oh and the hardreset line data @ohri.
2866 * Only intended for use as an soc_ops function pointer. Passes along
2867 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2868 * This function is scheduled for removal when the PRM code is moved
2869 * into drivers/.
2870 */
2871static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2872 struct omap_hwmod_rst_info *ohri)
2873{
07b3a139
PW
2874 if (!oh->clkdm)
2875 return -EINVAL;
2876
b8249cf2
KH
2877 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2878 oh->clkdm->pwrdm.ptr->prcm_partition,
2879 oh->clkdm->pwrdm.ptr->prcm_offs,
2880 oh->prcm.omap4.rstctrl_offs);
2881}
2882
1688bf19
VH
2883/**
2884 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2885 * @oh: struct omap_hwmod * to assert hardreset
2886 * @ohri: hardreset line data
2887 *
2888 * Call am33xx_prminst_assert_hardreset() with parameters extracted
2889 * from the hwmod @oh and the hardreset line data @ohri. Only
2890 * intended for use as an soc_ops function pointer. Passes along the
2891 * return value from am33xx_prminst_assert_hardreset(). XXX This
2892 * function is scheduled for removal when the PRM code is moved into
2893 * drivers/.
2894 */
2895static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
2896 struct omap_hwmod_rst_info *ohri)
2897
2898{
2899 return am33xx_prm_assert_hardreset(ohri->rst_shift,
2900 oh->clkdm->pwrdm.ptr->prcm_offs,
2901 oh->prcm.omap4.rstctrl_offs);
2902}
2903
2904/**
2905 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2906 * @oh: struct omap_hwmod * to deassert hardreset
2907 * @ohri: hardreset line data
2908 *
2909 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2910 * from the hwmod @oh and the hardreset line data @ohri. Only
2911 * intended for use as an soc_ops function pointer. Passes along the
2912 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2913 * function is scheduled for removal when the PRM code is moved into
2914 * drivers/.
2915 */
2916static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2917 struct omap_hwmod_rst_info *ohri)
2918{
2919 if (ohri->st_shift)
2920 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2921 oh->name, ohri->name);
2922
2923 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
2924 oh->clkdm->pwrdm.ptr->prcm_offs,
2925 oh->prcm.omap4.rstctrl_offs,
2926 oh->prcm.omap4.rstst_offs);
2927}
2928
2929/**
2930 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
2931 * @oh: struct omap_hwmod * to test hardreset
2932 * @ohri: hardreset line data
2933 *
2934 * Call am33xx_prminst_is_hardreset_asserted() with parameters
2935 * extracted from the hwmod @oh and the hardreset line data @ohri.
2936 * Only intended for use as an soc_ops function pointer. Passes along
2937 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
2938 * This function is scheduled for removal when the PRM code is moved
2939 * into drivers/.
2940 */
2941static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
2942 struct omap_hwmod_rst_info *ohri)
2943{
2944 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
2945 oh->clkdm->pwrdm.ptr->prcm_offs,
2946 oh->prcm.omap4.rstctrl_offs);
2947}
2948
0102b627
BC
2949/* Public functions */
2950
2951u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2952{
2953 if (oh->flags & HWMOD_16BIT_REG)
2954 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2955 else
2956 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2957}
2958
2959void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2960{
2961 if (oh->flags & HWMOD_16BIT_REG)
2962 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2963 else
2964 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2965}
2966
6d3c55fd
A
2967/**
2968 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2969 * @oh: struct omap_hwmod *
2970 *
2971 * This is a public function exposed to drivers. Some drivers may need to do
2972 * some settings before and after resetting the device. Those drivers after
2973 * doing the necessary settings could use this function to start a reset by
2974 * setting the SYSCONFIG.SOFTRESET bit.
2975 */
2976int omap_hwmod_softreset(struct omap_hwmod *oh)
2977{
3c55c1ba
PW
2978 u32 v;
2979 int ret;
2980
2981 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2982 return -EINVAL;
2983
3c55c1ba
PW
2984 v = oh->_sysc_cache;
2985 ret = _set_softreset(oh, &v);
2986 if (ret)
2987 goto error;
2988 _write_sysconfig(v, oh);
2989
2990error:
2991 return ret;
6d3c55fd
A
2992}
2993
0102b627
BC
2994/**
2995 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2996 * @oh: struct omap_hwmod *
2997 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2998 *
2999 * Sets the IP block's OCP slave idlemode in hardware, and updates our
3000 * local copy. Intended to be used by drivers that have some erratum
3001 * that requires direct manipulation of the SIDLEMODE bits. Returns
3002 * -EINVAL if @oh is null, or passes along the return value from
3003 * _set_slave_idlemode().
3004 *
3005 * XXX Does this function have any current users? If not, we should
3006 * remove it; it is better to let the rest of the hwmod code handle this.
3007 * Any users of this function should be scrutinized carefully.
3008 */
3009int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3010{
3011 u32 v;
3012 int retval = 0;
3013
3014 if (!oh)
3015 return -EINVAL;
3016
3017 v = oh->_sysc_cache;
3018
3019 retval = _set_slave_idlemode(oh, idlemode, &v);
3020 if (!retval)
3021 _write_sysconfig(v, oh);
3022
3023 return retval;
3024}
3025
63c85238
PW
3026/**
3027 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3028 * @name: name of the omap_hwmod to look up
3029 *
3030 * Given a @name of an omap_hwmod, return a pointer to the registered
3031 * struct omap_hwmod *, or NULL upon error.
3032 */
3033struct omap_hwmod *omap_hwmod_lookup(const char *name)
3034{
3035 struct omap_hwmod *oh;
3036
3037 if (!name)
3038 return NULL;
3039
63c85238 3040 oh = _lookup(name);
63c85238
PW
3041
3042 return oh;
3043}
3044
3045/**
3046 * omap_hwmod_for_each - call function for each registered omap_hwmod
3047 * @fn: pointer to a callback function
97d60162 3048 * @data: void * data to pass to callback function
63c85238
PW
3049 *
3050 * Call @fn for each registered omap_hwmod, passing @data to each
3051 * function. @fn must return 0 for success or any other value for
3052 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3053 * will stop and the non-zero return value will be passed to the
3054 * caller of omap_hwmod_for_each(). @fn is called with
3055 * omap_hwmod_for_each() held.
3056 */
97d60162
PW
3057int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3058 void *data)
63c85238
PW
3059{
3060 struct omap_hwmod *temp_oh;
30ebad9d 3061 int ret = 0;
63c85238
PW
3062
3063 if (!fn)
3064 return -EINVAL;
3065
63c85238 3066 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 3067 ret = (*fn)(temp_oh, data);
63c85238
PW
3068 if (ret)
3069 break;
3070 }
63c85238
PW
3071
3072 return ret;
3073}
3074
2221b5cd
PW
3075/**
3076 * omap_hwmod_register_links - register an array of hwmod links
3077 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3078 *
3079 * Intended to be called early in boot before the clock framework is
3080 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
3081 * listed in @ois that are valid for this chip. Returns -EINVAL if
3082 * omap_hwmod_init() hasn't been called before calling this function,
3083 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3084 * success.
2221b5cd
PW
3085 */
3086int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3087{
3088 int r, i;
3089
9ebfd285
KH
3090 if (!inited)
3091 return -EINVAL;
3092
2221b5cd
PW
3093 if (!ois)
3094 return 0;
3095
2221b5cd
PW
3096 if (!linkspace) {
3097 if (_alloc_linkspace(ois)) {
3098 pr_err("omap_hwmod: could not allocate link space\n");
3099 return -ENOMEM;
3100 }
3101 }
3102
3103 i = 0;
3104 do {
3105 r = _register_link(ois[i]);
3106 WARN(r && r != -EEXIST,
3107 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3108 ois[i]->master->name, ois[i]->slave->name, r);
3109 } while (ois[++i]);
3110
3111 return 0;
3112}
3113
381d033a
PW
3114/**
3115 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3116 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3117 *
3118 * If the hwmod data corresponding to the MPU subsystem IP block
3119 * hasn't been initialized and set up yet, do so now. This must be
3120 * done first since sleep dependencies may be added from other hwmods
3121 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3122 * return value.
63c85238 3123 */
381d033a 3124static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3125{
381d033a
PW
3126 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3127 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3128 __func__, MPU_INITIATOR_NAME);
3129 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3130 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3131}
3132
63c85238 3133/**
a2debdbd
PW
3134 * omap_hwmod_setup_one - set up a single hwmod
3135 * @oh_name: const char * name of the already-registered hwmod to set up
3136 *
381d033a
PW
3137 * Initialize and set up a single hwmod. Intended to be used for a
3138 * small number of early devices, such as the timer IP blocks used for
3139 * the scheduler clock. Must be called after omap2_clk_init().
3140 * Resolves the struct clk names to struct clk pointers for each
3141 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3142 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3143 */
3144int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3145{
3146 struct omap_hwmod *oh;
63c85238 3147
a2debdbd
PW
3148 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3149
a2debdbd
PW
3150 oh = _lookup(oh_name);
3151 if (!oh) {
3152 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3153 return -EINVAL;
3154 }
63c85238 3155
381d033a 3156 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3157
381d033a 3158 _init(oh, NULL);
a2debdbd
PW
3159 _setup(oh, NULL);
3160
63c85238
PW
3161 return 0;
3162}
3163
3164/**
381d033a 3165 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3166 *
381d033a
PW
3167 * Initialize and set up all IP blocks registered with the hwmod code.
3168 * Must be called after omap2_clk_init(). Resolves the struct clk
3169 * names to struct clk pointers for each registered omap_hwmod. Also
3170 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3171 */
550c8092 3172static int __init omap_hwmod_setup_all(void)
63c85238 3173{
381d033a 3174 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3175
381d033a 3176 omap_hwmod_for_each(_init, NULL);
2092e5cc 3177 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3178
3179 return 0;
3180}
550c8092 3181core_initcall(omap_hwmod_setup_all);
63c85238 3182
63c85238
PW
3183/**
3184 * omap_hwmod_enable - enable an omap_hwmod
3185 * @oh: struct omap_hwmod *
3186 *
74ff3a68 3187 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3188 * Returns -EINVAL on error or passes along the return value from _enable().
3189 */
3190int omap_hwmod_enable(struct omap_hwmod *oh)
3191{
3192 int r;
dc6d1cda 3193 unsigned long flags;
63c85238
PW
3194
3195 if (!oh)
3196 return -EINVAL;
3197
dc6d1cda
PW
3198 spin_lock_irqsave(&oh->_lock, flags);
3199 r = _enable(oh);
3200 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3201
3202 return r;
3203}
3204
3205/**
3206 * omap_hwmod_idle - idle an omap_hwmod
3207 * @oh: struct omap_hwmod *
3208 *
74ff3a68 3209 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3210 * Returns -EINVAL on error or passes along the return value from _idle().
3211 */
3212int omap_hwmod_idle(struct omap_hwmod *oh)
3213{
dc6d1cda
PW
3214 unsigned long flags;
3215
63c85238
PW
3216 if (!oh)
3217 return -EINVAL;
3218
dc6d1cda
PW
3219 spin_lock_irqsave(&oh->_lock, flags);
3220 _idle(oh);
3221 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3222
3223 return 0;
3224}
3225
3226/**
3227 * omap_hwmod_shutdown - shutdown an omap_hwmod
3228 * @oh: struct omap_hwmod *
3229 *
74ff3a68 3230 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3231 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3232 * the return value from _shutdown().
3233 */
3234int omap_hwmod_shutdown(struct omap_hwmod *oh)
3235{
dc6d1cda
PW
3236 unsigned long flags;
3237
63c85238
PW
3238 if (!oh)
3239 return -EINVAL;
3240
dc6d1cda 3241 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3242 _shutdown(oh);
dc6d1cda 3243 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3244
3245 return 0;
3246}
3247
3248/**
3249 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3250 * @oh: struct omap_hwmod *oh
3251 *
3252 * Intended to be called by the omap_device code.
3253 */
3254int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3255{
dc6d1cda
PW
3256 unsigned long flags;
3257
3258 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3259 _enable_clocks(oh);
dc6d1cda 3260 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3261
3262 return 0;
3263}
3264
3265/**
3266 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3267 * @oh: struct omap_hwmod *oh
3268 *
3269 * Intended to be called by the omap_device code.
3270 */
3271int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3272{
dc6d1cda
PW
3273 unsigned long flags;
3274
3275 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3276 _disable_clocks(oh);
dc6d1cda 3277 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3278
3279 return 0;
3280}
3281
3282/**
3283 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3284 * @oh: struct omap_hwmod *oh
3285 *
3286 * Intended to be called by drivers and core code when all posted
3287 * writes to a device must complete before continuing further
3288 * execution (for example, after clearing some device IRQSTATUS
3289 * register bits)
3290 *
3291 * XXX what about targets with multiple OCP threads?
3292 */
3293void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3294{
3295 BUG_ON(!oh);
3296
43b40992 3297 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3298 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3299 oh->name);
63c85238
PW
3300 return;
3301 }
3302
3303 /*
3304 * Forces posted writes to complete on the OCP thread handling
3305 * register writes
3306 */
cc7a1d2a 3307 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3308}
3309
3310/**
3311 * omap_hwmod_reset - reset the hwmod
3312 * @oh: struct omap_hwmod *
3313 *
3314 * Under some conditions, a driver may wish to reset the entire device.
3315 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3316 * the return value from _reset().
63c85238
PW
3317 */
3318int omap_hwmod_reset(struct omap_hwmod *oh)
3319{
3320 int r;
dc6d1cda 3321 unsigned long flags;
63c85238 3322
9b579114 3323 if (!oh)
63c85238
PW
3324 return -EINVAL;
3325
dc6d1cda 3326 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3327 r = _reset(oh);
dc6d1cda 3328 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3329
3330 return r;
3331}
3332
5e8370f1
PW
3333/*
3334 * IP block data retrieval functions
3335 */
3336
63c85238
PW
3337/**
3338 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3339 * @oh: struct omap_hwmod *
3340 * @res: pointer to the first element of an array of struct resource to fill
3341 *
3342 * Count the number of struct resource array elements necessary to
3343 * contain omap_hwmod @oh resources. Intended to be called by code
3344 * that registers omap_devices. Intended to be used to determine the
3345 * size of a dynamically-allocated struct resource array, before
3346 * calling omap_hwmod_fill_resources(). Returns the number of struct
3347 * resource array elements needed.
3348 *
3349 * XXX This code is not optimized. It could attempt to merge adjacent
3350 * resource IDs.
3351 *
3352 */
3353int omap_hwmod_count_resources(struct omap_hwmod *oh)
3354{
5d95dde7 3355 struct omap_hwmod_ocp_if *os;
11cd4b94 3356 struct list_head *p;
5d95dde7
PW
3357 int ret;
3358 int i = 0;
63c85238 3359
bc614958 3360 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 3361
11cd4b94 3362 p = oh->slave_ports.next;
2221b5cd 3363
5d95dde7 3364 while (i < oh->slaves_cnt) {
11cd4b94 3365 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
3366 ret += _count_ocp_if_addr_spaces(os);
3367 }
63c85238
PW
3368
3369 return ret;
3370}
3371
3372/**
3373 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3374 * @oh: struct omap_hwmod *
3375 * @res: pointer to the first element of an array of struct resource to fill
3376 *
3377 * Fill the struct resource array @res with resource data from the
3378 * omap_hwmod @oh. Intended to be called by code that registers
3379 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3380 * number of array elements filled.
3381 */
3382int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3383{
5d95dde7 3384 struct omap_hwmod_ocp_if *os;
11cd4b94 3385 struct list_head *p;
5d95dde7 3386 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3387 int r = 0;
3388
3389 /* For each IRQ, DMA, memory area, fill in array.*/
3390
212738a4
PW
3391 mpu_irqs_cnt = _count_mpu_irqs(oh);
3392 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3393 (res + r)->name = (oh->mpu_irqs + i)->name;
3394 (res + r)->start = (oh->mpu_irqs + i)->irq;
3395 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3396 (res + r)->flags = IORESOURCE_IRQ;
3397 r++;
3398 }
3399
bc614958
PW
3400 sdma_reqs_cnt = _count_sdma_reqs(oh);
3401 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3402 (res + r)->name = (oh->sdma_reqs + i)->name;
3403 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3404 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3405 (res + r)->flags = IORESOURCE_DMA;
3406 r++;
3407 }
3408
11cd4b94 3409 p = oh->slave_ports.next;
2221b5cd 3410
5d95dde7
PW
3411 i = 0;
3412 while (i < oh->slaves_cnt) {
11cd4b94 3413 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3414 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3415
78183f3f 3416 for (j = 0; j < addr_cnt; j++) {
cd503802 3417 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3418 (res + r)->start = (os->addr + j)->pa_start;
3419 (res + r)->end = (os->addr + j)->pa_end;
3420 (res + r)->flags = IORESOURCE_MEM;
3421 r++;
3422 }
3423 }
3424
3425 return r;
3426}
3427
b82b04e8
VH
3428/**
3429 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3430 * @oh: struct omap_hwmod *
3431 * @res: pointer to the array of struct resource to fill
3432 *
3433 * Fill the struct resource array @res with dma resource data from the
3434 * omap_hwmod @oh. Intended to be called by code that registers
3435 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3436 * number of array elements filled.
3437 */
3438int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3439{
3440 int i, sdma_reqs_cnt;
3441 int r = 0;
3442
3443 sdma_reqs_cnt = _count_sdma_reqs(oh);
3444 for (i = 0; i < sdma_reqs_cnt; i++) {
3445 (res + r)->name = (oh->sdma_reqs + i)->name;
3446 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3447 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3448 (res + r)->flags = IORESOURCE_DMA;
3449 r++;
3450 }
3451
3452 return r;
3453}
3454
5e8370f1
PW
3455/**
3456 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3457 * @oh: struct omap_hwmod * to operate on
3458 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3459 * @name: pointer to the name of the data to fetch (optional)
3460 * @rsrc: pointer to a struct resource, allocated by the caller
3461 *
3462 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3463 * data for the IP block pointed to by @oh. The data will be filled
3464 * into a struct resource record pointed to by @rsrc. The struct
3465 * resource must be allocated by the caller. When @name is non-null,
3466 * the data associated with the matching entry in the IRQ/SDMA/address
3467 * space hwmod data arrays will be returned. If @name is null, the
3468 * first array entry will be returned. Data order is not meaningful
3469 * in hwmod data, so callers are strongly encouraged to use a non-null
3470 * @name whenever possible to avoid unpredictable effects if hwmod
3471 * data is later added that causes data ordering to change. This
3472 * function is only intended for use by OMAP core code. Device
3473 * drivers should not call this function - the appropriate bus-related
3474 * data accessor functions should be used instead. Returns 0 upon
3475 * success or a negative error code upon error.
3476 */
3477int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3478 const char *name, struct resource *rsrc)
3479{
3480 int r;
3481 unsigned int irq, dma;
3482 u32 pa_start, pa_end;
3483
3484 if (!oh || !rsrc)
3485 return -EINVAL;
3486
3487 if (type == IORESOURCE_IRQ) {
3488 r = _get_mpu_irq_by_name(oh, name, &irq);
3489 if (r)
3490 return r;
3491
3492 rsrc->start = irq;
3493 rsrc->end = irq;
3494 } else if (type == IORESOURCE_DMA) {
3495 r = _get_sdma_req_by_name(oh, name, &dma);
3496 if (r)
3497 return r;
3498
3499 rsrc->start = dma;
3500 rsrc->end = dma;
3501 } else if (type == IORESOURCE_MEM) {
3502 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3503 if (r)
3504 return r;
3505
3506 rsrc->start = pa_start;
3507 rsrc->end = pa_end;
3508 } else {
3509 return -EINVAL;
3510 }
3511
3512 rsrc->flags = type;
3513 rsrc->name = name;
3514
3515 return 0;
3516}
3517
63c85238
PW
3518/**
3519 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3520 * @oh: struct omap_hwmod *
3521 *
3522 * Return the powerdomain pointer associated with the OMAP module
3523 * @oh's main clock. If @oh does not have a main clk, return the
3524 * powerdomain associated with the interface clock associated with the
3525 * module's MPU port. (XXX Perhaps this should use the SDMA port
3526 * instead?) Returns NULL on error, or a struct powerdomain * on
3527 * success.
3528 */
3529struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3530{
3531 struct clk *c;
2d6141ba 3532 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3533
3534 if (!oh)
3535 return NULL;
3536
3537 if (oh->_clk) {
3538 c = oh->_clk;
3539 } else {
2d6141ba
PW
3540 oi = _find_mpu_rt_port(oh);
3541 if (!oi)
63c85238 3542 return NULL;
2d6141ba 3543 c = oi->_clk;
63c85238
PW
3544 }
3545
d5647c18
TG
3546 if (!c->clkdm)
3547 return NULL;
3548
63c85238
PW
3549 return c->clkdm->pwrdm.ptr;
3550
3551}
3552
db2a60bf
PW
3553/**
3554 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3555 * @oh: struct omap_hwmod *
3556 *
3557 * Returns the virtual address corresponding to the beginning of the
3558 * module's register target, in the address range that is intended to
3559 * be used by the MPU. Returns the virtual address upon success or NULL
3560 * upon error.
3561 */
3562void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3563{
3564 if (!oh)
3565 return NULL;
3566
3567 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3568 return NULL;
3569
3570 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3571 return NULL;
3572
3573 return oh->_mpu_rt_va;
3574}
3575
63c85238
PW
3576/**
3577 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3578 * @oh: struct omap_hwmod *
3579 * @init_oh: struct omap_hwmod * (initiator)
3580 *
3581 * Add a sleep dependency between the initiator @init_oh and @oh.
3582 * Intended to be called by DSP/Bridge code via platform_data for the
3583 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3584 * code needs to add/del initiator dependencies dynamically
3585 * before/after accessing a device. Returns the return value from
3586 * _add_initiator_dep().
3587 *
3588 * XXX Keep a usecount in the clockdomain code
3589 */
3590int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3591 struct omap_hwmod *init_oh)
3592{
3593 return _add_initiator_dep(oh, init_oh);
3594}
3595
3596/*
3597 * XXX what about functions for drivers to save/restore ocp_sysconfig
3598 * for context save/restore operations?
3599 */
3600
3601/**
3602 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3603 * @oh: struct omap_hwmod *
3604 * @init_oh: struct omap_hwmod * (initiator)
3605 *
3606 * Remove a sleep dependency between the initiator @init_oh and @oh.
3607 * Intended to be called by DSP/Bridge code via platform_data for the
3608 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3609 * code needs to add/del initiator dependencies dynamically
3610 * before/after accessing a device. Returns the return value from
3611 * _del_initiator_dep().
3612 *
3613 * XXX Keep a usecount in the clockdomain code
3614 */
3615int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3616 struct omap_hwmod *init_oh)
3617{
3618 return _del_initiator_dep(oh, init_oh);
3619}
3620
63c85238
PW
3621/**
3622 * omap_hwmod_enable_wakeup - allow device to wake up the system
3623 * @oh: struct omap_hwmod *
3624 *
3625 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3626 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3627 * this IP block if it has dynamic mux entries. Eventually this
3628 * should set PRCM wakeup registers to cause the PRCM to receive
3629 * wakeup events from the module. Does not set any wakeup routing
3630 * registers beyond this point - if the module is to wake up any other
3631 * module or subsystem, that must be set separately. Called by
3632 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3633 */
3634int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3635{
dc6d1cda 3636 unsigned long flags;
5a7ddcbd 3637 u32 v;
dc6d1cda 3638
dc6d1cda 3639 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3640
3641 if (oh->class->sysc &&
3642 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3643 v = oh->_sysc_cache;
3644 _enable_wakeup(oh, &v);
3645 _write_sysconfig(v, oh);
3646 }
3647
eceec009 3648 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3649 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3650
3651 return 0;
3652}
3653
3654/**
3655 * omap_hwmod_disable_wakeup - prevent device from waking the system
3656 * @oh: struct omap_hwmod *
3657 *
3658 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3659 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3660 * events for this IP block if it has dynamic mux entries. Eventually
3661 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3662 * wakeup events from the module. Does not set any wakeup routing
3663 * registers beyond this point - if the module is to wake up any other
3664 * module or subsystem, that must be set separately. Called by
3665 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3666 */
3667int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3668{
dc6d1cda 3669 unsigned long flags;
5a7ddcbd 3670 u32 v;
dc6d1cda 3671
dc6d1cda 3672 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3673
3674 if (oh->class->sysc &&
3675 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3676 v = oh->_sysc_cache;
3677 _disable_wakeup(oh, &v);
3678 _write_sysconfig(v, oh);
3679 }
3680
eceec009 3681 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3682 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3683
3684 return 0;
3685}
43b40992 3686
aee48e3c
PW
3687/**
3688 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3689 * contained in the hwmod module.
3690 * @oh: struct omap_hwmod *
3691 * @name: name of the reset line to lookup and assert
3692 *
3693 * Some IP like dsp, ipu or iva contain processor that require
3694 * an HW reset line to be assert / deassert in order to enable fully
3695 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3696 * yet supported on this OMAP; otherwise, passes along the return value
3697 * from _assert_hardreset().
3698 */
3699int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3700{
3701 int ret;
dc6d1cda 3702 unsigned long flags;
aee48e3c
PW
3703
3704 if (!oh)
3705 return -EINVAL;
3706
dc6d1cda 3707 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3708 ret = _assert_hardreset(oh, name);
dc6d1cda 3709 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3710
3711 return ret;
3712}
3713
3714/**
3715 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3716 * contained in the hwmod module.
3717 * @oh: struct omap_hwmod *
3718 * @name: name of the reset line to look up and deassert
3719 *
3720 * Some IP like dsp, ipu or iva contain processor that require
3721 * an HW reset line to be assert / deassert in order to enable fully
3722 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3723 * yet supported on this OMAP; otherwise, passes along the return value
3724 * from _deassert_hardreset().
3725 */
3726int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3727{
3728 int ret;
dc6d1cda 3729 unsigned long flags;
aee48e3c
PW
3730
3731 if (!oh)
3732 return -EINVAL;
3733
dc6d1cda 3734 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3735 ret = _deassert_hardreset(oh, name);
dc6d1cda 3736 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3737
3738 return ret;
3739}
3740
3741/**
3742 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3743 * contained in the hwmod module
3744 * @oh: struct omap_hwmod *
3745 * @name: name of the reset line to look up and read
3746 *
3747 * Return the current state of the hwmod @oh's reset line named @name:
3748 * returns -EINVAL upon parameter error or if this operation
3749 * is unsupported on the current OMAP; otherwise, passes along the return
3750 * value from _read_hardreset().
3751 */
3752int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3753{
3754 int ret;
dc6d1cda 3755 unsigned long flags;
aee48e3c
PW
3756
3757 if (!oh)
3758 return -EINVAL;
3759
dc6d1cda 3760 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3761 ret = _read_hardreset(oh, name);
dc6d1cda 3762 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3763
3764 return ret;
3765}
3766
3767
43b40992
PW
3768/**
3769 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3770 * @classname: struct omap_hwmod_class name to search for
3771 * @fn: callback function pointer to call for each hwmod in class @classname
3772 * @user: arbitrary context data to pass to the callback function
3773 *
ce35b244
BC
3774 * For each omap_hwmod of class @classname, call @fn.
3775 * If the callback function returns something other than
43b40992
PW
3776 * zero, the iterator is terminated, and the callback function's return
3777 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3778 * if @classname or @fn are NULL, or passes back the error code from @fn.
3779 */
3780int omap_hwmod_for_each_by_class(const char *classname,
3781 int (*fn)(struct omap_hwmod *oh,
3782 void *user),
3783 void *user)
3784{
3785 struct omap_hwmod *temp_oh;
3786 int ret = 0;
3787
3788 if (!classname || !fn)
3789 return -EINVAL;
3790
3791 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3792 __func__, classname);
3793
43b40992
PW
3794 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3795 if (!strcmp(temp_oh->class->name, classname)) {
3796 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3797 __func__, temp_oh->name);
3798 ret = (*fn)(temp_oh, user);
3799 if (ret)
3800 break;
3801 }
3802 }
3803
43b40992
PW
3804 if (ret)
3805 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3806 __func__, ret);
3807
3808 return ret;
3809}
3810
2092e5cc
PW
3811/**
3812 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3813 * @oh: struct omap_hwmod *
3814 * @state: state that _setup() should leave the hwmod in
3815 *
550c8092 3816 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3817 * (called by omap_hwmod_setup_*()). See also the documentation
3818 * for _setup_postsetup(), above. Returns 0 upon success or
3819 * -EINVAL if there is a problem with the arguments or if the hwmod is
3820 * in the wrong state.
2092e5cc
PW
3821 */
3822int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3823{
3824 int ret;
dc6d1cda 3825 unsigned long flags;
2092e5cc
PW
3826
3827 if (!oh)
3828 return -EINVAL;
3829
3830 if (state != _HWMOD_STATE_DISABLED &&
3831 state != _HWMOD_STATE_ENABLED &&
3832 state != _HWMOD_STATE_IDLE)
3833 return -EINVAL;
3834
dc6d1cda 3835 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3836
3837 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3838 ret = -EINVAL;
3839 goto ohsps_unlock;
3840 }
3841
3842 oh->_postsetup_state = state;
3843 ret = 0;
3844
3845ohsps_unlock:
dc6d1cda 3846 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3847
3848 return ret;
3849}
c80705aa
KH
3850
3851/**
3852 * omap_hwmod_get_context_loss_count - get lost context count
3853 * @oh: struct omap_hwmod *
3854 *
3855 * Query the powerdomain of of @oh to get the context loss
3856 * count for this device.
3857 *
3858 * Returns the context loss count of the powerdomain assocated with @oh
3859 * upon success, or zero if no powerdomain exists for @oh.
3860 */
fc013873 3861int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3862{
3863 struct powerdomain *pwrdm;
3864 int ret = 0;
3865
3866 pwrdm = omap_hwmod_get_pwrdm(oh);
3867 if (pwrdm)
3868 ret = pwrdm_get_context_loss_count(pwrdm);
3869
3870 return ret;
3871}
43b01643
PW
3872
3873/**
3874 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3875 * @oh: struct omap_hwmod *
3876 *
3877 * Prevent the hwmod @oh from being reset during the setup process.
3878 * Intended for use by board-*.c files on boards with devices that
3879 * cannot tolerate being reset. Must be called before the hwmod has
3880 * been set up. Returns 0 upon success or negative error code upon
3881 * failure.
3882 */
3883int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3884{
3885 if (!oh)
3886 return -EINVAL;
3887
3888 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3889 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3890 oh->name);
3891 return -EINVAL;
3892 }
3893
3894 oh->flags |= HWMOD_INIT_NO_RESET;
3895
3896 return 0;
3897}
abc2d545
TK
3898
3899/**
3900 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3901 * @oh: struct omap_hwmod * containing hwmod mux entries
3902 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3903 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3904 *
3905 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3906 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3907 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3908 * this function is not called for a given pad_idx, then the ISR
3909 * associated with @oh's first MPU IRQ will be triggered when an I/O
3910 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3911 * the _dynamic or wakeup_ entry: if there are other entries not
3912 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3913 * entries are NOT COUNTED in the dynamic pad index. This function
3914 * must be called separately for each pad that requires its interrupt
3915 * to be re-routed this way. Returns -EINVAL if there is an argument
3916 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3917 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3918 *
3919 * XXX This function interface is fragile. Rather than using array
3920 * indexes, which are subject to unpredictable change, it should be
3921 * using hwmod IRQ names, and some other stable key for the hwmod mux
3922 * pad records.
3923 */
3924int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3925{
3926 int nr_irqs;
3927
3928 might_sleep();
3929
3930 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3931 pad_idx >= oh->mux->nr_pads_dynamic)
3932 return -EINVAL;
3933
3934 /* Check the number of available mpu_irqs */
3935 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3936 ;
3937
3938 if (irq_idx >= nr_irqs)
3939 return -EINVAL;
3940
3941 if (!oh->mux->irqs) {
3942 /* XXX What frees this? */
3943 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3944 GFP_KERNEL);
3945 if (!oh->mux->irqs)
3946 return -ENOMEM;
3947 }
3948 oh->mux->irqs[pad_idx] = irq_idx;
3949
3950 return 0;
3951}
9ebfd285
KH
3952
3953/**
3954 * omap_hwmod_init - initialize the hwmod code
3955 *
3956 * Sets up some function pointers needed by the hwmod code to operate on the
3957 * currently-booted SoC. Intended to be called once during kernel init
3958 * before any hwmods are registered. No return value.
3959 */
3960void __init omap_hwmod_init(void)
3961{
8f6aa8ee
KH
3962 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3963 soc_ops.wait_target_ready = _omap2_wait_target_ready;
b8249cf2
KH
3964 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3965 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3966 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
05e152c7 3967 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
9ebfd285
KH
3968 soc_ops.enable_module = _omap4_enable_module;
3969 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 3970 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
3971 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3972 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3973 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 3974 soc_ops.init_clkdm = _init_clkdm;
1688bf19
VH
3975 } else if (soc_is_am33xx()) {
3976 soc_ops.enable_module = _am33xx_enable_module;
3977 soc_ops.disable_module = _am33xx_disable_module;
3978 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
3979 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
3980 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3981 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
3982 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
3983 } else {
3984 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
3985 }
3986
3987 inited = true;
3988}
68c9a95e
TL
3989
3990/**
3991 * omap_hwmod_get_main_clk - get pointer to main clock name
3992 * @oh: struct omap_hwmod *
3993 *
3994 * Returns the main clock name assocated with @oh upon success,
3995 * or NULL if @oh is NULL.
3996 */
3997const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3998{
3999 if (!oh)
4000 return NULL;
4001
4002 return oh->main_clk;
4003}