OMAP4: cm: Add two new APIs for modulemode control
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
78183f3f 5 * Copyright (C) 2011 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
63c85238 139
6f8b7ff5 140#include <plat/common.h>
ce491cf8 141#include <plat/cpu.h>
1540f214 142#include "clockdomain.h"
72e06d08 143#include "powerdomain.h"
ce491cf8
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144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
5365efbe 146#include <plat/prcm.h>
63c85238 147
59fb659b 148#include "cm2xxx_3xxx.h"
d0f0631d 149#include "cminst44xx.h"
59fb659b 150#include "prm2xxx_3xxx.h"
d198b514 151#include "prm44xx.h"
eaac329d 152#include "prminst44xx.h"
8d9af88f 153#include "mux.h"
63c85238 154
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155/* Maximum microseconds to wait for OMAP module to softreset */
156#define MAX_MODULE_SOFTRESET_WAIT 10000
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157
158/* Name of the OMAP hwmod for the MPU */
5c2c0296 159#define MPU_INITIATOR_NAME "mpu"
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160
161/* omap_hwmod_list contains all registered struct omap_hwmods */
162static LIST_HEAD(omap_hwmod_list);
163
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164/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
165static struct omap_hwmod *mpu_oh;
166
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167
168/* Private functions */
169
170/**
171 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
172 * @oh: struct omap_hwmod *
173 *
174 * Load the current value of the hwmod OCP_SYSCONFIG register into the
175 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
176 * OCP_SYSCONFIG register or 0 upon success.
177 */
178static int _update_sysc_cache(struct omap_hwmod *oh)
179{
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180 if (!oh->class->sysc) {
181 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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182 return -EINVAL;
183 }
184
185 /* XXX ensure module interface clock is up */
186
cc7a1d2a 187 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 188
43b40992 189 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 190 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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191
192 return 0;
193}
194
195/**
196 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
197 * @v: OCP_SYSCONFIG value to write
198 * @oh: struct omap_hwmod *
199 *
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200 * Write @v into the module class' OCP_SYSCONFIG register, if it has
201 * one. No return value.
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202 */
203static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
204{
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205 if (!oh->class->sysc) {
206 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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207 return;
208 }
209
210 /* XXX ensure module interface clock is up */
211
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212 /* Module might have lost context, always update cache and register */
213 oh->_sysc_cache = v;
214 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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215}
216
217/**
218 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
219 * @oh: struct omap_hwmod *
220 * @standbymode: MIDLEMODE field bits
221 * @v: pointer to register contents to modify
222 *
223 * Update the master standby mode bits in @v to be @standbymode for
224 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
225 * upon error or 0 upon success.
226 */
227static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
228 u32 *v)
229{
358f0e63
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230 u32 mstandby_mask;
231 u8 mstandby_shift;
232
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233 if (!oh->class->sysc ||
234 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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235 return -EINVAL;
236
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237 if (!oh->class->sysc->sysc_fields) {
238 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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239 return -EINVAL;
240 }
241
43b40992 242 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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243 mstandby_mask = (0x3 << mstandby_shift);
244
245 *v &= ~mstandby_mask;
246 *v |= __ffs(standbymode) << mstandby_shift;
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247
248 return 0;
249}
250
251/**
252 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
253 * @oh: struct omap_hwmod *
254 * @idlemode: SIDLEMODE field bits
255 * @v: pointer to register contents to modify
256 *
257 * Update the slave idle mode bits in @v to be @idlemode for the @oh
258 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
259 * or 0 upon success.
260 */
261static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
262{
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263 u32 sidle_mask;
264 u8 sidle_shift;
265
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266 if (!oh->class->sysc ||
267 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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268 return -EINVAL;
269
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270 if (!oh->class->sysc->sysc_fields) {
271 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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272 return -EINVAL;
273 }
274
43b40992 275 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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276 sidle_mask = (0x3 << sidle_shift);
277
278 *v &= ~sidle_mask;
279 *v |= __ffs(idlemode) << sidle_shift;
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280
281 return 0;
282}
283
284/**
285 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
286 * @oh: struct omap_hwmod *
287 * @clockact: CLOCKACTIVITY field bits
288 * @v: pointer to register contents to modify
289 *
290 * Update the clockactivity mode bits in @v to be @clockact for the
291 * @oh hwmod. Used for additional powersaving on some modules. Does
292 * not write to the hardware. Returns -EINVAL upon error or 0 upon
293 * success.
294 */
295static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
296{
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297 u32 clkact_mask;
298 u8 clkact_shift;
299
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300 if (!oh->class->sysc ||
301 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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302 return -EINVAL;
303
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304 if (!oh->class->sysc->sysc_fields) {
305 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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306 return -EINVAL;
307 }
308
43b40992 309 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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310 clkact_mask = (0x3 << clkact_shift);
311
312 *v &= ~clkact_mask;
313 *v |= clockact << clkact_shift;
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314
315 return 0;
316}
317
318/**
319 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
320 * @oh: struct omap_hwmod *
321 * @v: pointer to register contents to modify
322 *
323 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
324 * error or 0 upon success.
325 */
326static int _set_softreset(struct omap_hwmod *oh, u32 *v)
327{
358f0e63
TG
328 u32 softrst_mask;
329
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330 if (!oh->class->sysc ||
331 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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332 return -EINVAL;
333
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334 if (!oh->class->sysc->sysc_fields) {
335 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
336 return -EINVAL;
337 }
338
43b40992 339 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
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340
341 *v |= softrst_mask;
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342
343 return 0;
344}
345
726072e5
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346/**
347 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
348 * @oh: struct omap_hwmod *
349 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
350 * @v: pointer to register contents to modify
351 *
352 * Update the module autoidle bit in @v to be @autoidle for the @oh
353 * hwmod. The autoidle bit controls whether the module can gate
354 * internal clocks automatically when it isn't doing anything; the
355 * exact function of this bit varies on a per-module basis. This
356 * function does not write to the hardware. Returns -EINVAL upon
357 * error or 0 upon success.
358 */
359static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
360 u32 *v)
361{
358f0e63
TG
362 u32 autoidle_mask;
363 u8 autoidle_shift;
364
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365 if (!oh->class->sysc ||
366 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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367 return -EINVAL;
368
43b40992
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369 if (!oh->class->sysc->sysc_fields) {
370 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
371 return -EINVAL;
372 }
373
43b40992 374 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 375 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
376
377 *v &= ~autoidle_mask;
378 *v |= autoidle << autoidle_shift;
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379
380 return 0;
381}
382
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383/**
384 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
385 * @oh: struct omap_hwmod *
386 *
387 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
388 * upon error or 0 upon success.
389 */
5a7ddcbd 390static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 391{
43b40992 392 if (!oh->class->sysc ||
86009eb3 393 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
394 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
395 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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396 return -EINVAL;
397
43b40992
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398 if (!oh->class->sysc->sysc_fields) {
399 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
400 return -EINVAL;
401 }
402
1fe74113
BC
403 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
404 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 405
86009eb3
BC
406 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
407 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
408 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
409 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 410
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411 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
412
413 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
414
415 return 0;
416}
417
418/**
419 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
420 * @oh: struct omap_hwmod *
421 *
422 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
423 * upon error or 0 upon success.
424 */
5a7ddcbd 425static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 426{
43b40992 427 if (!oh->class->sysc ||
86009eb3 428 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
429 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
430 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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431 return -EINVAL;
432
43b40992
PW
433 if (!oh->class->sysc->sysc_fields) {
434 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
435 return -EINVAL;
436 }
437
1fe74113
BC
438 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
439 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 440
86009eb3
BC
441 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
442 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
443 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
444 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 445
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446 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
447
448 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
449
450 return 0;
451}
452
453/**
454 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
455 * @oh: struct omap_hwmod *
456 *
457 * Prevent the hardware module @oh from entering idle while the
458 * hardare module initiator @init_oh is active. Useful when a module
459 * will be accessed by a particular initiator (e.g., if a module will
460 * be accessed by the IVA, there should be a sleepdep between the IVA
461 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
462 * mode. If the clockdomain is marked as not needing autodeps, return
463 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
464 * passes along clkdm_add_sleepdep() value upon success.
63c85238
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465 */
466static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
467{
468 if (!oh->_clk)
469 return -EINVAL;
470
570b54c7
PW
471 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
472 return 0;
473
55ed9694 474 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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475}
476
477/**
478 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
479 * @oh: struct omap_hwmod *
480 *
481 * Allow the hardware module @oh to enter idle while the hardare
482 * module initiator @init_oh is active. Useful when a module will not
483 * be accessed by a particular initiator (e.g., if a module will not
484 * be accessed by the IVA, there should be no sleepdep between the IVA
485 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
486 * mode. If the clockdomain is marked as not needing autodeps, return
487 * 0 without doing anything. Returns -EINVAL upon error or passes
488 * along clkdm_del_sleepdep() value upon success.
63c85238
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489 */
490static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
491{
492 if (!oh->_clk)
493 return -EINVAL;
494
570b54c7
PW
495 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
496 return 0;
497
55ed9694 498 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
499}
500
501/**
502 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
503 * @oh: struct omap_hwmod *
504 *
505 * Called from _init_clocks(). Populates the @oh _clk (main
506 * functional clock pointer) if a main_clk is present. Returns 0 on
507 * success or -EINVAL on error.
508 */
509static int _init_main_clk(struct omap_hwmod *oh)
510{
63c85238
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511 int ret = 0;
512
50ebdac2 513 if (!oh->main_clk)
63c85238
PW
514 return 0;
515
63403384 516 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 517 if (!oh->_clk) {
20383d82
BC
518 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
519 oh->name, oh->main_clk);
63403384 520 return -EINVAL;
dc75925d 521 }
63c85238 522
63403384
BC
523 if (!oh->_clk->clkdm)
524 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
525 oh->main_clk, oh->_clk->name);
81d7c6ff 526
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527 return ret;
528}
529
530/**
887adeac 531 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
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532 * @oh: struct omap_hwmod *
533 *
534 * Called from _init_clocks(). Populates the @oh OCP slave interface
535 * clock pointers. Returns 0 on success or -EINVAL on error.
536 */
537static int _init_interface_clks(struct omap_hwmod *oh)
538{
63c85238
PW
539 struct clk *c;
540 int i;
541 int ret = 0;
542
543 if (oh->slaves_cnt == 0)
544 return 0;
545
682fdc96
BC
546 for (i = 0; i < oh->slaves_cnt; i++) {
547 struct omap_hwmod_ocp_if *os = oh->slaves[i];
548
50ebdac2 549 if (!os->clk)
63c85238
PW
550 continue;
551
50ebdac2 552 c = omap_clk_get_by_name(os->clk);
dc75925d 553 if (!c) {
20383d82
BC
554 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
555 oh->name, os->clk);
63c85238 556 ret = -EINVAL;
dc75925d 557 }
63c85238
PW
558 os->_clk = c;
559 }
560
561 return ret;
562}
563
564/**
565 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
566 * @oh: struct omap_hwmod *
567 *
568 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
569 * clock pointers. Returns 0 on success or -EINVAL on error.
570 */
571static int _init_opt_clks(struct omap_hwmod *oh)
572{
573 struct omap_hwmod_opt_clk *oc;
574 struct clk *c;
575 int i;
576 int ret = 0;
577
578 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 579 c = omap_clk_get_by_name(oc->clk);
dc75925d 580 if (!c) {
20383d82
BC
581 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
582 oh->name, oc->clk);
63c85238 583 ret = -EINVAL;
dc75925d 584 }
63c85238
PW
585 oc->_clk = c;
586 }
587
588 return ret;
589}
590
591/**
592 * _enable_clocks - enable hwmod main clock and interface clocks
593 * @oh: struct omap_hwmod *
594 *
595 * Enables all clocks necessary for register reads and writes to succeed
596 * on the hwmod @oh. Returns 0.
597 */
598static int _enable_clocks(struct omap_hwmod *oh)
599{
63c85238
PW
600 int i;
601
602 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
603
4d3ae5a9 604 if (oh->_clk)
63c85238
PW
605 clk_enable(oh->_clk);
606
607 if (oh->slaves_cnt > 0) {
682fdc96
BC
608 for (i = 0; i < oh->slaves_cnt; i++) {
609 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
610 struct clk *c = os->_clk;
611
4d3ae5a9 612 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
613 clk_enable(c);
614 }
615 }
616
617 /* The opt clocks are controlled by the device driver. */
618
619 return 0;
620}
621
622/**
623 * _disable_clocks - disable hwmod main clock and interface clocks
624 * @oh: struct omap_hwmod *
625 *
626 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
627 */
628static int _disable_clocks(struct omap_hwmod *oh)
629{
63c85238
PW
630 int i;
631
632 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
633
4d3ae5a9 634 if (oh->_clk)
63c85238
PW
635 clk_disable(oh->_clk);
636
637 if (oh->slaves_cnt > 0) {
682fdc96
BC
638 for (i = 0; i < oh->slaves_cnt; i++) {
639 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
640 struct clk *c = os->_clk;
641
4d3ae5a9 642 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
643 clk_disable(c);
644 }
645 }
646
647 /* The opt clocks are controlled by the device driver. */
648
649 return 0;
650}
651
96835af9
BC
652static void _enable_optional_clocks(struct omap_hwmod *oh)
653{
654 struct omap_hwmod_opt_clk *oc;
655 int i;
656
657 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
658
659 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
660 if (oc->_clk) {
661 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
662 oc->_clk->name);
663 clk_enable(oc->_clk);
664 }
665}
666
667static void _disable_optional_clocks(struct omap_hwmod *oh)
668{
669 struct omap_hwmod_opt_clk *oc;
670 int i;
671
672 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
673
674 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
675 if (oc->_clk) {
676 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
677 oc->_clk->name);
678 clk_disable(oc->_clk);
679 }
680}
681
212738a4
PW
682/**
683 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
684 * @oh: struct omap_hwmod *oh
685 *
686 * Count and return the number of MPU IRQs associated with the hwmod
687 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
688 * NULL.
689 */
690static int _count_mpu_irqs(struct omap_hwmod *oh)
691{
692 struct omap_hwmod_irq_info *ohii;
693 int i = 0;
694
695 if (!oh || !oh->mpu_irqs)
696 return 0;
697
698 do {
699 ohii = &oh->mpu_irqs[i++];
700 } while (ohii->irq != -1);
701
702 return i;
703}
704
bc614958
PW
705/**
706 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
707 * @oh: struct omap_hwmod *oh
708 *
709 * Count and return the number of SDMA request lines associated with
710 * the hwmod @oh. Used to allocate struct resource data. Returns 0
711 * if @oh is NULL.
712 */
713static int _count_sdma_reqs(struct omap_hwmod *oh)
714{
715 struct omap_hwmod_dma_info *ohdi;
716 int i = 0;
717
718 if (!oh || !oh->sdma_reqs)
719 return 0;
720
721 do {
722 ohdi = &oh->sdma_reqs[i++];
723 } while (ohdi->dma_req != -1);
724
725 return i;
726}
727
78183f3f
PW
728/**
729 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
730 * @oh: struct omap_hwmod *oh
731 *
732 * Count and return the number of address space ranges associated with
733 * the hwmod @oh. Used to allocate struct resource data. Returns 0
734 * if @oh is NULL.
735 */
736static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
737{
738 struct omap_hwmod_addr_space *mem;
739 int i = 0;
740
741 if (!os || !os->addr)
742 return 0;
743
744 do {
745 mem = &os->addr[i++];
746 } while (mem->pa_start != mem->pa_end);
747
748 return i;
749}
750
63c85238
PW
751/**
752 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
753 * @oh: struct omap_hwmod *
754 *
755 * Returns the array index of the OCP slave port that the MPU
756 * addresses the device on, or -EINVAL upon error or not found.
757 */
01592df9 758static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 759{
63c85238
PW
760 int i;
761 int found = 0;
762
763 if (!oh || oh->slaves_cnt == 0)
764 return -EINVAL;
765
682fdc96
BC
766 for (i = 0; i < oh->slaves_cnt; i++) {
767 struct omap_hwmod_ocp_if *os = oh->slaves[i];
768
63c85238
PW
769 if (os->user & OCP_USER_MPU) {
770 found = 1;
771 break;
772 }
773 }
774
775 if (found)
776 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
777 oh->name, i);
778 else
779 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
780 oh->name);
781
782 return (found) ? i : -EINVAL;
783}
784
785/**
786 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
787 * @oh: struct omap_hwmod *
788 *
789 * Return the virtual address of the base of the register target of
790 * device @oh, or NULL on error.
791 */
01592df9 792static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
793{
794 struct omap_hwmod_ocp_if *os;
795 struct omap_hwmod_addr_space *mem;
78183f3f 796 int i = 0, found = 0;
986a13f5 797 void __iomem *va_start;
63c85238
PW
798
799 if (!oh || oh->slaves_cnt == 0)
800 return NULL;
801
682fdc96 802 os = oh->slaves[index];
63c85238 803
78183f3f
PW
804 if (!os->addr)
805 return NULL;
806
807 do {
808 mem = &os->addr[i++];
809 if (mem->flags & ADDR_TYPE_RT)
63c85238 810 found = 1;
78183f3f 811 } while (!found && mem->pa_start != mem->pa_end);
63c85238 812
986a13f5
TL
813 if (found) {
814 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
815 if (!va_start) {
816 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
817 return NULL;
818 }
63c85238 819 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
820 oh->name, va_start);
821 } else {
63c85238
PW
822 pr_debug("omap_hwmod: %s: no MPU register target found\n",
823 oh->name);
986a13f5 824 }
63c85238 825
986a13f5 826 return (found) ? va_start : NULL;
63c85238
PW
827}
828
829/**
74ff3a68 830 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
831 * @oh: struct omap_hwmod *
832 *
833 * If module is marked as SWSUP_SIDLE, force the module out of slave
834 * idle; otherwise, configure it for smart-idle. If module is marked
835 * as SWSUP_MSUSPEND, force the module out of master standby;
836 * otherwise, configure it for smart-standby. No return value.
837 */
74ff3a68 838static void _enable_sysc(struct omap_hwmod *oh)
63c85238 839{
43b40992 840 u8 idlemode, sf;
63c85238
PW
841 u32 v;
842
43b40992 843 if (!oh->class->sysc)
63c85238
PW
844 return;
845
846 v = oh->_sysc_cache;
43b40992 847 sf = oh->class->sysc->sysc_flags;
63c85238 848
43b40992 849 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
850 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
851 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
852 _set_slave_idlemode(oh, idlemode, &v);
853 }
854
43b40992 855 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
856 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
857 idlemode = HWMOD_IDLEMODE_NO;
858 } else {
859 if (sf & SYSC_HAS_ENAWAKEUP)
860 _enable_wakeup(oh, &v);
861 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
862 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
863 else
864 idlemode = HWMOD_IDLEMODE_SMART;
865 }
63c85238
PW
866 _set_master_standbymode(oh, idlemode, &v);
867 }
868
a16b1f7f
PW
869 /*
870 * XXX The clock framework should handle this, by
871 * calling into this code. But this must wait until the
872 * clock structures are tagged with omap_hwmod entries
873 */
43b40992
PW
874 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
875 (sf & SYSC_HAS_CLOCKACTIVITY))
876 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 877
9980ce53
RN
878 /* If slave is in SMARTIDLE, also enable wakeup */
879 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
880 _enable_wakeup(oh, &v);
881
882 _write_sysconfig(v, oh);
78f26e87
HH
883
884 /*
885 * Set the autoidle bit only after setting the smartidle bit
886 * Setting this will not have any impact on the other modules.
887 */
888 if (sf & SYSC_HAS_AUTOIDLE) {
889 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
890 0 : 1;
891 _set_module_autoidle(oh, idlemode, &v);
892 _write_sysconfig(v, oh);
893 }
63c85238
PW
894}
895
896/**
74ff3a68 897 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
898 * @oh: struct omap_hwmod *
899 *
900 * If module is marked as SWSUP_SIDLE, force the module into slave
901 * idle; otherwise, configure it for smart-idle. If module is marked
902 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
903 * configure it for smart-standby. No return value.
904 */
74ff3a68 905static void _idle_sysc(struct omap_hwmod *oh)
63c85238 906{
43b40992 907 u8 idlemode, sf;
63c85238
PW
908 u32 v;
909
43b40992 910 if (!oh->class->sysc)
63c85238
PW
911 return;
912
913 v = oh->_sysc_cache;
43b40992 914 sf = oh->class->sysc->sysc_flags;
63c85238 915
43b40992 916 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
917 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
918 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
919 _set_slave_idlemode(oh, idlemode, &v);
920 }
921
43b40992 922 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
923 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
924 idlemode = HWMOD_IDLEMODE_FORCE;
925 } else {
926 if (sf & SYSC_HAS_ENAWAKEUP)
927 _enable_wakeup(oh, &v);
928 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
929 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
930 else
931 idlemode = HWMOD_IDLEMODE_SMART;
932 }
63c85238
PW
933 _set_master_standbymode(oh, idlemode, &v);
934 }
935
86009eb3
BC
936 /* If slave is in SMARTIDLE, also enable wakeup */
937 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
938 _enable_wakeup(oh, &v);
939
63c85238
PW
940 _write_sysconfig(v, oh);
941}
942
943/**
74ff3a68 944 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
945 * @oh: struct omap_hwmod *
946 *
947 * Force the module into slave idle and master suspend. No return
948 * value.
949 */
74ff3a68 950static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
951{
952 u32 v;
43b40992 953 u8 sf;
63c85238 954
43b40992 955 if (!oh->class->sysc)
63c85238
PW
956 return;
957
958 v = oh->_sysc_cache;
43b40992 959 sf = oh->class->sysc->sysc_flags;
63c85238 960
43b40992 961 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
962 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
963
43b40992 964 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
965 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
966
43b40992 967 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 968 _set_module_autoidle(oh, 1, &v);
63c85238
PW
969
970 _write_sysconfig(v, oh);
971}
972
973/**
974 * _lookup - find an omap_hwmod by name
975 * @name: find an omap_hwmod by name
976 *
977 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
978 */
979static struct omap_hwmod *_lookup(const char *name)
980{
981 struct omap_hwmod *oh, *temp_oh;
982
983 oh = NULL;
984
985 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
986 if (!strcmp(name, temp_oh->name)) {
987 oh = temp_oh;
988 break;
989 }
990 }
991
992 return oh;
993}
6ae76997
BC
994/**
995 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
996 * @oh: struct omap_hwmod *
997 *
998 * Convert a clockdomain name stored in a struct omap_hwmod into a
999 * clockdomain pointer, and save it into the struct omap_hwmod.
1000 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1001 */
1002static int _init_clkdm(struct omap_hwmod *oh)
1003{
1004 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1005 return 0;
1006
1007 if (!oh->clkdm_name) {
1008 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1009 return -EINVAL;
1010 }
1011
1012 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1013 if (!oh->clkdm) {
1014 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1015 oh->name, oh->clkdm_name);
1016 return -EINVAL;
1017 }
1018
1019 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1020 oh->name, oh->clkdm_name);
1021
1022 return 0;
1023}
63c85238
PW
1024
1025/**
6ae76997
BC
1026 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1027 * well the clockdomain.
63c85238 1028 * @oh: struct omap_hwmod *
97d60162 1029 * @data: not used; pass NULL
63c85238 1030 *
a2debdbd 1031 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1032 * Resolves all clock names embedded in the hwmod. Returns 0 on
1033 * success, or a negative error code on failure.
63c85238 1034 */
97d60162 1035static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1036{
1037 int ret = 0;
1038
48d54f3f
PW
1039 if (oh->_state != _HWMOD_STATE_REGISTERED)
1040 return 0;
63c85238
PW
1041
1042 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1043
1044 ret |= _init_main_clk(oh);
1045 ret |= _init_interface_clks(oh);
1046 ret |= _init_opt_clks(oh);
6ae76997 1047 ret |= _init_clkdm(oh);
63c85238 1048
f5c1f84b
BC
1049 if (!ret)
1050 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1051 else
1052 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1053
09c35f2f 1054 return ret;
63c85238
PW
1055}
1056
1057/**
1058 * _wait_target_ready - wait for a module to leave slave idle
1059 * @oh: struct omap_hwmod *
1060 *
1061 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1062 * does not have an IDLEST bit or if the module successfully leaves
1063 * slave idle; otherwise, pass along the return value of the
d0f0631d 1064 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1065 */
1066static int _wait_target_ready(struct omap_hwmod *oh)
1067{
1068 struct omap_hwmod_ocp_if *os;
1069 int ret;
1070
1071 if (!oh)
1072 return -EINVAL;
1073
1074 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1075 return 0;
1076
682fdc96 1077 os = oh->slaves[oh->_mpu_port_index];
63c85238 1078
33f7ec81 1079 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1080 return 0;
1081
1082 /* XXX check module SIDLEMODE */
1083
1084 /* XXX check clock enable states */
1085
1086 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1087 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1088 oh->prcm.omap2.idlest_reg_id,
1089 oh->prcm.omap2.idlest_idle_bit);
63c85238 1090 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1091 if (!oh->clkdm)
1092 return -EINVAL;
1093
1094 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1095 oh->clkdm->cm_inst,
1096 oh->clkdm->clkdm_offs,
1097 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1098 } else {
1099 BUG();
1100 };
1101
1102 return ret;
1103}
1104
11b10341
BC
1105/**
1106 * _wait_target_disable - wait for a module to be disabled
1107 * @oh: struct omap_hwmod *
1108 *
1109 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1110 * does not have an IDLEST bit or if the module successfully enters
1111 * slave idle; otherwise, pass along the return value of the
1112 * appropriate *_cm*_wait_module_idle() function.
1113 */
1114static int _wait_target_disable(struct omap_hwmod *oh)
1115{
1116 /* TODO: For now just handle OMAP4+ */
1117 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1118 return 0;
1119
1120 if (!oh)
1121 return -EINVAL;
1122
1123 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1124 return 0;
1125
1126 if (oh->flags & HWMOD_NO_IDLEST)
1127 return 0;
1128
1129 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1130 oh->clkdm->cm_inst,
1131 oh->clkdm->clkdm_offs,
1132 oh->prcm.omap4.clkctrl_offs);
1133}
1134
5365efbe 1135/**
cc1226e7 1136 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1137 * @oh: struct omap_hwmod *
1138 * @name: name of the reset line in the context of this hwmod
cc1226e7 1139 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1140 *
1141 * Return the bit position of the reset line that match the
1142 * input name. Return -ENOENT if not found.
1143 */
cc1226e7 1144static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1145 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1146{
1147 int i;
1148
1149 for (i = 0; i < oh->rst_lines_cnt; i++) {
1150 const char *rst_line = oh->rst_lines[i].name;
1151 if (!strcmp(rst_line, name)) {
cc1226e7 1152 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1153 ohri->st_shift = oh->rst_lines[i].st_shift;
1154 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1155 oh->name, __func__, rst_line, ohri->rst_shift,
1156 ohri->st_shift);
5365efbe 1157
cc1226e7 1158 return 0;
5365efbe
BC
1159 }
1160 }
1161
1162 return -ENOENT;
1163}
1164
1165/**
1166 * _assert_hardreset - assert the HW reset line of submodules
1167 * contained in the hwmod module.
1168 * @oh: struct omap_hwmod *
1169 * @name: name of the reset line to lookup and assert
1170 *
1171 * Some IP like dsp, ipu or iva contain processor that require
1172 * an HW reset line to be assert / deassert in order to enable fully
1173 * the IP.
1174 */
1175static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1176{
cc1226e7 1177 struct omap_hwmod_rst_info ohri;
1178 u8 ret;
5365efbe
BC
1179
1180 if (!oh)
1181 return -EINVAL;
1182
cc1226e7 1183 ret = _lookup_hardreset(oh, name, &ohri);
1184 if (IS_ERR_VALUE(ret))
1185 return ret;
5365efbe
BC
1186
1187 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1188 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1189 ohri.rst_shift);
5365efbe 1190 else if (cpu_is_omap44xx())
eaac329d
BC
1191 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1192 oh->clkdm->pwrdm.ptr->prcm_partition,
1193 oh->clkdm->pwrdm.ptr->prcm_offs,
1194 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1195 else
1196 return -EINVAL;
1197}
1198
1199/**
1200 * _deassert_hardreset - deassert the HW reset line of submodules contained
1201 * in the hwmod module.
1202 * @oh: struct omap_hwmod *
1203 * @name: name of the reset line to look up and deassert
1204 *
1205 * Some IP like dsp, ipu or iva contain processor that require
1206 * an HW reset line to be assert / deassert in order to enable fully
1207 * the IP.
1208 */
1209static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1210{
cc1226e7 1211 struct omap_hwmod_rst_info ohri;
1212 int ret;
5365efbe
BC
1213
1214 if (!oh)
1215 return -EINVAL;
1216
cc1226e7 1217 ret = _lookup_hardreset(oh, name, &ohri);
1218 if (IS_ERR_VALUE(ret))
1219 return ret;
5365efbe 1220
cc1226e7 1221 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1222 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1223 ohri.rst_shift,
1224 ohri.st_shift);
1225 } else if (cpu_is_omap44xx()) {
1226 if (ohri.st_shift)
1227 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1228 oh->name, name);
eaac329d
BC
1229 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1230 oh->clkdm->pwrdm.ptr->prcm_partition,
1231 oh->clkdm->pwrdm.ptr->prcm_offs,
1232 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1233 } else {
5365efbe 1234 return -EINVAL;
cc1226e7 1235 }
5365efbe 1236
cc1226e7 1237 if (ret == -EBUSY)
5365efbe
BC
1238 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1239
cc1226e7 1240 return ret;
5365efbe
BC
1241}
1242
1243/**
1244 * _read_hardreset - read the HW reset line state of submodules
1245 * contained in the hwmod module
1246 * @oh: struct omap_hwmod *
1247 * @name: name of the reset line to look up and read
1248 *
1249 * Return the state of the reset line.
1250 */
1251static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1252{
cc1226e7 1253 struct omap_hwmod_rst_info ohri;
1254 u8 ret;
5365efbe
BC
1255
1256 if (!oh)
1257 return -EINVAL;
1258
cc1226e7 1259 ret = _lookup_hardreset(oh, name, &ohri);
1260 if (IS_ERR_VALUE(ret))
1261 return ret;
5365efbe
BC
1262
1263 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1264 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1265 ohri.st_shift);
5365efbe 1266 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1267 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1268 oh->clkdm->pwrdm.ptr->prcm_partition,
1269 oh->clkdm->pwrdm.ptr->prcm_offs,
1270 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1271 } else {
1272 return -EINVAL;
1273 }
1274}
1275
63c85238 1276/**
bd36179e 1277 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1278 * @oh: struct omap_hwmod *
1279 *
1280 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1281 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1282 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1283 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1284 *
1285 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1286 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1287 * use the SYSCONFIG softreset bit to provide the status.
1288 *
bd36179e
PW
1289 * Note that some IP like McBSP do have reset control but don't have
1290 * reset status.
63c85238 1291 */
bd36179e 1292static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1293{
96835af9 1294 u32 v;
6f8b7ff5 1295 int c = 0;
96835af9 1296 int ret = 0;
63c85238 1297
43b40992 1298 if (!oh->class->sysc ||
2cb06814 1299 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1300 return -EINVAL;
1301
1302 /* clocks must be on for this operation */
1303 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1304 pr_warning("omap_hwmod: %s: reset can only be entered from "
1305 "enabled state\n", oh->name);
63c85238
PW
1306 return -EINVAL;
1307 }
1308
96835af9
BC
1309 /* For some modules, all optionnal clocks need to be enabled as well */
1310 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1311 _enable_optional_clocks(oh);
1312
bd36179e 1313 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1314
1315 v = oh->_sysc_cache;
96835af9
BC
1316 ret = _set_softreset(oh, &v);
1317 if (ret)
1318 goto dis_opt_clks;
63c85238
PW
1319 _write_sysconfig(v, oh);
1320
2cb06814 1321 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1322 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1323 oh->class->sysc->syss_offs)
1324 & SYSS_RESETDONE_MASK),
1325 MAX_MODULE_SOFTRESET_WAIT, c);
1326 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1327 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1328 oh->class->sysc->sysc_offs)
1329 & SYSC_TYPE2_SOFTRESET_MASK),
1330 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1331
5365efbe 1332 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1333 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1334 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1335 else
5365efbe 1336 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1337
1338 /*
1339 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1340 * _wait_target_ready() or _reset()
1341 */
1342
96835af9
BC
1343 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1344
1345dis_opt_clks:
1346 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1347 _disable_optional_clocks(oh);
1348
1349 return ret;
63c85238
PW
1350}
1351
bd36179e
PW
1352/**
1353 * _reset - reset an omap_hwmod
1354 * @oh: struct omap_hwmod *
1355 *
1356 * Resets an omap_hwmod @oh. The default software reset mechanism for
1357 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1358 * bit. However, some hwmods cannot be reset via this method: some
1359 * are not targets and therefore have no OCP header registers to
1360 * access; others (like the IVA) have idiosyncratic reset sequences.
1361 * So for these relatively rare cases, custom reset code can be
1362 * supplied in the struct omap_hwmod_class .reset function pointer.
1363 * Passes along the return value from either _reset() or the custom
1364 * reset function - these must return -EINVAL if the hwmod cannot be
1365 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1366 * the module did not reset in time, or 0 upon success.
1367 */
1368static int _reset(struct omap_hwmod *oh)
1369{
1370 int ret;
1371
1372 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1373
1374 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1375
1376 return ret;
1377}
1378
63c85238 1379/**
dc6d1cda 1380 * _enable - enable an omap_hwmod
63c85238
PW
1381 * @oh: struct omap_hwmod *
1382 *
1383 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1384 * register target. Returns -EINVAL if the hwmod is in the wrong
1385 * state or passes along the return value of _wait_target_ready().
63c85238 1386 */
dc6d1cda 1387static int _enable(struct omap_hwmod *oh)
63c85238
PW
1388{
1389 int r;
1390
34617e2a
BC
1391 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1392
63c85238
PW
1393 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1394 oh->_state != _HWMOD_STATE_IDLE &&
1395 oh->_state != _HWMOD_STATE_DISABLED) {
1396 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1397 "from initialized, idle, or disabled state\n", oh->name);
1398 return -EINVAL;
1399 }
1400
8d9af88f 1401 /* Mux pins for device runtime if populated */
029268e4
TL
1402 if (oh->mux && (!oh->mux->enabled ||
1403 ((oh->_state == _HWMOD_STATE_IDLE) &&
1404 oh->mux->pads_dynamic)))
8d9af88f 1405 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1406
1407 _add_initiator_dep(oh, mpu_oh);
1408 _enable_clocks(oh);
1409
31f62866
BC
1410 /*
1411 * If an IP contains only one HW reset line, then de-assert it in order
1412 * to allow the module state transition. Otherwise the PRCM will return
1413 * Intransition status, and the init will failed.
1414 */
1415 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1416 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1417 _deassert_hardreset(oh, oh->rst_lines[0].name);
63c85238 1418
63c85238 1419 r = _wait_target_ready(oh);
34617e2a 1420 if (r) {
9a23dfe1
BC
1421 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1422 oh->name, r);
34617e2a
BC
1423 _disable_clocks(oh);
1424
1425 return r;
1426 }
1427
1428 oh->_state = _HWMOD_STATE_ENABLED;
1429
1430 /* Access the sysconfig only if the target is ready */
1431 if (oh->class->sysc) {
1432 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1433 _update_sysc_cache(oh);
1434 _enable_sysc(oh);
9a23dfe1
BC
1435 }
1436
63c85238
PW
1437 return r;
1438}
1439
1440/**
dc6d1cda 1441 * _idle - idle an omap_hwmod
63c85238
PW
1442 * @oh: struct omap_hwmod *
1443 *
1444 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1445 * no further work. Returns -EINVAL if the hwmod is in the wrong
1446 * state or returns 0.
63c85238 1447 */
dc6d1cda 1448static int _idle(struct omap_hwmod *oh)
63c85238 1449{
11b10341
BC
1450 int ret;
1451
34617e2a
BC
1452 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1453
63c85238
PW
1454 if (oh->_state != _HWMOD_STATE_ENABLED) {
1455 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1456 "enabled state\n", oh->name);
1457 return -EINVAL;
1458 }
1459
43b40992 1460 if (oh->class->sysc)
74ff3a68 1461 _idle_sysc(oh);
63c85238
PW
1462 _del_initiator_dep(oh, mpu_oh);
1463 _disable_clocks(oh);
11b10341
BC
1464 ret = _wait_target_disable(oh);
1465 if (ret)
1466 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1467 oh->name);
63c85238 1468
8d9af88f 1469 /* Mux pins for device idle if populated */
029268e4 1470 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1471 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1472
63c85238
PW
1473 oh->_state = _HWMOD_STATE_IDLE;
1474
1475 return 0;
1476}
1477
9599217a
KVA
1478/**
1479 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1480 * @oh: struct omap_hwmod *
1481 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1482 *
1483 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1484 * local copy. Intended to be used by drivers that require
1485 * direct manipulation of the AUTOIDLE bits.
1486 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1487 * along the return value from _set_module_autoidle().
1488 *
1489 * Any users of this function should be scrutinized carefully.
1490 */
1491int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1492{
1493 u32 v;
1494 int retval = 0;
1495 unsigned long flags;
1496
1497 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1498 return -EINVAL;
1499
1500 spin_lock_irqsave(&oh->_lock, flags);
1501
1502 v = oh->_sysc_cache;
1503
1504 retval = _set_module_autoidle(oh, autoidle, &v);
1505
1506 if (!retval)
1507 _write_sysconfig(v, oh);
1508
1509 spin_unlock_irqrestore(&oh->_lock, flags);
1510
1511 return retval;
1512}
1513
63c85238
PW
1514/**
1515 * _shutdown - shutdown an omap_hwmod
1516 * @oh: struct omap_hwmod *
1517 *
1518 * Shut down an omap_hwmod @oh. This should be called when the driver
1519 * used for the hwmod is removed or unloaded or if the driver is not
1520 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1521 * state or returns 0.
1522 */
1523static int _shutdown(struct omap_hwmod *oh)
1524{
e4dc8f50
PW
1525 int ret;
1526 u8 prev_state;
1527
63c85238
PW
1528 if (oh->_state != _HWMOD_STATE_IDLE &&
1529 oh->_state != _HWMOD_STATE_ENABLED) {
1530 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1531 "from idle, or enabled state\n", oh->name);
1532 return -EINVAL;
1533 }
1534
1535 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1536
e4dc8f50
PW
1537 if (oh->class->pre_shutdown) {
1538 prev_state = oh->_state;
1539 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1540 _enable(oh);
e4dc8f50
PW
1541 ret = oh->class->pre_shutdown(oh);
1542 if (ret) {
1543 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1544 _idle(oh);
e4dc8f50
PW
1545 return ret;
1546 }
1547 }
1548
6481c73c
MV
1549 if (oh->class->sysc) {
1550 if (oh->_state == _HWMOD_STATE_IDLE)
1551 _enable(oh);
74ff3a68 1552 _shutdown_sysc(oh);
6481c73c 1553 }
5365efbe 1554
3827f949
BC
1555 /* clocks and deps are already disabled in idle */
1556 if (oh->_state == _HWMOD_STATE_ENABLED) {
1557 _del_initiator_dep(oh, mpu_oh);
1558 /* XXX what about the other system initiators here? dma, dsp */
1559 _disable_clocks(oh);
11b10341
BC
1560 ret = _wait_target_disable(oh);
1561 if (ret)
1562 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1563 oh->name);
3827f949 1564 }
63c85238
PW
1565 /* XXX Should this code also force-disable the optional clocks? */
1566
31f62866
BC
1567 /*
1568 * If an IP contains only one HW reset line, then assert it
1569 * after disabling the clocks and before shutting down the IP.
1570 */
1571 if (oh->rst_lines_cnt == 1)
1572 _assert_hardreset(oh, oh->rst_lines[0].name);
1573
8d9af88f
TL
1574 /* Mux pins to safe mode or use populated off mode values */
1575 if (oh->mux)
1576 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1577
1578 oh->_state = _HWMOD_STATE_DISABLED;
1579
1580 return 0;
1581}
1582
63c85238
PW
1583/**
1584 * _setup - do initial configuration of omap_hwmod
1585 * @oh: struct omap_hwmod *
1586 *
1587 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1588 * OCP_SYSCONFIG register. Returns 0.
63c85238 1589 */
97d60162 1590static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1591{
9a23dfe1 1592 int i, r;
2092e5cc 1593 u8 postsetup_state;
97d60162 1594
48d54f3f
PW
1595 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1596 return 0;
1597
63c85238
PW
1598 /* Set iclk autoidle mode */
1599 if (oh->slaves_cnt > 0) {
682fdc96
BC
1600 for (i = 0; i < oh->slaves_cnt; i++) {
1601 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1602 struct clk *c = os->_clk;
1603
4d3ae5a9 1604 if (!c)
63c85238
PW
1605 continue;
1606
1607 if (os->flags & OCPIF_SWSUP_IDLE) {
1608 /* XXX omap_iclk_deny_idle(c); */
1609 } else {
1610 /* XXX omap_iclk_allow_idle(c); */
1611 clk_enable(c);
1612 }
1613 }
1614 }
1615
1616 oh->_state = _HWMOD_STATE_INITIALIZED;
1617
5365efbe
BC
1618 /*
1619 * In the case of hwmod with hardreset that should not be
1620 * de-assert at boot time, we have to keep the module
1621 * initialized, because we cannot enable it properly with the
1622 * reset asserted. Exit without warning because that behavior is
1623 * expected.
1624 */
1625 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1626 return 0;
1627
dc6d1cda 1628 r = _enable(oh);
9a23dfe1
BC
1629 if (r) {
1630 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1631 oh->name, oh->_state);
1632 return 0;
1633 }
63c85238 1634
b835d014 1635 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1636 _reset(oh);
1637
b835d014 1638 /*
76e5589e 1639 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1640 * The _enable() function should be split to
76e5589e 1641 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1642 */
43b40992 1643 if (oh->class->sysc) {
b835d014 1644 _update_sysc_cache(oh);
74ff3a68 1645 _enable_sysc(oh);
b835d014
PW
1646 }
1647 }
63c85238 1648
2092e5cc
PW
1649 postsetup_state = oh->_postsetup_state;
1650 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1651 postsetup_state = _HWMOD_STATE_ENABLED;
1652
1653 /*
1654 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1655 * it should be set by the core code as a runtime flag during startup
1656 */
1657 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1658 (postsetup_state == _HWMOD_STATE_IDLE))
1659 postsetup_state = _HWMOD_STATE_ENABLED;
1660
1661 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1662 _idle(oh);
2092e5cc
PW
1663 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1664 _shutdown(oh);
1665 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1666 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1667 oh->name, postsetup_state);
63c85238
PW
1668
1669 return 0;
1670}
1671
63c85238 1672/**
0102b627 1673 * _register - register a struct omap_hwmod
63c85238
PW
1674 * @oh: struct omap_hwmod *
1675 *
43b40992
PW
1676 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1677 * already has been registered by the same name; -EINVAL if the
1678 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1679 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1680 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1681 * success.
63c85238
PW
1682 *
1683 * XXX The data should be copied into bootmem, so the original data
1684 * should be marked __initdata and freed after init. This would allow
1685 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1686 * that the copy process would be relatively complex due to the large number
1687 * of substructures.
1688 */
01592df9 1689static int __init _register(struct omap_hwmod *oh)
63c85238 1690{
569edd70 1691 int ms_id;
63c85238 1692
43b40992
PW
1693 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1694 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1695 return -EINVAL;
1696
63c85238
PW
1697 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1698
ce35b244
BC
1699 if (_lookup(oh->name))
1700 return -EEXIST;
63c85238
PW
1701
1702 ms_id = _find_mpu_port_index(oh);
e7c7d760 1703 if (!IS_ERR_VALUE(ms_id))
63c85238 1704 oh->_mpu_port_index = ms_id;
e7c7d760 1705 else
63c85238 1706 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1707
1708 list_add_tail(&oh->node, &omap_hwmod_list);
1709
dc6d1cda 1710 spin_lock_init(&oh->_lock);
2092e5cc 1711
63c85238
PW
1712 oh->_state = _HWMOD_STATE_REGISTERED;
1713
569edd70
PW
1714 /*
1715 * XXX Rather than doing a strcmp(), this should test a flag
1716 * set in the hwmod data, inserted by the autogenerator code.
1717 */
1718 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1719 mpu_oh = oh;
63c85238 1720
569edd70 1721 return 0;
63c85238
PW
1722}
1723
0102b627
BC
1724
1725/* Public functions */
1726
1727u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1728{
1729 if (oh->flags & HWMOD_16BIT_REG)
1730 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1731 else
1732 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1733}
1734
1735void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1736{
1737 if (oh->flags & HWMOD_16BIT_REG)
1738 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1739 else
1740 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1741}
1742
6d3c55fd
A
1743/**
1744 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1745 * @oh: struct omap_hwmod *
1746 *
1747 * This is a public function exposed to drivers. Some drivers may need to do
1748 * some settings before and after resetting the device. Those drivers after
1749 * doing the necessary settings could use this function to start a reset by
1750 * setting the SYSCONFIG.SOFTRESET bit.
1751 */
1752int omap_hwmod_softreset(struct omap_hwmod *oh)
1753{
1754 u32 v;
1755 int ret;
1756
1757 if (!oh || !(oh->_sysc_cache))
1758 return -EINVAL;
1759
1760 v = oh->_sysc_cache;
1761 ret = _set_softreset(oh, &v);
1762 if (ret)
1763 goto error;
1764 _write_sysconfig(v, oh);
1765
1766error:
1767 return ret;
1768}
1769
0102b627
BC
1770/**
1771 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1772 * @oh: struct omap_hwmod *
1773 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1774 *
1775 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1776 * local copy. Intended to be used by drivers that have some erratum
1777 * that requires direct manipulation of the SIDLEMODE bits. Returns
1778 * -EINVAL if @oh is null, or passes along the return value from
1779 * _set_slave_idlemode().
1780 *
1781 * XXX Does this function have any current users? If not, we should
1782 * remove it; it is better to let the rest of the hwmod code handle this.
1783 * Any users of this function should be scrutinized carefully.
1784 */
1785int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1786{
1787 u32 v;
1788 int retval = 0;
1789
1790 if (!oh)
1791 return -EINVAL;
1792
1793 v = oh->_sysc_cache;
1794
1795 retval = _set_slave_idlemode(oh, idlemode, &v);
1796 if (!retval)
1797 _write_sysconfig(v, oh);
1798
1799 return retval;
1800}
1801
63c85238
PW
1802/**
1803 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1804 * @name: name of the omap_hwmod to look up
1805 *
1806 * Given a @name of an omap_hwmod, return a pointer to the registered
1807 * struct omap_hwmod *, or NULL upon error.
1808 */
1809struct omap_hwmod *omap_hwmod_lookup(const char *name)
1810{
1811 struct omap_hwmod *oh;
1812
1813 if (!name)
1814 return NULL;
1815
63c85238 1816 oh = _lookup(name);
63c85238
PW
1817
1818 return oh;
1819}
1820
1821/**
1822 * omap_hwmod_for_each - call function for each registered omap_hwmod
1823 * @fn: pointer to a callback function
97d60162 1824 * @data: void * data to pass to callback function
63c85238
PW
1825 *
1826 * Call @fn for each registered omap_hwmod, passing @data to each
1827 * function. @fn must return 0 for success or any other value for
1828 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1829 * will stop and the non-zero return value will be passed to the
1830 * caller of omap_hwmod_for_each(). @fn is called with
1831 * omap_hwmod_for_each() held.
1832 */
97d60162
PW
1833int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1834 void *data)
63c85238
PW
1835{
1836 struct omap_hwmod *temp_oh;
30ebad9d 1837 int ret = 0;
63c85238
PW
1838
1839 if (!fn)
1840 return -EINVAL;
1841
63c85238 1842 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1843 ret = (*fn)(temp_oh, data);
63c85238
PW
1844 if (ret)
1845 break;
1846 }
63c85238
PW
1847
1848 return ret;
1849}
1850
63c85238 1851/**
550c8092 1852 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1853 * @ohs: pointer to an array of omap_hwmods to register
1854 *
1855 * Intended to be called early in boot before the clock framework is
1856 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1857 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1858 */
550c8092 1859int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1860{
bac1a0f0 1861 int r, i;
63c85238
PW
1862
1863 if (!ohs)
1864 return 0;
1865
bac1a0f0
PW
1866 i = 0;
1867 do {
1868 if (!omap_chip_is(ohs[i]->omap_chip))
1869 continue;
1870
1871 r = _register(ohs[i]);
1872 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1873 r);
1874 } while (ohs[++i]);
63c85238
PW
1875
1876 return 0;
1877}
1878
e7c7d760
TL
1879/*
1880 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1881 *
a2debdbd 1882 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1883 * Assumes the caller takes care of locking if needed.
63c85238 1884 */
e7c7d760
TL
1885static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1886{
48d54f3f
PW
1887 if (oh->_state != _HWMOD_STATE_REGISTERED)
1888 return 0;
1889
e7c7d760
TL
1890 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1891 return 0;
1892
1893 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
e7c7d760
TL
1894
1895 return 0;
1896}
1897
63c85238 1898/**
a2debdbd
PW
1899 * omap_hwmod_setup_one - set up a single hwmod
1900 * @oh_name: const char * name of the already-registered hwmod to set up
1901 *
1902 * Must be called after omap2_clk_init(). Resolves the struct clk
1903 * names to struct clk pointers for each registered omap_hwmod. Also
1904 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1905 * success.
1906 */
1907int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1908{
1909 struct omap_hwmod *oh;
1910 int r;
1911
a2debdbd
PW
1912 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1913
1914 if (!mpu_oh) {
1915 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1916 oh_name, MPU_INITIATOR_NAME);
63c85238 1917 return -EINVAL;
a2debdbd 1918 }
63c85238 1919
a2debdbd
PW
1920 oh = _lookup(oh_name);
1921 if (!oh) {
1922 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1923 return -EINVAL;
1924 }
63c85238 1925
a2debdbd
PW
1926 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1927 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1928
a2debdbd
PW
1929 r = _populate_mpu_rt_base(oh, NULL);
1930 if (IS_ERR_VALUE(r)) {
1931 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1932 return -EINVAL;
1933 }
1934
1935 r = _init_clocks(oh, NULL);
1936 if (IS_ERR_VALUE(r)) {
1937 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1938 return -EINVAL;
63c85238
PW
1939 }
1940
a2debdbd
PW
1941 _setup(oh, NULL);
1942
63c85238
PW
1943 return 0;
1944}
1945
1946/**
550c8092 1947 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
1948 *
1949 * Must be called after omap2_clk_init(). Resolves the struct clk names
1950 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 1951 * _setup() on each hwmod. Returns 0 upon success.
63c85238 1952 */
550c8092 1953static int __init omap_hwmod_setup_all(void)
63c85238
PW
1954{
1955 int r;
1956
569edd70
PW
1957 if (!mpu_oh) {
1958 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1959 __func__, MPU_INITIATOR_NAME);
1960 return -EINVAL;
1961 }
1962
e7c7d760 1963 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 1964
97d60162 1965 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
1966 WARN(IS_ERR_VALUE(r),
1967 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 1968
2092e5cc 1969 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1970
1971 return 0;
1972}
550c8092 1973core_initcall(omap_hwmod_setup_all);
63c85238 1974
63c85238
PW
1975/**
1976 * omap_hwmod_enable - enable an omap_hwmod
1977 * @oh: struct omap_hwmod *
1978 *
74ff3a68 1979 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1980 * Returns -EINVAL on error or passes along the return value from _enable().
1981 */
1982int omap_hwmod_enable(struct omap_hwmod *oh)
1983{
1984 int r;
dc6d1cda 1985 unsigned long flags;
63c85238
PW
1986
1987 if (!oh)
1988 return -EINVAL;
1989
dc6d1cda
PW
1990 spin_lock_irqsave(&oh->_lock, flags);
1991 r = _enable(oh);
1992 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1993
1994 return r;
1995}
1996
1997/**
1998 * omap_hwmod_idle - idle an omap_hwmod
1999 * @oh: struct omap_hwmod *
2000 *
74ff3a68 2001 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2002 * Returns -EINVAL on error or passes along the return value from _idle().
2003 */
2004int omap_hwmod_idle(struct omap_hwmod *oh)
2005{
dc6d1cda
PW
2006 unsigned long flags;
2007
63c85238
PW
2008 if (!oh)
2009 return -EINVAL;
2010
dc6d1cda
PW
2011 spin_lock_irqsave(&oh->_lock, flags);
2012 _idle(oh);
2013 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2014
2015 return 0;
2016}
2017
2018/**
2019 * omap_hwmod_shutdown - shutdown an omap_hwmod
2020 * @oh: struct omap_hwmod *
2021 *
74ff3a68 2022 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2023 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2024 * the return value from _shutdown().
2025 */
2026int omap_hwmod_shutdown(struct omap_hwmod *oh)
2027{
dc6d1cda
PW
2028 unsigned long flags;
2029
63c85238
PW
2030 if (!oh)
2031 return -EINVAL;
2032
dc6d1cda 2033 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2034 _shutdown(oh);
dc6d1cda 2035 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2036
2037 return 0;
2038}
2039
2040/**
2041 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2042 * @oh: struct omap_hwmod *oh
2043 *
2044 * Intended to be called by the omap_device code.
2045 */
2046int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2047{
dc6d1cda
PW
2048 unsigned long flags;
2049
2050 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2051 _enable_clocks(oh);
dc6d1cda 2052 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2053
2054 return 0;
2055}
2056
2057/**
2058 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2059 * @oh: struct omap_hwmod *oh
2060 *
2061 * Intended to be called by the omap_device code.
2062 */
2063int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2064{
dc6d1cda
PW
2065 unsigned long flags;
2066
2067 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2068 _disable_clocks(oh);
dc6d1cda 2069 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2070
2071 return 0;
2072}
2073
2074/**
2075 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2076 * @oh: struct omap_hwmod *oh
2077 *
2078 * Intended to be called by drivers and core code when all posted
2079 * writes to a device must complete before continuing further
2080 * execution (for example, after clearing some device IRQSTATUS
2081 * register bits)
2082 *
2083 * XXX what about targets with multiple OCP threads?
2084 */
2085void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2086{
2087 BUG_ON(!oh);
2088
43b40992 2089 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
2090 WARN(1, "omap_device: %s: OCP barrier impossible due to "
2091 "device configuration\n", oh->name);
2092 return;
2093 }
2094
2095 /*
2096 * Forces posted writes to complete on the OCP thread handling
2097 * register writes
2098 */
cc7a1d2a 2099 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2100}
2101
2102/**
2103 * omap_hwmod_reset - reset the hwmod
2104 * @oh: struct omap_hwmod *
2105 *
2106 * Under some conditions, a driver may wish to reset the entire device.
2107 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2108 * the return value from _reset().
63c85238
PW
2109 */
2110int omap_hwmod_reset(struct omap_hwmod *oh)
2111{
2112 int r;
dc6d1cda 2113 unsigned long flags;
63c85238 2114
9b579114 2115 if (!oh)
63c85238
PW
2116 return -EINVAL;
2117
dc6d1cda 2118 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2119 r = _reset(oh);
dc6d1cda 2120 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2121
2122 return r;
2123}
2124
2125/**
2126 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2127 * @oh: struct omap_hwmod *
2128 * @res: pointer to the first element of an array of struct resource to fill
2129 *
2130 * Count the number of struct resource array elements necessary to
2131 * contain omap_hwmod @oh resources. Intended to be called by code
2132 * that registers omap_devices. Intended to be used to determine the
2133 * size of a dynamically-allocated struct resource array, before
2134 * calling omap_hwmod_fill_resources(). Returns the number of struct
2135 * resource array elements needed.
2136 *
2137 * XXX This code is not optimized. It could attempt to merge adjacent
2138 * resource IDs.
2139 *
2140 */
2141int omap_hwmod_count_resources(struct omap_hwmod *oh)
2142{
2143 int ret, i;
2144
bc614958 2145 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238
PW
2146
2147 for (i = 0; i < oh->slaves_cnt; i++)
78183f3f 2148 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
63c85238
PW
2149
2150 return ret;
2151}
2152
2153/**
2154 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2155 * @oh: struct omap_hwmod *
2156 * @res: pointer to the first element of an array of struct resource to fill
2157 *
2158 * Fill the struct resource array @res with resource data from the
2159 * omap_hwmod @oh. Intended to be called by code that registers
2160 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2161 * number of array elements filled.
2162 */
2163int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2164{
bc614958 2165 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
63c85238
PW
2166 int r = 0;
2167
2168 /* For each IRQ, DMA, memory area, fill in array.*/
2169
212738a4
PW
2170 mpu_irqs_cnt = _count_mpu_irqs(oh);
2171 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2172 (res + r)->name = (oh->mpu_irqs + i)->name;
2173 (res + r)->start = (oh->mpu_irqs + i)->irq;
2174 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2175 (res + r)->flags = IORESOURCE_IRQ;
2176 r++;
2177 }
2178
bc614958
PW
2179 sdma_reqs_cnt = _count_sdma_reqs(oh);
2180 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2181 (res + r)->name = (oh->sdma_reqs + i)->name;
2182 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2183 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2184 (res + r)->flags = IORESOURCE_DMA;
2185 r++;
2186 }
2187
2188 for (i = 0; i < oh->slaves_cnt; i++) {
2189 struct omap_hwmod_ocp_if *os;
78183f3f 2190 int addr_cnt;
63c85238 2191
682fdc96 2192 os = oh->slaves[i];
78183f3f 2193 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2194
78183f3f 2195 for (j = 0; j < addr_cnt; j++) {
cd503802 2196 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2197 (res + r)->start = (os->addr + j)->pa_start;
2198 (res + r)->end = (os->addr + j)->pa_end;
2199 (res + r)->flags = IORESOURCE_MEM;
2200 r++;
2201 }
2202 }
2203
2204 return r;
2205}
2206
2207/**
2208 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2209 * @oh: struct omap_hwmod *
2210 *
2211 * Return the powerdomain pointer associated with the OMAP module
2212 * @oh's main clock. If @oh does not have a main clk, return the
2213 * powerdomain associated with the interface clock associated with the
2214 * module's MPU port. (XXX Perhaps this should use the SDMA port
2215 * instead?) Returns NULL on error, or a struct powerdomain * on
2216 * success.
2217 */
2218struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2219{
2220 struct clk *c;
2221
2222 if (!oh)
2223 return NULL;
2224
2225 if (oh->_clk) {
2226 c = oh->_clk;
2227 } else {
2228 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2229 return NULL;
2230 c = oh->slaves[oh->_mpu_port_index]->_clk;
2231 }
2232
d5647c18
TG
2233 if (!c->clkdm)
2234 return NULL;
2235
63c85238
PW
2236 return c->clkdm->pwrdm.ptr;
2237
2238}
2239
db2a60bf
PW
2240/**
2241 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2242 * @oh: struct omap_hwmod *
2243 *
2244 * Returns the virtual address corresponding to the beginning of the
2245 * module's register target, in the address range that is intended to
2246 * be used by the MPU. Returns the virtual address upon success or NULL
2247 * upon error.
2248 */
2249void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2250{
2251 if (!oh)
2252 return NULL;
2253
2254 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2255 return NULL;
2256
2257 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2258 return NULL;
2259
2260 return oh->_mpu_rt_va;
2261}
2262
63c85238
PW
2263/**
2264 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2265 * @oh: struct omap_hwmod *
2266 * @init_oh: struct omap_hwmod * (initiator)
2267 *
2268 * Add a sleep dependency between the initiator @init_oh and @oh.
2269 * Intended to be called by DSP/Bridge code via platform_data for the
2270 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2271 * code needs to add/del initiator dependencies dynamically
2272 * before/after accessing a device. Returns the return value from
2273 * _add_initiator_dep().
2274 *
2275 * XXX Keep a usecount in the clockdomain code
2276 */
2277int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2278 struct omap_hwmod *init_oh)
2279{
2280 return _add_initiator_dep(oh, init_oh);
2281}
2282
2283/*
2284 * XXX what about functions for drivers to save/restore ocp_sysconfig
2285 * for context save/restore operations?
2286 */
2287
2288/**
2289 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2290 * @oh: struct omap_hwmod *
2291 * @init_oh: struct omap_hwmod * (initiator)
2292 *
2293 * Remove a sleep dependency between the initiator @init_oh and @oh.
2294 * Intended to be called by DSP/Bridge code via platform_data for the
2295 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2296 * code needs to add/del initiator dependencies dynamically
2297 * before/after accessing a device. Returns the return value from
2298 * _del_initiator_dep().
2299 *
2300 * XXX Keep a usecount in the clockdomain code
2301 */
2302int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2303 struct omap_hwmod *init_oh)
2304{
2305 return _del_initiator_dep(oh, init_oh);
2306}
2307
63c85238
PW
2308/**
2309 * omap_hwmod_enable_wakeup - allow device to wake up the system
2310 * @oh: struct omap_hwmod *
2311 *
2312 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2313 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2314 * registers to cause the PRCM to receive wakeup events from the
2315 * module. Does not set any wakeup routing registers beyond this
2316 * point - if the module is to wake up any other module or subsystem,
2317 * that must be set separately. Called by omap_device code. Returns
2318 * -EINVAL on error or 0 upon success.
2319 */
2320int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2321{
dc6d1cda 2322 unsigned long flags;
5a7ddcbd 2323 u32 v;
dc6d1cda 2324
43b40992
PW
2325 if (!oh->class->sysc ||
2326 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2327 return -EINVAL;
2328
dc6d1cda 2329 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2330 v = oh->_sysc_cache;
2331 _enable_wakeup(oh, &v);
2332 _write_sysconfig(v, oh);
dc6d1cda 2333 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2334
2335 return 0;
2336}
2337
2338/**
2339 * omap_hwmod_disable_wakeup - prevent device from waking the system
2340 * @oh: struct omap_hwmod *
2341 *
2342 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2343 * from sending wakeups to the PRCM. Eventually this should clear
2344 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2345 * from the module. Does not set any wakeup routing registers beyond
2346 * this point - if the module is to wake up any other module or
2347 * subsystem, that must be set separately. Called by omap_device
2348 * code. Returns -EINVAL on error or 0 upon success.
2349 */
2350int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2351{
dc6d1cda 2352 unsigned long flags;
5a7ddcbd 2353 u32 v;
dc6d1cda 2354
43b40992
PW
2355 if (!oh->class->sysc ||
2356 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2357 return -EINVAL;
2358
dc6d1cda 2359 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2360 v = oh->_sysc_cache;
2361 _disable_wakeup(oh, &v);
2362 _write_sysconfig(v, oh);
dc6d1cda 2363 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2364
2365 return 0;
2366}
43b40992 2367
aee48e3c
PW
2368/**
2369 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2370 * contained in the hwmod module.
2371 * @oh: struct omap_hwmod *
2372 * @name: name of the reset line to lookup and assert
2373 *
2374 * Some IP like dsp, ipu or iva contain processor that require
2375 * an HW reset line to be assert / deassert in order to enable fully
2376 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2377 * yet supported on this OMAP; otherwise, passes along the return value
2378 * from _assert_hardreset().
2379 */
2380int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2381{
2382 int ret;
dc6d1cda 2383 unsigned long flags;
aee48e3c
PW
2384
2385 if (!oh)
2386 return -EINVAL;
2387
dc6d1cda 2388 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2389 ret = _assert_hardreset(oh, name);
dc6d1cda 2390 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2391
2392 return ret;
2393}
2394
2395/**
2396 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2397 * contained in the hwmod module.
2398 * @oh: struct omap_hwmod *
2399 * @name: name of the reset line to look up and deassert
2400 *
2401 * Some IP like dsp, ipu or iva contain processor that require
2402 * an HW reset line to be assert / deassert in order to enable fully
2403 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2404 * yet supported on this OMAP; otherwise, passes along the return value
2405 * from _deassert_hardreset().
2406 */
2407int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2408{
2409 int ret;
dc6d1cda 2410 unsigned long flags;
aee48e3c
PW
2411
2412 if (!oh)
2413 return -EINVAL;
2414
dc6d1cda 2415 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2416 ret = _deassert_hardreset(oh, name);
dc6d1cda 2417 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2418
2419 return ret;
2420}
2421
2422/**
2423 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2424 * contained in the hwmod module
2425 * @oh: struct omap_hwmod *
2426 * @name: name of the reset line to look up and read
2427 *
2428 * Return the current state of the hwmod @oh's reset line named @name:
2429 * returns -EINVAL upon parameter error or if this operation
2430 * is unsupported on the current OMAP; otherwise, passes along the return
2431 * value from _read_hardreset().
2432 */
2433int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2434{
2435 int ret;
dc6d1cda 2436 unsigned long flags;
aee48e3c
PW
2437
2438 if (!oh)
2439 return -EINVAL;
2440
dc6d1cda 2441 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2442 ret = _read_hardreset(oh, name);
dc6d1cda 2443 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2444
2445 return ret;
2446}
2447
2448
43b40992
PW
2449/**
2450 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2451 * @classname: struct omap_hwmod_class name to search for
2452 * @fn: callback function pointer to call for each hwmod in class @classname
2453 * @user: arbitrary context data to pass to the callback function
2454 *
ce35b244
BC
2455 * For each omap_hwmod of class @classname, call @fn.
2456 * If the callback function returns something other than
43b40992
PW
2457 * zero, the iterator is terminated, and the callback function's return
2458 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2459 * if @classname or @fn are NULL, or passes back the error code from @fn.
2460 */
2461int omap_hwmod_for_each_by_class(const char *classname,
2462 int (*fn)(struct omap_hwmod *oh,
2463 void *user),
2464 void *user)
2465{
2466 struct omap_hwmod *temp_oh;
2467 int ret = 0;
2468
2469 if (!classname || !fn)
2470 return -EINVAL;
2471
2472 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2473 __func__, classname);
2474
43b40992
PW
2475 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2476 if (!strcmp(temp_oh->class->name, classname)) {
2477 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2478 __func__, temp_oh->name);
2479 ret = (*fn)(temp_oh, user);
2480 if (ret)
2481 break;
2482 }
2483 }
2484
43b40992
PW
2485 if (ret)
2486 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2487 __func__, ret);
2488
2489 return ret;
2490}
2491
2092e5cc
PW
2492/**
2493 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2494 * @oh: struct omap_hwmod *
2495 * @state: state that _setup() should leave the hwmod in
2496 *
550c8092 2497 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2498 * (called by omap_hwmod_setup_*()). Only valid to call between
2499 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2500 * 0 upon success or -EINVAL if there is a problem with the arguments
2501 * or if the hwmod is in the wrong state.
2092e5cc
PW
2502 */
2503int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2504{
2505 int ret;
dc6d1cda 2506 unsigned long flags;
2092e5cc
PW
2507
2508 if (!oh)
2509 return -EINVAL;
2510
2511 if (state != _HWMOD_STATE_DISABLED &&
2512 state != _HWMOD_STATE_ENABLED &&
2513 state != _HWMOD_STATE_IDLE)
2514 return -EINVAL;
2515
dc6d1cda 2516 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2517
2518 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2519 ret = -EINVAL;
2520 goto ohsps_unlock;
2521 }
2522
2523 oh->_postsetup_state = state;
2524 ret = 0;
2525
2526ohsps_unlock:
dc6d1cda 2527 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2528
2529 return ret;
2530}
c80705aa
KH
2531
2532/**
2533 * omap_hwmod_get_context_loss_count - get lost context count
2534 * @oh: struct omap_hwmod *
2535 *
2536 * Query the powerdomain of of @oh to get the context loss
2537 * count for this device.
2538 *
2539 * Returns the context loss count of the powerdomain assocated with @oh
2540 * upon success, or zero if no powerdomain exists for @oh.
2541 */
2542u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2543{
2544 struct powerdomain *pwrdm;
2545 int ret = 0;
2546
2547 pwrdm = omap_hwmod_get_pwrdm(oh);
2548 if (pwrdm)
2549 ret = pwrdm_get_context_loss_count(pwrdm);
2550
2551 return ret;
2552}
43b01643
PW
2553
2554/**
2555 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2556 * @oh: struct omap_hwmod *
2557 *
2558 * Prevent the hwmod @oh from being reset during the setup process.
2559 * Intended for use by board-*.c files on boards with devices that
2560 * cannot tolerate being reset. Must be called before the hwmod has
2561 * been set up. Returns 0 upon success or negative error code upon
2562 * failure.
2563 */
2564int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2565{
2566 if (!oh)
2567 return -EINVAL;
2568
2569 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2570 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2571 oh->name);
2572 return -EINVAL;
2573 }
2574
2575 oh->flags |= HWMOD_INIT_NO_RESET;
2576
2577 return 0;
2578}