OMAP: SRAM: Fix warning: format '%08lx' expects type 'long unsigned int'
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
63c85238
PW
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
63c85238 5 *
4788da26
PW
6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
63c85238
PW
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
74ff3a68
PW
16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
74ff3a68
PW
27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
63c85238
PW
112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
63c85238
PW
119 * - handle IO mapping
120 * - bus throughput & module latency measurement code
121 *
122 * XXX add tests at the beginning of each function to ensure the hwmod is
123 * in the appropriate state
124 * XXX error return values should be checked to ensure that they are
125 * appropriate
126 */
127#undef DEBUG
128
129#include <linux/kernel.h>
130#include <linux/errno.h>
131#include <linux/io.h>
132#include <linux/clk.h>
133#include <linux/delay.h>
134#include <linux/err.h>
135#include <linux/list.h>
136#include <linux/mutex.h>
dc6d1cda 137#include <linux/spinlock.h>
63c85238 138
6f8b7ff5 139#include <plat/common.h>
ce491cf8 140#include <plat/cpu.h>
1540f214 141#include "clockdomain.h"
72e06d08 142#include "powerdomain.h"
ce491cf8
TL
143#include <plat/clock.h>
144#include <plat/omap_hwmod.h>
5365efbe 145#include <plat/prcm.h>
63c85238 146
59fb659b
PW
147#include "cm2xxx_3xxx.h"
148#include "cm44xx.h"
149#include "prm2xxx_3xxx.h"
d198b514 150#include "prm44xx.h"
8d9af88f 151#include "mux.h"
63c85238 152
5365efbe
BC
153/* Maximum microseconds to wait for OMAP module to softreset */
154#define MAX_MODULE_SOFTRESET_WAIT 10000
63c85238
PW
155
156/* Name of the OMAP hwmod for the MPU */
5c2c0296 157#define MPU_INITIATOR_NAME "mpu"
63c85238
PW
158
159/* omap_hwmod_list contains all registered struct omap_hwmods */
160static LIST_HEAD(omap_hwmod_list);
161
63c85238
PW
162/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163static struct omap_hwmod *mpu_oh;
164
63c85238
PW
165
166/* Private functions */
167
168/**
169 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
170 * @oh: struct omap_hwmod *
171 *
172 * Load the current value of the hwmod OCP_SYSCONFIG register into the
173 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
174 * OCP_SYSCONFIG register or 0 upon success.
175 */
176static int _update_sysc_cache(struct omap_hwmod *oh)
177{
43b40992
PW
178 if (!oh->class->sysc) {
179 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
63c85238
PW
180 return -EINVAL;
181 }
182
183 /* XXX ensure module interface clock is up */
184
cc7a1d2a 185 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 186
43b40992 187 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 188 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
63c85238
PW
189
190 return 0;
191}
192
193/**
194 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
195 * @v: OCP_SYSCONFIG value to write
196 * @oh: struct omap_hwmod *
197 *
43b40992
PW
198 * Write @v into the module class' OCP_SYSCONFIG register, if it has
199 * one. No return value.
63c85238
PW
200 */
201static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
202{
43b40992
PW
203 if (!oh->class->sysc) {
204 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
63c85238
PW
205 return;
206 }
207
208 /* XXX ensure module interface clock is up */
209
233cbe5b
RN
210 /* Module might have lost context, always update cache and register */
211 oh->_sysc_cache = v;
212 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
63c85238
PW
213}
214
215/**
216 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
217 * @oh: struct omap_hwmod *
218 * @standbymode: MIDLEMODE field bits
219 * @v: pointer to register contents to modify
220 *
221 * Update the master standby mode bits in @v to be @standbymode for
222 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
223 * upon error or 0 upon success.
224 */
225static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
226 u32 *v)
227{
358f0e63
TG
228 u32 mstandby_mask;
229 u8 mstandby_shift;
230
43b40992
PW
231 if (!oh->class->sysc ||
232 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
63c85238
PW
233 return -EINVAL;
234
43b40992
PW
235 if (!oh->class->sysc->sysc_fields) {
236 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
237 return -EINVAL;
238 }
239
43b40992 240 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
358f0e63
TG
241 mstandby_mask = (0x3 << mstandby_shift);
242
243 *v &= ~mstandby_mask;
244 *v |= __ffs(standbymode) << mstandby_shift;
63c85238
PW
245
246 return 0;
247}
248
249/**
250 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
251 * @oh: struct omap_hwmod *
252 * @idlemode: SIDLEMODE field bits
253 * @v: pointer to register contents to modify
254 *
255 * Update the slave idle mode bits in @v to be @idlemode for the @oh
256 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
257 * or 0 upon success.
258 */
259static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
260{
358f0e63
TG
261 u32 sidle_mask;
262 u8 sidle_shift;
263
43b40992
PW
264 if (!oh->class->sysc ||
265 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
63c85238
PW
266 return -EINVAL;
267
43b40992
PW
268 if (!oh->class->sysc->sysc_fields) {
269 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
270 return -EINVAL;
271 }
272
43b40992 273 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
TG
274 sidle_mask = (0x3 << sidle_shift);
275
276 *v &= ~sidle_mask;
277 *v |= __ffs(idlemode) << sidle_shift;
63c85238
PW
278
279 return 0;
280}
281
282/**
283 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
284 * @oh: struct omap_hwmod *
285 * @clockact: CLOCKACTIVITY field bits
286 * @v: pointer to register contents to modify
287 *
288 * Update the clockactivity mode bits in @v to be @clockact for the
289 * @oh hwmod. Used for additional powersaving on some modules. Does
290 * not write to the hardware. Returns -EINVAL upon error or 0 upon
291 * success.
292 */
293static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
294{
358f0e63
TG
295 u32 clkact_mask;
296 u8 clkact_shift;
297
43b40992
PW
298 if (!oh->class->sysc ||
299 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
63c85238
PW
300 return -EINVAL;
301
43b40992
PW
302 if (!oh->class->sysc->sysc_fields) {
303 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
304 return -EINVAL;
305 }
306
43b40992 307 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
TG
308 clkact_mask = (0x3 << clkact_shift);
309
310 *v &= ~clkact_mask;
311 *v |= clockact << clkact_shift;
63c85238
PW
312
313 return 0;
314}
315
316/**
317 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
318 * @oh: struct omap_hwmod *
319 * @v: pointer to register contents to modify
320 *
321 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
322 * error or 0 upon success.
323 */
324static int _set_softreset(struct omap_hwmod *oh, u32 *v)
325{
358f0e63
TG
326 u32 softrst_mask;
327
43b40992
PW
328 if (!oh->class->sysc ||
329 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
330 return -EINVAL;
331
43b40992
PW
332 if (!oh->class->sysc->sysc_fields) {
333 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
334 return -EINVAL;
335 }
336
43b40992 337 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
338
339 *v |= softrst_mask;
63c85238
PW
340
341 return 0;
342}
343
726072e5
PW
344/**
345 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
346 * @oh: struct omap_hwmod *
347 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
348 * @v: pointer to register contents to modify
349 *
350 * Update the module autoidle bit in @v to be @autoidle for the @oh
351 * hwmod. The autoidle bit controls whether the module can gate
352 * internal clocks automatically when it isn't doing anything; the
353 * exact function of this bit varies on a per-module basis. This
354 * function does not write to the hardware. Returns -EINVAL upon
355 * error or 0 upon success.
356 */
357static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
358 u32 *v)
359{
358f0e63
TG
360 u32 autoidle_mask;
361 u8 autoidle_shift;
362
43b40992
PW
363 if (!oh->class->sysc ||
364 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
PW
365 return -EINVAL;
366
43b40992
PW
367 if (!oh->class->sysc->sysc_fields) {
368 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
369 return -EINVAL;
370 }
371
43b40992 372 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 373 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
374
375 *v &= ~autoidle_mask;
376 *v |= autoidle << autoidle_shift;
726072e5
PW
377
378 return 0;
379}
380
63c85238
PW
381/**
382 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
383 * @oh: struct omap_hwmod *
384 *
385 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
386 * upon error or 0 upon success.
387 */
5a7ddcbd 388static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 389{
5a7ddcbd 390 u32 wakeup_mask;
63c85238 391
43b40992 392 if (!oh->class->sysc ||
86009eb3
BC
393 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
394 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
63c85238
PW
395 return -EINVAL;
396
43b40992
PW
397 if (!oh->class->sysc->sysc_fields) {
398 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
399 return -EINVAL;
400 }
401
43b40992 402 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 403
5a7ddcbd 404 *v |= wakeup_mask;
63c85238 405
86009eb3
BC
406 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
407 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
408
63c85238
PW
409 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
410
411 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
412
413 return 0;
414}
415
416/**
417 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
418 * @oh: struct omap_hwmod *
419 *
420 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
421 * upon error or 0 upon success.
422 */
5a7ddcbd 423static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 424{
5a7ddcbd 425 u32 wakeup_mask;
63c85238 426
43b40992 427 if (!oh->class->sysc ||
86009eb3
BC
428 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
429 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
63c85238
PW
430 return -EINVAL;
431
43b40992
PW
432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
43b40992 437 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 438
5a7ddcbd 439 *v &= ~wakeup_mask;
63c85238 440
86009eb3
BC
441 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
442 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
443
63c85238
PW
444 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
445
446 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
447
448 return 0;
449}
450
451/**
452 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
453 * @oh: struct omap_hwmod *
454 *
455 * Prevent the hardware module @oh from entering idle while the
456 * hardare module initiator @init_oh is active. Useful when a module
457 * will be accessed by a particular initiator (e.g., if a module will
458 * be accessed by the IVA, there should be a sleepdep between the IVA
459 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
460 * mode. If the clockdomain is marked as not needing autodeps, return
461 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
462 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
463 */
464static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
465{
466 if (!oh->_clk)
467 return -EINVAL;
468
570b54c7
PW
469 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
470 return 0;
471
55ed9694 472 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
473}
474
475/**
476 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
477 * @oh: struct omap_hwmod *
478 *
479 * Allow the hardware module @oh to enter idle while the hardare
480 * module initiator @init_oh is active. Useful when a module will not
481 * be accessed by a particular initiator (e.g., if a module will not
482 * be accessed by the IVA, there should be no sleepdep between the IVA
483 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
484 * mode. If the clockdomain is marked as not needing autodeps, return
485 * 0 without doing anything. Returns -EINVAL upon error or passes
486 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
487 */
488static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
489{
490 if (!oh->_clk)
491 return -EINVAL;
492
570b54c7
PW
493 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
494 return 0;
495
55ed9694 496 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
497}
498
499/**
500 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
501 * @oh: struct omap_hwmod *
502 *
503 * Called from _init_clocks(). Populates the @oh _clk (main
504 * functional clock pointer) if a main_clk is present. Returns 0 on
505 * success or -EINVAL on error.
506 */
507static int _init_main_clk(struct omap_hwmod *oh)
508{
63c85238
PW
509 int ret = 0;
510
50ebdac2 511 if (!oh->main_clk)
63c85238
PW
512 return 0;
513
63403384 514 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 515 if (!oh->_clk) {
20383d82
BC
516 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
517 oh->name, oh->main_clk);
63403384 518 return -EINVAL;
dc75925d 519 }
63c85238 520
63403384
BC
521 if (!oh->_clk->clkdm)
522 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
523 oh->main_clk, oh->_clk->name);
81d7c6ff 524
63c85238
PW
525 return ret;
526}
527
528/**
887adeac 529 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
530 * @oh: struct omap_hwmod *
531 *
532 * Called from _init_clocks(). Populates the @oh OCP slave interface
533 * clock pointers. Returns 0 on success or -EINVAL on error.
534 */
535static int _init_interface_clks(struct omap_hwmod *oh)
536{
63c85238
PW
537 struct clk *c;
538 int i;
539 int ret = 0;
540
541 if (oh->slaves_cnt == 0)
542 return 0;
543
682fdc96
BC
544 for (i = 0; i < oh->slaves_cnt; i++) {
545 struct omap_hwmod_ocp_if *os = oh->slaves[i];
546
50ebdac2 547 if (!os->clk)
63c85238
PW
548 continue;
549
50ebdac2 550 c = omap_clk_get_by_name(os->clk);
dc75925d 551 if (!c) {
20383d82
BC
552 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
553 oh->name, os->clk);
63c85238 554 ret = -EINVAL;
dc75925d 555 }
63c85238
PW
556 os->_clk = c;
557 }
558
559 return ret;
560}
561
562/**
563 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
564 * @oh: struct omap_hwmod *
565 *
566 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
567 * clock pointers. Returns 0 on success or -EINVAL on error.
568 */
569static int _init_opt_clks(struct omap_hwmod *oh)
570{
571 struct omap_hwmod_opt_clk *oc;
572 struct clk *c;
573 int i;
574 int ret = 0;
575
576 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 577 c = omap_clk_get_by_name(oc->clk);
dc75925d 578 if (!c) {
20383d82
BC
579 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
580 oh->name, oc->clk);
63c85238 581 ret = -EINVAL;
dc75925d 582 }
63c85238
PW
583 oc->_clk = c;
584 }
585
586 return ret;
587}
588
589/**
590 * _enable_clocks - enable hwmod main clock and interface clocks
591 * @oh: struct omap_hwmod *
592 *
593 * Enables all clocks necessary for register reads and writes to succeed
594 * on the hwmod @oh. Returns 0.
595 */
596static int _enable_clocks(struct omap_hwmod *oh)
597{
63c85238
PW
598 int i;
599
600 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
601
4d3ae5a9 602 if (oh->_clk)
63c85238
PW
603 clk_enable(oh->_clk);
604
605 if (oh->slaves_cnt > 0) {
682fdc96
BC
606 for (i = 0; i < oh->slaves_cnt; i++) {
607 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
608 struct clk *c = os->_clk;
609
4d3ae5a9 610 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
611 clk_enable(c);
612 }
613 }
614
615 /* The opt clocks are controlled by the device driver. */
616
617 return 0;
618}
619
620/**
621 * _disable_clocks - disable hwmod main clock and interface clocks
622 * @oh: struct omap_hwmod *
623 *
624 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
625 */
626static int _disable_clocks(struct omap_hwmod *oh)
627{
63c85238
PW
628 int i;
629
630 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
631
4d3ae5a9 632 if (oh->_clk)
63c85238
PW
633 clk_disable(oh->_clk);
634
635 if (oh->slaves_cnt > 0) {
682fdc96
BC
636 for (i = 0; i < oh->slaves_cnt; i++) {
637 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
638 struct clk *c = os->_clk;
639
4d3ae5a9 640 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
641 clk_disable(c);
642 }
643 }
644
645 /* The opt clocks are controlled by the device driver. */
646
647 return 0;
648}
649
96835af9
BC
650static void _enable_optional_clocks(struct omap_hwmod *oh)
651{
652 struct omap_hwmod_opt_clk *oc;
653 int i;
654
655 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
656
657 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
658 if (oc->_clk) {
659 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
660 oc->_clk->name);
661 clk_enable(oc->_clk);
662 }
663}
664
665static void _disable_optional_clocks(struct omap_hwmod *oh)
666{
667 struct omap_hwmod_opt_clk *oc;
668 int i;
669
670 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
671
672 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
673 if (oc->_clk) {
674 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
675 oc->_clk->name);
676 clk_disable(oc->_clk);
677 }
678}
679
63c85238
PW
680/**
681 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
682 * @oh: struct omap_hwmod *
683 *
684 * Returns the array index of the OCP slave port that the MPU
685 * addresses the device on, or -EINVAL upon error or not found.
686 */
01592df9 687static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 688{
63c85238
PW
689 int i;
690 int found = 0;
691
692 if (!oh || oh->slaves_cnt == 0)
693 return -EINVAL;
694
682fdc96
BC
695 for (i = 0; i < oh->slaves_cnt; i++) {
696 struct omap_hwmod_ocp_if *os = oh->slaves[i];
697
63c85238
PW
698 if (os->user & OCP_USER_MPU) {
699 found = 1;
700 break;
701 }
702 }
703
704 if (found)
705 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
706 oh->name, i);
707 else
708 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
709 oh->name);
710
711 return (found) ? i : -EINVAL;
712}
713
714/**
715 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
716 * @oh: struct omap_hwmod *
717 *
718 * Return the virtual address of the base of the register target of
719 * device @oh, or NULL on error.
720 */
01592df9 721static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
722{
723 struct omap_hwmod_ocp_if *os;
724 struct omap_hwmod_addr_space *mem;
725 int i;
726 int found = 0;
986a13f5 727 void __iomem *va_start;
63c85238
PW
728
729 if (!oh || oh->slaves_cnt == 0)
730 return NULL;
731
682fdc96 732 os = oh->slaves[index];
63c85238
PW
733
734 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
735 if (mem->flags & ADDR_TYPE_RT) {
736 found = 1;
737 break;
738 }
739 }
740
986a13f5
TL
741 if (found) {
742 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
743 if (!va_start) {
744 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
745 return NULL;
746 }
63c85238 747 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
748 oh->name, va_start);
749 } else {
63c85238
PW
750 pr_debug("omap_hwmod: %s: no MPU register target found\n",
751 oh->name);
986a13f5 752 }
63c85238 753
986a13f5 754 return (found) ? va_start : NULL;
63c85238
PW
755}
756
757/**
74ff3a68 758 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
759 * @oh: struct omap_hwmod *
760 *
761 * If module is marked as SWSUP_SIDLE, force the module out of slave
762 * idle; otherwise, configure it for smart-idle. If module is marked
763 * as SWSUP_MSUSPEND, force the module out of master standby;
764 * otherwise, configure it for smart-standby. No return value.
765 */
74ff3a68 766static void _enable_sysc(struct omap_hwmod *oh)
63c85238 767{
43b40992 768 u8 idlemode, sf;
63c85238
PW
769 u32 v;
770
43b40992 771 if (!oh->class->sysc)
63c85238
PW
772 return;
773
774 v = oh->_sysc_cache;
43b40992 775 sf = oh->class->sysc->sysc_flags;
63c85238 776
43b40992 777 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
778 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
779 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
780 _set_slave_idlemode(oh, idlemode, &v);
781 }
782
43b40992 783 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
784 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
785 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
786 _set_master_standbymode(oh, idlemode, &v);
787 }
788
a16b1f7f
PW
789 /*
790 * XXX The clock framework should handle this, by
791 * calling into this code. But this must wait until the
792 * clock structures are tagged with omap_hwmod entries
793 */
43b40992
PW
794 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
795 (sf & SYSC_HAS_CLOCKACTIVITY))
796 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 797
9980ce53
RN
798 /* If slave is in SMARTIDLE, also enable wakeup */
799 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
800 _enable_wakeup(oh, &v);
801
802 _write_sysconfig(v, oh);
78f26e87
HH
803
804 /*
805 * Set the autoidle bit only after setting the smartidle bit
806 * Setting this will not have any impact on the other modules.
807 */
808 if (sf & SYSC_HAS_AUTOIDLE) {
809 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
810 0 : 1;
811 _set_module_autoidle(oh, idlemode, &v);
812 _write_sysconfig(v, oh);
813 }
63c85238
PW
814}
815
816/**
74ff3a68 817 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
818 * @oh: struct omap_hwmod *
819 *
820 * If module is marked as SWSUP_SIDLE, force the module into slave
821 * idle; otherwise, configure it for smart-idle. If module is marked
822 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
823 * configure it for smart-standby. No return value.
824 */
74ff3a68 825static void _idle_sysc(struct omap_hwmod *oh)
63c85238 826{
43b40992 827 u8 idlemode, sf;
63c85238
PW
828 u32 v;
829
43b40992 830 if (!oh->class->sysc)
63c85238
PW
831 return;
832
833 v = oh->_sysc_cache;
43b40992 834 sf = oh->class->sysc->sysc_flags;
63c85238 835
43b40992 836 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
837 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
838 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
839 _set_slave_idlemode(oh, idlemode, &v);
840 }
841
43b40992 842 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
843 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
844 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
845 _set_master_standbymode(oh, idlemode, &v);
846 }
847
86009eb3
BC
848 /* If slave is in SMARTIDLE, also enable wakeup */
849 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
850 _enable_wakeup(oh, &v);
851
63c85238
PW
852 _write_sysconfig(v, oh);
853}
854
855/**
74ff3a68 856 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
857 * @oh: struct omap_hwmod *
858 *
859 * Force the module into slave idle and master suspend. No return
860 * value.
861 */
74ff3a68 862static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
863{
864 u32 v;
43b40992 865 u8 sf;
63c85238 866
43b40992 867 if (!oh->class->sysc)
63c85238
PW
868 return;
869
870 v = oh->_sysc_cache;
43b40992 871 sf = oh->class->sysc->sysc_flags;
63c85238 872
43b40992 873 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
874 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
875
43b40992 876 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
877 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
878
43b40992 879 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 880 _set_module_autoidle(oh, 1, &v);
63c85238
PW
881
882 _write_sysconfig(v, oh);
883}
884
885/**
886 * _lookup - find an omap_hwmod by name
887 * @name: find an omap_hwmod by name
888 *
889 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
890 */
891static struct omap_hwmod *_lookup(const char *name)
892{
893 struct omap_hwmod *oh, *temp_oh;
894
895 oh = NULL;
896
897 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
898 if (!strcmp(name, temp_oh->name)) {
899 oh = temp_oh;
900 break;
901 }
902 }
903
904 return oh;
905}
906
907/**
908 * _init_clocks - clk_get() all clocks associated with this hwmod
909 * @oh: struct omap_hwmod *
97d60162 910 * @data: not used; pass NULL
63c85238 911 *
a2debdbd 912 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
913 * Resolves all clock names embedded in the hwmod. Returns 0 on
914 * success, or a negative error code on failure.
63c85238 915 */
97d60162 916static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
917{
918 int ret = 0;
919
48d54f3f
PW
920 if (oh->_state != _HWMOD_STATE_REGISTERED)
921 return 0;
63c85238
PW
922
923 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
924
925 ret |= _init_main_clk(oh);
926 ret |= _init_interface_clks(oh);
927 ret |= _init_opt_clks(oh);
928
f5c1f84b
BC
929 if (!ret)
930 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 931
09c35f2f 932 return ret;
63c85238
PW
933}
934
935/**
936 * _wait_target_ready - wait for a module to leave slave idle
937 * @oh: struct omap_hwmod *
938 *
939 * Wait for a module @oh to leave slave idle. Returns 0 if the module
940 * does not have an IDLEST bit or if the module successfully leaves
941 * slave idle; otherwise, pass along the return value of the
942 * appropriate *_cm_wait_module_ready() function.
943 */
944static int _wait_target_ready(struct omap_hwmod *oh)
945{
946 struct omap_hwmod_ocp_if *os;
947 int ret;
948
949 if (!oh)
950 return -EINVAL;
951
952 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
953 return 0;
954
682fdc96 955 os = oh->slaves[oh->_mpu_port_index];
63c85238 956
33f7ec81 957 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
958 return 0;
959
960 /* XXX check module SIDLEMODE */
961
962 /* XXX check clock enable states */
963
964 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
965 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
966 oh->prcm.omap2.idlest_reg_id,
967 oh->prcm.omap2.idlest_idle_bit);
63c85238 968 } else if (cpu_is_omap44xx()) {
9a23dfe1 969 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
970 } else {
971 BUG();
972 };
973
974 return ret;
975}
976
5365efbe 977/**
cc1226e7 978 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
979 * @oh: struct omap_hwmod *
980 * @name: name of the reset line in the context of this hwmod
cc1226e7 981 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
982 *
983 * Return the bit position of the reset line that match the
984 * input name. Return -ENOENT if not found.
985 */
cc1226e7 986static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
987 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
988{
989 int i;
990
991 for (i = 0; i < oh->rst_lines_cnt; i++) {
992 const char *rst_line = oh->rst_lines[i].name;
993 if (!strcmp(rst_line, name)) {
cc1226e7 994 ohri->rst_shift = oh->rst_lines[i].rst_shift;
995 ohri->st_shift = oh->rst_lines[i].st_shift;
996 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
997 oh->name, __func__, rst_line, ohri->rst_shift,
998 ohri->st_shift);
5365efbe 999
cc1226e7 1000 return 0;
5365efbe
BC
1001 }
1002 }
1003
1004 return -ENOENT;
1005}
1006
1007/**
1008 * _assert_hardreset - assert the HW reset line of submodules
1009 * contained in the hwmod module.
1010 * @oh: struct omap_hwmod *
1011 * @name: name of the reset line to lookup and assert
1012 *
1013 * Some IP like dsp, ipu or iva contain processor that require
1014 * an HW reset line to be assert / deassert in order to enable fully
1015 * the IP.
1016 */
1017static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1018{
cc1226e7 1019 struct omap_hwmod_rst_info ohri;
1020 u8 ret;
5365efbe
BC
1021
1022 if (!oh)
1023 return -EINVAL;
1024
cc1226e7 1025 ret = _lookup_hardreset(oh, name, &ohri);
1026 if (IS_ERR_VALUE(ret))
1027 return ret;
5365efbe
BC
1028
1029 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1030 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1031 ohri.rst_shift);
5365efbe
BC
1032 else if (cpu_is_omap44xx())
1033 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1034 ohri.rst_shift);
5365efbe
BC
1035 else
1036 return -EINVAL;
1037}
1038
1039/**
1040 * _deassert_hardreset - deassert the HW reset line of submodules contained
1041 * in the hwmod module.
1042 * @oh: struct omap_hwmod *
1043 * @name: name of the reset line to look up and deassert
1044 *
1045 * Some IP like dsp, ipu or iva contain processor that require
1046 * an HW reset line to be assert / deassert in order to enable fully
1047 * the IP.
1048 */
1049static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1050{
cc1226e7 1051 struct omap_hwmod_rst_info ohri;
1052 int ret;
5365efbe
BC
1053
1054 if (!oh)
1055 return -EINVAL;
1056
cc1226e7 1057 ret = _lookup_hardreset(oh, name, &ohri);
1058 if (IS_ERR_VALUE(ret))
1059 return ret;
5365efbe 1060
cc1226e7 1061 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1062 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1063 ohri.rst_shift,
1064 ohri.st_shift);
1065 } else if (cpu_is_omap44xx()) {
1066 if (ohri.st_shift)
1067 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1068 oh->name, name);
1069 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1070 ohri.rst_shift);
1071 } else {
5365efbe 1072 return -EINVAL;
cc1226e7 1073 }
5365efbe 1074
cc1226e7 1075 if (ret == -EBUSY)
5365efbe
BC
1076 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1077
cc1226e7 1078 return ret;
5365efbe
BC
1079}
1080
1081/**
1082 * _read_hardreset - read the HW reset line state of submodules
1083 * contained in the hwmod module
1084 * @oh: struct omap_hwmod *
1085 * @name: name of the reset line to look up and read
1086 *
1087 * Return the state of the reset line.
1088 */
1089static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1090{
cc1226e7 1091 struct omap_hwmod_rst_info ohri;
1092 u8 ret;
5365efbe
BC
1093
1094 if (!oh)
1095 return -EINVAL;
1096
cc1226e7 1097 ret = _lookup_hardreset(oh, name, &ohri);
1098 if (IS_ERR_VALUE(ret))
1099 return ret;
5365efbe
BC
1100
1101 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1102 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1103 ohri.st_shift);
5365efbe
BC
1104 } else if (cpu_is_omap44xx()) {
1105 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1106 ohri.rst_shift);
5365efbe
BC
1107 } else {
1108 return -EINVAL;
1109 }
1110}
1111
63c85238 1112/**
bd36179e 1113 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1114 * @oh: struct omap_hwmod *
1115 *
1116 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1117 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1118 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1119 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1120 *
1121 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1122 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1123 * use the SYSCONFIG softreset bit to provide the status.
1124 *
bd36179e
PW
1125 * Note that some IP like McBSP do have reset control but don't have
1126 * reset status.
63c85238 1127 */
bd36179e 1128static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1129{
96835af9 1130 u32 v;
6f8b7ff5 1131 int c = 0;
96835af9 1132 int ret = 0;
63c85238 1133
43b40992 1134 if (!oh->class->sysc ||
2cb06814 1135 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1136 return -EINVAL;
1137
1138 /* clocks must be on for this operation */
1139 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1140 pr_warning("omap_hwmod: %s: reset can only be entered from "
1141 "enabled state\n", oh->name);
63c85238
PW
1142 return -EINVAL;
1143 }
1144
96835af9
BC
1145 /* For some modules, all optionnal clocks need to be enabled as well */
1146 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1147 _enable_optional_clocks(oh);
1148
bd36179e 1149 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1150
1151 v = oh->_sysc_cache;
96835af9
BC
1152 ret = _set_softreset(oh, &v);
1153 if (ret)
1154 goto dis_opt_clks;
63c85238
PW
1155 _write_sysconfig(v, oh);
1156
2cb06814 1157 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1158 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1159 oh->class->sysc->syss_offs)
1160 & SYSS_RESETDONE_MASK),
1161 MAX_MODULE_SOFTRESET_WAIT, c);
1162 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1163 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1164 oh->class->sysc->sysc_offs)
1165 & SYSC_TYPE2_SOFTRESET_MASK),
1166 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1167
5365efbe 1168 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1169 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1170 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1171 else
5365efbe 1172 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1173
1174 /*
1175 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1176 * _wait_target_ready() or _reset()
1177 */
1178
96835af9
BC
1179 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1180
1181dis_opt_clks:
1182 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1183 _disable_optional_clocks(oh);
1184
1185 return ret;
63c85238
PW
1186}
1187
bd36179e
PW
1188/**
1189 * _reset - reset an omap_hwmod
1190 * @oh: struct omap_hwmod *
1191 *
1192 * Resets an omap_hwmod @oh. The default software reset mechanism for
1193 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1194 * bit. However, some hwmods cannot be reset via this method: some
1195 * are not targets and therefore have no OCP header registers to
1196 * access; others (like the IVA) have idiosyncratic reset sequences.
1197 * So for these relatively rare cases, custom reset code can be
1198 * supplied in the struct omap_hwmod_class .reset function pointer.
1199 * Passes along the return value from either _reset() or the custom
1200 * reset function - these must return -EINVAL if the hwmod cannot be
1201 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1202 * the module did not reset in time, or 0 upon success.
1203 */
1204static int _reset(struct omap_hwmod *oh)
1205{
1206 int ret;
1207
1208 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1209
1210 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1211
1212 return ret;
1213}
1214
63c85238 1215/**
dc6d1cda 1216 * _enable - enable an omap_hwmod
63c85238
PW
1217 * @oh: struct omap_hwmod *
1218 *
1219 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1220 * register target. Returns -EINVAL if the hwmod is in the wrong
1221 * state or passes along the return value of _wait_target_ready().
63c85238 1222 */
dc6d1cda 1223static int _enable(struct omap_hwmod *oh)
63c85238
PW
1224{
1225 int r;
1226
1227 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1228 oh->_state != _HWMOD_STATE_IDLE &&
1229 oh->_state != _HWMOD_STATE_DISABLED) {
1230 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1231 "from initialized, idle, or disabled state\n", oh->name);
1232 return -EINVAL;
1233 }
1234
1235 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1236
5365efbe
BC
1237 /*
1238 * If an IP contains only one HW reset line, then de-assert it in order
1239 * to allow to enable the clocks. Otherwise the PRCM will return
1240 * Intransition status, and the init will failed.
1241 */
1242 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1243 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1244 _deassert_hardreset(oh, oh->rst_lines[0].name);
1245
8d9af88f 1246 /* Mux pins for device runtime if populated */
029268e4
TL
1247 if (oh->mux && (!oh->mux->enabled ||
1248 ((oh->_state == _HWMOD_STATE_IDLE) &&
1249 oh->mux->pads_dynamic)))
8d9af88f 1250 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1251
1252 _add_initiator_dep(oh, mpu_oh);
1253 _enable_clocks(oh);
1254
63c85238 1255 r = _wait_target_ready(oh);
9a23dfe1 1256 if (!r) {
63c85238
PW
1257 oh->_state = _HWMOD_STATE_ENABLED;
1258
9a23dfe1
BC
1259 /* Access the sysconfig only if the target is ready */
1260 if (oh->class->sysc) {
1261 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1262 _update_sysc_cache(oh);
74ff3a68 1263 _enable_sysc(oh);
9a23dfe1
BC
1264 }
1265 } else {
f2dd7e09 1266 _disable_clocks(oh);
9a23dfe1
BC
1267 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1268 oh->name, r);
1269 }
1270
63c85238
PW
1271 return r;
1272}
1273
1274/**
dc6d1cda 1275 * _idle - idle an omap_hwmod
63c85238
PW
1276 * @oh: struct omap_hwmod *
1277 *
1278 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1279 * no further work. Returns -EINVAL if the hwmod is in the wrong
1280 * state or returns 0.
63c85238 1281 */
dc6d1cda 1282static int _idle(struct omap_hwmod *oh)
63c85238
PW
1283{
1284 if (oh->_state != _HWMOD_STATE_ENABLED) {
1285 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1286 "enabled state\n", oh->name);
1287 return -EINVAL;
1288 }
1289
1290 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1291
43b40992 1292 if (oh->class->sysc)
74ff3a68 1293 _idle_sysc(oh);
63c85238
PW
1294 _del_initiator_dep(oh, mpu_oh);
1295 _disable_clocks(oh);
1296
8d9af88f 1297 /* Mux pins for device idle if populated */
029268e4 1298 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1299 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1300
63c85238
PW
1301 oh->_state = _HWMOD_STATE_IDLE;
1302
1303 return 0;
1304}
1305
9599217a
KVA
1306/**
1307 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1308 * @oh: struct omap_hwmod *
1309 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1310 *
1311 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1312 * local copy. Intended to be used by drivers that require
1313 * direct manipulation of the AUTOIDLE bits.
1314 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1315 * along the return value from _set_module_autoidle().
1316 *
1317 * Any users of this function should be scrutinized carefully.
1318 */
1319int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1320{
1321 u32 v;
1322 int retval = 0;
1323 unsigned long flags;
1324
1325 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1326 return -EINVAL;
1327
1328 spin_lock_irqsave(&oh->_lock, flags);
1329
1330 v = oh->_sysc_cache;
1331
1332 retval = _set_module_autoidle(oh, autoidle, &v);
1333
1334 if (!retval)
1335 _write_sysconfig(v, oh);
1336
1337 spin_unlock_irqrestore(&oh->_lock, flags);
1338
1339 return retval;
1340}
1341
63c85238
PW
1342/**
1343 * _shutdown - shutdown an omap_hwmod
1344 * @oh: struct omap_hwmod *
1345 *
1346 * Shut down an omap_hwmod @oh. This should be called when the driver
1347 * used for the hwmod is removed or unloaded or if the driver is not
1348 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1349 * state or returns 0.
1350 */
1351static int _shutdown(struct omap_hwmod *oh)
1352{
e4dc8f50
PW
1353 int ret;
1354 u8 prev_state;
1355
63c85238
PW
1356 if (oh->_state != _HWMOD_STATE_IDLE &&
1357 oh->_state != _HWMOD_STATE_ENABLED) {
1358 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1359 "from idle, or enabled state\n", oh->name);
1360 return -EINVAL;
1361 }
1362
1363 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1364
e4dc8f50
PW
1365 if (oh->class->pre_shutdown) {
1366 prev_state = oh->_state;
1367 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1368 _enable(oh);
e4dc8f50
PW
1369 ret = oh->class->pre_shutdown(oh);
1370 if (ret) {
1371 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1372 _idle(oh);
e4dc8f50
PW
1373 return ret;
1374 }
1375 }
1376
43b40992 1377 if (oh->class->sysc)
74ff3a68 1378 _shutdown_sysc(oh);
3827f949 1379
5365efbe
BC
1380 /*
1381 * If an IP contains only one HW reset line, then assert it
1382 * before disabling the clocks and shutting down the IP.
1383 */
1384 if (oh->rst_lines_cnt == 1)
1385 _assert_hardreset(oh, oh->rst_lines[0].name);
1386
3827f949
BC
1387 /* clocks and deps are already disabled in idle */
1388 if (oh->_state == _HWMOD_STATE_ENABLED) {
1389 _del_initiator_dep(oh, mpu_oh);
1390 /* XXX what about the other system initiators here? dma, dsp */
1391 _disable_clocks(oh);
1392 }
63c85238
PW
1393 /* XXX Should this code also force-disable the optional clocks? */
1394
8d9af88f
TL
1395 /* Mux pins to safe mode or use populated off mode values */
1396 if (oh->mux)
1397 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1398
1399 oh->_state = _HWMOD_STATE_DISABLED;
1400
1401 return 0;
1402}
1403
63c85238
PW
1404/**
1405 * _setup - do initial configuration of omap_hwmod
1406 * @oh: struct omap_hwmod *
1407 *
1408 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1409 * OCP_SYSCONFIG register. Returns 0.
63c85238 1410 */
97d60162 1411static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1412{
9a23dfe1 1413 int i, r;
2092e5cc 1414 u8 postsetup_state;
97d60162 1415
48d54f3f
PW
1416 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1417 return 0;
1418
63c85238
PW
1419 /* Set iclk autoidle mode */
1420 if (oh->slaves_cnt > 0) {
682fdc96
BC
1421 for (i = 0; i < oh->slaves_cnt; i++) {
1422 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1423 struct clk *c = os->_clk;
1424
4d3ae5a9 1425 if (!c)
63c85238
PW
1426 continue;
1427
1428 if (os->flags & OCPIF_SWSUP_IDLE) {
1429 /* XXX omap_iclk_deny_idle(c); */
1430 } else {
1431 /* XXX omap_iclk_allow_idle(c); */
1432 clk_enable(c);
1433 }
1434 }
1435 }
1436
1437 oh->_state = _HWMOD_STATE_INITIALIZED;
1438
5365efbe
BC
1439 /*
1440 * In the case of hwmod with hardreset that should not be
1441 * de-assert at boot time, we have to keep the module
1442 * initialized, because we cannot enable it properly with the
1443 * reset asserted. Exit without warning because that behavior is
1444 * expected.
1445 */
1446 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1447 return 0;
1448
dc6d1cda 1449 r = _enable(oh);
9a23dfe1
BC
1450 if (r) {
1451 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1452 oh->name, oh->_state);
1453 return 0;
1454 }
63c85238 1455
b835d014 1456 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1457 _reset(oh);
1458
b835d014 1459 /*
76e5589e 1460 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1461 * The _enable() function should be split to
76e5589e 1462 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1463 */
43b40992 1464 if (oh->class->sysc) {
b835d014 1465 _update_sysc_cache(oh);
74ff3a68 1466 _enable_sysc(oh);
b835d014
PW
1467 }
1468 }
63c85238 1469
2092e5cc
PW
1470 postsetup_state = oh->_postsetup_state;
1471 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1472 postsetup_state = _HWMOD_STATE_ENABLED;
1473
1474 /*
1475 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1476 * it should be set by the core code as a runtime flag during startup
1477 */
1478 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1479 (postsetup_state == _HWMOD_STATE_IDLE))
1480 postsetup_state = _HWMOD_STATE_ENABLED;
1481
1482 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1483 _idle(oh);
2092e5cc
PW
1484 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1485 _shutdown(oh);
1486 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1487 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1488 oh->name, postsetup_state);
63c85238
PW
1489
1490 return 0;
1491}
1492
63c85238 1493/**
0102b627 1494 * _register - register a struct omap_hwmod
63c85238
PW
1495 * @oh: struct omap_hwmod *
1496 *
43b40992
PW
1497 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1498 * already has been registered by the same name; -EINVAL if the
1499 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1500 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1501 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1502 * success.
63c85238
PW
1503 *
1504 * XXX The data should be copied into bootmem, so the original data
1505 * should be marked __initdata and freed after init. This would allow
1506 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1507 * that the copy process would be relatively complex due to the large number
1508 * of substructures.
1509 */
01592df9 1510static int __init _register(struct omap_hwmod *oh)
63c85238 1511{
569edd70 1512 int ms_id;
63c85238 1513
43b40992
PW
1514 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1515 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1516 return -EINVAL;
1517
63c85238
PW
1518 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1519
ce35b244
BC
1520 if (_lookup(oh->name))
1521 return -EEXIST;
63c85238
PW
1522
1523 ms_id = _find_mpu_port_index(oh);
e7c7d760 1524 if (!IS_ERR_VALUE(ms_id))
63c85238 1525 oh->_mpu_port_index = ms_id;
e7c7d760 1526 else
63c85238 1527 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1528
1529 list_add_tail(&oh->node, &omap_hwmod_list);
1530
dc6d1cda 1531 spin_lock_init(&oh->_lock);
2092e5cc 1532
63c85238
PW
1533 oh->_state = _HWMOD_STATE_REGISTERED;
1534
569edd70
PW
1535 /*
1536 * XXX Rather than doing a strcmp(), this should test a flag
1537 * set in the hwmod data, inserted by the autogenerator code.
1538 */
1539 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1540 mpu_oh = oh;
63c85238 1541
569edd70 1542 return 0;
63c85238
PW
1543}
1544
0102b627
BC
1545
1546/* Public functions */
1547
1548u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1549{
1550 if (oh->flags & HWMOD_16BIT_REG)
1551 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1552 else
1553 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1554}
1555
1556void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1557{
1558 if (oh->flags & HWMOD_16BIT_REG)
1559 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1560 else
1561 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1562}
1563
1564/**
1565 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1566 * @oh: struct omap_hwmod *
1567 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1568 *
1569 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1570 * local copy. Intended to be used by drivers that have some erratum
1571 * that requires direct manipulation of the SIDLEMODE bits. Returns
1572 * -EINVAL if @oh is null, or passes along the return value from
1573 * _set_slave_idlemode().
1574 *
1575 * XXX Does this function have any current users? If not, we should
1576 * remove it; it is better to let the rest of the hwmod code handle this.
1577 * Any users of this function should be scrutinized carefully.
1578 */
1579int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1580{
1581 u32 v;
1582 int retval = 0;
1583
1584 if (!oh)
1585 return -EINVAL;
1586
1587 v = oh->_sysc_cache;
1588
1589 retval = _set_slave_idlemode(oh, idlemode, &v);
1590 if (!retval)
1591 _write_sysconfig(v, oh);
1592
1593 return retval;
1594}
1595
63c85238
PW
1596/**
1597 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1598 * @name: name of the omap_hwmod to look up
1599 *
1600 * Given a @name of an omap_hwmod, return a pointer to the registered
1601 * struct omap_hwmod *, or NULL upon error.
1602 */
1603struct omap_hwmod *omap_hwmod_lookup(const char *name)
1604{
1605 struct omap_hwmod *oh;
1606
1607 if (!name)
1608 return NULL;
1609
63c85238 1610 oh = _lookup(name);
63c85238
PW
1611
1612 return oh;
1613}
1614
1615/**
1616 * omap_hwmod_for_each - call function for each registered omap_hwmod
1617 * @fn: pointer to a callback function
97d60162 1618 * @data: void * data to pass to callback function
63c85238
PW
1619 *
1620 * Call @fn for each registered omap_hwmod, passing @data to each
1621 * function. @fn must return 0 for success or any other value for
1622 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1623 * will stop and the non-zero return value will be passed to the
1624 * caller of omap_hwmod_for_each(). @fn is called with
1625 * omap_hwmod_for_each() held.
1626 */
97d60162
PW
1627int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1628 void *data)
63c85238
PW
1629{
1630 struct omap_hwmod *temp_oh;
1631 int ret;
1632
1633 if (!fn)
1634 return -EINVAL;
1635
63c85238 1636 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1637 ret = (*fn)(temp_oh, data);
63c85238
PW
1638 if (ret)
1639 break;
1640 }
63c85238
PW
1641
1642 return ret;
1643}
1644
63c85238 1645/**
550c8092 1646 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1647 * @ohs: pointer to an array of omap_hwmods to register
1648 *
1649 * Intended to be called early in boot before the clock framework is
1650 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1651 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1652 */
550c8092 1653int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1654{
bac1a0f0 1655 int r, i;
63c85238
PW
1656
1657 if (!ohs)
1658 return 0;
1659
bac1a0f0
PW
1660 i = 0;
1661 do {
1662 if (!omap_chip_is(ohs[i]->omap_chip))
1663 continue;
1664
1665 r = _register(ohs[i]);
1666 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1667 r);
1668 } while (ohs[++i]);
63c85238
PW
1669
1670 return 0;
1671}
1672
e7c7d760
TL
1673/*
1674 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1675 *
a2debdbd 1676 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1677 * Assumes the caller takes care of locking if needed.
63c85238 1678 */
e7c7d760
TL
1679static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1680{
48d54f3f
PW
1681 if (oh->_state != _HWMOD_STATE_REGISTERED)
1682 return 0;
1683
e7c7d760
TL
1684 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1685 return 0;
1686
1687 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1688 if (!oh->_mpu_rt_va)
1689 pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
1690 __func__, oh->name);
1691
1692 return 0;
1693}
1694
63c85238 1695/**
a2debdbd
PW
1696 * omap_hwmod_setup_one - set up a single hwmod
1697 * @oh_name: const char * name of the already-registered hwmod to set up
1698 *
1699 * Must be called after omap2_clk_init(). Resolves the struct clk
1700 * names to struct clk pointers for each registered omap_hwmod. Also
1701 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1702 * success.
1703 */
1704int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1705{
1706 struct omap_hwmod *oh;
1707 int r;
1708
a2debdbd
PW
1709 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1710
1711 if (!mpu_oh) {
1712 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1713 oh_name, MPU_INITIATOR_NAME);
63c85238 1714 return -EINVAL;
a2debdbd 1715 }
63c85238 1716
a2debdbd
PW
1717 oh = _lookup(oh_name);
1718 if (!oh) {
1719 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1720 return -EINVAL;
1721 }
63c85238 1722
a2debdbd
PW
1723 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1724 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1725
a2debdbd
PW
1726 r = _populate_mpu_rt_base(oh, NULL);
1727 if (IS_ERR_VALUE(r)) {
1728 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1729 return -EINVAL;
1730 }
1731
1732 r = _init_clocks(oh, NULL);
1733 if (IS_ERR_VALUE(r)) {
1734 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1735 return -EINVAL;
63c85238
PW
1736 }
1737
a2debdbd
PW
1738 _setup(oh, NULL);
1739
63c85238
PW
1740 return 0;
1741}
1742
1743/**
550c8092 1744 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
1745 *
1746 * Must be called after omap2_clk_init(). Resolves the struct clk names
1747 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 1748 * _setup() on each hwmod. Returns 0 upon success.
63c85238 1749 */
550c8092 1750static int __init omap_hwmod_setup_all(void)
63c85238
PW
1751{
1752 int r;
1753
569edd70
PW
1754 if (!mpu_oh) {
1755 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1756 __func__, MPU_INITIATOR_NAME);
1757 return -EINVAL;
1758 }
1759
e7c7d760 1760 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 1761
97d60162 1762 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
1763 WARN(IS_ERR_VALUE(r),
1764 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 1765
2092e5cc 1766 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1767
1768 return 0;
1769}
550c8092 1770core_initcall(omap_hwmod_setup_all);
63c85238 1771
63c85238
PW
1772/**
1773 * omap_hwmod_enable - enable an omap_hwmod
1774 * @oh: struct omap_hwmod *
1775 *
74ff3a68 1776 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1777 * Returns -EINVAL on error or passes along the return value from _enable().
1778 */
1779int omap_hwmod_enable(struct omap_hwmod *oh)
1780{
1781 int r;
dc6d1cda 1782 unsigned long flags;
63c85238
PW
1783
1784 if (!oh)
1785 return -EINVAL;
1786
dc6d1cda
PW
1787 spin_lock_irqsave(&oh->_lock, flags);
1788 r = _enable(oh);
1789 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1790
1791 return r;
1792}
1793
1794/**
1795 * omap_hwmod_idle - idle an omap_hwmod
1796 * @oh: struct omap_hwmod *
1797 *
74ff3a68 1798 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1799 * Returns -EINVAL on error or passes along the return value from _idle().
1800 */
1801int omap_hwmod_idle(struct omap_hwmod *oh)
1802{
dc6d1cda
PW
1803 unsigned long flags;
1804
63c85238
PW
1805 if (!oh)
1806 return -EINVAL;
1807
dc6d1cda
PW
1808 spin_lock_irqsave(&oh->_lock, flags);
1809 _idle(oh);
1810 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1811
1812 return 0;
1813}
1814
1815/**
1816 * omap_hwmod_shutdown - shutdown an omap_hwmod
1817 * @oh: struct omap_hwmod *
1818 *
74ff3a68 1819 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1820 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1821 * the return value from _shutdown().
1822 */
1823int omap_hwmod_shutdown(struct omap_hwmod *oh)
1824{
dc6d1cda
PW
1825 unsigned long flags;
1826
63c85238
PW
1827 if (!oh)
1828 return -EINVAL;
1829
dc6d1cda 1830 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1831 _shutdown(oh);
dc6d1cda 1832 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1833
1834 return 0;
1835}
1836
1837/**
1838 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1839 * @oh: struct omap_hwmod *oh
1840 *
1841 * Intended to be called by the omap_device code.
1842 */
1843int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1844{
dc6d1cda
PW
1845 unsigned long flags;
1846
1847 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1848 _enable_clocks(oh);
dc6d1cda 1849 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1850
1851 return 0;
1852}
1853
1854/**
1855 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1856 * @oh: struct omap_hwmod *oh
1857 *
1858 * Intended to be called by the omap_device code.
1859 */
1860int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1861{
dc6d1cda
PW
1862 unsigned long flags;
1863
1864 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1865 _disable_clocks(oh);
dc6d1cda 1866 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1867
1868 return 0;
1869}
1870
1871/**
1872 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1873 * @oh: struct omap_hwmod *oh
1874 *
1875 * Intended to be called by drivers and core code when all posted
1876 * writes to a device must complete before continuing further
1877 * execution (for example, after clearing some device IRQSTATUS
1878 * register bits)
1879 *
1880 * XXX what about targets with multiple OCP threads?
1881 */
1882void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1883{
1884 BUG_ON(!oh);
1885
43b40992 1886 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1887 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1888 "device configuration\n", oh->name);
1889 return;
1890 }
1891
1892 /*
1893 * Forces posted writes to complete on the OCP thread handling
1894 * register writes
1895 */
cc7a1d2a 1896 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1897}
1898
1899/**
1900 * omap_hwmod_reset - reset the hwmod
1901 * @oh: struct omap_hwmod *
1902 *
1903 * Under some conditions, a driver may wish to reset the entire device.
1904 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1905 * the return value from _reset().
63c85238
PW
1906 */
1907int omap_hwmod_reset(struct omap_hwmod *oh)
1908{
1909 int r;
dc6d1cda 1910 unsigned long flags;
63c85238 1911
9b579114 1912 if (!oh)
63c85238
PW
1913 return -EINVAL;
1914
dc6d1cda 1915 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1916 r = _reset(oh);
dc6d1cda 1917 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1918
1919 return r;
1920}
1921
1922/**
1923 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1924 * @oh: struct omap_hwmod *
1925 * @res: pointer to the first element of an array of struct resource to fill
1926 *
1927 * Count the number of struct resource array elements necessary to
1928 * contain omap_hwmod @oh resources. Intended to be called by code
1929 * that registers omap_devices. Intended to be used to determine the
1930 * size of a dynamically-allocated struct resource array, before
1931 * calling omap_hwmod_fill_resources(). Returns the number of struct
1932 * resource array elements needed.
1933 *
1934 * XXX This code is not optimized. It could attempt to merge adjacent
1935 * resource IDs.
1936 *
1937 */
1938int omap_hwmod_count_resources(struct omap_hwmod *oh)
1939{
1940 int ret, i;
1941
9ee9fff9 1942 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1943
1944 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1945 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1946
1947 return ret;
1948}
1949
1950/**
1951 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1952 * @oh: struct omap_hwmod *
1953 * @res: pointer to the first element of an array of struct resource to fill
1954 *
1955 * Fill the struct resource array @res with resource data from the
1956 * omap_hwmod @oh. Intended to be called by code that registers
1957 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1958 * number of array elements filled.
1959 */
1960int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1961{
1962 int i, j;
1963 int r = 0;
1964
1965 /* For each IRQ, DMA, memory area, fill in array.*/
1966
1967 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1968 (res + r)->name = (oh->mpu_irqs + i)->name;
1969 (res + r)->start = (oh->mpu_irqs + i)->irq;
1970 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1971 (res + r)->flags = IORESOURCE_IRQ;
1972 r++;
1973 }
1974
9ee9fff9
BC
1975 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1976 (res + r)->name = (oh->sdma_reqs + i)->name;
1977 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1978 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
1979 (res + r)->flags = IORESOURCE_DMA;
1980 r++;
1981 }
1982
1983 for (i = 0; i < oh->slaves_cnt; i++) {
1984 struct omap_hwmod_ocp_if *os;
1985
682fdc96 1986 os = oh->slaves[i];
63c85238
PW
1987
1988 for (j = 0; j < os->addr_cnt; j++) {
cd503802 1989 (res + r)->name = (os->addr + j)->name;
63c85238
PW
1990 (res + r)->start = (os->addr + j)->pa_start;
1991 (res + r)->end = (os->addr + j)->pa_end;
1992 (res + r)->flags = IORESOURCE_MEM;
1993 r++;
1994 }
1995 }
1996
1997 return r;
1998}
1999
2000/**
2001 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2002 * @oh: struct omap_hwmod *
2003 *
2004 * Return the powerdomain pointer associated with the OMAP module
2005 * @oh's main clock. If @oh does not have a main clk, return the
2006 * powerdomain associated with the interface clock associated with the
2007 * module's MPU port. (XXX Perhaps this should use the SDMA port
2008 * instead?) Returns NULL on error, or a struct powerdomain * on
2009 * success.
2010 */
2011struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2012{
2013 struct clk *c;
2014
2015 if (!oh)
2016 return NULL;
2017
2018 if (oh->_clk) {
2019 c = oh->_clk;
2020 } else {
2021 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2022 return NULL;
2023 c = oh->slaves[oh->_mpu_port_index]->_clk;
2024 }
2025
d5647c18
TG
2026 if (!c->clkdm)
2027 return NULL;
2028
63c85238
PW
2029 return c->clkdm->pwrdm.ptr;
2030
2031}
2032
db2a60bf
PW
2033/**
2034 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2035 * @oh: struct omap_hwmod *
2036 *
2037 * Returns the virtual address corresponding to the beginning of the
2038 * module's register target, in the address range that is intended to
2039 * be used by the MPU. Returns the virtual address upon success or NULL
2040 * upon error.
2041 */
2042void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2043{
2044 if (!oh)
2045 return NULL;
2046
2047 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2048 return NULL;
2049
2050 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2051 return NULL;
2052
2053 return oh->_mpu_rt_va;
2054}
2055
63c85238
PW
2056/**
2057 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2058 * @oh: struct omap_hwmod *
2059 * @init_oh: struct omap_hwmod * (initiator)
2060 *
2061 * Add a sleep dependency between the initiator @init_oh and @oh.
2062 * Intended to be called by DSP/Bridge code via platform_data for the
2063 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2064 * code needs to add/del initiator dependencies dynamically
2065 * before/after accessing a device. Returns the return value from
2066 * _add_initiator_dep().
2067 *
2068 * XXX Keep a usecount in the clockdomain code
2069 */
2070int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2071 struct omap_hwmod *init_oh)
2072{
2073 return _add_initiator_dep(oh, init_oh);
2074}
2075
2076/*
2077 * XXX what about functions for drivers to save/restore ocp_sysconfig
2078 * for context save/restore operations?
2079 */
2080
2081/**
2082 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2083 * @oh: struct omap_hwmod *
2084 * @init_oh: struct omap_hwmod * (initiator)
2085 *
2086 * Remove a sleep dependency between the initiator @init_oh and @oh.
2087 * Intended to be called by DSP/Bridge code via platform_data for the
2088 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2089 * code needs to add/del initiator dependencies dynamically
2090 * before/after accessing a device. Returns the return value from
2091 * _del_initiator_dep().
2092 *
2093 * XXX Keep a usecount in the clockdomain code
2094 */
2095int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2096 struct omap_hwmod *init_oh)
2097{
2098 return _del_initiator_dep(oh, init_oh);
2099}
2100
63c85238
PW
2101/**
2102 * omap_hwmod_enable_wakeup - allow device to wake up the system
2103 * @oh: struct omap_hwmod *
2104 *
2105 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2106 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2107 * registers to cause the PRCM to receive wakeup events from the
2108 * module. Does not set any wakeup routing registers beyond this
2109 * point - if the module is to wake up any other module or subsystem,
2110 * that must be set separately. Called by omap_device code. Returns
2111 * -EINVAL on error or 0 upon success.
2112 */
2113int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2114{
dc6d1cda 2115 unsigned long flags;
5a7ddcbd 2116 u32 v;
dc6d1cda 2117
43b40992
PW
2118 if (!oh->class->sysc ||
2119 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2120 return -EINVAL;
2121
dc6d1cda 2122 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2123 v = oh->_sysc_cache;
2124 _enable_wakeup(oh, &v);
2125 _write_sysconfig(v, oh);
dc6d1cda 2126 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2127
2128 return 0;
2129}
2130
2131/**
2132 * omap_hwmod_disable_wakeup - prevent device from waking the system
2133 * @oh: struct omap_hwmod *
2134 *
2135 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2136 * from sending wakeups to the PRCM. Eventually this should clear
2137 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2138 * from the module. Does not set any wakeup routing registers beyond
2139 * this point - if the module is to wake up any other module or
2140 * subsystem, that must be set separately. Called by omap_device
2141 * code. Returns -EINVAL on error or 0 upon success.
2142 */
2143int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2144{
dc6d1cda 2145 unsigned long flags;
5a7ddcbd 2146 u32 v;
dc6d1cda 2147
43b40992
PW
2148 if (!oh->class->sysc ||
2149 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2150 return -EINVAL;
2151
dc6d1cda 2152 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2153 v = oh->_sysc_cache;
2154 _disable_wakeup(oh, &v);
2155 _write_sysconfig(v, oh);
dc6d1cda 2156 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2157
2158 return 0;
2159}
43b40992 2160
aee48e3c
PW
2161/**
2162 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2163 * contained in the hwmod module.
2164 * @oh: struct omap_hwmod *
2165 * @name: name of the reset line to lookup and assert
2166 *
2167 * Some IP like dsp, ipu or iva contain processor that require
2168 * an HW reset line to be assert / deassert in order to enable fully
2169 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2170 * yet supported on this OMAP; otherwise, passes along the return value
2171 * from _assert_hardreset().
2172 */
2173int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2174{
2175 int ret;
dc6d1cda 2176 unsigned long flags;
aee48e3c
PW
2177
2178 if (!oh)
2179 return -EINVAL;
2180
dc6d1cda 2181 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2182 ret = _assert_hardreset(oh, name);
dc6d1cda 2183 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2184
2185 return ret;
2186}
2187
2188/**
2189 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2190 * contained in the hwmod module.
2191 * @oh: struct omap_hwmod *
2192 * @name: name of the reset line to look up and deassert
2193 *
2194 * Some IP like dsp, ipu or iva contain processor that require
2195 * an HW reset line to be assert / deassert in order to enable fully
2196 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2197 * yet supported on this OMAP; otherwise, passes along the return value
2198 * from _deassert_hardreset().
2199 */
2200int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2201{
2202 int ret;
dc6d1cda 2203 unsigned long flags;
aee48e3c
PW
2204
2205 if (!oh)
2206 return -EINVAL;
2207
dc6d1cda 2208 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2209 ret = _deassert_hardreset(oh, name);
dc6d1cda 2210 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2211
2212 return ret;
2213}
2214
2215/**
2216 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2217 * contained in the hwmod module
2218 * @oh: struct omap_hwmod *
2219 * @name: name of the reset line to look up and read
2220 *
2221 * Return the current state of the hwmod @oh's reset line named @name:
2222 * returns -EINVAL upon parameter error or if this operation
2223 * is unsupported on the current OMAP; otherwise, passes along the return
2224 * value from _read_hardreset().
2225 */
2226int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2227{
2228 int ret;
dc6d1cda 2229 unsigned long flags;
aee48e3c
PW
2230
2231 if (!oh)
2232 return -EINVAL;
2233
dc6d1cda 2234 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2235 ret = _read_hardreset(oh, name);
dc6d1cda 2236 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2237
2238 return ret;
2239}
2240
2241
43b40992
PW
2242/**
2243 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2244 * @classname: struct omap_hwmod_class name to search for
2245 * @fn: callback function pointer to call for each hwmod in class @classname
2246 * @user: arbitrary context data to pass to the callback function
2247 *
ce35b244
BC
2248 * For each omap_hwmod of class @classname, call @fn.
2249 * If the callback function returns something other than
43b40992
PW
2250 * zero, the iterator is terminated, and the callback function's return
2251 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2252 * if @classname or @fn are NULL, or passes back the error code from @fn.
2253 */
2254int omap_hwmod_for_each_by_class(const char *classname,
2255 int (*fn)(struct omap_hwmod *oh,
2256 void *user),
2257 void *user)
2258{
2259 struct omap_hwmod *temp_oh;
2260 int ret = 0;
2261
2262 if (!classname || !fn)
2263 return -EINVAL;
2264
2265 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2266 __func__, classname);
2267
43b40992
PW
2268 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2269 if (!strcmp(temp_oh->class->name, classname)) {
2270 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2271 __func__, temp_oh->name);
2272 ret = (*fn)(temp_oh, user);
2273 if (ret)
2274 break;
2275 }
2276 }
2277
43b40992
PW
2278 if (ret)
2279 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2280 __func__, ret);
2281
2282 return ret;
2283}
2284
2092e5cc
PW
2285/**
2286 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2287 * @oh: struct omap_hwmod *
2288 * @state: state that _setup() should leave the hwmod in
2289 *
550c8092 2290 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2291 * (called by omap_hwmod_setup_*()). Only valid to call between
2292 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2293 * 0 upon success or -EINVAL if there is a problem with the arguments
2294 * or if the hwmod is in the wrong state.
2092e5cc
PW
2295 */
2296int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2297{
2298 int ret;
dc6d1cda 2299 unsigned long flags;
2092e5cc
PW
2300
2301 if (!oh)
2302 return -EINVAL;
2303
2304 if (state != _HWMOD_STATE_DISABLED &&
2305 state != _HWMOD_STATE_ENABLED &&
2306 state != _HWMOD_STATE_IDLE)
2307 return -EINVAL;
2308
dc6d1cda 2309 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2310
2311 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2312 ret = -EINVAL;
2313 goto ohsps_unlock;
2314 }
2315
2316 oh->_postsetup_state = state;
2317 ret = 0;
2318
2319ohsps_unlock:
dc6d1cda 2320 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2321
2322 return ret;
2323}
c80705aa
KH
2324
2325/**
2326 * omap_hwmod_get_context_loss_count - get lost context count
2327 * @oh: struct omap_hwmod *
2328 *
2329 * Query the powerdomain of of @oh to get the context loss
2330 * count for this device.
2331 *
2332 * Returns the context loss count of the powerdomain assocated with @oh
2333 * upon success, or zero if no powerdomain exists for @oh.
2334 */
2335u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2336{
2337 struct powerdomain *pwrdm;
2338 int ret = 0;
2339
2340 pwrdm = omap_hwmod_get_pwrdm(oh);
2341 if (pwrdm)
2342 ret = pwrdm_get_context_loss_count(pwrdm);
2343
2344 return ret;
2345}
43b01643
PW
2346
2347/**
2348 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2349 * @oh: struct omap_hwmod *
2350 *
2351 * Prevent the hwmod @oh from being reset during the setup process.
2352 * Intended for use by board-*.c files on boards with devices that
2353 * cannot tolerate being reset. Must be called before the hwmod has
2354 * been set up. Returns 0 upon success or negative error code upon
2355 * failure.
2356 */
2357int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2358{
2359 if (!oh)
2360 return -EINVAL;
2361
2362 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2363 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2364 oh->name);
2365 return -EINVAL;
2366 }
2367
2368 oh->flags |= HWMOD_INIT_NO_RESET;
2369
2370 return 0;
2371}