ARM: OMAP2+: hwmod: consolidate finding the MPU port index and storing it
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
63c85238 140
4e65331c 141#include "common.h"
ce491cf8 142#include <plat/cpu.h>
1540f214 143#include "clockdomain.h"
72e06d08 144#include "powerdomain.h"
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145#include <plat/clock.h>
146#include <plat/omap_hwmod.h>
5365efbe 147#include <plat/prcm.h>
63c85238 148
59fb659b 149#include "cm2xxx_3xxx.h"
d0f0631d 150#include "cminst44xx.h"
59fb659b 151#include "prm2xxx_3xxx.h"
d198b514 152#include "prm44xx.h"
eaac329d 153#include "prminst44xx.h"
8d9af88f 154#include "mux.h"
63c85238 155
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156/* Maximum microseconds to wait for OMAP module to softreset */
157#define MAX_MODULE_SOFTRESET_WAIT 10000
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158
159/* Name of the OMAP hwmod for the MPU */
5c2c0296 160#define MPU_INITIATOR_NAME "mpu"
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161
162/* omap_hwmod_list contains all registered struct omap_hwmods */
163static LIST_HEAD(omap_hwmod_list);
164
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165/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
166static struct omap_hwmod *mpu_oh;
167
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168
169/* Private functions */
170
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171/**
172 * _fetch_next_ocp_if - return @i'th OCP interface in an array
173 * @p: ptr to a ptr to the list_head inside the ocp_if to return (not yet used)
174 * @old: ptr to an array of struct omap_hwmod_ocp_if records
175 * @i: pointer to the index into the @old array
176 *
177 * Return a pointer to the next struct omap_hwmod_ocp_if record in a
178 * sequence. Currently returns a struct omap_hwmod_ocp_if record
179 * corresponding to the element index pointed to by @i in the @old
180 * array, and increments the index pointed to by @i.
181 */
182static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
183 struct omap_hwmod_ocp_if **old,
184 int *i)
185{
186 struct omap_hwmod_ocp_if *oi;
187
188 oi = old[*i];
189 *i = *i + 1;
190
191 return oi;
192}
193
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194/**
195 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
196 * @oh: struct omap_hwmod *
197 *
198 * Load the current value of the hwmod OCP_SYSCONFIG register into the
199 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
200 * OCP_SYSCONFIG register or 0 upon success.
201 */
202static int _update_sysc_cache(struct omap_hwmod *oh)
203{
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204 if (!oh->class->sysc) {
205 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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206 return -EINVAL;
207 }
208
209 /* XXX ensure module interface clock is up */
210
cc7a1d2a 211 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 212
43b40992 213 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 214 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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215
216 return 0;
217}
218
219/**
220 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
221 * @v: OCP_SYSCONFIG value to write
222 * @oh: struct omap_hwmod *
223 *
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224 * Write @v into the module class' OCP_SYSCONFIG register, if it has
225 * one. No return value.
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226 */
227static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
228{
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229 if (!oh->class->sysc) {
230 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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231 return;
232 }
233
234 /* XXX ensure module interface clock is up */
235
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236 /* Module might have lost context, always update cache and register */
237 oh->_sysc_cache = v;
238 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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239}
240
241/**
242 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
243 * @oh: struct omap_hwmod *
244 * @standbymode: MIDLEMODE field bits
245 * @v: pointer to register contents to modify
246 *
247 * Update the master standby mode bits in @v to be @standbymode for
248 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
249 * upon error or 0 upon success.
250 */
251static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
252 u32 *v)
253{
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254 u32 mstandby_mask;
255 u8 mstandby_shift;
256
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257 if (!oh->class->sysc ||
258 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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259 return -EINVAL;
260
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261 if (!oh->class->sysc->sysc_fields) {
262 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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263 return -EINVAL;
264 }
265
43b40992 266 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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267 mstandby_mask = (0x3 << mstandby_shift);
268
269 *v &= ~mstandby_mask;
270 *v |= __ffs(standbymode) << mstandby_shift;
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271
272 return 0;
273}
274
275/**
276 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
277 * @oh: struct omap_hwmod *
278 * @idlemode: SIDLEMODE field bits
279 * @v: pointer to register contents to modify
280 *
281 * Update the slave idle mode bits in @v to be @idlemode for the @oh
282 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
283 * or 0 upon success.
284 */
285static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
286{
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287 u32 sidle_mask;
288 u8 sidle_shift;
289
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290 if (!oh->class->sysc ||
291 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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292 return -EINVAL;
293
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294 if (!oh->class->sysc->sysc_fields) {
295 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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296 return -EINVAL;
297 }
298
43b40992 299 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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300 sidle_mask = (0x3 << sidle_shift);
301
302 *v &= ~sidle_mask;
303 *v |= __ffs(idlemode) << sidle_shift;
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304
305 return 0;
306}
307
308/**
309 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
310 * @oh: struct omap_hwmod *
311 * @clockact: CLOCKACTIVITY field bits
312 * @v: pointer to register contents to modify
313 *
314 * Update the clockactivity mode bits in @v to be @clockact for the
315 * @oh hwmod. Used for additional powersaving on some modules. Does
316 * not write to the hardware. Returns -EINVAL upon error or 0 upon
317 * success.
318 */
319static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
320{
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TG
321 u32 clkact_mask;
322 u8 clkact_shift;
323
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324 if (!oh->class->sysc ||
325 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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326 return -EINVAL;
327
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328 if (!oh->class->sysc->sysc_fields) {
329 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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330 return -EINVAL;
331 }
332
43b40992 333 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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334 clkact_mask = (0x3 << clkact_shift);
335
336 *v &= ~clkact_mask;
337 *v |= clockact << clkact_shift;
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338
339 return 0;
340}
341
342/**
343 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
344 * @oh: struct omap_hwmod *
345 * @v: pointer to register contents to modify
346 *
347 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
348 * error or 0 upon success.
349 */
350static int _set_softreset(struct omap_hwmod *oh, u32 *v)
351{
358f0e63
TG
352 u32 softrst_mask;
353
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354 if (!oh->class->sysc ||
355 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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356 return -EINVAL;
357
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358 if (!oh->class->sysc->sysc_fields) {
359 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
360 return -EINVAL;
361 }
362
43b40992 363 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
364
365 *v |= softrst_mask;
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366
367 return 0;
368}
369
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370/**
371 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
372 * @oh: struct omap_hwmod *
373 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
374 * @v: pointer to register contents to modify
375 *
376 * Update the module autoidle bit in @v to be @autoidle for the @oh
377 * hwmod. The autoidle bit controls whether the module can gate
378 * internal clocks automatically when it isn't doing anything; the
379 * exact function of this bit varies on a per-module basis. This
380 * function does not write to the hardware. Returns -EINVAL upon
381 * error or 0 upon success.
382 */
383static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
384 u32 *v)
385{
358f0e63
TG
386 u32 autoidle_mask;
387 u8 autoidle_shift;
388
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389 if (!oh->class->sysc ||
390 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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391 return -EINVAL;
392
43b40992
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393 if (!oh->class->sysc->sysc_fields) {
394 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
395 return -EINVAL;
396 }
397
43b40992 398 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 399 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
400
401 *v &= ~autoidle_mask;
402 *v |= autoidle << autoidle_shift;
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403
404 return 0;
405}
406
eceec009
G
407/**
408 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
409 * @oh: struct omap_hwmod *
410 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
411 *
412 * Set or clear the I/O pad wakeup flag in the mux entries for the
413 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
414 * in memory. If the hwmod is currently idled, and the new idle
415 * values don't match the previous ones, this function will also
416 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
417 * currently idled, this function won't touch the hardware: the new
418 * mux settings are written to the SCM PADCTRL registers when the
419 * hwmod is idled. No return value.
420 */
421static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
422{
423 struct omap_device_pad *pad;
424 bool change = false;
425 u16 prev_idle;
426 int j;
427
428 if (!oh->mux || !oh->mux->enabled)
429 return;
430
431 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
432 pad = oh->mux->pads_dynamic[j];
433
434 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
435 continue;
436
437 prev_idle = pad->idle;
438
439 if (set_wake)
440 pad->idle |= OMAP_WAKEUP_EN;
441 else
442 pad->idle &= ~OMAP_WAKEUP_EN;
443
444 if (prev_idle != pad->idle)
445 change = true;
446 }
447
448 if (change && oh->_state == _HWMOD_STATE_IDLE)
449 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
450}
451
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452/**
453 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
454 * @oh: struct omap_hwmod *
455 *
456 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
457 * upon error or 0 upon success.
458 */
5a7ddcbd 459static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 460{
43b40992 461 if (!oh->class->sysc ||
86009eb3 462 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
463 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
464 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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465 return -EINVAL;
466
43b40992
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467 if (!oh->class->sysc->sysc_fields) {
468 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
469 return -EINVAL;
470 }
471
1fe74113
BC
472 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
473 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 474
86009eb3
BC
475 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
476 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
477 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
478 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 479
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480 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
481
482 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
483
484 return 0;
485}
486
487/**
488 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
489 * @oh: struct omap_hwmod *
490 *
491 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
492 * upon error or 0 upon success.
493 */
5a7ddcbd 494static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 495{
43b40992 496 if (!oh->class->sysc ||
86009eb3 497 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
498 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
499 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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PW
500 return -EINVAL;
501
43b40992
PW
502 if (!oh->class->sysc->sysc_fields) {
503 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
504 return -EINVAL;
505 }
506
1fe74113
BC
507 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
508 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 509
86009eb3
BC
510 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
511 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
512 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
513 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 514
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515 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
516
517 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
518
519 return 0;
520}
521
522/**
523 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
524 * @oh: struct omap_hwmod *
525 *
526 * Prevent the hardware module @oh from entering idle while the
527 * hardare module initiator @init_oh is active. Useful when a module
528 * will be accessed by a particular initiator (e.g., if a module will
529 * be accessed by the IVA, there should be a sleepdep between the IVA
530 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
531 * mode. If the clockdomain is marked as not needing autodeps, return
532 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
533 * passes along clkdm_add_sleepdep() value upon success.
63c85238
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534 */
535static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
536{
537 if (!oh->_clk)
538 return -EINVAL;
539
570b54c7
PW
540 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
541 return 0;
542
55ed9694 543 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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544}
545
546/**
547 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
548 * @oh: struct omap_hwmod *
549 *
550 * Allow the hardware module @oh to enter idle while the hardare
551 * module initiator @init_oh is active. Useful when a module will not
552 * be accessed by a particular initiator (e.g., if a module will not
553 * be accessed by the IVA, there should be no sleepdep between the IVA
554 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
555 * mode. If the clockdomain is marked as not needing autodeps, return
556 * 0 without doing anything. Returns -EINVAL upon error or passes
557 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
558 */
559static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
560{
561 if (!oh->_clk)
562 return -EINVAL;
563
570b54c7
PW
564 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
565 return 0;
566
55ed9694 567 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
568}
569
570/**
571 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
572 * @oh: struct omap_hwmod *
573 *
574 * Called from _init_clocks(). Populates the @oh _clk (main
575 * functional clock pointer) if a main_clk is present. Returns 0 on
576 * success or -EINVAL on error.
577 */
578static int _init_main_clk(struct omap_hwmod *oh)
579{
63c85238
PW
580 int ret = 0;
581
50ebdac2 582 if (!oh->main_clk)
63c85238
PW
583 return 0;
584
63403384 585 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 586 if (!oh->_clk) {
20383d82
BC
587 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
588 oh->name, oh->main_clk);
63403384 589 return -EINVAL;
dc75925d 590 }
63c85238 591
63403384
BC
592 if (!oh->_clk->clkdm)
593 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
594 oh->main_clk, oh->_clk->name);
81d7c6ff 595
63c85238
PW
596 return ret;
597}
598
599/**
887adeac 600 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
601 * @oh: struct omap_hwmod *
602 *
603 * Called from _init_clocks(). Populates the @oh OCP slave interface
604 * clock pointers. Returns 0 on success or -EINVAL on error.
605 */
606static int _init_interface_clks(struct omap_hwmod *oh)
607{
5d95dde7 608 struct omap_hwmod_ocp_if *os;
63c85238 609 struct clk *c;
5d95dde7 610 int i = 0;
63c85238
PW
611 int ret = 0;
612
5d95dde7
PW
613 while (i < oh->slaves_cnt) {
614 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
50ebdac2 615 if (!os->clk)
63c85238
PW
616 continue;
617
50ebdac2 618 c = omap_clk_get_by_name(os->clk);
dc75925d 619 if (!c) {
20383d82
BC
620 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
621 oh->name, os->clk);
63c85238 622 ret = -EINVAL;
dc75925d 623 }
63c85238
PW
624 os->_clk = c;
625 }
626
627 return ret;
628}
629
630/**
631 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
632 * @oh: struct omap_hwmod *
633 *
634 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
635 * clock pointers. Returns 0 on success or -EINVAL on error.
636 */
637static int _init_opt_clks(struct omap_hwmod *oh)
638{
639 struct omap_hwmod_opt_clk *oc;
640 struct clk *c;
641 int i;
642 int ret = 0;
643
644 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 645 c = omap_clk_get_by_name(oc->clk);
dc75925d 646 if (!c) {
20383d82
BC
647 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
648 oh->name, oc->clk);
63c85238 649 ret = -EINVAL;
dc75925d 650 }
63c85238
PW
651 oc->_clk = c;
652 }
653
654 return ret;
655}
656
657/**
658 * _enable_clocks - enable hwmod main clock and interface clocks
659 * @oh: struct omap_hwmod *
660 *
661 * Enables all clocks necessary for register reads and writes to succeed
662 * on the hwmod @oh. Returns 0.
663 */
664static int _enable_clocks(struct omap_hwmod *oh)
665{
5d95dde7
PW
666 struct omap_hwmod_ocp_if *os;
667 int i = 0;
63c85238
PW
668
669 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
670
4d3ae5a9 671 if (oh->_clk)
63c85238
PW
672 clk_enable(oh->_clk);
673
5d95dde7
PW
674 while (i < oh->slaves_cnt) {
675 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
63c85238 676
5d95dde7
PW
677 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
678 clk_enable(os->_clk);
63c85238
PW
679 }
680
681 /* The opt clocks are controlled by the device driver. */
682
683 return 0;
684}
685
686/**
687 * _disable_clocks - disable hwmod main clock and interface clocks
688 * @oh: struct omap_hwmod *
689 *
690 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
691 */
692static int _disable_clocks(struct omap_hwmod *oh)
693{
5d95dde7
PW
694 struct omap_hwmod_ocp_if *os;
695 int i = 0;
63c85238
PW
696
697 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
698
4d3ae5a9 699 if (oh->_clk)
63c85238
PW
700 clk_disable(oh->_clk);
701
5d95dde7
PW
702 while (i < oh->slaves_cnt) {
703 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
63c85238 704
5d95dde7
PW
705 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
706 clk_disable(os->_clk);
63c85238
PW
707 }
708
709 /* The opt clocks are controlled by the device driver. */
710
711 return 0;
712}
713
96835af9
BC
714static void _enable_optional_clocks(struct omap_hwmod *oh)
715{
716 struct omap_hwmod_opt_clk *oc;
717 int i;
718
719 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
720
721 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
722 if (oc->_clk) {
723 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
724 oc->_clk->name);
725 clk_enable(oc->_clk);
726 }
727}
728
729static void _disable_optional_clocks(struct omap_hwmod *oh)
730{
731 struct omap_hwmod_opt_clk *oc;
732 int i;
733
734 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
735
736 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
737 if (oc->_clk) {
738 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
739 oc->_clk->name);
740 clk_disable(oc->_clk);
741 }
742}
743
45c38252
BC
744/**
745 * _enable_module - enable CLKCTRL modulemode on OMAP4
746 * @oh: struct omap_hwmod *
747 *
748 * Enables the PRCM module mode related to the hwmod @oh.
749 * No return value.
750 */
751static void _enable_module(struct omap_hwmod *oh)
752{
753 /* The module mode does not exist prior OMAP4 */
754 if (cpu_is_omap24xx() || cpu_is_omap34xx())
755 return;
756
757 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
758 return;
759
760 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
761 oh->name, oh->prcm.omap4.modulemode);
762
763 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
764 oh->clkdm->prcm_partition,
765 oh->clkdm->cm_inst,
766 oh->clkdm->clkdm_offs,
767 oh->prcm.omap4.clkctrl_offs);
768}
769
770/**
bfc141e3
BC
771 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
772 * @oh: struct omap_hwmod *
773 *
774 * Wait for a module @oh to enter slave idle. Returns 0 if the module
775 * does not have an IDLEST bit or if the module successfully enters
776 * slave idle; otherwise, pass along the return value of the
777 * appropriate *_cm*_wait_module_idle() function.
778 */
779static int _omap4_wait_target_disable(struct omap_hwmod *oh)
780{
781 if (!cpu_is_omap44xx())
782 return 0;
783
784 if (!oh)
785 return -EINVAL;
786
787 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
788 return 0;
789
790 if (oh->flags & HWMOD_NO_IDLEST)
791 return 0;
792
793 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
794 oh->clkdm->cm_inst,
795 oh->clkdm->clkdm_offs,
796 oh->prcm.omap4.clkctrl_offs);
797}
798
212738a4
PW
799/**
800 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
801 * @oh: struct omap_hwmod *oh
802 *
803 * Count and return the number of MPU IRQs associated with the hwmod
804 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
805 * NULL.
806 */
807static int _count_mpu_irqs(struct omap_hwmod *oh)
808{
809 struct omap_hwmod_irq_info *ohii;
810 int i = 0;
811
812 if (!oh || !oh->mpu_irqs)
813 return 0;
814
815 do {
816 ohii = &oh->mpu_irqs[i++];
817 } while (ohii->irq != -1);
818
cc1b0765 819 return i-1;
212738a4
PW
820}
821
bc614958
PW
822/**
823 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
824 * @oh: struct omap_hwmod *oh
825 *
826 * Count and return the number of SDMA request lines associated with
827 * the hwmod @oh. Used to allocate struct resource data. Returns 0
828 * if @oh is NULL.
829 */
830static int _count_sdma_reqs(struct omap_hwmod *oh)
831{
832 struct omap_hwmod_dma_info *ohdi;
833 int i = 0;
834
835 if (!oh || !oh->sdma_reqs)
836 return 0;
837
838 do {
839 ohdi = &oh->sdma_reqs[i++];
840 } while (ohdi->dma_req != -1);
841
cc1b0765 842 return i-1;
bc614958
PW
843}
844
78183f3f
PW
845/**
846 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
847 * @oh: struct omap_hwmod *oh
848 *
849 * Count and return the number of address space ranges associated with
850 * the hwmod @oh. Used to allocate struct resource data. Returns 0
851 * if @oh is NULL.
852 */
853static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
854{
855 struct omap_hwmod_addr_space *mem;
856 int i = 0;
857
858 if (!os || !os->addr)
859 return 0;
860
861 do {
862 mem = &os->addr[i++];
863 } while (mem->pa_start != mem->pa_end);
864
cc1b0765 865 return i-1;
78183f3f
PW
866}
867
5e8370f1
PW
868/**
869 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
870 * @oh: struct omap_hwmod * to operate on
871 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
872 * @irq: pointer to an unsigned int to store the MPU IRQ number to
873 *
874 * Retrieve a MPU hardware IRQ line number named by @name associated
875 * with the IP block pointed to by @oh. The IRQ number will be filled
876 * into the address pointed to by @dma. When @name is non-null, the
877 * IRQ line number associated with the named entry will be returned.
878 * If @name is null, the first matching entry will be returned. Data
879 * order is not meaningful in hwmod data, so callers are strongly
880 * encouraged to use a non-null @name whenever possible to avoid
881 * unpredictable effects if hwmod data is later added that causes data
882 * ordering to change. Returns 0 upon success or a negative error
883 * code upon error.
884 */
885static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
886 unsigned int *irq)
887{
888 int i;
889 bool found = false;
890
891 if (!oh->mpu_irqs)
892 return -ENOENT;
893
894 i = 0;
895 while (oh->mpu_irqs[i].irq != -1) {
896 if (name == oh->mpu_irqs[i].name ||
897 !strcmp(name, oh->mpu_irqs[i].name)) {
898 found = true;
899 break;
900 }
901 i++;
902 }
903
904 if (!found)
905 return -ENOENT;
906
907 *irq = oh->mpu_irqs[i].irq;
908
909 return 0;
910}
911
912/**
913 * _get_sdma_req_by_name - fetch SDMA request line ID by name
914 * @oh: struct omap_hwmod * to operate on
915 * @name: pointer to the name of the SDMA request line to fetch (optional)
916 * @dma: pointer to an unsigned int to store the request line ID to
917 *
918 * Retrieve an SDMA request line ID named by @name on the IP block
919 * pointed to by @oh. The ID will be filled into the address pointed
920 * to by @dma. When @name is non-null, the request line ID associated
921 * with the named entry will be returned. If @name is null, the first
922 * matching entry will be returned. Data order is not meaningful in
923 * hwmod data, so callers are strongly encouraged to use a non-null
924 * @name whenever possible to avoid unpredictable effects if hwmod
925 * data is later added that causes data ordering to change. Returns 0
926 * upon success or a negative error code upon error.
927 */
928static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
929 unsigned int *dma)
930{
931 int i;
932 bool found = false;
933
934 if (!oh->sdma_reqs)
935 return -ENOENT;
936
937 i = 0;
938 while (oh->sdma_reqs[i].dma_req != -1) {
939 if (name == oh->sdma_reqs[i].name ||
940 !strcmp(name, oh->sdma_reqs[i].name)) {
941 found = true;
942 break;
943 }
944 i++;
945 }
946
947 if (!found)
948 return -ENOENT;
949
950 *dma = oh->sdma_reqs[i].dma_req;
951
952 return 0;
953}
954
955/**
956 * _get_addr_space_by_name - fetch address space start & end by name
957 * @oh: struct omap_hwmod * to operate on
958 * @name: pointer to the name of the address space to fetch (optional)
959 * @pa_start: pointer to a u32 to store the starting address to
960 * @pa_end: pointer to a u32 to store the ending address to
961 *
962 * Retrieve address space start and end addresses for the IP block
963 * pointed to by @oh. The data will be filled into the addresses
964 * pointed to by @pa_start and @pa_end. When @name is non-null, the
965 * address space data associated with the named entry will be
966 * returned. If @name is null, the first matching entry will be
967 * returned. Data order is not meaningful in hwmod data, so callers
968 * are strongly encouraged to use a non-null @name whenever possible
969 * to avoid unpredictable effects if hwmod data is later added that
970 * causes data ordering to change. Returns 0 upon success or a
971 * negative error code upon error.
972 */
973static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
974 u32 *pa_start, u32 *pa_end)
975{
976 int i, j;
977 struct omap_hwmod_ocp_if *os;
978 bool found = false;
979
5d95dde7
PW
980 i = 0;
981 while (i < oh->slaves_cnt) {
982 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
5e8370f1
PW
983
984 if (!os->addr)
985 return -ENOENT;
986
987 j = 0;
988 while (os->addr[j].pa_start != os->addr[j].pa_end) {
989 if (name == os->addr[j].name ||
990 !strcmp(name, os->addr[j].name)) {
991 found = true;
992 break;
993 }
994 j++;
995 }
996
997 if (found)
998 break;
999 }
1000
1001 if (!found)
1002 return -ENOENT;
1003
1004 *pa_start = os->addr[j].pa_start;
1005 *pa_end = os->addr[j].pa_end;
1006
1007 return 0;
1008}
1009
63c85238 1010/**
24dbc213 1011 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1012 * @oh: struct omap_hwmod *
1013 *
24dbc213
PW
1014 * Determines the array index of the OCP slave port that the MPU uses
1015 * to address the device, and saves it into the struct omap_hwmod.
1016 * Intended to be called during hwmod registration only. No return
1017 * value.
63c85238 1018 */
24dbc213 1019static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1020{
24dbc213 1021 struct omap_hwmod_ocp_if *os = NULL;
5d95dde7 1022 int i = 0;
63c85238 1023
5d95dde7 1024 if (!oh)
24dbc213
PW
1025 return;
1026
1027 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1028
5d95dde7
PW
1029 while (i < oh->slaves_cnt) {
1030 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
63c85238 1031 if (os->user & OCP_USER_MPU) {
24dbc213
PW
1032 oh->_mpu_port_index = i - 1;
1033 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1034 break;
1035 }
1036 }
1037
24dbc213 1038 return;
63c85238
PW
1039}
1040
2d6141ba
PW
1041/**
1042 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1043 * @oh: struct omap_hwmod *
1044 *
1045 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1046 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1047 * communicate with the IP block. This interface need not be directly
1048 * connected to the MPU (and almost certainly is not), but is directly
1049 * connected to the IP block represented by @oh. Returns a pointer
1050 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1051 * error or if there does not appear to be a path from the MPU to this
1052 * IP block.
1053 */
1054static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1055{
1056 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1057 return NULL;
1058
1059 return oh->slaves[oh->_mpu_port_index];
1060};
1061
63c85238 1062/**
c9aafd23 1063 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1064 * @oh: struct omap_hwmod *
1065 *
c9aafd23
PW
1066 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1067 * the register target MPU address space; or returns NULL upon error.
63c85238 1068 */
c9aafd23 1069static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1070{
1071 struct omap_hwmod_ocp_if *os;
1072 struct omap_hwmod_addr_space *mem;
c9aafd23 1073 int found = 0, i = 0;
63c85238 1074
2d6141ba 1075 os = _find_mpu_rt_port(oh);
24dbc213 1076 if (!os || !os->addr)
78183f3f
PW
1077 return NULL;
1078
1079 do {
1080 mem = &os->addr[i++];
1081 if (mem->flags & ADDR_TYPE_RT)
63c85238 1082 found = 1;
78183f3f 1083 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1084
c9aafd23 1085 return (found) ? mem : NULL;
63c85238
PW
1086}
1087
1088/**
74ff3a68 1089 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1090 * @oh: struct omap_hwmod *
1091 *
1092 * If module is marked as SWSUP_SIDLE, force the module out of slave
1093 * idle; otherwise, configure it for smart-idle. If module is marked
1094 * as SWSUP_MSUSPEND, force the module out of master standby;
1095 * otherwise, configure it for smart-standby. No return value.
1096 */
74ff3a68 1097static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1098{
43b40992 1099 u8 idlemode, sf;
63c85238
PW
1100 u32 v;
1101
43b40992 1102 if (!oh->class->sysc)
63c85238
PW
1103 return;
1104
1105 v = oh->_sysc_cache;
43b40992 1106 sf = oh->class->sysc->sysc_flags;
63c85238 1107
43b40992 1108 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1109 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1110 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1111 _set_slave_idlemode(oh, idlemode, &v);
1112 }
1113
43b40992 1114 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1115 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1116 idlemode = HWMOD_IDLEMODE_NO;
1117 } else {
1118 if (sf & SYSC_HAS_ENAWAKEUP)
1119 _enable_wakeup(oh, &v);
1120 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1121 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1122 else
1123 idlemode = HWMOD_IDLEMODE_SMART;
1124 }
63c85238
PW
1125 _set_master_standbymode(oh, idlemode, &v);
1126 }
1127
a16b1f7f
PW
1128 /*
1129 * XXX The clock framework should handle this, by
1130 * calling into this code. But this must wait until the
1131 * clock structures are tagged with omap_hwmod entries
1132 */
43b40992
PW
1133 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1134 (sf & SYSC_HAS_CLOCKACTIVITY))
1135 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1136
9980ce53
RN
1137 /* If slave is in SMARTIDLE, also enable wakeup */
1138 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1139 _enable_wakeup(oh, &v);
1140
1141 _write_sysconfig(v, oh);
78f26e87
HH
1142
1143 /*
1144 * Set the autoidle bit only after setting the smartidle bit
1145 * Setting this will not have any impact on the other modules.
1146 */
1147 if (sf & SYSC_HAS_AUTOIDLE) {
1148 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1149 0 : 1;
1150 _set_module_autoidle(oh, idlemode, &v);
1151 _write_sysconfig(v, oh);
1152 }
63c85238
PW
1153}
1154
1155/**
74ff3a68 1156 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1157 * @oh: struct omap_hwmod *
1158 *
1159 * If module is marked as SWSUP_SIDLE, force the module into slave
1160 * idle; otherwise, configure it for smart-idle. If module is marked
1161 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1162 * configure it for smart-standby. No return value.
1163 */
74ff3a68 1164static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1165{
43b40992 1166 u8 idlemode, sf;
63c85238
PW
1167 u32 v;
1168
43b40992 1169 if (!oh->class->sysc)
63c85238
PW
1170 return;
1171
1172 v = oh->_sysc_cache;
43b40992 1173 sf = oh->class->sysc->sysc_flags;
63c85238 1174
43b40992 1175 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1176 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1177 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1178 _set_slave_idlemode(oh, idlemode, &v);
1179 }
1180
43b40992 1181 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1182 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1183 idlemode = HWMOD_IDLEMODE_FORCE;
1184 } else {
1185 if (sf & SYSC_HAS_ENAWAKEUP)
1186 _enable_wakeup(oh, &v);
1187 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1188 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1189 else
1190 idlemode = HWMOD_IDLEMODE_SMART;
1191 }
63c85238
PW
1192 _set_master_standbymode(oh, idlemode, &v);
1193 }
1194
86009eb3
BC
1195 /* If slave is in SMARTIDLE, also enable wakeup */
1196 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1197 _enable_wakeup(oh, &v);
1198
63c85238
PW
1199 _write_sysconfig(v, oh);
1200}
1201
1202/**
74ff3a68 1203 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1204 * @oh: struct omap_hwmod *
1205 *
1206 * Force the module into slave idle and master suspend. No return
1207 * value.
1208 */
74ff3a68 1209static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1210{
1211 u32 v;
43b40992 1212 u8 sf;
63c85238 1213
43b40992 1214 if (!oh->class->sysc)
63c85238
PW
1215 return;
1216
1217 v = oh->_sysc_cache;
43b40992 1218 sf = oh->class->sysc->sysc_flags;
63c85238 1219
43b40992 1220 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1221 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1222
43b40992 1223 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1224 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1225
43b40992 1226 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1227 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1228
1229 _write_sysconfig(v, oh);
1230}
1231
1232/**
1233 * _lookup - find an omap_hwmod by name
1234 * @name: find an omap_hwmod by name
1235 *
1236 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1237 */
1238static struct omap_hwmod *_lookup(const char *name)
1239{
1240 struct omap_hwmod *oh, *temp_oh;
1241
1242 oh = NULL;
1243
1244 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1245 if (!strcmp(name, temp_oh->name)) {
1246 oh = temp_oh;
1247 break;
1248 }
1249 }
1250
1251 return oh;
1252}
6ae76997
BC
1253/**
1254 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1255 * @oh: struct omap_hwmod *
1256 *
1257 * Convert a clockdomain name stored in a struct omap_hwmod into a
1258 * clockdomain pointer, and save it into the struct omap_hwmod.
1259 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1260 */
1261static int _init_clkdm(struct omap_hwmod *oh)
1262{
1263 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1264 return 0;
1265
1266 if (!oh->clkdm_name) {
1267 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1268 return -EINVAL;
1269 }
1270
1271 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1272 if (!oh->clkdm) {
1273 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1274 oh->name, oh->clkdm_name);
1275 return -EINVAL;
1276 }
1277
1278 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1279 oh->name, oh->clkdm_name);
1280
1281 return 0;
1282}
63c85238
PW
1283
1284/**
6ae76997
BC
1285 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1286 * well the clockdomain.
63c85238 1287 * @oh: struct omap_hwmod *
97d60162 1288 * @data: not used; pass NULL
63c85238 1289 *
a2debdbd 1290 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1291 * Resolves all clock names embedded in the hwmod. Returns 0 on
1292 * success, or a negative error code on failure.
63c85238 1293 */
97d60162 1294static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1295{
1296 int ret = 0;
1297
48d54f3f
PW
1298 if (oh->_state != _HWMOD_STATE_REGISTERED)
1299 return 0;
63c85238
PW
1300
1301 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1302
1303 ret |= _init_main_clk(oh);
1304 ret |= _init_interface_clks(oh);
1305 ret |= _init_opt_clks(oh);
6ae76997 1306 ret |= _init_clkdm(oh);
63c85238 1307
f5c1f84b
BC
1308 if (!ret)
1309 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1310 else
1311 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1312
09c35f2f 1313 return ret;
63c85238
PW
1314}
1315
1316/**
1317 * _wait_target_ready - wait for a module to leave slave idle
1318 * @oh: struct omap_hwmod *
1319 *
1320 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1321 * does not have an IDLEST bit or if the module successfully leaves
1322 * slave idle; otherwise, pass along the return value of the
d0f0631d 1323 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1324 */
1325static int _wait_target_ready(struct omap_hwmod *oh)
1326{
1327 struct omap_hwmod_ocp_if *os;
1328 int ret;
1329
1330 if (!oh)
1331 return -EINVAL;
1332
2d6141ba 1333 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1334 return 0;
1335
2d6141ba
PW
1336 os = _find_mpu_rt_port(oh);
1337 if (!os)
63c85238
PW
1338 return 0;
1339
1340 /* XXX check module SIDLEMODE */
1341
1342 /* XXX check clock enable states */
1343
1344 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1345 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1346 oh->prcm.omap2.idlest_reg_id,
1347 oh->prcm.omap2.idlest_idle_bit);
63c85238 1348 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1349 if (!oh->clkdm)
1350 return -EINVAL;
1351
1352 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1353 oh->clkdm->cm_inst,
1354 oh->clkdm->clkdm_offs,
1355 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1356 } else {
1357 BUG();
1358 };
1359
1360 return ret;
1361}
1362
5365efbe 1363/**
cc1226e7 1364 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1365 * @oh: struct omap_hwmod *
1366 * @name: name of the reset line in the context of this hwmod
cc1226e7 1367 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1368 *
1369 * Return the bit position of the reset line that match the
1370 * input name. Return -ENOENT if not found.
1371 */
cc1226e7 1372static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1373 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1374{
1375 int i;
1376
1377 for (i = 0; i < oh->rst_lines_cnt; i++) {
1378 const char *rst_line = oh->rst_lines[i].name;
1379 if (!strcmp(rst_line, name)) {
cc1226e7 1380 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1381 ohri->st_shift = oh->rst_lines[i].st_shift;
1382 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1383 oh->name, __func__, rst_line, ohri->rst_shift,
1384 ohri->st_shift);
5365efbe 1385
cc1226e7 1386 return 0;
5365efbe
BC
1387 }
1388 }
1389
1390 return -ENOENT;
1391}
1392
1393/**
1394 * _assert_hardreset - assert the HW reset line of submodules
1395 * contained in the hwmod module.
1396 * @oh: struct omap_hwmod *
1397 * @name: name of the reset line to lookup and assert
1398 *
1399 * Some IP like dsp, ipu or iva contain processor that require
1400 * an HW reset line to be assert / deassert in order to enable fully
1401 * the IP.
1402 */
1403static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1404{
cc1226e7 1405 struct omap_hwmod_rst_info ohri;
1406 u8 ret;
5365efbe
BC
1407
1408 if (!oh)
1409 return -EINVAL;
1410
cc1226e7 1411 ret = _lookup_hardreset(oh, name, &ohri);
1412 if (IS_ERR_VALUE(ret))
1413 return ret;
5365efbe
BC
1414
1415 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1416 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1417 ohri.rst_shift);
5365efbe 1418 else if (cpu_is_omap44xx())
eaac329d
BC
1419 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1420 oh->clkdm->pwrdm.ptr->prcm_partition,
1421 oh->clkdm->pwrdm.ptr->prcm_offs,
1422 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1423 else
1424 return -EINVAL;
1425}
1426
1427/**
1428 * _deassert_hardreset - deassert the HW reset line of submodules contained
1429 * in the hwmod module.
1430 * @oh: struct omap_hwmod *
1431 * @name: name of the reset line to look up and deassert
1432 *
1433 * Some IP like dsp, ipu or iva contain processor that require
1434 * an HW reset line to be assert / deassert in order to enable fully
1435 * the IP.
1436 */
1437static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1438{
cc1226e7 1439 struct omap_hwmod_rst_info ohri;
1440 int ret;
5365efbe
BC
1441
1442 if (!oh)
1443 return -EINVAL;
1444
cc1226e7 1445 ret = _lookup_hardreset(oh, name, &ohri);
1446 if (IS_ERR_VALUE(ret))
1447 return ret;
5365efbe 1448
cc1226e7 1449 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1450 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1451 ohri.rst_shift,
1452 ohri.st_shift);
1453 } else if (cpu_is_omap44xx()) {
1454 if (ohri.st_shift)
1455 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1456 oh->name, name);
eaac329d
BC
1457 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1458 oh->clkdm->pwrdm.ptr->prcm_partition,
1459 oh->clkdm->pwrdm.ptr->prcm_offs,
1460 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1461 } else {
5365efbe 1462 return -EINVAL;
cc1226e7 1463 }
5365efbe 1464
cc1226e7 1465 if (ret == -EBUSY)
5365efbe
BC
1466 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1467
cc1226e7 1468 return ret;
5365efbe
BC
1469}
1470
1471/**
1472 * _read_hardreset - read the HW reset line state of submodules
1473 * contained in the hwmod module
1474 * @oh: struct omap_hwmod *
1475 * @name: name of the reset line to look up and read
1476 *
1477 * Return the state of the reset line.
1478 */
1479static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1480{
cc1226e7 1481 struct omap_hwmod_rst_info ohri;
1482 u8 ret;
5365efbe
BC
1483
1484 if (!oh)
1485 return -EINVAL;
1486
cc1226e7 1487 ret = _lookup_hardreset(oh, name, &ohri);
1488 if (IS_ERR_VALUE(ret))
1489 return ret;
5365efbe
BC
1490
1491 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1492 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1493 ohri.st_shift);
5365efbe 1494 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1495 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1496 oh->clkdm->pwrdm.ptr->prcm_partition,
1497 oh->clkdm->pwrdm.ptr->prcm_offs,
1498 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1499 } else {
1500 return -EINVAL;
1501 }
1502}
1503
747834ab
PW
1504/**
1505 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1506 * @oh: struct omap_hwmod *
1507 *
1508 * If any hardreset line associated with @oh is asserted, then return true.
1509 * Otherwise, if @oh has no hardreset lines associated with it, or if
1510 * no hardreset lines associated with @oh are asserted, then return false.
1511 * This function is used to avoid executing some parts of the IP block
1512 * enable/disable sequence if a hardreset line is set.
1513 */
1514static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1515{
1516 int i;
1517
1518 if (oh->rst_lines_cnt == 0)
1519 return false;
1520
1521 for (i = 0; i < oh->rst_lines_cnt; i++)
1522 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1523 return true;
1524
1525 return false;
1526}
1527
1528/**
1529 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1530 * @oh: struct omap_hwmod *
1531 *
1532 * Disable the PRCM module mode related to the hwmod @oh.
1533 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1534 */
1535static int _omap4_disable_module(struct omap_hwmod *oh)
1536{
1537 int v;
1538
1539 /* The module mode does not exist prior OMAP4 */
1540 if (!cpu_is_omap44xx())
1541 return -EINVAL;
1542
1543 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1544 return -EINVAL;
1545
1546 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1547
1548 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1549 oh->clkdm->cm_inst,
1550 oh->clkdm->clkdm_offs,
1551 oh->prcm.omap4.clkctrl_offs);
1552
1553 if (_are_any_hardreset_lines_asserted(oh))
1554 return 0;
1555
1556 v = _omap4_wait_target_disable(oh);
1557 if (v)
1558 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1559 oh->name);
1560
1561 return 0;
1562}
1563
63c85238 1564/**
bd36179e 1565 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1566 * @oh: struct omap_hwmod *
1567 *
1568 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1569 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1570 * reset this way, -EINVAL if the hwmod is in the wrong state,
1571 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1572 *
1573 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1574 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1575 * use the SYSCONFIG softreset bit to provide the status.
1576 *
bd36179e
PW
1577 * Note that some IP like McBSP do have reset control but don't have
1578 * reset status.
63c85238 1579 */
bd36179e 1580static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1581{
387ca5bf 1582 u32 v, softrst_mask;
6f8b7ff5 1583 int c = 0;
96835af9 1584 int ret = 0;
63c85238 1585
43b40992 1586 if (!oh->class->sysc ||
2cb06814 1587 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1588 return -ENOENT;
63c85238
PW
1589
1590 /* clocks must be on for this operation */
1591 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1592 pr_warning("omap_hwmod: %s: reset can only be entered from "
1593 "enabled state\n", oh->name);
63c85238
PW
1594 return -EINVAL;
1595 }
1596
96835af9
BC
1597 /* For some modules, all optionnal clocks need to be enabled as well */
1598 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1599 _enable_optional_clocks(oh);
1600
bd36179e 1601 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1602
1603 v = oh->_sysc_cache;
96835af9
BC
1604 ret = _set_softreset(oh, &v);
1605 if (ret)
1606 goto dis_opt_clks;
63c85238
PW
1607 _write_sysconfig(v, oh);
1608
d99de7f5
FGL
1609 if (oh->class->sysc->srst_udelay)
1610 udelay(oh->class->sysc->srst_udelay);
1611
2cb06814 1612 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1613 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1614 oh->class->sysc->syss_offs)
1615 & SYSS_RESETDONE_MASK),
1616 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1617 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1618 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1619 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1620 oh->class->sysc->sysc_offs)
387ca5bf 1621 & softrst_mask),
2cb06814 1622 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1623 }
63c85238 1624
5365efbe 1625 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1626 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1627 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1628 else
5365efbe 1629 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1630
1631 /*
1632 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1633 * _wait_target_ready() or _reset()
1634 */
1635
96835af9
BC
1636 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1637
1638dis_opt_clks:
1639 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1640 _disable_optional_clocks(oh);
1641
1642 return ret;
63c85238
PW
1643}
1644
bd36179e
PW
1645/**
1646 * _reset - reset an omap_hwmod
1647 * @oh: struct omap_hwmod *
1648 *
30e105c0
PW
1649 * Resets an omap_hwmod @oh. If the module has a custom reset
1650 * function pointer defined, then call it to reset the IP block, and
1651 * pass along its return value to the caller. Otherwise, if the IP
1652 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1653 * associated with it, call a function to reset the IP block via that
1654 * method, and pass along the return value to the caller. Finally, if
1655 * the IP block has some hardreset lines associated with it, assert
1656 * all of those, but do _not_ deassert them. (This is because driver
1657 * authors have expressed an apparent requirement to control the
1658 * deassertion of the hardreset lines themselves.)
1659 *
1660 * The default software reset mechanism for most OMAP IP blocks is
1661 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1662 * hwmods cannot be reset via this method. Some are not targets and
1663 * therefore have no OCP header registers to access. Others (like the
1664 * IVA) have idiosyncratic reset sequences. So for these relatively
1665 * rare cases, custom reset code can be supplied in the struct
1666 * omap_hwmod_class .reset function pointer. Passes along the return
1667 * value from either _ocp_softreset() or the custom reset function -
1668 * these must return -EINVAL if the hwmod cannot be reset this way or
1669 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1670 * not reset in time, or 0 upon success.
bd36179e
PW
1671 */
1672static int _reset(struct omap_hwmod *oh)
1673{
30e105c0 1674 int i, r;
bd36179e
PW
1675
1676 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1677
30e105c0
PW
1678 if (oh->class->reset) {
1679 r = oh->class->reset(oh);
1680 } else {
1681 if (oh->rst_lines_cnt > 0) {
1682 for (i = 0; i < oh->rst_lines_cnt; i++)
1683 _assert_hardreset(oh, oh->rst_lines[i].name);
1684 return 0;
1685 } else {
1686 r = _ocp_softreset(oh);
1687 if (r == -ENOENT)
1688 r = 0;
1689 }
1690 }
1691
9c8b0ec7 1692 /*
30e105c0
PW
1693 * OCP_SYSCONFIG bits need to be reprogrammed after a
1694 * softreset. The _enable() function should be split to avoid
1695 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1696 */
2800852a
RN
1697 if (oh->class->sysc) {
1698 _update_sysc_cache(oh);
1699 _enable_sysc(oh);
1700 }
1701
30e105c0 1702 return r;
bd36179e
PW
1703}
1704
63c85238 1705/**
dc6d1cda 1706 * _enable - enable an omap_hwmod
63c85238
PW
1707 * @oh: struct omap_hwmod *
1708 *
1709 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1710 * register target. Returns -EINVAL if the hwmod is in the wrong
1711 * state or passes along the return value of _wait_target_ready().
63c85238 1712 */
dc6d1cda 1713static int _enable(struct omap_hwmod *oh)
63c85238 1714{
747834ab 1715 int r;
665d0013 1716 int hwsup = 0;
63c85238 1717
34617e2a
BC
1718 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1719
aacf0941 1720 /*
64813c3f
PW
1721 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1722 * state at init. Now that someone is really trying to enable
1723 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1724 */
1725 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1726 /*
1727 * If the caller has mux data populated, do the mux'ing
1728 * which wouldn't have been done as part of the _enable()
1729 * done during setup.
1730 */
1731 if (oh->mux)
1732 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1733
1734 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1735 return 0;
1736 }
1737
63c85238
PW
1738 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1739 oh->_state != _HWMOD_STATE_IDLE &&
1740 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1741 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1742 oh->name);
63c85238
PW
1743 return -EINVAL;
1744 }
1745
31f62866 1746 /*
747834ab
PW
1747 * If an IP block contains HW reset lines and any of them are
1748 * asserted, we let integration code associated with that
1749 * block handle the enable. We've received very little
1750 * information on what those driver authors need, and until
1751 * detailed information is provided and the driver code is
1752 * posted to the public lists, this is probably the best we
1753 * can do.
31f62866 1754 */
747834ab
PW
1755 if (_are_any_hardreset_lines_asserted(oh))
1756 return 0;
63c85238 1757
665d0013
RN
1758 /* Mux pins for device runtime if populated */
1759 if (oh->mux && (!oh->mux->enabled ||
1760 ((oh->_state == _HWMOD_STATE_IDLE) &&
1761 oh->mux->pads_dynamic)))
1762 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1763
1764 _add_initiator_dep(oh, mpu_oh);
34617e2a 1765
665d0013
RN
1766 if (oh->clkdm) {
1767 /*
1768 * A clockdomain must be in SW_SUP before enabling
1769 * completely the module. The clockdomain can be set
1770 * in HW_AUTO only when the module become ready.
1771 */
1772 hwsup = clkdm_in_hwsup(oh->clkdm);
1773 r = clkdm_hwmod_enable(oh->clkdm, oh);
1774 if (r) {
1775 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1776 oh->name, oh->clkdm->name, r);
1777 return r;
1778 }
34617e2a 1779 }
665d0013
RN
1780
1781 _enable_clocks(oh);
45c38252 1782 _enable_module(oh);
34617e2a 1783
665d0013
RN
1784 r = _wait_target_ready(oh);
1785 if (!r) {
1786 /*
1787 * Set the clockdomain to HW_AUTO only if the target is ready,
1788 * assuming that the previous state was HW_AUTO
1789 */
1790 if (oh->clkdm && hwsup)
1791 clkdm_allow_idle(oh->clkdm);
1792
1793 oh->_state = _HWMOD_STATE_ENABLED;
1794
1795 /* Access the sysconfig only if the target is ready */
1796 if (oh->class->sysc) {
1797 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1798 _update_sysc_cache(oh);
1799 _enable_sysc(oh);
1800 }
1801 } else {
1802 _disable_clocks(oh);
1803 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1804 oh->name, r);
34617e2a 1805
665d0013
RN
1806 if (oh->clkdm)
1807 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1808 }
1809
63c85238
PW
1810 return r;
1811}
1812
1813/**
dc6d1cda 1814 * _idle - idle an omap_hwmod
63c85238
PW
1815 * @oh: struct omap_hwmod *
1816 *
1817 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1818 * no further work. Returns -EINVAL if the hwmod is in the wrong
1819 * state or returns 0.
63c85238 1820 */
dc6d1cda 1821static int _idle(struct omap_hwmod *oh)
63c85238 1822{
34617e2a
BC
1823 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1824
63c85238 1825 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1826 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1827 oh->name);
63c85238
PW
1828 return -EINVAL;
1829 }
1830
747834ab
PW
1831 if (_are_any_hardreset_lines_asserted(oh))
1832 return 0;
1833
43b40992 1834 if (oh->class->sysc)
74ff3a68 1835 _idle_sysc(oh);
63c85238 1836 _del_initiator_dep(oh, mpu_oh);
bfc141e3
BC
1837
1838 _omap4_disable_module(oh);
1839
45c38252
BC
1840 /*
1841 * The module must be in idle mode before disabling any parents
1842 * clocks. Otherwise, the parent clock might be disabled before
1843 * the module transition is done, and thus will prevent the
1844 * transition to complete properly.
1845 */
1846 _disable_clocks(oh);
665d0013
RN
1847 if (oh->clkdm)
1848 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1849
8d9af88f 1850 /* Mux pins for device idle if populated */
029268e4 1851 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1852 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1853
63c85238
PW
1854 oh->_state = _HWMOD_STATE_IDLE;
1855
1856 return 0;
1857}
1858
9599217a
KVA
1859/**
1860 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1861 * @oh: struct omap_hwmod *
1862 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1863 *
1864 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1865 * local copy. Intended to be used by drivers that require
1866 * direct manipulation of the AUTOIDLE bits.
1867 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1868 * along the return value from _set_module_autoidle().
1869 *
1870 * Any users of this function should be scrutinized carefully.
1871 */
1872int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1873{
1874 u32 v;
1875 int retval = 0;
1876 unsigned long flags;
1877
1878 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1879 return -EINVAL;
1880
1881 spin_lock_irqsave(&oh->_lock, flags);
1882
1883 v = oh->_sysc_cache;
1884
1885 retval = _set_module_autoidle(oh, autoidle, &v);
1886
1887 if (!retval)
1888 _write_sysconfig(v, oh);
1889
1890 spin_unlock_irqrestore(&oh->_lock, flags);
1891
1892 return retval;
1893}
1894
63c85238
PW
1895/**
1896 * _shutdown - shutdown an omap_hwmod
1897 * @oh: struct omap_hwmod *
1898 *
1899 * Shut down an omap_hwmod @oh. This should be called when the driver
1900 * used for the hwmod is removed or unloaded or if the driver is not
1901 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1902 * state or returns 0.
1903 */
1904static int _shutdown(struct omap_hwmod *oh)
1905{
9c8b0ec7 1906 int ret, i;
e4dc8f50
PW
1907 u8 prev_state;
1908
63c85238
PW
1909 if (oh->_state != _HWMOD_STATE_IDLE &&
1910 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1911 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1912 oh->name);
63c85238
PW
1913 return -EINVAL;
1914 }
1915
747834ab
PW
1916 if (_are_any_hardreset_lines_asserted(oh))
1917 return 0;
1918
63c85238
PW
1919 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1920
e4dc8f50
PW
1921 if (oh->class->pre_shutdown) {
1922 prev_state = oh->_state;
1923 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1924 _enable(oh);
e4dc8f50
PW
1925 ret = oh->class->pre_shutdown(oh);
1926 if (ret) {
1927 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1928 _idle(oh);
e4dc8f50
PW
1929 return ret;
1930 }
1931 }
1932
6481c73c
MV
1933 if (oh->class->sysc) {
1934 if (oh->_state == _HWMOD_STATE_IDLE)
1935 _enable(oh);
74ff3a68 1936 _shutdown_sysc(oh);
6481c73c 1937 }
5365efbe 1938
3827f949
BC
1939 /* clocks and deps are already disabled in idle */
1940 if (oh->_state == _HWMOD_STATE_ENABLED) {
1941 _del_initiator_dep(oh, mpu_oh);
1942 /* XXX what about the other system initiators here? dma, dsp */
bfc141e3 1943 _omap4_disable_module(oh);
45c38252 1944 _disable_clocks(oh);
665d0013
RN
1945 if (oh->clkdm)
1946 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 1947 }
63c85238
PW
1948 /* XXX Should this code also force-disable the optional clocks? */
1949
9c8b0ec7
PW
1950 for (i = 0; i < oh->rst_lines_cnt; i++)
1951 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 1952
8d9af88f
TL
1953 /* Mux pins to safe mode or use populated off mode values */
1954 if (oh->mux)
1955 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1956
1957 oh->_state = _HWMOD_STATE_DISABLED;
1958
1959 return 0;
1960}
1961
381d033a
PW
1962/**
1963 * _init_mpu_rt_base - populate the virtual address for a hwmod
1964 * @oh: struct omap_hwmod * to locate the virtual address
1965 *
1966 * Cache the virtual address used by the MPU to access this IP block's
1967 * registers. This address is needed early so the OCP registers that
1968 * are part of the device's address space can be ioremapped properly.
1969 * No return value.
1970 */
1971static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
1972{
c9aafd23
PW
1973 struct omap_hwmod_addr_space *mem;
1974 void __iomem *va_start;
1975
1976 if (!oh)
1977 return;
1978
381d033a
PW
1979 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1980 return;
1981
c9aafd23
PW
1982 mem = _find_mpu_rt_addr_space(oh);
1983 if (!mem) {
1984 pr_debug("omap_hwmod: %s: no MPU register target found\n",
1985 oh->name);
1986 return;
1987 }
1988
1989 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
1990 if (!va_start) {
1991 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
1992 return;
1993 }
1994
1995 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
1996 oh->name, va_start);
1997
1998 oh->_mpu_rt_va = va_start;
381d033a
PW
1999}
2000
2001/**
2002 * _init - initialize internal data for the hwmod @oh
2003 * @oh: struct omap_hwmod *
2004 * @n: (unused)
2005 *
2006 * Look up the clocks and the address space used by the MPU to access
2007 * registers belonging to the hwmod @oh. @oh must already be
2008 * registered at this point. This is the first of two phases for
2009 * hwmod initialization. Code called here does not touch any hardware
2010 * registers, it simply prepares internal data structures. Returns 0
2011 * upon success or if the hwmod isn't registered, or -EINVAL upon
2012 * failure.
2013 */
2014static int __init _init(struct omap_hwmod *oh, void *data)
2015{
2016 int r;
2017
2018 if (oh->_state != _HWMOD_STATE_REGISTERED)
2019 return 0;
2020
2021 _init_mpu_rt_base(oh, NULL);
2022
2023 r = _init_clocks(oh, NULL);
2024 if (IS_ERR_VALUE(r)) {
2025 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2026 return -EINVAL;
2027 }
2028
2029 oh->_state = _HWMOD_STATE_INITIALIZED;
2030
2031 return 0;
2032}
2033
63c85238 2034/**
64813c3f 2035 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2036 * @oh: struct omap_hwmod *
2037 *
64813c3f
PW
2038 * Set up the module's interface clocks. XXX This function is still mostly
2039 * a stub; implementing this properly requires iclk autoidle usecounting in
2040 * the clock code. No return value.
63c85238 2041 */
64813c3f 2042static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2043{
5d95dde7
PW
2044 struct omap_hwmod_ocp_if *os;
2045 int i = 0;
381d033a 2046 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2047 return;
48d54f3f 2048
63c85238 2049
5d95dde7
PW
2050 while (i < oh->slaves_cnt) {
2051 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
2052 if (!os->_clk)
64813c3f 2053 continue;
63c85238 2054
64813c3f
PW
2055 if (os->flags & OCPIF_SWSUP_IDLE) {
2056 /* XXX omap_iclk_deny_idle(c); */
2057 } else {
2058 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2059 clk_enable(os->_clk);
63c85238
PW
2060 }
2061 }
2062
64813c3f
PW
2063 return;
2064}
2065
2066/**
2067 * _setup_reset - reset an IP block during the setup process
2068 * @oh: struct omap_hwmod *
2069 *
2070 * Reset the IP block corresponding to the hwmod @oh during the setup
2071 * process. The IP block is first enabled so it can be successfully
2072 * reset. Returns 0 upon success or a negative error code upon
2073 * failure.
2074 */
2075static int __init _setup_reset(struct omap_hwmod *oh)
2076{
2077 int r;
2078
2079 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2080 return -EINVAL;
63c85238 2081
747834ab
PW
2082 if (oh->rst_lines_cnt == 0) {
2083 r = _enable(oh);
2084 if (r) {
2085 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2086 oh->name, oh->_state);
2087 return -EINVAL;
2088 }
9a23dfe1 2089 }
63c85238 2090
2800852a 2091 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2092 r = _reset(oh);
2093
2094 return r;
2095}
2096
2097/**
2098 * _setup_postsetup - transition to the appropriate state after _setup
2099 * @oh: struct omap_hwmod *
2100 *
2101 * Place an IP block represented by @oh into a "post-setup" state --
2102 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2103 * this function is called at the end of _setup().) The postsetup
2104 * state for an IP block can be changed by calling
2105 * omap_hwmod_enter_postsetup_state() early in the boot process,
2106 * before one of the omap_hwmod_setup*() functions are called for the
2107 * IP block.
2108 *
2109 * The IP block stays in this state until a PM runtime-based driver is
2110 * loaded for that IP block. A post-setup state of IDLE is
2111 * appropriate for almost all IP blocks with runtime PM-enabled
2112 * drivers, since those drivers are able to enable the IP block. A
2113 * post-setup state of ENABLED is appropriate for kernels with PM
2114 * runtime disabled. The DISABLED state is appropriate for unusual IP
2115 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2116 * included, since the WDTIMER starts running on reset and will reset
2117 * the MPU if left active.
2118 *
2119 * This post-setup mechanism is deprecated. Once all of the OMAP
2120 * drivers have been converted to use PM runtime, and all of the IP
2121 * block data and interconnect data is available to the hwmod code, it
2122 * should be possible to replace this mechanism with a "lazy reset"
2123 * arrangement. In a "lazy reset" setup, each IP block is enabled
2124 * when the driver first probes, then all remaining IP blocks without
2125 * drivers are either shut down or enabled after the drivers have
2126 * loaded. However, this cannot take place until the above
2127 * preconditions have been met, since otherwise the late reset code
2128 * has no way of knowing which IP blocks are in use by drivers, and
2129 * which ones are unused.
2130 *
2131 * No return value.
2132 */
2133static void __init _setup_postsetup(struct omap_hwmod *oh)
2134{
2135 u8 postsetup_state;
2136
2137 if (oh->rst_lines_cnt > 0)
2138 return;
76e5589e 2139
2092e5cc
PW
2140 postsetup_state = oh->_postsetup_state;
2141 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2142 postsetup_state = _HWMOD_STATE_ENABLED;
2143
2144 /*
2145 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2146 * it should be set by the core code as a runtime flag during startup
2147 */
2148 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2149 (postsetup_state == _HWMOD_STATE_IDLE)) {
2150 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2151 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2152 }
2092e5cc
PW
2153
2154 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2155 _idle(oh);
2092e5cc
PW
2156 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2157 _shutdown(oh);
2158 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2159 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2160 oh->name, postsetup_state);
63c85238 2161
64813c3f
PW
2162 return;
2163}
2164
2165/**
2166 * _setup - prepare IP block hardware for use
2167 * @oh: struct omap_hwmod *
2168 * @n: (unused, pass NULL)
2169 *
2170 * Configure the IP block represented by @oh. This may include
2171 * enabling the IP block, resetting it, and placing it into a
2172 * post-setup state, depending on the type of IP block and applicable
2173 * flags. IP blocks are reset to prevent any previous configuration
2174 * by the bootloader or previous operating system from interfering
2175 * with power management or other parts of the system. The reset can
2176 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2177 * two phases for hwmod initialization. Code called here generally
2178 * affects the IP block hardware, or system integration hardware
2179 * associated with the IP block. Returns 0.
2180 */
2181static int __init _setup(struct omap_hwmod *oh, void *data)
2182{
2183 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2184 return 0;
2185
2186 _setup_iclk_autoidle(oh);
2187
2188 if (!_setup_reset(oh))
2189 _setup_postsetup(oh);
2190
63c85238
PW
2191 return 0;
2192}
2193
63c85238 2194/**
0102b627 2195 * _register - register a struct omap_hwmod
63c85238
PW
2196 * @oh: struct omap_hwmod *
2197 *
43b40992
PW
2198 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2199 * already has been registered by the same name; -EINVAL if the
2200 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2201 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2202 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2203 * success.
63c85238
PW
2204 *
2205 * XXX The data should be copied into bootmem, so the original data
2206 * should be marked __initdata and freed after init. This would allow
2207 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2208 * that the copy process would be relatively complex due to the large number
2209 * of substructures.
2210 */
01592df9 2211static int __init _register(struct omap_hwmod *oh)
63c85238 2212{
43b40992
PW
2213 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2214 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2215 return -EINVAL;
2216
63c85238
PW
2217 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2218
ce35b244
BC
2219 if (_lookup(oh->name))
2220 return -EEXIST;
63c85238 2221
24dbc213 2222 _save_mpu_port_index(oh);
63c85238
PW
2223
2224 list_add_tail(&oh->node, &omap_hwmod_list);
2225
dc6d1cda 2226 spin_lock_init(&oh->_lock);
2092e5cc 2227
63c85238
PW
2228 oh->_state = _HWMOD_STATE_REGISTERED;
2229
569edd70
PW
2230 /*
2231 * XXX Rather than doing a strcmp(), this should test a flag
2232 * set in the hwmod data, inserted by the autogenerator code.
2233 */
2234 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2235 mpu_oh = oh;
63c85238 2236
569edd70 2237 return 0;
63c85238
PW
2238}
2239
0102b627
BC
2240
2241/* Public functions */
2242
2243u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2244{
2245 if (oh->flags & HWMOD_16BIT_REG)
2246 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2247 else
2248 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2249}
2250
2251void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2252{
2253 if (oh->flags & HWMOD_16BIT_REG)
2254 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2255 else
2256 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2257}
2258
6d3c55fd
A
2259/**
2260 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2261 * @oh: struct omap_hwmod *
2262 *
2263 * This is a public function exposed to drivers. Some drivers may need to do
2264 * some settings before and after resetting the device. Those drivers after
2265 * doing the necessary settings could use this function to start a reset by
2266 * setting the SYSCONFIG.SOFTRESET bit.
2267 */
2268int omap_hwmod_softreset(struct omap_hwmod *oh)
2269{
3c55c1ba
PW
2270 u32 v;
2271 int ret;
2272
2273 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2274 return -EINVAL;
2275
3c55c1ba
PW
2276 v = oh->_sysc_cache;
2277 ret = _set_softreset(oh, &v);
2278 if (ret)
2279 goto error;
2280 _write_sysconfig(v, oh);
2281
2282error:
2283 return ret;
6d3c55fd
A
2284}
2285
0102b627
BC
2286/**
2287 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2288 * @oh: struct omap_hwmod *
2289 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2290 *
2291 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2292 * local copy. Intended to be used by drivers that have some erratum
2293 * that requires direct manipulation of the SIDLEMODE bits. Returns
2294 * -EINVAL if @oh is null, or passes along the return value from
2295 * _set_slave_idlemode().
2296 *
2297 * XXX Does this function have any current users? If not, we should
2298 * remove it; it is better to let the rest of the hwmod code handle this.
2299 * Any users of this function should be scrutinized carefully.
2300 */
2301int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2302{
2303 u32 v;
2304 int retval = 0;
2305
2306 if (!oh)
2307 return -EINVAL;
2308
2309 v = oh->_sysc_cache;
2310
2311 retval = _set_slave_idlemode(oh, idlemode, &v);
2312 if (!retval)
2313 _write_sysconfig(v, oh);
2314
2315 return retval;
2316}
2317
63c85238
PW
2318/**
2319 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2320 * @name: name of the omap_hwmod to look up
2321 *
2322 * Given a @name of an omap_hwmod, return a pointer to the registered
2323 * struct omap_hwmod *, or NULL upon error.
2324 */
2325struct omap_hwmod *omap_hwmod_lookup(const char *name)
2326{
2327 struct omap_hwmod *oh;
2328
2329 if (!name)
2330 return NULL;
2331
63c85238 2332 oh = _lookup(name);
63c85238
PW
2333
2334 return oh;
2335}
2336
2337/**
2338 * omap_hwmod_for_each - call function for each registered omap_hwmod
2339 * @fn: pointer to a callback function
97d60162 2340 * @data: void * data to pass to callback function
63c85238
PW
2341 *
2342 * Call @fn for each registered omap_hwmod, passing @data to each
2343 * function. @fn must return 0 for success or any other value for
2344 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2345 * will stop and the non-zero return value will be passed to the
2346 * caller of omap_hwmod_for_each(). @fn is called with
2347 * omap_hwmod_for_each() held.
2348 */
97d60162
PW
2349int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2350 void *data)
63c85238
PW
2351{
2352 struct omap_hwmod *temp_oh;
30ebad9d 2353 int ret = 0;
63c85238
PW
2354
2355 if (!fn)
2356 return -EINVAL;
2357
63c85238 2358 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2359 ret = (*fn)(temp_oh, data);
63c85238
PW
2360 if (ret)
2361 break;
2362 }
63c85238
PW
2363
2364 return ret;
2365}
2366
63c85238 2367/**
550c8092 2368 * omap_hwmod_register - register an array of hwmods
63c85238
PW
2369 * @ohs: pointer to an array of omap_hwmods to register
2370 *
2371 * Intended to be called early in boot before the clock framework is
2372 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 2373 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 2374 */
550c8092 2375int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 2376{
bac1a0f0 2377 int r, i;
63c85238
PW
2378
2379 if (!ohs)
2380 return 0;
2381
bac1a0f0
PW
2382 i = 0;
2383 do {
bac1a0f0
PW
2384 r = _register(ohs[i]);
2385 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2386 r);
2387 } while (ohs[++i]);
63c85238
PW
2388
2389 return 0;
2390}
2391
381d033a
PW
2392/**
2393 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2394 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2395 *
2396 * If the hwmod data corresponding to the MPU subsystem IP block
2397 * hasn't been initialized and set up yet, do so now. This must be
2398 * done first since sleep dependencies may be added from other hwmods
2399 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2400 * return value.
63c85238 2401 */
381d033a 2402static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 2403{
381d033a
PW
2404 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2405 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2406 __func__, MPU_INITIATOR_NAME);
2407 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2408 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
2409}
2410
63c85238 2411/**
a2debdbd
PW
2412 * omap_hwmod_setup_one - set up a single hwmod
2413 * @oh_name: const char * name of the already-registered hwmod to set up
2414 *
381d033a
PW
2415 * Initialize and set up a single hwmod. Intended to be used for a
2416 * small number of early devices, such as the timer IP blocks used for
2417 * the scheduler clock. Must be called after omap2_clk_init().
2418 * Resolves the struct clk names to struct clk pointers for each
2419 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2420 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
2421 */
2422int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2423{
2424 struct omap_hwmod *oh;
63c85238 2425
a2debdbd
PW
2426 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2427
a2debdbd
PW
2428 oh = _lookup(oh_name);
2429 if (!oh) {
2430 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2431 return -EINVAL;
2432 }
63c85238 2433
381d033a 2434 _ensure_mpu_hwmod_is_setup(oh);
63c85238 2435
381d033a 2436 _init(oh, NULL);
a2debdbd
PW
2437 _setup(oh, NULL);
2438
63c85238
PW
2439 return 0;
2440}
2441
2442/**
381d033a 2443 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 2444 *
381d033a
PW
2445 * Initialize and set up all IP blocks registered with the hwmod code.
2446 * Must be called after omap2_clk_init(). Resolves the struct clk
2447 * names to struct clk pointers for each registered omap_hwmod. Also
2448 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 2449 */
550c8092 2450static int __init omap_hwmod_setup_all(void)
63c85238 2451{
381d033a 2452 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 2453
381d033a 2454 omap_hwmod_for_each(_init, NULL);
2092e5cc 2455 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2456
2457 return 0;
2458}
550c8092 2459core_initcall(omap_hwmod_setup_all);
63c85238 2460
63c85238
PW
2461/**
2462 * omap_hwmod_enable - enable an omap_hwmod
2463 * @oh: struct omap_hwmod *
2464 *
74ff3a68 2465 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2466 * Returns -EINVAL on error or passes along the return value from _enable().
2467 */
2468int omap_hwmod_enable(struct omap_hwmod *oh)
2469{
2470 int r;
dc6d1cda 2471 unsigned long flags;
63c85238
PW
2472
2473 if (!oh)
2474 return -EINVAL;
2475
dc6d1cda
PW
2476 spin_lock_irqsave(&oh->_lock, flags);
2477 r = _enable(oh);
2478 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2479
2480 return r;
2481}
2482
2483/**
2484 * omap_hwmod_idle - idle an omap_hwmod
2485 * @oh: struct omap_hwmod *
2486 *
74ff3a68 2487 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2488 * Returns -EINVAL on error or passes along the return value from _idle().
2489 */
2490int omap_hwmod_idle(struct omap_hwmod *oh)
2491{
dc6d1cda
PW
2492 unsigned long flags;
2493
63c85238
PW
2494 if (!oh)
2495 return -EINVAL;
2496
dc6d1cda
PW
2497 spin_lock_irqsave(&oh->_lock, flags);
2498 _idle(oh);
2499 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2500
2501 return 0;
2502}
2503
2504/**
2505 * omap_hwmod_shutdown - shutdown an omap_hwmod
2506 * @oh: struct omap_hwmod *
2507 *
74ff3a68 2508 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2509 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2510 * the return value from _shutdown().
2511 */
2512int omap_hwmod_shutdown(struct omap_hwmod *oh)
2513{
dc6d1cda
PW
2514 unsigned long flags;
2515
63c85238
PW
2516 if (!oh)
2517 return -EINVAL;
2518
dc6d1cda 2519 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2520 _shutdown(oh);
dc6d1cda 2521 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2522
2523 return 0;
2524}
2525
2526/**
2527 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2528 * @oh: struct omap_hwmod *oh
2529 *
2530 * Intended to be called by the omap_device code.
2531 */
2532int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2533{
dc6d1cda
PW
2534 unsigned long flags;
2535
2536 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2537 _enable_clocks(oh);
dc6d1cda 2538 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2539
2540 return 0;
2541}
2542
2543/**
2544 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2545 * @oh: struct omap_hwmod *oh
2546 *
2547 * Intended to be called by the omap_device code.
2548 */
2549int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2550{
dc6d1cda
PW
2551 unsigned long flags;
2552
2553 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2554 _disable_clocks(oh);
dc6d1cda 2555 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2556
2557 return 0;
2558}
2559
2560/**
2561 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2562 * @oh: struct omap_hwmod *oh
2563 *
2564 * Intended to be called by drivers and core code when all posted
2565 * writes to a device must complete before continuing further
2566 * execution (for example, after clearing some device IRQSTATUS
2567 * register bits)
2568 *
2569 * XXX what about targets with multiple OCP threads?
2570 */
2571void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2572{
2573 BUG_ON(!oh);
2574
43b40992 2575 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2576 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2577 oh->name);
63c85238
PW
2578 return;
2579 }
2580
2581 /*
2582 * Forces posted writes to complete on the OCP thread handling
2583 * register writes
2584 */
cc7a1d2a 2585 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2586}
2587
2588/**
2589 * omap_hwmod_reset - reset the hwmod
2590 * @oh: struct omap_hwmod *
2591 *
2592 * Under some conditions, a driver may wish to reset the entire device.
2593 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2594 * the return value from _reset().
63c85238
PW
2595 */
2596int omap_hwmod_reset(struct omap_hwmod *oh)
2597{
2598 int r;
dc6d1cda 2599 unsigned long flags;
63c85238 2600
9b579114 2601 if (!oh)
63c85238
PW
2602 return -EINVAL;
2603
dc6d1cda 2604 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2605 r = _reset(oh);
dc6d1cda 2606 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2607
2608 return r;
2609}
2610
5e8370f1
PW
2611/*
2612 * IP block data retrieval functions
2613 */
2614
63c85238
PW
2615/**
2616 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2617 * @oh: struct omap_hwmod *
2618 * @res: pointer to the first element of an array of struct resource to fill
2619 *
2620 * Count the number of struct resource array elements necessary to
2621 * contain omap_hwmod @oh resources. Intended to be called by code
2622 * that registers omap_devices. Intended to be used to determine the
2623 * size of a dynamically-allocated struct resource array, before
2624 * calling omap_hwmod_fill_resources(). Returns the number of struct
2625 * resource array elements needed.
2626 *
2627 * XXX This code is not optimized. It could attempt to merge adjacent
2628 * resource IDs.
2629 *
2630 */
2631int omap_hwmod_count_resources(struct omap_hwmod *oh)
2632{
5d95dde7
PW
2633 struct omap_hwmod_ocp_if *os;
2634 int ret;
2635 int i = 0;
63c85238 2636
bc614958 2637 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 2638
5d95dde7
PW
2639 while (i < oh->slaves_cnt) {
2640 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
2641 ret += _count_ocp_if_addr_spaces(os);
2642 }
63c85238
PW
2643
2644 return ret;
2645}
2646
2647/**
2648 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2649 * @oh: struct omap_hwmod *
2650 * @res: pointer to the first element of an array of struct resource to fill
2651 *
2652 * Fill the struct resource array @res with resource data from the
2653 * omap_hwmod @oh. Intended to be called by code that registers
2654 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2655 * number of array elements filled.
2656 */
2657int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2658{
5d95dde7
PW
2659 struct omap_hwmod_ocp_if *os;
2660 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
2661 int r = 0;
2662
2663 /* For each IRQ, DMA, memory area, fill in array.*/
2664
212738a4
PW
2665 mpu_irqs_cnt = _count_mpu_irqs(oh);
2666 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2667 (res + r)->name = (oh->mpu_irqs + i)->name;
2668 (res + r)->start = (oh->mpu_irqs + i)->irq;
2669 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2670 (res + r)->flags = IORESOURCE_IRQ;
2671 r++;
2672 }
2673
bc614958
PW
2674 sdma_reqs_cnt = _count_sdma_reqs(oh);
2675 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2676 (res + r)->name = (oh->sdma_reqs + i)->name;
2677 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2678 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2679 (res + r)->flags = IORESOURCE_DMA;
2680 r++;
2681 }
2682
5d95dde7
PW
2683 i = 0;
2684 while (i < oh->slaves_cnt) {
2685 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
78183f3f 2686 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2687
78183f3f 2688 for (j = 0; j < addr_cnt; j++) {
cd503802 2689 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2690 (res + r)->start = (os->addr + j)->pa_start;
2691 (res + r)->end = (os->addr + j)->pa_end;
2692 (res + r)->flags = IORESOURCE_MEM;
2693 r++;
2694 }
2695 }
2696
2697 return r;
2698}
2699
5e8370f1
PW
2700/**
2701 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2702 * @oh: struct omap_hwmod * to operate on
2703 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2704 * @name: pointer to the name of the data to fetch (optional)
2705 * @rsrc: pointer to a struct resource, allocated by the caller
2706 *
2707 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2708 * data for the IP block pointed to by @oh. The data will be filled
2709 * into a struct resource record pointed to by @rsrc. The struct
2710 * resource must be allocated by the caller. When @name is non-null,
2711 * the data associated with the matching entry in the IRQ/SDMA/address
2712 * space hwmod data arrays will be returned. If @name is null, the
2713 * first array entry will be returned. Data order is not meaningful
2714 * in hwmod data, so callers are strongly encouraged to use a non-null
2715 * @name whenever possible to avoid unpredictable effects if hwmod
2716 * data is later added that causes data ordering to change. This
2717 * function is only intended for use by OMAP core code. Device
2718 * drivers should not call this function - the appropriate bus-related
2719 * data accessor functions should be used instead. Returns 0 upon
2720 * success or a negative error code upon error.
2721 */
2722int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2723 const char *name, struct resource *rsrc)
2724{
2725 int r;
2726 unsigned int irq, dma;
2727 u32 pa_start, pa_end;
2728
2729 if (!oh || !rsrc)
2730 return -EINVAL;
2731
2732 if (type == IORESOURCE_IRQ) {
2733 r = _get_mpu_irq_by_name(oh, name, &irq);
2734 if (r)
2735 return r;
2736
2737 rsrc->start = irq;
2738 rsrc->end = irq;
2739 } else if (type == IORESOURCE_DMA) {
2740 r = _get_sdma_req_by_name(oh, name, &dma);
2741 if (r)
2742 return r;
2743
2744 rsrc->start = dma;
2745 rsrc->end = dma;
2746 } else if (type == IORESOURCE_MEM) {
2747 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
2748 if (r)
2749 return r;
2750
2751 rsrc->start = pa_start;
2752 rsrc->end = pa_end;
2753 } else {
2754 return -EINVAL;
2755 }
2756
2757 rsrc->flags = type;
2758 rsrc->name = name;
2759
2760 return 0;
2761}
2762
63c85238
PW
2763/**
2764 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2765 * @oh: struct omap_hwmod *
2766 *
2767 * Return the powerdomain pointer associated with the OMAP module
2768 * @oh's main clock. If @oh does not have a main clk, return the
2769 * powerdomain associated with the interface clock associated with the
2770 * module's MPU port. (XXX Perhaps this should use the SDMA port
2771 * instead?) Returns NULL on error, or a struct powerdomain * on
2772 * success.
2773 */
2774struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2775{
2776 struct clk *c;
2d6141ba 2777 struct omap_hwmod_ocp_if *oi;
63c85238
PW
2778
2779 if (!oh)
2780 return NULL;
2781
2782 if (oh->_clk) {
2783 c = oh->_clk;
2784 } else {
2d6141ba
PW
2785 oi = _find_mpu_rt_port(oh);
2786 if (!oi)
63c85238 2787 return NULL;
2d6141ba 2788 c = oi->_clk;
63c85238
PW
2789 }
2790
d5647c18
TG
2791 if (!c->clkdm)
2792 return NULL;
2793
63c85238
PW
2794 return c->clkdm->pwrdm.ptr;
2795
2796}
2797
db2a60bf
PW
2798/**
2799 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2800 * @oh: struct omap_hwmod *
2801 *
2802 * Returns the virtual address corresponding to the beginning of the
2803 * module's register target, in the address range that is intended to
2804 * be used by the MPU. Returns the virtual address upon success or NULL
2805 * upon error.
2806 */
2807void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2808{
2809 if (!oh)
2810 return NULL;
2811
2812 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2813 return NULL;
2814
2815 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2816 return NULL;
2817
2818 return oh->_mpu_rt_va;
2819}
2820
63c85238
PW
2821/**
2822 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2823 * @oh: struct omap_hwmod *
2824 * @init_oh: struct omap_hwmod * (initiator)
2825 *
2826 * Add a sleep dependency between the initiator @init_oh and @oh.
2827 * Intended to be called by DSP/Bridge code via platform_data for the
2828 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2829 * code needs to add/del initiator dependencies dynamically
2830 * before/after accessing a device. Returns the return value from
2831 * _add_initiator_dep().
2832 *
2833 * XXX Keep a usecount in the clockdomain code
2834 */
2835int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2836 struct omap_hwmod *init_oh)
2837{
2838 return _add_initiator_dep(oh, init_oh);
2839}
2840
2841/*
2842 * XXX what about functions for drivers to save/restore ocp_sysconfig
2843 * for context save/restore operations?
2844 */
2845
2846/**
2847 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2848 * @oh: struct omap_hwmod *
2849 * @init_oh: struct omap_hwmod * (initiator)
2850 *
2851 * Remove a sleep dependency between the initiator @init_oh and @oh.
2852 * Intended to be called by DSP/Bridge code via platform_data for the
2853 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2854 * code needs to add/del initiator dependencies dynamically
2855 * before/after accessing a device. Returns the return value from
2856 * _del_initiator_dep().
2857 *
2858 * XXX Keep a usecount in the clockdomain code
2859 */
2860int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2861 struct omap_hwmod *init_oh)
2862{
2863 return _del_initiator_dep(oh, init_oh);
2864}
2865
63c85238
PW
2866/**
2867 * omap_hwmod_enable_wakeup - allow device to wake up the system
2868 * @oh: struct omap_hwmod *
2869 *
2870 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
2871 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2872 * this IP block if it has dynamic mux entries. Eventually this
2873 * should set PRCM wakeup registers to cause the PRCM to receive
2874 * wakeup events from the module. Does not set any wakeup routing
2875 * registers beyond this point - if the module is to wake up any other
2876 * module or subsystem, that must be set separately. Called by
2877 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
2878 */
2879int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2880{
dc6d1cda 2881 unsigned long flags;
5a7ddcbd 2882 u32 v;
dc6d1cda 2883
dc6d1cda 2884 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
2885
2886 if (oh->class->sysc &&
2887 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2888 v = oh->_sysc_cache;
2889 _enable_wakeup(oh, &v);
2890 _write_sysconfig(v, oh);
2891 }
2892
eceec009 2893 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 2894 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2895
2896 return 0;
2897}
2898
2899/**
2900 * omap_hwmod_disable_wakeup - prevent device from waking the system
2901 * @oh: struct omap_hwmod *
2902 *
2903 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
2904 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2905 * events for this IP block if it has dynamic mux entries. Eventually
2906 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2907 * wakeup events from the module. Does not set any wakeup routing
2908 * registers beyond this point - if the module is to wake up any other
2909 * module or subsystem, that must be set separately. Called by
2910 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
2911 */
2912int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2913{
dc6d1cda 2914 unsigned long flags;
5a7ddcbd 2915 u32 v;
dc6d1cda 2916
dc6d1cda 2917 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
2918
2919 if (oh->class->sysc &&
2920 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2921 v = oh->_sysc_cache;
2922 _disable_wakeup(oh, &v);
2923 _write_sysconfig(v, oh);
2924 }
2925
eceec009 2926 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 2927 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2928
2929 return 0;
2930}
43b40992 2931
aee48e3c
PW
2932/**
2933 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2934 * contained in the hwmod module.
2935 * @oh: struct omap_hwmod *
2936 * @name: name of the reset line to lookup and assert
2937 *
2938 * Some IP like dsp, ipu or iva contain processor that require
2939 * an HW reset line to be assert / deassert in order to enable fully
2940 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2941 * yet supported on this OMAP; otherwise, passes along the return value
2942 * from _assert_hardreset().
2943 */
2944int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2945{
2946 int ret;
dc6d1cda 2947 unsigned long flags;
aee48e3c
PW
2948
2949 if (!oh)
2950 return -EINVAL;
2951
dc6d1cda 2952 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2953 ret = _assert_hardreset(oh, name);
dc6d1cda 2954 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2955
2956 return ret;
2957}
2958
2959/**
2960 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2961 * contained in the hwmod module.
2962 * @oh: struct omap_hwmod *
2963 * @name: name of the reset line to look up and deassert
2964 *
2965 * Some IP like dsp, ipu or iva contain processor that require
2966 * an HW reset line to be assert / deassert in order to enable fully
2967 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2968 * yet supported on this OMAP; otherwise, passes along the return value
2969 * from _deassert_hardreset().
2970 */
2971int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2972{
2973 int ret;
dc6d1cda 2974 unsigned long flags;
aee48e3c
PW
2975
2976 if (!oh)
2977 return -EINVAL;
2978
dc6d1cda 2979 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2980 ret = _deassert_hardreset(oh, name);
dc6d1cda 2981 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2982
2983 return ret;
2984}
2985
2986/**
2987 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2988 * contained in the hwmod module
2989 * @oh: struct omap_hwmod *
2990 * @name: name of the reset line to look up and read
2991 *
2992 * Return the current state of the hwmod @oh's reset line named @name:
2993 * returns -EINVAL upon parameter error or if this operation
2994 * is unsupported on the current OMAP; otherwise, passes along the return
2995 * value from _read_hardreset().
2996 */
2997int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2998{
2999 int ret;
dc6d1cda 3000 unsigned long flags;
aee48e3c
PW
3001
3002 if (!oh)
3003 return -EINVAL;
3004
dc6d1cda 3005 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3006 ret = _read_hardreset(oh, name);
dc6d1cda 3007 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3008
3009 return ret;
3010}
3011
3012
43b40992
PW
3013/**
3014 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3015 * @classname: struct omap_hwmod_class name to search for
3016 * @fn: callback function pointer to call for each hwmod in class @classname
3017 * @user: arbitrary context data to pass to the callback function
3018 *
ce35b244
BC
3019 * For each omap_hwmod of class @classname, call @fn.
3020 * If the callback function returns something other than
43b40992
PW
3021 * zero, the iterator is terminated, and the callback function's return
3022 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3023 * if @classname or @fn are NULL, or passes back the error code from @fn.
3024 */
3025int omap_hwmod_for_each_by_class(const char *classname,
3026 int (*fn)(struct omap_hwmod *oh,
3027 void *user),
3028 void *user)
3029{
3030 struct omap_hwmod *temp_oh;
3031 int ret = 0;
3032
3033 if (!classname || !fn)
3034 return -EINVAL;
3035
3036 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3037 __func__, classname);
3038
43b40992
PW
3039 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3040 if (!strcmp(temp_oh->class->name, classname)) {
3041 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3042 __func__, temp_oh->name);
3043 ret = (*fn)(temp_oh, user);
3044 if (ret)
3045 break;
3046 }
3047 }
3048
43b40992
PW
3049 if (ret)
3050 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3051 __func__, ret);
3052
3053 return ret;
3054}
3055
2092e5cc
PW
3056/**
3057 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3058 * @oh: struct omap_hwmod *
3059 * @state: state that _setup() should leave the hwmod in
3060 *
550c8092 3061 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3062 * (called by omap_hwmod_setup_*()). See also the documentation
3063 * for _setup_postsetup(), above. Returns 0 upon success or
3064 * -EINVAL if there is a problem with the arguments or if the hwmod is
3065 * in the wrong state.
2092e5cc
PW
3066 */
3067int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3068{
3069 int ret;
dc6d1cda 3070 unsigned long flags;
2092e5cc
PW
3071
3072 if (!oh)
3073 return -EINVAL;
3074
3075 if (state != _HWMOD_STATE_DISABLED &&
3076 state != _HWMOD_STATE_ENABLED &&
3077 state != _HWMOD_STATE_IDLE)
3078 return -EINVAL;
3079
dc6d1cda 3080 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3081
3082 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3083 ret = -EINVAL;
3084 goto ohsps_unlock;
3085 }
3086
3087 oh->_postsetup_state = state;
3088 ret = 0;
3089
3090ohsps_unlock:
dc6d1cda 3091 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3092
3093 return ret;
3094}
c80705aa
KH
3095
3096/**
3097 * omap_hwmod_get_context_loss_count - get lost context count
3098 * @oh: struct omap_hwmod *
3099 *
3100 * Query the powerdomain of of @oh to get the context loss
3101 * count for this device.
3102 *
3103 * Returns the context loss count of the powerdomain assocated with @oh
3104 * upon success, or zero if no powerdomain exists for @oh.
3105 */
fc013873 3106int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3107{
3108 struct powerdomain *pwrdm;
3109 int ret = 0;
3110
3111 pwrdm = omap_hwmod_get_pwrdm(oh);
3112 if (pwrdm)
3113 ret = pwrdm_get_context_loss_count(pwrdm);
3114
3115 return ret;
3116}
43b01643
PW
3117
3118/**
3119 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3120 * @oh: struct omap_hwmod *
3121 *
3122 * Prevent the hwmod @oh from being reset during the setup process.
3123 * Intended for use by board-*.c files on boards with devices that
3124 * cannot tolerate being reset. Must be called before the hwmod has
3125 * been set up. Returns 0 upon success or negative error code upon
3126 * failure.
3127 */
3128int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3129{
3130 if (!oh)
3131 return -EINVAL;
3132
3133 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3134 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3135 oh->name);
3136 return -EINVAL;
3137 }
3138
3139 oh->flags |= HWMOD_INIT_NO_RESET;
3140
3141 return 0;
3142}
abc2d545
TK
3143
3144/**
3145 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3146 * @oh: struct omap_hwmod * containing hwmod mux entries
3147 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3148 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3149 *
3150 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3151 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3152 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3153 * this function is not called for a given pad_idx, then the ISR
3154 * associated with @oh's first MPU IRQ will be triggered when an I/O
3155 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3156 * the _dynamic or wakeup_ entry: if there are other entries not
3157 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3158 * entries are NOT COUNTED in the dynamic pad index. This function
3159 * must be called separately for each pad that requires its interrupt
3160 * to be re-routed this way. Returns -EINVAL if there is an argument
3161 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3162 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3163 *
3164 * XXX This function interface is fragile. Rather than using array
3165 * indexes, which are subject to unpredictable change, it should be
3166 * using hwmod IRQ names, and some other stable key for the hwmod mux
3167 * pad records.
3168 */
3169int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3170{
3171 int nr_irqs;
3172
3173 might_sleep();
3174
3175 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3176 pad_idx >= oh->mux->nr_pads_dynamic)
3177 return -EINVAL;
3178
3179 /* Check the number of available mpu_irqs */
3180 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3181 ;
3182
3183 if (irq_idx >= nr_irqs)
3184 return -EINVAL;
3185
3186 if (!oh->mux->irqs) {
3187 /* XXX What frees this? */
3188 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3189 GFP_KERNEL);
3190 if (!oh->mux->irqs)
3191 return -ENOMEM;
3192 }
3193 oh->mux->irqs[pad_idx] = irq_idx;
3194
3195 return 0;
3196}