OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock...
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
63c85238
PW
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
78183f3f 5 * Copyright (C) 2011 Texas Instruments, Inc.
63c85238 6 *
4788da26
PW
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
63c85238
PW
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
74ff3a68
PW
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
74ff3a68
PW
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
63c85238
PW
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
63c85238
PW
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
63c85238 139
6f8b7ff5 140#include <plat/common.h>
ce491cf8 141#include <plat/cpu.h>
1540f214 142#include "clockdomain.h"
72e06d08 143#include "powerdomain.h"
ce491cf8
TL
144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
5365efbe 146#include <plat/prcm.h>
63c85238 147
59fb659b 148#include "cm2xxx_3xxx.h"
d0f0631d 149#include "cminst44xx.h"
59fb659b 150#include "prm2xxx_3xxx.h"
d198b514 151#include "prm44xx.h"
eaac329d 152#include "prminst44xx.h"
8d9af88f 153#include "mux.h"
63c85238 154
5365efbe
BC
155/* Maximum microseconds to wait for OMAP module to softreset */
156#define MAX_MODULE_SOFTRESET_WAIT 10000
63c85238
PW
157
158/* Name of the OMAP hwmod for the MPU */
5c2c0296 159#define MPU_INITIATOR_NAME "mpu"
63c85238
PW
160
161/* omap_hwmod_list contains all registered struct omap_hwmods */
162static LIST_HEAD(omap_hwmod_list);
163
63c85238
PW
164/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
165static struct omap_hwmod *mpu_oh;
166
63c85238
PW
167
168/* Private functions */
169
170/**
171 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
172 * @oh: struct omap_hwmod *
173 *
174 * Load the current value of the hwmod OCP_SYSCONFIG register into the
175 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
176 * OCP_SYSCONFIG register or 0 upon success.
177 */
178static int _update_sysc_cache(struct omap_hwmod *oh)
179{
43b40992
PW
180 if (!oh->class->sysc) {
181 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
63c85238
PW
182 return -EINVAL;
183 }
184
185 /* XXX ensure module interface clock is up */
186
cc7a1d2a 187 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 188
43b40992 189 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 190 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
63c85238
PW
191
192 return 0;
193}
194
195/**
196 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
197 * @v: OCP_SYSCONFIG value to write
198 * @oh: struct omap_hwmod *
199 *
43b40992
PW
200 * Write @v into the module class' OCP_SYSCONFIG register, if it has
201 * one. No return value.
63c85238
PW
202 */
203static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
204{
43b40992
PW
205 if (!oh->class->sysc) {
206 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
63c85238
PW
207 return;
208 }
209
210 /* XXX ensure module interface clock is up */
211
233cbe5b
RN
212 /* Module might have lost context, always update cache and register */
213 oh->_sysc_cache = v;
214 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
63c85238
PW
215}
216
217/**
218 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
219 * @oh: struct omap_hwmod *
220 * @standbymode: MIDLEMODE field bits
221 * @v: pointer to register contents to modify
222 *
223 * Update the master standby mode bits in @v to be @standbymode for
224 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
225 * upon error or 0 upon success.
226 */
227static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
228 u32 *v)
229{
358f0e63
TG
230 u32 mstandby_mask;
231 u8 mstandby_shift;
232
43b40992
PW
233 if (!oh->class->sysc ||
234 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
63c85238
PW
235 return -EINVAL;
236
43b40992
PW
237 if (!oh->class->sysc->sysc_fields) {
238 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
239 return -EINVAL;
240 }
241
43b40992 242 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
358f0e63
TG
243 mstandby_mask = (0x3 << mstandby_shift);
244
245 *v &= ~mstandby_mask;
246 *v |= __ffs(standbymode) << mstandby_shift;
63c85238
PW
247
248 return 0;
249}
250
251/**
252 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
253 * @oh: struct omap_hwmod *
254 * @idlemode: SIDLEMODE field bits
255 * @v: pointer to register contents to modify
256 *
257 * Update the slave idle mode bits in @v to be @idlemode for the @oh
258 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
259 * or 0 upon success.
260 */
261static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
262{
358f0e63
TG
263 u32 sidle_mask;
264 u8 sidle_shift;
265
43b40992
PW
266 if (!oh->class->sysc ||
267 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
63c85238
PW
268 return -EINVAL;
269
43b40992
PW
270 if (!oh->class->sysc->sysc_fields) {
271 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
272 return -EINVAL;
273 }
274
43b40992 275 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
TG
276 sidle_mask = (0x3 << sidle_shift);
277
278 *v &= ~sidle_mask;
279 *v |= __ffs(idlemode) << sidle_shift;
63c85238
PW
280
281 return 0;
282}
283
284/**
285 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
286 * @oh: struct omap_hwmod *
287 * @clockact: CLOCKACTIVITY field bits
288 * @v: pointer to register contents to modify
289 *
290 * Update the clockactivity mode bits in @v to be @clockact for the
291 * @oh hwmod. Used for additional powersaving on some modules. Does
292 * not write to the hardware. Returns -EINVAL upon error or 0 upon
293 * success.
294 */
295static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
296{
358f0e63
TG
297 u32 clkact_mask;
298 u8 clkact_shift;
299
43b40992
PW
300 if (!oh->class->sysc ||
301 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
63c85238
PW
302 return -EINVAL;
303
43b40992
PW
304 if (!oh->class->sysc->sysc_fields) {
305 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
306 return -EINVAL;
307 }
308
43b40992 309 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
TG
310 clkact_mask = (0x3 << clkact_shift);
311
312 *v &= ~clkact_mask;
313 *v |= clockact << clkact_shift;
63c85238
PW
314
315 return 0;
316}
317
318/**
319 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
320 * @oh: struct omap_hwmod *
321 * @v: pointer to register contents to modify
322 *
323 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
324 * error or 0 upon success.
325 */
326static int _set_softreset(struct omap_hwmod *oh, u32 *v)
327{
358f0e63
TG
328 u32 softrst_mask;
329
43b40992
PW
330 if (!oh->class->sysc ||
331 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
332 return -EINVAL;
333
43b40992
PW
334 if (!oh->class->sysc->sysc_fields) {
335 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
336 return -EINVAL;
337 }
338
43b40992 339 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
340
341 *v |= softrst_mask;
63c85238
PW
342
343 return 0;
344}
345
726072e5
PW
346/**
347 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
348 * @oh: struct omap_hwmod *
349 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
350 * @v: pointer to register contents to modify
351 *
352 * Update the module autoidle bit in @v to be @autoidle for the @oh
353 * hwmod. The autoidle bit controls whether the module can gate
354 * internal clocks automatically when it isn't doing anything; the
355 * exact function of this bit varies on a per-module basis. This
356 * function does not write to the hardware. Returns -EINVAL upon
357 * error or 0 upon success.
358 */
359static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
360 u32 *v)
361{
358f0e63
TG
362 u32 autoidle_mask;
363 u8 autoidle_shift;
364
43b40992
PW
365 if (!oh->class->sysc ||
366 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
PW
367 return -EINVAL;
368
43b40992
PW
369 if (!oh->class->sysc->sysc_fields) {
370 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
371 return -EINVAL;
372 }
373
43b40992 374 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 375 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
376
377 *v &= ~autoidle_mask;
378 *v |= autoidle << autoidle_shift;
726072e5
PW
379
380 return 0;
381}
382
63c85238
PW
383/**
384 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
385 * @oh: struct omap_hwmod *
386 *
387 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
388 * upon error or 0 upon success.
389 */
5a7ddcbd 390static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 391{
43b40992 392 if (!oh->class->sysc ||
86009eb3 393 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
394 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
395 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
396 return -EINVAL;
397
43b40992
PW
398 if (!oh->class->sysc->sysc_fields) {
399 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
400 return -EINVAL;
401 }
402
1fe74113
BC
403 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
404 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 405
86009eb3
BC
406 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
407 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
408 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
409 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 410
63c85238
PW
411 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
412
413 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
414
415 return 0;
416}
417
418/**
419 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
420 * @oh: struct omap_hwmod *
421 *
422 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
423 * upon error or 0 upon success.
424 */
5a7ddcbd 425static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 426{
43b40992 427 if (!oh->class->sysc ||
86009eb3 428 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
429 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
430 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
431 return -EINVAL;
432
43b40992
PW
433 if (!oh->class->sysc->sysc_fields) {
434 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
435 return -EINVAL;
436 }
437
1fe74113
BC
438 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
439 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 440
86009eb3
BC
441 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
442 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
443 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
444 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 445
63c85238
PW
446 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
447
448 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
449
450 return 0;
451}
452
453/**
454 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
455 * @oh: struct omap_hwmod *
456 *
457 * Prevent the hardware module @oh from entering idle while the
458 * hardare module initiator @init_oh is active. Useful when a module
459 * will be accessed by a particular initiator (e.g., if a module will
460 * be accessed by the IVA, there should be a sleepdep between the IVA
461 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
462 * mode. If the clockdomain is marked as not needing autodeps, return
463 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
464 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
465 */
466static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
467{
468 if (!oh->_clk)
469 return -EINVAL;
470
570b54c7
PW
471 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
472 return 0;
473
55ed9694 474 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
475}
476
477/**
478 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
479 * @oh: struct omap_hwmod *
480 *
481 * Allow the hardware module @oh to enter idle while the hardare
482 * module initiator @init_oh is active. Useful when a module will not
483 * be accessed by a particular initiator (e.g., if a module will not
484 * be accessed by the IVA, there should be no sleepdep between the IVA
485 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
486 * mode. If the clockdomain is marked as not needing autodeps, return
487 * 0 without doing anything. Returns -EINVAL upon error or passes
488 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
489 */
490static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
491{
492 if (!oh->_clk)
493 return -EINVAL;
494
570b54c7
PW
495 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
496 return 0;
497
55ed9694 498 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
499}
500
501/**
502 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
503 * @oh: struct omap_hwmod *
504 *
505 * Called from _init_clocks(). Populates the @oh _clk (main
506 * functional clock pointer) if a main_clk is present. Returns 0 on
507 * success or -EINVAL on error.
508 */
509static int _init_main_clk(struct omap_hwmod *oh)
510{
63c85238
PW
511 int ret = 0;
512
50ebdac2 513 if (!oh->main_clk)
63c85238
PW
514 return 0;
515
63403384 516 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 517 if (!oh->_clk) {
20383d82
BC
518 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
519 oh->name, oh->main_clk);
63403384 520 return -EINVAL;
dc75925d 521 }
63c85238 522
63403384
BC
523 if (!oh->_clk->clkdm)
524 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
525 oh->main_clk, oh->_clk->name);
81d7c6ff 526
63c85238
PW
527 return ret;
528}
529
530/**
887adeac 531 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
532 * @oh: struct omap_hwmod *
533 *
534 * Called from _init_clocks(). Populates the @oh OCP slave interface
535 * clock pointers. Returns 0 on success or -EINVAL on error.
536 */
537static int _init_interface_clks(struct omap_hwmod *oh)
538{
63c85238
PW
539 struct clk *c;
540 int i;
541 int ret = 0;
542
543 if (oh->slaves_cnt == 0)
544 return 0;
545
682fdc96
BC
546 for (i = 0; i < oh->slaves_cnt; i++) {
547 struct omap_hwmod_ocp_if *os = oh->slaves[i];
548
50ebdac2 549 if (!os->clk)
63c85238
PW
550 continue;
551
50ebdac2 552 c = omap_clk_get_by_name(os->clk);
dc75925d 553 if (!c) {
20383d82
BC
554 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
555 oh->name, os->clk);
63c85238 556 ret = -EINVAL;
dc75925d 557 }
63c85238
PW
558 os->_clk = c;
559 }
560
561 return ret;
562}
563
564/**
565 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
566 * @oh: struct omap_hwmod *
567 *
568 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
569 * clock pointers. Returns 0 on success or -EINVAL on error.
570 */
571static int _init_opt_clks(struct omap_hwmod *oh)
572{
573 struct omap_hwmod_opt_clk *oc;
574 struct clk *c;
575 int i;
576 int ret = 0;
577
578 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 579 c = omap_clk_get_by_name(oc->clk);
dc75925d 580 if (!c) {
20383d82
BC
581 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
582 oh->name, oc->clk);
63c85238 583 ret = -EINVAL;
dc75925d 584 }
63c85238
PW
585 oc->_clk = c;
586 }
587
588 return ret;
589}
590
591/**
592 * _enable_clocks - enable hwmod main clock and interface clocks
593 * @oh: struct omap_hwmod *
594 *
595 * Enables all clocks necessary for register reads and writes to succeed
596 * on the hwmod @oh. Returns 0.
597 */
598static int _enable_clocks(struct omap_hwmod *oh)
599{
63c85238
PW
600 int i;
601
602 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
603
4d3ae5a9 604 if (oh->_clk)
63c85238
PW
605 clk_enable(oh->_clk);
606
607 if (oh->slaves_cnt > 0) {
682fdc96
BC
608 for (i = 0; i < oh->slaves_cnt; i++) {
609 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
610 struct clk *c = os->_clk;
611
4d3ae5a9 612 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
613 clk_enable(c);
614 }
615 }
616
617 /* The opt clocks are controlled by the device driver. */
618
619 return 0;
620}
621
622/**
623 * _disable_clocks - disable hwmod main clock and interface clocks
624 * @oh: struct omap_hwmod *
625 *
626 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
627 */
628static int _disable_clocks(struct omap_hwmod *oh)
629{
63c85238
PW
630 int i;
631
632 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
633
4d3ae5a9 634 if (oh->_clk)
63c85238
PW
635 clk_disable(oh->_clk);
636
637 if (oh->slaves_cnt > 0) {
682fdc96
BC
638 for (i = 0; i < oh->slaves_cnt; i++) {
639 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
640 struct clk *c = os->_clk;
641
4d3ae5a9 642 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
643 clk_disable(c);
644 }
645 }
646
647 /* The opt clocks are controlled by the device driver. */
648
649 return 0;
650}
651
96835af9
BC
652static void _enable_optional_clocks(struct omap_hwmod *oh)
653{
654 struct omap_hwmod_opt_clk *oc;
655 int i;
656
657 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
658
659 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
660 if (oc->_clk) {
661 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
662 oc->_clk->name);
663 clk_enable(oc->_clk);
664 }
665}
666
667static void _disable_optional_clocks(struct omap_hwmod *oh)
668{
669 struct omap_hwmod_opt_clk *oc;
670 int i;
671
672 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
673
674 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
675 if (oc->_clk) {
676 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
677 oc->_clk->name);
678 clk_disable(oc->_clk);
679 }
680}
681
45c38252
BC
682/**
683 * _enable_module - enable CLKCTRL modulemode on OMAP4
684 * @oh: struct omap_hwmod *
685 *
686 * Enables the PRCM module mode related to the hwmod @oh.
687 * No return value.
688 */
689static void _enable_module(struct omap_hwmod *oh)
690{
691 /* The module mode does not exist prior OMAP4 */
692 if (cpu_is_omap24xx() || cpu_is_omap34xx())
693 return;
694
695 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
696 return;
697
698 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
699 oh->name, oh->prcm.omap4.modulemode);
700
701 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
702 oh->clkdm->prcm_partition,
703 oh->clkdm->cm_inst,
704 oh->clkdm->clkdm_offs,
705 oh->prcm.omap4.clkctrl_offs);
706}
707
708/**
709 * _disable_module - enable CLKCTRL modulemode on OMAP4
710 * @oh: struct omap_hwmod *
711 *
712 * Disable the PRCM module mode related to the hwmod @oh.
713 * No return value.
714 */
715static void _disable_module(struct omap_hwmod *oh)
716{
717 /* The module mode does not exist prior OMAP4 */
718 if (cpu_is_omap24xx() || cpu_is_omap34xx())
719 return;
720
721 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
722 return;
723
724 pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
725
726 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
727 oh->clkdm->cm_inst,
728 oh->clkdm->clkdm_offs,
729 oh->prcm.omap4.clkctrl_offs);
730}
731
212738a4
PW
732/**
733 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
734 * @oh: struct omap_hwmod *oh
735 *
736 * Count and return the number of MPU IRQs associated with the hwmod
737 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
738 * NULL.
739 */
740static int _count_mpu_irqs(struct omap_hwmod *oh)
741{
742 struct omap_hwmod_irq_info *ohii;
743 int i = 0;
744
745 if (!oh || !oh->mpu_irqs)
746 return 0;
747
748 do {
749 ohii = &oh->mpu_irqs[i++];
750 } while (ohii->irq != -1);
751
752 return i;
753}
754
bc614958
PW
755/**
756 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
757 * @oh: struct omap_hwmod *oh
758 *
759 * Count and return the number of SDMA request lines associated with
760 * the hwmod @oh. Used to allocate struct resource data. Returns 0
761 * if @oh is NULL.
762 */
763static int _count_sdma_reqs(struct omap_hwmod *oh)
764{
765 struct omap_hwmod_dma_info *ohdi;
766 int i = 0;
767
768 if (!oh || !oh->sdma_reqs)
769 return 0;
770
771 do {
772 ohdi = &oh->sdma_reqs[i++];
773 } while (ohdi->dma_req != -1);
774
775 return i;
776}
777
78183f3f
PW
778/**
779 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
780 * @oh: struct omap_hwmod *oh
781 *
782 * Count and return the number of address space ranges associated with
783 * the hwmod @oh. Used to allocate struct resource data. Returns 0
784 * if @oh is NULL.
785 */
786static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
787{
788 struct omap_hwmod_addr_space *mem;
789 int i = 0;
790
791 if (!os || !os->addr)
792 return 0;
793
794 do {
795 mem = &os->addr[i++];
796 } while (mem->pa_start != mem->pa_end);
797
798 return i;
799}
800
63c85238
PW
801/**
802 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
803 * @oh: struct omap_hwmod *
804 *
805 * Returns the array index of the OCP slave port that the MPU
806 * addresses the device on, or -EINVAL upon error or not found.
807 */
01592df9 808static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 809{
63c85238
PW
810 int i;
811 int found = 0;
812
813 if (!oh || oh->slaves_cnt == 0)
814 return -EINVAL;
815
682fdc96
BC
816 for (i = 0; i < oh->slaves_cnt; i++) {
817 struct omap_hwmod_ocp_if *os = oh->slaves[i];
818
63c85238
PW
819 if (os->user & OCP_USER_MPU) {
820 found = 1;
821 break;
822 }
823 }
824
825 if (found)
826 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
827 oh->name, i);
828 else
829 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
830 oh->name);
831
832 return (found) ? i : -EINVAL;
833}
834
835/**
836 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
837 * @oh: struct omap_hwmod *
838 *
839 * Return the virtual address of the base of the register target of
840 * device @oh, or NULL on error.
841 */
01592df9 842static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
843{
844 struct omap_hwmod_ocp_if *os;
845 struct omap_hwmod_addr_space *mem;
78183f3f 846 int i = 0, found = 0;
986a13f5 847 void __iomem *va_start;
63c85238
PW
848
849 if (!oh || oh->slaves_cnt == 0)
850 return NULL;
851
682fdc96 852 os = oh->slaves[index];
63c85238 853
78183f3f
PW
854 if (!os->addr)
855 return NULL;
856
857 do {
858 mem = &os->addr[i++];
859 if (mem->flags & ADDR_TYPE_RT)
63c85238 860 found = 1;
78183f3f 861 } while (!found && mem->pa_start != mem->pa_end);
63c85238 862
986a13f5
TL
863 if (found) {
864 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
865 if (!va_start) {
866 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
867 return NULL;
868 }
63c85238 869 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
870 oh->name, va_start);
871 } else {
63c85238
PW
872 pr_debug("omap_hwmod: %s: no MPU register target found\n",
873 oh->name);
986a13f5 874 }
63c85238 875
986a13f5 876 return (found) ? va_start : NULL;
63c85238
PW
877}
878
879/**
74ff3a68 880 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
881 * @oh: struct omap_hwmod *
882 *
883 * If module is marked as SWSUP_SIDLE, force the module out of slave
884 * idle; otherwise, configure it for smart-idle. If module is marked
885 * as SWSUP_MSUSPEND, force the module out of master standby;
886 * otherwise, configure it for smart-standby. No return value.
887 */
74ff3a68 888static void _enable_sysc(struct omap_hwmod *oh)
63c85238 889{
43b40992 890 u8 idlemode, sf;
63c85238
PW
891 u32 v;
892
43b40992 893 if (!oh->class->sysc)
63c85238
PW
894 return;
895
896 v = oh->_sysc_cache;
43b40992 897 sf = oh->class->sysc->sysc_flags;
63c85238 898
43b40992 899 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
900 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
901 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
902 _set_slave_idlemode(oh, idlemode, &v);
903 }
904
43b40992 905 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
906 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
907 idlemode = HWMOD_IDLEMODE_NO;
908 } else {
909 if (sf & SYSC_HAS_ENAWAKEUP)
910 _enable_wakeup(oh, &v);
911 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
912 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
913 else
914 idlemode = HWMOD_IDLEMODE_SMART;
915 }
63c85238
PW
916 _set_master_standbymode(oh, idlemode, &v);
917 }
918
a16b1f7f
PW
919 /*
920 * XXX The clock framework should handle this, by
921 * calling into this code. But this must wait until the
922 * clock structures are tagged with omap_hwmod entries
923 */
43b40992
PW
924 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
925 (sf & SYSC_HAS_CLOCKACTIVITY))
926 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 927
9980ce53
RN
928 /* If slave is in SMARTIDLE, also enable wakeup */
929 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
930 _enable_wakeup(oh, &v);
931
932 _write_sysconfig(v, oh);
78f26e87
HH
933
934 /*
935 * Set the autoidle bit only after setting the smartidle bit
936 * Setting this will not have any impact on the other modules.
937 */
938 if (sf & SYSC_HAS_AUTOIDLE) {
939 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
940 0 : 1;
941 _set_module_autoidle(oh, idlemode, &v);
942 _write_sysconfig(v, oh);
943 }
63c85238
PW
944}
945
946/**
74ff3a68 947 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
948 * @oh: struct omap_hwmod *
949 *
950 * If module is marked as SWSUP_SIDLE, force the module into slave
951 * idle; otherwise, configure it for smart-idle. If module is marked
952 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
953 * configure it for smart-standby. No return value.
954 */
74ff3a68 955static void _idle_sysc(struct omap_hwmod *oh)
63c85238 956{
43b40992 957 u8 idlemode, sf;
63c85238
PW
958 u32 v;
959
43b40992 960 if (!oh->class->sysc)
63c85238
PW
961 return;
962
963 v = oh->_sysc_cache;
43b40992 964 sf = oh->class->sysc->sysc_flags;
63c85238 965
43b40992 966 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
967 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
968 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
969 _set_slave_idlemode(oh, idlemode, &v);
970 }
971
43b40992 972 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
973 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
974 idlemode = HWMOD_IDLEMODE_FORCE;
975 } else {
976 if (sf & SYSC_HAS_ENAWAKEUP)
977 _enable_wakeup(oh, &v);
978 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
979 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
980 else
981 idlemode = HWMOD_IDLEMODE_SMART;
982 }
63c85238
PW
983 _set_master_standbymode(oh, idlemode, &v);
984 }
985
86009eb3
BC
986 /* If slave is in SMARTIDLE, also enable wakeup */
987 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
988 _enable_wakeup(oh, &v);
989
63c85238
PW
990 _write_sysconfig(v, oh);
991}
992
993/**
74ff3a68 994 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
995 * @oh: struct omap_hwmod *
996 *
997 * Force the module into slave idle and master suspend. No return
998 * value.
999 */
74ff3a68 1000static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1001{
1002 u32 v;
43b40992 1003 u8 sf;
63c85238 1004
43b40992 1005 if (!oh->class->sysc)
63c85238
PW
1006 return;
1007
1008 v = oh->_sysc_cache;
43b40992 1009 sf = oh->class->sysc->sysc_flags;
63c85238 1010
43b40992 1011 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1012 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1013
43b40992 1014 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1015 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1016
43b40992 1017 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1018 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1019
1020 _write_sysconfig(v, oh);
1021}
1022
1023/**
1024 * _lookup - find an omap_hwmod by name
1025 * @name: find an omap_hwmod by name
1026 *
1027 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1028 */
1029static struct omap_hwmod *_lookup(const char *name)
1030{
1031 struct omap_hwmod *oh, *temp_oh;
1032
1033 oh = NULL;
1034
1035 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1036 if (!strcmp(name, temp_oh->name)) {
1037 oh = temp_oh;
1038 break;
1039 }
1040 }
1041
1042 return oh;
1043}
6ae76997
BC
1044/**
1045 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1046 * @oh: struct omap_hwmod *
1047 *
1048 * Convert a clockdomain name stored in a struct omap_hwmod into a
1049 * clockdomain pointer, and save it into the struct omap_hwmod.
1050 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1051 */
1052static int _init_clkdm(struct omap_hwmod *oh)
1053{
1054 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1055 return 0;
1056
1057 if (!oh->clkdm_name) {
1058 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1059 return -EINVAL;
1060 }
1061
1062 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1063 if (!oh->clkdm) {
1064 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1065 oh->name, oh->clkdm_name);
1066 return -EINVAL;
1067 }
1068
1069 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1070 oh->name, oh->clkdm_name);
1071
1072 return 0;
1073}
63c85238
PW
1074
1075/**
6ae76997
BC
1076 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1077 * well the clockdomain.
63c85238 1078 * @oh: struct omap_hwmod *
97d60162 1079 * @data: not used; pass NULL
63c85238 1080 *
a2debdbd 1081 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1082 * Resolves all clock names embedded in the hwmod. Returns 0 on
1083 * success, or a negative error code on failure.
63c85238 1084 */
97d60162 1085static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1086{
1087 int ret = 0;
1088
48d54f3f
PW
1089 if (oh->_state != _HWMOD_STATE_REGISTERED)
1090 return 0;
63c85238
PW
1091
1092 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1093
1094 ret |= _init_main_clk(oh);
1095 ret |= _init_interface_clks(oh);
1096 ret |= _init_opt_clks(oh);
6ae76997 1097 ret |= _init_clkdm(oh);
63c85238 1098
f5c1f84b
BC
1099 if (!ret)
1100 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1101 else
1102 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1103
09c35f2f 1104 return ret;
63c85238
PW
1105}
1106
1107/**
1108 * _wait_target_ready - wait for a module to leave slave idle
1109 * @oh: struct omap_hwmod *
1110 *
1111 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1112 * does not have an IDLEST bit or if the module successfully leaves
1113 * slave idle; otherwise, pass along the return value of the
d0f0631d 1114 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1115 */
1116static int _wait_target_ready(struct omap_hwmod *oh)
1117{
1118 struct omap_hwmod_ocp_if *os;
1119 int ret;
1120
1121 if (!oh)
1122 return -EINVAL;
1123
1124 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1125 return 0;
1126
682fdc96 1127 os = oh->slaves[oh->_mpu_port_index];
63c85238 1128
33f7ec81 1129 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1130 return 0;
1131
1132 /* XXX check module SIDLEMODE */
1133
1134 /* XXX check clock enable states */
1135
1136 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1137 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1138 oh->prcm.omap2.idlest_reg_id,
1139 oh->prcm.omap2.idlest_idle_bit);
63c85238 1140 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1141 if (!oh->clkdm)
1142 return -EINVAL;
1143
1144 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1145 oh->clkdm->cm_inst,
1146 oh->clkdm->clkdm_offs,
1147 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1148 } else {
1149 BUG();
1150 };
1151
1152 return ret;
1153}
1154
11b10341
BC
1155/**
1156 * _wait_target_disable - wait for a module to be disabled
1157 * @oh: struct omap_hwmod *
1158 *
1159 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1160 * does not have an IDLEST bit or if the module successfully enters
1161 * slave idle; otherwise, pass along the return value of the
1162 * appropriate *_cm*_wait_module_idle() function.
1163 */
1164static int _wait_target_disable(struct omap_hwmod *oh)
1165{
1166 /* TODO: For now just handle OMAP4+ */
1167 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1168 return 0;
1169
1170 if (!oh)
1171 return -EINVAL;
1172
1173 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1174 return 0;
1175
1176 if (oh->flags & HWMOD_NO_IDLEST)
1177 return 0;
1178
1179 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1180 oh->clkdm->cm_inst,
1181 oh->clkdm->clkdm_offs,
1182 oh->prcm.omap4.clkctrl_offs);
1183}
1184
5365efbe 1185/**
cc1226e7 1186 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1187 * @oh: struct omap_hwmod *
1188 * @name: name of the reset line in the context of this hwmod
cc1226e7 1189 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1190 *
1191 * Return the bit position of the reset line that match the
1192 * input name. Return -ENOENT if not found.
1193 */
cc1226e7 1194static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1195 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1196{
1197 int i;
1198
1199 for (i = 0; i < oh->rst_lines_cnt; i++) {
1200 const char *rst_line = oh->rst_lines[i].name;
1201 if (!strcmp(rst_line, name)) {
cc1226e7 1202 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1203 ohri->st_shift = oh->rst_lines[i].st_shift;
1204 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1205 oh->name, __func__, rst_line, ohri->rst_shift,
1206 ohri->st_shift);
5365efbe 1207
cc1226e7 1208 return 0;
5365efbe
BC
1209 }
1210 }
1211
1212 return -ENOENT;
1213}
1214
1215/**
1216 * _assert_hardreset - assert the HW reset line of submodules
1217 * contained in the hwmod module.
1218 * @oh: struct omap_hwmod *
1219 * @name: name of the reset line to lookup and assert
1220 *
1221 * Some IP like dsp, ipu or iva contain processor that require
1222 * an HW reset line to be assert / deassert in order to enable fully
1223 * the IP.
1224 */
1225static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1226{
cc1226e7 1227 struct omap_hwmod_rst_info ohri;
1228 u8 ret;
5365efbe
BC
1229
1230 if (!oh)
1231 return -EINVAL;
1232
cc1226e7 1233 ret = _lookup_hardreset(oh, name, &ohri);
1234 if (IS_ERR_VALUE(ret))
1235 return ret;
5365efbe
BC
1236
1237 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1238 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1239 ohri.rst_shift);
5365efbe 1240 else if (cpu_is_omap44xx())
eaac329d
BC
1241 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1242 oh->clkdm->pwrdm.ptr->prcm_partition,
1243 oh->clkdm->pwrdm.ptr->prcm_offs,
1244 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1245 else
1246 return -EINVAL;
1247}
1248
1249/**
1250 * _deassert_hardreset - deassert the HW reset line of submodules contained
1251 * in the hwmod module.
1252 * @oh: struct omap_hwmod *
1253 * @name: name of the reset line to look up and deassert
1254 *
1255 * Some IP like dsp, ipu or iva contain processor that require
1256 * an HW reset line to be assert / deassert in order to enable fully
1257 * the IP.
1258 */
1259static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1260{
cc1226e7 1261 struct omap_hwmod_rst_info ohri;
1262 int ret;
5365efbe
BC
1263
1264 if (!oh)
1265 return -EINVAL;
1266
cc1226e7 1267 ret = _lookup_hardreset(oh, name, &ohri);
1268 if (IS_ERR_VALUE(ret))
1269 return ret;
5365efbe 1270
cc1226e7 1271 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1272 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1273 ohri.rst_shift,
1274 ohri.st_shift);
1275 } else if (cpu_is_omap44xx()) {
1276 if (ohri.st_shift)
1277 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1278 oh->name, name);
eaac329d
BC
1279 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1280 oh->clkdm->pwrdm.ptr->prcm_partition,
1281 oh->clkdm->pwrdm.ptr->prcm_offs,
1282 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1283 } else {
5365efbe 1284 return -EINVAL;
cc1226e7 1285 }
5365efbe 1286
cc1226e7 1287 if (ret == -EBUSY)
5365efbe
BC
1288 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1289
cc1226e7 1290 return ret;
5365efbe
BC
1291}
1292
1293/**
1294 * _read_hardreset - read the HW reset line state of submodules
1295 * contained in the hwmod module
1296 * @oh: struct omap_hwmod *
1297 * @name: name of the reset line to look up and read
1298 *
1299 * Return the state of the reset line.
1300 */
1301static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1302{
cc1226e7 1303 struct omap_hwmod_rst_info ohri;
1304 u8 ret;
5365efbe
BC
1305
1306 if (!oh)
1307 return -EINVAL;
1308
cc1226e7 1309 ret = _lookup_hardreset(oh, name, &ohri);
1310 if (IS_ERR_VALUE(ret))
1311 return ret;
5365efbe
BC
1312
1313 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1314 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1315 ohri.st_shift);
5365efbe 1316 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1317 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1318 oh->clkdm->pwrdm.ptr->prcm_partition,
1319 oh->clkdm->pwrdm.ptr->prcm_offs,
1320 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1321 } else {
1322 return -EINVAL;
1323 }
1324}
1325
63c85238 1326/**
bd36179e 1327 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1328 * @oh: struct omap_hwmod *
1329 *
1330 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1331 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1332 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1333 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1334 *
1335 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1336 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1337 * use the SYSCONFIG softreset bit to provide the status.
1338 *
bd36179e
PW
1339 * Note that some IP like McBSP do have reset control but don't have
1340 * reset status.
63c85238 1341 */
bd36179e 1342static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1343{
96835af9 1344 u32 v;
6f8b7ff5 1345 int c = 0;
96835af9 1346 int ret = 0;
63c85238 1347
43b40992 1348 if (!oh->class->sysc ||
2cb06814 1349 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1350 return -EINVAL;
1351
1352 /* clocks must be on for this operation */
1353 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1354 pr_warning("omap_hwmod: %s: reset can only be entered from "
1355 "enabled state\n", oh->name);
63c85238
PW
1356 return -EINVAL;
1357 }
1358
96835af9
BC
1359 /* For some modules, all optionnal clocks need to be enabled as well */
1360 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1361 _enable_optional_clocks(oh);
1362
bd36179e 1363 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1364
1365 v = oh->_sysc_cache;
96835af9
BC
1366 ret = _set_softreset(oh, &v);
1367 if (ret)
1368 goto dis_opt_clks;
63c85238
PW
1369 _write_sysconfig(v, oh);
1370
2cb06814 1371 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1372 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1373 oh->class->sysc->syss_offs)
1374 & SYSS_RESETDONE_MASK),
1375 MAX_MODULE_SOFTRESET_WAIT, c);
1376 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1377 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1378 oh->class->sysc->sysc_offs)
1379 & SYSC_TYPE2_SOFTRESET_MASK),
1380 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1381
5365efbe 1382 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1383 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1384 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1385 else
5365efbe 1386 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1387
1388 /*
1389 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1390 * _wait_target_ready() or _reset()
1391 */
1392
96835af9
BC
1393 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1394
1395dis_opt_clks:
1396 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1397 _disable_optional_clocks(oh);
1398
1399 return ret;
63c85238
PW
1400}
1401
bd36179e
PW
1402/**
1403 * _reset - reset an omap_hwmod
1404 * @oh: struct omap_hwmod *
1405 *
1406 * Resets an omap_hwmod @oh. The default software reset mechanism for
1407 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1408 * bit. However, some hwmods cannot be reset via this method: some
1409 * are not targets and therefore have no OCP header registers to
1410 * access; others (like the IVA) have idiosyncratic reset sequences.
1411 * So for these relatively rare cases, custom reset code can be
1412 * supplied in the struct omap_hwmod_class .reset function pointer.
1413 * Passes along the return value from either _reset() or the custom
1414 * reset function - these must return -EINVAL if the hwmod cannot be
1415 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1416 * the module did not reset in time, or 0 upon success.
1417 */
1418static int _reset(struct omap_hwmod *oh)
1419{
1420 int ret;
1421
1422 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1423
1424 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1425
1426 return ret;
1427}
1428
63c85238 1429/**
dc6d1cda 1430 * _enable - enable an omap_hwmod
63c85238
PW
1431 * @oh: struct omap_hwmod *
1432 *
1433 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1434 * register target. Returns -EINVAL if the hwmod is in the wrong
1435 * state or passes along the return value of _wait_target_ready().
63c85238 1436 */
dc6d1cda 1437static int _enable(struct omap_hwmod *oh)
63c85238
PW
1438{
1439 int r;
1440
34617e2a
BC
1441 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1442
63c85238
PW
1443 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1444 oh->_state != _HWMOD_STATE_IDLE &&
1445 oh->_state != _HWMOD_STATE_DISABLED) {
1446 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1447 "from initialized, idle, or disabled state\n", oh->name);
1448 return -EINVAL;
1449 }
1450
8d9af88f 1451 /* Mux pins for device runtime if populated */
029268e4
TL
1452 if (oh->mux && (!oh->mux->enabled ||
1453 ((oh->_state == _HWMOD_STATE_IDLE) &&
1454 oh->mux->pads_dynamic)))
8d9af88f 1455 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1456
1457 _add_initiator_dep(oh, mpu_oh);
1458 _enable_clocks(oh);
1459
31f62866
BC
1460 /*
1461 * If an IP contains only one HW reset line, then de-assert it in order
1462 * to allow the module state transition. Otherwise the PRCM will return
1463 * Intransition status, and the init will failed.
1464 */
1465 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1466 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1467 _deassert_hardreset(oh, oh->rst_lines[0].name);
63c85238 1468
63c85238 1469 r = _wait_target_ready(oh);
34617e2a 1470 if (r) {
9a23dfe1
BC
1471 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1472 oh->name, r);
34617e2a
BC
1473 _disable_clocks(oh);
1474
1475 return r;
1476 }
45c38252 1477 _enable_module(oh);
34617e2a
BC
1478
1479 oh->_state = _HWMOD_STATE_ENABLED;
1480
1481 /* Access the sysconfig only if the target is ready */
1482 if (oh->class->sysc) {
1483 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1484 _update_sysc_cache(oh);
1485 _enable_sysc(oh);
9a23dfe1
BC
1486 }
1487
63c85238
PW
1488 return r;
1489}
1490
1491/**
dc6d1cda 1492 * _idle - idle an omap_hwmod
63c85238
PW
1493 * @oh: struct omap_hwmod *
1494 *
1495 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1496 * no further work. Returns -EINVAL if the hwmod is in the wrong
1497 * state or returns 0.
63c85238 1498 */
dc6d1cda 1499static int _idle(struct omap_hwmod *oh)
63c85238 1500{
11b10341
BC
1501 int ret;
1502
34617e2a
BC
1503 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1504
63c85238
PW
1505 if (oh->_state != _HWMOD_STATE_ENABLED) {
1506 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1507 "enabled state\n", oh->name);
1508 return -EINVAL;
1509 }
1510
43b40992 1511 if (oh->class->sysc)
74ff3a68 1512 _idle_sysc(oh);
63c85238 1513 _del_initiator_dep(oh, mpu_oh);
45c38252 1514 _disable_module(oh);
11b10341
BC
1515 ret = _wait_target_disable(oh);
1516 if (ret)
1517 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1518 oh->name);
45c38252
BC
1519 /*
1520 * The module must be in idle mode before disabling any parents
1521 * clocks. Otherwise, the parent clock might be disabled before
1522 * the module transition is done, and thus will prevent the
1523 * transition to complete properly.
1524 */
1525 _disable_clocks(oh);
63c85238 1526
8d9af88f 1527 /* Mux pins for device idle if populated */
029268e4 1528 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1529 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1530
63c85238
PW
1531 oh->_state = _HWMOD_STATE_IDLE;
1532
1533 return 0;
1534}
1535
9599217a
KVA
1536/**
1537 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1538 * @oh: struct omap_hwmod *
1539 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1540 *
1541 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1542 * local copy. Intended to be used by drivers that require
1543 * direct manipulation of the AUTOIDLE bits.
1544 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1545 * along the return value from _set_module_autoidle().
1546 *
1547 * Any users of this function should be scrutinized carefully.
1548 */
1549int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1550{
1551 u32 v;
1552 int retval = 0;
1553 unsigned long flags;
1554
1555 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1556 return -EINVAL;
1557
1558 spin_lock_irqsave(&oh->_lock, flags);
1559
1560 v = oh->_sysc_cache;
1561
1562 retval = _set_module_autoidle(oh, autoidle, &v);
1563
1564 if (!retval)
1565 _write_sysconfig(v, oh);
1566
1567 spin_unlock_irqrestore(&oh->_lock, flags);
1568
1569 return retval;
1570}
1571
63c85238
PW
1572/**
1573 * _shutdown - shutdown an omap_hwmod
1574 * @oh: struct omap_hwmod *
1575 *
1576 * Shut down an omap_hwmod @oh. This should be called when the driver
1577 * used for the hwmod is removed or unloaded or if the driver is not
1578 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1579 * state or returns 0.
1580 */
1581static int _shutdown(struct omap_hwmod *oh)
1582{
e4dc8f50
PW
1583 int ret;
1584 u8 prev_state;
1585
63c85238
PW
1586 if (oh->_state != _HWMOD_STATE_IDLE &&
1587 oh->_state != _HWMOD_STATE_ENABLED) {
1588 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1589 "from idle, or enabled state\n", oh->name);
1590 return -EINVAL;
1591 }
1592
1593 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1594
e4dc8f50
PW
1595 if (oh->class->pre_shutdown) {
1596 prev_state = oh->_state;
1597 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1598 _enable(oh);
e4dc8f50
PW
1599 ret = oh->class->pre_shutdown(oh);
1600 if (ret) {
1601 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1602 _idle(oh);
e4dc8f50
PW
1603 return ret;
1604 }
1605 }
1606
6481c73c
MV
1607 if (oh->class->sysc) {
1608 if (oh->_state == _HWMOD_STATE_IDLE)
1609 _enable(oh);
74ff3a68 1610 _shutdown_sysc(oh);
6481c73c 1611 }
5365efbe 1612
3827f949
BC
1613 /* clocks and deps are already disabled in idle */
1614 if (oh->_state == _HWMOD_STATE_ENABLED) {
1615 _del_initiator_dep(oh, mpu_oh);
1616 /* XXX what about the other system initiators here? dma, dsp */
45c38252 1617 _disable_module(oh);
11b10341
BC
1618 ret = _wait_target_disable(oh);
1619 if (ret)
1620 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1621 oh->name);
45c38252 1622 _disable_clocks(oh);
3827f949 1623 }
63c85238
PW
1624 /* XXX Should this code also force-disable the optional clocks? */
1625
31f62866
BC
1626 /*
1627 * If an IP contains only one HW reset line, then assert it
1628 * after disabling the clocks and before shutting down the IP.
1629 */
1630 if (oh->rst_lines_cnt == 1)
1631 _assert_hardreset(oh, oh->rst_lines[0].name);
1632
8d9af88f
TL
1633 /* Mux pins to safe mode or use populated off mode values */
1634 if (oh->mux)
1635 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1636
1637 oh->_state = _HWMOD_STATE_DISABLED;
1638
1639 return 0;
1640}
1641
63c85238
PW
1642/**
1643 * _setup - do initial configuration of omap_hwmod
1644 * @oh: struct omap_hwmod *
1645 *
1646 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1647 * OCP_SYSCONFIG register. Returns 0.
63c85238 1648 */
97d60162 1649static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1650{
9a23dfe1 1651 int i, r;
2092e5cc 1652 u8 postsetup_state;
97d60162 1653
48d54f3f
PW
1654 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1655 return 0;
1656
63c85238
PW
1657 /* Set iclk autoidle mode */
1658 if (oh->slaves_cnt > 0) {
682fdc96
BC
1659 for (i = 0; i < oh->slaves_cnt; i++) {
1660 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1661 struct clk *c = os->_clk;
1662
4d3ae5a9 1663 if (!c)
63c85238
PW
1664 continue;
1665
1666 if (os->flags & OCPIF_SWSUP_IDLE) {
1667 /* XXX omap_iclk_deny_idle(c); */
1668 } else {
1669 /* XXX omap_iclk_allow_idle(c); */
1670 clk_enable(c);
1671 }
1672 }
1673 }
1674
1675 oh->_state = _HWMOD_STATE_INITIALIZED;
1676
5365efbe
BC
1677 /*
1678 * In the case of hwmod with hardreset that should not be
1679 * de-assert at boot time, we have to keep the module
1680 * initialized, because we cannot enable it properly with the
1681 * reset asserted. Exit without warning because that behavior is
1682 * expected.
1683 */
1684 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1685 return 0;
1686
dc6d1cda 1687 r = _enable(oh);
9a23dfe1
BC
1688 if (r) {
1689 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1690 oh->name, oh->_state);
1691 return 0;
1692 }
63c85238 1693
b835d014 1694 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1695 _reset(oh);
1696
b835d014 1697 /*
76e5589e 1698 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1699 * The _enable() function should be split to
76e5589e 1700 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1701 */
43b40992 1702 if (oh->class->sysc) {
b835d014 1703 _update_sysc_cache(oh);
74ff3a68 1704 _enable_sysc(oh);
b835d014
PW
1705 }
1706 }
63c85238 1707
2092e5cc
PW
1708 postsetup_state = oh->_postsetup_state;
1709 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1710 postsetup_state = _HWMOD_STATE_ENABLED;
1711
1712 /*
1713 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1714 * it should be set by the core code as a runtime flag during startup
1715 */
1716 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1717 (postsetup_state == _HWMOD_STATE_IDLE))
1718 postsetup_state = _HWMOD_STATE_ENABLED;
1719
1720 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1721 _idle(oh);
2092e5cc
PW
1722 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1723 _shutdown(oh);
1724 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1725 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1726 oh->name, postsetup_state);
63c85238
PW
1727
1728 return 0;
1729}
1730
63c85238 1731/**
0102b627 1732 * _register - register a struct omap_hwmod
63c85238
PW
1733 * @oh: struct omap_hwmod *
1734 *
43b40992
PW
1735 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1736 * already has been registered by the same name; -EINVAL if the
1737 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1738 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1739 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1740 * success.
63c85238
PW
1741 *
1742 * XXX The data should be copied into bootmem, so the original data
1743 * should be marked __initdata and freed after init. This would allow
1744 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1745 * that the copy process would be relatively complex due to the large number
1746 * of substructures.
1747 */
01592df9 1748static int __init _register(struct omap_hwmod *oh)
63c85238 1749{
569edd70 1750 int ms_id;
63c85238 1751
43b40992
PW
1752 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1753 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1754 return -EINVAL;
1755
63c85238
PW
1756 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1757
ce35b244
BC
1758 if (_lookup(oh->name))
1759 return -EEXIST;
63c85238
PW
1760
1761 ms_id = _find_mpu_port_index(oh);
e7c7d760 1762 if (!IS_ERR_VALUE(ms_id))
63c85238 1763 oh->_mpu_port_index = ms_id;
e7c7d760 1764 else
63c85238 1765 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1766
1767 list_add_tail(&oh->node, &omap_hwmod_list);
1768
dc6d1cda 1769 spin_lock_init(&oh->_lock);
2092e5cc 1770
63c85238
PW
1771 oh->_state = _HWMOD_STATE_REGISTERED;
1772
569edd70
PW
1773 /*
1774 * XXX Rather than doing a strcmp(), this should test a flag
1775 * set in the hwmod data, inserted by the autogenerator code.
1776 */
1777 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1778 mpu_oh = oh;
63c85238 1779
569edd70 1780 return 0;
63c85238
PW
1781}
1782
0102b627
BC
1783
1784/* Public functions */
1785
1786u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1787{
1788 if (oh->flags & HWMOD_16BIT_REG)
1789 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1790 else
1791 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1792}
1793
1794void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1795{
1796 if (oh->flags & HWMOD_16BIT_REG)
1797 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1798 else
1799 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1800}
1801
6d3c55fd
A
1802/**
1803 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1804 * @oh: struct omap_hwmod *
1805 *
1806 * This is a public function exposed to drivers. Some drivers may need to do
1807 * some settings before and after resetting the device. Those drivers after
1808 * doing the necessary settings could use this function to start a reset by
1809 * setting the SYSCONFIG.SOFTRESET bit.
1810 */
1811int omap_hwmod_softreset(struct omap_hwmod *oh)
1812{
1813 u32 v;
1814 int ret;
1815
1816 if (!oh || !(oh->_sysc_cache))
1817 return -EINVAL;
1818
1819 v = oh->_sysc_cache;
1820 ret = _set_softreset(oh, &v);
1821 if (ret)
1822 goto error;
1823 _write_sysconfig(v, oh);
1824
1825error:
1826 return ret;
1827}
1828
0102b627
BC
1829/**
1830 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1831 * @oh: struct omap_hwmod *
1832 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1833 *
1834 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1835 * local copy. Intended to be used by drivers that have some erratum
1836 * that requires direct manipulation of the SIDLEMODE bits. Returns
1837 * -EINVAL if @oh is null, or passes along the return value from
1838 * _set_slave_idlemode().
1839 *
1840 * XXX Does this function have any current users? If not, we should
1841 * remove it; it is better to let the rest of the hwmod code handle this.
1842 * Any users of this function should be scrutinized carefully.
1843 */
1844int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1845{
1846 u32 v;
1847 int retval = 0;
1848
1849 if (!oh)
1850 return -EINVAL;
1851
1852 v = oh->_sysc_cache;
1853
1854 retval = _set_slave_idlemode(oh, idlemode, &v);
1855 if (!retval)
1856 _write_sysconfig(v, oh);
1857
1858 return retval;
1859}
1860
63c85238
PW
1861/**
1862 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1863 * @name: name of the omap_hwmod to look up
1864 *
1865 * Given a @name of an omap_hwmod, return a pointer to the registered
1866 * struct omap_hwmod *, or NULL upon error.
1867 */
1868struct omap_hwmod *omap_hwmod_lookup(const char *name)
1869{
1870 struct omap_hwmod *oh;
1871
1872 if (!name)
1873 return NULL;
1874
63c85238 1875 oh = _lookup(name);
63c85238
PW
1876
1877 return oh;
1878}
1879
1880/**
1881 * omap_hwmod_for_each - call function for each registered omap_hwmod
1882 * @fn: pointer to a callback function
97d60162 1883 * @data: void * data to pass to callback function
63c85238
PW
1884 *
1885 * Call @fn for each registered omap_hwmod, passing @data to each
1886 * function. @fn must return 0 for success or any other value for
1887 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1888 * will stop and the non-zero return value will be passed to the
1889 * caller of omap_hwmod_for_each(). @fn is called with
1890 * omap_hwmod_for_each() held.
1891 */
97d60162
PW
1892int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1893 void *data)
63c85238
PW
1894{
1895 struct omap_hwmod *temp_oh;
30ebad9d 1896 int ret = 0;
63c85238
PW
1897
1898 if (!fn)
1899 return -EINVAL;
1900
63c85238 1901 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1902 ret = (*fn)(temp_oh, data);
63c85238
PW
1903 if (ret)
1904 break;
1905 }
63c85238
PW
1906
1907 return ret;
1908}
1909
63c85238 1910/**
550c8092 1911 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1912 * @ohs: pointer to an array of omap_hwmods to register
1913 *
1914 * Intended to be called early in boot before the clock framework is
1915 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1916 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1917 */
550c8092 1918int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1919{
bac1a0f0 1920 int r, i;
63c85238
PW
1921
1922 if (!ohs)
1923 return 0;
1924
bac1a0f0
PW
1925 i = 0;
1926 do {
1927 if (!omap_chip_is(ohs[i]->omap_chip))
1928 continue;
1929
1930 r = _register(ohs[i]);
1931 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1932 r);
1933 } while (ohs[++i]);
63c85238
PW
1934
1935 return 0;
1936}
1937
e7c7d760
TL
1938/*
1939 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1940 *
a2debdbd 1941 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1942 * Assumes the caller takes care of locking if needed.
63c85238 1943 */
e7c7d760
TL
1944static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1945{
48d54f3f
PW
1946 if (oh->_state != _HWMOD_STATE_REGISTERED)
1947 return 0;
1948
e7c7d760
TL
1949 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1950 return 0;
1951
1952 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
e7c7d760
TL
1953
1954 return 0;
1955}
1956
63c85238 1957/**
a2debdbd
PW
1958 * omap_hwmod_setup_one - set up a single hwmod
1959 * @oh_name: const char * name of the already-registered hwmod to set up
1960 *
1961 * Must be called after omap2_clk_init(). Resolves the struct clk
1962 * names to struct clk pointers for each registered omap_hwmod. Also
1963 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1964 * success.
1965 */
1966int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1967{
1968 struct omap_hwmod *oh;
1969 int r;
1970
a2debdbd
PW
1971 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1972
1973 if (!mpu_oh) {
1974 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1975 oh_name, MPU_INITIATOR_NAME);
63c85238 1976 return -EINVAL;
a2debdbd 1977 }
63c85238 1978
a2debdbd
PW
1979 oh = _lookup(oh_name);
1980 if (!oh) {
1981 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1982 return -EINVAL;
1983 }
63c85238 1984
a2debdbd
PW
1985 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1986 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1987
a2debdbd
PW
1988 r = _populate_mpu_rt_base(oh, NULL);
1989 if (IS_ERR_VALUE(r)) {
1990 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1991 return -EINVAL;
1992 }
1993
1994 r = _init_clocks(oh, NULL);
1995 if (IS_ERR_VALUE(r)) {
1996 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1997 return -EINVAL;
63c85238
PW
1998 }
1999
a2debdbd
PW
2000 _setup(oh, NULL);
2001
63c85238
PW
2002 return 0;
2003}
2004
2005/**
550c8092 2006 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
2007 *
2008 * Must be called after omap2_clk_init(). Resolves the struct clk names
2009 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 2010 * _setup() on each hwmod. Returns 0 upon success.
63c85238 2011 */
550c8092 2012static int __init omap_hwmod_setup_all(void)
63c85238
PW
2013{
2014 int r;
2015
569edd70
PW
2016 if (!mpu_oh) {
2017 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2018 __func__, MPU_INITIATOR_NAME);
2019 return -EINVAL;
2020 }
2021
e7c7d760 2022 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 2023
97d60162 2024 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
2025 WARN(IS_ERR_VALUE(r),
2026 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 2027
2092e5cc 2028 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2029
2030 return 0;
2031}
550c8092 2032core_initcall(omap_hwmod_setup_all);
63c85238 2033
63c85238
PW
2034/**
2035 * omap_hwmod_enable - enable an omap_hwmod
2036 * @oh: struct omap_hwmod *
2037 *
74ff3a68 2038 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2039 * Returns -EINVAL on error or passes along the return value from _enable().
2040 */
2041int omap_hwmod_enable(struct omap_hwmod *oh)
2042{
2043 int r;
dc6d1cda 2044 unsigned long flags;
63c85238
PW
2045
2046 if (!oh)
2047 return -EINVAL;
2048
dc6d1cda
PW
2049 spin_lock_irqsave(&oh->_lock, flags);
2050 r = _enable(oh);
2051 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2052
2053 return r;
2054}
2055
2056/**
2057 * omap_hwmod_idle - idle an omap_hwmod
2058 * @oh: struct omap_hwmod *
2059 *
74ff3a68 2060 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2061 * Returns -EINVAL on error or passes along the return value from _idle().
2062 */
2063int omap_hwmod_idle(struct omap_hwmod *oh)
2064{
dc6d1cda
PW
2065 unsigned long flags;
2066
63c85238
PW
2067 if (!oh)
2068 return -EINVAL;
2069
dc6d1cda
PW
2070 spin_lock_irqsave(&oh->_lock, flags);
2071 _idle(oh);
2072 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2073
2074 return 0;
2075}
2076
2077/**
2078 * omap_hwmod_shutdown - shutdown an omap_hwmod
2079 * @oh: struct omap_hwmod *
2080 *
74ff3a68 2081 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2082 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2083 * the return value from _shutdown().
2084 */
2085int omap_hwmod_shutdown(struct omap_hwmod *oh)
2086{
dc6d1cda
PW
2087 unsigned long flags;
2088
63c85238
PW
2089 if (!oh)
2090 return -EINVAL;
2091
dc6d1cda 2092 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2093 _shutdown(oh);
dc6d1cda 2094 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2095
2096 return 0;
2097}
2098
2099/**
2100 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2101 * @oh: struct omap_hwmod *oh
2102 *
2103 * Intended to be called by the omap_device code.
2104 */
2105int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2106{
dc6d1cda
PW
2107 unsigned long flags;
2108
2109 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2110 _enable_clocks(oh);
dc6d1cda 2111 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2112
2113 return 0;
2114}
2115
2116/**
2117 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2118 * @oh: struct omap_hwmod *oh
2119 *
2120 * Intended to be called by the omap_device code.
2121 */
2122int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2123{
dc6d1cda
PW
2124 unsigned long flags;
2125
2126 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2127 _disable_clocks(oh);
dc6d1cda 2128 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2129
2130 return 0;
2131}
2132
2133/**
2134 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2135 * @oh: struct omap_hwmod *oh
2136 *
2137 * Intended to be called by drivers and core code when all posted
2138 * writes to a device must complete before continuing further
2139 * execution (for example, after clearing some device IRQSTATUS
2140 * register bits)
2141 *
2142 * XXX what about targets with multiple OCP threads?
2143 */
2144void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2145{
2146 BUG_ON(!oh);
2147
43b40992 2148 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
2149 WARN(1, "omap_device: %s: OCP barrier impossible due to "
2150 "device configuration\n", oh->name);
2151 return;
2152 }
2153
2154 /*
2155 * Forces posted writes to complete on the OCP thread handling
2156 * register writes
2157 */
cc7a1d2a 2158 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2159}
2160
2161/**
2162 * omap_hwmod_reset - reset the hwmod
2163 * @oh: struct omap_hwmod *
2164 *
2165 * Under some conditions, a driver may wish to reset the entire device.
2166 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2167 * the return value from _reset().
63c85238
PW
2168 */
2169int omap_hwmod_reset(struct omap_hwmod *oh)
2170{
2171 int r;
dc6d1cda 2172 unsigned long flags;
63c85238 2173
9b579114 2174 if (!oh)
63c85238
PW
2175 return -EINVAL;
2176
dc6d1cda 2177 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2178 r = _reset(oh);
dc6d1cda 2179 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2180
2181 return r;
2182}
2183
2184/**
2185 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2186 * @oh: struct omap_hwmod *
2187 * @res: pointer to the first element of an array of struct resource to fill
2188 *
2189 * Count the number of struct resource array elements necessary to
2190 * contain omap_hwmod @oh resources. Intended to be called by code
2191 * that registers omap_devices. Intended to be used to determine the
2192 * size of a dynamically-allocated struct resource array, before
2193 * calling omap_hwmod_fill_resources(). Returns the number of struct
2194 * resource array elements needed.
2195 *
2196 * XXX This code is not optimized. It could attempt to merge adjacent
2197 * resource IDs.
2198 *
2199 */
2200int omap_hwmod_count_resources(struct omap_hwmod *oh)
2201{
2202 int ret, i;
2203
bc614958 2204 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238
PW
2205
2206 for (i = 0; i < oh->slaves_cnt; i++)
78183f3f 2207 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
63c85238
PW
2208
2209 return ret;
2210}
2211
2212/**
2213 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2214 * @oh: struct omap_hwmod *
2215 * @res: pointer to the first element of an array of struct resource to fill
2216 *
2217 * Fill the struct resource array @res with resource data from the
2218 * omap_hwmod @oh. Intended to be called by code that registers
2219 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2220 * number of array elements filled.
2221 */
2222int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2223{
bc614958 2224 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
63c85238
PW
2225 int r = 0;
2226
2227 /* For each IRQ, DMA, memory area, fill in array.*/
2228
212738a4
PW
2229 mpu_irqs_cnt = _count_mpu_irqs(oh);
2230 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2231 (res + r)->name = (oh->mpu_irqs + i)->name;
2232 (res + r)->start = (oh->mpu_irqs + i)->irq;
2233 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2234 (res + r)->flags = IORESOURCE_IRQ;
2235 r++;
2236 }
2237
bc614958
PW
2238 sdma_reqs_cnt = _count_sdma_reqs(oh);
2239 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2240 (res + r)->name = (oh->sdma_reqs + i)->name;
2241 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2242 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2243 (res + r)->flags = IORESOURCE_DMA;
2244 r++;
2245 }
2246
2247 for (i = 0; i < oh->slaves_cnt; i++) {
2248 struct omap_hwmod_ocp_if *os;
78183f3f 2249 int addr_cnt;
63c85238 2250
682fdc96 2251 os = oh->slaves[i];
78183f3f 2252 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2253
78183f3f 2254 for (j = 0; j < addr_cnt; j++) {
cd503802 2255 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2256 (res + r)->start = (os->addr + j)->pa_start;
2257 (res + r)->end = (os->addr + j)->pa_end;
2258 (res + r)->flags = IORESOURCE_MEM;
2259 r++;
2260 }
2261 }
2262
2263 return r;
2264}
2265
2266/**
2267 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2268 * @oh: struct omap_hwmod *
2269 *
2270 * Return the powerdomain pointer associated with the OMAP module
2271 * @oh's main clock. If @oh does not have a main clk, return the
2272 * powerdomain associated with the interface clock associated with the
2273 * module's MPU port. (XXX Perhaps this should use the SDMA port
2274 * instead?) Returns NULL on error, or a struct powerdomain * on
2275 * success.
2276 */
2277struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2278{
2279 struct clk *c;
2280
2281 if (!oh)
2282 return NULL;
2283
2284 if (oh->_clk) {
2285 c = oh->_clk;
2286 } else {
2287 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2288 return NULL;
2289 c = oh->slaves[oh->_mpu_port_index]->_clk;
2290 }
2291
d5647c18
TG
2292 if (!c->clkdm)
2293 return NULL;
2294
63c85238
PW
2295 return c->clkdm->pwrdm.ptr;
2296
2297}
2298
db2a60bf
PW
2299/**
2300 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2301 * @oh: struct omap_hwmod *
2302 *
2303 * Returns the virtual address corresponding to the beginning of the
2304 * module's register target, in the address range that is intended to
2305 * be used by the MPU. Returns the virtual address upon success or NULL
2306 * upon error.
2307 */
2308void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2309{
2310 if (!oh)
2311 return NULL;
2312
2313 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2314 return NULL;
2315
2316 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2317 return NULL;
2318
2319 return oh->_mpu_rt_va;
2320}
2321
63c85238
PW
2322/**
2323 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2324 * @oh: struct omap_hwmod *
2325 * @init_oh: struct omap_hwmod * (initiator)
2326 *
2327 * Add a sleep dependency between the initiator @init_oh and @oh.
2328 * Intended to be called by DSP/Bridge code via platform_data for the
2329 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2330 * code needs to add/del initiator dependencies dynamically
2331 * before/after accessing a device. Returns the return value from
2332 * _add_initiator_dep().
2333 *
2334 * XXX Keep a usecount in the clockdomain code
2335 */
2336int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2337 struct omap_hwmod *init_oh)
2338{
2339 return _add_initiator_dep(oh, init_oh);
2340}
2341
2342/*
2343 * XXX what about functions for drivers to save/restore ocp_sysconfig
2344 * for context save/restore operations?
2345 */
2346
2347/**
2348 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2349 * @oh: struct omap_hwmod *
2350 * @init_oh: struct omap_hwmod * (initiator)
2351 *
2352 * Remove a sleep dependency between the initiator @init_oh and @oh.
2353 * Intended to be called by DSP/Bridge code via platform_data for the
2354 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2355 * code needs to add/del initiator dependencies dynamically
2356 * before/after accessing a device. Returns the return value from
2357 * _del_initiator_dep().
2358 *
2359 * XXX Keep a usecount in the clockdomain code
2360 */
2361int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2362 struct omap_hwmod *init_oh)
2363{
2364 return _del_initiator_dep(oh, init_oh);
2365}
2366
63c85238
PW
2367/**
2368 * omap_hwmod_enable_wakeup - allow device to wake up the system
2369 * @oh: struct omap_hwmod *
2370 *
2371 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2372 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2373 * registers to cause the PRCM to receive wakeup events from the
2374 * module. Does not set any wakeup routing registers beyond this
2375 * point - if the module is to wake up any other module or subsystem,
2376 * that must be set separately. Called by omap_device code. Returns
2377 * -EINVAL on error or 0 upon success.
2378 */
2379int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2380{
dc6d1cda 2381 unsigned long flags;
5a7ddcbd 2382 u32 v;
dc6d1cda 2383
43b40992
PW
2384 if (!oh->class->sysc ||
2385 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2386 return -EINVAL;
2387
dc6d1cda 2388 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2389 v = oh->_sysc_cache;
2390 _enable_wakeup(oh, &v);
2391 _write_sysconfig(v, oh);
dc6d1cda 2392 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2393
2394 return 0;
2395}
2396
2397/**
2398 * omap_hwmod_disable_wakeup - prevent device from waking the system
2399 * @oh: struct omap_hwmod *
2400 *
2401 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2402 * from sending wakeups to the PRCM. Eventually this should clear
2403 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2404 * from the module. Does not set any wakeup routing registers beyond
2405 * this point - if the module is to wake up any other module or
2406 * subsystem, that must be set separately. Called by omap_device
2407 * code. Returns -EINVAL on error or 0 upon success.
2408 */
2409int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2410{
dc6d1cda 2411 unsigned long flags;
5a7ddcbd 2412 u32 v;
dc6d1cda 2413
43b40992
PW
2414 if (!oh->class->sysc ||
2415 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2416 return -EINVAL;
2417
dc6d1cda 2418 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2419 v = oh->_sysc_cache;
2420 _disable_wakeup(oh, &v);
2421 _write_sysconfig(v, oh);
dc6d1cda 2422 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2423
2424 return 0;
2425}
43b40992 2426
aee48e3c
PW
2427/**
2428 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2429 * contained in the hwmod module.
2430 * @oh: struct omap_hwmod *
2431 * @name: name of the reset line to lookup and assert
2432 *
2433 * Some IP like dsp, ipu or iva contain processor that require
2434 * an HW reset line to be assert / deassert in order to enable fully
2435 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2436 * yet supported on this OMAP; otherwise, passes along the return value
2437 * from _assert_hardreset().
2438 */
2439int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2440{
2441 int ret;
dc6d1cda 2442 unsigned long flags;
aee48e3c
PW
2443
2444 if (!oh)
2445 return -EINVAL;
2446
dc6d1cda 2447 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2448 ret = _assert_hardreset(oh, name);
dc6d1cda 2449 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2450
2451 return ret;
2452}
2453
2454/**
2455 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2456 * contained in the hwmod module.
2457 * @oh: struct omap_hwmod *
2458 * @name: name of the reset line to look up and deassert
2459 *
2460 * Some IP like dsp, ipu or iva contain processor that require
2461 * an HW reset line to be assert / deassert in order to enable fully
2462 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2463 * yet supported on this OMAP; otherwise, passes along the return value
2464 * from _deassert_hardreset().
2465 */
2466int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2467{
2468 int ret;
dc6d1cda 2469 unsigned long flags;
aee48e3c
PW
2470
2471 if (!oh)
2472 return -EINVAL;
2473
dc6d1cda 2474 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2475 ret = _deassert_hardreset(oh, name);
dc6d1cda 2476 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2477
2478 return ret;
2479}
2480
2481/**
2482 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2483 * contained in the hwmod module
2484 * @oh: struct omap_hwmod *
2485 * @name: name of the reset line to look up and read
2486 *
2487 * Return the current state of the hwmod @oh's reset line named @name:
2488 * returns -EINVAL upon parameter error or if this operation
2489 * is unsupported on the current OMAP; otherwise, passes along the return
2490 * value from _read_hardreset().
2491 */
2492int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2493{
2494 int ret;
dc6d1cda 2495 unsigned long flags;
aee48e3c
PW
2496
2497 if (!oh)
2498 return -EINVAL;
2499
dc6d1cda 2500 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2501 ret = _read_hardreset(oh, name);
dc6d1cda 2502 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2503
2504 return ret;
2505}
2506
2507
43b40992
PW
2508/**
2509 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2510 * @classname: struct omap_hwmod_class name to search for
2511 * @fn: callback function pointer to call for each hwmod in class @classname
2512 * @user: arbitrary context data to pass to the callback function
2513 *
ce35b244
BC
2514 * For each omap_hwmod of class @classname, call @fn.
2515 * If the callback function returns something other than
43b40992
PW
2516 * zero, the iterator is terminated, and the callback function's return
2517 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2518 * if @classname or @fn are NULL, or passes back the error code from @fn.
2519 */
2520int omap_hwmod_for_each_by_class(const char *classname,
2521 int (*fn)(struct omap_hwmod *oh,
2522 void *user),
2523 void *user)
2524{
2525 struct omap_hwmod *temp_oh;
2526 int ret = 0;
2527
2528 if (!classname || !fn)
2529 return -EINVAL;
2530
2531 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2532 __func__, classname);
2533
43b40992
PW
2534 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2535 if (!strcmp(temp_oh->class->name, classname)) {
2536 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2537 __func__, temp_oh->name);
2538 ret = (*fn)(temp_oh, user);
2539 if (ret)
2540 break;
2541 }
2542 }
2543
43b40992
PW
2544 if (ret)
2545 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2546 __func__, ret);
2547
2548 return ret;
2549}
2550
2092e5cc
PW
2551/**
2552 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2553 * @oh: struct omap_hwmod *
2554 * @state: state that _setup() should leave the hwmod in
2555 *
550c8092 2556 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2557 * (called by omap_hwmod_setup_*()). Only valid to call between
2558 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2559 * 0 upon success or -EINVAL if there is a problem with the arguments
2560 * or if the hwmod is in the wrong state.
2092e5cc
PW
2561 */
2562int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2563{
2564 int ret;
dc6d1cda 2565 unsigned long flags;
2092e5cc
PW
2566
2567 if (!oh)
2568 return -EINVAL;
2569
2570 if (state != _HWMOD_STATE_DISABLED &&
2571 state != _HWMOD_STATE_ENABLED &&
2572 state != _HWMOD_STATE_IDLE)
2573 return -EINVAL;
2574
dc6d1cda 2575 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2576
2577 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2578 ret = -EINVAL;
2579 goto ohsps_unlock;
2580 }
2581
2582 oh->_postsetup_state = state;
2583 ret = 0;
2584
2585ohsps_unlock:
dc6d1cda 2586 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2587
2588 return ret;
2589}
c80705aa
KH
2590
2591/**
2592 * omap_hwmod_get_context_loss_count - get lost context count
2593 * @oh: struct omap_hwmod *
2594 *
2595 * Query the powerdomain of of @oh to get the context loss
2596 * count for this device.
2597 *
2598 * Returns the context loss count of the powerdomain assocated with @oh
2599 * upon success, or zero if no powerdomain exists for @oh.
2600 */
2601u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2602{
2603 struct powerdomain *pwrdm;
2604 int ret = 0;
2605
2606 pwrdm = omap_hwmod_get_pwrdm(oh);
2607 if (pwrdm)
2608 ret = pwrdm_get_context_loss_count(pwrdm);
2609
2610 return ret;
2611}
43b01643
PW
2612
2613/**
2614 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2615 * @oh: struct omap_hwmod *
2616 *
2617 * Prevent the hwmod @oh from being reset during the setup process.
2618 * Intended for use by board-*.c files on boards with devices that
2619 * cannot tolerate being reset. Must be called before the hwmod has
2620 * been set up. Returns 0 upon success or negative error code upon
2621 * failure.
2622 */
2623int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2624{
2625 if (!oh)
2626 return -EINVAL;
2627
2628 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2629 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2630 oh->name);
2631 return -EINVAL;
2632 }
2633
2634 oh->flags |= HWMOD_INIT_NO_RESET;
2635
2636 return 0;
2637}