OMAP: hwmod: Wait the idle status to be disabled
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
78183f3f 5 * Copyright (C) 2011 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
63c85238 139
6f8b7ff5 140#include <plat/common.h>
ce491cf8 141#include <plat/cpu.h>
1540f214 142#include "clockdomain.h"
72e06d08 143#include "powerdomain.h"
ce491cf8
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144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
5365efbe 146#include <plat/prcm.h>
63c85238 147
59fb659b 148#include "cm2xxx_3xxx.h"
d0f0631d 149#include "cminst44xx.h"
59fb659b 150#include "prm2xxx_3xxx.h"
d198b514 151#include "prm44xx.h"
8d9af88f 152#include "mux.h"
63c85238 153
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154/* Maximum microseconds to wait for OMAP module to softreset */
155#define MAX_MODULE_SOFTRESET_WAIT 10000
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156
157/* Name of the OMAP hwmod for the MPU */
5c2c0296 158#define MPU_INITIATOR_NAME "mpu"
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159
160/* omap_hwmod_list contains all registered struct omap_hwmods */
161static LIST_HEAD(omap_hwmod_list);
162
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163/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
164static struct omap_hwmod *mpu_oh;
165
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166
167/* Private functions */
168
169/**
170 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
171 * @oh: struct omap_hwmod *
172 *
173 * Load the current value of the hwmod OCP_SYSCONFIG register into the
174 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
175 * OCP_SYSCONFIG register or 0 upon success.
176 */
177static int _update_sysc_cache(struct omap_hwmod *oh)
178{
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179 if (!oh->class->sysc) {
180 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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181 return -EINVAL;
182 }
183
184 /* XXX ensure module interface clock is up */
185
cc7a1d2a 186 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 187
43b40992 188 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 189 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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190
191 return 0;
192}
193
194/**
195 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
196 * @v: OCP_SYSCONFIG value to write
197 * @oh: struct omap_hwmod *
198 *
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199 * Write @v into the module class' OCP_SYSCONFIG register, if it has
200 * one. No return value.
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201 */
202static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
203{
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204 if (!oh->class->sysc) {
205 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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206 return;
207 }
208
209 /* XXX ensure module interface clock is up */
210
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211 /* Module might have lost context, always update cache and register */
212 oh->_sysc_cache = v;
213 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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214}
215
216/**
217 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
218 * @oh: struct omap_hwmod *
219 * @standbymode: MIDLEMODE field bits
220 * @v: pointer to register contents to modify
221 *
222 * Update the master standby mode bits in @v to be @standbymode for
223 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
224 * upon error or 0 upon success.
225 */
226static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
227 u32 *v)
228{
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229 u32 mstandby_mask;
230 u8 mstandby_shift;
231
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232 if (!oh->class->sysc ||
233 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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234 return -EINVAL;
235
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236 if (!oh->class->sysc->sysc_fields) {
237 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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238 return -EINVAL;
239 }
240
43b40992 241 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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242 mstandby_mask = (0x3 << mstandby_shift);
243
244 *v &= ~mstandby_mask;
245 *v |= __ffs(standbymode) << mstandby_shift;
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246
247 return 0;
248}
249
250/**
251 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
252 * @oh: struct omap_hwmod *
253 * @idlemode: SIDLEMODE field bits
254 * @v: pointer to register contents to modify
255 *
256 * Update the slave idle mode bits in @v to be @idlemode for the @oh
257 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
258 * or 0 upon success.
259 */
260static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
261{
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262 u32 sidle_mask;
263 u8 sidle_shift;
264
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265 if (!oh->class->sysc ||
266 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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267 return -EINVAL;
268
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269 if (!oh->class->sysc->sysc_fields) {
270 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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271 return -EINVAL;
272 }
273
43b40992 274 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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275 sidle_mask = (0x3 << sidle_shift);
276
277 *v &= ~sidle_mask;
278 *v |= __ffs(idlemode) << sidle_shift;
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279
280 return 0;
281}
282
283/**
284 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
285 * @oh: struct omap_hwmod *
286 * @clockact: CLOCKACTIVITY field bits
287 * @v: pointer to register contents to modify
288 *
289 * Update the clockactivity mode bits in @v to be @clockact for the
290 * @oh hwmod. Used for additional powersaving on some modules. Does
291 * not write to the hardware. Returns -EINVAL upon error or 0 upon
292 * success.
293 */
294static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
295{
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296 u32 clkact_mask;
297 u8 clkact_shift;
298
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299 if (!oh->class->sysc ||
300 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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301 return -EINVAL;
302
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303 if (!oh->class->sysc->sysc_fields) {
304 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
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305 return -EINVAL;
306 }
307
43b40992 308 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
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309 clkact_mask = (0x3 << clkact_shift);
310
311 *v &= ~clkact_mask;
312 *v |= clockact << clkact_shift;
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313
314 return 0;
315}
316
317/**
318 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
319 * @oh: struct omap_hwmod *
320 * @v: pointer to register contents to modify
321 *
322 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
323 * error or 0 upon success.
324 */
325static int _set_softreset(struct omap_hwmod *oh, u32 *v)
326{
358f0e63
TG
327 u32 softrst_mask;
328
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329 if (!oh->class->sysc ||
330 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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331 return -EINVAL;
332
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333 if (!oh->class->sysc->sysc_fields) {
334 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
335 return -EINVAL;
336 }
337
43b40992 338 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
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339
340 *v |= softrst_mask;
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341
342 return 0;
343}
344
726072e5
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345/**
346 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
347 * @oh: struct omap_hwmod *
348 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
349 * @v: pointer to register contents to modify
350 *
351 * Update the module autoidle bit in @v to be @autoidle for the @oh
352 * hwmod. The autoidle bit controls whether the module can gate
353 * internal clocks automatically when it isn't doing anything; the
354 * exact function of this bit varies on a per-module basis. This
355 * function does not write to the hardware. Returns -EINVAL upon
356 * error or 0 upon success.
357 */
358static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
359 u32 *v)
360{
358f0e63
TG
361 u32 autoidle_mask;
362 u8 autoidle_shift;
363
43b40992
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364 if (!oh->class->sysc ||
365 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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366 return -EINVAL;
367
43b40992
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368 if (!oh->class->sysc->sysc_fields) {
369 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
370 return -EINVAL;
371 }
372
43b40992 373 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 374 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
375
376 *v &= ~autoidle_mask;
377 *v |= autoidle << autoidle_shift;
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378
379 return 0;
380}
381
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382/**
383 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
384 * @oh: struct omap_hwmod *
385 *
386 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
387 * upon error or 0 upon success.
388 */
5a7ddcbd 389static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 390{
43b40992 391 if (!oh->class->sysc ||
86009eb3 392 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
393 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
394 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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395 return -EINVAL;
396
43b40992
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397 if (!oh->class->sysc->sysc_fields) {
398 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
399 return -EINVAL;
400 }
401
1fe74113
BC
402 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
403 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 404
86009eb3
BC
405 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
406 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
407 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
408 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 409
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410 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
411
412 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
413
414 return 0;
415}
416
417/**
418 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
419 * @oh: struct omap_hwmod *
420 *
421 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
422 * upon error or 0 upon success.
423 */
5a7ddcbd 424static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 425{
43b40992 426 if (!oh->class->sysc ||
86009eb3 427 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
428 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
429 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
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430 return -EINVAL;
431
43b40992
PW
432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
1fe74113
BC
437 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
438 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 439
86009eb3
BC
440 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
441 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
442 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
443 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 444
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445 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
446
447 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
448
449 return 0;
450}
451
452/**
453 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
454 * @oh: struct omap_hwmod *
455 *
456 * Prevent the hardware module @oh from entering idle while the
457 * hardare module initiator @init_oh is active. Useful when a module
458 * will be accessed by a particular initiator (e.g., if a module will
459 * be accessed by the IVA, there should be a sleepdep between the IVA
460 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
461 * mode. If the clockdomain is marked as not needing autodeps, return
462 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
463 * passes along clkdm_add_sleepdep() value upon success.
63c85238
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464 */
465static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
466{
467 if (!oh->_clk)
468 return -EINVAL;
469
570b54c7
PW
470 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
471 return 0;
472
55ed9694 473 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
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474}
475
476/**
477 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
478 * @oh: struct omap_hwmod *
479 *
480 * Allow the hardware module @oh to enter idle while the hardare
481 * module initiator @init_oh is active. Useful when a module will not
482 * be accessed by a particular initiator (e.g., if a module will not
483 * be accessed by the IVA, there should be no sleepdep between the IVA
484 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
485 * mode. If the clockdomain is marked as not needing autodeps, return
486 * 0 without doing anything. Returns -EINVAL upon error or passes
487 * along clkdm_del_sleepdep() value upon success.
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488 */
489static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
490{
491 if (!oh->_clk)
492 return -EINVAL;
493
570b54c7
PW
494 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
495 return 0;
496
55ed9694 497 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
498}
499
500/**
501 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
502 * @oh: struct omap_hwmod *
503 *
504 * Called from _init_clocks(). Populates the @oh _clk (main
505 * functional clock pointer) if a main_clk is present. Returns 0 on
506 * success or -EINVAL on error.
507 */
508static int _init_main_clk(struct omap_hwmod *oh)
509{
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510 int ret = 0;
511
50ebdac2 512 if (!oh->main_clk)
63c85238
PW
513 return 0;
514
63403384 515 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 516 if (!oh->_clk) {
20383d82
BC
517 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
518 oh->name, oh->main_clk);
63403384 519 return -EINVAL;
dc75925d 520 }
63c85238 521
63403384
BC
522 if (!oh->_clk->clkdm)
523 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
524 oh->main_clk, oh->_clk->name);
81d7c6ff 525
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526 return ret;
527}
528
529/**
887adeac 530 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
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531 * @oh: struct omap_hwmod *
532 *
533 * Called from _init_clocks(). Populates the @oh OCP slave interface
534 * clock pointers. Returns 0 on success or -EINVAL on error.
535 */
536static int _init_interface_clks(struct omap_hwmod *oh)
537{
63c85238
PW
538 struct clk *c;
539 int i;
540 int ret = 0;
541
542 if (oh->slaves_cnt == 0)
543 return 0;
544
682fdc96
BC
545 for (i = 0; i < oh->slaves_cnt; i++) {
546 struct omap_hwmod_ocp_if *os = oh->slaves[i];
547
50ebdac2 548 if (!os->clk)
63c85238
PW
549 continue;
550
50ebdac2 551 c = omap_clk_get_by_name(os->clk);
dc75925d 552 if (!c) {
20383d82
BC
553 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
554 oh->name, os->clk);
63c85238 555 ret = -EINVAL;
dc75925d 556 }
63c85238
PW
557 os->_clk = c;
558 }
559
560 return ret;
561}
562
563/**
564 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
565 * @oh: struct omap_hwmod *
566 *
567 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
568 * clock pointers. Returns 0 on success or -EINVAL on error.
569 */
570static int _init_opt_clks(struct omap_hwmod *oh)
571{
572 struct omap_hwmod_opt_clk *oc;
573 struct clk *c;
574 int i;
575 int ret = 0;
576
577 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 578 c = omap_clk_get_by_name(oc->clk);
dc75925d 579 if (!c) {
20383d82
BC
580 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
581 oh->name, oc->clk);
63c85238 582 ret = -EINVAL;
dc75925d 583 }
63c85238
PW
584 oc->_clk = c;
585 }
586
587 return ret;
588}
589
590/**
591 * _enable_clocks - enable hwmod main clock and interface clocks
592 * @oh: struct omap_hwmod *
593 *
594 * Enables all clocks necessary for register reads and writes to succeed
595 * on the hwmod @oh. Returns 0.
596 */
597static int _enable_clocks(struct omap_hwmod *oh)
598{
63c85238
PW
599 int i;
600
601 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
602
4d3ae5a9 603 if (oh->_clk)
63c85238
PW
604 clk_enable(oh->_clk);
605
606 if (oh->slaves_cnt > 0) {
682fdc96
BC
607 for (i = 0; i < oh->slaves_cnt; i++) {
608 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
609 struct clk *c = os->_clk;
610
4d3ae5a9 611 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
612 clk_enable(c);
613 }
614 }
615
616 /* The opt clocks are controlled by the device driver. */
617
618 return 0;
619}
620
621/**
622 * _disable_clocks - disable hwmod main clock and interface clocks
623 * @oh: struct omap_hwmod *
624 *
625 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
626 */
627static int _disable_clocks(struct omap_hwmod *oh)
628{
63c85238
PW
629 int i;
630
631 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
632
4d3ae5a9 633 if (oh->_clk)
63c85238
PW
634 clk_disable(oh->_clk);
635
636 if (oh->slaves_cnt > 0) {
682fdc96
BC
637 for (i = 0; i < oh->slaves_cnt; i++) {
638 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
639 struct clk *c = os->_clk;
640
4d3ae5a9 641 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
642 clk_disable(c);
643 }
644 }
645
646 /* The opt clocks are controlled by the device driver. */
647
648 return 0;
649}
650
96835af9
BC
651static void _enable_optional_clocks(struct omap_hwmod *oh)
652{
653 struct omap_hwmod_opt_clk *oc;
654 int i;
655
656 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
657
658 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
659 if (oc->_clk) {
660 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
661 oc->_clk->name);
662 clk_enable(oc->_clk);
663 }
664}
665
666static void _disable_optional_clocks(struct omap_hwmod *oh)
667{
668 struct omap_hwmod_opt_clk *oc;
669 int i;
670
671 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
672
673 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
674 if (oc->_clk) {
675 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
676 oc->_clk->name);
677 clk_disable(oc->_clk);
678 }
679}
680
212738a4
PW
681/**
682 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
683 * @oh: struct omap_hwmod *oh
684 *
685 * Count and return the number of MPU IRQs associated with the hwmod
686 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
687 * NULL.
688 */
689static int _count_mpu_irqs(struct omap_hwmod *oh)
690{
691 struct omap_hwmod_irq_info *ohii;
692 int i = 0;
693
694 if (!oh || !oh->mpu_irqs)
695 return 0;
696
697 do {
698 ohii = &oh->mpu_irqs[i++];
699 } while (ohii->irq != -1);
700
701 return i;
702}
703
bc614958
PW
704/**
705 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
706 * @oh: struct omap_hwmod *oh
707 *
708 * Count and return the number of SDMA request lines associated with
709 * the hwmod @oh. Used to allocate struct resource data. Returns 0
710 * if @oh is NULL.
711 */
712static int _count_sdma_reqs(struct omap_hwmod *oh)
713{
714 struct omap_hwmod_dma_info *ohdi;
715 int i = 0;
716
717 if (!oh || !oh->sdma_reqs)
718 return 0;
719
720 do {
721 ohdi = &oh->sdma_reqs[i++];
722 } while (ohdi->dma_req != -1);
723
724 return i;
725}
726
78183f3f
PW
727/**
728 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
729 * @oh: struct omap_hwmod *oh
730 *
731 * Count and return the number of address space ranges associated with
732 * the hwmod @oh. Used to allocate struct resource data. Returns 0
733 * if @oh is NULL.
734 */
735static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
736{
737 struct omap_hwmod_addr_space *mem;
738 int i = 0;
739
740 if (!os || !os->addr)
741 return 0;
742
743 do {
744 mem = &os->addr[i++];
745 } while (mem->pa_start != mem->pa_end);
746
747 return i;
748}
749
63c85238
PW
750/**
751 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
752 * @oh: struct omap_hwmod *
753 *
754 * Returns the array index of the OCP slave port that the MPU
755 * addresses the device on, or -EINVAL upon error or not found.
756 */
01592df9 757static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 758{
63c85238
PW
759 int i;
760 int found = 0;
761
762 if (!oh || oh->slaves_cnt == 0)
763 return -EINVAL;
764
682fdc96
BC
765 for (i = 0; i < oh->slaves_cnt; i++) {
766 struct omap_hwmod_ocp_if *os = oh->slaves[i];
767
63c85238
PW
768 if (os->user & OCP_USER_MPU) {
769 found = 1;
770 break;
771 }
772 }
773
774 if (found)
775 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
776 oh->name, i);
777 else
778 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
779 oh->name);
780
781 return (found) ? i : -EINVAL;
782}
783
784/**
785 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
786 * @oh: struct omap_hwmod *
787 *
788 * Return the virtual address of the base of the register target of
789 * device @oh, or NULL on error.
790 */
01592df9 791static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
792{
793 struct omap_hwmod_ocp_if *os;
794 struct omap_hwmod_addr_space *mem;
78183f3f 795 int i = 0, found = 0;
986a13f5 796 void __iomem *va_start;
63c85238
PW
797
798 if (!oh || oh->slaves_cnt == 0)
799 return NULL;
800
682fdc96 801 os = oh->slaves[index];
63c85238 802
78183f3f
PW
803 if (!os->addr)
804 return NULL;
805
806 do {
807 mem = &os->addr[i++];
808 if (mem->flags & ADDR_TYPE_RT)
63c85238 809 found = 1;
78183f3f 810 } while (!found && mem->pa_start != mem->pa_end);
63c85238 811
986a13f5
TL
812 if (found) {
813 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
814 if (!va_start) {
815 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
816 return NULL;
817 }
63c85238 818 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
819 oh->name, va_start);
820 } else {
63c85238
PW
821 pr_debug("omap_hwmod: %s: no MPU register target found\n",
822 oh->name);
986a13f5 823 }
63c85238 824
986a13f5 825 return (found) ? va_start : NULL;
63c85238
PW
826}
827
828/**
74ff3a68 829 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
830 * @oh: struct omap_hwmod *
831 *
832 * If module is marked as SWSUP_SIDLE, force the module out of slave
833 * idle; otherwise, configure it for smart-idle. If module is marked
834 * as SWSUP_MSUSPEND, force the module out of master standby;
835 * otherwise, configure it for smart-standby. No return value.
836 */
74ff3a68 837static void _enable_sysc(struct omap_hwmod *oh)
63c85238 838{
43b40992 839 u8 idlemode, sf;
63c85238
PW
840 u32 v;
841
43b40992 842 if (!oh->class->sysc)
63c85238
PW
843 return;
844
845 v = oh->_sysc_cache;
43b40992 846 sf = oh->class->sysc->sysc_flags;
63c85238 847
43b40992 848 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
849 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
850 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
851 _set_slave_idlemode(oh, idlemode, &v);
852 }
853
43b40992 854 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
855 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
856 idlemode = HWMOD_IDLEMODE_NO;
857 } else {
858 if (sf & SYSC_HAS_ENAWAKEUP)
859 _enable_wakeup(oh, &v);
860 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
861 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
862 else
863 idlemode = HWMOD_IDLEMODE_SMART;
864 }
63c85238
PW
865 _set_master_standbymode(oh, idlemode, &v);
866 }
867
a16b1f7f
PW
868 /*
869 * XXX The clock framework should handle this, by
870 * calling into this code. But this must wait until the
871 * clock structures are tagged with omap_hwmod entries
872 */
43b40992
PW
873 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
874 (sf & SYSC_HAS_CLOCKACTIVITY))
875 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 876
9980ce53
RN
877 /* If slave is in SMARTIDLE, also enable wakeup */
878 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
879 _enable_wakeup(oh, &v);
880
881 _write_sysconfig(v, oh);
78f26e87
HH
882
883 /*
884 * Set the autoidle bit only after setting the smartidle bit
885 * Setting this will not have any impact on the other modules.
886 */
887 if (sf & SYSC_HAS_AUTOIDLE) {
888 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
889 0 : 1;
890 _set_module_autoidle(oh, idlemode, &v);
891 _write_sysconfig(v, oh);
892 }
63c85238
PW
893}
894
895/**
74ff3a68 896 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
897 * @oh: struct omap_hwmod *
898 *
899 * If module is marked as SWSUP_SIDLE, force the module into slave
900 * idle; otherwise, configure it for smart-idle. If module is marked
901 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
902 * configure it for smart-standby. No return value.
903 */
74ff3a68 904static void _idle_sysc(struct omap_hwmod *oh)
63c85238 905{
43b40992 906 u8 idlemode, sf;
63c85238
PW
907 u32 v;
908
43b40992 909 if (!oh->class->sysc)
63c85238
PW
910 return;
911
912 v = oh->_sysc_cache;
43b40992 913 sf = oh->class->sysc->sysc_flags;
63c85238 914
43b40992 915 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
916 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
917 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
918 _set_slave_idlemode(oh, idlemode, &v);
919 }
920
43b40992 921 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
922 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
923 idlemode = HWMOD_IDLEMODE_FORCE;
924 } else {
925 if (sf & SYSC_HAS_ENAWAKEUP)
926 _enable_wakeup(oh, &v);
927 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
928 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
929 else
930 idlemode = HWMOD_IDLEMODE_SMART;
931 }
63c85238
PW
932 _set_master_standbymode(oh, idlemode, &v);
933 }
934
86009eb3
BC
935 /* If slave is in SMARTIDLE, also enable wakeup */
936 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
937 _enable_wakeup(oh, &v);
938
63c85238
PW
939 _write_sysconfig(v, oh);
940}
941
942/**
74ff3a68 943 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
944 * @oh: struct omap_hwmod *
945 *
946 * Force the module into slave idle and master suspend. No return
947 * value.
948 */
74ff3a68 949static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
950{
951 u32 v;
43b40992 952 u8 sf;
63c85238 953
43b40992 954 if (!oh->class->sysc)
63c85238
PW
955 return;
956
957 v = oh->_sysc_cache;
43b40992 958 sf = oh->class->sysc->sysc_flags;
63c85238 959
43b40992 960 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
961 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
962
43b40992 963 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
964 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
965
43b40992 966 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 967 _set_module_autoidle(oh, 1, &v);
63c85238
PW
968
969 _write_sysconfig(v, oh);
970}
971
972/**
973 * _lookup - find an omap_hwmod by name
974 * @name: find an omap_hwmod by name
975 *
976 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
977 */
978static struct omap_hwmod *_lookup(const char *name)
979{
980 struct omap_hwmod *oh, *temp_oh;
981
982 oh = NULL;
983
984 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
985 if (!strcmp(name, temp_oh->name)) {
986 oh = temp_oh;
987 break;
988 }
989 }
990
991 return oh;
992}
6ae76997
BC
993/**
994 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
995 * @oh: struct omap_hwmod *
996 *
997 * Convert a clockdomain name stored in a struct omap_hwmod into a
998 * clockdomain pointer, and save it into the struct omap_hwmod.
999 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1000 */
1001static int _init_clkdm(struct omap_hwmod *oh)
1002{
1003 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1004 return 0;
1005
1006 if (!oh->clkdm_name) {
1007 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1008 return -EINVAL;
1009 }
1010
1011 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1012 if (!oh->clkdm) {
1013 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1014 oh->name, oh->clkdm_name);
1015 return -EINVAL;
1016 }
1017
1018 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1019 oh->name, oh->clkdm_name);
1020
1021 return 0;
1022}
63c85238
PW
1023
1024/**
6ae76997
BC
1025 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1026 * well the clockdomain.
63c85238 1027 * @oh: struct omap_hwmod *
97d60162 1028 * @data: not used; pass NULL
63c85238 1029 *
a2debdbd 1030 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1031 * Resolves all clock names embedded in the hwmod. Returns 0 on
1032 * success, or a negative error code on failure.
63c85238 1033 */
97d60162 1034static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1035{
1036 int ret = 0;
1037
48d54f3f
PW
1038 if (oh->_state != _HWMOD_STATE_REGISTERED)
1039 return 0;
63c85238
PW
1040
1041 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1042
1043 ret |= _init_main_clk(oh);
1044 ret |= _init_interface_clks(oh);
1045 ret |= _init_opt_clks(oh);
6ae76997 1046 ret |= _init_clkdm(oh);
63c85238 1047
f5c1f84b
BC
1048 if (!ret)
1049 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1050 else
1051 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1052
09c35f2f 1053 return ret;
63c85238
PW
1054}
1055
1056/**
1057 * _wait_target_ready - wait for a module to leave slave idle
1058 * @oh: struct omap_hwmod *
1059 *
1060 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1061 * does not have an IDLEST bit or if the module successfully leaves
1062 * slave idle; otherwise, pass along the return value of the
d0f0631d 1063 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1064 */
1065static int _wait_target_ready(struct omap_hwmod *oh)
1066{
1067 struct omap_hwmod_ocp_if *os;
1068 int ret;
1069
1070 if (!oh)
1071 return -EINVAL;
1072
1073 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1074 return 0;
1075
682fdc96 1076 os = oh->slaves[oh->_mpu_port_index];
63c85238 1077
33f7ec81 1078 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1079 return 0;
1080
1081 /* XXX check module SIDLEMODE */
1082
1083 /* XXX check clock enable states */
1084
1085 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1086 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1087 oh->prcm.omap2.idlest_reg_id,
1088 oh->prcm.omap2.idlest_idle_bit);
63c85238 1089 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1090 if (!oh->clkdm)
1091 return -EINVAL;
1092
1093 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1094 oh->clkdm->cm_inst,
1095 oh->clkdm->clkdm_offs,
1096 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1097 } else {
1098 BUG();
1099 };
1100
1101 return ret;
1102}
1103
11b10341
BC
1104/**
1105 * _wait_target_disable - wait for a module to be disabled
1106 * @oh: struct omap_hwmod *
1107 *
1108 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1109 * does not have an IDLEST bit or if the module successfully enters
1110 * slave idle; otherwise, pass along the return value of the
1111 * appropriate *_cm*_wait_module_idle() function.
1112 */
1113static int _wait_target_disable(struct omap_hwmod *oh)
1114{
1115 /* TODO: For now just handle OMAP4+ */
1116 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1117 return 0;
1118
1119 if (!oh)
1120 return -EINVAL;
1121
1122 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1123 return 0;
1124
1125 if (oh->flags & HWMOD_NO_IDLEST)
1126 return 0;
1127
1128 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1129 oh->clkdm->cm_inst,
1130 oh->clkdm->clkdm_offs,
1131 oh->prcm.omap4.clkctrl_offs);
1132}
1133
5365efbe 1134/**
cc1226e7 1135 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1136 * @oh: struct omap_hwmod *
1137 * @name: name of the reset line in the context of this hwmod
cc1226e7 1138 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1139 *
1140 * Return the bit position of the reset line that match the
1141 * input name. Return -ENOENT if not found.
1142 */
cc1226e7 1143static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1144 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1145{
1146 int i;
1147
1148 for (i = 0; i < oh->rst_lines_cnt; i++) {
1149 const char *rst_line = oh->rst_lines[i].name;
1150 if (!strcmp(rst_line, name)) {
cc1226e7 1151 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1152 ohri->st_shift = oh->rst_lines[i].st_shift;
1153 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1154 oh->name, __func__, rst_line, ohri->rst_shift,
1155 ohri->st_shift);
5365efbe 1156
cc1226e7 1157 return 0;
5365efbe
BC
1158 }
1159 }
1160
1161 return -ENOENT;
1162}
1163
1164/**
1165 * _assert_hardreset - assert the HW reset line of submodules
1166 * contained in the hwmod module.
1167 * @oh: struct omap_hwmod *
1168 * @name: name of the reset line to lookup and assert
1169 *
1170 * Some IP like dsp, ipu or iva contain processor that require
1171 * an HW reset line to be assert / deassert in order to enable fully
1172 * the IP.
1173 */
1174static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1175{
cc1226e7 1176 struct omap_hwmod_rst_info ohri;
1177 u8 ret;
5365efbe
BC
1178
1179 if (!oh)
1180 return -EINVAL;
1181
cc1226e7 1182 ret = _lookup_hardreset(oh, name, &ohri);
1183 if (IS_ERR_VALUE(ret))
1184 return ret;
5365efbe
BC
1185
1186 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1187 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1188 ohri.rst_shift);
5365efbe
BC
1189 else if (cpu_is_omap44xx())
1190 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1191 ohri.rst_shift);
5365efbe
BC
1192 else
1193 return -EINVAL;
1194}
1195
1196/**
1197 * _deassert_hardreset - deassert the HW reset line of submodules contained
1198 * in the hwmod module.
1199 * @oh: struct omap_hwmod *
1200 * @name: name of the reset line to look up and deassert
1201 *
1202 * Some IP like dsp, ipu or iva contain processor that require
1203 * an HW reset line to be assert / deassert in order to enable fully
1204 * the IP.
1205 */
1206static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1207{
cc1226e7 1208 struct omap_hwmod_rst_info ohri;
1209 int ret;
5365efbe
BC
1210
1211 if (!oh)
1212 return -EINVAL;
1213
cc1226e7 1214 ret = _lookup_hardreset(oh, name, &ohri);
1215 if (IS_ERR_VALUE(ret))
1216 return ret;
5365efbe 1217
cc1226e7 1218 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1219 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1220 ohri.rst_shift,
1221 ohri.st_shift);
1222 } else if (cpu_is_omap44xx()) {
1223 if (ohri.st_shift)
1224 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1225 oh->name, name);
1226 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1227 ohri.rst_shift);
1228 } else {
5365efbe 1229 return -EINVAL;
cc1226e7 1230 }
5365efbe 1231
cc1226e7 1232 if (ret == -EBUSY)
5365efbe
BC
1233 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1234
cc1226e7 1235 return ret;
5365efbe
BC
1236}
1237
1238/**
1239 * _read_hardreset - read the HW reset line state of submodules
1240 * contained in the hwmod module
1241 * @oh: struct omap_hwmod *
1242 * @name: name of the reset line to look up and read
1243 *
1244 * Return the state of the reset line.
1245 */
1246static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1247{
cc1226e7 1248 struct omap_hwmod_rst_info ohri;
1249 u8 ret;
5365efbe
BC
1250
1251 if (!oh)
1252 return -EINVAL;
1253
cc1226e7 1254 ret = _lookup_hardreset(oh, name, &ohri);
1255 if (IS_ERR_VALUE(ret))
1256 return ret;
5365efbe
BC
1257
1258 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1259 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1260 ohri.st_shift);
5365efbe
BC
1261 } else if (cpu_is_omap44xx()) {
1262 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
cc1226e7 1263 ohri.rst_shift);
5365efbe
BC
1264 } else {
1265 return -EINVAL;
1266 }
1267}
1268
63c85238 1269/**
bd36179e 1270 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1271 * @oh: struct omap_hwmod *
1272 *
1273 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1274 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1275 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1276 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1277 *
1278 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1279 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1280 * use the SYSCONFIG softreset bit to provide the status.
1281 *
bd36179e
PW
1282 * Note that some IP like McBSP do have reset control but don't have
1283 * reset status.
63c85238 1284 */
bd36179e 1285static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1286{
96835af9 1287 u32 v;
6f8b7ff5 1288 int c = 0;
96835af9 1289 int ret = 0;
63c85238 1290
43b40992 1291 if (!oh->class->sysc ||
2cb06814 1292 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1293 return -EINVAL;
1294
1295 /* clocks must be on for this operation */
1296 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1297 pr_warning("omap_hwmod: %s: reset can only be entered from "
1298 "enabled state\n", oh->name);
63c85238
PW
1299 return -EINVAL;
1300 }
1301
96835af9
BC
1302 /* For some modules, all optionnal clocks need to be enabled as well */
1303 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1304 _enable_optional_clocks(oh);
1305
bd36179e 1306 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1307
1308 v = oh->_sysc_cache;
96835af9
BC
1309 ret = _set_softreset(oh, &v);
1310 if (ret)
1311 goto dis_opt_clks;
63c85238
PW
1312 _write_sysconfig(v, oh);
1313
2cb06814 1314 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1315 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1316 oh->class->sysc->syss_offs)
1317 & SYSS_RESETDONE_MASK),
1318 MAX_MODULE_SOFTRESET_WAIT, c);
1319 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1320 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1321 oh->class->sysc->sysc_offs)
1322 & SYSC_TYPE2_SOFTRESET_MASK),
1323 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1324
5365efbe 1325 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1326 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1327 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1328 else
5365efbe 1329 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1330
1331 /*
1332 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1333 * _wait_target_ready() or _reset()
1334 */
1335
96835af9
BC
1336 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1337
1338dis_opt_clks:
1339 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1340 _disable_optional_clocks(oh);
1341
1342 return ret;
63c85238
PW
1343}
1344
bd36179e
PW
1345/**
1346 * _reset - reset an omap_hwmod
1347 * @oh: struct omap_hwmod *
1348 *
1349 * Resets an omap_hwmod @oh. The default software reset mechanism for
1350 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1351 * bit. However, some hwmods cannot be reset via this method: some
1352 * are not targets and therefore have no OCP header registers to
1353 * access; others (like the IVA) have idiosyncratic reset sequences.
1354 * So for these relatively rare cases, custom reset code can be
1355 * supplied in the struct omap_hwmod_class .reset function pointer.
1356 * Passes along the return value from either _reset() or the custom
1357 * reset function - these must return -EINVAL if the hwmod cannot be
1358 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1359 * the module did not reset in time, or 0 upon success.
1360 */
1361static int _reset(struct omap_hwmod *oh)
1362{
1363 int ret;
1364
1365 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1366
1367 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1368
1369 return ret;
1370}
1371
63c85238 1372/**
dc6d1cda 1373 * _enable - enable an omap_hwmod
63c85238
PW
1374 * @oh: struct omap_hwmod *
1375 *
1376 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1377 * register target. Returns -EINVAL if the hwmod is in the wrong
1378 * state or passes along the return value of _wait_target_ready().
63c85238 1379 */
dc6d1cda 1380static int _enable(struct omap_hwmod *oh)
63c85238
PW
1381{
1382 int r;
1383
34617e2a
BC
1384 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1385
63c85238
PW
1386 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1387 oh->_state != _HWMOD_STATE_IDLE &&
1388 oh->_state != _HWMOD_STATE_DISABLED) {
1389 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1390 "from initialized, idle, or disabled state\n", oh->name);
1391 return -EINVAL;
1392 }
1393
8d9af88f 1394 /* Mux pins for device runtime if populated */
029268e4
TL
1395 if (oh->mux && (!oh->mux->enabled ||
1396 ((oh->_state == _HWMOD_STATE_IDLE) &&
1397 oh->mux->pads_dynamic)))
8d9af88f 1398 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
63c85238
PW
1399
1400 _add_initiator_dep(oh, mpu_oh);
1401 _enable_clocks(oh);
1402
31f62866
BC
1403 /*
1404 * If an IP contains only one HW reset line, then de-assert it in order
1405 * to allow the module state transition. Otherwise the PRCM will return
1406 * Intransition status, and the init will failed.
1407 */
1408 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1409 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1410 _deassert_hardreset(oh, oh->rst_lines[0].name);
63c85238 1411
63c85238 1412 r = _wait_target_ready(oh);
34617e2a 1413 if (r) {
9a23dfe1
BC
1414 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1415 oh->name, r);
34617e2a
BC
1416 _disable_clocks(oh);
1417
1418 return r;
1419 }
1420
1421 oh->_state = _HWMOD_STATE_ENABLED;
1422
1423 /* Access the sysconfig only if the target is ready */
1424 if (oh->class->sysc) {
1425 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1426 _update_sysc_cache(oh);
1427 _enable_sysc(oh);
9a23dfe1
BC
1428 }
1429
63c85238
PW
1430 return r;
1431}
1432
1433/**
dc6d1cda 1434 * _idle - idle an omap_hwmod
63c85238
PW
1435 * @oh: struct omap_hwmod *
1436 *
1437 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1438 * no further work. Returns -EINVAL if the hwmod is in the wrong
1439 * state or returns 0.
63c85238 1440 */
dc6d1cda 1441static int _idle(struct omap_hwmod *oh)
63c85238 1442{
11b10341
BC
1443 int ret;
1444
34617e2a
BC
1445 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1446
63c85238
PW
1447 if (oh->_state != _HWMOD_STATE_ENABLED) {
1448 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1449 "enabled state\n", oh->name);
1450 return -EINVAL;
1451 }
1452
43b40992 1453 if (oh->class->sysc)
74ff3a68 1454 _idle_sysc(oh);
63c85238
PW
1455 _del_initiator_dep(oh, mpu_oh);
1456 _disable_clocks(oh);
11b10341
BC
1457 ret = _wait_target_disable(oh);
1458 if (ret)
1459 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1460 oh->name);
63c85238 1461
8d9af88f 1462 /* Mux pins for device idle if populated */
029268e4 1463 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1464 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1465
63c85238
PW
1466 oh->_state = _HWMOD_STATE_IDLE;
1467
1468 return 0;
1469}
1470
9599217a
KVA
1471/**
1472 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1473 * @oh: struct omap_hwmod *
1474 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1475 *
1476 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1477 * local copy. Intended to be used by drivers that require
1478 * direct manipulation of the AUTOIDLE bits.
1479 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1480 * along the return value from _set_module_autoidle().
1481 *
1482 * Any users of this function should be scrutinized carefully.
1483 */
1484int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1485{
1486 u32 v;
1487 int retval = 0;
1488 unsigned long flags;
1489
1490 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1491 return -EINVAL;
1492
1493 spin_lock_irqsave(&oh->_lock, flags);
1494
1495 v = oh->_sysc_cache;
1496
1497 retval = _set_module_autoidle(oh, autoidle, &v);
1498
1499 if (!retval)
1500 _write_sysconfig(v, oh);
1501
1502 spin_unlock_irqrestore(&oh->_lock, flags);
1503
1504 return retval;
1505}
1506
63c85238
PW
1507/**
1508 * _shutdown - shutdown an omap_hwmod
1509 * @oh: struct omap_hwmod *
1510 *
1511 * Shut down an omap_hwmod @oh. This should be called when the driver
1512 * used for the hwmod is removed or unloaded or if the driver is not
1513 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1514 * state or returns 0.
1515 */
1516static int _shutdown(struct omap_hwmod *oh)
1517{
e4dc8f50
PW
1518 int ret;
1519 u8 prev_state;
1520
63c85238
PW
1521 if (oh->_state != _HWMOD_STATE_IDLE &&
1522 oh->_state != _HWMOD_STATE_ENABLED) {
1523 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1524 "from idle, or enabled state\n", oh->name);
1525 return -EINVAL;
1526 }
1527
1528 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1529
e4dc8f50
PW
1530 if (oh->class->pre_shutdown) {
1531 prev_state = oh->_state;
1532 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1533 _enable(oh);
e4dc8f50
PW
1534 ret = oh->class->pre_shutdown(oh);
1535 if (ret) {
1536 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1537 _idle(oh);
e4dc8f50
PW
1538 return ret;
1539 }
1540 }
1541
6481c73c
MV
1542 if (oh->class->sysc) {
1543 if (oh->_state == _HWMOD_STATE_IDLE)
1544 _enable(oh);
74ff3a68 1545 _shutdown_sysc(oh);
6481c73c 1546 }
5365efbe 1547
3827f949
BC
1548 /* clocks and deps are already disabled in idle */
1549 if (oh->_state == _HWMOD_STATE_ENABLED) {
1550 _del_initiator_dep(oh, mpu_oh);
1551 /* XXX what about the other system initiators here? dma, dsp */
1552 _disable_clocks(oh);
11b10341
BC
1553 ret = _wait_target_disable(oh);
1554 if (ret)
1555 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1556 oh->name);
3827f949 1557 }
63c85238
PW
1558 /* XXX Should this code also force-disable the optional clocks? */
1559
31f62866
BC
1560 /*
1561 * If an IP contains only one HW reset line, then assert it
1562 * after disabling the clocks and before shutting down the IP.
1563 */
1564 if (oh->rst_lines_cnt == 1)
1565 _assert_hardreset(oh, oh->rst_lines[0].name);
1566
8d9af88f
TL
1567 /* Mux pins to safe mode or use populated off mode values */
1568 if (oh->mux)
1569 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1570
1571 oh->_state = _HWMOD_STATE_DISABLED;
1572
1573 return 0;
1574}
1575
63c85238
PW
1576/**
1577 * _setup - do initial configuration of omap_hwmod
1578 * @oh: struct omap_hwmod *
1579 *
1580 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1581 * OCP_SYSCONFIG register. Returns 0.
63c85238 1582 */
97d60162 1583static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1584{
9a23dfe1 1585 int i, r;
2092e5cc 1586 u8 postsetup_state;
97d60162 1587
48d54f3f
PW
1588 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1589 return 0;
1590
63c85238
PW
1591 /* Set iclk autoidle mode */
1592 if (oh->slaves_cnt > 0) {
682fdc96
BC
1593 for (i = 0; i < oh->slaves_cnt; i++) {
1594 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1595 struct clk *c = os->_clk;
1596
4d3ae5a9 1597 if (!c)
63c85238
PW
1598 continue;
1599
1600 if (os->flags & OCPIF_SWSUP_IDLE) {
1601 /* XXX omap_iclk_deny_idle(c); */
1602 } else {
1603 /* XXX omap_iclk_allow_idle(c); */
1604 clk_enable(c);
1605 }
1606 }
1607 }
1608
1609 oh->_state = _HWMOD_STATE_INITIALIZED;
1610
5365efbe
BC
1611 /*
1612 * In the case of hwmod with hardreset that should not be
1613 * de-assert at boot time, we have to keep the module
1614 * initialized, because we cannot enable it properly with the
1615 * reset asserted. Exit without warning because that behavior is
1616 * expected.
1617 */
1618 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1619 return 0;
1620
dc6d1cda 1621 r = _enable(oh);
9a23dfe1
BC
1622 if (r) {
1623 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1624 oh->name, oh->_state);
1625 return 0;
1626 }
63c85238 1627
b835d014 1628 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1629 _reset(oh);
1630
b835d014 1631 /*
76e5589e 1632 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1633 * The _enable() function should be split to
76e5589e 1634 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1635 */
43b40992 1636 if (oh->class->sysc) {
b835d014 1637 _update_sysc_cache(oh);
74ff3a68 1638 _enable_sysc(oh);
b835d014
PW
1639 }
1640 }
63c85238 1641
2092e5cc
PW
1642 postsetup_state = oh->_postsetup_state;
1643 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1644 postsetup_state = _HWMOD_STATE_ENABLED;
1645
1646 /*
1647 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1648 * it should be set by the core code as a runtime flag during startup
1649 */
1650 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1651 (postsetup_state == _HWMOD_STATE_IDLE))
1652 postsetup_state = _HWMOD_STATE_ENABLED;
1653
1654 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1655 _idle(oh);
2092e5cc
PW
1656 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1657 _shutdown(oh);
1658 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1659 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1660 oh->name, postsetup_state);
63c85238
PW
1661
1662 return 0;
1663}
1664
63c85238 1665/**
0102b627 1666 * _register - register a struct omap_hwmod
63c85238
PW
1667 * @oh: struct omap_hwmod *
1668 *
43b40992
PW
1669 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1670 * already has been registered by the same name; -EINVAL if the
1671 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1672 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1673 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1674 * success.
63c85238
PW
1675 *
1676 * XXX The data should be copied into bootmem, so the original data
1677 * should be marked __initdata and freed after init. This would allow
1678 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1679 * that the copy process would be relatively complex due to the large number
1680 * of substructures.
1681 */
01592df9 1682static int __init _register(struct omap_hwmod *oh)
63c85238 1683{
569edd70 1684 int ms_id;
63c85238 1685
43b40992
PW
1686 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1687 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1688 return -EINVAL;
1689
63c85238
PW
1690 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1691
ce35b244
BC
1692 if (_lookup(oh->name))
1693 return -EEXIST;
63c85238
PW
1694
1695 ms_id = _find_mpu_port_index(oh);
e7c7d760 1696 if (!IS_ERR_VALUE(ms_id))
63c85238 1697 oh->_mpu_port_index = ms_id;
e7c7d760 1698 else
63c85238 1699 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1700
1701 list_add_tail(&oh->node, &omap_hwmod_list);
1702
dc6d1cda 1703 spin_lock_init(&oh->_lock);
2092e5cc 1704
63c85238
PW
1705 oh->_state = _HWMOD_STATE_REGISTERED;
1706
569edd70
PW
1707 /*
1708 * XXX Rather than doing a strcmp(), this should test a flag
1709 * set in the hwmod data, inserted by the autogenerator code.
1710 */
1711 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1712 mpu_oh = oh;
63c85238 1713
569edd70 1714 return 0;
63c85238
PW
1715}
1716
0102b627
BC
1717
1718/* Public functions */
1719
1720u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1721{
1722 if (oh->flags & HWMOD_16BIT_REG)
1723 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1724 else
1725 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1726}
1727
1728void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1729{
1730 if (oh->flags & HWMOD_16BIT_REG)
1731 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1732 else
1733 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1734}
1735
6d3c55fd
A
1736/**
1737 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1738 * @oh: struct omap_hwmod *
1739 *
1740 * This is a public function exposed to drivers. Some drivers may need to do
1741 * some settings before and after resetting the device. Those drivers after
1742 * doing the necessary settings could use this function to start a reset by
1743 * setting the SYSCONFIG.SOFTRESET bit.
1744 */
1745int omap_hwmod_softreset(struct omap_hwmod *oh)
1746{
1747 u32 v;
1748 int ret;
1749
1750 if (!oh || !(oh->_sysc_cache))
1751 return -EINVAL;
1752
1753 v = oh->_sysc_cache;
1754 ret = _set_softreset(oh, &v);
1755 if (ret)
1756 goto error;
1757 _write_sysconfig(v, oh);
1758
1759error:
1760 return ret;
1761}
1762
0102b627
BC
1763/**
1764 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1765 * @oh: struct omap_hwmod *
1766 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1767 *
1768 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1769 * local copy. Intended to be used by drivers that have some erratum
1770 * that requires direct manipulation of the SIDLEMODE bits. Returns
1771 * -EINVAL if @oh is null, or passes along the return value from
1772 * _set_slave_idlemode().
1773 *
1774 * XXX Does this function have any current users? If not, we should
1775 * remove it; it is better to let the rest of the hwmod code handle this.
1776 * Any users of this function should be scrutinized carefully.
1777 */
1778int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1779{
1780 u32 v;
1781 int retval = 0;
1782
1783 if (!oh)
1784 return -EINVAL;
1785
1786 v = oh->_sysc_cache;
1787
1788 retval = _set_slave_idlemode(oh, idlemode, &v);
1789 if (!retval)
1790 _write_sysconfig(v, oh);
1791
1792 return retval;
1793}
1794
63c85238
PW
1795/**
1796 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1797 * @name: name of the omap_hwmod to look up
1798 *
1799 * Given a @name of an omap_hwmod, return a pointer to the registered
1800 * struct omap_hwmod *, or NULL upon error.
1801 */
1802struct omap_hwmod *omap_hwmod_lookup(const char *name)
1803{
1804 struct omap_hwmod *oh;
1805
1806 if (!name)
1807 return NULL;
1808
63c85238 1809 oh = _lookup(name);
63c85238
PW
1810
1811 return oh;
1812}
1813
1814/**
1815 * omap_hwmod_for_each - call function for each registered omap_hwmod
1816 * @fn: pointer to a callback function
97d60162 1817 * @data: void * data to pass to callback function
63c85238
PW
1818 *
1819 * Call @fn for each registered omap_hwmod, passing @data to each
1820 * function. @fn must return 0 for success or any other value for
1821 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1822 * will stop and the non-zero return value will be passed to the
1823 * caller of omap_hwmod_for_each(). @fn is called with
1824 * omap_hwmod_for_each() held.
1825 */
97d60162
PW
1826int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1827 void *data)
63c85238
PW
1828{
1829 struct omap_hwmod *temp_oh;
30ebad9d 1830 int ret = 0;
63c85238
PW
1831
1832 if (!fn)
1833 return -EINVAL;
1834
63c85238 1835 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1836 ret = (*fn)(temp_oh, data);
63c85238
PW
1837 if (ret)
1838 break;
1839 }
63c85238
PW
1840
1841 return ret;
1842}
1843
63c85238 1844/**
550c8092 1845 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1846 * @ohs: pointer to an array of omap_hwmods to register
1847 *
1848 * Intended to be called early in boot before the clock framework is
1849 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1850 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 1851 */
550c8092 1852int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 1853{
bac1a0f0 1854 int r, i;
63c85238
PW
1855
1856 if (!ohs)
1857 return 0;
1858
bac1a0f0
PW
1859 i = 0;
1860 do {
1861 if (!omap_chip_is(ohs[i]->omap_chip))
1862 continue;
1863
1864 r = _register(ohs[i]);
1865 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1866 r);
1867 } while (ohs[++i]);
63c85238
PW
1868
1869 return 0;
1870}
1871
e7c7d760
TL
1872/*
1873 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1874 *
a2debdbd 1875 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 1876 * Assumes the caller takes care of locking if needed.
63c85238 1877 */
e7c7d760
TL
1878static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1879{
48d54f3f
PW
1880 if (oh->_state != _HWMOD_STATE_REGISTERED)
1881 return 0;
1882
e7c7d760
TL
1883 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1884 return 0;
1885
1886 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
e7c7d760
TL
1887
1888 return 0;
1889}
1890
63c85238 1891/**
a2debdbd
PW
1892 * omap_hwmod_setup_one - set up a single hwmod
1893 * @oh_name: const char * name of the already-registered hwmod to set up
1894 *
1895 * Must be called after omap2_clk_init(). Resolves the struct clk
1896 * names to struct clk pointers for each registered omap_hwmod. Also
1897 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1898 * success.
1899 */
1900int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
1901{
1902 struct omap_hwmod *oh;
1903 int r;
1904
a2debdbd
PW
1905 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1906
1907 if (!mpu_oh) {
1908 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1909 oh_name, MPU_INITIATOR_NAME);
63c85238 1910 return -EINVAL;
a2debdbd 1911 }
63c85238 1912
a2debdbd
PW
1913 oh = _lookup(oh_name);
1914 if (!oh) {
1915 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1916 return -EINVAL;
1917 }
63c85238 1918
a2debdbd
PW
1919 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1920 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 1921
a2debdbd
PW
1922 r = _populate_mpu_rt_base(oh, NULL);
1923 if (IS_ERR_VALUE(r)) {
1924 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1925 return -EINVAL;
1926 }
1927
1928 r = _init_clocks(oh, NULL);
1929 if (IS_ERR_VALUE(r)) {
1930 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1931 return -EINVAL;
63c85238
PW
1932 }
1933
a2debdbd
PW
1934 _setup(oh, NULL);
1935
63c85238
PW
1936 return 0;
1937}
1938
1939/**
550c8092 1940 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
1941 *
1942 * Must be called after omap2_clk_init(). Resolves the struct clk names
1943 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 1944 * _setup() on each hwmod. Returns 0 upon success.
63c85238 1945 */
550c8092 1946static int __init omap_hwmod_setup_all(void)
63c85238
PW
1947{
1948 int r;
1949
569edd70
PW
1950 if (!mpu_oh) {
1951 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1952 __func__, MPU_INITIATOR_NAME);
1953 return -EINVAL;
1954 }
1955
e7c7d760 1956 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 1957
97d60162 1958 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
1959 WARN(IS_ERR_VALUE(r),
1960 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 1961
2092e5cc 1962 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1963
1964 return 0;
1965}
550c8092 1966core_initcall(omap_hwmod_setup_all);
63c85238 1967
63c85238
PW
1968/**
1969 * omap_hwmod_enable - enable an omap_hwmod
1970 * @oh: struct omap_hwmod *
1971 *
74ff3a68 1972 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1973 * Returns -EINVAL on error or passes along the return value from _enable().
1974 */
1975int omap_hwmod_enable(struct omap_hwmod *oh)
1976{
1977 int r;
dc6d1cda 1978 unsigned long flags;
63c85238
PW
1979
1980 if (!oh)
1981 return -EINVAL;
1982
dc6d1cda
PW
1983 spin_lock_irqsave(&oh->_lock, flags);
1984 r = _enable(oh);
1985 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1986
1987 return r;
1988}
1989
1990/**
1991 * omap_hwmod_idle - idle an omap_hwmod
1992 * @oh: struct omap_hwmod *
1993 *
74ff3a68 1994 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1995 * Returns -EINVAL on error or passes along the return value from _idle().
1996 */
1997int omap_hwmod_idle(struct omap_hwmod *oh)
1998{
dc6d1cda
PW
1999 unsigned long flags;
2000
63c85238
PW
2001 if (!oh)
2002 return -EINVAL;
2003
dc6d1cda
PW
2004 spin_lock_irqsave(&oh->_lock, flags);
2005 _idle(oh);
2006 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2007
2008 return 0;
2009}
2010
2011/**
2012 * omap_hwmod_shutdown - shutdown an omap_hwmod
2013 * @oh: struct omap_hwmod *
2014 *
74ff3a68 2015 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2016 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2017 * the return value from _shutdown().
2018 */
2019int omap_hwmod_shutdown(struct omap_hwmod *oh)
2020{
dc6d1cda
PW
2021 unsigned long flags;
2022
63c85238
PW
2023 if (!oh)
2024 return -EINVAL;
2025
dc6d1cda 2026 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2027 _shutdown(oh);
dc6d1cda 2028 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2029
2030 return 0;
2031}
2032
2033/**
2034 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2035 * @oh: struct omap_hwmod *oh
2036 *
2037 * Intended to be called by the omap_device code.
2038 */
2039int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2040{
dc6d1cda
PW
2041 unsigned long flags;
2042
2043 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2044 _enable_clocks(oh);
dc6d1cda 2045 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2046
2047 return 0;
2048}
2049
2050/**
2051 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2052 * @oh: struct omap_hwmod *oh
2053 *
2054 * Intended to be called by the omap_device code.
2055 */
2056int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2057{
dc6d1cda
PW
2058 unsigned long flags;
2059
2060 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2061 _disable_clocks(oh);
dc6d1cda 2062 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2063
2064 return 0;
2065}
2066
2067/**
2068 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2069 * @oh: struct omap_hwmod *oh
2070 *
2071 * Intended to be called by drivers and core code when all posted
2072 * writes to a device must complete before continuing further
2073 * execution (for example, after clearing some device IRQSTATUS
2074 * register bits)
2075 *
2076 * XXX what about targets with multiple OCP threads?
2077 */
2078void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2079{
2080 BUG_ON(!oh);
2081
43b40992 2082 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
2083 WARN(1, "omap_device: %s: OCP barrier impossible due to "
2084 "device configuration\n", oh->name);
2085 return;
2086 }
2087
2088 /*
2089 * Forces posted writes to complete on the OCP thread handling
2090 * register writes
2091 */
cc7a1d2a 2092 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2093}
2094
2095/**
2096 * omap_hwmod_reset - reset the hwmod
2097 * @oh: struct omap_hwmod *
2098 *
2099 * Under some conditions, a driver may wish to reset the entire device.
2100 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2101 * the return value from _reset().
63c85238
PW
2102 */
2103int omap_hwmod_reset(struct omap_hwmod *oh)
2104{
2105 int r;
dc6d1cda 2106 unsigned long flags;
63c85238 2107
9b579114 2108 if (!oh)
63c85238
PW
2109 return -EINVAL;
2110
dc6d1cda 2111 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2112 r = _reset(oh);
dc6d1cda 2113 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2114
2115 return r;
2116}
2117
2118/**
2119 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2120 * @oh: struct omap_hwmod *
2121 * @res: pointer to the first element of an array of struct resource to fill
2122 *
2123 * Count the number of struct resource array elements necessary to
2124 * contain omap_hwmod @oh resources. Intended to be called by code
2125 * that registers omap_devices. Intended to be used to determine the
2126 * size of a dynamically-allocated struct resource array, before
2127 * calling omap_hwmod_fill_resources(). Returns the number of struct
2128 * resource array elements needed.
2129 *
2130 * XXX This code is not optimized. It could attempt to merge adjacent
2131 * resource IDs.
2132 *
2133 */
2134int omap_hwmod_count_resources(struct omap_hwmod *oh)
2135{
2136 int ret, i;
2137
bc614958 2138 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238
PW
2139
2140 for (i = 0; i < oh->slaves_cnt; i++)
78183f3f 2141 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
63c85238
PW
2142
2143 return ret;
2144}
2145
2146/**
2147 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2148 * @oh: struct omap_hwmod *
2149 * @res: pointer to the first element of an array of struct resource to fill
2150 *
2151 * Fill the struct resource array @res with resource data from the
2152 * omap_hwmod @oh. Intended to be called by code that registers
2153 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2154 * number of array elements filled.
2155 */
2156int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2157{
bc614958 2158 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
63c85238
PW
2159 int r = 0;
2160
2161 /* For each IRQ, DMA, memory area, fill in array.*/
2162
212738a4
PW
2163 mpu_irqs_cnt = _count_mpu_irqs(oh);
2164 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2165 (res + r)->name = (oh->mpu_irqs + i)->name;
2166 (res + r)->start = (oh->mpu_irqs + i)->irq;
2167 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2168 (res + r)->flags = IORESOURCE_IRQ;
2169 r++;
2170 }
2171
bc614958
PW
2172 sdma_reqs_cnt = _count_sdma_reqs(oh);
2173 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2174 (res + r)->name = (oh->sdma_reqs + i)->name;
2175 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2176 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2177 (res + r)->flags = IORESOURCE_DMA;
2178 r++;
2179 }
2180
2181 for (i = 0; i < oh->slaves_cnt; i++) {
2182 struct omap_hwmod_ocp_if *os;
78183f3f 2183 int addr_cnt;
63c85238 2184
682fdc96 2185 os = oh->slaves[i];
78183f3f 2186 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2187
78183f3f 2188 for (j = 0; j < addr_cnt; j++) {
cd503802 2189 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2190 (res + r)->start = (os->addr + j)->pa_start;
2191 (res + r)->end = (os->addr + j)->pa_end;
2192 (res + r)->flags = IORESOURCE_MEM;
2193 r++;
2194 }
2195 }
2196
2197 return r;
2198}
2199
2200/**
2201 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2202 * @oh: struct omap_hwmod *
2203 *
2204 * Return the powerdomain pointer associated with the OMAP module
2205 * @oh's main clock. If @oh does not have a main clk, return the
2206 * powerdomain associated with the interface clock associated with the
2207 * module's MPU port. (XXX Perhaps this should use the SDMA port
2208 * instead?) Returns NULL on error, or a struct powerdomain * on
2209 * success.
2210 */
2211struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2212{
2213 struct clk *c;
2214
2215 if (!oh)
2216 return NULL;
2217
2218 if (oh->_clk) {
2219 c = oh->_clk;
2220 } else {
2221 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2222 return NULL;
2223 c = oh->slaves[oh->_mpu_port_index]->_clk;
2224 }
2225
d5647c18
TG
2226 if (!c->clkdm)
2227 return NULL;
2228
63c85238
PW
2229 return c->clkdm->pwrdm.ptr;
2230
2231}
2232
db2a60bf
PW
2233/**
2234 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2235 * @oh: struct omap_hwmod *
2236 *
2237 * Returns the virtual address corresponding to the beginning of the
2238 * module's register target, in the address range that is intended to
2239 * be used by the MPU. Returns the virtual address upon success or NULL
2240 * upon error.
2241 */
2242void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2243{
2244 if (!oh)
2245 return NULL;
2246
2247 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2248 return NULL;
2249
2250 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2251 return NULL;
2252
2253 return oh->_mpu_rt_va;
2254}
2255
63c85238
PW
2256/**
2257 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2258 * @oh: struct omap_hwmod *
2259 * @init_oh: struct omap_hwmod * (initiator)
2260 *
2261 * Add a sleep dependency between the initiator @init_oh and @oh.
2262 * Intended to be called by DSP/Bridge code via platform_data for the
2263 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2264 * code needs to add/del initiator dependencies dynamically
2265 * before/after accessing a device. Returns the return value from
2266 * _add_initiator_dep().
2267 *
2268 * XXX Keep a usecount in the clockdomain code
2269 */
2270int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2271 struct omap_hwmod *init_oh)
2272{
2273 return _add_initiator_dep(oh, init_oh);
2274}
2275
2276/*
2277 * XXX what about functions for drivers to save/restore ocp_sysconfig
2278 * for context save/restore operations?
2279 */
2280
2281/**
2282 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2283 * @oh: struct omap_hwmod *
2284 * @init_oh: struct omap_hwmod * (initiator)
2285 *
2286 * Remove a sleep dependency between the initiator @init_oh and @oh.
2287 * Intended to be called by DSP/Bridge code via platform_data for the
2288 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2289 * code needs to add/del initiator dependencies dynamically
2290 * before/after accessing a device. Returns the return value from
2291 * _del_initiator_dep().
2292 *
2293 * XXX Keep a usecount in the clockdomain code
2294 */
2295int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2296 struct omap_hwmod *init_oh)
2297{
2298 return _del_initiator_dep(oh, init_oh);
2299}
2300
63c85238
PW
2301/**
2302 * omap_hwmod_enable_wakeup - allow device to wake up the system
2303 * @oh: struct omap_hwmod *
2304 *
2305 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2306 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2307 * registers to cause the PRCM to receive wakeup events from the
2308 * module. Does not set any wakeup routing registers beyond this
2309 * point - if the module is to wake up any other module or subsystem,
2310 * that must be set separately. Called by omap_device code. Returns
2311 * -EINVAL on error or 0 upon success.
2312 */
2313int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2314{
dc6d1cda 2315 unsigned long flags;
5a7ddcbd 2316 u32 v;
dc6d1cda 2317
43b40992
PW
2318 if (!oh->class->sysc ||
2319 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2320 return -EINVAL;
2321
dc6d1cda 2322 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2323 v = oh->_sysc_cache;
2324 _enable_wakeup(oh, &v);
2325 _write_sysconfig(v, oh);
dc6d1cda 2326 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2327
2328 return 0;
2329}
2330
2331/**
2332 * omap_hwmod_disable_wakeup - prevent device from waking the system
2333 * @oh: struct omap_hwmod *
2334 *
2335 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2336 * from sending wakeups to the PRCM. Eventually this should clear
2337 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2338 * from the module. Does not set any wakeup routing registers beyond
2339 * this point - if the module is to wake up any other module or
2340 * subsystem, that must be set separately. Called by omap_device
2341 * code. Returns -EINVAL on error or 0 upon success.
2342 */
2343int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2344{
dc6d1cda 2345 unsigned long flags;
5a7ddcbd 2346 u32 v;
dc6d1cda 2347
43b40992
PW
2348 if (!oh->class->sysc ||
2349 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2350 return -EINVAL;
2351
dc6d1cda 2352 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2353 v = oh->_sysc_cache;
2354 _disable_wakeup(oh, &v);
2355 _write_sysconfig(v, oh);
dc6d1cda 2356 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2357
2358 return 0;
2359}
43b40992 2360
aee48e3c
PW
2361/**
2362 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2363 * contained in the hwmod module.
2364 * @oh: struct omap_hwmod *
2365 * @name: name of the reset line to lookup and assert
2366 *
2367 * Some IP like dsp, ipu or iva contain processor that require
2368 * an HW reset line to be assert / deassert in order to enable fully
2369 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2370 * yet supported on this OMAP; otherwise, passes along the return value
2371 * from _assert_hardreset().
2372 */
2373int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2374{
2375 int ret;
dc6d1cda 2376 unsigned long flags;
aee48e3c
PW
2377
2378 if (!oh)
2379 return -EINVAL;
2380
dc6d1cda 2381 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2382 ret = _assert_hardreset(oh, name);
dc6d1cda 2383 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2384
2385 return ret;
2386}
2387
2388/**
2389 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2390 * contained in the hwmod module.
2391 * @oh: struct omap_hwmod *
2392 * @name: name of the reset line to look up and deassert
2393 *
2394 * Some IP like dsp, ipu or iva contain processor that require
2395 * an HW reset line to be assert / deassert in order to enable fully
2396 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2397 * yet supported on this OMAP; otherwise, passes along the return value
2398 * from _deassert_hardreset().
2399 */
2400int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2401{
2402 int ret;
dc6d1cda 2403 unsigned long flags;
aee48e3c
PW
2404
2405 if (!oh)
2406 return -EINVAL;
2407
dc6d1cda 2408 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2409 ret = _deassert_hardreset(oh, name);
dc6d1cda 2410 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2411
2412 return ret;
2413}
2414
2415/**
2416 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2417 * contained in the hwmod module
2418 * @oh: struct omap_hwmod *
2419 * @name: name of the reset line to look up and read
2420 *
2421 * Return the current state of the hwmod @oh's reset line named @name:
2422 * returns -EINVAL upon parameter error or if this operation
2423 * is unsupported on the current OMAP; otherwise, passes along the return
2424 * value from _read_hardreset().
2425 */
2426int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2427{
2428 int ret;
dc6d1cda 2429 unsigned long flags;
aee48e3c
PW
2430
2431 if (!oh)
2432 return -EINVAL;
2433
dc6d1cda 2434 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2435 ret = _read_hardreset(oh, name);
dc6d1cda 2436 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2437
2438 return ret;
2439}
2440
2441
43b40992
PW
2442/**
2443 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2444 * @classname: struct omap_hwmod_class name to search for
2445 * @fn: callback function pointer to call for each hwmod in class @classname
2446 * @user: arbitrary context data to pass to the callback function
2447 *
ce35b244
BC
2448 * For each omap_hwmod of class @classname, call @fn.
2449 * If the callback function returns something other than
43b40992
PW
2450 * zero, the iterator is terminated, and the callback function's return
2451 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2452 * if @classname or @fn are NULL, or passes back the error code from @fn.
2453 */
2454int omap_hwmod_for_each_by_class(const char *classname,
2455 int (*fn)(struct omap_hwmod *oh,
2456 void *user),
2457 void *user)
2458{
2459 struct omap_hwmod *temp_oh;
2460 int ret = 0;
2461
2462 if (!classname || !fn)
2463 return -EINVAL;
2464
2465 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2466 __func__, classname);
2467
43b40992
PW
2468 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2469 if (!strcmp(temp_oh->class->name, classname)) {
2470 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2471 __func__, temp_oh->name);
2472 ret = (*fn)(temp_oh, user);
2473 if (ret)
2474 break;
2475 }
2476 }
2477
43b40992
PW
2478 if (ret)
2479 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2480 __func__, ret);
2481
2482 return ret;
2483}
2484
2092e5cc
PW
2485/**
2486 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2487 * @oh: struct omap_hwmod *
2488 * @state: state that _setup() should leave the hwmod in
2489 *
550c8092 2490 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2491 * (called by omap_hwmod_setup_*()). Only valid to call between
2492 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2493 * 0 upon success or -EINVAL if there is a problem with the arguments
2494 * or if the hwmod is in the wrong state.
2092e5cc
PW
2495 */
2496int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2497{
2498 int ret;
dc6d1cda 2499 unsigned long flags;
2092e5cc
PW
2500
2501 if (!oh)
2502 return -EINVAL;
2503
2504 if (state != _HWMOD_STATE_DISABLED &&
2505 state != _HWMOD_STATE_ENABLED &&
2506 state != _HWMOD_STATE_IDLE)
2507 return -EINVAL;
2508
dc6d1cda 2509 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2510
2511 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2512 ret = -EINVAL;
2513 goto ohsps_unlock;
2514 }
2515
2516 oh->_postsetup_state = state;
2517 ret = 0;
2518
2519ohsps_unlock:
dc6d1cda 2520 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2521
2522 return ret;
2523}
c80705aa
KH
2524
2525/**
2526 * omap_hwmod_get_context_loss_count - get lost context count
2527 * @oh: struct omap_hwmod *
2528 *
2529 * Query the powerdomain of of @oh to get the context loss
2530 * count for this device.
2531 *
2532 * Returns the context loss count of the powerdomain assocated with @oh
2533 * upon success, or zero if no powerdomain exists for @oh.
2534 */
2535u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2536{
2537 struct powerdomain *pwrdm;
2538 int ret = 0;
2539
2540 pwrdm = omap_hwmod_get_pwrdm(oh);
2541 if (pwrdm)
2542 ret = pwrdm_get_context_loss_count(pwrdm);
2543
2544 return ret;
2545}
43b01643
PW
2546
2547/**
2548 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2549 * @oh: struct omap_hwmod *
2550 *
2551 * Prevent the hwmod @oh from being reset during the setup process.
2552 * Intended for use by board-*.c files on boards with devices that
2553 * cannot tolerate being reset. Must be called before the hwmod has
2554 * been set up. Returns 0 upon success or negative error code upon
2555 * failure.
2556 */
2557int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2558{
2559 if (!oh)
2560 return -EINVAL;
2561
2562 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2563 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2564 oh->name);
2565 return -EINVAL;
2566 }
2567
2568 oh->flags |= HWMOD_INIT_NO_RESET;
2569
2570 return 0;
2571}