ARM: OMAP2+: hwmod data: convert to link registration
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
4e65331c 142#include "common.h"
ce491cf8 143#include <plat/cpu.h>
1540f214 144#include "clockdomain.h"
72e06d08 145#include "powerdomain.h"
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146#include <plat/clock.h>
147#include <plat/omap_hwmod.h>
5365efbe 148#include <plat/prcm.h>
63c85238 149
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
59fb659b 152#include "prm2xxx_3xxx.h"
d198b514 153#include "prm44xx.h"
eaac329d 154#include "prminst44xx.h"
8d9af88f 155#include "mux.h"
63c85238 156
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157/* Maximum microseconds to wait for OMAP module to softreset */
158#define MAX_MODULE_SOFTRESET_WAIT 10000
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159
160/* Name of the OMAP hwmod for the MPU */
5c2c0296 161#define MPU_INITIATOR_NAME "mpu"
63c85238 162
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163/*
164 * Number of struct omap_hwmod_link records per struct
165 * omap_hwmod_ocp_if record (master->slave and slave->master)
166 */
167#define LINKS_PER_OCP_IF 2
168
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169/* omap_hwmod_list contains all registered struct omap_hwmods */
170static LIST_HEAD(omap_hwmod_list);
171
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172/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
173static struct omap_hwmod *mpu_oh;
174
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175/*
176 * link_registration: set to true if hwmod interfaces are being registered
177 * directly; set to false if hwmods are being registered directly
178 */
179static bool link_registration;
180
181/*
182 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
183 * allocated from - used to reduce the number of small memory
184 * allocations, which has a significant impact on performance
185 */
186static struct omap_hwmod_link *linkspace;
187
188/*
189 * free_ls, max_ls: array indexes into linkspace; representing the
190 * next free struct omap_hwmod_link index, and the maximum number of
191 * struct omap_hwmod_link records allocated (respectively)
192 */
193static unsigned short free_ls, max_ls, ls_supp;
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194
195/* Private functions */
196
5d95dde7 197/**
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198 * _fetch_next_ocp_if - return next OCP interface in an array or list
199 * @p: ptr to a ptr to the list_head inside the ocp_if to return
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200 * @old: ptr to an array of struct omap_hwmod_ocp_if records
201 * @i: pointer to the index into the @old array
202 *
203 * Return a pointer to the next struct omap_hwmod_ocp_if record in a
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204 * sequence. If hwmods are being registered directly, then return a
205 * struct omap_hwmod_ocp_if record corresponding to the element index
206 * pointed to by @i in the
207 * @old array. Otherwise, return a pointer to the struct
208 * omap_hwmod_ocp_if record containing the struct list_head record pointed
209 * to by @p, and set the pointer pointed to by @p to point to the next
210 * struct list_head record in the list.
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211 */
212static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
213 struct omap_hwmod_ocp_if **old,
214 int *i)
215{
216 struct omap_hwmod_ocp_if *oi;
217
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218 if (!link_registration) {
219 oi = old[*i];
220 } else {
221 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
222 *p = (*p)->next;
223 }
224
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225 *i = *i + 1;
226
227 return oi;
228}
229
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230/**
231 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
232 * @oh: struct omap_hwmod *
233 *
234 * Load the current value of the hwmod OCP_SYSCONFIG register into the
235 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
236 * OCP_SYSCONFIG register or 0 upon success.
237 */
238static int _update_sysc_cache(struct omap_hwmod *oh)
239{
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240 if (!oh->class->sysc) {
241 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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242 return -EINVAL;
243 }
244
245 /* XXX ensure module interface clock is up */
246
cc7a1d2a 247 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 248
43b40992 249 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 250 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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251
252 return 0;
253}
254
255/**
256 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
257 * @v: OCP_SYSCONFIG value to write
258 * @oh: struct omap_hwmod *
259 *
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260 * Write @v into the module class' OCP_SYSCONFIG register, if it has
261 * one. No return value.
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262 */
263static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
264{
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265 if (!oh->class->sysc) {
266 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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267 return;
268 }
269
270 /* XXX ensure module interface clock is up */
271
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272 /* Module might have lost context, always update cache and register */
273 oh->_sysc_cache = v;
274 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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275}
276
277/**
278 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
279 * @oh: struct omap_hwmod *
280 * @standbymode: MIDLEMODE field bits
281 * @v: pointer to register contents to modify
282 *
283 * Update the master standby mode bits in @v to be @standbymode for
284 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
285 * upon error or 0 upon success.
286 */
287static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
288 u32 *v)
289{
358f0e63
TG
290 u32 mstandby_mask;
291 u8 mstandby_shift;
292
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293 if (!oh->class->sysc ||
294 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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295 return -EINVAL;
296
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297 if (!oh->class->sysc->sysc_fields) {
298 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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299 return -EINVAL;
300 }
301
43b40992 302 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
358f0e63
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303 mstandby_mask = (0x3 << mstandby_shift);
304
305 *v &= ~mstandby_mask;
306 *v |= __ffs(standbymode) << mstandby_shift;
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307
308 return 0;
309}
310
311/**
312 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
313 * @oh: struct omap_hwmod *
314 * @idlemode: SIDLEMODE field bits
315 * @v: pointer to register contents to modify
316 *
317 * Update the slave idle mode bits in @v to be @idlemode for the @oh
318 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
319 * or 0 upon success.
320 */
321static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
322{
358f0e63
TG
323 u32 sidle_mask;
324 u8 sidle_shift;
325
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326 if (!oh->class->sysc ||
327 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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328 return -EINVAL;
329
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330 if (!oh->class->sysc->sysc_fields) {
331 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
332 return -EINVAL;
333 }
334
43b40992 335 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
TG
336 sidle_mask = (0x3 << sidle_shift);
337
338 *v &= ~sidle_mask;
339 *v |= __ffs(idlemode) << sidle_shift;
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340
341 return 0;
342}
343
344/**
345 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
346 * @oh: struct omap_hwmod *
347 * @clockact: CLOCKACTIVITY field bits
348 * @v: pointer to register contents to modify
349 *
350 * Update the clockactivity mode bits in @v to be @clockact for the
351 * @oh hwmod. Used for additional powersaving on some modules. Does
352 * not write to the hardware. Returns -EINVAL upon error or 0 upon
353 * success.
354 */
355static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
356{
358f0e63
TG
357 u32 clkact_mask;
358 u8 clkact_shift;
359
43b40992
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360 if (!oh->class->sysc ||
361 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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362 return -EINVAL;
363
43b40992
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364 if (!oh->class->sysc->sysc_fields) {
365 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
366 return -EINVAL;
367 }
368
43b40992 369 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
TG
370 clkact_mask = (0x3 << clkact_shift);
371
372 *v &= ~clkact_mask;
373 *v |= clockact << clkact_shift;
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374
375 return 0;
376}
377
378/**
379 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
380 * @oh: struct omap_hwmod *
381 * @v: pointer to register contents to modify
382 *
383 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
384 * error or 0 upon success.
385 */
386static int _set_softreset(struct omap_hwmod *oh, u32 *v)
387{
358f0e63
TG
388 u32 softrst_mask;
389
43b40992
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390 if (!oh->class->sysc ||
391 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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392 return -EINVAL;
393
43b40992
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394 if (!oh->class->sysc->sysc_fields) {
395 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
396 return -EINVAL;
397 }
398
43b40992 399 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
400
401 *v |= softrst_mask;
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402
403 return 0;
404}
405
726072e5
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406/**
407 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
408 * @oh: struct omap_hwmod *
409 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
410 * @v: pointer to register contents to modify
411 *
412 * Update the module autoidle bit in @v to be @autoidle for the @oh
413 * hwmod. The autoidle bit controls whether the module can gate
414 * internal clocks automatically when it isn't doing anything; the
415 * exact function of this bit varies on a per-module basis. This
416 * function does not write to the hardware. Returns -EINVAL upon
417 * error or 0 upon success.
418 */
419static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
420 u32 *v)
421{
358f0e63
TG
422 u32 autoidle_mask;
423 u8 autoidle_shift;
424
43b40992
PW
425 if (!oh->class->sysc ||
426 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
PW
427 return -EINVAL;
428
43b40992
PW
429 if (!oh->class->sysc->sysc_fields) {
430 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
431 return -EINVAL;
432 }
433
43b40992 434 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 435 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
436
437 *v &= ~autoidle_mask;
438 *v |= autoidle << autoidle_shift;
726072e5
PW
439
440 return 0;
441}
442
eceec009
G
443/**
444 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
445 * @oh: struct omap_hwmod *
446 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
447 *
448 * Set or clear the I/O pad wakeup flag in the mux entries for the
449 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
450 * in memory. If the hwmod is currently idled, and the new idle
451 * values don't match the previous ones, this function will also
452 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
453 * currently idled, this function won't touch the hardware: the new
454 * mux settings are written to the SCM PADCTRL registers when the
455 * hwmod is idled. No return value.
456 */
457static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
458{
459 struct omap_device_pad *pad;
460 bool change = false;
461 u16 prev_idle;
462 int j;
463
464 if (!oh->mux || !oh->mux->enabled)
465 return;
466
467 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
468 pad = oh->mux->pads_dynamic[j];
469
470 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
471 continue;
472
473 prev_idle = pad->idle;
474
475 if (set_wake)
476 pad->idle |= OMAP_WAKEUP_EN;
477 else
478 pad->idle &= ~OMAP_WAKEUP_EN;
479
480 if (prev_idle != pad->idle)
481 change = true;
482 }
483
484 if (change && oh->_state == _HWMOD_STATE_IDLE)
485 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
486}
487
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488/**
489 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
490 * @oh: struct omap_hwmod *
491 *
492 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
493 * upon error or 0 upon success.
494 */
5a7ddcbd 495static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 496{
43b40992 497 if (!oh->class->sysc ||
86009eb3 498 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
499 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
500 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
501 return -EINVAL;
502
43b40992
PW
503 if (!oh->class->sysc->sysc_fields) {
504 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
505 return -EINVAL;
506 }
507
1fe74113
BC
508 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
509 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 510
86009eb3
BC
511 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
512 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
513 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
514 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 515
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PW
516 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
517
518 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
519
520 return 0;
521}
522
523/**
524 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
525 * @oh: struct omap_hwmod *
526 *
527 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
528 * upon error or 0 upon success.
529 */
5a7ddcbd 530static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 531{
43b40992 532 if (!oh->class->sysc ||
86009eb3 533 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
534 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
535 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
536 return -EINVAL;
537
43b40992
PW
538 if (!oh->class->sysc->sysc_fields) {
539 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
540 return -EINVAL;
541 }
542
1fe74113
BC
543 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
544 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 545
86009eb3
BC
546 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
547 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
548 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
549 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 550
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PW
551 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
552
553 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
554
555 return 0;
556}
557
558/**
559 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
560 * @oh: struct omap_hwmod *
561 *
562 * Prevent the hardware module @oh from entering idle while the
563 * hardare module initiator @init_oh is active. Useful when a module
564 * will be accessed by a particular initiator (e.g., if a module will
565 * be accessed by the IVA, there should be a sleepdep between the IVA
566 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
567 * mode. If the clockdomain is marked as not needing autodeps, return
568 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
569 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
570 */
571static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
572{
573 if (!oh->_clk)
574 return -EINVAL;
575
570b54c7
PW
576 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
577 return 0;
578
55ed9694 579 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
580}
581
582/**
583 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
584 * @oh: struct omap_hwmod *
585 *
586 * Allow the hardware module @oh to enter idle while the hardare
587 * module initiator @init_oh is active. Useful when a module will not
588 * be accessed by a particular initiator (e.g., if a module will not
589 * be accessed by the IVA, there should be no sleepdep between the IVA
590 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
591 * mode. If the clockdomain is marked as not needing autodeps, return
592 * 0 without doing anything. Returns -EINVAL upon error or passes
593 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
594 */
595static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
596{
597 if (!oh->_clk)
598 return -EINVAL;
599
570b54c7
PW
600 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
601 return 0;
602
55ed9694 603 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
604}
605
606/**
607 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
608 * @oh: struct omap_hwmod *
609 *
610 * Called from _init_clocks(). Populates the @oh _clk (main
611 * functional clock pointer) if a main_clk is present. Returns 0 on
612 * success or -EINVAL on error.
613 */
614static int _init_main_clk(struct omap_hwmod *oh)
615{
63c85238
PW
616 int ret = 0;
617
50ebdac2 618 if (!oh->main_clk)
63c85238
PW
619 return 0;
620
63403384 621 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 622 if (!oh->_clk) {
20383d82
BC
623 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
624 oh->name, oh->main_clk);
63403384 625 return -EINVAL;
dc75925d 626 }
63c85238 627
63403384
BC
628 if (!oh->_clk->clkdm)
629 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
630 oh->main_clk, oh->_clk->name);
81d7c6ff 631
63c85238
PW
632 return ret;
633}
634
635/**
887adeac 636 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
637 * @oh: struct omap_hwmod *
638 *
639 * Called from _init_clocks(). Populates the @oh OCP slave interface
640 * clock pointers. Returns 0 on success or -EINVAL on error.
641 */
642static int _init_interface_clks(struct omap_hwmod *oh)
643{
5d95dde7 644 struct omap_hwmod_ocp_if *os;
2221b5cd 645 struct list_head *p = NULL;
63c85238 646 struct clk *c;
5d95dde7 647 int i = 0;
63c85238
PW
648 int ret = 0;
649
2221b5cd
PW
650 if (link_registration)
651 p = oh->slave_ports.next;
652
5d95dde7 653 while (i < oh->slaves_cnt) {
2221b5cd 654 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
50ebdac2 655 if (!os->clk)
63c85238
PW
656 continue;
657
50ebdac2 658 c = omap_clk_get_by_name(os->clk);
dc75925d 659 if (!c) {
20383d82
BC
660 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
661 oh->name, os->clk);
63c85238 662 ret = -EINVAL;
dc75925d 663 }
63c85238
PW
664 os->_clk = c;
665 }
666
667 return ret;
668}
669
670/**
671 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
672 * @oh: struct omap_hwmod *
673 *
674 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
675 * clock pointers. Returns 0 on success or -EINVAL on error.
676 */
677static int _init_opt_clks(struct omap_hwmod *oh)
678{
679 struct omap_hwmod_opt_clk *oc;
680 struct clk *c;
681 int i;
682 int ret = 0;
683
684 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 685 c = omap_clk_get_by_name(oc->clk);
dc75925d 686 if (!c) {
20383d82
BC
687 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
688 oh->name, oc->clk);
63c85238 689 ret = -EINVAL;
dc75925d 690 }
63c85238
PW
691 oc->_clk = c;
692 }
693
694 return ret;
695}
696
697/**
698 * _enable_clocks - enable hwmod main clock and interface clocks
699 * @oh: struct omap_hwmod *
700 *
701 * Enables all clocks necessary for register reads and writes to succeed
702 * on the hwmod @oh. Returns 0.
703 */
704static int _enable_clocks(struct omap_hwmod *oh)
705{
5d95dde7 706 struct omap_hwmod_ocp_if *os;
2221b5cd 707 struct list_head *p = NULL;
5d95dde7 708 int i = 0;
63c85238
PW
709
710 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
711
4d3ae5a9 712 if (oh->_clk)
63c85238
PW
713 clk_enable(oh->_clk);
714
2221b5cd
PW
715 if (link_registration)
716 p = oh->slave_ports.next;
717
5d95dde7 718 while (i < oh->slaves_cnt) {
2221b5cd 719 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
63c85238 720
5d95dde7
PW
721 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
722 clk_enable(os->_clk);
63c85238
PW
723 }
724
725 /* The opt clocks are controlled by the device driver. */
726
727 return 0;
728}
729
730/**
731 * _disable_clocks - disable hwmod main clock and interface clocks
732 * @oh: struct omap_hwmod *
733 *
734 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
735 */
736static int _disable_clocks(struct omap_hwmod *oh)
737{
5d95dde7 738 struct omap_hwmod_ocp_if *os;
2221b5cd 739 struct list_head *p = NULL;
5d95dde7 740 int i = 0;
63c85238
PW
741
742 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
743
4d3ae5a9 744 if (oh->_clk)
63c85238
PW
745 clk_disable(oh->_clk);
746
2221b5cd
PW
747 if (link_registration)
748 p = oh->slave_ports.next;
749
5d95dde7 750 while (i < oh->slaves_cnt) {
2221b5cd 751 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
63c85238 752
5d95dde7
PW
753 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
754 clk_disable(os->_clk);
63c85238
PW
755 }
756
757 /* The opt clocks are controlled by the device driver. */
758
759 return 0;
760}
761
96835af9
BC
762static void _enable_optional_clocks(struct omap_hwmod *oh)
763{
764 struct omap_hwmod_opt_clk *oc;
765 int i;
766
767 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
768
769 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
770 if (oc->_clk) {
771 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
772 oc->_clk->name);
773 clk_enable(oc->_clk);
774 }
775}
776
777static void _disable_optional_clocks(struct omap_hwmod *oh)
778{
779 struct omap_hwmod_opt_clk *oc;
780 int i;
781
782 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
783
784 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
785 if (oc->_clk) {
786 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
787 oc->_clk->name);
788 clk_disable(oc->_clk);
789 }
790}
791
45c38252
BC
792/**
793 * _enable_module - enable CLKCTRL modulemode on OMAP4
794 * @oh: struct omap_hwmod *
795 *
796 * Enables the PRCM module mode related to the hwmod @oh.
797 * No return value.
798 */
799static void _enable_module(struct omap_hwmod *oh)
800{
801 /* The module mode does not exist prior OMAP4 */
802 if (cpu_is_omap24xx() || cpu_is_omap34xx())
803 return;
804
805 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
806 return;
807
808 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
809 oh->name, oh->prcm.omap4.modulemode);
810
811 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
812 oh->clkdm->prcm_partition,
813 oh->clkdm->cm_inst,
814 oh->clkdm->clkdm_offs,
815 oh->prcm.omap4.clkctrl_offs);
816}
817
818/**
bfc141e3
BC
819 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
820 * @oh: struct omap_hwmod *
821 *
822 * Wait for a module @oh to enter slave idle. Returns 0 if the module
823 * does not have an IDLEST bit or if the module successfully enters
824 * slave idle; otherwise, pass along the return value of the
825 * appropriate *_cm*_wait_module_idle() function.
826 */
827static int _omap4_wait_target_disable(struct omap_hwmod *oh)
828{
829 if (!cpu_is_omap44xx())
830 return 0;
831
832 if (!oh)
833 return -EINVAL;
834
835 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
836 return 0;
837
838 if (oh->flags & HWMOD_NO_IDLEST)
839 return 0;
840
841 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
842 oh->clkdm->cm_inst,
843 oh->clkdm->clkdm_offs,
844 oh->prcm.omap4.clkctrl_offs);
845}
846
212738a4
PW
847/**
848 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
849 * @oh: struct omap_hwmod *oh
850 *
851 * Count and return the number of MPU IRQs associated with the hwmod
852 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
853 * NULL.
854 */
855static int _count_mpu_irqs(struct omap_hwmod *oh)
856{
857 struct omap_hwmod_irq_info *ohii;
858 int i = 0;
859
860 if (!oh || !oh->mpu_irqs)
861 return 0;
862
863 do {
864 ohii = &oh->mpu_irqs[i++];
865 } while (ohii->irq != -1);
866
cc1b0765 867 return i-1;
212738a4
PW
868}
869
bc614958
PW
870/**
871 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
872 * @oh: struct omap_hwmod *oh
873 *
874 * Count and return the number of SDMA request lines associated with
875 * the hwmod @oh. Used to allocate struct resource data. Returns 0
876 * if @oh is NULL.
877 */
878static int _count_sdma_reqs(struct omap_hwmod *oh)
879{
880 struct omap_hwmod_dma_info *ohdi;
881 int i = 0;
882
883 if (!oh || !oh->sdma_reqs)
884 return 0;
885
886 do {
887 ohdi = &oh->sdma_reqs[i++];
888 } while (ohdi->dma_req != -1);
889
cc1b0765 890 return i-1;
bc614958
PW
891}
892
78183f3f
PW
893/**
894 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
895 * @oh: struct omap_hwmod *oh
896 *
897 * Count and return the number of address space ranges associated with
898 * the hwmod @oh. Used to allocate struct resource data. Returns 0
899 * if @oh is NULL.
900 */
901static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
902{
903 struct omap_hwmod_addr_space *mem;
904 int i = 0;
905
906 if (!os || !os->addr)
907 return 0;
908
909 do {
910 mem = &os->addr[i++];
911 } while (mem->pa_start != mem->pa_end);
912
cc1b0765 913 return i-1;
78183f3f
PW
914}
915
5e8370f1
PW
916/**
917 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
918 * @oh: struct omap_hwmod * to operate on
919 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
920 * @irq: pointer to an unsigned int to store the MPU IRQ number to
921 *
922 * Retrieve a MPU hardware IRQ line number named by @name associated
923 * with the IP block pointed to by @oh. The IRQ number will be filled
924 * into the address pointed to by @dma. When @name is non-null, the
925 * IRQ line number associated with the named entry will be returned.
926 * If @name is null, the first matching entry will be returned. Data
927 * order is not meaningful in hwmod data, so callers are strongly
928 * encouraged to use a non-null @name whenever possible to avoid
929 * unpredictable effects if hwmod data is later added that causes data
930 * ordering to change. Returns 0 upon success or a negative error
931 * code upon error.
932 */
933static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
934 unsigned int *irq)
935{
936 int i;
937 bool found = false;
938
939 if (!oh->mpu_irqs)
940 return -ENOENT;
941
942 i = 0;
943 while (oh->mpu_irqs[i].irq != -1) {
944 if (name == oh->mpu_irqs[i].name ||
945 !strcmp(name, oh->mpu_irqs[i].name)) {
946 found = true;
947 break;
948 }
949 i++;
950 }
951
952 if (!found)
953 return -ENOENT;
954
955 *irq = oh->mpu_irqs[i].irq;
956
957 return 0;
958}
959
960/**
961 * _get_sdma_req_by_name - fetch SDMA request line ID by name
962 * @oh: struct omap_hwmod * to operate on
963 * @name: pointer to the name of the SDMA request line to fetch (optional)
964 * @dma: pointer to an unsigned int to store the request line ID to
965 *
966 * Retrieve an SDMA request line ID named by @name on the IP block
967 * pointed to by @oh. The ID will be filled into the address pointed
968 * to by @dma. When @name is non-null, the request line ID associated
969 * with the named entry will be returned. If @name is null, the first
970 * matching entry will be returned. Data order is not meaningful in
971 * hwmod data, so callers are strongly encouraged to use a non-null
972 * @name whenever possible to avoid unpredictable effects if hwmod
973 * data is later added that causes data ordering to change. Returns 0
974 * upon success or a negative error code upon error.
975 */
976static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
977 unsigned int *dma)
978{
979 int i;
980 bool found = false;
981
982 if (!oh->sdma_reqs)
983 return -ENOENT;
984
985 i = 0;
986 while (oh->sdma_reqs[i].dma_req != -1) {
987 if (name == oh->sdma_reqs[i].name ||
988 !strcmp(name, oh->sdma_reqs[i].name)) {
989 found = true;
990 break;
991 }
992 i++;
993 }
994
995 if (!found)
996 return -ENOENT;
997
998 *dma = oh->sdma_reqs[i].dma_req;
999
1000 return 0;
1001}
1002
1003/**
1004 * _get_addr_space_by_name - fetch address space start & end by name
1005 * @oh: struct omap_hwmod * to operate on
1006 * @name: pointer to the name of the address space to fetch (optional)
1007 * @pa_start: pointer to a u32 to store the starting address to
1008 * @pa_end: pointer to a u32 to store the ending address to
1009 *
1010 * Retrieve address space start and end addresses for the IP block
1011 * pointed to by @oh. The data will be filled into the addresses
1012 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1013 * address space data associated with the named entry will be
1014 * returned. If @name is null, the first matching entry will be
1015 * returned. Data order is not meaningful in hwmod data, so callers
1016 * are strongly encouraged to use a non-null @name whenever possible
1017 * to avoid unpredictable effects if hwmod data is later added that
1018 * causes data ordering to change. Returns 0 upon success or a
1019 * negative error code upon error.
1020 */
1021static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1022 u32 *pa_start, u32 *pa_end)
1023{
1024 int i, j;
1025 struct omap_hwmod_ocp_if *os;
2221b5cd 1026 struct list_head *p = NULL;
5e8370f1
PW
1027 bool found = false;
1028
2221b5cd
PW
1029 if (link_registration)
1030 p = oh->slave_ports.next;
1031
5d95dde7
PW
1032 i = 0;
1033 while (i < oh->slaves_cnt) {
1034 os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
5e8370f1
PW
1035
1036 if (!os->addr)
1037 return -ENOENT;
1038
1039 j = 0;
1040 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1041 if (name == os->addr[j].name ||
1042 !strcmp(name, os->addr[j].name)) {
1043 found = true;
1044 break;
1045 }
1046 j++;
1047 }
1048
1049 if (found)
1050 break;
1051 }
1052
1053 if (!found)
1054 return -ENOENT;
1055
1056 *pa_start = os->addr[j].pa_start;
1057 *pa_end = os->addr[j].pa_end;
1058
1059 return 0;
1060}
1061
63c85238 1062/**
24dbc213 1063 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1064 * @oh: struct omap_hwmod *
1065 *
24dbc213
PW
1066 * Determines the array index of the OCP slave port that the MPU uses
1067 * to address the device, and saves it into the struct omap_hwmod.
1068 * Intended to be called during hwmod registration only. No return
1069 * value.
63c85238 1070 */
24dbc213 1071static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1072{
24dbc213 1073 struct omap_hwmod_ocp_if *os = NULL;
2221b5cd 1074 struct list_head *p = NULL;
5d95dde7 1075 int i = 0;
63c85238 1076
5d95dde7 1077 if (!oh)
24dbc213
PW
1078 return;
1079
1080 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1081
2221b5cd
PW
1082 if (link_registration)
1083 p = oh->slave_ports.next;
1084
5d95dde7 1085 while (i < oh->slaves_cnt) {
2221b5cd 1086 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
63c85238 1087 if (os->user & OCP_USER_MPU) {
2221b5cd 1088 oh->_mpu_port = os;
24dbc213
PW
1089 oh->_mpu_port_index = i - 1;
1090 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1091 break;
1092 }
1093 }
1094
24dbc213 1095 return;
63c85238
PW
1096}
1097
2d6141ba
PW
1098/**
1099 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1100 * @oh: struct omap_hwmod *
1101 *
1102 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1103 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1104 * communicate with the IP block. This interface need not be directly
1105 * connected to the MPU (and almost certainly is not), but is directly
1106 * connected to the IP block represented by @oh. Returns a pointer
1107 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1108 * error or if there does not appear to be a path from the MPU to this
1109 * IP block.
1110 */
1111static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1112{
1113 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1114 return NULL;
1115
2221b5cd
PW
1116 if (!link_registration)
1117 return oh->slaves[oh->_mpu_port_index];
1118 else
1119 return oh->_mpu_port;
2d6141ba
PW
1120};
1121
63c85238 1122/**
c9aafd23 1123 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1124 * @oh: struct omap_hwmod *
1125 *
c9aafd23
PW
1126 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1127 * the register target MPU address space; or returns NULL upon error.
63c85238 1128 */
c9aafd23 1129static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1130{
1131 struct omap_hwmod_ocp_if *os;
1132 struct omap_hwmod_addr_space *mem;
c9aafd23 1133 int found = 0, i = 0;
63c85238 1134
2d6141ba 1135 os = _find_mpu_rt_port(oh);
24dbc213 1136 if (!os || !os->addr)
78183f3f
PW
1137 return NULL;
1138
1139 do {
1140 mem = &os->addr[i++];
1141 if (mem->flags & ADDR_TYPE_RT)
63c85238 1142 found = 1;
78183f3f 1143 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1144
c9aafd23 1145 return (found) ? mem : NULL;
63c85238
PW
1146}
1147
1148/**
74ff3a68 1149 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1150 * @oh: struct omap_hwmod *
1151 *
1152 * If module is marked as SWSUP_SIDLE, force the module out of slave
1153 * idle; otherwise, configure it for smart-idle. If module is marked
1154 * as SWSUP_MSUSPEND, force the module out of master standby;
1155 * otherwise, configure it for smart-standby. No return value.
1156 */
74ff3a68 1157static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1158{
43b40992 1159 u8 idlemode, sf;
63c85238
PW
1160 u32 v;
1161
43b40992 1162 if (!oh->class->sysc)
63c85238
PW
1163 return;
1164
1165 v = oh->_sysc_cache;
43b40992 1166 sf = oh->class->sysc->sysc_flags;
63c85238 1167
43b40992 1168 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1169 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1170 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1171 _set_slave_idlemode(oh, idlemode, &v);
1172 }
1173
43b40992 1174 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1175 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1176 idlemode = HWMOD_IDLEMODE_NO;
1177 } else {
1178 if (sf & SYSC_HAS_ENAWAKEUP)
1179 _enable_wakeup(oh, &v);
1180 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1181 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1182 else
1183 idlemode = HWMOD_IDLEMODE_SMART;
1184 }
63c85238
PW
1185 _set_master_standbymode(oh, idlemode, &v);
1186 }
1187
a16b1f7f
PW
1188 /*
1189 * XXX The clock framework should handle this, by
1190 * calling into this code. But this must wait until the
1191 * clock structures are tagged with omap_hwmod entries
1192 */
43b40992
PW
1193 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1194 (sf & SYSC_HAS_CLOCKACTIVITY))
1195 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1196
9980ce53
RN
1197 /* If slave is in SMARTIDLE, also enable wakeup */
1198 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1199 _enable_wakeup(oh, &v);
1200
1201 _write_sysconfig(v, oh);
78f26e87
HH
1202
1203 /*
1204 * Set the autoidle bit only after setting the smartidle bit
1205 * Setting this will not have any impact on the other modules.
1206 */
1207 if (sf & SYSC_HAS_AUTOIDLE) {
1208 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1209 0 : 1;
1210 _set_module_autoidle(oh, idlemode, &v);
1211 _write_sysconfig(v, oh);
1212 }
63c85238
PW
1213}
1214
1215/**
74ff3a68 1216 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1217 * @oh: struct omap_hwmod *
1218 *
1219 * If module is marked as SWSUP_SIDLE, force the module into slave
1220 * idle; otherwise, configure it for smart-idle. If module is marked
1221 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1222 * configure it for smart-standby. No return value.
1223 */
74ff3a68 1224static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1225{
43b40992 1226 u8 idlemode, sf;
63c85238
PW
1227 u32 v;
1228
43b40992 1229 if (!oh->class->sysc)
63c85238
PW
1230 return;
1231
1232 v = oh->_sysc_cache;
43b40992 1233 sf = oh->class->sysc->sysc_flags;
63c85238 1234
43b40992 1235 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1236 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1237 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1238 _set_slave_idlemode(oh, idlemode, &v);
1239 }
1240
43b40992 1241 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1242 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1243 idlemode = HWMOD_IDLEMODE_FORCE;
1244 } else {
1245 if (sf & SYSC_HAS_ENAWAKEUP)
1246 _enable_wakeup(oh, &v);
1247 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1248 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1249 else
1250 idlemode = HWMOD_IDLEMODE_SMART;
1251 }
63c85238
PW
1252 _set_master_standbymode(oh, idlemode, &v);
1253 }
1254
86009eb3
BC
1255 /* If slave is in SMARTIDLE, also enable wakeup */
1256 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1257 _enable_wakeup(oh, &v);
1258
63c85238
PW
1259 _write_sysconfig(v, oh);
1260}
1261
1262/**
74ff3a68 1263 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1264 * @oh: struct omap_hwmod *
1265 *
1266 * Force the module into slave idle and master suspend. No return
1267 * value.
1268 */
74ff3a68 1269static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1270{
1271 u32 v;
43b40992 1272 u8 sf;
63c85238 1273
43b40992 1274 if (!oh->class->sysc)
63c85238
PW
1275 return;
1276
1277 v = oh->_sysc_cache;
43b40992 1278 sf = oh->class->sysc->sysc_flags;
63c85238 1279
43b40992 1280 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1281 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1282
43b40992 1283 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1284 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1285
43b40992 1286 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1287 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1288
1289 _write_sysconfig(v, oh);
1290}
1291
1292/**
1293 * _lookup - find an omap_hwmod by name
1294 * @name: find an omap_hwmod by name
1295 *
1296 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1297 */
1298static struct omap_hwmod *_lookup(const char *name)
1299{
1300 struct omap_hwmod *oh, *temp_oh;
1301
1302 oh = NULL;
1303
1304 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1305 if (!strcmp(name, temp_oh->name)) {
1306 oh = temp_oh;
1307 break;
1308 }
1309 }
1310
1311 return oh;
1312}
6ae76997
BC
1313/**
1314 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1315 * @oh: struct omap_hwmod *
1316 *
1317 * Convert a clockdomain name stored in a struct omap_hwmod into a
1318 * clockdomain pointer, and save it into the struct omap_hwmod.
1319 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1320 */
1321static int _init_clkdm(struct omap_hwmod *oh)
1322{
1323 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1324 return 0;
1325
1326 if (!oh->clkdm_name) {
1327 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1328 return -EINVAL;
1329 }
1330
1331 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1332 if (!oh->clkdm) {
1333 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1334 oh->name, oh->clkdm_name);
1335 return -EINVAL;
1336 }
1337
1338 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1339 oh->name, oh->clkdm_name);
1340
1341 return 0;
1342}
63c85238
PW
1343
1344/**
6ae76997
BC
1345 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1346 * well the clockdomain.
63c85238 1347 * @oh: struct omap_hwmod *
97d60162 1348 * @data: not used; pass NULL
63c85238 1349 *
a2debdbd 1350 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1351 * Resolves all clock names embedded in the hwmod. Returns 0 on
1352 * success, or a negative error code on failure.
63c85238 1353 */
97d60162 1354static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1355{
1356 int ret = 0;
1357
48d54f3f
PW
1358 if (oh->_state != _HWMOD_STATE_REGISTERED)
1359 return 0;
63c85238
PW
1360
1361 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1362
1363 ret |= _init_main_clk(oh);
1364 ret |= _init_interface_clks(oh);
1365 ret |= _init_opt_clks(oh);
6ae76997 1366 ret |= _init_clkdm(oh);
63c85238 1367
f5c1f84b
BC
1368 if (!ret)
1369 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1370 else
1371 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1372
09c35f2f 1373 return ret;
63c85238
PW
1374}
1375
1376/**
1377 * _wait_target_ready - wait for a module to leave slave idle
1378 * @oh: struct omap_hwmod *
1379 *
1380 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1381 * does not have an IDLEST bit or if the module successfully leaves
1382 * slave idle; otherwise, pass along the return value of the
d0f0631d 1383 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1384 */
1385static int _wait_target_ready(struct omap_hwmod *oh)
1386{
1387 struct omap_hwmod_ocp_if *os;
1388 int ret;
1389
1390 if (!oh)
1391 return -EINVAL;
1392
2d6141ba 1393 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1394 return 0;
1395
2d6141ba
PW
1396 os = _find_mpu_rt_port(oh);
1397 if (!os)
63c85238
PW
1398 return 0;
1399
1400 /* XXX check module SIDLEMODE */
1401
1402 /* XXX check clock enable states */
1403
1404 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1405 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1406 oh->prcm.omap2.idlest_reg_id,
1407 oh->prcm.omap2.idlest_idle_bit);
63c85238 1408 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1409 if (!oh->clkdm)
1410 return -EINVAL;
1411
1412 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1413 oh->clkdm->cm_inst,
1414 oh->clkdm->clkdm_offs,
1415 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1416 } else {
1417 BUG();
1418 };
1419
1420 return ret;
1421}
1422
5365efbe 1423/**
cc1226e7 1424 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1425 * @oh: struct omap_hwmod *
1426 * @name: name of the reset line in the context of this hwmod
cc1226e7 1427 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1428 *
1429 * Return the bit position of the reset line that match the
1430 * input name. Return -ENOENT if not found.
1431 */
cc1226e7 1432static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1433 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1434{
1435 int i;
1436
1437 for (i = 0; i < oh->rst_lines_cnt; i++) {
1438 const char *rst_line = oh->rst_lines[i].name;
1439 if (!strcmp(rst_line, name)) {
cc1226e7 1440 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1441 ohri->st_shift = oh->rst_lines[i].st_shift;
1442 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1443 oh->name, __func__, rst_line, ohri->rst_shift,
1444 ohri->st_shift);
5365efbe 1445
cc1226e7 1446 return 0;
5365efbe
BC
1447 }
1448 }
1449
1450 return -ENOENT;
1451}
1452
1453/**
1454 * _assert_hardreset - assert the HW reset line of submodules
1455 * contained in the hwmod module.
1456 * @oh: struct omap_hwmod *
1457 * @name: name of the reset line to lookup and assert
1458 *
1459 * Some IP like dsp, ipu or iva contain processor that require
1460 * an HW reset line to be assert / deassert in order to enable fully
1461 * the IP.
1462 */
1463static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1464{
cc1226e7 1465 struct omap_hwmod_rst_info ohri;
1466 u8 ret;
5365efbe
BC
1467
1468 if (!oh)
1469 return -EINVAL;
1470
cc1226e7 1471 ret = _lookup_hardreset(oh, name, &ohri);
1472 if (IS_ERR_VALUE(ret))
1473 return ret;
5365efbe
BC
1474
1475 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1476 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1477 ohri.rst_shift);
5365efbe 1478 else if (cpu_is_omap44xx())
eaac329d
BC
1479 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1480 oh->clkdm->pwrdm.ptr->prcm_partition,
1481 oh->clkdm->pwrdm.ptr->prcm_offs,
1482 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1483 else
1484 return -EINVAL;
1485}
1486
1487/**
1488 * _deassert_hardreset - deassert the HW reset line of submodules contained
1489 * in the hwmod module.
1490 * @oh: struct omap_hwmod *
1491 * @name: name of the reset line to look up and deassert
1492 *
1493 * Some IP like dsp, ipu or iva contain processor that require
1494 * an HW reset line to be assert / deassert in order to enable fully
1495 * the IP.
1496 */
1497static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1498{
cc1226e7 1499 struct omap_hwmod_rst_info ohri;
1500 int ret;
5365efbe
BC
1501
1502 if (!oh)
1503 return -EINVAL;
1504
cc1226e7 1505 ret = _lookup_hardreset(oh, name, &ohri);
1506 if (IS_ERR_VALUE(ret))
1507 return ret;
5365efbe 1508
cc1226e7 1509 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1510 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1511 ohri.rst_shift,
1512 ohri.st_shift);
1513 } else if (cpu_is_omap44xx()) {
1514 if (ohri.st_shift)
1515 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1516 oh->name, name);
eaac329d
BC
1517 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1518 oh->clkdm->pwrdm.ptr->prcm_partition,
1519 oh->clkdm->pwrdm.ptr->prcm_offs,
1520 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1521 } else {
5365efbe 1522 return -EINVAL;
cc1226e7 1523 }
5365efbe 1524
cc1226e7 1525 if (ret == -EBUSY)
5365efbe
BC
1526 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1527
cc1226e7 1528 return ret;
5365efbe
BC
1529}
1530
1531/**
1532 * _read_hardreset - read the HW reset line state of submodules
1533 * contained in the hwmod module
1534 * @oh: struct omap_hwmod *
1535 * @name: name of the reset line to look up and read
1536 *
1537 * Return the state of the reset line.
1538 */
1539static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1540{
cc1226e7 1541 struct omap_hwmod_rst_info ohri;
1542 u8 ret;
5365efbe
BC
1543
1544 if (!oh)
1545 return -EINVAL;
1546
cc1226e7 1547 ret = _lookup_hardreset(oh, name, &ohri);
1548 if (IS_ERR_VALUE(ret))
1549 return ret;
5365efbe
BC
1550
1551 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1552 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1553 ohri.st_shift);
5365efbe 1554 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1555 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1556 oh->clkdm->pwrdm.ptr->prcm_partition,
1557 oh->clkdm->pwrdm.ptr->prcm_offs,
1558 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1559 } else {
1560 return -EINVAL;
1561 }
1562}
1563
747834ab
PW
1564/**
1565 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1566 * @oh: struct omap_hwmod *
1567 *
1568 * If any hardreset line associated with @oh is asserted, then return true.
1569 * Otherwise, if @oh has no hardreset lines associated with it, or if
1570 * no hardreset lines associated with @oh are asserted, then return false.
1571 * This function is used to avoid executing some parts of the IP block
1572 * enable/disable sequence if a hardreset line is set.
1573 */
1574static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1575{
1576 int i;
1577
1578 if (oh->rst_lines_cnt == 0)
1579 return false;
1580
1581 for (i = 0; i < oh->rst_lines_cnt; i++)
1582 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1583 return true;
1584
1585 return false;
1586}
1587
1588/**
1589 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1590 * @oh: struct omap_hwmod *
1591 *
1592 * Disable the PRCM module mode related to the hwmod @oh.
1593 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1594 */
1595static int _omap4_disable_module(struct omap_hwmod *oh)
1596{
1597 int v;
1598
1599 /* The module mode does not exist prior OMAP4 */
1600 if (!cpu_is_omap44xx())
1601 return -EINVAL;
1602
1603 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1604 return -EINVAL;
1605
1606 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1607
1608 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1609 oh->clkdm->cm_inst,
1610 oh->clkdm->clkdm_offs,
1611 oh->prcm.omap4.clkctrl_offs);
1612
1613 if (_are_any_hardreset_lines_asserted(oh))
1614 return 0;
1615
1616 v = _omap4_wait_target_disable(oh);
1617 if (v)
1618 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1619 oh->name);
1620
1621 return 0;
1622}
1623
63c85238 1624/**
bd36179e 1625 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1626 * @oh: struct omap_hwmod *
1627 *
1628 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1629 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1630 * reset this way, -EINVAL if the hwmod is in the wrong state,
1631 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1632 *
1633 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1634 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1635 * use the SYSCONFIG softreset bit to provide the status.
1636 *
bd36179e
PW
1637 * Note that some IP like McBSP do have reset control but don't have
1638 * reset status.
63c85238 1639 */
bd36179e 1640static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1641{
387ca5bf 1642 u32 v, softrst_mask;
6f8b7ff5 1643 int c = 0;
96835af9 1644 int ret = 0;
63c85238 1645
43b40992 1646 if (!oh->class->sysc ||
2cb06814 1647 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1648 return -ENOENT;
63c85238
PW
1649
1650 /* clocks must be on for this operation */
1651 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1652 pr_warning("omap_hwmod: %s: reset can only be entered from "
1653 "enabled state\n", oh->name);
63c85238
PW
1654 return -EINVAL;
1655 }
1656
96835af9
BC
1657 /* For some modules, all optionnal clocks need to be enabled as well */
1658 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1659 _enable_optional_clocks(oh);
1660
bd36179e 1661 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1662
1663 v = oh->_sysc_cache;
96835af9
BC
1664 ret = _set_softreset(oh, &v);
1665 if (ret)
1666 goto dis_opt_clks;
63c85238
PW
1667 _write_sysconfig(v, oh);
1668
d99de7f5
FGL
1669 if (oh->class->sysc->srst_udelay)
1670 udelay(oh->class->sysc->srst_udelay);
1671
2cb06814 1672 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1673 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1674 oh->class->sysc->syss_offs)
1675 & SYSS_RESETDONE_MASK),
1676 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1677 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1678 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1679 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1680 oh->class->sysc->sysc_offs)
387ca5bf 1681 & softrst_mask),
2cb06814 1682 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1683 }
63c85238 1684
5365efbe 1685 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1686 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1687 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1688 else
5365efbe 1689 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1690
1691 /*
1692 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1693 * _wait_target_ready() or _reset()
1694 */
1695
96835af9
BC
1696 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1697
1698dis_opt_clks:
1699 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1700 _disable_optional_clocks(oh);
1701
1702 return ret;
63c85238
PW
1703}
1704
bd36179e
PW
1705/**
1706 * _reset - reset an omap_hwmod
1707 * @oh: struct omap_hwmod *
1708 *
30e105c0
PW
1709 * Resets an omap_hwmod @oh. If the module has a custom reset
1710 * function pointer defined, then call it to reset the IP block, and
1711 * pass along its return value to the caller. Otherwise, if the IP
1712 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1713 * associated with it, call a function to reset the IP block via that
1714 * method, and pass along the return value to the caller. Finally, if
1715 * the IP block has some hardreset lines associated with it, assert
1716 * all of those, but do _not_ deassert them. (This is because driver
1717 * authors have expressed an apparent requirement to control the
1718 * deassertion of the hardreset lines themselves.)
1719 *
1720 * The default software reset mechanism for most OMAP IP blocks is
1721 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1722 * hwmods cannot be reset via this method. Some are not targets and
1723 * therefore have no OCP header registers to access. Others (like the
1724 * IVA) have idiosyncratic reset sequences. So for these relatively
1725 * rare cases, custom reset code can be supplied in the struct
1726 * omap_hwmod_class .reset function pointer. Passes along the return
1727 * value from either _ocp_softreset() or the custom reset function -
1728 * these must return -EINVAL if the hwmod cannot be reset this way or
1729 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1730 * not reset in time, or 0 upon success.
bd36179e
PW
1731 */
1732static int _reset(struct omap_hwmod *oh)
1733{
30e105c0 1734 int i, r;
bd36179e
PW
1735
1736 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1737
30e105c0
PW
1738 if (oh->class->reset) {
1739 r = oh->class->reset(oh);
1740 } else {
1741 if (oh->rst_lines_cnt > 0) {
1742 for (i = 0; i < oh->rst_lines_cnt; i++)
1743 _assert_hardreset(oh, oh->rst_lines[i].name);
1744 return 0;
1745 } else {
1746 r = _ocp_softreset(oh);
1747 if (r == -ENOENT)
1748 r = 0;
1749 }
1750 }
1751
9c8b0ec7 1752 /*
30e105c0
PW
1753 * OCP_SYSCONFIG bits need to be reprogrammed after a
1754 * softreset. The _enable() function should be split to avoid
1755 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1756 */
2800852a
RN
1757 if (oh->class->sysc) {
1758 _update_sysc_cache(oh);
1759 _enable_sysc(oh);
1760 }
1761
30e105c0 1762 return r;
bd36179e
PW
1763}
1764
63c85238 1765/**
dc6d1cda 1766 * _enable - enable an omap_hwmod
63c85238
PW
1767 * @oh: struct omap_hwmod *
1768 *
1769 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1770 * register target. Returns -EINVAL if the hwmod is in the wrong
1771 * state or passes along the return value of _wait_target_ready().
63c85238 1772 */
dc6d1cda 1773static int _enable(struct omap_hwmod *oh)
63c85238 1774{
747834ab 1775 int r;
665d0013 1776 int hwsup = 0;
63c85238 1777
34617e2a
BC
1778 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1779
aacf0941 1780 /*
64813c3f
PW
1781 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1782 * state at init. Now that someone is really trying to enable
1783 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1784 */
1785 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1786 /*
1787 * If the caller has mux data populated, do the mux'ing
1788 * which wouldn't have been done as part of the _enable()
1789 * done during setup.
1790 */
1791 if (oh->mux)
1792 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1793
1794 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1795 return 0;
1796 }
1797
63c85238
PW
1798 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1799 oh->_state != _HWMOD_STATE_IDLE &&
1800 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1801 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1802 oh->name);
63c85238
PW
1803 return -EINVAL;
1804 }
1805
31f62866 1806 /*
747834ab
PW
1807 * If an IP block contains HW reset lines and any of them are
1808 * asserted, we let integration code associated with that
1809 * block handle the enable. We've received very little
1810 * information on what those driver authors need, and until
1811 * detailed information is provided and the driver code is
1812 * posted to the public lists, this is probably the best we
1813 * can do.
31f62866 1814 */
747834ab
PW
1815 if (_are_any_hardreset_lines_asserted(oh))
1816 return 0;
63c85238 1817
665d0013
RN
1818 /* Mux pins for device runtime if populated */
1819 if (oh->mux && (!oh->mux->enabled ||
1820 ((oh->_state == _HWMOD_STATE_IDLE) &&
1821 oh->mux->pads_dynamic)))
1822 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1823
1824 _add_initiator_dep(oh, mpu_oh);
34617e2a 1825
665d0013
RN
1826 if (oh->clkdm) {
1827 /*
1828 * A clockdomain must be in SW_SUP before enabling
1829 * completely the module. The clockdomain can be set
1830 * in HW_AUTO only when the module become ready.
1831 */
1832 hwsup = clkdm_in_hwsup(oh->clkdm);
1833 r = clkdm_hwmod_enable(oh->clkdm, oh);
1834 if (r) {
1835 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1836 oh->name, oh->clkdm->name, r);
1837 return r;
1838 }
34617e2a 1839 }
665d0013
RN
1840
1841 _enable_clocks(oh);
45c38252 1842 _enable_module(oh);
34617e2a 1843
665d0013
RN
1844 r = _wait_target_ready(oh);
1845 if (!r) {
1846 /*
1847 * Set the clockdomain to HW_AUTO only if the target is ready,
1848 * assuming that the previous state was HW_AUTO
1849 */
1850 if (oh->clkdm && hwsup)
1851 clkdm_allow_idle(oh->clkdm);
1852
1853 oh->_state = _HWMOD_STATE_ENABLED;
1854
1855 /* Access the sysconfig only if the target is ready */
1856 if (oh->class->sysc) {
1857 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1858 _update_sysc_cache(oh);
1859 _enable_sysc(oh);
1860 }
1861 } else {
1862 _disable_clocks(oh);
1863 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1864 oh->name, r);
34617e2a 1865
665d0013
RN
1866 if (oh->clkdm)
1867 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1868 }
1869
63c85238
PW
1870 return r;
1871}
1872
1873/**
dc6d1cda 1874 * _idle - idle an omap_hwmod
63c85238
PW
1875 * @oh: struct omap_hwmod *
1876 *
1877 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1878 * no further work. Returns -EINVAL if the hwmod is in the wrong
1879 * state or returns 0.
63c85238 1880 */
dc6d1cda 1881static int _idle(struct omap_hwmod *oh)
63c85238 1882{
34617e2a
BC
1883 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1884
63c85238 1885 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1886 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1887 oh->name);
63c85238
PW
1888 return -EINVAL;
1889 }
1890
747834ab
PW
1891 if (_are_any_hardreset_lines_asserted(oh))
1892 return 0;
1893
43b40992 1894 if (oh->class->sysc)
74ff3a68 1895 _idle_sysc(oh);
63c85238 1896 _del_initiator_dep(oh, mpu_oh);
bfc141e3
BC
1897
1898 _omap4_disable_module(oh);
1899
45c38252
BC
1900 /*
1901 * The module must be in idle mode before disabling any parents
1902 * clocks. Otherwise, the parent clock might be disabled before
1903 * the module transition is done, and thus will prevent the
1904 * transition to complete properly.
1905 */
1906 _disable_clocks(oh);
665d0013
RN
1907 if (oh->clkdm)
1908 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1909
8d9af88f 1910 /* Mux pins for device idle if populated */
029268e4 1911 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1912 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1913
63c85238
PW
1914 oh->_state = _HWMOD_STATE_IDLE;
1915
1916 return 0;
1917}
1918
9599217a
KVA
1919/**
1920 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1921 * @oh: struct omap_hwmod *
1922 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1923 *
1924 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1925 * local copy. Intended to be used by drivers that require
1926 * direct manipulation of the AUTOIDLE bits.
1927 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1928 * along the return value from _set_module_autoidle().
1929 *
1930 * Any users of this function should be scrutinized carefully.
1931 */
1932int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1933{
1934 u32 v;
1935 int retval = 0;
1936 unsigned long flags;
1937
1938 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1939 return -EINVAL;
1940
1941 spin_lock_irqsave(&oh->_lock, flags);
1942
1943 v = oh->_sysc_cache;
1944
1945 retval = _set_module_autoidle(oh, autoidle, &v);
1946
1947 if (!retval)
1948 _write_sysconfig(v, oh);
1949
1950 spin_unlock_irqrestore(&oh->_lock, flags);
1951
1952 return retval;
1953}
1954
63c85238
PW
1955/**
1956 * _shutdown - shutdown an omap_hwmod
1957 * @oh: struct omap_hwmod *
1958 *
1959 * Shut down an omap_hwmod @oh. This should be called when the driver
1960 * used for the hwmod is removed or unloaded or if the driver is not
1961 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1962 * state or returns 0.
1963 */
1964static int _shutdown(struct omap_hwmod *oh)
1965{
9c8b0ec7 1966 int ret, i;
e4dc8f50
PW
1967 u8 prev_state;
1968
63c85238
PW
1969 if (oh->_state != _HWMOD_STATE_IDLE &&
1970 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1971 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1972 oh->name);
63c85238
PW
1973 return -EINVAL;
1974 }
1975
747834ab
PW
1976 if (_are_any_hardreset_lines_asserted(oh))
1977 return 0;
1978
63c85238
PW
1979 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1980
e4dc8f50
PW
1981 if (oh->class->pre_shutdown) {
1982 prev_state = oh->_state;
1983 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1984 _enable(oh);
e4dc8f50
PW
1985 ret = oh->class->pre_shutdown(oh);
1986 if (ret) {
1987 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1988 _idle(oh);
e4dc8f50
PW
1989 return ret;
1990 }
1991 }
1992
6481c73c
MV
1993 if (oh->class->sysc) {
1994 if (oh->_state == _HWMOD_STATE_IDLE)
1995 _enable(oh);
74ff3a68 1996 _shutdown_sysc(oh);
6481c73c 1997 }
5365efbe 1998
3827f949
BC
1999 /* clocks and deps are already disabled in idle */
2000 if (oh->_state == _HWMOD_STATE_ENABLED) {
2001 _del_initiator_dep(oh, mpu_oh);
2002 /* XXX what about the other system initiators here? dma, dsp */
bfc141e3 2003 _omap4_disable_module(oh);
45c38252 2004 _disable_clocks(oh);
665d0013
RN
2005 if (oh->clkdm)
2006 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2007 }
63c85238
PW
2008 /* XXX Should this code also force-disable the optional clocks? */
2009
9c8b0ec7
PW
2010 for (i = 0; i < oh->rst_lines_cnt; i++)
2011 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2012
8d9af88f
TL
2013 /* Mux pins to safe mode or use populated off mode values */
2014 if (oh->mux)
2015 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2016
2017 oh->_state = _HWMOD_STATE_DISABLED;
2018
2019 return 0;
2020}
2021
381d033a
PW
2022/**
2023 * _init_mpu_rt_base - populate the virtual address for a hwmod
2024 * @oh: struct omap_hwmod * to locate the virtual address
2025 *
2026 * Cache the virtual address used by the MPU to access this IP block's
2027 * registers. This address is needed early so the OCP registers that
2028 * are part of the device's address space can be ioremapped properly.
2029 * No return value.
2030 */
2031static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2032{
c9aafd23
PW
2033 struct omap_hwmod_addr_space *mem;
2034 void __iomem *va_start;
2035
2036 if (!oh)
2037 return;
2038
2221b5cd
PW
2039 _save_mpu_port_index(oh);
2040
381d033a
PW
2041 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2042 return;
2043
c9aafd23
PW
2044 mem = _find_mpu_rt_addr_space(oh);
2045 if (!mem) {
2046 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2047 oh->name);
2048 return;
2049 }
2050
2051 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2052 if (!va_start) {
2053 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2054 return;
2055 }
2056
2057 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2058 oh->name, va_start);
2059
2060 oh->_mpu_rt_va = va_start;
381d033a
PW
2061}
2062
2063/**
2064 * _init - initialize internal data for the hwmod @oh
2065 * @oh: struct omap_hwmod *
2066 * @n: (unused)
2067 *
2068 * Look up the clocks and the address space used by the MPU to access
2069 * registers belonging to the hwmod @oh. @oh must already be
2070 * registered at this point. This is the first of two phases for
2071 * hwmod initialization. Code called here does not touch any hardware
2072 * registers, it simply prepares internal data structures. Returns 0
2073 * upon success or if the hwmod isn't registered, or -EINVAL upon
2074 * failure.
2075 */
2076static int __init _init(struct omap_hwmod *oh, void *data)
2077{
2078 int r;
2079
2080 if (oh->_state != _HWMOD_STATE_REGISTERED)
2081 return 0;
2082
2083 _init_mpu_rt_base(oh, NULL);
2084
2085 r = _init_clocks(oh, NULL);
2086 if (IS_ERR_VALUE(r)) {
2087 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2088 return -EINVAL;
2089 }
2090
2091 oh->_state = _HWMOD_STATE_INITIALIZED;
2092
2093 return 0;
2094}
2095
63c85238 2096/**
64813c3f 2097 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2098 * @oh: struct omap_hwmod *
2099 *
64813c3f
PW
2100 * Set up the module's interface clocks. XXX This function is still mostly
2101 * a stub; implementing this properly requires iclk autoidle usecounting in
2102 * the clock code. No return value.
63c85238 2103 */
64813c3f 2104static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2105{
5d95dde7 2106 struct omap_hwmod_ocp_if *os;
2221b5cd 2107 struct list_head *p = NULL;
5d95dde7 2108 int i = 0;
381d033a 2109 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2110 return;
48d54f3f 2111
2221b5cd
PW
2112 if (link_registration)
2113 p = oh->slave_ports.next;
63c85238 2114
5d95dde7 2115 while (i < oh->slaves_cnt) {
2221b5cd 2116 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
5d95dde7 2117 if (!os->_clk)
64813c3f 2118 continue;
63c85238 2119
64813c3f
PW
2120 if (os->flags & OCPIF_SWSUP_IDLE) {
2121 /* XXX omap_iclk_deny_idle(c); */
2122 } else {
2123 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2124 clk_enable(os->_clk);
63c85238
PW
2125 }
2126 }
2127
64813c3f
PW
2128 return;
2129}
2130
2131/**
2132 * _setup_reset - reset an IP block during the setup process
2133 * @oh: struct omap_hwmod *
2134 *
2135 * Reset the IP block corresponding to the hwmod @oh during the setup
2136 * process. The IP block is first enabled so it can be successfully
2137 * reset. Returns 0 upon success or a negative error code upon
2138 * failure.
2139 */
2140static int __init _setup_reset(struct omap_hwmod *oh)
2141{
2142 int r;
2143
2144 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2145 return -EINVAL;
63c85238 2146
747834ab
PW
2147 if (oh->rst_lines_cnt == 0) {
2148 r = _enable(oh);
2149 if (r) {
2150 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2151 oh->name, oh->_state);
2152 return -EINVAL;
2153 }
9a23dfe1 2154 }
63c85238 2155
2800852a 2156 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2157 r = _reset(oh);
2158
2159 return r;
2160}
2161
2162/**
2163 * _setup_postsetup - transition to the appropriate state after _setup
2164 * @oh: struct omap_hwmod *
2165 *
2166 * Place an IP block represented by @oh into a "post-setup" state --
2167 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2168 * this function is called at the end of _setup().) The postsetup
2169 * state for an IP block can be changed by calling
2170 * omap_hwmod_enter_postsetup_state() early in the boot process,
2171 * before one of the omap_hwmod_setup*() functions are called for the
2172 * IP block.
2173 *
2174 * The IP block stays in this state until a PM runtime-based driver is
2175 * loaded for that IP block. A post-setup state of IDLE is
2176 * appropriate for almost all IP blocks with runtime PM-enabled
2177 * drivers, since those drivers are able to enable the IP block. A
2178 * post-setup state of ENABLED is appropriate for kernels with PM
2179 * runtime disabled. The DISABLED state is appropriate for unusual IP
2180 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2181 * included, since the WDTIMER starts running on reset and will reset
2182 * the MPU if left active.
2183 *
2184 * This post-setup mechanism is deprecated. Once all of the OMAP
2185 * drivers have been converted to use PM runtime, and all of the IP
2186 * block data and interconnect data is available to the hwmod code, it
2187 * should be possible to replace this mechanism with a "lazy reset"
2188 * arrangement. In a "lazy reset" setup, each IP block is enabled
2189 * when the driver first probes, then all remaining IP blocks without
2190 * drivers are either shut down or enabled after the drivers have
2191 * loaded. However, this cannot take place until the above
2192 * preconditions have been met, since otherwise the late reset code
2193 * has no way of knowing which IP blocks are in use by drivers, and
2194 * which ones are unused.
2195 *
2196 * No return value.
2197 */
2198static void __init _setup_postsetup(struct omap_hwmod *oh)
2199{
2200 u8 postsetup_state;
2201
2202 if (oh->rst_lines_cnt > 0)
2203 return;
76e5589e 2204
2092e5cc
PW
2205 postsetup_state = oh->_postsetup_state;
2206 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2207 postsetup_state = _HWMOD_STATE_ENABLED;
2208
2209 /*
2210 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2211 * it should be set by the core code as a runtime flag during startup
2212 */
2213 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2214 (postsetup_state == _HWMOD_STATE_IDLE)) {
2215 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2216 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2217 }
2092e5cc
PW
2218
2219 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2220 _idle(oh);
2092e5cc
PW
2221 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2222 _shutdown(oh);
2223 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2224 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2225 oh->name, postsetup_state);
63c85238 2226
64813c3f
PW
2227 return;
2228}
2229
2230/**
2231 * _setup - prepare IP block hardware for use
2232 * @oh: struct omap_hwmod *
2233 * @n: (unused, pass NULL)
2234 *
2235 * Configure the IP block represented by @oh. This may include
2236 * enabling the IP block, resetting it, and placing it into a
2237 * post-setup state, depending on the type of IP block and applicable
2238 * flags. IP blocks are reset to prevent any previous configuration
2239 * by the bootloader or previous operating system from interfering
2240 * with power management or other parts of the system. The reset can
2241 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2242 * two phases for hwmod initialization. Code called here generally
2243 * affects the IP block hardware, or system integration hardware
2244 * associated with the IP block. Returns 0.
2245 */
2246static int __init _setup(struct omap_hwmod *oh, void *data)
2247{
2248 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2249 return 0;
2250
2251 _setup_iclk_autoidle(oh);
2252
2253 if (!_setup_reset(oh))
2254 _setup_postsetup(oh);
2255
63c85238
PW
2256 return 0;
2257}
2258
63c85238 2259/**
0102b627 2260 * _register - register a struct omap_hwmod
63c85238
PW
2261 * @oh: struct omap_hwmod *
2262 *
43b40992
PW
2263 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2264 * already has been registered by the same name; -EINVAL if the
2265 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2266 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2267 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2268 * success.
63c85238
PW
2269 *
2270 * XXX The data should be copied into bootmem, so the original data
2271 * should be marked __initdata and freed after init. This would allow
2272 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2273 * that the copy process would be relatively complex due to the large number
2274 * of substructures.
2275 */
01592df9 2276static int __init _register(struct omap_hwmod *oh)
63c85238 2277{
43b40992
PW
2278 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2279 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2280 return -EINVAL;
2281
63c85238
PW
2282 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2283
ce35b244
BC
2284 if (_lookup(oh->name))
2285 return -EEXIST;
63c85238 2286
63c85238
PW
2287 list_add_tail(&oh->node, &omap_hwmod_list);
2288
2221b5cd
PW
2289 INIT_LIST_HEAD(&oh->master_ports);
2290 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2291 spin_lock_init(&oh->_lock);
2092e5cc 2292
63c85238
PW
2293 oh->_state = _HWMOD_STATE_REGISTERED;
2294
569edd70
PW
2295 /*
2296 * XXX Rather than doing a strcmp(), this should test a flag
2297 * set in the hwmod data, inserted by the autogenerator code.
2298 */
2299 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2300 mpu_oh = oh;
63c85238 2301
569edd70 2302 return 0;
63c85238
PW
2303}
2304
2221b5cd
PW
2305/**
2306 * _alloc_links - return allocated memory for hwmod links
2307 * @ml: pointer to a struct omap_hwmod_link * for the master link
2308 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2309 *
2310 * Return pointers to two struct omap_hwmod_link records, via the
2311 * addresses pointed to by @ml and @sl. Will first attempt to return
2312 * memory allocated as part of a large initial block, but if that has
2313 * been exhausted, will allocate memory itself. Since ideally this
2314 * second allocation path will never occur, the number of these
2315 * 'supplemental' allocations will be logged when debugging is
2316 * enabled. Returns 0.
2317 */
2318static int __init _alloc_links(struct omap_hwmod_link **ml,
2319 struct omap_hwmod_link **sl)
2320{
2321 unsigned int sz;
2322
2323 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2324 *ml = &linkspace[free_ls++];
2325 *sl = &linkspace[free_ls++];
2326 return 0;
2327 }
2328
2329 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2330
2331 *sl = NULL;
2332 *ml = alloc_bootmem(sz);
2333
2334 memset(*ml, 0, sz);
2335
2336 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2337
2338 ls_supp++;
2339 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2340 ls_supp * LINKS_PER_OCP_IF);
2341
2342 return 0;
2343};
2344
2345/**
2346 * _add_link - add an interconnect between two IP blocks
2347 * @oi: pointer to a struct omap_hwmod_ocp_if record
2348 *
2349 * Add struct omap_hwmod_link records connecting the master IP block
2350 * specified in @oi->master to @oi, and connecting the slave IP block
2351 * specified in @oi->slave to @oi. This code is assumed to run before
2352 * preemption or SMP has been enabled, thus avoiding the need for
2353 * locking in this code. Changes to this assumption will require
2354 * additional locking. Returns 0.
2355 */
2356static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2357{
2358 struct omap_hwmod_link *ml, *sl;
2359
2360 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2361 oi->slave->name);
2362
2363 _alloc_links(&ml, &sl);
2364
2365 ml->ocp_if = oi;
2366 INIT_LIST_HEAD(&ml->node);
2367 list_add(&ml->node, &oi->master->master_ports);
2368 oi->master->masters_cnt++;
2369
2370 sl->ocp_if = oi;
2371 INIT_LIST_HEAD(&sl->node);
2372 list_add(&sl->node, &oi->slave->slave_ports);
2373 oi->slave->slaves_cnt++;
2374
2375 return 0;
2376}
2377
2378/**
2379 * _register_link - register a struct omap_hwmod_ocp_if
2380 * @oi: struct omap_hwmod_ocp_if *
2381 *
2382 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2383 * has already been registered; -EINVAL if @oi is NULL or if the
2384 * record pointed to by @oi is missing required fields; or 0 upon
2385 * success.
2386 *
2387 * XXX The data should be copied into bootmem, so the original data
2388 * should be marked __initdata and freed after init. This would allow
2389 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2390 */
2391static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2392{
2393 if (!oi || !oi->master || !oi->slave || !oi->user)
2394 return -EINVAL;
2395
2396 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2397 return -EEXIST;
2398
2399 pr_debug("omap_hwmod: registering link from %s to %s\n",
2400 oi->master->name, oi->slave->name);
2401
2402 /*
2403 * Register the connected hwmods, if they haven't been
2404 * registered already
2405 */
2406 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2407 _register(oi->master);
2408
2409 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2410 _register(oi->slave);
2411
2412 _add_link(oi);
2413
2414 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2415
2416 return 0;
2417}
2418
2419/**
2420 * _alloc_linkspace - allocate large block of hwmod links
2421 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2422 *
2423 * Allocate a large block of struct omap_hwmod_link records. This
2424 * improves boot time significantly by avoiding the need to allocate
2425 * individual records one by one. If the number of records to
2426 * allocate in the block hasn't been manually specified, this function
2427 * will count the number of struct omap_hwmod_ocp_if records in @ois
2428 * and use that to determine the allocation size. For SoC families
2429 * that require multiple list registrations, such as OMAP3xxx, this
2430 * estimation process isn't optimal, so manual estimation is advised
2431 * in those cases. Returns -EEXIST if the allocation has already occurred
2432 * or 0 upon success.
2433 */
2434static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2435{
2436 unsigned int i = 0;
2437 unsigned int sz;
2438
2439 if (linkspace) {
2440 WARN(1, "linkspace already allocated\n");
2441 return -EEXIST;
2442 }
2443
2444 if (max_ls == 0)
2445 while (ois[i++])
2446 max_ls += LINKS_PER_OCP_IF;
2447
2448 sz = sizeof(struct omap_hwmod_link) * max_ls;
2449
2450 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2451 __func__, sz, max_ls);
2452
2453 linkspace = alloc_bootmem(sz);
2454
2455 memset(linkspace, 0, sz);
2456
2457 return 0;
2458}
0102b627
BC
2459
2460/* Public functions */
2461
2462u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2463{
2464 if (oh->flags & HWMOD_16BIT_REG)
2465 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2466 else
2467 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2468}
2469
2470void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2471{
2472 if (oh->flags & HWMOD_16BIT_REG)
2473 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2474 else
2475 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2476}
2477
6d3c55fd
A
2478/**
2479 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2480 * @oh: struct omap_hwmod *
2481 *
2482 * This is a public function exposed to drivers. Some drivers may need to do
2483 * some settings before and after resetting the device. Those drivers after
2484 * doing the necessary settings could use this function to start a reset by
2485 * setting the SYSCONFIG.SOFTRESET bit.
2486 */
2487int omap_hwmod_softreset(struct omap_hwmod *oh)
2488{
3c55c1ba
PW
2489 u32 v;
2490 int ret;
2491
2492 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2493 return -EINVAL;
2494
3c55c1ba
PW
2495 v = oh->_sysc_cache;
2496 ret = _set_softreset(oh, &v);
2497 if (ret)
2498 goto error;
2499 _write_sysconfig(v, oh);
2500
2501error:
2502 return ret;
6d3c55fd
A
2503}
2504
0102b627
BC
2505/**
2506 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2507 * @oh: struct omap_hwmod *
2508 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2509 *
2510 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2511 * local copy. Intended to be used by drivers that have some erratum
2512 * that requires direct manipulation of the SIDLEMODE bits. Returns
2513 * -EINVAL if @oh is null, or passes along the return value from
2514 * _set_slave_idlemode().
2515 *
2516 * XXX Does this function have any current users? If not, we should
2517 * remove it; it is better to let the rest of the hwmod code handle this.
2518 * Any users of this function should be scrutinized carefully.
2519 */
2520int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2521{
2522 u32 v;
2523 int retval = 0;
2524
2525 if (!oh)
2526 return -EINVAL;
2527
2528 v = oh->_sysc_cache;
2529
2530 retval = _set_slave_idlemode(oh, idlemode, &v);
2531 if (!retval)
2532 _write_sysconfig(v, oh);
2533
2534 return retval;
2535}
2536
63c85238
PW
2537/**
2538 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2539 * @name: name of the omap_hwmod to look up
2540 *
2541 * Given a @name of an omap_hwmod, return a pointer to the registered
2542 * struct omap_hwmod *, or NULL upon error.
2543 */
2544struct omap_hwmod *omap_hwmod_lookup(const char *name)
2545{
2546 struct omap_hwmod *oh;
2547
2548 if (!name)
2549 return NULL;
2550
63c85238 2551 oh = _lookup(name);
63c85238
PW
2552
2553 return oh;
2554}
2555
2556/**
2557 * omap_hwmod_for_each - call function for each registered omap_hwmod
2558 * @fn: pointer to a callback function
97d60162 2559 * @data: void * data to pass to callback function
63c85238
PW
2560 *
2561 * Call @fn for each registered omap_hwmod, passing @data to each
2562 * function. @fn must return 0 for success or any other value for
2563 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2564 * will stop and the non-zero return value will be passed to the
2565 * caller of omap_hwmod_for_each(). @fn is called with
2566 * omap_hwmod_for_each() held.
2567 */
97d60162
PW
2568int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2569 void *data)
63c85238
PW
2570{
2571 struct omap_hwmod *temp_oh;
30ebad9d 2572 int ret = 0;
63c85238
PW
2573
2574 if (!fn)
2575 return -EINVAL;
2576
63c85238 2577 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2578 ret = (*fn)(temp_oh, data);
63c85238
PW
2579 if (ret)
2580 break;
2581 }
63c85238
PW
2582
2583 return ret;
2584}
2585
63c85238 2586/**
550c8092 2587 * omap_hwmod_register - register an array of hwmods
63c85238
PW
2588 * @ohs: pointer to an array of omap_hwmods to register
2589 *
2590 * Intended to be called early in boot before the clock framework is
2591 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 2592 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 2593 */
550c8092 2594int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 2595{
bac1a0f0 2596 int r, i;
63c85238 2597
2221b5cd
PW
2598 if (link_registration)
2599 return -EINVAL;
2600
63c85238
PW
2601 if (!ohs)
2602 return 0;
2603
bac1a0f0
PW
2604 i = 0;
2605 do {
bac1a0f0
PW
2606 r = _register(ohs[i]);
2607 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2608 r);
2609 } while (ohs[++i]);
63c85238
PW
2610
2611 return 0;
2612}
2613
2221b5cd
PW
2614/**
2615 * omap_hwmod_register_links - register an array of hwmod links
2616 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2617 *
2618 * Intended to be called early in boot before the clock framework is
2619 * initialized. If @ois is not null, will register all omap_hwmods
2620 * listed in @ois that are valid for this chip. Returns 0.
2621 */
2622int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2623{
2624 int r, i;
2625
2626 if (!ois)
2627 return 0;
2628
2629 link_registration = true;
2630
2631 if (!linkspace) {
2632 if (_alloc_linkspace(ois)) {
2633 pr_err("omap_hwmod: could not allocate link space\n");
2634 return -ENOMEM;
2635 }
2636 }
2637
2638 i = 0;
2639 do {
2640 r = _register_link(ois[i]);
2641 WARN(r && r != -EEXIST,
2642 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
2643 ois[i]->master->name, ois[i]->slave->name, r);
2644 } while (ois[++i]);
2645
2646 return 0;
2647}
2648
381d033a
PW
2649/**
2650 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2651 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2652 *
2653 * If the hwmod data corresponding to the MPU subsystem IP block
2654 * hasn't been initialized and set up yet, do so now. This must be
2655 * done first since sleep dependencies may be added from other hwmods
2656 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2657 * return value.
63c85238 2658 */
381d033a 2659static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 2660{
381d033a
PW
2661 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2662 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2663 __func__, MPU_INITIATOR_NAME);
2664 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2665 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
2666}
2667
63c85238 2668/**
a2debdbd
PW
2669 * omap_hwmod_setup_one - set up a single hwmod
2670 * @oh_name: const char * name of the already-registered hwmod to set up
2671 *
381d033a
PW
2672 * Initialize and set up a single hwmod. Intended to be used for a
2673 * small number of early devices, such as the timer IP blocks used for
2674 * the scheduler clock. Must be called after omap2_clk_init().
2675 * Resolves the struct clk names to struct clk pointers for each
2676 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2677 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
2678 */
2679int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2680{
2681 struct omap_hwmod *oh;
63c85238 2682
a2debdbd
PW
2683 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2684
a2debdbd
PW
2685 oh = _lookup(oh_name);
2686 if (!oh) {
2687 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2688 return -EINVAL;
2689 }
63c85238 2690
381d033a 2691 _ensure_mpu_hwmod_is_setup(oh);
63c85238 2692
381d033a 2693 _init(oh, NULL);
a2debdbd
PW
2694 _setup(oh, NULL);
2695
63c85238
PW
2696 return 0;
2697}
2698
2699/**
381d033a 2700 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 2701 *
381d033a
PW
2702 * Initialize and set up all IP blocks registered with the hwmod code.
2703 * Must be called after omap2_clk_init(). Resolves the struct clk
2704 * names to struct clk pointers for each registered omap_hwmod. Also
2705 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 2706 */
550c8092 2707static int __init omap_hwmod_setup_all(void)
63c85238 2708{
381d033a 2709 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 2710
381d033a 2711 omap_hwmod_for_each(_init, NULL);
2092e5cc 2712 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2713
2714 return 0;
2715}
550c8092 2716core_initcall(omap_hwmod_setup_all);
63c85238 2717
63c85238
PW
2718/**
2719 * omap_hwmod_enable - enable an omap_hwmod
2720 * @oh: struct omap_hwmod *
2721 *
74ff3a68 2722 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2723 * Returns -EINVAL on error or passes along the return value from _enable().
2724 */
2725int omap_hwmod_enable(struct omap_hwmod *oh)
2726{
2727 int r;
dc6d1cda 2728 unsigned long flags;
63c85238
PW
2729
2730 if (!oh)
2731 return -EINVAL;
2732
dc6d1cda
PW
2733 spin_lock_irqsave(&oh->_lock, flags);
2734 r = _enable(oh);
2735 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2736
2737 return r;
2738}
2739
2740/**
2741 * omap_hwmod_idle - idle an omap_hwmod
2742 * @oh: struct omap_hwmod *
2743 *
74ff3a68 2744 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2745 * Returns -EINVAL on error or passes along the return value from _idle().
2746 */
2747int omap_hwmod_idle(struct omap_hwmod *oh)
2748{
dc6d1cda
PW
2749 unsigned long flags;
2750
63c85238
PW
2751 if (!oh)
2752 return -EINVAL;
2753
dc6d1cda
PW
2754 spin_lock_irqsave(&oh->_lock, flags);
2755 _idle(oh);
2756 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2757
2758 return 0;
2759}
2760
2761/**
2762 * omap_hwmod_shutdown - shutdown an omap_hwmod
2763 * @oh: struct omap_hwmod *
2764 *
74ff3a68 2765 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2766 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2767 * the return value from _shutdown().
2768 */
2769int omap_hwmod_shutdown(struct omap_hwmod *oh)
2770{
dc6d1cda
PW
2771 unsigned long flags;
2772
63c85238
PW
2773 if (!oh)
2774 return -EINVAL;
2775
dc6d1cda 2776 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2777 _shutdown(oh);
dc6d1cda 2778 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2779
2780 return 0;
2781}
2782
2783/**
2784 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2785 * @oh: struct omap_hwmod *oh
2786 *
2787 * Intended to be called by the omap_device code.
2788 */
2789int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2790{
dc6d1cda
PW
2791 unsigned long flags;
2792
2793 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2794 _enable_clocks(oh);
dc6d1cda 2795 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2796
2797 return 0;
2798}
2799
2800/**
2801 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2802 * @oh: struct omap_hwmod *oh
2803 *
2804 * Intended to be called by the omap_device code.
2805 */
2806int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2807{
dc6d1cda
PW
2808 unsigned long flags;
2809
2810 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2811 _disable_clocks(oh);
dc6d1cda 2812 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2813
2814 return 0;
2815}
2816
2817/**
2818 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2819 * @oh: struct omap_hwmod *oh
2820 *
2821 * Intended to be called by drivers and core code when all posted
2822 * writes to a device must complete before continuing further
2823 * execution (for example, after clearing some device IRQSTATUS
2824 * register bits)
2825 *
2826 * XXX what about targets with multiple OCP threads?
2827 */
2828void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2829{
2830 BUG_ON(!oh);
2831
43b40992 2832 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2833 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2834 oh->name);
63c85238
PW
2835 return;
2836 }
2837
2838 /*
2839 * Forces posted writes to complete on the OCP thread handling
2840 * register writes
2841 */
cc7a1d2a 2842 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2843}
2844
2845/**
2846 * omap_hwmod_reset - reset the hwmod
2847 * @oh: struct omap_hwmod *
2848 *
2849 * Under some conditions, a driver may wish to reset the entire device.
2850 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2851 * the return value from _reset().
63c85238
PW
2852 */
2853int omap_hwmod_reset(struct omap_hwmod *oh)
2854{
2855 int r;
dc6d1cda 2856 unsigned long flags;
63c85238 2857
9b579114 2858 if (!oh)
63c85238
PW
2859 return -EINVAL;
2860
dc6d1cda 2861 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2862 r = _reset(oh);
dc6d1cda 2863 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2864
2865 return r;
2866}
2867
5e8370f1
PW
2868/*
2869 * IP block data retrieval functions
2870 */
2871
63c85238
PW
2872/**
2873 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2874 * @oh: struct omap_hwmod *
2875 * @res: pointer to the first element of an array of struct resource to fill
2876 *
2877 * Count the number of struct resource array elements necessary to
2878 * contain omap_hwmod @oh resources. Intended to be called by code
2879 * that registers omap_devices. Intended to be used to determine the
2880 * size of a dynamically-allocated struct resource array, before
2881 * calling omap_hwmod_fill_resources(). Returns the number of struct
2882 * resource array elements needed.
2883 *
2884 * XXX This code is not optimized. It could attempt to merge adjacent
2885 * resource IDs.
2886 *
2887 */
2888int omap_hwmod_count_resources(struct omap_hwmod *oh)
2889{
5d95dde7 2890 struct omap_hwmod_ocp_if *os;
2221b5cd 2891 struct list_head *p = NULL;
5d95dde7
PW
2892 int ret;
2893 int i = 0;
63c85238 2894
bc614958 2895 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 2896
2221b5cd
PW
2897 if (link_registration)
2898 p = oh->slave_ports.next;
2899
5d95dde7 2900 while (i < oh->slaves_cnt) {
2221b5cd 2901 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
5d95dde7
PW
2902 ret += _count_ocp_if_addr_spaces(os);
2903 }
63c85238
PW
2904
2905 return ret;
2906}
2907
2908/**
2909 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2910 * @oh: struct omap_hwmod *
2911 * @res: pointer to the first element of an array of struct resource to fill
2912 *
2913 * Fill the struct resource array @res with resource data from the
2914 * omap_hwmod @oh. Intended to be called by code that registers
2915 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2916 * number of array elements filled.
2917 */
2918int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2919{
5d95dde7 2920 struct omap_hwmod_ocp_if *os;
2221b5cd 2921 struct list_head *p = NULL;
5d95dde7 2922 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
2923 int r = 0;
2924
2925 /* For each IRQ, DMA, memory area, fill in array.*/
2926
212738a4
PW
2927 mpu_irqs_cnt = _count_mpu_irqs(oh);
2928 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2929 (res + r)->name = (oh->mpu_irqs + i)->name;
2930 (res + r)->start = (oh->mpu_irqs + i)->irq;
2931 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2932 (res + r)->flags = IORESOURCE_IRQ;
2933 r++;
2934 }
2935
bc614958
PW
2936 sdma_reqs_cnt = _count_sdma_reqs(oh);
2937 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2938 (res + r)->name = (oh->sdma_reqs + i)->name;
2939 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2940 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2941 (res + r)->flags = IORESOURCE_DMA;
2942 r++;
2943 }
2944
2221b5cd
PW
2945 if (link_registration)
2946 p = oh->slave_ports.next;
2947
5d95dde7
PW
2948 i = 0;
2949 while (i < oh->slaves_cnt) {
2221b5cd 2950 os = _fetch_next_ocp_if(&p, oh->slaves, &i);
78183f3f 2951 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2952
78183f3f 2953 for (j = 0; j < addr_cnt; j++) {
cd503802 2954 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2955 (res + r)->start = (os->addr + j)->pa_start;
2956 (res + r)->end = (os->addr + j)->pa_end;
2957 (res + r)->flags = IORESOURCE_MEM;
2958 r++;
2959 }
2960 }
2961
2962 return r;
2963}
2964
5e8370f1
PW
2965/**
2966 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2967 * @oh: struct omap_hwmod * to operate on
2968 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2969 * @name: pointer to the name of the data to fetch (optional)
2970 * @rsrc: pointer to a struct resource, allocated by the caller
2971 *
2972 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2973 * data for the IP block pointed to by @oh. The data will be filled
2974 * into a struct resource record pointed to by @rsrc. The struct
2975 * resource must be allocated by the caller. When @name is non-null,
2976 * the data associated with the matching entry in the IRQ/SDMA/address
2977 * space hwmod data arrays will be returned. If @name is null, the
2978 * first array entry will be returned. Data order is not meaningful
2979 * in hwmod data, so callers are strongly encouraged to use a non-null
2980 * @name whenever possible to avoid unpredictable effects if hwmod
2981 * data is later added that causes data ordering to change. This
2982 * function is only intended for use by OMAP core code. Device
2983 * drivers should not call this function - the appropriate bus-related
2984 * data accessor functions should be used instead. Returns 0 upon
2985 * success or a negative error code upon error.
2986 */
2987int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2988 const char *name, struct resource *rsrc)
2989{
2990 int r;
2991 unsigned int irq, dma;
2992 u32 pa_start, pa_end;
2993
2994 if (!oh || !rsrc)
2995 return -EINVAL;
2996
2997 if (type == IORESOURCE_IRQ) {
2998 r = _get_mpu_irq_by_name(oh, name, &irq);
2999 if (r)
3000 return r;
3001
3002 rsrc->start = irq;
3003 rsrc->end = irq;
3004 } else if (type == IORESOURCE_DMA) {
3005 r = _get_sdma_req_by_name(oh, name, &dma);
3006 if (r)
3007 return r;
3008
3009 rsrc->start = dma;
3010 rsrc->end = dma;
3011 } else if (type == IORESOURCE_MEM) {
3012 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3013 if (r)
3014 return r;
3015
3016 rsrc->start = pa_start;
3017 rsrc->end = pa_end;
3018 } else {
3019 return -EINVAL;
3020 }
3021
3022 rsrc->flags = type;
3023 rsrc->name = name;
3024
3025 return 0;
3026}
3027
63c85238
PW
3028/**
3029 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3030 * @oh: struct omap_hwmod *
3031 *
3032 * Return the powerdomain pointer associated with the OMAP module
3033 * @oh's main clock. If @oh does not have a main clk, return the
3034 * powerdomain associated with the interface clock associated with the
3035 * module's MPU port. (XXX Perhaps this should use the SDMA port
3036 * instead?) Returns NULL on error, or a struct powerdomain * on
3037 * success.
3038 */
3039struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3040{
3041 struct clk *c;
2d6141ba 3042 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3043
3044 if (!oh)
3045 return NULL;
3046
3047 if (oh->_clk) {
3048 c = oh->_clk;
3049 } else {
2d6141ba
PW
3050 oi = _find_mpu_rt_port(oh);
3051 if (!oi)
63c85238 3052 return NULL;
2d6141ba 3053 c = oi->_clk;
63c85238
PW
3054 }
3055
d5647c18
TG
3056 if (!c->clkdm)
3057 return NULL;
3058
63c85238
PW
3059 return c->clkdm->pwrdm.ptr;
3060
3061}
3062
db2a60bf
PW
3063/**
3064 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3065 * @oh: struct omap_hwmod *
3066 *
3067 * Returns the virtual address corresponding to the beginning of the
3068 * module's register target, in the address range that is intended to
3069 * be used by the MPU. Returns the virtual address upon success or NULL
3070 * upon error.
3071 */
3072void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3073{
3074 if (!oh)
3075 return NULL;
3076
3077 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3078 return NULL;
3079
3080 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3081 return NULL;
3082
3083 return oh->_mpu_rt_va;
3084}
3085
63c85238
PW
3086/**
3087 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3088 * @oh: struct omap_hwmod *
3089 * @init_oh: struct omap_hwmod * (initiator)
3090 *
3091 * Add a sleep dependency between the initiator @init_oh and @oh.
3092 * Intended to be called by DSP/Bridge code via platform_data for the
3093 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3094 * code needs to add/del initiator dependencies dynamically
3095 * before/after accessing a device. Returns the return value from
3096 * _add_initiator_dep().
3097 *
3098 * XXX Keep a usecount in the clockdomain code
3099 */
3100int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3101 struct omap_hwmod *init_oh)
3102{
3103 return _add_initiator_dep(oh, init_oh);
3104}
3105
3106/*
3107 * XXX what about functions for drivers to save/restore ocp_sysconfig
3108 * for context save/restore operations?
3109 */
3110
3111/**
3112 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3113 * @oh: struct omap_hwmod *
3114 * @init_oh: struct omap_hwmod * (initiator)
3115 *
3116 * Remove a sleep dependency between the initiator @init_oh and @oh.
3117 * Intended to be called by DSP/Bridge code via platform_data for the
3118 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3119 * code needs to add/del initiator dependencies dynamically
3120 * before/after accessing a device. Returns the return value from
3121 * _del_initiator_dep().
3122 *
3123 * XXX Keep a usecount in the clockdomain code
3124 */
3125int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3126 struct omap_hwmod *init_oh)
3127{
3128 return _del_initiator_dep(oh, init_oh);
3129}
3130
63c85238
PW
3131/**
3132 * omap_hwmod_enable_wakeup - allow device to wake up the system
3133 * @oh: struct omap_hwmod *
3134 *
3135 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3136 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3137 * this IP block if it has dynamic mux entries. Eventually this
3138 * should set PRCM wakeup registers to cause the PRCM to receive
3139 * wakeup events from the module. Does not set any wakeup routing
3140 * registers beyond this point - if the module is to wake up any other
3141 * module or subsystem, that must be set separately. Called by
3142 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3143 */
3144int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3145{
dc6d1cda 3146 unsigned long flags;
5a7ddcbd 3147 u32 v;
dc6d1cda 3148
dc6d1cda 3149 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3150
3151 if (oh->class->sysc &&
3152 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3153 v = oh->_sysc_cache;
3154 _enable_wakeup(oh, &v);
3155 _write_sysconfig(v, oh);
3156 }
3157
eceec009 3158 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3159 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3160
3161 return 0;
3162}
3163
3164/**
3165 * omap_hwmod_disable_wakeup - prevent device from waking the system
3166 * @oh: struct omap_hwmod *
3167 *
3168 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3169 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3170 * events for this IP block if it has dynamic mux entries. Eventually
3171 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3172 * wakeup events from the module. Does not set any wakeup routing
3173 * registers beyond this point - if the module is to wake up any other
3174 * module or subsystem, that must be set separately. Called by
3175 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3176 */
3177int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3178{
dc6d1cda 3179 unsigned long flags;
5a7ddcbd 3180 u32 v;
dc6d1cda 3181
dc6d1cda 3182 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3183
3184 if (oh->class->sysc &&
3185 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3186 v = oh->_sysc_cache;
3187 _disable_wakeup(oh, &v);
3188 _write_sysconfig(v, oh);
3189 }
3190
eceec009 3191 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3192 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3193
3194 return 0;
3195}
43b40992 3196
aee48e3c
PW
3197/**
3198 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3199 * contained in the hwmod module.
3200 * @oh: struct omap_hwmod *
3201 * @name: name of the reset line to lookup and assert
3202 *
3203 * Some IP like dsp, ipu or iva contain processor that require
3204 * an HW reset line to be assert / deassert in order to enable fully
3205 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3206 * yet supported on this OMAP; otherwise, passes along the return value
3207 * from _assert_hardreset().
3208 */
3209int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3210{
3211 int ret;
dc6d1cda 3212 unsigned long flags;
aee48e3c
PW
3213
3214 if (!oh)
3215 return -EINVAL;
3216
dc6d1cda 3217 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3218 ret = _assert_hardreset(oh, name);
dc6d1cda 3219 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3220
3221 return ret;
3222}
3223
3224/**
3225 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3226 * contained in the hwmod module.
3227 * @oh: struct omap_hwmod *
3228 * @name: name of the reset line to look up and deassert
3229 *
3230 * Some IP like dsp, ipu or iva contain processor that require
3231 * an HW reset line to be assert / deassert in order to enable fully
3232 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3233 * yet supported on this OMAP; otherwise, passes along the return value
3234 * from _deassert_hardreset().
3235 */
3236int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3237{
3238 int ret;
dc6d1cda 3239 unsigned long flags;
aee48e3c
PW
3240
3241 if (!oh)
3242 return -EINVAL;
3243
dc6d1cda 3244 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3245 ret = _deassert_hardreset(oh, name);
dc6d1cda 3246 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3247
3248 return ret;
3249}
3250
3251/**
3252 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3253 * contained in the hwmod module
3254 * @oh: struct omap_hwmod *
3255 * @name: name of the reset line to look up and read
3256 *
3257 * Return the current state of the hwmod @oh's reset line named @name:
3258 * returns -EINVAL upon parameter error or if this operation
3259 * is unsupported on the current OMAP; otherwise, passes along the return
3260 * value from _read_hardreset().
3261 */
3262int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3263{
3264 int ret;
dc6d1cda 3265 unsigned long flags;
aee48e3c
PW
3266
3267 if (!oh)
3268 return -EINVAL;
3269
dc6d1cda 3270 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3271 ret = _read_hardreset(oh, name);
dc6d1cda 3272 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3273
3274 return ret;
3275}
3276
3277
43b40992
PW
3278/**
3279 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3280 * @classname: struct omap_hwmod_class name to search for
3281 * @fn: callback function pointer to call for each hwmod in class @classname
3282 * @user: arbitrary context data to pass to the callback function
3283 *
ce35b244
BC
3284 * For each omap_hwmod of class @classname, call @fn.
3285 * If the callback function returns something other than
43b40992
PW
3286 * zero, the iterator is terminated, and the callback function's return
3287 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3288 * if @classname or @fn are NULL, or passes back the error code from @fn.
3289 */
3290int omap_hwmod_for_each_by_class(const char *classname,
3291 int (*fn)(struct omap_hwmod *oh,
3292 void *user),
3293 void *user)
3294{
3295 struct omap_hwmod *temp_oh;
3296 int ret = 0;
3297
3298 if (!classname || !fn)
3299 return -EINVAL;
3300
3301 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3302 __func__, classname);
3303
43b40992
PW
3304 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3305 if (!strcmp(temp_oh->class->name, classname)) {
3306 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3307 __func__, temp_oh->name);
3308 ret = (*fn)(temp_oh, user);
3309 if (ret)
3310 break;
3311 }
3312 }
3313
43b40992
PW
3314 if (ret)
3315 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3316 __func__, ret);
3317
3318 return ret;
3319}
3320
2092e5cc
PW
3321/**
3322 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3323 * @oh: struct omap_hwmod *
3324 * @state: state that _setup() should leave the hwmod in
3325 *
550c8092 3326 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3327 * (called by omap_hwmod_setup_*()). See also the documentation
3328 * for _setup_postsetup(), above. Returns 0 upon success or
3329 * -EINVAL if there is a problem with the arguments or if the hwmod is
3330 * in the wrong state.
2092e5cc
PW
3331 */
3332int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3333{
3334 int ret;
dc6d1cda 3335 unsigned long flags;
2092e5cc
PW
3336
3337 if (!oh)
3338 return -EINVAL;
3339
3340 if (state != _HWMOD_STATE_DISABLED &&
3341 state != _HWMOD_STATE_ENABLED &&
3342 state != _HWMOD_STATE_IDLE)
3343 return -EINVAL;
3344
dc6d1cda 3345 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3346
3347 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3348 ret = -EINVAL;
3349 goto ohsps_unlock;
3350 }
3351
3352 oh->_postsetup_state = state;
3353 ret = 0;
3354
3355ohsps_unlock:
dc6d1cda 3356 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3357
3358 return ret;
3359}
c80705aa
KH
3360
3361/**
3362 * omap_hwmod_get_context_loss_count - get lost context count
3363 * @oh: struct omap_hwmod *
3364 *
3365 * Query the powerdomain of of @oh to get the context loss
3366 * count for this device.
3367 *
3368 * Returns the context loss count of the powerdomain assocated with @oh
3369 * upon success, or zero if no powerdomain exists for @oh.
3370 */
fc013873 3371int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3372{
3373 struct powerdomain *pwrdm;
3374 int ret = 0;
3375
3376 pwrdm = omap_hwmod_get_pwrdm(oh);
3377 if (pwrdm)
3378 ret = pwrdm_get_context_loss_count(pwrdm);
3379
3380 return ret;
3381}
43b01643
PW
3382
3383/**
3384 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3385 * @oh: struct omap_hwmod *
3386 *
3387 * Prevent the hwmod @oh from being reset during the setup process.
3388 * Intended for use by board-*.c files on boards with devices that
3389 * cannot tolerate being reset. Must be called before the hwmod has
3390 * been set up. Returns 0 upon success or negative error code upon
3391 * failure.
3392 */
3393int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3394{
3395 if (!oh)
3396 return -EINVAL;
3397
3398 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3399 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3400 oh->name);
3401 return -EINVAL;
3402 }
3403
3404 oh->flags |= HWMOD_INIT_NO_RESET;
3405
3406 return 0;
3407}
abc2d545
TK
3408
3409/**
3410 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3411 * @oh: struct omap_hwmod * containing hwmod mux entries
3412 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3413 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3414 *
3415 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3416 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3417 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3418 * this function is not called for a given pad_idx, then the ISR
3419 * associated with @oh's first MPU IRQ will be triggered when an I/O
3420 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3421 * the _dynamic or wakeup_ entry: if there are other entries not
3422 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3423 * entries are NOT COUNTED in the dynamic pad index. This function
3424 * must be called separately for each pad that requires its interrupt
3425 * to be re-routed this way. Returns -EINVAL if there is an argument
3426 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3427 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3428 *
3429 * XXX This function interface is fragile. Rather than using array
3430 * indexes, which are subject to unpredictable change, it should be
3431 * using hwmod IRQ names, and some other stable key for the hwmod mux
3432 * pad records.
3433 */
3434int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3435{
3436 int nr_irqs;
3437
3438 might_sleep();
3439
3440 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3441 pad_idx >= oh->mux->nr_pads_dynamic)
3442 return -EINVAL;
3443
3444 /* Check the number of available mpu_irqs */
3445 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3446 ;
3447
3448 if (irq_idx >= nr_irqs)
3449 return -EINVAL;
3450
3451 if (!oh->mux->irqs) {
3452 /* XXX What frees this? */
3453 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3454 GFP_KERNEL);
3455 if (!oh->mux->irqs)
3456 return -ENOMEM;
3457 }
3458 oh->mux->irqs[pad_idx] = irq_idx;
3459
3460 return 0;
3461}