ARM: OMAP2+: CM: add common API for cm_wait_module_ready
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
63c85238
PW
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
4788da26
PW
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
63c85238
PW
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
74ff3a68
PW
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
74ff3a68
PW
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
edfaf05c 75 * | ({read,write}l_relaxed, clk*) |
74ff3a68
PW
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
63c85238
PW
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
63c85238
PW
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
f5dd3bb5 133#include <linux/clk-provider.h>
63c85238
PW
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
f7b861b7 141#include <linux/cpu.h>
079abade
SS
142#include <linux/of.h>
143#include <linux/of_address.h>
63c85238 144
fa200222
PW
145#include <asm/system_misc.h>
146
a135eaae 147#include "clock.h"
2a296c8f 148#include "omap_hwmod.h"
63c85238 149
dbc04161
TL
150#include "soc.h"
151#include "common.h"
152#include "clockdomain.h"
153#include "powerdomain.h"
ff4ae5d9
PW
154#include "cm2xxx.h"
155#include "cm3xxx.h"
d0f0631d 156#include "cminst44xx.h"
1688bf19 157#include "cm33xx.h"
b13159af 158#include "prm.h"
139563ad 159#include "prm3xxx.h"
d198b514 160#include "prm44xx.h"
1688bf19 161#include "prm33xx.h"
eaac329d 162#include "prminst44xx.h"
8d9af88f 163#include "mux.h"
5165882a 164#include "pm.h"
63c85238 165
63c85238 166/* Name of the OMAP hwmod for the MPU */
5c2c0296 167#define MPU_INITIATOR_NAME "mpu"
63c85238 168
2221b5cd
PW
169/*
170 * Number of struct omap_hwmod_link records per struct
171 * omap_hwmod_ocp_if record (master->slave and slave->master)
172 */
173#define LINKS_PER_OCP_IF 2
174
9ebfd285
KH
175/**
176 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
177 * @enable_module: function to enable a module (via MODULEMODE)
178 * @disable_module: function to disable a module (via MODULEMODE)
179 *
180 * XXX Eventually this functionality will be hidden inside the PRM/CM
181 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
182 * conditionals in this code.
183 */
184struct omap_hwmod_soc_ops {
185 void (*enable_module)(struct omap_hwmod *oh);
186 int (*disable_module)(struct omap_hwmod *oh);
8f6aa8ee 187 int (*wait_target_ready)(struct omap_hwmod *oh);
b8249cf2
KH
188 int (*assert_hardreset)(struct omap_hwmod *oh,
189 struct omap_hwmod_rst_info *ohri);
190 int (*deassert_hardreset)(struct omap_hwmod *oh,
191 struct omap_hwmod_rst_info *ohri);
192 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
193 struct omap_hwmod_rst_info *ohri);
0a179eaa 194 int (*init_clkdm)(struct omap_hwmod *oh);
e6d3a8b0
RN
195 void (*update_context_lost)(struct omap_hwmod *oh);
196 int (*get_context_lost)(struct omap_hwmod *oh);
9ebfd285
KH
197};
198
199/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
200static struct omap_hwmod_soc_ops soc_ops;
201
63c85238
PW
202/* omap_hwmod_list contains all registered struct omap_hwmods */
203static LIST_HEAD(omap_hwmod_list);
204
63c85238
PW
205/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
206static struct omap_hwmod *mpu_oh;
207
5165882a
VB
208/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
209static DEFINE_SPINLOCK(io_chain_lock);
210
2221b5cd
PW
211/*
212 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
213 * allocated from - used to reduce the number of small memory
214 * allocations, which has a significant impact on performance
215 */
216static struct omap_hwmod_link *linkspace;
217
218/*
219 * free_ls, max_ls: array indexes into linkspace; representing the
220 * next free struct omap_hwmod_link index, and the maximum number of
221 * struct omap_hwmod_link records allocated (respectively)
222 */
223static unsigned short free_ls, max_ls, ls_supp;
63c85238 224
9ebfd285
KH
225/* inited: set to true once the hwmod code is initialized */
226static bool inited;
227
63c85238
PW
228/* Private functions */
229
5d95dde7 230/**
11cd4b94 231 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 232 * @p: ptr to a ptr to the list_head inside the ocp_if to return
11cd4b94
PW
233 * @i: pointer to the index of the element pointed to by @p in the list
234 *
235 * Return a pointer to the struct omap_hwmod_ocp_if record
236 * containing the struct list_head pointed to by @p, and increment
237 * @p such that a future call to this routine will return the next
238 * record.
5d95dde7
PW
239 */
240static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
5d95dde7
PW
241 int *i)
242{
243 struct omap_hwmod_ocp_if *oi;
244
11cd4b94
PW
245 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
246 *p = (*p)->next;
2221b5cd 247
5d95dde7
PW
248 *i = *i + 1;
249
250 return oi;
251}
252
63c85238
PW
253/**
254 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
255 * @oh: struct omap_hwmod *
256 *
257 * Load the current value of the hwmod OCP_SYSCONFIG register into the
258 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
259 * OCP_SYSCONFIG register or 0 upon success.
260 */
261static int _update_sysc_cache(struct omap_hwmod *oh)
262{
43b40992
PW
263 if (!oh->class->sysc) {
264 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
63c85238
PW
265 return -EINVAL;
266 }
267
268 /* XXX ensure module interface clock is up */
269
cc7a1d2a 270 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 271
43b40992 272 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 273 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
63c85238
PW
274
275 return 0;
276}
277
278/**
279 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
280 * @v: OCP_SYSCONFIG value to write
281 * @oh: struct omap_hwmod *
282 *
43b40992
PW
283 * Write @v into the module class' OCP_SYSCONFIG register, if it has
284 * one. No return value.
63c85238
PW
285 */
286static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
287{
43b40992
PW
288 if (!oh->class->sysc) {
289 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
63c85238
PW
290 return;
291 }
292
293 /* XXX ensure module interface clock is up */
294
233cbe5b
RN
295 /* Module might have lost context, always update cache and register */
296 oh->_sysc_cache = v;
297 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
63c85238
PW
298}
299
300/**
301 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
302 * @oh: struct omap_hwmod *
303 * @standbymode: MIDLEMODE field bits
304 * @v: pointer to register contents to modify
305 *
306 * Update the master standby mode bits in @v to be @standbymode for
307 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
308 * upon error or 0 upon success.
309 */
310static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
311 u32 *v)
312{
358f0e63
TG
313 u32 mstandby_mask;
314 u8 mstandby_shift;
315
43b40992
PW
316 if (!oh->class->sysc ||
317 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
63c85238
PW
318 return -EINVAL;
319
43b40992
PW
320 if (!oh->class->sysc->sysc_fields) {
321 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
322 return -EINVAL;
323 }
324
43b40992 325 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
358f0e63
TG
326 mstandby_mask = (0x3 << mstandby_shift);
327
328 *v &= ~mstandby_mask;
329 *v |= __ffs(standbymode) << mstandby_shift;
63c85238
PW
330
331 return 0;
332}
333
334/**
335 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
336 * @oh: struct omap_hwmod *
337 * @idlemode: SIDLEMODE field bits
338 * @v: pointer to register contents to modify
339 *
340 * Update the slave idle mode bits in @v to be @idlemode for the @oh
341 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
342 * or 0 upon success.
343 */
344static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
345{
358f0e63
TG
346 u32 sidle_mask;
347 u8 sidle_shift;
348
43b40992
PW
349 if (!oh->class->sysc ||
350 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
63c85238
PW
351 return -EINVAL;
352
43b40992
PW
353 if (!oh->class->sysc->sysc_fields) {
354 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
355 return -EINVAL;
356 }
357
43b40992 358 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
358f0e63
TG
359 sidle_mask = (0x3 << sidle_shift);
360
361 *v &= ~sidle_mask;
362 *v |= __ffs(idlemode) << sidle_shift;
63c85238
PW
363
364 return 0;
365}
366
367/**
368 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
369 * @oh: struct omap_hwmod *
370 * @clockact: CLOCKACTIVITY field bits
371 * @v: pointer to register contents to modify
372 *
373 * Update the clockactivity mode bits in @v to be @clockact for the
374 * @oh hwmod. Used for additional powersaving on some modules. Does
375 * not write to the hardware. Returns -EINVAL upon error or 0 upon
376 * success.
377 */
378static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
379{
358f0e63
TG
380 u32 clkact_mask;
381 u8 clkact_shift;
382
43b40992
PW
383 if (!oh->class->sysc ||
384 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
63c85238
PW
385 return -EINVAL;
386
43b40992
PW
387 if (!oh->class->sysc->sysc_fields) {
388 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
389 return -EINVAL;
390 }
391
43b40992 392 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
TG
393 clkact_mask = (0x3 << clkact_shift);
394
395 *v &= ~clkact_mask;
396 *v |= clockact << clkact_shift;
63c85238
PW
397
398 return 0;
399}
400
401/**
313a76ee 402 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
63c85238
PW
403 * @oh: struct omap_hwmod *
404 * @v: pointer to register contents to modify
405 *
406 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
407 * error or 0 upon success.
408 */
409static int _set_softreset(struct omap_hwmod *oh, u32 *v)
410{
358f0e63
TG
411 u32 softrst_mask;
412
43b40992
PW
413 if (!oh->class->sysc ||
414 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
415 return -EINVAL;
416
43b40992
PW
417 if (!oh->class->sysc->sysc_fields) {
418 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
419 return -EINVAL;
420 }
421
43b40992 422 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
423
424 *v |= softrst_mask;
63c85238
PW
425
426 return 0;
427}
428
313a76ee
RQ
429/**
430 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
431 * @oh: struct omap_hwmod *
432 * @v: pointer to register contents to modify
433 *
434 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
435 * error or 0 upon success.
436 */
437static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
438{
439 u32 softrst_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1,
447 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
448 oh->name);
449 return -EINVAL;
450 }
451
452 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
453
454 *v &= ~softrst_mask;
455
456 return 0;
457}
458
613ad0e9
TK
459/**
460 * _wait_softreset_complete - wait for an OCP softreset to complete
461 * @oh: struct omap_hwmod * to wait on
462 *
463 * Wait until the IP block represented by @oh reports that its OCP
464 * softreset is complete. This can be triggered by software (see
465 * _ocp_softreset()) or by hardware upon returning from off-mode (one
466 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
467 * microseconds. Returns the number of microseconds waited.
468 */
469static int _wait_softreset_complete(struct omap_hwmod *oh)
470{
471 struct omap_hwmod_class_sysconfig *sysc;
472 u32 softrst_mask;
473 int c = 0;
474
475 sysc = oh->class->sysc;
476
477 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
478 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
479 & SYSS_RESETDONE_MASK),
480 MAX_MODULE_SOFTRESET_WAIT, c);
481 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
482 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
483 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
484 & softrst_mask),
485 MAX_MODULE_SOFTRESET_WAIT, c);
486 }
487
488 return c;
489}
490
6668546f
KVA
491/**
492 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
493 * @oh: struct omap_hwmod *
494 *
495 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
496 * of some modules. When the DMA must perform read/write accesses, the
497 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
498 * for power management, software must set the DMADISABLE bit back to 1.
499 *
500 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
501 * error or 0 upon success.
502 */
503static int _set_dmadisable(struct omap_hwmod *oh)
504{
505 u32 v;
506 u32 dmadisable_mask;
507
508 if (!oh->class->sysc ||
509 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
510 return -EINVAL;
511
512 if (!oh->class->sysc->sysc_fields) {
513 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
514 return -EINVAL;
515 }
516
517 /* clocks must be on for this operation */
518 if (oh->_state != _HWMOD_STATE_ENABLED) {
519 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
520 return -EINVAL;
521 }
522
523 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
524
525 v = oh->_sysc_cache;
526 dmadisable_mask =
527 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
528 v |= dmadisable_mask;
529 _write_sysconfig(v, oh);
530
531 return 0;
532}
533
726072e5
PW
534/**
535 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
536 * @oh: struct omap_hwmod *
537 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
538 * @v: pointer to register contents to modify
539 *
540 * Update the module autoidle bit in @v to be @autoidle for the @oh
541 * hwmod. The autoidle bit controls whether the module can gate
542 * internal clocks automatically when it isn't doing anything; the
543 * exact function of this bit varies on a per-module basis. This
544 * function does not write to the hardware. Returns -EINVAL upon
545 * error or 0 upon success.
546 */
547static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
548 u32 *v)
549{
358f0e63
TG
550 u32 autoidle_mask;
551 u8 autoidle_shift;
552
43b40992
PW
553 if (!oh->class->sysc ||
554 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
PW
555 return -EINVAL;
556
43b40992
PW
557 if (!oh->class->sysc->sysc_fields) {
558 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
559 return -EINVAL;
560 }
561
43b40992 562 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 563 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
564
565 *v &= ~autoidle_mask;
566 *v |= autoidle << autoidle_shift;
726072e5
PW
567
568 return 0;
569}
570
eceec009
G
571/**
572 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
573 * @oh: struct omap_hwmod *
574 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
575 *
576 * Set or clear the I/O pad wakeup flag in the mux entries for the
577 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
578 * in memory. If the hwmod is currently idled, and the new idle
579 * values don't match the previous ones, this function will also
580 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
581 * currently idled, this function won't touch the hardware: the new
582 * mux settings are written to the SCM PADCTRL registers when the
583 * hwmod is idled. No return value.
584 */
585static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
586{
587 struct omap_device_pad *pad;
588 bool change = false;
589 u16 prev_idle;
590 int j;
591
592 if (!oh->mux || !oh->mux->enabled)
593 return;
594
595 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
596 pad = oh->mux->pads_dynamic[j];
597
598 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
599 continue;
600
601 prev_idle = pad->idle;
602
603 if (set_wake)
604 pad->idle |= OMAP_WAKEUP_EN;
605 else
606 pad->idle &= ~OMAP_WAKEUP_EN;
607
608 if (prev_idle != pad->idle)
609 change = true;
610 }
611
612 if (change && oh->_state == _HWMOD_STATE_IDLE)
613 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
614}
615
63c85238
PW
616/**
617 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
618 * @oh: struct omap_hwmod *
619 *
620 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
621 * upon error or 0 upon success.
622 */
5a7ddcbd 623static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 624{
43b40992 625 if (!oh->class->sysc ||
86009eb3 626 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
627 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
628 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
629 return -EINVAL;
630
43b40992
PW
631 if (!oh->class->sysc->sysc_fields) {
632 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
633 return -EINVAL;
634 }
635
1fe74113
BC
636 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
637 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 638
86009eb3
BC
639 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
640 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
641 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
642 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 643
63c85238
PW
644 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
645
63c85238
PW
646 return 0;
647}
648
649/**
650 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
651 * @oh: struct omap_hwmod *
652 *
653 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
654 * upon error or 0 upon success.
655 */
5a7ddcbd 656static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 657{
43b40992 658 if (!oh->class->sysc ||
86009eb3 659 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
660 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
661 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
662 return -EINVAL;
663
43b40992
PW
664 if (!oh->class->sysc->sysc_fields) {
665 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
666 return -EINVAL;
667 }
668
1fe74113
BC
669 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
670 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 671
86009eb3
BC
672 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
673 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 674 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 675 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 676
63c85238
PW
677 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
678
63c85238
PW
679 return 0;
680}
681
f5dd3bb5
RN
682static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
683{
c4a1ea2c
RN
684 struct clk_hw_omap *clk;
685
f5dd3bb5
RN
686 if (oh->clkdm) {
687 return oh->clkdm;
688 } else if (oh->_clk) {
924f9498
TK
689 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
690 return NULL;
f5dd3bb5
RN
691 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
692 return clk->clkdm;
f5dd3bb5
RN
693 }
694 return NULL;
695}
696
63c85238
PW
697/**
698 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
699 * @oh: struct omap_hwmod *
700 *
701 * Prevent the hardware module @oh from entering idle while the
702 * hardare module initiator @init_oh is active. Useful when a module
703 * will be accessed by a particular initiator (e.g., if a module will
704 * be accessed by the IVA, there should be a sleepdep between the IVA
705 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
706 * mode. If the clockdomain is marked as not needing autodeps, return
707 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
708 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
709 */
710static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
711{
f5dd3bb5
RN
712 struct clockdomain *clkdm, *init_clkdm;
713
714 clkdm = _get_clkdm(oh);
715 init_clkdm = _get_clkdm(init_oh);
716
717 if (!clkdm || !init_clkdm)
63c85238
PW
718 return -EINVAL;
719
f5dd3bb5 720 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
570b54c7
PW
721 return 0;
722
f5dd3bb5 723 return clkdm_add_sleepdep(clkdm, init_clkdm);
63c85238
PW
724}
725
726/**
727 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
728 * @oh: struct omap_hwmod *
729 *
730 * Allow the hardware module @oh to enter idle while the hardare
731 * module initiator @init_oh is active. Useful when a module will not
732 * be accessed by a particular initiator (e.g., if a module will not
733 * be accessed by the IVA, there should be no sleepdep between the IVA
734 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
735 * mode. If the clockdomain is marked as not needing autodeps, return
736 * 0 without doing anything. Returns -EINVAL upon error or passes
737 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
738 */
739static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
740{
f5dd3bb5
RN
741 struct clockdomain *clkdm, *init_clkdm;
742
743 clkdm = _get_clkdm(oh);
744 init_clkdm = _get_clkdm(init_oh);
745
746 if (!clkdm || !init_clkdm)
63c85238
PW
747 return -EINVAL;
748
f5dd3bb5 749 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
570b54c7
PW
750 return 0;
751
f5dd3bb5 752 return clkdm_del_sleepdep(clkdm, init_clkdm);
63c85238
PW
753}
754
755/**
756 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
757 * @oh: struct omap_hwmod *
758 *
759 * Called from _init_clocks(). Populates the @oh _clk (main
760 * functional clock pointer) if a main_clk is present. Returns 0 on
761 * success or -EINVAL on error.
762 */
763static int _init_main_clk(struct omap_hwmod *oh)
764{
63c85238
PW
765 int ret = 0;
766
50ebdac2 767 if (!oh->main_clk)
63c85238
PW
768 return 0;
769
6ea74cb9
RN
770 oh->_clk = clk_get(NULL, oh->main_clk);
771 if (IS_ERR(oh->_clk)) {
3d0cb73e
JP
772 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
773 oh->name, oh->main_clk);
63403384 774 return -EINVAL;
dc75925d 775 }
4d7cb45e
RN
776 /*
777 * HACK: This needs a re-visit once clk_prepare() is implemented
778 * to do something meaningful. Today its just a no-op.
779 * If clk_prepare() is used at some point to do things like
780 * voltage scaling etc, then this would have to be moved to
781 * some point where subsystems like i2c and pmic become
782 * available.
783 */
784 clk_prepare(oh->_clk);
63c85238 785
f5dd3bb5 786 if (!_get_clkdm(oh))
3bb05dbf 787 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
5dcc3b97 788 oh->name, oh->main_clk);
81d7c6ff 789
63c85238
PW
790 return ret;
791}
792
793/**
887adeac 794 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
795 * @oh: struct omap_hwmod *
796 *
797 * Called from _init_clocks(). Populates the @oh OCP slave interface
798 * clock pointers. Returns 0 on success or -EINVAL on error.
799 */
800static int _init_interface_clks(struct omap_hwmod *oh)
801{
5d95dde7 802 struct omap_hwmod_ocp_if *os;
11cd4b94 803 struct list_head *p;
63c85238 804 struct clk *c;
5d95dde7 805 int i = 0;
63c85238
PW
806 int ret = 0;
807
11cd4b94 808 p = oh->slave_ports.next;
2221b5cd 809
5d95dde7 810 while (i < oh->slaves_cnt) {
11cd4b94 811 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 812 if (!os->clk)
63c85238
PW
813 continue;
814
6ea74cb9
RN
815 c = clk_get(NULL, os->clk);
816 if (IS_ERR(c)) {
3d0cb73e
JP
817 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
818 oh->name, os->clk);
63c85238 819 ret = -EINVAL;
0e7dc862 820 continue;
dc75925d 821 }
63c85238 822 os->_clk = c;
4d7cb45e
RN
823 /*
824 * HACK: This needs a re-visit once clk_prepare() is implemented
825 * to do something meaningful. Today its just a no-op.
826 * If clk_prepare() is used at some point to do things like
827 * voltage scaling etc, then this would have to be moved to
828 * some point where subsystems like i2c and pmic become
829 * available.
830 */
831 clk_prepare(os->_clk);
63c85238
PW
832 }
833
834 return ret;
835}
836
837/**
838 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
839 * @oh: struct omap_hwmod *
840 *
841 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
842 * clock pointers. Returns 0 on success or -EINVAL on error.
843 */
844static int _init_opt_clks(struct omap_hwmod *oh)
845{
846 struct omap_hwmod_opt_clk *oc;
847 struct clk *c;
848 int i;
849 int ret = 0;
850
851 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
6ea74cb9
RN
852 c = clk_get(NULL, oc->clk);
853 if (IS_ERR(c)) {
3d0cb73e
JP
854 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
855 oh->name, oc->clk);
63c85238 856 ret = -EINVAL;
0e7dc862 857 continue;
dc75925d 858 }
63c85238 859 oc->_clk = c;
4d7cb45e
RN
860 /*
861 * HACK: This needs a re-visit once clk_prepare() is implemented
862 * to do something meaningful. Today its just a no-op.
863 * If clk_prepare() is used at some point to do things like
864 * voltage scaling etc, then this would have to be moved to
865 * some point where subsystems like i2c and pmic become
866 * available.
867 */
868 clk_prepare(oc->_clk);
63c85238
PW
869 }
870
871 return ret;
872}
873
874/**
875 * _enable_clocks - enable hwmod main clock and interface clocks
876 * @oh: struct omap_hwmod *
877 *
878 * Enables all clocks necessary for register reads and writes to succeed
879 * on the hwmod @oh. Returns 0.
880 */
881static int _enable_clocks(struct omap_hwmod *oh)
882{
5d95dde7 883 struct omap_hwmod_ocp_if *os;
11cd4b94 884 struct list_head *p;
5d95dde7 885 int i = 0;
63c85238
PW
886
887 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
888
4d3ae5a9 889 if (oh->_clk)
63c85238
PW
890 clk_enable(oh->_clk);
891
11cd4b94 892 p = oh->slave_ports.next;
2221b5cd 893
5d95dde7 894 while (i < oh->slaves_cnt) {
11cd4b94 895 os = _fetch_next_ocp_if(&p, &i);
63c85238 896
5d95dde7
PW
897 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
898 clk_enable(os->_clk);
63c85238
PW
899 }
900
901 /* The opt clocks are controlled by the device driver. */
902
903 return 0;
904}
905
906/**
907 * _disable_clocks - disable hwmod main clock and interface clocks
908 * @oh: struct omap_hwmod *
909 *
910 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
911 */
912static int _disable_clocks(struct omap_hwmod *oh)
913{
5d95dde7 914 struct omap_hwmod_ocp_if *os;
11cd4b94 915 struct list_head *p;
5d95dde7 916 int i = 0;
63c85238
PW
917
918 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
919
4d3ae5a9 920 if (oh->_clk)
63c85238
PW
921 clk_disable(oh->_clk);
922
11cd4b94 923 p = oh->slave_ports.next;
2221b5cd 924
5d95dde7 925 while (i < oh->slaves_cnt) {
11cd4b94 926 os = _fetch_next_ocp_if(&p, &i);
63c85238 927
5d95dde7
PW
928 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
929 clk_disable(os->_clk);
63c85238
PW
930 }
931
932 /* The opt clocks are controlled by the device driver. */
933
934 return 0;
935}
936
96835af9
BC
937static void _enable_optional_clocks(struct omap_hwmod *oh)
938{
939 struct omap_hwmod_opt_clk *oc;
940 int i;
941
942 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
943
944 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
945 if (oc->_clk) {
946 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
5dcc3b97 947 __clk_get_name(oc->_clk));
96835af9
BC
948 clk_enable(oc->_clk);
949 }
950}
951
952static void _disable_optional_clocks(struct omap_hwmod *oh)
953{
954 struct omap_hwmod_opt_clk *oc;
955 int i;
956
957 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
958
959 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
960 if (oc->_clk) {
961 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
5dcc3b97 962 __clk_get_name(oc->_clk));
96835af9
BC
963 clk_disable(oc->_clk);
964 }
965}
966
45c38252 967/**
3d9f0327 968 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
969 * @oh: struct omap_hwmod *
970 *
971 * Enables the PRCM module mode related to the hwmod @oh.
972 * No return value.
973 */
3d9f0327 974static void _omap4_enable_module(struct omap_hwmod *oh)
45c38252 975{
45c38252
BC
976 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
977 return;
978
3d9f0327
KH
979 pr_debug("omap_hwmod: %s: %s: %d\n",
980 oh->name, __func__, oh->prcm.omap4.modulemode);
45c38252
BC
981
982 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
983 oh->clkdm->prcm_partition,
984 oh->clkdm->cm_inst,
985 oh->clkdm->clkdm_offs,
986 oh->prcm.omap4.clkctrl_offs);
987}
988
1688bf19
VH
989/**
990 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
991 * @oh: struct omap_hwmod *
992 *
993 * Enables the PRCM module mode related to the hwmod @oh.
994 * No return value.
995 */
996static void _am33xx_enable_module(struct omap_hwmod *oh)
997{
998 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
999 return;
1000
1001 pr_debug("omap_hwmod: %s: %s: %d\n",
1002 oh->name, __func__, oh->prcm.omap4.modulemode);
1003
1004 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
1005 oh->clkdm->clkdm_offs,
1006 oh->prcm.omap4.clkctrl_offs);
1007}
1008
45c38252 1009/**
bfc141e3
BC
1010 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1011 * @oh: struct omap_hwmod *
1012 *
1013 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1014 * does not have an IDLEST bit or if the module successfully enters
1015 * slave idle; otherwise, pass along the return value of the
1016 * appropriate *_cm*_wait_module_idle() function.
1017 */
1018static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1019{
2b026d13 1020 if (!oh)
bfc141e3
BC
1021 return -EINVAL;
1022
2b026d13 1023 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
bfc141e3
BC
1024 return 0;
1025
1026 if (oh->flags & HWMOD_NO_IDLEST)
1027 return 0;
1028
1029 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1030 oh->clkdm->cm_inst,
bfc141e3
BC
1031 oh->prcm.omap4.clkctrl_offs);
1032}
1033
1688bf19
VH
1034/**
1035 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
1036 * @oh: struct omap_hwmod *
1037 *
1038 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1039 * does not have an IDLEST bit or if the module successfully enters
1040 * slave idle; otherwise, pass along the return value of the
1041 * appropriate *_cm*_wait_module_idle() function.
1042 */
1043static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
1044{
1045 if (!oh)
1046 return -EINVAL;
1047
1048 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1049 return 0;
1050
1051 if (oh->flags & HWMOD_NO_IDLEST)
1052 return 0;
1053
1054 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
1688bf19
VH
1055 oh->prcm.omap4.clkctrl_offs);
1056}
1057
212738a4
PW
1058/**
1059 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1060 * @oh: struct omap_hwmod *oh
1061 *
1062 * Count and return the number of MPU IRQs associated with the hwmod
1063 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1064 * NULL.
1065 */
1066static int _count_mpu_irqs(struct omap_hwmod *oh)
1067{
1068 struct omap_hwmod_irq_info *ohii;
1069 int i = 0;
1070
1071 if (!oh || !oh->mpu_irqs)
1072 return 0;
1073
1074 do {
1075 ohii = &oh->mpu_irqs[i++];
1076 } while (ohii->irq != -1);
1077
cc1b0765 1078 return i-1;
212738a4
PW
1079}
1080
bc614958
PW
1081/**
1082 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1083 * @oh: struct omap_hwmod *oh
1084 *
1085 * Count and return the number of SDMA request lines associated with
1086 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1087 * if @oh is NULL.
1088 */
1089static int _count_sdma_reqs(struct omap_hwmod *oh)
1090{
1091 struct omap_hwmod_dma_info *ohdi;
1092 int i = 0;
1093
1094 if (!oh || !oh->sdma_reqs)
1095 return 0;
1096
1097 do {
1098 ohdi = &oh->sdma_reqs[i++];
1099 } while (ohdi->dma_req != -1);
1100
cc1b0765 1101 return i-1;
bc614958
PW
1102}
1103
78183f3f
PW
1104/**
1105 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1106 * @oh: struct omap_hwmod *oh
1107 *
1108 * Count and return the number of address space ranges associated with
1109 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1110 * if @oh is NULL.
1111 */
1112static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1113{
1114 struct omap_hwmod_addr_space *mem;
1115 int i = 0;
1116
1117 if (!os || !os->addr)
1118 return 0;
1119
1120 do {
1121 mem = &os->addr[i++];
1122 } while (mem->pa_start != mem->pa_end);
1123
cc1b0765 1124 return i-1;
78183f3f
PW
1125}
1126
5e8370f1
PW
1127/**
1128 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1129 * @oh: struct omap_hwmod * to operate on
1130 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1131 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1132 *
1133 * Retrieve a MPU hardware IRQ line number named by @name associated
1134 * with the IP block pointed to by @oh. The IRQ number will be filled
1135 * into the address pointed to by @dma. When @name is non-null, the
1136 * IRQ line number associated with the named entry will be returned.
1137 * If @name is null, the first matching entry will be returned. Data
1138 * order is not meaningful in hwmod data, so callers are strongly
1139 * encouraged to use a non-null @name whenever possible to avoid
1140 * unpredictable effects if hwmod data is later added that causes data
1141 * ordering to change. Returns 0 upon success or a negative error
1142 * code upon error.
1143 */
1144static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1145 unsigned int *irq)
1146{
1147 int i;
1148 bool found = false;
1149
1150 if (!oh->mpu_irqs)
1151 return -ENOENT;
1152
1153 i = 0;
1154 while (oh->mpu_irqs[i].irq != -1) {
1155 if (name == oh->mpu_irqs[i].name ||
1156 !strcmp(name, oh->mpu_irqs[i].name)) {
1157 found = true;
1158 break;
1159 }
1160 i++;
1161 }
1162
1163 if (!found)
1164 return -ENOENT;
1165
1166 *irq = oh->mpu_irqs[i].irq;
1167
1168 return 0;
1169}
1170
1171/**
1172 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1173 * @oh: struct omap_hwmod * to operate on
1174 * @name: pointer to the name of the SDMA request line to fetch (optional)
1175 * @dma: pointer to an unsigned int to store the request line ID to
1176 *
1177 * Retrieve an SDMA request line ID named by @name on the IP block
1178 * pointed to by @oh. The ID will be filled into the address pointed
1179 * to by @dma. When @name is non-null, the request line ID associated
1180 * with the named entry will be returned. If @name is null, the first
1181 * matching entry will be returned. Data order is not meaningful in
1182 * hwmod data, so callers are strongly encouraged to use a non-null
1183 * @name whenever possible to avoid unpredictable effects if hwmod
1184 * data is later added that causes data ordering to change. Returns 0
1185 * upon success or a negative error code upon error.
1186 */
1187static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1188 unsigned int *dma)
1189{
1190 int i;
1191 bool found = false;
1192
1193 if (!oh->sdma_reqs)
1194 return -ENOENT;
1195
1196 i = 0;
1197 while (oh->sdma_reqs[i].dma_req != -1) {
1198 if (name == oh->sdma_reqs[i].name ||
1199 !strcmp(name, oh->sdma_reqs[i].name)) {
1200 found = true;
1201 break;
1202 }
1203 i++;
1204 }
1205
1206 if (!found)
1207 return -ENOENT;
1208
1209 *dma = oh->sdma_reqs[i].dma_req;
1210
1211 return 0;
1212}
1213
1214/**
1215 * _get_addr_space_by_name - fetch address space start & end by name
1216 * @oh: struct omap_hwmod * to operate on
1217 * @name: pointer to the name of the address space to fetch (optional)
1218 * @pa_start: pointer to a u32 to store the starting address to
1219 * @pa_end: pointer to a u32 to store the ending address to
1220 *
1221 * Retrieve address space start and end addresses for the IP block
1222 * pointed to by @oh. The data will be filled into the addresses
1223 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1224 * address space data associated with the named entry will be
1225 * returned. If @name is null, the first matching entry will be
1226 * returned. Data order is not meaningful in hwmod data, so callers
1227 * are strongly encouraged to use a non-null @name whenever possible
1228 * to avoid unpredictable effects if hwmod data is later added that
1229 * causes data ordering to change. Returns 0 upon success or a
1230 * negative error code upon error.
1231 */
1232static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1233 u32 *pa_start, u32 *pa_end)
1234{
1235 int i, j;
1236 struct omap_hwmod_ocp_if *os;
2221b5cd 1237 struct list_head *p = NULL;
5e8370f1
PW
1238 bool found = false;
1239
11cd4b94 1240 p = oh->slave_ports.next;
2221b5cd 1241
5d95dde7
PW
1242 i = 0;
1243 while (i < oh->slaves_cnt) {
11cd4b94 1244 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1245
1246 if (!os->addr)
1247 return -ENOENT;
1248
1249 j = 0;
1250 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1251 if (name == os->addr[j].name ||
1252 !strcmp(name, os->addr[j].name)) {
1253 found = true;
1254 break;
1255 }
1256 j++;
1257 }
1258
1259 if (found)
1260 break;
1261 }
1262
1263 if (!found)
1264 return -ENOENT;
1265
1266 *pa_start = os->addr[j].pa_start;
1267 *pa_end = os->addr[j].pa_end;
1268
1269 return 0;
1270}
1271
63c85238 1272/**
24dbc213 1273 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1274 * @oh: struct omap_hwmod *
1275 *
24dbc213
PW
1276 * Determines the array index of the OCP slave port that the MPU uses
1277 * to address the device, and saves it into the struct omap_hwmod.
1278 * Intended to be called during hwmod registration only. No return
1279 * value.
63c85238 1280 */
24dbc213 1281static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1282{
24dbc213 1283 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1284 struct list_head *p;
5d95dde7 1285 int i = 0;
63c85238 1286
5d95dde7 1287 if (!oh)
24dbc213
PW
1288 return;
1289
1290 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1291
11cd4b94 1292 p = oh->slave_ports.next;
2221b5cd 1293
5d95dde7 1294 while (i < oh->slaves_cnt) {
11cd4b94 1295 os = _fetch_next_ocp_if(&p, &i);
63c85238 1296 if (os->user & OCP_USER_MPU) {
2221b5cd 1297 oh->_mpu_port = os;
24dbc213 1298 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1299 break;
1300 }
1301 }
1302
24dbc213 1303 return;
63c85238
PW
1304}
1305
2d6141ba
PW
1306/**
1307 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1308 * @oh: struct omap_hwmod *
1309 *
1310 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1311 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1312 * communicate with the IP block. This interface need not be directly
1313 * connected to the MPU (and almost certainly is not), but is directly
1314 * connected to the IP block represented by @oh. Returns a pointer
1315 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1316 * error or if there does not appear to be a path from the MPU to this
1317 * IP block.
1318 */
1319static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1320{
1321 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1322 return NULL;
1323
11cd4b94 1324 return oh->_mpu_port;
2d6141ba
PW
1325};
1326
63c85238 1327/**
c9aafd23 1328 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1329 * @oh: struct omap_hwmod *
1330 *
c9aafd23
PW
1331 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1332 * the register target MPU address space; or returns NULL upon error.
63c85238 1333 */
c9aafd23 1334static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1335{
1336 struct omap_hwmod_ocp_if *os;
1337 struct omap_hwmod_addr_space *mem;
c9aafd23 1338 int found = 0, i = 0;
63c85238 1339
2d6141ba 1340 os = _find_mpu_rt_port(oh);
24dbc213 1341 if (!os || !os->addr)
78183f3f
PW
1342 return NULL;
1343
1344 do {
1345 mem = &os->addr[i++];
1346 if (mem->flags & ADDR_TYPE_RT)
63c85238 1347 found = 1;
78183f3f 1348 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1349
c9aafd23 1350 return (found) ? mem : NULL;
63c85238
PW
1351}
1352
1353/**
74ff3a68 1354 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1355 * @oh: struct omap_hwmod *
1356 *
006c7f18
PW
1357 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1358 * by @oh is set to indicate to the PRCM that the IP block is active.
1359 * Usually this means placing the module into smart-idle mode and
1360 * smart-standby, but if there is a bug in the automatic idle handling
1361 * for the IP block, it may need to be placed into the force-idle or
1362 * no-idle variants of these modes. No return value.
63c85238 1363 */
74ff3a68 1364static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1365{
43b40992 1366 u8 idlemode, sf;
63c85238 1367 u32 v;
006c7f18 1368 bool clkdm_act;
f5dd3bb5 1369 struct clockdomain *clkdm;
63c85238 1370
43b40992 1371 if (!oh->class->sysc)
63c85238
PW
1372 return;
1373
613ad0e9
TK
1374 /*
1375 * Wait until reset has completed, this is needed as the IP
1376 * block is reset automatically by hardware in some cases
1377 * (off-mode for example), and the drivers require the
1378 * IP to be ready when they access it
1379 */
1380 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1381 _enable_optional_clocks(oh);
1382 _wait_softreset_complete(oh);
1383 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1384 _disable_optional_clocks(oh);
1385
63c85238 1386 v = oh->_sysc_cache;
43b40992 1387 sf = oh->class->sysc->sysc_flags;
63c85238 1388
f5dd3bb5 1389 clkdm = _get_clkdm(oh);
43b40992 1390 if (sf & SYSC_HAS_SIDLEMODE) {
ca43ea34
RN
1391 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1392 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
35513171
RN
1393 idlemode = HWMOD_IDLEMODE_NO;
1394 } else {
1395 if (sf & SYSC_HAS_ENAWAKEUP)
1396 _enable_wakeup(oh, &v);
1397 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1398 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1399 else
1400 idlemode = HWMOD_IDLEMODE_SMART;
1401 }
1402
1403 /*
1404 * This is special handling for some IPs like
1405 * 32k sync timer. Force them to idle!
1406 */
f5dd3bb5 1407 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
006c7f18
PW
1408 if (clkdm_act && !(oh->class->sysc->idlemodes &
1409 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1410 idlemode = HWMOD_IDLEMODE_FORCE;
35513171 1411
63c85238
PW
1412 _set_slave_idlemode(oh, idlemode, &v);
1413 }
1414
43b40992 1415 if (sf & SYSC_HAS_MIDLEMODE) {
092bc089
GI
1416 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1417 idlemode = HWMOD_IDLEMODE_FORCE;
1418 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
724019b0
BC
1419 idlemode = HWMOD_IDLEMODE_NO;
1420 } else {
1421 if (sf & SYSC_HAS_ENAWAKEUP)
1422 _enable_wakeup(oh, &v);
1423 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1424 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1425 else
1426 idlemode = HWMOD_IDLEMODE_SMART;
1427 }
63c85238
PW
1428 _set_master_standbymode(oh, idlemode, &v);
1429 }
1430
a16b1f7f
PW
1431 /*
1432 * XXX The clock framework should handle this, by
1433 * calling into this code. But this must wait until the
1434 * clock structures are tagged with omap_hwmod entries
1435 */
43b40992
PW
1436 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1437 (sf & SYSC_HAS_CLOCKACTIVITY))
1438 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1439
127500cc
JH
1440 /* If the cached value is the same as the new value, skip the write */
1441 if (oh->_sysc_cache != v)
1442 _write_sysconfig(v, oh);
78f26e87
HH
1443
1444 /*
1445 * Set the autoidle bit only after setting the smartidle bit
1446 * Setting this will not have any impact on the other modules.
1447 */
1448 if (sf & SYSC_HAS_AUTOIDLE) {
1449 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1450 0 : 1;
1451 _set_module_autoidle(oh, idlemode, &v);
1452 _write_sysconfig(v, oh);
1453 }
63c85238
PW
1454}
1455
1456/**
74ff3a68 1457 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1458 * @oh: struct omap_hwmod *
1459 *
1460 * If module is marked as SWSUP_SIDLE, force the module into slave
1461 * idle; otherwise, configure it for smart-idle. If module is marked
1462 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1463 * configure it for smart-standby. No return value.
1464 */
74ff3a68 1465static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1466{
43b40992 1467 u8 idlemode, sf;
63c85238
PW
1468 u32 v;
1469
43b40992 1470 if (!oh->class->sysc)
63c85238
PW
1471 return;
1472
1473 v = oh->_sysc_cache;
43b40992 1474 sf = oh->class->sysc->sysc_flags;
63c85238 1475
43b40992 1476 if (sf & SYSC_HAS_SIDLEMODE) {
35513171 1477 if (oh->flags & HWMOD_SWSUP_SIDLE) {
006c7f18 1478 idlemode = HWMOD_IDLEMODE_FORCE;
35513171
RN
1479 } else {
1480 if (sf & SYSC_HAS_ENAWAKEUP)
1481 _enable_wakeup(oh, &v);
1482 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1483 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1484 else
1485 idlemode = HWMOD_IDLEMODE_SMART;
1486 }
63c85238
PW
1487 _set_slave_idlemode(oh, idlemode, &v);
1488 }
1489
43b40992 1490 if (sf & SYSC_HAS_MIDLEMODE) {
092bc089
GI
1491 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1492 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
724019b0
BC
1493 idlemode = HWMOD_IDLEMODE_FORCE;
1494 } else {
1495 if (sf & SYSC_HAS_ENAWAKEUP)
1496 _enable_wakeup(oh, &v);
1497 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1498 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1499 else
1500 idlemode = HWMOD_IDLEMODE_SMART;
1501 }
63c85238
PW
1502 _set_master_standbymode(oh, idlemode, &v);
1503 }
1504
1505 _write_sysconfig(v, oh);
1506}
1507
1508/**
74ff3a68 1509 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1510 * @oh: struct omap_hwmod *
1511 *
1512 * Force the module into slave idle and master suspend. No return
1513 * value.
1514 */
74ff3a68 1515static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1516{
1517 u32 v;
43b40992 1518 u8 sf;
63c85238 1519
43b40992 1520 if (!oh->class->sysc)
63c85238
PW
1521 return;
1522
1523 v = oh->_sysc_cache;
43b40992 1524 sf = oh->class->sysc->sysc_flags;
63c85238 1525
43b40992 1526 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1527 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1528
43b40992 1529 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1530 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1531
43b40992 1532 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1533 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1534
1535 _write_sysconfig(v, oh);
1536}
1537
1538/**
1539 * _lookup - find an omap_hwmod by name
1540 * @name: find an omap_hwmod by name
1541 *
1542 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1543 */
1544static struct omap_hwmod *_lookup(const char *name)
1545{
1546 struct omap_hwmod *oh, *temp_oh;
1547
1548 oh = NULL;
1549
1550 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1551 if (!strcmp(name, temp_oh->name)) {
1552 oh = temp_oh;
1553 break;
1554 }
1555 }
1556
1557 return oh;
1558}
868c157d 1559
6ae76997
BC
1560/**
1561 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1562 * @oh: struct omap_hwmod *
1563 *
1564 * Convert a clockdomain name stored in a struct omap_hwmod into a
1565 * clockdomain pointer, and save it into the struct omap_hwmod.
868c157d 1566 * Return -EINVAL if the clkdm_name lookup failed.
6ae76997
BC
1567 */
1568static int _init_clkdm(struct omap_hwmod *oh)
1569{
3bb05dbf
PW
1570 if (!oh->clkdm_name) {
1571 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
6ae76997 1572 return 0;
3bb05dbf 1573 }
6ae76997 1574
6ae76997
BC
1575 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1576 if (!oh->clkdm) {
3d0cb73e 1577 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
6ae76997 1578 oh->name, oh->clkdm_name);
0385c582 1579 return 0;
6ae76997
BC
1580 }
1581
1582 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1583 oh->name, oh->clkdm_name);
1584
1585 return 0;
1586}
63c85238
PW
1587
1588/**
6ae76997
BC
1589 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1590 * well the clockdomain.
63c85238 1591 * @oh: struct omap_hwmod *
97d60162 1592 * @data: not used; pass NULL
63c85238 1593 *
a2debdbd 1594 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1595 * Resolves all clock names embedded in the hwmod. Returns 0 on
1596 * success, or a negative error code on failure.
63c85238 1597 */
97d60162 1598static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1599{
1600 int ret = 0;
1601
48d54f3f
PW
1602 if (oh->_state != _HWMOD_STATE_REGISTERED)
1603 return 0;
63c85238
PW
1604
1605 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1606
b797be1d
VH
1607 if (soc_ops.init_clkdm)
1608 ret |= soc_ops.init_clkdm(oh);
1609
63c85238
PW
1610 ret |= _init_main_clk(oh);
1611 ret |= _init_interface_clks(oh);
1612 ret |= _init_opt_clks(oh);
1613
f5c1f84b
BC
1614 if (!ret)
1615 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a 1616 else
3d0cb73e 1617 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1618
09c35f2f 1619 return ret;
63c85238
PW
1620}
1621
5365efbe 1622/**
cc1226e7 1623 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1624 * @oh: struct omap_hwmod *
1625 * @name: name of the reset line in the context of this hwmod
cc1226e7 1626 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1627 *
1628 * Return the bit position of the reset line that match the
1629 * input name. Return -ENOENT if not found.
1630 */
a032d33b
PW
1631static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1632 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1633{
1634 int i;
1635
1636 for (i = 0; i < oh->rst_lines_cnt; i++) {
1637 const char *rst_line = oh->rst_lines[i].name;
1638 if (!strcmp(rst_line, name)) {
cc1226e7 1639 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1640 ohri->st_shift = oh->rst_lines[i].st_shift;
1641 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1642 oh->name, __func__, rst_line, ohri->rst_shift,
1643 ohri->st_shift);
5365efbe 1644
cc1226e7 1645 return 0;
5365efbe
BC
1646 }
1647 }
1648
1649 return -ENOENT;
1650}
1651
1652/**
1653 * _assert_hardreset - assert the HW reset line of submodules
1654 * contained in the hwmod module.
1655 * @oh: struct omap_hwmod *
1656 * @name: name of the reset line to lookup and assert
1657 *
b8249cf2
KH
1658 * Some IP like dsp, ipu or iva contain processor that require an HW
1659 * reset line to be assert / deassert in order to enable fully the IP.
1660 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1661 * asserting the hardreset line on the currently-booted SoC, or passes
1662 * along the return value from _lookup_hardreset() or the SoC's
1663 * assert_hardreset code.
5365efbe
BC
1664 */
1665static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1666{
cc1226e7 1667 struct omap_hwmod_rst_info ohri;
a032d33b 1668 int ret = -EINVAL;
5365efbe
BC
1669
1670 if (!oh)
1671 return -EINVAL;
1672
b8249cf2
KH
1673 if (!soc_ops.assert_hardreset)
1674 return -ENOSYS;
1675
cc1226e7 1676 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1677 if (ret < 0)
cc1226e7 1678 return ret;
5365efbe 1679
b8249cf2
KH
1680 ret = soc_ops.assert_hardreset(oh, &ohri);
1681
1682 return ret;
5365efbe
BC
1683}
1684
1685/**
1686 * _deassert_hardreset - deassert the HW reset line of submodules contained
1687 * in the hwmod module.
1688 * @oh: struct omap_hwmod *
1689 * @name: name of the reset line to look up and deassert
1690 *
b8249cf2
KH
1691 * Some IP like dsp, ipu or iva contain processor that require an HW
1692 * reset line to be assert / deassert in order to enable fully the IP.
1693 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1694 * deasserting the hardreset line on the currently-booted SoC, or passes
1695 * along the return value from _lookup_hardreset() or the SoC's
1696 * deassert_hardreset code.
5365efbe
BC
1697 */
1698static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1699{
cc1226e7 1700 struct omap_hwmod_rst_info ohri;
b8249cf2 1701 int ret = -EINVAL;
e8e96dff 1702 int hwsup = 0;
5365efbe
BC
1703
1704 if (!oh)
1705 return -EINVAL;
1706
b8249cf2
KH
1707 if (!soc_ops.deassert_hardreset)
1708 return -ENOSYS;
1709
cc1226e7 1710 ret = _lookup_hardreset(oh, name, &ohri);
c48cd659 1711 if (ret < 0)
cc1226e7 1712 return ret;
5365efbe 1713
e8e96dff
ORL
1714 if (oh->clkdm) {
1715 /*
1716 * A clockdomain must be in SW_SUP otherwise reset
1717 * might not be completed. The clockdomain can be set
1718 * in HW_AUTO only when the module become ready.
1719 */
1720 hwsup = clkdm_in_hwsup(oh->clkdm);
1721 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1722 if (ret) {
1723 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1724 oh->name, oh->clkdm->name, ret);
1725 return ret;
1726 }
1727 }
1728
1729 _enable_clocks(oh);
1730 if (soc_ops.enable_module)
1731 soc_ops.enable_module(oh);
1732
b8249cf2 1733 ret = soc_ops.deassert_hardreset(oh, &ohri);
e8e96dff
ORL
1734
1735 if (soc_ops.disable_module)
1736 soc_ops.disable_module(oh);
1737 _disable_clocks(oh);
1738
cc1226e7 1739 if (ret == -EBUSY)
3d0cb73e 1740 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
5365efbe 1741
e8e96dff
ORL
1742 if (!ret) {
1743 /*
1744 * Set the clockdomain to HW_AUTO, assuming that the
1745 * previous state was HW_AUTO.
1746 */
1747 if (oh->clkdm && hwsup)
1748 clkdm_allow_idle(oh->clkdm);
1749 } else {
1750 if (oh->clkdm)
1751 clkdm_hwmod_disable(oh->clkdm, oh);
1752 }
1753
cc1226e7 1754 return ret;
5365efbe
BC
1755}
1756
1757/**
1758 * _read_hardreset - read the HW reset line state of submodules
1759 * contained in the hwmod module
1760 * @oh: struct omap_hwmod *
1761 * @name: name of the reset line to look up and read
1762 *
b8249cf2
KH
1763 * Return the state of the reset line. Returns -EINVAL if @oh is
1764 * null, -ENOSYS if we have no way of reading the hardreset line
1765 * status on the currently-booted SoC, or passes along the return
1766 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1767 * code.
5365efbe
BC
1768 */
1769static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1770{
cc1226e7 1771 struct omap_hwmod_rst_info ohri;
a032d33b 1772 int ret = -EINVAL;
5365efbe
BC
1773
1774 if (!oh)
1775 return -EINVAL;
1776
b8249cf2
KH
1777 if (!soc_ops.is_hardreset_asserted)
1778 return -ENOSYS;
1779
cc1226e7 1780 ret = _lookup_hardreset(oh, name, &ohri);
a032d33b 1781 if (ret < 0)
cc1226e7 1782 return ret;
5365efbe 1783
b8249cf2 1784 return soc_ops.is_hardreset_asserted(oh, &ohri);
5365efbe
BC
1785}
1786
747834ab 1787/**
eb05f691 1788 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
747834ab
PW
1789 * @oh: struct omap_hwmod *
1790 *
eb05f691
ORL
1791 * If all hardreset lines associated with @oh are asserted, then return true.
1792 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1793 * associated with @oh are asserted, then return false.
747834ab 1794 * This function is used to avoid executing some parts of the IP block
eb05f691 1795 * enable/disable sequence if its hardreset line is set.
747834ab 1796 */
eb05f691 1797static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
747834ab 1798{
eb05f691 1799 int i, rst_cnt = 0;
747834ab
PW
1800
1801 if (oh->rst_lines_cnt == 0)
1802 return false;
1803
1804 for (i = 0; i < oh->rst_lines_cnt; i++)
1805 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
eb05f691
ORL
1806 rst_cnt++;
1807
1808 if (oh->rst_lines_cnt == rst_cnt)
1809 return true;
747834ab
PW
1810
1811 return false;
1812}
1813
e9332b6e
PW
1814/**
1815 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1816 * hard-reset
1817 * @oh: struct omap_hwmod *
1818 *
1819 * If any hardreset lines associated with @oh are asserted, then
1820 * return true. Otherwise, if no hardreset lines associated with @oh
1821 * are asserted, or if @oh has no hardreset lines, then return false.
1822 * This function is used to avoid executing some parts of the IP block
1823 * enable/disable sequence if any hardreset line is set.
1824 */
1825static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1826{
1827 int rst_cnt = 0;
1828 int i;
1829
1830 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1831 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1832 rst_cnt++;
1833
1834 return (rst_cnt) ? true : false;
1835}
1836
747834ab
PW
1837/**
1838 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1839 * @oh: struct omap_hwmod *
1840 *
1841 * Disable the PRCM module mode related to the hwmod @oh.
1842 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1843 */
1844static int _omap4_disable_module(struct omap_hwmod *oh)
1845{
1846 int v;
1847
747834ab
PW
1848 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1849 return -EINVAL;
1850
eb05f691
ORL
1851 /*
1852 * Since integration code might still be doing something, only
1853 * disable if all lines are under hardreset.
1854 */
e9332b6e 1855 if (_are_any_hardreset_lines_asserted(oh))
eb05f691
ORL
1856 return 0;
1857
747834ab
PW
1858 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1859
1860 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1861 oh->clkdm->cm_inst,
1862 oh->clkdm->clkdm_offs,
1863 oh->prcm.omap4.clkctrl_offs);
1864
747834ab
PW
1865 v = _omap4_wait_target_disable(oh);
1866 if (v)
1867 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1868 oh->name);
1869
1870 return 0;
1871}
1872
1688bf19
VH
1873/**
1874 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1875 * @oh: struct omap_hwmod *
1876 *
1877 * Disable the PRCM module mode related to the hwmod @oh.
1878 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1879 */
1880static int _am33xx_disable_module(struct omap_hwmod *oh)
1881{
1882 int v;
1883
1884 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1885 return -EINVAL;
1886
1887 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1888
e9332b6e
PW
1889 if (_are_any_hardreset_lines_asserted(oh))
1890 return 0;
1891
1688bf19
VH
1892 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1893 oh->prcm.omap4.clkctrl_offs);
1894
1688bf19
VH
1895 v = _am33xx_wait_target_disable(oh);
1896 if (v)
1897 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1898 oh->name);
1899
1900 return 0;
1901}
1902
63c85238 1903/**
bd36179e 1904 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1905 * @oh: struct omap_hwmod *
1906 *
1907 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1908 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1909 * reset this way, -EINVAL if the hwmod is in the wrong state,
1910 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1911 *
1912 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1913 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1914 * use the SYSCONFIG softreset bit to provide the status.
1915 *
bd36179e
PW
1916 * Note that some IP like McBSP do have reset control but don't have
1917 * reset status.
63c85238 1918 */
bd36179e 1919static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1920{
613ad0e9 1921 u32 v;
6f8b7ff5 1922 int c = 0;
96835af9 1923 int ret = 0;
63c85238 1924
43b40992 1925 if (!oh->class->sysc ||
2cb06814 1926 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1927 return -ENOENT;
63c85238
PW
1928
1929 /* clocks must be on for this operation */
1930 if (oh->_state != _HWMOD_STATE_ENABLED) {
7852ec05
PW
1931 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1932 oh->name);
63c85238
PW
1933 return -EINVAL;
1934 }
1935
96835af9
BC
1936 /* For some modules, all optionnal clocks need to be enabled as well */
1937 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1938 _enable_optional_clocks(oh);
1939
bd36179e 1940 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1941
1942 v = oh->_sysc_cache;
96835af9
BC
1943 ret = _set_softreset(oh, &v);
1944 if (ret)
1945 goto dis_opt_clks;
313a76ee 1946
63c85238
PW
1947 _write_sysconfig(v, oh);
1948
d99de7f5
FGL
1949 if (oh->class->sysc->srst_udelay)
1950 udelay(oh->class->sysc->srst_udelay);
1951
613ad0e9 1952 c = _wait_softreset_complete(oh);
01142519 1953 if (c == MAX_MODULE_SOFTRESET_WAIT) {
3d0cb73e
JP
1954 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1955 oh->name, MAX_MODULE_SOFTRESET_WAIT);
01142519
IS
1956 ret = -ETIMEDOUT;
1957 goto dis_opt_clks;
1958 } else {
5365efbe 1959 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
01142519
IS
1960 }
1961
1962 ret = _clear_softreset(oh, &v);
1963 if (ret)
1964 goto dis_opt_clks;
1965
1966 _write_sysconfig(v, oh);
63c85238
PW
1967
1968 /*
1969 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1970 * _wait_target_ready() or _reset()
1971 */
1972
96835af9
BC
1973dis_opt_clks:
1974 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1975 _disable_optional_clocks(oh);
1976
1977 return ret;
63c85238
PW
1978}
1979
bd36179e
PW
1980/**
1981 * _reset - reset an omap_hwmod
1982 * @oh: struct omap_hwmod *
1983 *
30e105c0
PW
1984 * Resets an omap_hwmod @oh. If the module has a custom reset
1985 * function pointer defined, then call it to reset the IP block, and
1986 * pass along its return value to the caller. Otherwise, if the IP
1987 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1988 * associated with it, call a function to reset the IP block via that
1989 * method, and pass along the return value to the caller. Finally, if
1990 * the IP block has some hardreset lines associated with it, assert
1991 * all of those, but do _not_ deassert them. (This is because driver
1992 * authors have expressed an apparent requirement to control the
1993 * deassertion of the hardreset lines themselves.)
1994 *
1995 * The default software reset mechanism for most OMAP IP blocks is
1996 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1997 * hwmods cannot be reset via this method. Some are not targets and
1998 * therefore have no OCP header registers to access. Others (like the
1999 * IVA) have idiosyncratic reset sequences. So for these relatively
2000 * rare cases, custom reset code can be supplied in the struct
6668546f
KVA
2001 * omap_hwmod_class .reset function pointer.
2002 *
2003 * _set_dmadisable() is called to set the DMADISABLE bit so that it
2004 * does not prevent idling of the system. This is necessary for cases
2005 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
2006 * kernel without disabling dma.
2007 *
2008 * Passes along the return value from either _ocp_softreset() or the
2009 * custom reset function - these must return -EINVAL if the hwmod
2010 * cannot be reset this way or if the hwmod is in the wrong state,
2011 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
bd36179e
PW
2012 */
2013static int _reset(struct omap_hwmod *oh)
2014{
30e105c0 2015 int i, r;
bd36179e
PW
2016
2017 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
2018
30e105c0
PW
2019 if (oh->class->reset) {
2020 r = oh->class->reset(oh);
2021 } else {
2022 if (oh->rst_lines_cnt > 0) {
2023 for (i = 0; i < oh->rst_lines_cnt; i++)
2024 _assert_hardreset(oh, oh->rst_lines[i].name);
2025 return 0;
2026 } else {
2027 r = _ocp_softreset(oh);
2028 if (r == -ENOENT)
2029 r = 0;
2030 }
2031 }
2032
6668546f
KVA
2033 _set_dmadisable(oh);
2034
9c8b0ec7 2035 /*
30e105c0
PW
2036 * OCP_SYSCONFIG bits need to be reprogrammed after a
2037 * softreset. The _enable() function should be split to avoid
2038 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 2039 */
2800852a
RN
2040 if (oh->class->sysc) {
2041 _update_sysc_cache(oh);
2042 _enable_sysc(oh);
2043 }
2044
30e105c0 2045 return r;
bd36179e
PW
2046}
2047
5165882a
VB
2048/**
2049 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
2050 *
2051 * Call the appropriate PRM function to clear any logged I/O chain
2052 * wakeups and to reconfigure the chain. This apparently needs to be
2053 * done upon every mux change. Since hwmods can be concurrently
2054 * enabled and idled, hold a spinlock around the I/O chain
2055 * reconfiguration sequence. No return value.
2056 *
2057 * XXX When the PRM code is moved to drivers, this function can be removed,
2058 * as the PRM infrastructure should abstract this.
2059 */
2060static void _reconfigure_io_chain(void)
2061{
2062 unsigned long flags;
2063
2064 spin_lock_irqsave(&io_chain_lock, flags);
2065
7db143b8 2066 if (cpu_is_omap34xx())
5165882a
VB
2067 omap3xxx_prm_reconfigure_io_chain();
2068 else if (cpu_is_omap44xx())
2069 omap44xx_prm_reconfigure_io_chain();
2070
2071 spin_unlock_irqrestore(&io_chain_lock, flags);
2072}
2073
e6d3a8b0
RN
2074/**
2075 * _omap4_update_context_lost - increment hwmod context loss counter if
2076 * hwmod context was lost, and clear hardware context loss reg
2077 * @oh: hwmod to check for context loss
2078 *
2079 * If the PRCM indicates that the hwmod @oh lost context, increment
2080 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2081 * bits. No return value.
2082 */
2083static void _omap4_update_context_lost(struct omap_hwmod *oh)
2084{
2085 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2086 return;
2087
2088 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2089 oh->clkdm->pwrdm.ptr->prcm_offs,
2090 oh->prcm.omap4.context_offs))
2091 return;
2092
2093 oh->prcm.omap4.context_lost_counter++;
2094 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2095 oh->clkdm->pwrdm.ptr->prcm_offs,
2096 oh->prcm.omap4.context_offs);
2097}
2098
2099/**
2100 * _omap4_get_context_lost - get context loss counter for a hwmod
2101 * @oh: hwmod to get context loss counter for
2102 *
2103 * Returns the in-memory context loss counter for a hwmod.
2104 */
2105static int _omap4_get_context_lost(struct omap_hwmod *oh)
2106{
2107 return oh->prcm.omap4.context_lost_counter;
2108}
2109
6d266f63
PW
2110/**
2111 * _enable_preprogram - Pre-program an IP block during the _enable() process
2112 * @oh: struct omap_hwmod *
2113 *
2114 * Some IP blocks (such as AESS) require some additional programming
2115 * after enable before they can enter idle. If a function pointer to
2116 * do so is present in the hwmod data, then call it and pass along the
2117 * return value; otherwise, return 0.
2118 */
0f497039 2119static int _enable_preprogram(struct omap_hwmod *oh)
6d266f63
PW
2120{
2121 if (!oh->class->enable_preprogram)
2122 return 0;
2123
2124 return oh->class->enable_preprogram(oh);
2125}
2126
63c85238 2127/**
dc6d1cda 2128 * _enable - enable an omap_hwmod
63c85238
PW
2129 * @oh: struct omap_hwmod *
2130 *
2131 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
2132 * register target. Returns -EINVAL if the hwmod is in the wrong
2133 * state or passes along the return value of _wait_target_ready().
63c85238 2134 */
dc6d1cda 2135static int _enable(struct omap_hwmod *oh)
63c85238 2136{
747834ab 2137 int r;
665d0013 2138 int hwsup = 0;
63c85238 2139
34617e2a
BC
2140 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2141
aacf0941 2142 /*
64813c3f
PW
2143 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2144 * state at init. Now that someone is really trying to enable
2145 * them, just ensure that the hwmod mux is set.
aacf0941
RN
2146 */
2147 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2148 /*
2149 * If the caller has mux data populated, do the mux'ing
2150 * which wouldn't have been done as part of the _enable()
2151 * done during setup.
2152 */
2153 if (oh->mux)
2154 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2155
2156 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2157 return 0;
2158 }
2159
63c85238
PW
2160 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2161 oh->_state != _HWMOD_STATE_IDLE &&
2162 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
2163 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2164 oh->name);
63c85238
PW
2165 return -EINVAL;
2166 }
2167
31f62866 2168 /*
eb05f691 2169 * If an IP block contains HW reset lines and all of them are
747834ab
PW
2170 * asserted, we let integration code associated with that
2171 * block handle the enable. We've received very little
2172 * information on what those driver authors need, and until
2173 * detailed information is provided and the driver code is
2174 * posted to the public lists, this is probably the best we
2175 * can do.
31f62866 2176 */
eb05f691 2177 if (_are_all_hardreset_lines_asserted(oh))
747834ab 2178 return 0;
63c85238 2179
665d0013
RN
2180 /* Mux pins for device runtime if populated */
2181 if (oh->mux && (!oh->mux->enabled ||
2182 ((oh->_state == _HWMOD_STATE_IDLE) &&
5165882a 2183 oh->mux->pads_dynamic))) {
665d0013 2184 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
5165882a 2185 _reconfigure_io_chain();
6a08b11a 2186 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
cc824534 2187 _reconfigure_io_chain();
5165882a 2188 }
665d0013
RN
2189
2190 _add_initiator_dep(oh, mpu_oh);
34617e2a 2191
665d0013
RN
2192 if (oh->clkdm) {
2193 /*
2194 * A clockdomain must be in SW_SUP before enabling
2195 * completely the module. The clockdomain can be set
2196 * in HW_AUTO only when the module become ready.
2197 */
b71c7217
PW
2198 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2199 !clkdm_missing_idle_reporting(oh->clkdm);
665d0013
RN
2200 r = clkdm_hwmod_enable(oh->clkdm, oh);
2201 if (r) {
2202 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2203 oh->name, oh->clkdm->name, r);
2204 return r;
2205 }
34617e2a 2206 }
665d0013
RN
2207
2208 _enable_clocks(oh);
9ebfd285
KH
2209 if (soc_ops.enable_module)
2210 soc_ops.enable_module(oh);
fa200222 2211 if (oh->flags & HWMOD_BLOCK_WFI)
f7b861b7 2212 cpu_idle_poll_ctrl(true);
34617e2a 2213
e6d3a8b0
RN
2214 if (soc_ops.update_context_lost)
2215 soc_ops.update_context_lost(oh);
2216
8f6aa8ee
KH
2217 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2218 -EINVAL;
665d0013
RN
2219 if (!r) {
2220 /*
2221 * Set the clockdomain to HW_AUTO only if the target is ready,
2222 * assuming that the previous state was HW_AUTO
2223 */
2224 if (oh->clkdm && hwsup)
2225 clkdm_allow_idle(oh->clkdm);
2226
2227 oh->_state = _HWMOD_STATE_ENABLED;
2228
2229 /* Access the sysconfig only if the target is ready */
2230 if (oh->class->sysc) {
2231 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2232 _update_sysc_cache(oh);
2233 _enable_sysc(oh);
2234 }
6d266f63 2235 r = _enable_preprogram(oh);
665d0013 2236 } else {
2577a4a6
PW
2237 if (soc_ops.disable_module)
2238 soc_ops.disable_module(oh);
665d0013
RN
2239 _disable_clocks(oh);
2240 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2241 oh->name, r);
34617e2a 2242
665d0013
RN
2243 if (oh->clkdm)
2244 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
2245 }
2246
63c85238
PW
2247 return r;
2248}
2249
2250/**
dc6d1cda 2251 * _idle - idle an omap_hwmod
63c85238
PW
2252 * @oh: struct omap_hwmod *
2253 *
2254 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
2255 * no further work. Returns -EINVAL if the hwmod is in the wrong
2256 * state or returns 0.
63c85238 2257 */
dc6d1cda 2258static int _idle(struct omap_hwmod *oh)
63c85238 2259{
34617e2a
BC
2260 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2261
63c85238 2262 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2263 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2264 oh->name);
63c85238
PW
2265 return -EINVAL;
2266 }
2267
eb05f691 2268 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2269 return 0;
2270
43b40992 2271 if (oh->class->sysc)
74ff3a68 2272 _idle_sysc(oh);
63c85238 2273 _del_initiator_dep(oh, mpu_oh);
bfc141e3 2274
fa200222 2275 if (oh->flags & HWMOD_BLOCK_WFI)
f7b861b7 2276 cpu_idle_poll_ctrl(false);
9ebfd285
KH
2277 if (soc_ops.disable_module)
2278 soc_ops.disable_module(oh);
bfc141e3 2279
45c38252
BC
2280 /*
2281 * The module must be in idle mode before disabling any parents
2282 * clocks. Otherwise, the parent clock might be disabled before
2283 * the module transition is done, and thus will prevent the
2284 * transition to complete properly.
2285 */
2286 _disable_clocks(oh);
665d0013
RN
2287 if (oh->clkdm)
2288 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 2289
8d9af88f 2290 /* Mux pins for device idle if populated */
5165882a 2291 if (oh->mux && oh->mux->pads_dynamic) {
8d9af88f 2292 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
5165882a 2293 _reconfigure_io_chain();
6a08b11a 2294 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
cc824534 2295 _reconfigure_io_chain();
5165882a 2296 }
8d9af88f 2297
63c85238
PW
2298 oh->_state = _HWMOD_STATE_IDLE;
2299
2300 return 0;
2301}
2302
2303/**
2304 * _shutdown - shutdown an omap_hwmod
2305 * @oh: struct omap_hwmod *
2306 *
2307 * Shut down an omap_hwmod @oh. This should be called when the driver
2308 * used for the hwmod is removed or unloaded or if the driver is not
2309 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2310 * state or returns 0.
2311 */
2312static int _shutdown(struct omap_hwmod *oh)
2313{
9c8b0ec7 2314 int ret, i;
e4dc8f50
PW
2315 u8 prev_state;
2316
63c85238
PW
2317 if (oh->_state != _HWMOD_STATE_IDLE &&
2318 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
2319 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2320 oh->name);
63c85238
PW
2321 return -EINVAL;
2322 }
2323
eb05f691 2324 if (_are_all_hardreset_lines_asserted(oh))
747834ab
PW
2325 return 0;
2326
63c85238
PW
2327 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2328
e4dc8f50
PW
2329 if (oh->class->pre_shutdown) {
2330 prev_state = oh->_state;
2331 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 2332 _enable(oh);
e4dc8f50
PW
2333 ret = oh->class->pre_shutdown(oh);
2334 if (ret) {
2335 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 2336 _idle(oh);
e4dc8f50
PW
2337 return ret;
2338 }
2339 }
2340
6481c73c
MV
2341 if (oh->class->sysc) {
2342 if (oh->_state == _HWMOD_STATE_IDLE)
2343 _enable(oh);
74ff3a68 2344 _shutdown_sysc(oh);
6481c73c 2345 }
5365efbe 2346
3827f949
BC
2347 /* clocks and deps are already disabled in idle */
2348 if (oh->_state == _HWMOD_STATE_ENABLED) {
2349 _del_initiator_dep(oh, mpu_oh);
2350 /* XXX what about the other system initiators here? dma, dsp */
fa200222 2351 if (oh->flags & HWMOD_BLOCK_WFI)
f7b861b7 2352 cpu_idle_poll_ctrl(false);
9ebfd285
KH
2353 if (soc_ops.disable_module)
2354 soc_ops.disable_module(oh);
45c38252 2355 _disable_clocks(oh);
665d0013
RN
2356 if (oh->clkdm)
2357 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 2358 }
63c85238
PW
2359 /* XXX Should this code also force-disable the optional clocks? */
2360
9c8b0ec7
PW
2361 for (i = 0; i < oh->rst_lines_cnt; i++)
2362 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2363
8d9af88f
TL
2364 /* Mux pins to safe mode or use populated off mode values */
2365 if (oh->mux)
2366 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2367
2368 oh->_state = _HWMOD_STATE_DISABLED;
2369
2370 return 0;
2371}
2372
5e863c56
TL
2373static int of_dev_find_hwmod(struct device_node *np,
2374 struct omap_hwmod *oh)
2375{
2376 int count, i, res;
2377 const char *p;
2378
2379 count = of_property_count_strings(np, "ti,hwmods");
2380 if (count < 1)
2381 return -ENODEV;
2382
2383 for (i = 0; i < count; i++) {
2384 res = of_property_read_string_index(np, "ti,hwmods",
2385 i, &p);
2386 if (res)
2387 continue;
2388 if (!strcmp(p, oh->name)) {
2389 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2390 np->name, i, oh->name);
2391 return i;
2392 }
2393 }
2394
2395 return -ENODEV;
2396}
2397
079abade
SS
2398/**
2399 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2400 * @np: struct device_node *
2401 * @oh: struct omap_hwmod *
5e863c56
TL
2402 * @index: index of the entry found
2403 * @found: struct device_node * found or NULL
079abade
SS
2404 *
2405 * Parse the dt blob and find out needed hwmod. Recursive function is
2406 * implemented to take care hierarchical dt blob parsing.
5e863c56 2407 * Return: Returns 0 on success, -ENODEV when not found.
079abade 2408 */
5e863c56
TL
2409static int of_dev_hwmod_lookup(struct device_node *np,
2410 struct omap_hwmod *oh,
2411 int *index,
2412 struct device_node **found)
079abade 2413{
5e863c56
TL
2414 struct device_node *np0 = NULL;
2415 int res;
2416
2417 res = of_dev_find_hwmod(np, oh);
2418 if (res >= 0) {
2419 *found = np;
2420 *index = res;
2421 return 0;
2422 }
079abade
SS
2423
2424 for_each_child_of_node(np, np0) {
5e863c56
TL
2425 struct device_node *fc;
2426 int i;
2427
2428 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2429 if (res == 0) {
2430 *found = fc;
2431 *index = i;
2432 return 0;
079abade
SS
2433 }
2434 }
5e863c56
TL
2435
2436 *found = NULL;
2437 *index = 0;
2438
2439 return -ENODEV;
079abade
SS
2440}
2441
381d033a
PW
2442/**
2443 * _init_mpu_rt_base - populate the virtual address for a hwmod
2444 * @oh: struct omap_hwmod * to locate the virtual address
f92d9597 2445 * @data: (unused, caller should pass NULL)
5e863c56 2446 * @index: index of the reg entry iospace in device tree
f92d9597 2447 * @np: struct device_node * of the IP block's device node in the DT data
381d033a
PW
2448 *
2449 * Cache the virtual address used by the MPU to access this IP block's
2450 * registers. This address is needed early so the OCP registers that
2451 * are part of the device's address space can be ioremapped properly.
6423d6df
SA
2452 *
2453 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2454 * -ENXIO on absent or invalid register target address space.
381d033a 2455 */
f92d9597 2456static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
5e863c56 2457 int index, struct device_node *np)
381d033a 2458{
c9aafd23 2459 struct omap_hwmod_addr_space *mem;
079abade 2460 void __iomem *va_start = NULL;
c9aafd23
PW
2461
2462 if (!oh)
6423d6df 2463 return -EINVAL;
c9aafd23 2464
2221b5cd
PW
2465 _save_mpu_port_index(oh);
2466
381d033a 2467 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
6423d6df 2468 return -ENXIO;
381d033a 2469
c9aafd23
PW
2470 mem = _find_mpu_rt_addr_space(oh);
2471 if (!mem) {
2472 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2473 oh->name);
079abade
SS
2474
2475 /* Extract the IO space from device tree blob */
f92d9597 2476 if (!np)
6423d6df 2477 return -ENXIO;
079abade 2478
5e863c56 2479 va_start = of_iomap(np, index + oh->mpu_rt_idx);
079abade
SS
2480 } else {
2481 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
c9aafd23
PW
2482 }
2483
c9aafd23 2484 if (!va_start) {
5e863c56
TL
2485 if (mem)
2486 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2487 else
2488 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2489 oh->name, index, np->full_name);
6423d6df 2490 return -ENXIO;
c9aafd23
PW
2491 }
2492
2493 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2494 oh->name, va_start);
2495
2496 oh->_mpu_rt_va = va_start;
6423d6df 2497 return 0;
381d033a
PW
2498}
2499
2500/**
2501 * _init - initialize internal data for the hwmod @oh
2502 * @oh: struct omap_hwmod *
2503 * @n: (unused)
2504 *
2505 * Look up the clocks and the address space used by the MPU to access
2506 * registers belonging to the hwmod @oh. @oh must already be
2507 * registered at this point. This is the first of two phases for
2508 * hwmod initialization. Code called here does not touch any hardware
2509 * registers, it simply prepares internal data structures. Returns 0
6423d6df
SA
2510 * upon success or if the hwmod isn't registered or if the hwmod's
2511 * address space is not defined, or -EINVAL upon failure.
381d033a
PW
2512 */
2513static int __init _init(struct omap_hwmod *oh, void *data)
2514{
5e863c56 2515 int r, index;
f92d9597 2516 struct device_node *np = NULL;
381d033a
PW
2517
2518 if (oh->_state != _HWMOD_STATE_REGISTERED)
2519 return 0;
2520
5e863c56
TL
2521 if (of_have_populated_dt()) {
2522 struct device_node *bus;
2523
2524 bus = of_find_node_by_name(NULL, "ocp");
2525 if (!bus)
2526 return -ENODEV;
2527
2528 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2529 if (r)
2530 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2531 else if (np && index)
2532 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2533 oh->name, np->name);
2534 }
f92d9597 2535
6423d6df 2536 if (oh->class->sysc) {
5e863c56 2537 r = _init_mpu_rt_base(oh, NULL, index, np);
6423d6df
SA
2538 if (r < 0) {
2539 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2540 oh->name);
2541 return 0;
2542 }
2543 }
381d033a
PW
2544
2545 r = _init_clocks(oh, NULL);
c48cd659 2546 if (r < 0) {
381d033a
PW
2547 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2548 return -EINVAL;
2549 }
2550
3d36ad7e 2551 if (np) {
f92d9597
RN
2552 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2553 oh->flags |= HWMOD_INIT_NO_RESET;
2554 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2555 oh->flags |= HWMOD_INIT_NO_IDLE;
3d36ad7e 2556 }
f92d9597 2557
381d033a
PW
2558 oh->_state = _HWMOD_STATE_INITIALIZED;
2559
2560 return 0;
2561}
2562
63c85238 2563/**
64813c3f 2564 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2565 * @oh: struct omap_hwmod *
2566 *
64813c3f
PW
2567 * Set up the module's interface clocks. XXX This function is still mostly
2568 * a stub; implementing this properly requires iclk autoidle usecounting in
2569 * the clock code. No return value.
63c85238 2570 */
64813c3f 2571static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2572{
5d95dde7 2573 struct omap_hwmod_ocp_if *os;
11cd4b94 2574 struct list_head *p;
5d95dde7 2575 int i = 0;
381d033a 2576 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2577 return;
48d54f3f 2578
11cd4b94 2579 p = oh->slave_ports.next;
63c85238 2580
5d95dde7 2581 while (i < oh->slaves_cnt) {
11cd4b94 2582 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2583 if (!os->_clk)
64813c3f 2584 continue;
63c85238 2585
64813c3f
PW
2586 if (os->flags & OCPIF_SWSUP_IDLE) {
2587 /* XXX omap_iclk_deny_idle(c); */
2588 } else {
2589 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2590 clk_enable(os->_clk);
63c85238
PW
2591 }
2592 }
2593
64813c3f
PW
2594 return;
2595}
2596
2597/**
2598 * _setup_reset - reset an IP block during the setup process
2599 * @oh: struct omap_hwmod *
2600 *
2601 * Reset the IP block corresponding to the hwmod @oh during the setup
2602 * process. The IP block is first enabled so it can be successfully
2603 * reset. Returns 0 upon success or a negative error code upon
2604 * failure.
2605 */
2606static int __init _setup_reset(struct omap_hwmod *oh)
2607{
2608 int r;
2609
2610 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2611 return -EINVAL;
63c85238 2612
5fb3d522
PW
2613 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2614 return -EPERM;
2615
747834ab
PW
2616 if (oh->rst_lines_cnt == 0) {
2617 r = _enable(oh);
2618 if (r) {
3d0cb73e
JP
2619 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2620 oh->name, oh->_state);
747834ab
PW
2621 return -EINVAL;
2622 }
9a23dfe1 2623 }
63c85238 2624
2800852a 2625 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2626 r = _reset(oh);
2627
2628 return r;
2629}
2630
2631/**
2632 * _setup_postsetup - transition to the appropriate state after _setup
2633 * @oh: struct omap_hwmod *
2634 *
2635 * Place an IP block represented by @oh into a "post-setup" state --
2636 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2637 * this function is called at the end of _setup().) The postsetup
2638 * state for an IP block can be changed by calling
2639 * omap_hwmod_enter_postsetup_state() early in the boot process,
2640 * before one of the omap_hwmod_setup*() functions are called for the
2641 * IP block.
2642 *
2643 * The IP block stays in this state until a PM runtime-based driver is
2644 * loaded for that IP block. A post-setup state of IDLE is
2645 * appropriate for almost all IP blocks with runtime PM-enabled
2646 * drivers, since those drivers are able to enable the IP block. A
2647 * post-setup state of ENABLED is appropriate for kernels with PM
2648 * runtime disabled. The DISABLED state is appropriate for unusual IP
2649 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2650 * included, since the WDTIMER starts running on reset and will reset
2651 * the MPU if left active.
2652 *
2653 * This post-setup mechanism is deprecated. Once all of the OMAP
2654 * drivers have been converted to use PM runtime, and all of the IP
2655 * block data and interconnect data is available to the hwmod code, it
2656 * should be possible to replace this mechanism with a "lazy reset"
2657 * arrangement. In a "lazy reset" setup, each IP block is enabled
2658 * when the driver first probes, then all remaining IP blocks without
2659 * drivers are either shut down or enabled after the drivers have
2660 * loaded. However, this cannot take place until the above
2661 * preconditions have been met, since otherwise the late reset code
2662 * has no way of knowing which IP blocks are in use by drivers, and
2663 * which ones are unused.
2664 *
2665 * No return value.
2666 */
2667static void __init _setup_postsetup(struct omap_hwmod *oh)
2668{
2669 u8 postsetup_state;
2670
2671 if (oh->rst_lines_cnt > 0)
2672 return;
76e5589e 2673
2092e5cc
PW
2674 postsetup_state = oh->_postsetup_state;
2675 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2676 postsetup_state = _HWMOD_STATE_ENABLED;
2677
2678 /*
2679 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2680 * it should be set by the core code as a runtime flag during startup
2681 */
2682 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2683 (postsetup_state == _HWMOD_STATE_IDLE)) {
2684 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2685 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2686 }
2092e5cc
PW
2687
2688 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2689 _idle(oh);
2092e5cc
PW
2690 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2691 _shutdown(oh);
2692 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2693 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2694 oh->name, postsetup_state);
63c85238 2695
64813c3f
PW
2696 return;
2697}
2698
2699/**
2700 * _setup - prepare IP block hardware for use
2701 * @oh: struct omap_hwmod *
2702 * @n: (unused, pass NULL)
2703 *
2704 * Configure the IP block represented by @oh. This may include
2705 * enabling the IP block, resetting it, and placing it into a
2706 * post-setup state, depending on the type of IP block and applicable
2707 * flags. IP blocks are reset to prevent any previous configuration
2708 * by the bootloader or previous operating system from interfering
2709 * with power management or other parts of the system. The reset can
2710 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2711 * two phases for hwmod initialization. Code called here generally
2712 * affects the IP block hardware, or system integration hardware
2713 * associated with the IP block. Returns 0.
2714 */
2715static int __init _setup(struct omap_hwmod *oh, void *data)
2716{
2717 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2718 return 0;
2719
2720 _setup_iclk_autoidle(oh);
2721
2722 if (!_setup_reset(oh))
2723 _setup_postsetup(oh);
2724
63c85238
PW
2725 return 0;
2726}
2727
63c85238 2728/**
0102b627 2729 * _register - register a struct omap_hwmod
63c85238
PW
2730 * @oh: struct omap_hwmod *
2731 *
43b40992
PW
2732 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2733 * already has been registered by the same name; -EINVAL if the
2734 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2735 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2736 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2737 * success.
63c85238
PW
2738 *
2739 * XXX The data should be copied into bootmem, so the original data
2740 * should be marked __initdata and freed after init. This would allow
2741 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2742 * that the copy process would be relatively complex due to the large number
2743 * of substructures.
2744 */
01592df9 2745static int __init _register(struct omap_hwmod *oh)
63c85238 2746{
43b40992
PW
2747 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2748 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2749 return -EINVAL;
2750
63c85238
PW
2751 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2752
ce35b244
BC
2753 if (_lookup(oh->name))
2754 return -EEXIST;
63c85238 2755
63c85238
PW
2756 list_add_tail(&oh->node, &omap_hwmod_list);
2757
2221b5cd
PW
2758 INIT_LIST_HEAD(&oh->master_ports);
2759 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2760 spin_lock_init(&oh->_lock);
2092e5cc 2761
63c85238
PW
2762 oh->_state = _HWMOD_STATE_REGISTERED;
2763
569edd70
PW
2764 /*
2765 * XXX Rather than doing a strcmp(), this should test a flag
2766 * set in the hwmod data, inserted by the autogenerator code.
2767 */
2768 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2769 mpu_oh = oh;
63c85238 2770
569edd70 2771 return 0;
63c85238
PW
2772}
2773
2221b5cd
PW
2774/**
2775 * _alloc_links - return allocated memory for hwmod links
2776 * @ml: pointer to a struct omap_hwmod_link * for the master link
2777 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2778 *
2779 * Return pointers to two struct omap_hwmod_link records, via the
2780 * addresses pointed to by @ml and @sl. Will first attempt to return
2781 * memory allocated as part of a large initial block, but if that has
2782 * been exhausted, will allocate memory itself. Since ideally this
2783 * second allocation path will never occur, the number of these
2784 * 'supplemental' allocations will be logged when debugging is
2785 * enabled. Returns 0.
2786 */
2787static int __init _alloc_links(struct omap_hwmod_link **ml,
2788 struct omap_hwmod_link **sl)
2789{
2790 unsigned int sz;
2791
2792 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2793 *ml = &linkspace[free_ls++];
2794 *sl = &linkspace[free_ls++];
2795 return 0;
2796 }
2797
2798 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2799
2800 *sl = NULL;
b6cb5bab 2801 *ml = memblock_virt_alloc(sz, 0);
2221b5cd
PW
2802
2803 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2804
2805 ls_supp++;
2806 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2807 ls_supp * LINKS_PER_OCP_IF);
2808
2809 return 0;
2810};
2811
2812/**
2813 * _add_link - add an interconnect between two IP blocks
2814 * @oi: pointer to a struct omap_hwmod_ocp_if record
2815 *
2816 * Add struct omap_hwmod_link records connecting the master IP block
2817 * specified in @oi->master to @oi, and connecting the slave IP block
2818 * specified in @oi->slave to @oi. This code is assumed to run before
2819 * preemption or SMP has been enabled, thus avoiding the need for
2820 * locking in this code. Changes to this assumption will require
2821 * additional locking. Returns 0.
2822 */
2823static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2824{
2825 struct omap_hwmod_link *ml, *sl;
2826
2827 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2828 oi->slave->name);
2829
2830 _alloc_links(&ml, &sl);
2831
2832 ml->ocp_if = oi;
2833 INIT_LIST_HEAD(&ml->node);
2834 list_add(&ml->node, &oi->master->master_ports);
2835 oi->master->masters_cnt++;
2836
2837 sl->ocp_if = oi;
2838 INIT_LIST_HEAD(&sl->node);
2839 list_add(&sl->node, &oi->slave->slave_ports);
2840 oi->slave->slaves_cnt++;
2841
2842 return 0;
2843}
2844
2845/**
2846 * _register_link - register a struct omap_hwmod_ocp_if
2847 * @oi: struct omap_hwmod_ocp_if *
2848 *
2849 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2850 * has already been registered; -EINVAL if @oi is NULL or if the
2851 * record pointed to by @oi is missing required fields; or 0 upon
2852 * success.
2853 *
2854 * XXX The data should be copied into bootmem, so the original data
2855 * should be marked __initdata and freed after init. This would allow
2856 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2857 */
2858static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2859{
2860 if (!oi || !oi->master || !oi->slave || !oi->user)
2861 return -EINVAL;
2862
2863 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2864 return -EEXIST;
2865
2866 pr_debug("omap_hwmod: registering link from %s to %s\n",
2867 oi->master->name, oi->slave->name);
2868
2869 /*
2870 * Register the connected hwmods, if they haven't been
2871 * registered already
2872 */
2873 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2874 _register(oi->master);
2875
2876 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2877 _register(oi->slave);
2878
2879 _add_link(oi);
2880
2881 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2882
2883 return 0;
2884}
2885
2886/**
2887 * _alloc_linkspace - allocate large block of hwmod links
2888 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2889 *
2890 * Allocate a large block of struct omap_hwmod_link records. This
2891 * improves boot time significantly by avoiding the need to allocate
2892 * individual records one by one. If the number of records to
2893 * allocate in the block hasn't been manually specified, this function
2894 * will count the number of struct omap_hwmod_ocp_if records in @ois
2895 * and use that to determine the allocation size. For SoC families
2896 * that require multiple list registrations, such as OMAP3xxx, this
2897 * estimation process isn't optimal, so manual estimation is advised
2898 * in those cases. Returns -EEXIST if the allocation has already occurred
2899 * or 0 upon success.
2900 */
2901static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2902{
2903 unsigned int i = 0;
2904 unsigned int sz;
2905
2906 if (linkspace) {
2907 WARN(1, "linkspace already allocated\n");
2908 return -EEXIST;
2909 }
2910
2911 if (max_ls == 0)
2912 while (ois[i++])
2913 max_ls += LINKS_PER_OCP_IF;
2914
2915 sz = sizeof(struct omap_hwmod_link) * max_ls;
2916
2917 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2918 __func__, sz, max_ls);
2919
b6cb5bab 2920 linkspace = memblock_virt_alloc(sz, 0);
2221b5cd
PW
2921
2922 return 0;
2923}
0102b627 2924
8f6aa8ee
KH
2925/* Static functions intended only for use in soc_ops field function pointers */
2926
2927/**
9002e921 2928 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
8f6aa8ee
KH
2929 * @oh: struct omap_hwmod *
2930 *
2931 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2932 * does not have an IDLEST bit or if the module successfully leaves
2933 * slave idle; otherwise, pass along the return value of the
2934 * appropriate *_cm*_wait_module_ready() function.
2935 */
9002e921 2936static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
8f6aa8ee
KH
2937{
2938 if (!oh)
2939 return -EINVAL;
2940
2941 if (oh->flags & HWMOD_NO_IDLEST)
2942 return 0;
2943
2944 if (!_find_mpu_rt_port(oh))
2945 return 0;
2946
2947 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2948
021b6ff0
TK
2949 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2950 oh->prcm.omap2.idlest_reg_id,
2951 oh->prcm.omap2.idlest_idle_bit);
ff4ae5d9
PW
2952}
2953
8f6aa8ee
KH
2954/**
2955 * _omap4_wait_target_ready - wait for a module to leave slave idle
2956 * @oh: struct omap_hwmod *
2957 *
2958 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2959 * does not have an IDLEST bit or if the module successfully leaves
2960 * slave idle; otherwise, pass along the return value of the
2961 * appropriate *_cm*_wait_module_ready() function.
2962 */
2963static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2964{
2b026d13 2965 if (!oh)
8f6aa8ee
KH
2966 return -EINVAL;
2967
2b026d13 2968 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
8f6aa8ee
KH
2969 return 0;
2970
2971 if (!_find_mpu_rt_port(oh))
2972 return 0;
2973
2974 /* XXX check module SIDLEMODE, hardreset status */
2975
021b6ff0
TK
2976 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2977 oh->clkdm->cm_inst,
2978 oh->prcm.omap4.clkctrl_offs, 0);
8f6aa8ee
KH
2979}
2980
1688bf19
VH
2981/**
2982 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2983 * @oh: struct omap_hwmod *
2984 *
2985 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2986 * does not have an IDLEST bit or if the module successfully leaves
2987 * slave idle; otherwise, pass along the return value of the
2988 * appropriate *_cm*_wait_module_ready() function.
2989 */
2990static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2991{
2992 if (!oh || !oh->clkdm)
2993 return -EINVAL;
2994
2995 if (oh->flags & HWMOD_NO_IDLEST)
2996 return 0;
2997
2998 if (!_find_mpu_rt_port(oh))
2999 return 0;
3000
3001 /* XXX check module SIDLEMODE, hardreset status */
3002
021b6ff0
TK
3003 return omap_cm_wait_module_ready(0, oh->clkdm->cm_inst,
3004 oh->prcm.omap4.clkctrl_offs, 0);
1688bf19
VH
3005}
3006
b8249cf2
KH
3007/**
3008 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3009 * @oh: struct omap_hwmod * to assert hardreset
3010 * @ohri: hardreset line data
3011 *
3012 * Call omap2_prm_assert_hardreset() with parameters extracted from
3013 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3014 * use as an soc_ops function pointer. Passes along the return value
3015 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
3016 * for removal when the PRM code is moved into drivers/.
3017 */
3018static int _omap2_assert_hardreset(struct omap_hwmod *oh,
3019 struct omap_hwmod_rst_info *ohri)
3020{
3021 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
3022 ohri->rst_shift);
3023}
3024
3025/**
3026 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3027 * @oh: struct omap_hwmod * to deassert hardreset
3028 * @ohri: hardreset line data
3029 *
3030 * Call omap2_prm_deassert_hardreset() with parameters extracted from
3031 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3032 * use as an soc_ops function pointer. Passes along the return value
3033 * from omap2_prm_deassert_hardreset(). XXX This function is
3034 * scheduled for removal when the PRM code is moved into drivers/.
3035 */
3036static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
3037 struct omap_hwmod_rst_info *ohri)
3038{
3039 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
3040 ohri->rst_shift,
3041 ohri->st_shift);
3042}
3043
3044/**
3045 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
3046 * @oh: struct omap_hwmod * to test hardreset
3047 * @ohri: hardreset line data
3048 *
3049 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
3050 * from the hwmod @oh and the hardreset line data @ohri. Only
3051 * intended for use as an soc_ops function pointer. Passes along the
3052 * return value from omap2_prm_is_hardreset_asserted(). XXX This
3053 * function is scheduled for removal when the PRM code is moved into
3054 * drivers/.
3055 */
3056static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
3057 struct omap_hwmod_rst_info *ohri)
3058{
3059 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
3060 ohri->st_shift);
3061}
3062
3063/**
3064 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3065 * @oh: struct omap_hwmod * to assert hardreset
3066 * @ohri: hardreset line data
3067 *
3068 * Call omap4_prminst_assert_hardreset() with parameters extracted
3069 * from the hwmod @oh and the hardreset line data @ohri. Only
3070 * intended for use as an soc_ops function pointer. Passes along the
3071 * return value from omap4_prminst_assert_hardreset(). XXX This
3072 * function is scheduled for removal when the PRM code is moved into
3073 * drivers/.
3074 */
3075static int _omap4_assert_hardreset(struct omap_hwmod *oh,
3076 struct omap_hwmod_rst_info *ohri)
b8249cf2 3077{
07b3a139
PW
3078 if (!oh->clkdm)
3079 return -EINVAL;
3080
b8249cf2
KH
3081 return omap4_prminst_assert_hardreset(ohri->rst_shift,
3082 oh->clkdm->pwrdm.ptr->prcm_partition,
3083 oh->clkdm->pwrdm.ptr->prcm_offs,
3084 oh->prcm.omap4.rstctrl_offs);
3085}
3086
3087/**
3088 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3089 * @oh: struct omap_hwmod * to deassert hardreset
3090 * @ohri: hardreset line data
3091 *
3092 * Call omap4_prminst_deassert_hardreset() with parameters extracted
3093 * from the hwmod @oh and the hardreset line data @ohri. Only
3094 * intended for use as an soc_ops function pointer. Passes along the
3095 * return value from omap4_prminst_deassert_hardreset(). XXX This
3096 * function is scheduled for removal when the PRM code is moved into
3097 * drivers/.
3098 */
3099static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
3100 struct omap_hwmod_rst_info *ohri)
3101{
07b3a139
PW
3102 if (!oh->clkdm)
3103 return -EINVAL;
3104
b8249cf2
KH
3105 if (ohri->st_shift)
3106 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3107 oh->name, ohri->name);
3108 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
3109 oh->clkdm->pwrdm.ptr->prcm_partition,
3110 oh->clkdm->pwrdm.ptr->prcm_offs,
3111 oh->prcm.omap4.rstctrl_offs);
3112}
3113
3114/**
3115 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
3116 * @oh: struct omap_hwmod * to test hardreset
3117 * @ohri: hardreset line data
3118 *
3119 * Call omap4_prminst_is_hardreset_asserted() with parameters
3120 * extracted from the hwmod @oh and the hardreset line data @ohri.
3121 * Only intended for use as an soc_ops function pointer. Passes along
3122 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3123 * This function is scheduled for removal when the PRM code is moved
3124 * into drivers/.
3125 */
3126static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3127 struct omap_hwmod_rst_info *ohri)
3128{
07b3a139
PW
3129 if (!oh->clkdm)
3130 return -EINVAL;
3131
b8249cf2
KH
3132 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
3133 oh->clkdm->pwrdm.ptr->prcm_partition,
3134 oh->clkdm->pwrdm.ptr->prcm_offs,
3135 oh->prcm.omap4.rstctrl_offs);
3136}
3137
1688bf19
VH
3138/**
3139 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3140 * @oh: struct omap_hwmod * to assert hardreset
3141 * @ohri: hardreset line data
3142 *
3143 * Call am33xx_prminst_assert_hardreset() with parameters extracted
3144 * from the hwmod @oh and the hardreset line data @ohri. Only
3145 * intended for use as an soc_ops function pointer. Passes along the
3146 * return value from am33xx_prminst_assert_hardreset(). XXX This
3147 * function is scheduled for removal when the PRM code is moved into
3148 * drivers/.
3149 */
3150static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
3151 struct omap_hwmod_rst_info *ohri)
3152
3153{
3154 return am33xx_prm_assert_hardreset(ohri->rst_shift,
3155 oh->clkdm->pwrdm.ptr->prcm_offs,
3156 oh->prcm.omap4.rstctrl_offs);
3157}
3158
3159/**
3160 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3161 * @oh: struct omap_hwmod * to deassert hardreset
3162 * @ohri: hardreset line data
3163 *
3164 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3165 * from the hwmod @oh and the hardreset line data @ohri. Only
3166 * intended for use as an soc_ops function pointer. Passes along the
3167 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3168 * function is scheduled for removal when the PRM code is moved into
3169 * drivers/.
3170 */
3171static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3172 struct omap_hwmod_rst_info *ohri)
3173{
1688bf19 3174 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
3c06f1b8 3175 ohri->st_shift,
1688bf19
VH
3176 oh->clkdm->pwrdm.ptr->prcm_offs,
3177 oh->prcm.omap4.rstctrl_offs,
3178 oh->prcm.omap4.rstst_offs);
3179}
3180
3181/**
3182 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
3183 * @oh: struct omap_hwmod * to test hardreset
3184 * @ohri: hardreset line data
3185 *
3186 * Call am33xx_prminst_is_hardreset_asserted() with parameters
3187 * extracted from the hwmod @oh and the hardreset line data @ohri.
3188 * Only intended for use as an soc_ops function pointer. Passes along
3189 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
3190 * This function is scheduled for removal when the PRM code is moved
3191 * into drivers/.
3192 */
3193static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
3194 struct omap_hwmod_rst_info *ohri)
3195{
3196 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3197 oh->clkdm->pwrdm.ptr->prcm_offs,
3198 oh->prcm.omap4.rstctrl_offs);
3199}
3200
0102b627
BC
3201/* Public functions */
3202
3203u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3204{
3205 if (oh->flags & HWMOD_16BIT_REG)
edfaf05c 3206 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
0102b627 3207 else
edfaf05c 3208 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
0102b627
BC
3209}
3210
3211void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3212{
3213 if (oh->flags & HWMOD_16BIT_REG)
edfaf05c 3214 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
0102b627 3215 else
edfaf05c 3216 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
0102b627
BC
3217}
3218
6d3c55fd
A
3219/**
3220 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3221 * @oh: struct omap_hwmod *
3222 *
3223 * This is a public function exposed to drivers. Some drivers may need to do
3224 * some settings before and after resetting the device. Those drivers after
3225 * doing the necessary settings could use this function to start a reset by
3226 * setting the SYSCONFIG.SOFTRESET bit.
3227 */
3228int omap_hwmod_softreset(struct omap_hwmod *oh)
3229{
3c55c1ba
PW
3230 u32 v;
3231 int ret;
3232
3233 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
3234 return -EINVAL;
3235
3c55c1ba
PW
3236 v = oh->_sysc_cache;
3237 ret = _set_softreset(oh, &v);
3238 if (ret)
3239 goto error;
3240 _write_sysconfig(v, oh);
3241
313a76ee
RQ
3242 ret = _clear_softreset(oh, &v);
3243 if (ret)
3244 goto error;
3245 _write_sysconfig(v, oh);
3246
3c55c1ba
PW
3247error:
3248 return ret;
6d3c55fd
A
3249}
3250
63c85238
PW
3251/**
3252 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3253 * @name: name of the omap_hwmod to look up
3254 *
3255 * Given a @name of an omap_hwmod, return a pointer to the registered
3256 * struct omap_hwmod *, or NULL upon error.
3257 */
3258struct omap_hwmod *omap_hwmod_lookup(const char *name)
3259{
3260 struct omap_hwmod *oh;
3261
3262 if (!name)
3263 return NULL;
3264
63c85238 3265 oh = _lookup(name);
63c85238
PW
3266
3267 return oh;
3268}
3269
3270/**
3271 * omap_hwmod_for_each - call function for each registered omap_hwmod
3272 * @fn: pointer to a callback function
97d60162 3273 * @data: void * data to pass to callback function
63c85238
PW
3274 *
3275 * Call @fn for each registered omap_hwmod, passing @data to each
3276 * function. @fn must return 0 for success or any other value for
3277 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3278 * will stop and the non-zero return value will be passed to the
3279 * caller of omap_hwmod_for_each(). @fn is called with
3280 * omap_hwmod_for_each() held.
3281 */
97d60162
PW
3282int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3283 void *data)
63c85238
PW
3284{
3285 struct omap_hwmod *temp_oh;
30ebad9d 3286 int ret = 0;
63c85238
PW
3287
3288 if (!fn)
3289 return -EINVAL;
3290
63c85238 3291 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 3292 ret = (*fn)(temp_oh, data);
63c85238
PW
3293 if (ret)
3294 break;
3295 }
63c85238
PW
3296
3297 return ret;
3298}
3299
2221b5cd
PW
3300/**
3301 * omap_hwmod_register_links - register an array of hwmod links
3302 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3303 *
3304 * Intended to be called early in boot before the clock framework is
3305 * initialized. If @ois is not null, will register all omap_hwmods
9ebfd285
KH
3306 * listed in @ois that are valid for this chip. Returns -EINVAL if
3307 * omap_hwmod_init() hasn't been called before calling this function,
3308 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3309 * success.
2221b5cd
PW
3310 */
3311int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3312{
3313 int r, i;
3314
9ebfd285
KH
3315 if (!inited)
3316 return -EINVAL;
3317
2221b5cd
PW
3318 if (!ois)
3319 return 0;
3320
f7f7a29b
RN
3321 if (ois[0] == NULL) /* Empty list */
3322 return 0;
3323
2221b5cd
PW
3324 if (!linkspace) {
3325 if (_alloc_linkspace(ois)) {
3326 pr_err("omap_hwmod: could not allocate link space\n");
3327 return -ENOMEM;
3328 }
3329 }
3330
3331 i = 0;
3332 do {
3333 r = _register_link(ois[i]);
3334 WARN(r && r != -EEXIST,
3335 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3336 ois[i]->master->name, ois[i]->slave->name, r);
3337 } while (ois[++i]);
3338
3339 return 0;
3340}
3341
381d033a
PW
3342/**
3343 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3344 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3345 *
3346 * If the hwmod data corresponding to the MPU subsystem IP block
3347 * hasn't been initialized and set up yet, do so now. This must be
3348 * done first since sleep dependencies may be added from other hwmods
3349 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3350 * return value.
63c85238 3351 */
381d033a 3352static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 3353{
381d033a
PW
3354 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3355 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3356 __func__, MPU_INITIATOR_NAME);
3357 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3358 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
3359}
3360
63c85238 3361/**
a2debdbd
PW
3362 * omap_hwmod_setup_one - set up a single hwmod
3363 * @oh_name: const char * name of the already-registered hwmod to set up
3364 *
381d033a
PW
3365 * Initialize and set up a single hwmod. Intended to be used for a
3366 * small number of early devices, such as the timer IP blocks used for
3367 * the scheduler clock. Must be called after omap2_clk_init().
3368 * Resolves the struct clk names to struct clk pointers for each
3369 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3370 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
3371 */
3372int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
3373{
3374 struct omap_hwmod *oh;
63c85238 3375
a2debdbd
PW
3376 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3377
a2debdbd
PW
3378 oh = _lookup(oh_name);
3379 if (!oh) {
3380 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3381 return -EINVAL;
3382 }
63c85238 3383
381d033a 3384 _ensure_mpu_hwmod_is_setup(oh);
63c85238 3385
381d033a 3386 _init(oh, NULL);
a2debdbd
PW
3387 _setup(oh, NULL);
3388
63c85238
PW
3389 return 0;
3390}
3391
3392/**
381d033a 3393 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 3394 *
381d033a
PW
3395 * Initialize and set up all IP blocks registered with the hwmod code.
3396 * Must be called after omap2_clk_init(). Resolves the struct clk
3397 * names to struct clk pointers for each registered omap_hwmod. Also
3398 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 3399 */
550c8092 3400static int __init omap_hwmod_setup_all(void)
63c85238 3401{
381d033a 3402 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 3403
381d033a 3404 omap_hwmod_for_each(_init, NULL);
2092e5cc 3405 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
3406
3407 return 0;
3408}
b76c8b19 3409omap_core_initcall(omap_hwmod_setup_all);
63c85238 3410
63c85238
PW
3411/**
3412 * omap_hwmod_enable - enable an omap_hwmod
3413 * @oh: struct omap_hwmod *
3414 *
74ff3a68 3415 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
3416 * Returns -EINVAL on error or passes along the return value from _enable().
3417 */
3418int omap_hwmod_enable(struct omap_hwmod *oh)
3419{
3420 int r;
dc6d1cda 3421 unsigned long flags;
63c85238
PW
3422
3423 if (!oh)
3424 return -EINVAL;
3425
dc6d1cda
PW
3426 spin_lock_irqsave(&oh->_lock, flags);
3427 r = _enable(oh);
3428 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3429
3430 return r;
3431}
3432
3433/**
3434 * omap_hwmod_idle - idle an omap_hwmod
3435 * @oh: struct omap_hwmod *
3436 *
74ff3a68 3437 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
3438 * Returns -EINVAL on error or passes along the return value from _idle().
3439 */
3440int omap_hwmod_idle(struct omap_hwmod *oh)
3441{
dc6d1cda
PW
3442 unsigned long flags;
3443
63c85238
PW
3444 if (!oh)
3445 return -EINVAL;
3446
dc6d1cda
PW
3447 spin_lock_irqsave(&oh->_lock, flags);
3448 _idle(oh);
3449 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3450
3451 return 0;
3452}
3453
3454/**
3455 * omap_hwmod_shutdown - shutdown an omap_hwmod
3456 * @oh: struct omap_hwmod *
3457 *
74ff3a68 3458 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
3459 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3460 * the return value from _shutdown().
3461 */
3462int omap_hwmod_shutdown(struct omap_hwmod *oh)
3463{
dc6d1cda
PW
3464 unsigned long flags;
3465
63c85238
PW
3466 if (!oh)
3467 return -EINVAL;
3468
dc6d1cda 3469 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3470 _shutdown(oh);
dc6d1cda 3471 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3472
3473 return 0;
3474}
3475
3476/**
3477 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3478 * @oh: struct omap_hwmod *oh
3479 *
3480 * Intended to be called by the omap_device code.
3481 */
3482int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3483{
dc6d1cda
PW
3484 unsigned long flags;
3485
3486 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3487 _enable_clocks(oh);
dc6d1cda 3488 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3489
3490 return 0;
3491}
3492
3493/**
3494 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3495 * @oh: struct omap_hwmod *oh
3496 *
3497 * Intended to be called by the omap_device code.
3498 */
3499int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3500{
dc6d1cda
PW
3501 unsigned long flags;
3502
3503 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3504 _disable_clocks(oh);
dc6d1cda 3505 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3506
3507 return 0;
3508}
3509
3510/**
3511 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3512 * @oh: struct omap_hwmod *oh
3513 *
3514 * Intended to be called by drivers and core code when all posted
3515 * writes to a device must complete before continuing further
3516 * execution (for example, after clearing some device IRQSTATUS
3517 * register bits)
3518 *
3519 * XXX what about targets with multiple OCP threads?
3520 */
3521void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3522{
3523 BUG_ON(!oh);
3524
43b40992 3525 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
3526 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3527 oh->name);
63c85238
PW
3528 return;
3529 }
3530
3531 /*
3532 * Forces posted writes to complete on the OCP thread handling
3533 * register writes
3534 */
cc7a1d2a 3535 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
3536}
3537
3538/**
3539 * omap_hwmod_reset - reset the hwmod
3540 * @oh: struct omap_hwmod *
3541 *
3542 * Under some conditions, a driver may wish to reset the entire device.
3543 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 3544 * the return value from _reset().
63c85238
PW
3545 */
3546int omap_hwmod_reset(struct omap_hwmod *oh)
3547{
3548 int r;
dc6d1cda 3549 unsigned long flags;
63c85238 3550
9b579114 3551 if (!oh)
63c85238
PW
3552 return -EINVAL;
3553
dc6d1cda 3554 spin_lock_irqsave(&oh->_lock, flags);
63c85238 3555 r = _reset(oh);
dc6d1cda 3556 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3557
3558 return r;
3559}
3560
5e8370f1
PW
3561/*
3562 * IP block data retrieval functions
3563 */
3564
63c85238
PW
3565/**
3566 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3567 * @oh: struct omap_hwmod *
dad4191d 3568 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
63c85238
PW
3569 *
3570 * Count the number of struct resource array elements necessary to
3571 * contain omap_hwmod @oh resources. Intended to be called by code
3572 * that registers omap_devices. Intended to be used to determine the
3573 * size of a dynamically-allocated struct resource array, before
3574 * calling omap_hwmod_fill_resources(). Returns the number of struct
3575 * resource array elements needed.
3576 *
3577 * XXX This code is not optimized. It could attempt to merge adjacent
3578 * resource IDs.
3579 *
3580 */
dad4191d 3581int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
63c85238 3582{
dad4191d 3583 int ret = 0;
63c85238 3584
dad4191d
PU
3585 if (flags & IORESOURCE_IRQ)
3586 ret += _count_mpu_irqs(oh);
63c85238 3587
dad4191d
PU
3588 if (flags & IORESOURCE_DMA)
3589 ret += _count_sdma_reqs(oh);
2221b5cd 3590
dad4191d
PU
3591 if (flags & IORESOURCE_MEM) {
3592 int i = 0;
3593 struct omap_hwmod_ocp_if *os;
3594 struct list_head *p = oh->slave_ports.next;
3595
3596 while (i < oh->slaves_cnt) {
3597 os = _fetch_next_ocp_if(&p, &i);
3598 ret += _count_ocp_if_addr_spaces(os);
3599 }
5d95dde7 3600 }
63c85238
PW
3601
3602 return ret;
3603}
3604
3605/**
3606 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3607 * @oh: struct omap_hwmod *
3608 * @res: pointer to the first element of an array of struct resource to fill
3609 *
3610 * Fill the struct resource array @res with resource data from the
3611 * omap_hwmod @oh. Intended to be called by code that registers
3612 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3613 * number of array elements filled.
3614 */
3615int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3616{
5d95dde7 3617 struct omap_hwmod_ocp_if *os;
11cd4b94 3618 struct list_head *p;
5d95dde7 3619 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
3620 int r = 0;
3621
3622 /* For each IRQ, DMA, memory area, fill in array.*/
3623
212738a4
PW
3624 mpu_irqs_cnt = _count_mpu_irqs(oh);
3625 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
3626 (res + r)->name = (oh->mpu_irqs + i)->name;
3627 (res + r)->start = (oh->mpu_irqs + i)->irq;
3628 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
3629 (res + r)->flags = IORESOURCE_IRQ;
3630 r++;
3631 }
3632
bc614958
PW
3633 sdma_reqs_cnt = _count_sdma_reqs(oh);
3634 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
3635 (res + r)->name = (oh->sdma_reqs + i)->name;
3636 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3637 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
3638 (res + r)->flags = IORESOURCE_DMA;
3639 r++;
3640 }
3641
11cd4b94 3642 p = oh->slave_ports.next;
2221b5cd 3643
5d95dde7
PW
3644 i = 0;
3645 while (i < oh->slaves_cnt) {
11cd4b94 3646 os = _fetch_next_ocp_if(&p, &i);
78183f3f 3647 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 3648
78183f3f 3649 for (j = 0; j < addr_cnt; j++) {
cd503802 3650 (res + r)->name = (os->addr + j)->name;
63c85238
PW
3651 (res + r)->start = (os->addr + j)->pa_start;
3652 (res + r)->end = (os->addr + j)->pa_end;
3653 (res + r)->flags = IORESOURCE_MEM;
3654 r++;
3655 }
3656 }
3657
3658 return r;
3659}
3660
b82b04e8
VH
3661/**
3662 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3663 * @oh: struct omap_hwmod *
3664 * @res: pointer to the array of struct resource to fill
3665 *
3666 * Fill the struct resource array @res with dma resource data from the
3667 * omap_hwmod @oh. Intended to be called by code that registers
3668 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3669 * number of array elements filled.
3670 */
3671int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3672{
3673 int i, sdma_reqs_cnt;
3674 int r = 0;
3675
3676 sdma_reqs_cnt = _count_sdma_reqs(oh);
3677 for (i = 0; i < sdma_reqs_cnt; i++) {
3678 (res + r)->name = (oh->sdma_reqs + i)->name;
3679 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3680 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3681 (res + r)->flags = IORESOURCE_DMA;
3682 r++;
3683 }
3684
3685 return r;
3686}
3687
5e8370f1
PW
3688/**
3689 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3690 * @oh: struct omap_hwmod * to operate on
3691 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3692 * @name: pointer to the name of the data to fetch (optional)
3693 * @rsrc: pointer to a struct resource, allocated by the caller
3694 *
3695 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3696 * data for the IP block pointed to by @oh. The data will be filled
3697 * into a struct resource record pointed to by @rsrc. The struct
3698 * resource must be allocated by the caller. When @name is non-null,
3699 * the data associated with the matching entry in the IRQ/SDMA/address
3700 * space hwmod data arrays will be returned. If @name is null, the
3701 * first array entry will be returned. Data order is not meaningful
3702 * in hwmod data, so callers are strongly encouraged to use a non-null
3703 * @name whenever possible to avoid unpredictable effects if hwmod
3704 * data is later added that causes data ordering to change. This
3705 * function is only intended for use by OMAP core code. Device
3706 * drivers should not call this function - the appropriate bus-related
3707 * data accessor functions should be used instead. Returns 0 upon
3708 * success or a negative error code upon error.
3709 */
3710int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3711 const char *name, struct resource *rsrc)
3712{
3713 int r;
3714 unsigned int irq, dma;
3715 u32 pa_start, pa_end;
3716
3717 if (!oh || !rsrc)
3718 return -EINVAL;
3719
3720 if (type == IORESOURCE_IRQ) {
3721 r = _get_mpu_irq_by_name(oh, name, &irq);
3722 if (r)
3723 return r;
3724
3725 rsrc->start = irq;
3726 rsrc->end = irq;
3727 } else if (type == IORESOURCE_DMA) {
3728 r = _get_sdma_req_by_name(oh, name, &dma);
3729 if (r)
3730 return r;
3731
3732 rsrc->start = dma;
3733 rsrc->end = dma;
3734 } else if (type == IORESOURCE_MEM) {
3735 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3736 if (r)
3737 return r;
3738
3739 rsrc->start = pa_start;
3740 rsrc->end = pa_end;
3741 } else {
3742 return -EINVAL;
3743 }
3744
3745 rsrc->flags = type;
3746 rsrc->name = name;
3747
3748 return 0;
3749}
3750
63c85238
PW
3751/**
3752 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3753 * @oh: struct omap_hwmod *
3754 *
3755 * Return the powerdomain pointer associated with the OMAP module
3756 * @oh's main clock. If @oh does not have a main clk, return the
3757 * powerdomain associated with the interface clock associated with the
3758 * module's MPU port. (XXX Perhaps this should use the SDMA port
3759 * instead?) Returns NULL on error, or a struct powerdomain * on
3760 * success.
3761 */
3762struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3763{
3764 struct clk *c;
2d6141ba 3765 struct omap_hwmod_ocp_if *oi;
f5dd3bb5 3766 struct clockdomain *clkdm;
f5dd3bb5 3767 struct clk_hw_omap *clk;
63c85238
PW
3768
3769 if (!oh)
3770 return NULL;
3771
f5dd3bb5
RN
3772 if (oh->clkdm)
3773 return oh->clkdm->pwrdm.ptr;
3774
63c85238
PW
3775 if (oh->_clk) {
3776 c = oh->_clk;
3777 } else {
2d6141ba
PW
3778 oi = _find_mpu_rt_port(oh);
3779 if (!oi)
63c85238 3780 return NULL;
2d6141ba 3781 c = oi->_clk;
63c85238
PW
3782 }
3783
f5dd3bb5
RN
3784 clk = to_clk_hw_omap(__clk_get_hw(c));
3785 clkdm = clk->clkdm;
f5dd3bb5 3786 if (!clkdm)
d5647c18
TG
3787 return NULL;
3788
f5dd3bb5 3789 return clkdm->pwrdm.ptr;
63c85238
PW
3790}
3791
db2a60bf
PW
3792/**
3793 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3794 * @oh: struct omap_hwmod *
3795 *
3796 * Returns the virtual address corresponding to the beginning of the
3797 * module's register target, in the address range that is intended to
3798 * be used by the MPU. Returns the virtual address upon success or NULL
3799 * upon error.
3800 */
3801void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3802{
3803 if (!oh)
3804 return NULL;
3805
3806 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3807 return NULL;
3808
3809 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3810 return NULL;
3811
3812 return oh->_mpu_rt_va;
3813}
3814
63c85238
PW
3815/**
3816 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3817 * @oh: struct omap_hwmod *
3818 * @init_oh: struct omap_hwmod * (initiator)
3819 *
3820 * Add a sleep dependency between the initiator @init_oh and @oh.
3821 * Intended to be called by DSP/Bridge code via platform_data for the
3822 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3823 * code needs to add/del initiator dependencies dynamically
3824 * before/after accessing a device. Returns the return value from
3825 * _add_initiator_dep().
3826 *
3827 * XXX Keep a usecount in the clockdomain code
3828 */
3829int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3830 struct omap_hwmod *init_oh)
3831{
3832 return _add_initiator_dep(oh, init_oh);
3833}
3834
3835/*
3836 * XXX what about functions for drivers to save/restore ocp_sysconfig
3837 * for context save/restore operations?
3838 */
3839
3840/**
3841 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3842 * @oh: struct omap_hwmod *
3843 * @init_oh: struct omap_hwmod * (initiator)
3844 *
3845 * Remove a sleep dependency between the initiator @init_oh and @oh.
3846 * Intended to be called by DSP/Bridge code via platform_data for the
3847 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3848 * code needs to add/del initiator dependencies dynamically
3849 * before/after accessing a device. Returns the return value from
3850 * _del_initiator_dep().
3851 *
3852 * XXX Keep a usecount in the clockdomain code
3853 */
3854int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3855 struct omap_hwmod *init_oh)
3856{
3857 return _del_initiator_dep(oh, init_oh);
3858}
3859
63c85238
PW
3860/**
3861 * omap_hwmod_enable_wakeup - allow device to wake up the system
3862 * @oh: struct omap_hwmod *
3863 *
3864 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3865 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3866 * this IP block if it has dynamic mux entries. Eventually this
3867 * should set PRCM wakeup registers to cause the PRCM to receive
3868 * wakeup events from the module. Does not set any wakeup routing
3869 * registers beyond this point - if the module is to wake up any other
3870 * module or subsystem, that must be set separately. Called by
3871 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3872 */
3873int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3874{
dc6d1cda 3875 unsigned long flags;
5a7ddcbd 3876 u32 v;
dc6d1cda 3877
dc6d1cda 3878 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3879
3880 if (oh->class->sysc &&
3881 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3882 v = oh->_sysc_cache;
3883 _enable_wakeup(oh, &v);
3884 _write_sysconfig(v, oh);
3885 }
3886
eceec009 3887 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3888 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3889
3890 return 0;
3891}
3892
3893/**
3894 * omap_hwmod_disable_wakeup - prevent device from waking the system
3895 * @oh: struct omap_hwmod *
3896 *
3897 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3898 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3899 * events for this IP block if it has dynamic mux entries. Eventually
3900 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3901 * wakeup events from the module. Does not set any wakeup routing
3902 * registers beyond this point - if the module is to wake up any other
3903 * module or subsystem, that must be set separately. Called by
3904 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3905 */
3906int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3907{
dc6d1cda 3908 unsigned long flags;
5a7ddcbd 3909 u32 v;
dc6d1cda 3910
dc6d1cda 3911 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3912
3913 if (oh->class->sysc &&
3914 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3915 v = oh->_sysc_cache;
3916 _disable_wakeup(oh, &v);
3917 _write_sysconfig(v, oh);
3918 }
3919
eceec009 3920 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3921 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3922
3923 return 0;
3924}
43b40992 3925
aee48e3c
PW
3926/**
3927 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3928 * contained in the hwmod module.
3929 * @oh: struct omap_hwmod *
3930 * @name: name of the reset line to lookup and assert
3931 *
3932 * Some IP like dsp, ipu or iva contain processor that require
3933 * an HW reset line to be assert / deassert in order to enable fully
3934 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3935 * yet supported on this OMAP; otherwise, passes along the return value
3936 * from _assert_hardreset().
3937 */
3938int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3939{
3940 int ret;
dc6d1cda 3941 unsigned long flags;
aee48e3c
PW
3942
3943 if (!oh)
3944 return -EINVAL;
3945
dc6d1cda 3946 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3947 ret = _assert_hardreset(oh, name);
dc6d1cda 3948 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3949
3950 return ret;
3951}
3952
3953/**
3954 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3955 * contained in the hwmod module.
3956 * @oh: struct omap_hwmod *
3957 * @name: name of the reset line to look up and deassert
3958 *
3959 * Some IP like dsp, ipu or iva contain processor that require
3960 * an HW reset line to be assert / deassert in order to enable fully
3961 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3962 * yet supported on this OMAP; otherwise, passes along the return value
3963 * from _deassert_hardreset().
3964 */
3965int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3966{
3967 int ret;
dc6d1cda 3968 unsigned long flags;
aee48e3c
PW
3969
3970 if (!oh)
3971 return -EINVAL;
3972
dc6d1cda 3973 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3974 ret = _deassert_hardreset(oh, name);
dc6d1cda 3975 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3976
3977 return ret;
3978}
3979
3980/**
3981 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3982 * contained in the hwmod module
3983 * @oh: struct omap_hwmod *
3984 * @name: name of the reset line to look up and read
3985 *
3986 * Return the current state of the hwmod @oh's reset line named @name:
3987 * returns -EINVAL upon parameter error or if this operation
3988 * is unsupported on the current OMAP; otherwise, passes along the return
3989 * value from _read_hardreset().
3990 */
3991int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3992{
3993 int ret;
dc6d1cda 3994 unsigned long flags;
aee48e3c
PW
3995
3996 if (!oh)
3997 return -EINVAL;
3998
dc6d1cda 3999 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 4000 ret = _read_hardreset(oh, name);
dc6d1cda 4001 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
4002
4003 return ret;
4004}
4005
4006
43b40992
PW
4007/**
4008 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
4009 * @classname: struct omap_hwmod_class name to search for
4010 * @fn: callback function pointer to call for each hwmod in class @classname
4011 * @user: arbitrary context data to pass to the callback function
4012 *
ce35b244
BC
4013 * For each omap_hwmod of class @classname, call @fn.
4014 * If the callback function returns something other than
43b40992
PW
4015 * zero, the iterator is terminated, and the callback function's return
4016 * value is passed back to the caller. Returns 0 upon success, -EINVAL
4017 * if @classname or @fn are NULL, or passes back the error code from @fn.
4018 */
4019int omap_hwmod_for_each_by_class(const char *classname,
4020 int (*fn)(struct omap_hwmod *oh,
4021 void *user),
4022 void *user)
4023{
4024 struct omap_hwmod *temp_oh;
4025 int ret = 0;
4026
4027 if (!classname || !fn)
4028 return -EINVAL;
4029
4030 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4031 __func__, classname);
4032
43b40992
PW
4033 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
4034 if (!strcmp(temp_oh->class->name, classname)) {
4035 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4036 __func__, temp_oh->name);
4037 ret = (*fn)(temp_oh, user);
4038 if (ret)
4039 break;
4040 }
4041 }
4042
43b40992
PW
4043 if (ret)
4044 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4045 __func__, ret);
4046
4047 return ret;
4048}
4049
2092e5cc
PW
4050/**
4051 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4052 * @oh: struct omap_hwmod *
4053 * @state: state that _setup() should leave the hwmod in
4054 *
550c8092 4055 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
4056 * (called by omap_hwmod_setup_*()). See also the documentation
4057 * for _setup_postsetup(), above. Returns 0 upon success or
4058 * -EINVAL if there is a problem with the arguments or if the hwmod is
4059 * in the wrong state.
2092e5cc
PW
4060 */
4061int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4062{
4063 int ret;
dc6d1cda 4064 unsigned long flags;
2092e5cc
PW
4065
4066 if (!oh)
4067 return -EINVAL;
4068
4069 if (state != _HWMOD_STATE_DISABLED &&
4070 state != _HWMOD_STATE_ENABLED &&
4071 state != _HWMOD_STATE_IDLE)
4072 return -EINVAL;
4073
dc6d1cda 4074 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
4075
4076 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4077 ret = -EINVAL;
4078 goto ohsps_unlock;
4079 }
4080
4081 oh->_postsetup_state = state;
4082 ret = 0;
4083
4084ohsps_unlock:
dc6d1cda 4085 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
4086
4087 return ret;
4088}
c80705aa
KH
4089
4090/**
4091 * omap_hwmod_get_context_loss_count - get lost context count
4092 * @oh: struct omap_hwmod *
4093 *
e6d3a8b0
RN
4094 * Returns the context loss count of associated @oh
4095 * upon success, or zero if no context loss data is available.
c80705aa 4096 *
e6d3a8b0
RN
4097 * On OMAP4, this queries the per-hwmod context loss register,
4098 * assuming one exists. If not, or on OMAP2/3, this queries the
4099 * enclosing powerdomain context loss count.
c80705aa 4100 */
fc013873 4101int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
4102{
4103 struct powerdomain *pwrdm;
4104 int ret = 0;
4105
e6d3a8b0
RN
4106 if (soc_ops.get_context_lost)
4107 return soc_ops.get_context_lost(oh);
4108
c80705aa
KH
4109 pwrdm = omap_hwmod_get_pwrdm(oh);
4110 if (pwrdm)
4111 ret = pwrdm_get_context_loss_count(pwrdm);
4112
4113 return ret;
4114}
43b01643
PW
4115
4116/**
4117 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4118 * @oh: struct omap_hwmod *
4119 *
4120 * Prevent the hwmod @oh from being reset during the setup process.
4121 * Intended for use by board-*.c files on boards with devices that
4122 * cannot tolerate being reset. Must be called before the hwmod has
4123 * been set up. Returns 0 upon success or negative error code upon
4124 * failure.
4125 */
4126int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4127{
4128 if (!oh)
4129 return -EINVAL;
4130
4131 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4132 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4133 oh->name);
4134 return -EINVAL;
4135 }
4136
4137 oh->flags |= HWMOD_INIT_NO_RESET;
4138
4139 return 0;
4140}
abc2d545
TK
4141
4142/**
4143 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4144 * @oh: struct omap_hwmod * containing hwmod mux entries
4145 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4146 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4147 *
4148 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4149 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4150 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
4151 * this function is not called for a given pad_idx, then the ISR
4152 * associated with @oh's first MPU IRQ will be triggered when an I/O
4153 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
4154 * the _dynamic or wakeup_ entry: if there are other entries not
4155 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4156 * entries are NOT COUNTED in the dynamic pad index. This function
4157 * must be called separately for each pad that requires its interrupt
4158 * to be re-routed this way. Returns -EINVAL if there is an argument
4159 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4160 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4161 *
4162 * XXX This function interface is fragile. Rather than using array
4163 * indexes, which are subject to unpredictable change, it should be
4164 * using hwmod IRQ names, and some other stable key for the hwmod mux
4165 * pad records.
4166 */
4167int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4168{
4169 int nr_irqs;
4170
4171 might_sleep();
4172
4173 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4174 pad_idx >= oh->mux->nr_pads_dynamic)
4175 return -EINVAL;
4176
4177 /* Check the number of available mpu_irqs */
4178 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4179 ;
4180
4181 if (irq_idx >= nr_irqs)
4182 return -EINVAL;
4183
4184 if (!oh->mux->irqs) {
4185 /* XXX What frees this? */
4186 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4187 GFP_KERNEL);
4188 if (!oh->mux->irqs)
4189 return -ENOMEM;
4190 }
4191 oh->mux->irqs[pad_idx] = irq_idx;
4192
4193 return 0;
4194}
9ebfd285
KH
4195
4196/**
4197 * omap_hwmod_init - initialize the hwmod code
4198 *
4199 * Sets up some function pointers needed by the hwmod code to operate on the
4200 * currently-booted SoC. Intended to be called once during kernel init
4201 * before any hwmods are registered. No return value.
4202 */
4203void __init omap_hwmod_init(void)
4204{
ff4ae5d9 4205 if (cpu_is_omap24xx()) {
9002e921 4206 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
ff4ae5d9
PW
4207 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4208 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4209 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4210 } else if (cpu_is_omap34xx()) {
9002e921 4211 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
b8249cf2
KH
4212 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4213 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4214 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
0385c582 4215 soc_ops.init_clkdm = _init_clkdm;
debcd1f8 4216 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
9ebfd285
KH
4217 soc_ops.enable_module = _omap4_enable_module;
4218 soc_ops.disable_module = _omap4_disable_module;
8f6aa8ee 4219 soc_ops.wait_target_ready = _omap4_wait_target_ready;
b8249cf2
KH
4220 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4221 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4222 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
0a179eaa 4223 soc_ops.init_clkdm = _init_clkdm;
e6d3a8b0
RN
4224 soc_ops.update_context_lost = _omap4_update_context_lost;
4225 soc_ops.get_context_lost = _omap4_get_context_lost;
c8b428a5
AM
4226 } else if (soc_is_am43xx()) {
4227 soc_ops.enable_module = _omap4_enable_module;
4228 soc_ops.disable_module = _omap4_disable_module;
4229 soc_ops.wait_target_ready = _omap4_wait_target_ready;
98bbc114
DG
4230 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4231 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4232 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
c8b428a5 4233 soc_ops.init_clkdm = _init_clkdm;
1688bf19
VH
4234 } else if (soc_is_am33xx()) {
4235 soc_ops.enable_module = _am33xx_enable_module;
4236 soc_ops.disable_module = _am33xx_disable_module;
4237 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4238 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4239 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4240 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4241 soc_ops.init_clkdm = _init_clkdm;
8f6aa8ee
KH
4242 } else {
4243 WARN(1, "omap_hwmod: unknown SoC type\n");
9ebfd285
KH
4244 }
4245
4246 inited = true;
4247}
68c9a95e
TL
4248
4249/**
4250 * omap_hwmod_get_main_clk - get pointer to main clock name
4251 * @oh: struct omap_hwmod *
4252 *
4253 * Returns the main clock name assocated with @oh upon success,
4254 * or NULL if @oh is NULL.
4255 */
4256const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4257{
4258 if (!oh)
4259 return NULL;
4260
4261 return oh->main_clk;
4262}