OMAP2+: hwmod: Mark functions used only during initialization with __init
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
db2a60bf 4 * Copyright (C) 2009-2010 Nokia Corporation
63c85238 5 *
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6 * Paul Walmsley, Benoît Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
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11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
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16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
63c85238 26 *
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27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
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112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - pin mux handling
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
63c85238 139
6f8b7ff5 140#include <plat/common.h>
ce491cf8 141#include <plat/cpu.h>
1540f214 142#include "clockdomain.h"
72e06d08 143#include "powerdomain.h"
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144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
5365efbe 146#include <plat/prcm.h>
63c85238 147
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148#include "cm2xxx_3xxx.h"
149#include "cm44xx.h"
150#include "prm2xxx_3xxx.h"
d198b514 151#include "prm44xx.h"
63c85238 152
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153/* Maximum microseconds to wait for OMAP module to softreset */
154#define MAX_MODULE_SOFTRESET_WAIT 10000
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155
156/* Name of the OMAP hwmod for the MPU */
5c2c0296 157#define MPU_INITIATOR_NAME "mpu"
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158
159/* omap_hwmod_list contains all registered struct omap_hwmods */
160static LIST_HEAD(omap_hwmod_list);
161
162static DEFINE_MUTEX(omap_hwmod_mutex);
163
164/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
165static struct omap_hwmod *mpu_oh;
166
167/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
168static u8 inited;
169
170
171/* Private functions */
172
173/**
174 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
175 * @oh: struct omap_hwmod *
176 *
177 * Load the current value of the hwmod OCP_SYSCONFIG register into the
178 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
179 * OCP_SYSCONFIG register or 0 upon success.
180 */
181static int _update_sysc_cache(struct omap_hwmod *oh)
182{
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183 if (!oh->class->sysc) {
184 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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185 return -EINVAL;
186 }
187
188 /* XXX ensure module interface clock is up */
189
cc7a1d2a 190 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 191
43b40992 192 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 193 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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194
195 return 0;
196}
197
198/**
199 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
200 * @v: OCP_SYSCONFIG value to write
201 * @oh: struct omap_hwmod *
202 *
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203 * Write @v into the module class' OCP_SYSCONFIG register, if it has
204 * one. No return value.
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205 */
206static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
207{
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208 if (!oh->class->sysc) {
209 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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210 return;
211 }
212
213 /* XXX ensure module interface clock is up */
214
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215 /* Module might have lost context, always update cache and register */
216 oh->_sysc_cache = v;
217 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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218}
219
220/**
221 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
222 * @oh: struct omap_hwmod *
223 * @standbymode: MIDLEMODE field bits
224 * @v: pointer to register contents to modify
225 *
226 * Update the master standby mode bits in @v to be @standbymode for
227 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
228 * upon error or 0 upon success.
229 */
230static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
231 u32 *v)
232{
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233 u32 mstandby_mask;
234 u8 mstandby_shift;
235
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236 if (!oh->class->sysc ||
237 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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238 return -EINVAL;
239
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240 if (!oh->class->sysc->sysc_fields) {
241 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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242 return -EINVAL;
243 }
244
43b40992 245 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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246 mstandby_mask = (0x3 << mstandby_shift);
247
248 *v &= ~mstandby_mask;
249 *v |= __ffs(standbymode) << mstandby_shift;
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250
251 return 0;
252}
253
254/**
255 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
256 * @oh: struct omap_hwmod *
257 * @idlemode: SIDLEMODE field bits
258 * @v: pointer to register contents to modify
259 *
260 * Update the slave idle mode bits in @v to be @idlemode for the @oh
261 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
262 * or 0 upon success.
263 */
264static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
265{
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266 u32 sidle_mask;
267 u8 sidle_shift;
268
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269 if (!oh->class->sysc ||
270 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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271 return -EINVAL;
272
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273 if (!oh->class->sysc->sysc_fields) {
274 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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275 return -EINVAL;
276 }
277
43b40992 278 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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279 sidle_mask = (0x3 << sidle_shift);
280
281 *v &= ~sidle_mask;
282 *v |= __ffs(idlemode) << sidle_shift;
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283
284 return 0;
285}
286
287/**
288 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
289 * @oh: struct omap_hwmod *
290 * @clockact: CLOCKACTIVITY field bits
291 * @v: pointer to register contents to modify
292 *
293 * Update the clockactivity mode bits in @v to be @clockact for the
294 * @oh hwmod. Used for additional powersaving on some modules. Does
295 * not write to the hardware. Returns -EINVAL upon error or 0 upon
296 * success.
297 */
298static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
299{
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300 u32 clkact_mask;
301 u8 clkact_shift;
302
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303 if (!oh->class->sysc ||
304 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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305 return -EINVAL;
306
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307 if (!oh->class->sysc->sysc_fields) {
308 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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309 return -EINVAL;
310 }
311
43b40992 312 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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313 clkact_mask = (0x3 << clkact_shift);
314
315 *v &= ~clkact_mask;
316 *v |= clockact << clkact_shift;
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317
318 return 0;
319}
320
321/**
322 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
323 * @oh: struct omap_hwmod *
324 * @v: pointer to register contents to modify
325 *
326 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
327 * error or 0 upon success.
328 */
329static int _set_softreset(struct omap_hwmod *oh, u32 *v)
330{
358f0e63
TG
331 u32 softrst_mask;
332
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333 if (!oh->class->sysc ||
334 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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335 return -EINVAL;
336
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337 if (!oh->class->sysc->sysc_fields) {
338 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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339 return -EINVAL;
340 }
341
43b40992 342 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
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343
344 *v |= softrst_mask;
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345
346 return 0;
347}
348
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349/**
350 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
351 * @oh: struct omap_hwmod *
352 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
353 * @v: pointer to register contents to modify
354 *
355 * Update the module autoidle bit in @v to be @autoidle for the @oh
356 * hwmod. The autoidle bit controls whether the module can gate
357 * internal clocks automatically when it isn't doing anything; the
358 * exact function of this bit varies on a per-module basis. This
359 * function does not write to the hardware. Returns -EINVAL upon
360 * error or 0 upon success.
361 */
362static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
363 u32 *v)
364{
358f0e63
TG
365 u32 autoidle_mask;
366 u8 autoidle_shift;
367
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368 if (!oh->class->sysc ||
369 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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370 return -EINVAL;
371
43b40992
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372 if (!oh->class->sysc->sysc_fields) {
373 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
374 return -EINVAL;
375 }
376
43b40992 377 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
358f0e63
TG
378 autoidle_mask = (0x3 << autoidle_shift);
379
380 *v &= ~autoidle_mask;
381 *v |= autoidle << autoidle_shift;
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382
383 return 0;
384}
385
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386/**
387 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
388 * @oh: struct omap_hwmod *
389 *
390 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
391 * upon error or 0 upon success.
392 */
5a7ddcbd 393static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 394{
5a7ddcbd 395 u32 wakeup_mask;
63c85238 396
43b40992
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397 if (!oh->class->sysc ||
398 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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399 return -EINVAL;
400
43b40992
PW
401 if (!oh->class->sysc->sysc_fields) {
402 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
403 return -EINVAL;
404 }
405
43b40992 406 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 407
5a7ddcbd 408 *v |= wakeup_mask;
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409
410 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
411
412 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
413
414 return 0;
415}
416
417/**
418 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
419 * @oh: struct omap_hwmod *
420 *
421 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
422 * upon error or 0 upon success.
423 */
5a7ddcbd 424static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 425{
5a7ddcbd 426 u32 wakeup_mask;
63c85238 427
43b40992
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428 if (!oh->class->sysc ||
429 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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430 return -EINVAL;
431
43b40992
PW
432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
434 return -EINVAL;
435 }
436
43b40992 437 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
358f0e63 438
5a7ddcbd 439 *v &= ~wakeup_mask;
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440
441 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
442
443 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
444
445 return 0;
446}
447
448/**
449 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
450 * @oh: struct omap_hwmod *
451 *
452 * Prevent the hardware module @oh from entering idle while the
453 * hardare module initiator @init_oh is active. Useful when a module
454 * will be accessed by a particular initiator (e.g., if a module will
455 * be accessed by the IVA, there should be a sleepdep between the IVA
456 * initiator and the module). Only applies to modules in smart-idle
457 * mode. Returns -EINVAL upon error or passes along
55ed9694 458 * clkdm_add_sleepdep() value upon success.
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459 */
460static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
461{
462 if (!oh->_clk)
463 return -EINVAL;
464
55ed9694 465 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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466}
467
468/**
469 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
470 * @oh: struct omap_hwmod *
471 *
472 * Allow the hardware module @oh to enter idle while the hardare
473 * module initiator @init_oh is active. Useful when a module will not
474 * be accessed by a particular initiator (e.g., if a module will not
475 * be accessed by the IVA, there should be no sleepdep between the IVA
476 * initiator and the module). Only applies to modules in smart-idle
477 * mode. Returns -EINVAL upon error or passes along
55ed9694 478 * clkdm_del_sleepdep() value upon success.
63c85238
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479 */
480static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
481{
482 if (!oh->_clk)
483 return -EINVAL;
484
55ed9694 485 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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486}
487
488/**
489 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
490 * @oh: struct omap_hwmod *
491 *
492 * Called from _init_clocks(). Populates the @oh _clk (main
493 * functional clock pointer) if a main_clk is present. Returns 0 on
494 * success or -EINVAL on error.
495 */
496static int _init_main_clk(struct omap_hwmod *oh)
497{
63c85238
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498 int ret = 0;
499
50ebdac2 500 if (!oh->main_clk)
63c85238
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501 return 0;
502
63403384 503 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 504 if (!oh->_clk) {
20383d82
BC
505 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
506 oh->name, oh->main_clk);
63403384 507 return -EINVAL;
dc75925d 508 }
63c85238 509
63403384
BC
510 if (!oh->_clk->clkdm)
511 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
512 oh->main_clk, oh->_clk->name);
81d7c6ff 513
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514 return ret;
515}
516
517/**
887adeac 518 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
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519 * @oh: struct omap_hwmod *
520 *
521 * Called from _init_clocks(). Populates the @oh OCP slave interface
522 * clock pointers. Returns 0 on success or -EINVAL on error.
523 */
524static int _init_interface_clks(struct omap_hwmod *oh)
525{
63c85238
PW
526 struct clk *c;
527 int i;
528 int ret = 0;
529
530 if (oh->slaves_cnt == 0)
531 return 0;
532
682fdc96
BC
533 for (i = 0; i < oh->slaves_cnt; i++) {
534 struct omap_hwmod_ocp_if *os = oh->slaves[i];
535
50ebdac2 536 if (!os->clk)
63c85238
PW
537 continue;
538
50ebdac2 539 c = omap_clk_get_by_name(os->clk);
dc75925d 540 if (!c) {
20383d82
BC
541 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
542 oh->name, os->clk);
63c85238 543 ret = -EINVAL;
dc75925d 544 }
63c85238
PW
545 os->_clk = c;
546 }
547
548 return ret;
549}
550
551/**
552 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
553 * @oh: struct omap_hwmod *
554 *
555 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
556 * clock pointers. Returns 0 on success or -EINVAL on error.
557 */
558static int _init_opt_clks(struct omap_hwmod *oh)
559{
560 struct omap_hwmod_opt_clk *oc;
561 struct clk *c;
562 int i;
563 int ret = 0;
564
565 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 566 c = omap_clk_get_by_name(oc->clk);
dc75925d 567 if (!c) {
20383d82
BC
568 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
569 oh->name, oc->clk);
63c85238 570 ret = -EINVAL;
dc75925d 571 }
63c85238
PW
572 oc->_clk = c;
573 }
574
575 return ret;
576}
577
578/**
579 * _enable_clocks - enable hwmod main clock and interface clocks
580 * @oh: struct omap_hwmod *
581 *
582 * Enables all clocks necessary for register reads and writes to succeed
583 * on the hwmod @oh. Returns 0.
584 */
585static int _enable_clocks(struct omap_hwmod *oh)
586{
63c85238
PW
587 int i;
588
589 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
590
4d3ae5a9 591 if (oh->_clk)
63c85238
PW
592 clk_enable(oh->_clk);
593
594 if (oh->slaves_cnt > 0) {
682fdc96
BC
595 for (i = 0; i < oh->slaves_cnt; i++) {
596 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
597 struct clk *c = os->_clk;
598
4d3ae5a9 599 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
600 clk_enable(c);
601 }
602 }
603
604 /* The opt clocks are controlled by the device driver. */
605
606 return 0;
607}
608
609/**
610 * _disable_clocks - disable hwmod main clock and interface clocks
611 * @oh: struct omap_hwmod *
612 *
613 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
614 */
615static int _disable_clocks(struct omap_hwmod *oh)
616{
63c85238
PW
617 int i;
618
619 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
620
4d3ae5a9 621 if (oh->_clk)
63c85238
PW
622 clk_disable(oh->_clk);
623
624 if (oh->slaves_cnt > 0) {
682fdc96
BC
625 for (i = 0; i < oh->slaves_cnt; i++) {
626 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
627 struct clk *c = os->_clk;
628
4d3ae5a9 629 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
630 clk_disable(c);
631 }
632 }
633
634 /* The opt clocks are controlled by the device driver. */
635
636 return 0;
637}
638
96835af9
BC
639static void _enable_optional_clocks(struct omap_hwmod *oh)
640{
641 struct omap_hwmod_opt_clk *oc;
642 int i;
643
644 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
645
646 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
647 if (oc->_clk) {
648 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
649 oc->_clk->name);
650 clk_enable(oc->_clk);
651 }
652}
653
654static void _disable_optional_clocks(struct omap_hwmod *oh)
655{
656 struct omap_hwmod_opt_clk *oc;
657 int i;
658
659 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
660
661 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
662 if (oc->_clk) {
663 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
664 oc->_clk->name);
665 clk_disable(oc->_clk);
666 }
667}
668
63c85238
PW
669/**
670 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
671 * @oh: struct omap_hwmod *
672 *
673 * Returns the array index of the OCP slave port that the MPU
674 * addresses the device on, or -EINVAL upon error or not found.
675 */
01592df9 676static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 677{
63c85238
PW
678 int i;
679 int found = 0;
680
681 if (!oh || oh->slaves_cnt == 0)
682 return -EINVAL;
683
682fdc96
BC
684 for (i = 0; i < oh->slaves_cnt; i++) {
685 struct omap_hwmod_ocp_if *os = oh->slaves[i];
686
63c85238
PW
687 if (os->user & OCP_USER_MPU) {
688 found = 1;
689 break;
690 }
691 }
692
693 if (found)
694 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
695 oh->name, i);
696 else
697 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
698 oh->name);
699
700 return (found) ? i : -EINVAL;
701}
702
703/**
704 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
705 * @oh: struct omap_hwmod *
706 *
707 * Return the virtual address of the base of the register target of
708 * device @oh, or NULL on error.
709 */
01592df9 710static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
711{
712 struct omap_hwmod_ocp_if *os;
713 struct omap_hwmod_addr_space *mem;
714 int i;
715 int found = 0;
986a13f5 716 void __iomem *va_start;
63c85238
PW
717
718 if (!oh || oh->slaves_cnt == 0)
719 return NULL;
720
682fdc96 721 os = oh->slaves[index];
63c85238
PW
722
723 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
724 if (mem->flags & ADDR_TYPE_RT) {
725 found = 1;
726 break;
727 }
728 }
729
986a13f5
TL
730 if (found) {
731 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
732 if (!va_start) {
733 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
734 return NULL;
735 }
63c85238 736 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
737 oh->name, va_start);
738 } else {
63c85238
PW
739 pr_debug("omap_hwmod: %s: no MPU register target found\n",
740 oh->name);
986a13f5 741 }
63c85238 742
986a13f5 743 return (found) ? va_start : NULL;
63c85238
PW
744}
745
746/**
74ff3a68 747 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
748 * @oh: struct omap_hwmod *
749 *
750 * If module is marked as SWSUP_SIDLE, force the module out of slave
751 * idle; otherwise, configure it for smart-idle. If module is marked
752 * as SWSUP_MSUSPEND, force the module out of master standby;
753 * otherwise, configure it for smart-standby. No return value.
754 */
74ff3a68 755static void _enable_sysc(struct omap_hwmod *oh)
63c85238 756{
43b40992 757 u8 idlemode, sf;
63c85238
PW
758 u32 v;
759
43b40992 760 if (!oh->class->sysc)
63c85238
PW
761 return;
762
763 v = oh->_sysc_cache;
43b40992 764 sf = oh->class->sysc->sysc_flags;
63c85238 765
43b40992 766 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
767 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
768 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
769 _set_slave_idlemode(oh, idlemode, &v);
770 }
771
43b40992 772 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
773 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
774 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
775 _set_master_standbymode(oh, idlemode, &v);
776 }
777
a16b1f7f
PW
778 /*
779 * XXX The clock framework should handle this, by
780 * calling into this code. But this must wait until the
781 * clock structures are tagged with omap_hwmod entries
782 */
43b40992
PW
783 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
784 (sf & SYSC_HAS_CLOCKACTIVITY))
785 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 786
9980ce53
RN
787 /* If slave is in SMARTIDLE, also enable wakeup */
788 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
789 _enable_wakeup(oh, &v);
790
791 _write_sysconfig(v, oh);
78f26e87
HH
792
793 /*
794 * Set the autoidle bit only after setting the smartidle bit
795 * Setting this will not have any impact on the other modules.
796 */
797 if (sf & SYSC_HAS_AUTOIDLE) {
798 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
799 0 : 1;
800 _set_module_autoidle(oh, idlemode, &v);
801 _write_sysconfig(v, oh);
802 }
63c85238
PW
803}
804
805/**
74ff3a68 806 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
807 * @oh: struct omap_hwmod *
808 *
809 * If module is marked as SWSUP_SIDLE, force the module into slave
810 * idle; otherwise, configure it for smart-idle. If module is marked
811 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
812 * configure it for smart-standby. No return value.
813 */
74ff3a68 814static void _idle_sysc(struct omap_hwmod *oh)
63c85238 815{
43b40992 816 u8 idlemode, sf;
63c85238
PW
817 u32 v;
818
43b40992 819 if (!oh->class->sysc)
63c85238
PW
820 return;
821
822 v = oh->_sysc_cache;
43b40992 823 sf = oh->class->sysc->sysc_flags;
63c85238 824
43b40992 825 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
826 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
827 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
828 _set_slave_idlemode(oh, idlemode, &v);
829 }
830
43b40992 831 if (sf & SYSC_HAS_MIDLEMODE) {
63c85238
PW
832 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
833 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
834 _set_master_standbymode(oh, idlemode, &v);
835 }
836
837 _write_sysconfig(v, oh);
838}
839
840/**
74ff3a68 841 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
842 * @oh: struct omap_hwmod *
843 *
844 * Force the module into slave idle and master suspend. No return
845 * value.
846 */
74ff3a68 847static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
848{
849 u32 v;
43b40992 850 u8 sf;
63c85238 851
43b40992 852 if (!oh->class->sysc)
63c85238
PW
853 return;
854
855 v = oh->_sysc_cache;
43b40992 856 sf = oh->class->sysc->sysc_flags;
63c85238 857
43b40992 858 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
859 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
860
43b40992 861 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
862 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
863
43b40992 864 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 865 _set_module_autoidle(oh, 1, &v);
63c85238
PW
866
867 _write_sysconfig(v, oh);
868}
869
870/**
871 * _lookup - find an omap_hwmod by name
872 * @name: find an omap_hwmod by name
873 *
874 * Return a pointer to an omap_hwmod by name, or NULL if not found.
875 * Caller must hold omap_hwmod_mutex.
876 */
877static struct omap_hwmod *_lookup(const char *name)
878{
879 struct omap_hwmod *oh, *temp_oh;
880
881 oh = NULL;
882
883 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
884 if (!strcmp(name, temp_oh->name)) {
885 oh = temp_oh;
886 break;
887 }
888 }
889
890 return oh;
891}
892
893/**
894 * _init_clocks - clk_get() all clocks associated with this hwmod
895 * @oh: struct omap_hwmod *
97d60162 896 * @data: not used; pass NULL
63c85238
PW
897 *
898 * Called by omap_hwmod_late_init() (after omap2_clk_init()).
12b1fdb4
KH
899 * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
900 * the omap_hwmod has not yet been registered or if the clocks have
901 * already been initialized, 0 on success, or a non-zero error on
902 * failure.
63c85238 903 */
97d60162 904static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
905{
906 int ret = 0;
907
908 if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
909 return -EINVAL;
910
911 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
912
913 ret |= _init_main_clk(oh);
914 ret |= _init_interface_clks(oh);
915 ret |= _init_opt_clks(oh);
916
f5c1f84b
BC
917 if (!ret)
918 oh->_state = _HWMOD_STATE_CLKS_INITED;
63c85238 919
f5c1f84b 920 return 0;
63c85238
PW
921}
922
923/**
924 * _wait_target_ready - wait for a module to leave slave idle
925 * @oh: struct omap_hwmod *
926 *
927 * Wait for a module @oh to leave slave idle. Returns 0 if the module
928 * does not have an IDLEST bit or if the module successfully leaves
929 * slave idle; otherwise, pass along the return value of the
930 * appropriate *_cm_wait_module_ready() function.
931 */
932static int _wait_target_ready(struct omap_hwmod *oh)
933{
934 struct omap_hwmod_ocp_if *os;
935 int ret;
936
937 if (!oh)
938 return -EINVAL;
939
940 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
941 return 0;
942
682fdc96 943 os = oh->slaves[oh->_mpu_port_index];
63c85238 944
33f7ec81 945 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
946 return 0;
947
948 /* XXX check module SIDLEMODE */
949
950 /* XXX check clock enable states */
951
952 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
953 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
954 oh->prcm.omap2.idlest_reg_id,
955 oh->prcm.omap2.idlest_idle_bit);
63c85238 956 } else if (cpu_is_omap44xx()) {
9a23dfe1 957 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
63c85238
PW
958 } else {
959 BUG();
960 };
961
962 return ret;
963}
964
5365efbe
BC
965/**
966 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
967 * @oh: struct omap_hwmod *
968 * @name: name of the reset line in the context of this hwmod
969 *
970 * Return the bit position of the reset line that match the
971 * input name. Return -ENOENT if not found.
972 */
973static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
974{
975 int i;
976
977 for (i = 0; i < oh->rst_lines_cnt; i++) {
978 const char *rst_line = oh->rst_lines[i].name;
979 if (!strcmp(rst_line, name)) {
980 u8 shift = oh->rst_lines[i].rst_shift;
981 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
982 oh->name, rst_line, shift);
983
984 return shift;
985 }
986 }
987
988 return -ENOENT;
989}
990
991/**
992 * _assert_hardreset - assert the HW reset line of submodules
993 * contained in the hwmod module.
994 * @oh: struct omap_hwmod *
995 * @name: name of the reset line to lookup and assert
996 *
997 * Some IP like dsp, ipu or iva contain processor that require
998 * an HW reset line to be assert / deassert in order to enable fully
999 * the IP.
1000 */
1001static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1002{
1003 u8 shift;
1004
1005 if (!oh)
1006 return -EINVAL;
1007
1008 shift = _lookup_hardreset(oh, name);
1009 if (IS_ERR_VALUE(shift))
1010 return shift;
1011
1012 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1013 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1014 shift);
1015 else if (cpu_is_omap44xx())
1016 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1017 shift);
1018 else
1019 return -EINVAL;
1020}
1021
1022/**
1023 * _deassert_hardreset - deassert the HW reset line of submodules contained
1024 * in the hwmod module.
1025 * @oh: struct omap_hwmod *
1026 * @name: name of the reset line to look up and deassert
1027 *
1028 * Some IP like dsp, ipu or iva contain processor that require
1029 * an HW reset line to be assert / deassert in order to enable fully
1030 * the IP.
1031 */
1032static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1033{
1034 u8 shift;
1035 int r;
1036
1037 if (!oh)
1038 return -EINVAL;
1039
1040 shift = _lookup_hardreset(oh, name);
1041 if (IS_ERR_VALUE(shift))
1042 return shift;
1043
1044 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1045 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1046 shift);
1047 else if (cpu_is_omap44xx())
1048 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1049 shift);
1050 else
1051 return -EINVAL;
1052
1053 if (r == -EBUSY)
1054 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1055
1056 return r;
1057}
1058
1059/**
1060 * _read_hardreset - read the HW reset line state of submodules
1061 * contained in the hwmod module
1062 * @oh: struct omap_hwmod *
1063 * @name: name of the reset line to look up and read
1064 *
1065 * Return the state of the reset line.
1066 */
1067static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1068{
1069 u8 shift;
1070
1071 if (!oh)
1072 return -EINVAL;
1073
1074 shift = _lookup_hardreset(oh, name);
1075 if (IS_ERR_VALUE(shift))
1076 return shift;
1077
1078 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1079 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1080 shift);
1081 } else if (cpu_is_omap44xx()) {
1082 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1083 shift);
1084 } else {
1085 return -EINVAL;
1086 }
1087}
1088
63c85238 1089/**
bd36179e 1090 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1091 * @oh: struct omap_hwmod *
1092 *
1093 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1094 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1095 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1096 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1097 *
1098 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1099 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1100 * use the SYSCONFIG softreset bit to provide the status.
1101 *
bd36179e
PW
1102 * Note that some IP like McBSP do have reset control but don't have
1103 * reset status.
63c85238 1104 */
bd36179e 1105static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1106{
96835af9 1107 u32 v;
6f8b7ff5 1108 int c = 0;
96835af9 1109 int ret = 0;
63c85238 1110
43b40992 1111 if (!oh->class->sysc ||
2cb06814 1112 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1113 return -EINVAL;
1114
1115 /* clocks must be on for this operation */
1116 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1117 pr_warning("omap_hwmod: %s: reset can only be entered from "
1118 "enabled state\n", oh->name);
63c85238
PW
1119 return -EINVAL;
1120 }
1121
96835af9
BC
1122 /* For some modules, all optionnal clocks need to be enabled as well */
1123 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1124 _enable_optional_clocks(oh);
1125
bd36179e 1126 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1127
1128 v = oh->_sysc_cache;
96835af9
BC
1129 ret = _set_softreset(oh, &v);
1130 if (ret)
1131 goto dis_opt_clks;
63c85238
PW
1132 _write_sysconfig(v, oh);
1133
2cb06814 1134 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1135 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1136 oh->class->sysc->syss_offs)
1137 & SYSS_RESETDONE_MASK),
1138 MAX_MODULE_SOFTRESET_WAIT, c);
1139 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
cc7a1d2a 1140 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814
BC
1141 oh->class->sysc->sysc_offs)
1142 & SYSC_TYPE2_SOFTRESET_MASK),
1143 MAX_MODULE_SOFTRESET_WAIT, c);
63c85238 1144
5365efbe 1145 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1146 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1147 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1148 else
5365efbe 1149 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1150
1151 /*
1152 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1153 * _wait_target_ready() or _reset()
1154 */
1155
96835af9
BC
1156 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1157
1158dis_opt_clks:
1159 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1160 _disable_optional_clocks(oh);
1161
1162 return ret;
63c85238
PW
1163}
1164
bd36179e
PW
1165/**
1166 * _reset - reset an omap_hwmod
1167 * @oh: struct omap_hwmod *
1168 *
1169 * Resets an omap_hwmod @oh. The default software reset mechanism for
1170 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1171 * bit. However, some hwmods cannot be reset via this method: some
1172 * are not targets and therefore have no OCP header registers to
1173 * access; others (like the IVA) have idiosyncratic reset sequences.
1174 * So for these relatively rare cases, custom reset code can be
1175 * supplied in the struct omap_hwmod_class .reset function pointer.
1176 * Passes along the return value from either _reset() or the custom
1177 * reset function - these must return -EINVAL if the hwmod cannot be
1178 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1179 * the module did not reset in time, or 0 upon success.
1180 */
1181static int _reset(struct omap_hwmod *oh)
1182{
1183 int ret;
1184
1185 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1186
1187 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1188
1189 return ret;
1190}
1191
63c85238 1192/**
dc6d1cda 1193 * _enable - enable an omap_hwmod
63c85238
PW
1194 * @oh: struct omap_hwmod *
1195 *
1196 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1197 * register target. Returns -EINVAL if the hwmod is in the wrong
1198 * state or passes along the return value of _wait_target_ready().
63c85238 1199 */
dc6d1cda 1200static int _enable(struct omap_hwmod *oh)
63c85238
PW
1201{
1202 int r;
1203
1204 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1205 oh->_state != _HWMOD_STATE_IDLE &&
1206 oh->_state != _HWMOD_STATE_DISABLED) {
1207 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1208 "from initialized, idle, or disabled state\n", oh->name);
1209 return -EINVAL;
1210 }
1211
1212 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1213
5365efbe
BC
1214 /*
1215 * If an IP contains only one HW reset line, then de-assert it in order
1216 * to allow to enable the clocks. Otherwise the PRCM will return
1217 * Intransition status, and the init will failed.
1218 */
1219 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1220 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1221 _deassert_hardreset(oh, oh->rst_lines[0].name);
1222
63c85238
PW
1223 /* XXX mux balls */
1224
1225 _add_initiator_dep(oh, mpu_oh);
1226 _enable_clocks(oh);
1227
63c85238 1228 r = _wait_target_ready(oh);
9a23dfe1 1229 if (!r) {
63c85238
PW
1230 oh->_state = _HWMOD_STATE_ENABLED;
1231
9a23dfe1
BC
1232 /* Access the sysconfig only if the target is ready */
1233 if (oh->class->sysc) {
1234 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1235 _update_sysc_cache(oh);
74ff3a68 1236 _enable_sysc(oh);
9a23dfe1
BC
1237 }
1238 } else {
1239 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1240 oh->name, r);
1241 }
1242
63c85238
PW
1243 return r;
1244}
1245
1246/**
dc6d1cda 1247 * _idle - idle an omap_hwmod
63c85238
PW
1248 * @oh: struct omap_hwmod *
1249 *
1250 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1251 * no further work. Returns -EINVAL if the hwmod is in the wrong
1252 * state or returns 0.
63c85238 1253 */
dc6d1cda 1254static int _idle(struct omap_hwmod *oh)
63c85238
PW
1255{
1256 if (oh->_state != _HWMOD_STATE_ENABLED) {
1257 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1258 "enabled state\n", oh->name);
1259 return -EINVAL;
1260 }
1261
1262 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1263
43b40992 1264 if (oh->class->sysc)
74ff3a68 1265 _idle_sysc(oh);
63c85238
PW
1266 _del_initiator_dep(oh, mpu_oh);
1267 _disable_clocks(oh);
1268
1269 oh->_state = _HWMOD_STATE_IDLE;
1270
1271 return 0;
1272}
1273
1274/**
1275 * _shutdown - shutdown an omap_hwmod
1276 * @oh: struct omap_hwmod *
1277 *
1278 * Shut down an omap_hwmod @oh. This should be called when the driver
1279 * used for the hwmod is removed or unloaded or if the driver is not
1280 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1281 * state or returns 0.
1282 */
1283static int _shutdown(struct omap_hwmod *oh)
1284{
e4dc8f50
PW
1285 int ret;
1286 u8 prev_state;
1287
63c85238
PW
1288 if (oh->_state != _HWMOD_STATE_IDLE &&
1289 oh->_state != _HWMOD_STATE_ENABLED) {
1290 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1291 "from idle, or enabled state\n", oh->name);
1292 return -EINVAL;
1293 }
1294
1295 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1296
e4dc8f50
PW
1297 if (oh->class->pre_shutdown) {
1298 prev_state = oh->_state;
1299 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1300 _enable(oh);
e4dc8f50
PW
1301 ret = oh->class->pre_shutdown(oh);
1302 if (ret) {
1303 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1304 _idle(oh);
e4dc8f50
PW
1305 return ret;
1306 }
1307 }
1308
43b40992 1309 if (oh->class->sysc)
74ff3a68 1310 _shutdown_sysc(oh);
3827f949 1311
5365efbe
BC
1312 /*
1313 * If an IP contains only one HW reset line, then assert it
1314 * before disabling the clocks and shutting down the IP.
1315 */
1316 if (oh->rst_lines_cnt == 1)
1317 _assert_hardreset(oh, oh->rst_lines[0].name);
1318
3827f949
BC
1319 /* clocks and deps are already disabled in idle */
1320 if (oh->_state == _HWMOD_STATE_ENABLED) {
1321 _del_initiator_dep(oh, mpu_oh);
1322 /* XXX what about the other system initiators here? dma, dsp */
1323 _disable_clocks(oh);
1324 }
63c85238
PW
1325 /* XXX Should this code also force-disable the optional clocks? */
1326
1327 /* XXX mux any associated balls to safe mode */
1328
1329 oh->_state = _HWMOD_STATE_DISABLED;
1330
1331 return 0;
1332}
1333
63c85238
PW
1334/**
1335 * _setup - do initial configuration of omap_hwmod
1336 * @oh: struct omap_hwmod *
1337 *
1338 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
2092e5cc
PW
1339 * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
1340 * wrong state or returns 0.
63c85238 1341 */
97d60162 1342static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1343{
9a23dfe1 1344 int i, r;
2092e5cc 1345 u8 postsetup_state;
97d60162 1346
63c85238
PW
1347 /* Set iclk autoidle mode */
1348 if (oh->slaves_cnt > 0) {
682fdc96
BC
1349 for (i = 0; i < oh->slaves_cnt; i++) {
1350 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1351 struct clk *c = os->_clk;
1352
4d3ae5a9 1353 if (!c)
63c85238
PW
1354 continue;
1355
1356 if (os->flags & OCPIF_SWSUP_IDLE) {
1357 /* XXX omap_iclk_deny_idle(c); */
1358 } else {
1359 /* XXX omap_iclk_allow_idle(c); */
1360 clk_enable(c);
1361 }
1362 }
1363 }
1364
1365 oh->_state = _HWMOD_STATE_INITIALIZED;
1366
5365efbe
BC
1367 /*
1368 * In the case of hwmod with hardreset that should not be
1369 * de-assert at boot time, we have to keep the module
1370 * initialized, because we cannot enable it properly with the
1371 * reset asserted. Exit without warning because that behavior is
1372 * expected.
1373 */
1374 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1375 return 0;
1376
dc6d1cda 1377 r = _enable(oh);
9a23dfe1
BC
1378 if (r) {
1379 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1380 oh->name, oh->_state);
1381 return 0;
1382 }
63c85238 1383
b835d014 1384 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
76e5589e
BC
1385 _reset(oh);
1386
b835d014 1387 /*
76e5589e 1388 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
dc6d1cda 1389 * The _enable() function should be split to
76e5589e 1390 * avoid the rewrite of the OCP_SYSCONFIG register.
b835d014 1391 */
43b40992 1392 if (oh->class->sysc) {
b835d014 1393 _update_sysc_cache(oh);
74ff3a68 1394 _enable_sysc(oh);
b835d014
PW
1395 }
1396 }
63c85238 1397
2092e5cc
PW
1398 postsetup_state = oh->_postsetup_state;
1399 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1400 postsetup_state = _HWMOD_STATE_ENABLED;
1401
1402 /*
1403 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1404 * it should be set by the core code as a runtime flag during startup
1405 */
1406 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1407 (postsetup_state == _HWMOD_STATE_IDLE))
1408 postsetup_state = _HWMOD_STATE_ENABLED;
1409
1410 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1411 _idle(oh);
2092e5cc
PW
1412 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1413 _shutdown(oh);
1414 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1415 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1416 oh->name, postsetup_state);
63c85238
PW
1417
1418 return 0;
1419}
1420
63c85238 1421/**
0102b627 1422 * _register - register a struct omap_hwmod
63c85238
PW
1423 * @oh: struct omap_hwmod *
1424 *
43b40992
PW
1425 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1426 * already has been registered by the same name; -EINVAL if the
1427 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1428 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1429 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1430 * success.
63c85238
PW
1431 *
1432 * XXX The data should be copied into bootmem, so the original data
1433 * should be marked __initdata and freed after init. This would allow
1434 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1435 * that the copy process would be relatively complex due to the large number
1436 * of substructures.
1437 */
01592df9 1438static int __init _register(struct omap_hwmod *oh)
63c85238
PW
1439{
1440 int ret, ms_id;
1441
43b40992
PW
1442 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1443 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1444 return -EINVAL;
1445
1446 mutex_lock(&omap_hwmod_mutex);
1447
1448 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1449
1450 if (_lookup(oh->name)) {
1451 ret = -EEXIST;
1452 goto ohr_unlock;
1453 }
1454
1455 ms_id = _find_mpu_port_index(oh);
1456 if (!IS_ERR_VALUE(ms_id)) {
1457 oh->_mpu_port_index = ms_id;
db2a60bf 1458 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
63c85238
PW
1459 } else {
1460 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1461 }
1462
1463 list_add_tail(&oh->node, &omap_hwmod_list);
1464
dc6d1cda 1465 spin_lock_init(&oh->_lock);
2092e5cc 1466
63c85238
PW
1467 oh->_state = _HWMOD_STATE_REGISTERED;
1468
1469 ret = 0;
1470
1471ohr_unlock:
1472 mutex_unlock(&omap_hwmod_mutex);
1473 return ret;
1474}
1475
0102b627
BC
1476
1477/* Public functions */
1478
1479u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1480{
1481 if (oh->flags & HWMOD_16BIT_REG)
1482 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1483 else
1484 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1485}
1486
1487void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1488{
1489 if (oh->flags & HWMOD_16BIT_REG)
1490 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1491 else
1492 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1493}
1494
1495/**
1496 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1497 * @oh: struct omap_hwmod *
1498 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1499 *
1500 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1501 * local copy. Intended to be used by drivers that have some erratum
1502 * that requires direct manipulation of the SIDLEMODE bits. Returns
1503 * -EINVAL if @oh is null, or passes along the return value from
1504 * _set_slave_idlemode().
1505 *
1506 * XXX Does this function have any current users? If not, we should
1507 * remove it; it is better to let the rest of the hwmod code handle this.
1508 * Any users of this function should be scrutinized carefully.
1509 */
1510int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1511{
1512 u32 v;
1513 int retval = 0;
1514
1515 if (!oh)
1516 return -EINVAL;
1517
1518 v = oh->_sysc_cache;
1519
1520 retval = _set_slave_idlemode(oh, idlemode, &v);
1521 if (!retval)
1522 _write_sysconfig(v, oh);
1523
1524 return retval;
1525}
1526
63c85238
PW
1527/**
1528 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1529 * @name: name of the omap_hwmod to look up
1530 *
1531 * Given a @name of an omap_hwmod, return a pointer to the registered
1532 * struct omap_hwmod *, or NULL upon error.
1533 */
1534struct omap_hwmod *omap_hwmod_lookup(const char *name)
1535{
1536 struct omap_hwmod *oh;
1537
1538 if (!name)
1539 return NULL;
1540
1541 mutex_lock(&omap_hwmod_mutex);
1542 oh = _lookup(name);
1543 mutex_unlock(&omap_hwmod_mutex);
1544
1545 return oh;
1546}
1547
1548/**
1549 * omap_hwmod_for_each - call function for each registered omap_hwmod
1550 * @fn: pointer to a callback function
97d60162 1551 * @data: void * data to pass to callback function
63c85238
PW
1552 *
1553 * Call @fn for each registered omap_hwmod, passing @data to each
1554 * function. @fn must return 0 for success or any other value for
1555 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1556 * will stop and the non-zero return value will be passed to the
1557 * caller of omap_hwmod_for_each(). @fn is called with
1558 * omap_hwmod_for_each() held.
1559 */
97d60162
PW
1560int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1561 void *data)
63c85238
PW
1562{
1563 struct omap_hwmod *temp_oh;
1564 int ret;
1565
1566 if (!fn)
1567 return -EINVAL;
1568
1569 mutex_lock(&omap_hwmod_mutex);
1570 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1571 ret = (*fn)(temp_oh, data);
63c85238
PW
1572 if (ret)
1573 break;
1574 }
1575 mutex_unlock(&omap_hwmod_mutex);
1576
1577 return ret;
1578}
1579
1580
1581/**
1582 * omap_hwmod_init - init omap_hwmod code and register hwmods
1583 * @ohs: pointer to an array of omap_hwmods to register
1584 *
1585 * Intended to be called early in boot before the clock framework is
1586 * initialized. If @ohs is not null, will register all omap_hwmods
1587 * listed in @ohs that are valid for this chip. Returns -EINVAL if
1588 * omap_hwmod_init() has already been called or 0 otherwise.
1589 */
01592df9 1590int __init omap_hwmod_init(struct omap_hwmod **ohs)
63c85238
PW
1591{
1592 struct omap_hwmod *oh;
1593 int r;
1594
1595 if (inited)
1596 return -EINVAL;
1597
1598 inited = 1;
1599
1600 if (!ohs)
1601 return 0;
1602
1603 oh = *ohs;
1604 while (oh) {
1605 if (omap_chip_is(oh->omap_chip)) {
0102b627
BC
1606 r = _register(oh);
1607 WARN(r, "omap_hwmod: %s: _register returned "
63c85238
PW
1608 "%d\n", oh->name, r);
1609 }
1610 oh = *++ohs;
1611 }
1612
1613 return 0;
1614}
1615
1616/**
1617 * omap_hwmod_late_init - do some post-clock framework initialization
1618 *
1619 * Must be called after omap2_clk_init(). Resolves the struct clk names
1620 * to struct clk pointers for each registered omap_hwmod. Also calls
1621 * _setup() on each hwmod. Returns 0.
1622 */
2092e5cc 1623int omap_hwmod_late_init(void)
63c85238
PW
1624{
1625 int r;
1626
1627 /* XXX check return value */
97d60162 1628 r = omap_hwmod_for_each(_init_clocks, NULL);
63c85238
PW
1629 WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1630
1631 mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1632 WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1633 MPU_INITIATOR_NAME);
1634
2092e5cc 1635 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
1636
1637 return 0;
1638}
1639
63c85238
PW
1640/**
1641 * omap_hwmod_enable - enable an omap_hwmod
1642 * @oh: struct omap_hwmod *
1643 *
74ff3a68 1644 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
1645 * Returns -EINVAL on error or passes along the return value from _enable().
1646 */
1647int omap_hwmod_enable(struct omap_hwmod *oh)
1648{
1649 int r;
dc6d1cda 1650 unsigned long flags;
63c85238
PW
1651
1652 if (!oh)
1653 return -EINVAL;
1654
dc6d1cda
PW
1655 spin_lock_irqsave(&oh->_lock, flags);
1656 r = _enable(oh);
1657 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1658
1659 return r;
1660}
1661
1662/**
1663 * omap_hwmod_idle - idle an omap_hwmod
1664 * @oh: struct omap_hwmod *
1665 *
74ff3a68 1666 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
1667 * Returns -EINVAL on error or passes along the return value from _idle().
1668 */
1669int omap_hwmod_idle(struct omap_hwmod *oh)
1670{
dc6d1cda
PW
1671 unsigned long flags;
1672
63c85238
PW
1673 if (!oh)
1674 return -EINVAL;
1675
dc6d1cda
PW
1676 spin_lock_irqsave(&oh->_lock, flags);
1677 _idle(oh);
1678 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1679
1680 return 0;
1681}
1682
1683/**
1684 * omap_hwmod_shutdown - shutdown an omap_hwmod
1685 * @oh: struct omap_hwmod *
1686 *
74ff3a68 1687 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
1688 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1689 * the return value from _shutdown().
1690 */
1691int omap_hwmod_shutdown(struct omap_hwmod *oh)
1692{
dc6d1cda
PW
1693 unsigned long flags;
1694
63c85238
PW
1695 if (!oh)
1696 return -EINVAL;
1697
dc6d1cda 1698 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1699 _shutdown(oh);
dc6d1cda 1700 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1701
1702 return 0;
1703}
1704
1705/**
1706 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1707 * @oh: struct omap_hwmod *oh
1708 *
1709 * Intended to be called by the omap_device code.
1710 */
1711int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1712{
dc6d1cda
PW
1713 unsigned long flags;
1714
1715 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1716 _enable_clocks(oh);
dc6d1cda 1717 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1718
1719 return 0;
1720}
1721
1722/**
1723 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1724 * @oh: struct omap_hwmod *oh
1725 *
1726 * Intended to be called by the omap_device code.
1727 */
1728int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1729{
dc6d1cda
PW
1730 unsigned long flags;
1731
1732 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1733 _disable_clocks(oh);
dc6d1cda 1734 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1735
1736 return 0;
1737}
1738
1739/**
1740 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1741 * @oh: struct omap_hwmod *oh
1742 *
1743 * Intended to be called by drivers and core code when all posted
1744 * writes to a device must complete before continuing further
1745 * execution (for example, after clearing some device IRQSTATUS
1746 * register bits)
1747 *
1748 * XXX what about targets with multiple OCP threads?
1749 */
1750void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1751{
1752 BUG_ON(!oh);
1753
43b40992 1754 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
63c85238
PW
1755 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1756 "device configuration\n", oh->name);
1757 return;
1758 }
1759
1760 /*
1761 * Forces posted writes to complete on the OCP thread handling
1762 * register writes
1763 */
cc7a1d2a 1764 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
1765}
1766
1767/**
1768 * omap_hwmod_reset - reset the hwmod
1769 * @oh: struct omap_hwmod *
1770 *
1771 * Under some conditions, a driver may wish to reset the entire device.
1772 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 1773 * the return value from _reset().
63c85238
PW
1774 */
1775int omap_hwmod_reset(struct omap_hwmod *oh)
1776{
1777 int r;
dc6d1cda 1778 unsigned long flags;
63c85238 1779
9b579114 1780 if (!oh)
63c85238
PW
1781 return -EINVAL;
1782
dc6d1cda 1783 spin_lock_irqsave(&oh->_lock, flags);
63c85238 1784 r = _reset(oh);
dc6d1cda 1785 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1786
1787 return r;
1788}
1789
1790/**
1791 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1792 * @oh: struct omap_hwmod *
1793 * @res: pointer to the first element of an array of struct resource to fill
1794 *
1795 * Count the number of struct resource array elements necessary to
1796 * contain omap_hwmod @oh resources. Intended to be called by code
1797 * that registers omap_devices. Intended to be used to determine the
1798 * size of a dynamically-allocated struct resource array, before
1799 * calling omap_hwmod_fill_resources(). Returns the number of struct
1800 * resource array elements needed.
1801 *
1802 * XXX This code is not optimized. It could attempt to merge adjacent
1803 * resource IDs.
1804 *
1805 */
1806int omap_hwmod_count_resources(struct omap_hwmod *oh)
1807{
1808 int ret, i;
1809
9ee9fff9 1810 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
63c85238
PW
1811
1812 for (i = 0; i < oh->slaves_cnt; i++)
682fdc96 1813 ret += oh->slaves[i]->addr_cnt;
63c85238
PW
1814
1815 return ret;
1816}
1817
1818/**
1819 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1820 * @oh: struct omap_hwmod *
1821 * @res: pointer to the first element of an array of struct resource to fill
1822 *
1823 * Fill the struct resource array @res with resource data from the
1824 * omap_hwmod @oh. Intended to be called by code that registers
1825 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1826 * number of array elements filled.
1827 */
1828int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1829{
1830 int i, j;
1831 int r = 0;
1832
1833 /* For each IRQ, DMA, memory area, fill in array.*/
1834
1835 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
718bfd76
PW
1836 (res + r)->name = (oh->mpu_irqs + i)->name;
1837 (res + r)->start = (oh->mpu_irqs + i)->irq;
1838 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
1839 (res + r)->flags = IORESOURCE_IRQ;
1840 r++;
1841 }
1842
9ee9fff9
BC
1843 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1844 (res + r)->name = (oh->sdma_reqs + i)->name;
1845 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1846 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
1847 (res + r)->flags = IORESOURCE_DMA;
1848 r++;
1849 }
1850
1851 for (i = 0; i < oh->slaves_cnt; i++) {
1852 struct omap_hwmod_ocp_if *os;
1853
682fdc96 1854 os = oh->slaves[i];
63c85238
PW
1855
1856 for (j = 0; j < os->addr_cnt; j++) {
1857 (res + r)->start = (os->addr + j)->pa_start;
1858 (res + r)->end = (os->addr + j)->pa_end;
1859 (res + r)->flags = IORESOURCE_MEM;
1860 r++;
1861 }
1862 }
1863
1864 return r;
1865}
1866
1867/**
1868 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1869 * @oh: struct omap_hwmod *
1870 *
1871 * Return the powerdomain pointer associated with the OMAP module
1872 * @oh's main clock. If @oh does not have a main clk, return the
1873 * powerdomain associated with the interface clock associated with the
1874 * module's MPU port. (XXX Perhaps this should use the SDMA port
1875 * instead?) Returns NULL on error, or a struct powerdomain * on
1876 * success.
1877 */
1878struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1879{
1880 struct clk *c;
1881
1882 if (!oh)
1883 return NULL;
1884
1885 if (oh->_clk) {
1886 c = oh->_clk;
1887 } else {
1888 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1889 return NULL;
1890 c = oh->slaves[oh->_mpu_port_index]->_clk;
1891 }
1892
d5647c18
TG
1893 if (!c->clkdm)
1894 return NULL;
1895
63c85238
PW
1896 return c->clkdm->pwrdm.ptr;
1897
1898}
1899
db2a60bf
PW
1900/**
1901 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1902 * @oh: struct omap_hwmod *
1903 *
1904 * Returns the virtual address corresponding to the beginning of the
1905 * module's register target, in the address range that is intended to
1906 * be used by the MPU. Returns the virtual address upon success or NULL
1907 * upon error.
1908 */
1909void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1910{
1911 if (!oh)
1912 return NULL;
1913
1914 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1915 return NULL;
1916
1917 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1918 return NULL;
1919
1920 return oh->_mpu_rt_va;
1921}
1922
63c85238
PW
1923/**
1924 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1925 * @oh: struct omap_hwmod *
1926 * @init_oh: struct omap_hwmod * (initiator)
1927 *
1928 * Add a sleep dependency between the initiator @init_oh and @oh.
1929 * Intended to be called by DSP/Bridge code via platform_data for the
1930 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1931 * code needs to add/del initiator dependencies dynamically
1932 * before/after accessing a device. Returns the return value from
1933 * _add_initiator_dep().
1934 *
1935 * XXX Keep a usecount in the clockdomain code
1936 */
1937int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1938 struct omap_hwmod *init_oh)
1939{
1940 return _add_initiator_dep(oh, init_oh);
1941}
1942
1943/*
1944 * XXX what about functions for drivers to save/restore ocp_sysconfig
1945 * for context save/restore operations?
1946 */
1947
1948/**
1949 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1950 * @oh: struct omap_hwmod *
1951 * @init_oh: struct omap_hwmod * (initiator)
1952 *
1953 * Remove a sleep dependency between the initiator @init_oh and @oh.
1954 * Intended to be called by DSP/Bridge code via platform_data for the
1955 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1956 * code needs to add/del initiator dependencies dynamically
1957 * before/after accessing a device. Returns the return value from
1958 * _del_initiator_dep().
1959 *
1960 * XXX Keep a usecount in the clockdomain code
1961 */
1962int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1963 struct omap_hwmod *init_oh)
1964{
1965 return _del_initiator_dep(oh, init_oh);
1966}
1967
63c85238
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1968/**
1969 * omap_hwmod_enable_wakeup - allow device to wake up the system
1970 * @oh: struct omap_hwmod *
1971 *
1972 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1973 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
1974 * registers to cause the PRCM to receive wakeup events from the
1975 * module. Does not set any wakeup routing registers beyond this
1976 * point - if the module is to wake up any other module or subsystem,
1977 * that must be set separately. Called by omap_device code. Returns
1978 * -EINVAL on error or 0 upon success.
1979 */
1980int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1981{
dc6d1cda 1982 unsigned long flags;
5a7ddcbd 1983 u32 v;
dc6d1cda 1984
43b40992
PW
1985 if (!oh->class->sysc ||
1986 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
1987 return -EINVAL;
1988
dc6d1cda 1989 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
1990 v = oh->_sysc_cache;
1991 _enable_wakeup(oh, &v);
1992 _write_sysconfig(v, oh);
dc6d1cda 1993 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
1994
1995 return 0;
1996}
1997
1998/**
1999 * omap_hwmod_disable_wakeup - prevent device from waking the system
2000 * @oh: struct omap_hwmod *
2001 *
2002 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2003 * from sending wakeups to the PRCM. Eventually this should clear
2004 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2005 * from the module. Does not set any wakeup routing registers beyond
2006 * this point - if the module is to wake up any other module or
2007 * subsystem, that must be set separately. Called by omap_device
2008 * code. Returns -EINVAL on error or 0 upon success.
2009 */
2010int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2011{
dc6d1cda 2012 unsigned long flags;
5a7ddcbd 2013 u32 v;
dc6d1cda 2014
43b40992
PW
2015 if (!oh->class->sysc ||
2016 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
63c85238
PW
2017 return -EINVAL;
2018
dc6d1cda 2019 spin_lock_irqsave(&oh->_lock, flags);
5a7ddcbd
KH
2020 v = oh->_sysc_cache;
2021 _disable_wakeup(oh, &v);
2022 _write_sysconfig(v, oh);
dc6d1cda 2023 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2024
2025 return 0;
2026}
43b40992 2027
aee48e3c
PW
2028/**
2029 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2030 * contained in the hwmod module.
2031 * @oh: struct omap_hwmod *
2032 * @name: name of the reset line to lookup and assert
2033 *
2034 * Some IP like dsp, ipu or iva contain processor that require
2035 * an HW reset line to be assert / deassert in order to enable fully
2036 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2037 * yet supported on this OMAP; otherwise, passes along the return value
2038 * from _assert_hardreset().
2039 */
2040int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2041{
2042 int ret;
dc6d1cda 2043 unsigned long flags;
aee48e3c
PW
2044
2045 if (!oh)
2046 return -EINVAL;
2047
dc6d1cda 2048 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2049 ret = _assert_hardreset(oh, name);
dc6d1cda 2050 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2051
2052 return ret;
2053}
2054
2055/**
2056 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2057 * contained in the hwmod module.
2058 * @oh: struct omap_hwmod *
2059 * @name: name of the reset line to look up and deassert
2060 *
2061 * Some IP like dsp, ipu or iva contain processor that require
2062 * an HW reset line to be assert / deassert in order to enable fully
2063 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2064 * yet supported on this OMAP; otherwise, passes along the return value
2065 * from _deassert_hardreset().
2066 */
2067int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2068{
2069 int ret;
dc6d1cda 2070 unsigned long flags;
aee48e3c
PW
2071
2072 if (!oh)
2073 return -EINVAL;
2074
dc6d1cda 2075 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2076 ret = _deassert_hardreset(oh, name);
dc6d1cda 2077 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2078
2079 return ret;
2080}
2081
2082/**
2083 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2084 * contained in the hwmod module
2085 * @oh: struct omap_hwmod *
2086 * @name: name of the reset line to look up and read
2087 *
2088 * Return the current state of the hwmod @oh's reset line named @name:
2089 * returns -EINVAL upon parameter error or if this operation
2090 * is unsupported on the current OMAP; otherwise, passes along the return
2091 * value from _read_hardreset().
2092 */
2093int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2094{
2095 int ret;
dc6d1cda 2096 unsigned long flags;
aee48e3c
PW
2097
2098 if (!oh)
2099 return -EINVAL;
2100
dc6d1cda 2101 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2102 ret = _read_hardreset(oh, name);
dc6d1cda 2103 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2104
2105 return ret;
2106}
2107
2108
43b40992
PW
2109/**
2110 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2111 * @classname: struct omap_hwmod_class name to search for
2112 * @fn: callback function pointer to call for each hwmod in class @classname
2113 * @user: arbitrary context data to pass to the callback function
2114 *
2115 * For each omap_hwmod of class @classname, call @fn. Takes
2116 * omap_hwmod_mutex to prevent the hwmod list from changing during the
2117 * iteration. If the callback function returns something other than
2118 * zero, the iterator is terminated, and the callback function's return
2119 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2120 * if @classname or @fn are NULL, or passes back the error code from @fn.
2121 */
2122int omap_hwmod_for_each_by_class(const char *classname,
2123 int (*fn)(struct omap_hwmod *oh,
2124 void *user),
2125 void *user)
2126{
2127 struct omap_hwmod *temp_oh;
2128 int ret = 0;
2129
2130 if (!classname || !fn)
2131 return -EINVAL;
2132
2133 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2134 __func__, classname);
2135
2136 mutex_lock(&omap_hwmod_mutex);
2137
2138 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2139 if (!strcmp(temp_oh->class->name, classname)) {
2140 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2141 __func__, temp_oh->name);
2142 ret = (*fn)(temp_oh, user);
2143 if (ret)
2144 break;
2145 }
2146 }
2147
2148 mutex_unlock(&omap_hwmod_mutex);
2149
2150 if (ret)
2151 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2152 __func__, ret);
2153
2154 return ret;
2155}
2156
2092e5cc
PW
2157/**
2158 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2159 * @oh: struct omap_hwmod *
2160 * @state: state that _setup() should leave the hwmod in
2161 *
2162 * Sets the hwmod state that @oh will enter at the end of _setup() (called by
2163 * omap_hwmod_late_init()). Only valid to call between calls to
2164 * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
2165 * -EINVAL if there is a problem with the arguments or if the hwmod is
2166 * in the wrong state.
2167 */
2168int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2169{
2170 int ret;
dc6d1cda 2171 unsigned long flags;
2092e5cc
PW
2172
2173 if (!oh)
2174 return -EINVAL;
2175
2176 if (state != _HWMOD_STATE_DISABLED &&
2177 state != _HWMOD_STATE_ENABLED &&
2178 state != _HWMOD_STATE_IDLE)
2179 return -EINVAL;
2180
dc6d1cda 2181 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2182
2183 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2184 ret = -EINVAL;
2185 goto ohsps_unlock;
2186 }
2187
2188 oh->_postsetup_state = state;
2189 ret = 0;
2190
2191ohsps_unlock:
dc6d1cda 2192 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2193
2194 return ret;
2195}