Linux 3.4-rc2
[linux-2.6-block.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
78183f3f 5 * Copyright (C) 2011 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
63c85238 140
4e65331c 141#include "common.h"
ce491cf8 142#include <plat/cpu.h>
1540f214 143#include "clockdomain.h"
72e06d08 144#include "powerdomain.h"
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145#include <plat/clock.h>
146#include <plat/omap_hwmod.h>
5365efbe 147#include <plat/prcm.h>
63c85238 148
59fb659b 149#include "cm2xxx_3xxx.h"
d0f0631d 150#include "cminst44xx.h"
59fb659b 151#include "prm2xxx_3xxx.h"
d198b514 152#include "prm44xx.h"
eaac329d 153#include "prminst44xx.h"
8d9af88f 154#include "mux.h"
63c85238 155
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156/* Maximum microseconds to wait for OMAP module to softreset */
157#define MAX_MODULE_SOFTRESET_WAIT 10000
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158
159/* Name of the OMAP hwmod for the MPU */
5c2c0296 160#define MPU_INITIATOR_NAME "mpu"
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161
162/* omap_hwmod_list contains all registered struct omap_hwmods */
163static LIST_HEAD(omap_hwmod_list);
164
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165/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
166static struct omap_hwmod *mpu_oh;
167
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168
169/* Private functions */
170
171/**
172 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
173 * @oh: struct omap_hwmod *
174 *
175 * Load the current value of the hwmod OCP_SYSCONFIG register into the
176 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
177 * OCP_SYSCONFIG register or 0 upon success.
178 */
179static int _update_sysc_cache(struct omap_hwmod *oh)
180{
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181 if (!oh->class->sysc) {
182 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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183 return -EINVAL;
184 }
185
186 /* XXX ensure module interface clock is up */
187
cc7a1d2a 188 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 189
43b40992 190 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 191 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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192
193 return 0;
194}
195
196/**
197 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
198 * @v: OCP_SYSCONFIG value to write
199 * @oh: struct omap_hwmod *
200 *
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201 * Write @v into the module class' OCP_SYSCONFIG register, if it has
202 * one. No return value.
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203 */
204static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
205{
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206 if (!oh->class->sysc) {
207 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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208 return;
209 }
210
211 /* XXX ensure module interface clock is up */
212
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213 /* Module might have lost context, always update cache and register */
214 oh->_sysc_cache = v;
215 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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216}
217
218/**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
228static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230{
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231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
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234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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236 return -EINVAL;
237
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238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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240 return -EINVAL;
241 }
242
43b40992 243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
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248
249 return 0;
250}
251
252/**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
262static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263{
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264 u32 sidle_mask;
265 u8 sidle_shift;
266
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267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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269 return -EINVAL;
270
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271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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273 return -EINVAL;
274 }
275
43b40992 276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
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281
282 return 0;
283}
284
285/**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
296static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297{
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298 u32 clkact_mask;
299 u8 clkact_shift;
300
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301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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303 return -EINVAL;
304
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305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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307 return -EINVAL;
308 }
309
43b40992 310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
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311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
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315
316 return 0;
317}
318
319/**
320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
327static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328{
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329 u32 softrst_mask;
330
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331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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333 return -EINVAL;
334
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335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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337 return -EINVAL;
338 }
339
43b40992 340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
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341
342 *v |= softrst_mask;
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343
344 return 0;
345}
346
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347/**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
360static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362{
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363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
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366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
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368 return -EINVAL;
369
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370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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372 return -EINVAL;
373 }
374
43b40992 375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 376 autoidle_mask = (0x1 << autoidle_shift);
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377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
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380
381 return 0;
382}
383
eceec009
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384/**
385 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
386 * @oh: struct omap_hwmod *
387 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
388 *
389 * Set or clear the I/O pad wakeup flag in the mux entries for the
390 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
391 * in memory. If the hwmod is currently idled, and the new idle
392 * values don't match the previous ones, this function will also
393 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
394 * currently idled, this function won't touch the hardware: the new
395 * mux settings are written to the SCM PADCTRL registers when the
396 * hwmod is idled. No return value.
397 */
398static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
399{
400 struct omap_device_pad *pad;
401 bool change = false;
402 u16 prev_idle;
403 int j;
404
405 if (!oh->mux || !oh->mux->enabled)
406 return;
407
408 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
409 pad = oh->mux->pads_dynamic[j];
410
411 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
412 continue;
413
414 prev_idle = pad->idle;
415
416 if (set_wake)
417 pad->idle |= OMAP_WAKEUP_EN;
418 else
419 pad->idle &= ~OMAP_WAKEUP_EN;
420
421 if (prev_idle != pad->idle)
422 change = true;
423 }
424
425 if (change && oh->_state == _HWMOD_STATE_IDLE)
426 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
427}
428
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429/**
430 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
431 * @oh: struct omap_hwmod *
432 *
433 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
434 * upon error or 0 upon success.
435 */
5a7ddcbd 436static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 437{
43b40992 438 if (!oh->class->sysc ||
86009eb3 439 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
440 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
441 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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442 return -EINVAL;
443
43b40992
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444 if (!oh->class->sysc->sysc_fields) {
445 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
446 return -EINVAL;
447 }
448
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BC
449 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
450 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 451
86009eb3
BC
452 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
453 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
454 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
455 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 456
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457 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
458
459 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
460
461 return 0;
462}
463
464/**
465 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
466 * @oh: struct omap_hwmod *
467 *
468 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
469 * upon error or 0 upon success.
470 */
5a7ddcbd 471static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 472{
43b40992 473 if (!oh->class->sysc ||
86009eb3 474 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
475 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
476 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
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477 return -EINVAL;
478
43b40992
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479 if (!oh->class->sysc->sysc_fields) {
480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
481 return -EINVAL;
482 }
483
1fe74113
BC
484 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
485 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 486
86009eb3
BC
487 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
488 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0
BC
489 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
490 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 491
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492 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
493
494 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
495
496 return 0;
497}
498
499/**
500 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
501 * @oh: struct omap_hwmod *
502 *
503 * Prevent the hardware module @oh from entering idle while the
504 * hardare module initiator @init_oh is active. Useful when a module
505 * will be accessed by a particular initiator (e.g., if a module will
506 * be accessed by the IVA, there should be a sleepdep between the IVA
507 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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508 * mode. If the clockdomain is marked as not needing autodeps, return
509 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
510 * passes along clkdm_add_sleepdep() value upon success.
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511 */
512static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
513{
514 if (!oh->_clk)
515 return -EINVAL;
516
570b54c7
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517 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
518 return 0;
519
55ed9694 520 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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521}
522
523/**
524 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
525 * @oh: struct omap_hwmod *
526 *
527 * Allow the hardware module @oh to enter idle while the hardare
528 * module initiator @init_oh is active. Useful when a module will not
529 * be accessed by a particular initiator (e.g., if a module will not
530 * be accessed by the IVA, there should be no sleepdep between the IVA
531 * initiator and the module). Only applies to modules in smart-idle
570b54c7
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532 * mode. If the clockdomain is marked as not needing autodeps, return
533 * 0 without doing anything. Returns -EINVAL upon error or passes
534 * along clkdm_del_sleepdep() value upon success.
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535 */
536static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
537{
538 if (!oh->_clk)
539 return -EINVAL;
540
570b54c7
PW
541 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
542 return 0;
543
55ed9694 544 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
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545}
546
547/**
548 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
549 * @oh: struct omap_hwmod *
550 *
551 * Called from _init_clocks(). Populates the @oh _clk (main
552 * functional clock pointer) if a main_clk is present. Returns 0 on
553 * success or -EINVAL on error.
554 */
555static int _init_main_clk(struct omap_hwmod *oh)
556{
63c85238
PW
557 int ret = 0;
558
50ebdac2 559 if (!oh->main_clk)
63c85238
PW
560 return 0;
561
63403384 562 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 563 if (!oh->_clk) {
20383d82
BC
564 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
565 oh->name, oh->main_clk);
63403384 566 return -EINVAL;
dc75925d 567 }
63c85238 568
63403384
BC
569 if (!oh->_clk->clkdm)
570 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
571 oh->main_clk, oh->_clk->name);
81d7c6ff 572
63c85238
PW
573 return ret;
574}
575
576/**
887adeac 577 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
578 * @oh: struct omap_hwmod *
579 *
580 * Called from _init_clocks(). Populates the @oh OCP slave interface
581 * clock pointers. Returns 0 on success or -EINVAL on error.
582 */
583static int _init_interface_clks(struct omap_hwmod *oh)
584{
63c85238
PW
585 struct clk *c;
586 int i;
587 int ret = 0;
588
589 if (oh->slaves_cnt == 0)
590 return 0;
591
682fdc96
BC
592 for (i = 0; i < oh->slaves_cnt; i++) {
593 struct omap_hwmod_ocp_if *os = oh->slaves[i];
594
50ebdac2 595 if (!os->clk)
63c85238
PW
596 continue;
597
50ebdac2 598 c = omap_clk_get_by_name(os->clk);
dc75925d 599 if (!c) {
20383d82
BC
600 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
601 oh->name, os->clk);
63c85238 602 ret = -EINVAL;
dc75925d 603 }
63c85238
PW
604 os->_clk = c;
605 }
606
607 return ret;
608}
609
610/**
611 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
612 * @oh: struct omap_hwmod *
613 *
614 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
615 * clock pointers. Returns 0 on success or -EINVAL on error.
616 */
617static int _init_opt_clks(struct omap_hwmod *oh)
618{
619 struct omap_hwmod_opt_clk *oc;
620 struct clk *c;
621 int i;
622 int ret = 0;
623
624 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 625 c = omap_clk_get_by_name(oc->clk);
dc75925d 626 if (!c) {
20383d82
BC
627 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
628 oh->name, oc->clk);
63c85238 629 ret = -EINVAL;
dc75925d 630 }
63c85238
PW
631 oc->_clk = c;
632 }
633
634 return ret;
635}
636
637/**
638 * _enable_clocks - enable hwmod main clock and interface clocks
639 * @oh: struct omap_hwmod *
640 *
641 * Enables all clocks necessary for register reads and writes to succeed
642 * on the hwmod @oh. Returns 0.
643 */
644static int _enable_clocks(struct omap_hwmod *oh)
645{
63c85238
PW
646 int i;
647
648 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
649
4d3ae5a9 650 if (oh->_clk)
63c85238
PW
651 clk_enable(oh->_clk);
652
653 if (oh->slaves_cnt > 0) {
682fdc96
BC
654 for (i = 0; i < oh->slaves_cnt; i++) {
655 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
656 struct clk *c = os->_clk;
657
4d3ae5a9 658 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
659 clk_enable(c);
660 }
661 }
662
663 /* The opt clocks are controlled by the device driver. */
664
665 return 0;
666}
667
668/**
669 * _disable_clocks - disable hwmod main clock and interface clocks
670 * @oh: struct omap_hwmod *
671 *
672 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
673 */
674static int _disable_clocks(struct omap_hwmod *oh)
675{
63c85238
PW
676 int i;
677
678 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
679
4d3ae5a9 680 if (oh->_clk)
63c85238
PW
681 clk_disable(oh->_clk);
682
683 if (oh->slaves_cnt > 0) {
682fdc96
BC
684 for (i = 0; i < oh->slaves_cnt; i++) {
685 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
686 struct clk *c = os->_clk;
687
4d3ae5a9 688 if (c && (os->flags & OCPIF_SWSUP_IDLE))
63c85238
PW
689 clk_disable(c);
690 }
691 }
692
693 /* The opt clocks are controlled by the device driver. */
694
695 return 0;
696}
697
96835af9
BC
698static void _enable_optional_clocks(struct omap_hwmod *oh)
699{
700 struct omap_hwmod_opt_clk *oc;
701 int i;
702
703 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
704
705 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
706 if (oc->_clk) {
707 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
708 oc->_clk->name);
709 clk_enable(oc->_clk);
710 }
711}
712
713static void _disable_optional_clocks(struct omap_hwmod *oh)
714{
715 struct omap_hwmod_opt_clk *oc;
716 int i;
717
718 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
719
720 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
721 if (oc->_clk) {
722 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
723 oc->_clk->name);
724 clk_disable(oc->_clk);
725 }
726}
727
45c38252
BC
728/**
729 * _enable_module - enable CLKCTRL modulemode on OMAP4
730 * @oh: struct omap_hwmod *
731 *
732 * Enables the PRCM module mode related to the hwmod @oh.
733 * No return value.
734 */
735static void _enable_module(struct omap_hwmod *oh)
736{
737 /* The module mode does not exist prior OMAP4 */
738 if (cpu_is_omap24xx() || cpu_is_omap34xx())
739 return;
740
741 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
742 return;
743
744 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
745 oh->name, oh->prcm.omap4.modulemode);
746
747 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
748 oh->clkdm->prcm_partition,
749 oh->clkdm->cm_inst,
750 oh->clkdm->clkdm_offs,
751 oh->prcm.omap4.clkctrl_offs);
752}
753
754/**
bfc141e3
BC
755 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
756 * @oh: struct omap_hwmod *
757 *
758 * Wait for a module @oh to enter slave idle. Returns 0 if the module
759 * does not have an IDLEST bit or if the module successfully enters
760 * slave idle; otherwise, pass along the return value of the
761 * appropriate *_cm*_wait_module_idle() function.
762 */
763static int _omap4_wait_target_disable(struct omap_hwmod *oh)
764{
765 if (!cpu_is_omap44xx())
766 return 0;
767
768 if (!oh)
769 return -EINVAL;
770
771 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
772 return 0;
773
774 if (oh->flags & HWMOD_NO_IDLEST)
775 return 0;
776
777 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
778 oh->clkdm->cm_inst,
779 oh->clkdm->clkdm_offs,
780 oh->prcm.omap4.clkctrl_offs);
781}
782
783/**
784 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
45c38252
BC
785 * @oh: struct omap_hwmod *
786 *
787 * Disable the PRCM module mode related to the hwmod @oh.
bfc141e3 788 * Return EINVAL if the modulemode is not supported and 0 in case of success.
45c38252 789 */
bfc141e3 790static int _omap4_disable_module(struct omap_hwmod *oh)
45c38252 791{
bfc141e3
BC
792 int v;
793
45c38252 794 /* The module mode does not exist prior OMAP4 */
bfc141e3
BC
795 if (!cpu_is_omap44xx())
796 return -EINVAL;
45c38252
BC
797
798 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
bfc141e3 799 return -EINVAL;
45c38252 800
bfc141e3 801 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
45c38252
BC
802
803 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
804 oh->clkdm->cm_inst,
805 oh->clkdm->clkdm_offs,
806 oh->prcm.omap4.clkctrl_offs);
bfc141e3
BC
807
808 v = _omap4_wait_target_disable(oh);
809 if (v)
810 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
811 oh->name);
812
813 return 0;
45c38252
BC
814}
815
212738a4
PW
816/**
817 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
818 * @oh: struct omap_hwmod *oh
819 *
820 * Count and return the number of MPU IRQs associated with the hwmod
821 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
822 * NULL.
823 */
824static int _count_mpu_irqs(struct omap_hwmod *oh)
825{
826 struct omap_hwmod_irq_info *ohii;
827 int i = 0;
828
829 if (!oh || !oh->mpu_irqs)
830 return 0;
831
832 do {
833 ohii = &oh->mpu_irqs[i++];
834 } while (ohii->irq != -1);
835
cc1b0765 836 return i-1;
212738a4
PW
837}
838
bc614958
PW
839/**
840 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
841 * @oh: struct omap_hwmod *oh
842 *
843 * Count and return the number of SDMA request lines associated with
844 * the hwmod @oh. Used to allocate struct resource data. Returns 0
845 * if @oh is NULL.
846 */
847static int _count_sdma_reqs(struct omap_hwmod *oh)
848{
849 struct omap_hwmod_dma_info *ohdi;
850 int i = 0;
851
852 if (!oh || !oh->sdma_reqs)
853 return 0;
854
855 do {
856 ohdi = &oh->sdma_reqs[i++];
857 } while (ohdi->dma_req != -1);
858
cc1b0765 859 return i-1;
bc614958
PW
860}
861
78183f3f
PW
862/**
863 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
864 * @oh: struct omap_hwmod *oh
865 *
866 * Count and return the number of address space ranges associated with
867 * the hwmod @oh. Used to allocate struct resource data. Returns 0
868 * if @oh is NULL.
869 */
870static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
871{
872 struct omap_hwmod_addr_space *mem;
873 int i = 0;
874
875 if (!os || !os->addr)
876 return 0;
877
878 do {
879 mem = &os->addr[i++];
880 } while (mem->pa_start != mem->pa_end);
881
cc1b0765 882 return i-1;
78183f3f
PW
883}
884
63c85238
PW
885/**
886 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
887 * @oh: struct omap_hwmod *
888 *
889 * Returns the array index of the OCP slave port that the MPU
890 * addresses the device on, or -EINVAL upon error or not found.
891 */
01592df9 892static int __init _find_mpu_port_index(struct omap_hwmod *oh)
63c85238 893{
63c85238
PW
894 int i;
895 int found = 0;
896
897 if (!oh || oh->slaves_cnt == 0)
898 return -EINVAL;
899
682fdc96
BC
900 for (i = 0; i < oh->slaves_cnt; i++) {
901 struct omap_hwmod_ocp_if *os = oh->slaves[i];
902
63c85238
PW
903 if (os->user & OCP_USER_MPU) {
904 found = 1;
905 break;
906 }
907 }
908
909 if (found)
910 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
911 oh->name, i);
912 else
913 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
914 oh->name);
915
916 return (found) ? i : -EINVAL;
917}
918
919/**
920 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
921 * @oh: struct omap_hwmod *
922 *
923 * Return the virtual address of the base of the register target of
924 * device @oh, or NULL on error.
925 */
01592df9 926static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
63c85238
PW
927{
928 struct omap_hwmod_ocp_if *os;
929 struct omap_hwmod_addr_space *mem;
78183f3f 930 int i = 0, found = 0;
986a13f5 931 void __iomem *va_start;
63c85238
PW
932
933 if (!oh || oh->slaves_cnt == 0)
934 return NULL;
935
682fdc96 936 os = oh->slaves[index];
63c85238 937
78183f3f
PW
938 if (!os->addr)
939 return NULL;
940
941 do {
942 mem = &os->addr[i++];
943 if (mem->flags & ADDR_TYPE_RT)
63c85238 944 found = 1;
78183f3f 945 } while (!found && mem->pa_start != mem->pa_end);
63c85238 946
986a13f5
TL
947 if (found) {
948 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
949 if (!va_start) {
950 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
951 return NULL;
952 }
63c85238 953 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
986a13f5
TL
954 oh->name, va_start);
955 } else {
63c85238
PW
956 pr_debug("omap_hwmod: %s: no MPU register target found\n",
957 oh->name);
986a13f5 958 }
63c85238 959
986a13f5 960 return (found) ? va_start : NULL;
63c85238
PW
961}
962
963/**
74ff3a68 964 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
965 * @oh: struct omap_hwmod *
966 *
967 * If module is marked as SWSUP_SIDLE, force the module out of slave
968 * idle; otherwise, configure it for smart-idle. If module is marked
969 * as SWSUP_MSUSPEND, force the module out of master standby;
970 * otherwise, configure it for smart-standby. No return value.
971 */
74ff3a68 972static void _enable_sysc(struct omap_hwmod *oh)
63c85238 973{
43b40992 974 u8 idlemode, sf;
63c85238
PW
975 u32 v;
976
43b40992 977 if (!oh->class->sysc)
63c85238
PW
978 return;
979
980 v = oh->_sysc_cache;
43b40992 981 sf = oh->class->sysc->sysc_flags;
63c85238 982
43b40992 983 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
984 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
985 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
986 _set_slave_idlemode(oh, idlemode, &v);
987 }
988
43b40992 989 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
990 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
991 idlemode = HWMOD_IDLEMODE_NO;
992 } else {
993 if (sf & SYSC_HAS_ENAWAKEUP)
994 _enable_wakeup(oh, &v);
995 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
996 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
997 else
998 idlemode = HWMOD_IDLEMODE_SMART;
999 }
63c85238
PW
1000 _set_master_standbymode(oh, idlemode, &v);
1001 }
1002
a16b1f7f
PW
1003 /*
1004 * XXX The clock framework should handle this, by
1005 * calling into this code. But this must wait until the
1006 * clock structures are tagged with omap_hwmod entries
1007 */
43b40992
PW
1008 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1009 (sf & SYSC_HAS_CLOCKACTIVITY))
1010 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1011
9980ce53
RN
1012 /* If slave is in SMARTIDLE, also enable wakeup */
1013 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1014 _enable_wakeup(oh, &v);
1015
1016 _write_sysconfig(v, oh);
78f26e87
HH
1017
1018 /*
1019 * Set the autoidle bit only after setting the smartidle bit
1020 * Setting this will not have any impact on the other modules.
1021 */
1022 if (sf & SYSC_HAS_AUTOIDLE) {
1023 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1024 0 : 1;
1025 _set_module_autoidle(oh, idlemode, &v);
1026 _write_sysconfig(v, oh);
1027 }
63c85238
PW
1028}
1029
1030/**
74ff3a68 1031 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1032 * @oh: struct omap_hwmod *
1033 *
1034 * If module is marked as SWSUP_SIDLE, force the module into slave
1035 * idle; otherwise, configure it for smart-idle. If module is marked
1036 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1037 * configure it for smart-standby. No return value.
1038 */
74ff3a68 1039static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1040{
43b40992 1041 u8 idlemode, sf;
63c85238
PW
1042 u32 v;
1043
43b40992 1044 if (!oh->class->sysc)
63c85238
PW
1045 return;
1046
1047 v = oh->_sysc_cache;
43b40992 1048 sf = oh->class->sysc->sysc_flags;
63c85238 1049
43b40992 1050 if (sf & SYSC_HAS_SIDLEMODE) {
63c85238
PW
1051 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1052 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1053 _set_slave_idlemode(oh, idlemode, &v);
1054 }
1055
43b40992 1056 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1057 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1058 idlemode = HWMOD_IDLEMODE_FORCE;
1059 } else {
1060 if (sf & SYSC_HAS_ENAWAKEUP)
1061 _enable_wakeup(oh, &v);
1062 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1063 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1064 else
1065 idlemode = HWMOD_IDLEMODE_SMART;
1066 }
63c85238
PW
1067 _set_master_standbymode(oh, idlemode, &v);
1068 }
1069
86009eb3
BC
1070 /* If slave is in SMARTIDLE, also enable wakeup */
1071 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1072 _enable_wakeup(oh, &v);
1073
63c85238
PW
1074 _write_sysconfig(v, oh);
1075}
1076
1077/**
74ff3a68 1078 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1079 * @oh: struct omap_hwmod *
1080 *
1081 * Force the module into slave idle and master suspend. No return
1082 * value.
1083 */
74ff3a68 1084static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1085{
1086 u32 v;
43b40992 1087 u8 sf;
63c85238 1088
43b40992 1089 if (!oh->class->sysc)
63c85238
PW
1090 return;
1091
1092 v = oh->_sysc_cache;
43b40992 1093 sf = oh->class->sysc->sysc_flags;
63c85238 1094
43b40992 1095 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1096 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1097
43b40992 1098 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1099 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1100
43b40992 1101 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1102 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1103
1104 _write_sysconfig(v, oh);
1105}
1106
1107/**
1108 * _lookup - find an omap_hwmod by name
1109 * @name: find an omap_hwmod by name
1110 *
1111 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1112 */
1113static struct omap_hwmod *_lookup(const char *name)
1114{
1115 struct omap_hwmod *oh, *temp_oh;
1116
1117 oh = NULL;
1118
1119 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1120 if (!strcmp(name, temp_oh->name)) {
1121 oh = temp_oh;
1122 break;
1123 }
1124 }
1125
1126 return oh;
1127}
6ae76997
BC
1128/**
1129 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1130 * @oh: struct omap_hwmod *
1131 *
1132 * Convert a clockdomain name stored in a struct omap_hwmod into a
1133 * clockdomain pointer, and save it into the struct omap_hwmod.
1134 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1135 */
1136static int _init_clkdm(struct omap_hwmod *oh)
1137{
1138 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1139 return 0;
1140
1141 if (!oh->clkdm_name) {
1142 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1143 return -EINVAL;
1144 }
1145
1146 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1147 if (!oh->clkdm) {
1148 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1149 oh->name, oh->clkdm_name);
1150 return -EINVAL;
1151 }
1152
1153 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1154 oh->name, oh->clkdm_name);
1155
1156 return 0;
1157}
63c85238
PW
1158
1159/**
6ae76997
BC
1160 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1161 * well the clockdomain.
63c85238 1162 * @oh: struct omap_hwmod *
97d60162 1163 * @data: not used; pass NULL
63c85238 1164 *
a2debdbd 1165 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1166 * Resolves all clock names embedded in the hwmod. Returns 0 on
1167 * success, or a negative error code on failure.
63c85238 1168 */
97d60162 1169static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1170{
1171 int ret = 0;
1172
48d54f3f
PW
1173 if (oh->_state != _HWMOD_STATE_REGISTERED)
1174 return 0;
63c85238
PW
1175
1176 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1177
1178 ret |= _init_main_clk(oh);
1179 ret |= _init_interface_clks(oh);
1180 ret |= _init_opt_clks(oh);
6ae76997 1181 ret |= _init_clkdm(oh);
63c85238 1182
f5c1f84b
BC
1183 if (!ret)
1184 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1185 else
1186 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1187
09c35f2f 1188 return ret;
63c85238
PW
1189}
1190
1191/**
1192 * _wait_target_ready - wait for a module to leave slave idle
1193 * @oh: struct omap_hwmod *
1194 *
1195 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1196 * does not have an IDLEST bit or if the module successfully leaves
1197 * slave idle; otherwise, pass along the return value of the
d0f0631d 1198 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1199 */
1200static int _wait_target_ready(struct omap_hwmod *oh)
1201{
1202 struct omap_hwmod_ocp_if *os;
1203 int ret;
1204
1205 if (!oh)
1206 return -EINVAL;
1207
1208 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1209 return 0;
1210
682fdc96 1211 os = oh->slaves[oh->_mpu_port_index];
63c85238 1212
33f7ec81 1213 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1214 return 0;
1215
1216 /* XXX check module SIDLEMODE */
1217
1218 /* XXX check clock enable states */
1219
1220 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1221 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1222 oh->prcm.omap2.idlest_reg_id,
1223 oh->prcm.omap2.idlest_idle_bit);
63c85238 1224 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1225 if (!oh->clkdm)
1226 return -EINVAL;
1227
1228 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1229 oh->clkdm->cm_inst,
1230 oh->clkdm->clkdm_offs,
1231 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1232 } else {
1233 BUG();
1234 };
1235
1236 return ret;
1237}
1238
5365efbe 1239/**
cc1226e7 1240 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1241 * @oh: struct omap_hwmod *
1242 * @name: name of the reset line in the context of this hwmod
cc1226e7 1243 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1244 *
1245 * Return the bit position of the reset line that match the
1246 * input name. Return -ENOENT if not found.
1247 */
cc1226e7 1248static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1249 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1250{
1251 int i;
1252
1253 for (i = 0; i < oh->rst_lines_cnt; i++) {
1254 const char *rst_line = oh->rst_lines[i].name;
1255 if (!strcmp(rst_line, name)) {
cc1226e7 1256 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1257 ohri->st_shift = oh->rst_lines[i].st_shift;
1258 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1259 oh->name, __func__, rst_line, ohri->rst_shift,
1260 ohri->st_shift);
5365efbe 1261
cc1226e7 1262 return 0;
5365efbe
BC
1263 }
1264 }
1265
1266 return -ENOENT;
1267}
1268
1269/**
1270 * _assert_hardreset - assert the HW reset line of submodules
1271 * contained in the hwmod module.
1272 * @oh: struct omap_hwmod *
1273 * @name: name of the reset line to lookup and assert
1274 *
1275 * Some IP like dsp, ipu or iva contain processor that require
1276 * an HW reset line to be assert / deassert in order to enable fully
1277 * the IP.
1278 */
1279static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1280{
cc1226e7 1281 struct omap_hwmod_rst_info ohri;
1282 u8 ret;
5365efbe
BC
1283
1284 if (!oh)
1285 return -EINVAL;
1286
cc1226e7 1287 ret = _lookup_hardreset(oh, name, &ohri);
1288 if (IS_ERR_VALUE(ret))
1289 return ret;
5365efbe
BC
1290
1291 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1292 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1293 ohri.rst_shift);
5365efbe 1294 else if (cpu_is_omap44xx())
eaac329d
BC
1295 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1296 oh->clkdm->pwrdm.ptr->prcm_partition,
1297 oh->clkdm->pwrdm.ptr->prcm_offs,
1298 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1299 else
1300 return -EINVAL;
1301}
1302
1303/**
1304 * _deassert_hardreset - deassert the HW reset line of submodules contained
1305 * in the hwmod module.
1306 * @oh: struct omap_hwmod *
1307 * @name: name of the reset line to look up and deassert
1308 *
1309 * Some IP like dsp, ipu or iva contain processor that require
1310 * an HW reset line to be assert / deassert in order to enable fully
1311 * the IP.
1312 */
1313static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1314{
cc1226e7 1315 struct omap_hwmod_rst_info ohri;
1316 int ret;
5365efbe
BC
1317
1318 if (!oh)
1319 return -EINVAL;
1320
cc1226e7 1321 ret = _lookup_hardreset(oh, name, &ohri);
1322 if (IS_ERR_VALUE(ret))
1323 return ret;
5365efbe 1324
cc1226e7 1325 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1326 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1327 ohri.rst_shift,
1328 ohri.st_shift);
1329 } else if (cpu_is_omap44xx()) {
1330 if (ohri.st_shift)
1331 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1332 oh->name, name);
eaac329d
BC
1333 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1334 oh->clkdm->pwrdm.ptr->prcm_partition,
1335 oh->clkdm->pwrdm.ptr->prcm_offs,
1336 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1337 } else {
5365efbe 1338 return -EINVAL;
cc1226e7 1339 }
5365efbe 1340
cc1226e7 1341 if (ret == -EBUSY)
5365efbe
BC
1342 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1343
cc1226e7 1344 return ret;
5365efbe
BC
1345}
1346
1347/**
1348 * _read_hardreset - read the HW reset line state of submodules
1349 * contained in the hwmod module
1350 * @oh: struct omap_hwmod *
1351 * @name: name of the reset line to look up and read
1352 *
1353 * Return the state of the reset line.
1354 */
1355static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1356{
cc1226e7 1357 struct omap_hwmod_rst_info ohri;
1358 u8 ret;
5365efbe
BC
1359
1360 if (!oh)
1361 return -EINVAL;
1362
cc1226e7 1363 ret = _lookup_hardreset(oh, name, &ohri);
1364 if (IS_ERR_VALUE(ret))
1365 return ret;
5365efbe
BC
1366
1367 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1368 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1369 ohri.st_shift);
5365efbe 1370 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1371 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1372 oh->clkdm->pwrdm.ptr->prcm_partition,
1373 oh->clkdm->pwrdm.ptr->prcm_offs,
1374 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1375 } else {
1376 return -EINVAL;
1377 }
1378}
1379
63c85238 1380/**
bd36179e 1381 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1382 * @oh: struct omap_hwmod *
1383 *
1384 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
12b1fdb4
KH
1385 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1386 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1387 * the module did not reset in time, or 0 upon success.
2cb06814
BC
1388 *
1389 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1390 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1391 * use the SYSCONFIG softreset bit to provide the status.
1392 *
bd36179e
PW
1393 * Note that some IP like McBSP do have reset control but don't have
1394 * reset status.
63c85238 1395 */
bd36179e 1396static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1397{
387ca5bf 1398 u32 v, softrst_mask;
6f8b7ff5 1399 int c = 0;
96835af9 1400 int ret = 0;
63c85238 1401
43b40992 1402 if (!oh->class->sysc ||
2cb06814 1403 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
63c85238
PW
1404 return -EINVAL;
1405
1406 /* clocks must be on for this operation */
1407 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1408 pr_warning("omap_hwmod: %s: reset can only be entered from "
1409 "enabled state\n", oh->name);
63c85238
PW
1410 return -EINVAL;
1411 }
1412
96835af9
BC
1413 /* For some modules, all optionnal clocks need to be enabled as well */
1414 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1415 _enable_optional_clocks(oh);
1416
bd36179e 1417 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1418
1419 v = oh->_sysc_cache;
96835af9
BC
1420 ret = _set_softreset(oh, &v);
1421 if (ret)
1422 goto dis_opt_clks;
63c85238
PW
1423 _write_sysconfig(v, oh);
1424
2cb06814 1425 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1426 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1427 oh->class->sysc->syss_offs)
1428 & SYSS_RESETDONE_MASK),
1429 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1430 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1431 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1432 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1433 oh->class->sysc->sysc_offs)
387ca5bf 1434 & softrst_mask),
2cb06814 1435 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1436 }
63c85238 1437
5365efbe 1438 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1439 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1440 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1441 else
5365efbe 1442 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1443
1444 /*
1445 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1446 * _wait_target_ready() or _reset()
1447 */
1448
96835af9
BC
1449 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1450
1451dis_opt_clks:
1452 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1453 _disable_optional_clocks(oh);
1454
1455 return ret;
63c85238
PW
1456}
1457
bd36179e
PW
1458/**
1459 * _reset - reset an omap_hwmod
1460 * @oh: struct omap_hwmod *
1461 *
1462 * Resets an omap_hwmod @oh. The default software reset mechanism for
1463 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1464 * bit. However, some hwmods cannot be reset via this method: some
1465 * are not targets and therefore have no OCP header registers to
1466 * access; others (like the IVA) have idiosyncratic reset sequences.
1467 * So for these relatively rare cases, custom reset code can be
1468 * supplied in the struct omap_hwmod_class .reset function pointer.
1469 * Passes along the return value from either _reset() or the custom
1470 * reset function - these must return -EINVAL if the hwmod cannot be
1471 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1472 * the module did not reset in time, or 0 upon success.
1473 */
1474static int _reset(struct omap_hwmod *oh)
1475{
1476 int ret;
1477
1478 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1479
1480 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1481
2800852a
RN
1482 if (oh->class->sysc) {
1483 _update_sysc_cache(oh);
1484 _enable_sysc(oh);
1485 }
1486
bd36179e
PW
1487 return ret;
1488}
1489
63c85238 1490/**
dc6d1cda 1491 * _enable - enable an omap_hwmod
63c85238
PW
1492 * @oh: struct omap_hwmod *
1493 *
1494 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1495 * register target. Returns -EINVAL if the hwmod is in the wrong
1496 * state or passes along the return value of _wait_target_ready().
63c85238 1497 */
dc6d1cda 1498static int _enable(struct omap_hwmod *oh)
63c85238
PW
1499{
1500 int r;
665d0013 1501 int hwsup = 0;
63c85238 1502
34617e2a
BC
1503 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1504
aacf0941
RN
1505 /*
1506 * hwmods with HWMOD_INIT_NO_IDLE flag set are left
1507 * in enabled state at init.
1508 * Now that someone is really trying to enable them,
1509 * just ensure that the hwmod mux is set.
1510 */
1511 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1512 /*
1513 * If the caller has mux data populated, do the mux'ing
1514 * which wouldn't have been done as part of the _enable()
1515 * done during setup.
1516 */
1517 if (oh->mux)
1518 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1519
1520 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1521 return 0;
1522 }
1523
63c85238
PW
1524 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1525 oh->_state != _HWMOD_STATE_IDLE &&
1526 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1527 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1528 oh->name);
63c85238
PW
1529 return -EINVAL;
1530 }
1531
63c85238 1532
31f62866
BC
1533 /*
1534 * If an IP contains only one HW reset line, then de-assert it in order
1535 * to allow the module state transition. Otherwise the PRCM will return
1536 * Intransition status, and the init will failed.
1537 */
1538 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1539 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1540 _deassert_hardreset(oh, oh->rst_lines[0].name);
63c85238 1541
665d0013
RN
1542 /* Mux pins for device runtime if populated */
1543 if (oh->mux && (!oh->mux->enabled ||
1544 ((oh->_state == _HWMOD_STATE_IDLE) &&
1545 oh->mux->pads_dynamic)))
1546 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1547
1548 _add_initiator_dep(oh, mpu_oh);
34617e2a 1549
665d0013
RN
1550 if (oh->clkdm) {
1551 /*
1552 * A clockdomain must be in SW_SUP before enabling
1553 * completely the module. The clockdomain can be set
1554 * in HW_AUTO only when the module become ready.
1555 */
1556 hwsup = clkdm_in_hwsup(oh->clkdm);
1557 r = clkdm_hwmod_enable(oh->clkdm, oh);
1558 if (r) {
1559 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1560 oh->name, oh->clkdm->name, r);
1561 return r;
1562 }
34617e2a 1563 }
665d0013
RN
1564
1565 _enable_clocks(oh);
45c38252 1566 _enable_module(oh);
34617e2a 1567
665d0013
RN
1568 r = _wait_target_ready(oh);
1569 if (!r) {
1570 /*
1571 * Set the clockdomain to HW_AUTO only if the target is ready,
1572 * assuming that the previous state was HW_AUTO
1573 */
1574 if (oh->clkdm && hwsup)
1575 clkdm_allow_idle(oh->clkdm);
1576
1577 oh->_state = _HWMOD_STATE_ENABLED;
1578
1579 /* Access the sysconfig only if the target is ready */
1580 if (oh->class->sysc) {
1581 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1582 _update_sysc_cache(oh);
1583 _enable_sysc(oh);
1584 }
1585 } else {
1586 _disable_clocks(oh);
1587 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1588 oh->name, r);
34617e2a 1589
665d0013
RN
1590 if (oh->clkdm)
1591 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1592 }
1593
63c85238
PW
1594 return r;
1595}
1596
1597/**
dc6d1cda 1598 * _idle - idle an omap_hwmod
63c85238
PW
1599 * @oh: struct omap_hwmod *
1600 *
1601 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1602 * no further work. Returns -EINVAL if the hwmod is in the wrong
1603 * state or returns 0.
63c85238 1604 */
dc6d1cda 1605static int _idle(struct omap_hwmod *oh)
63c85238 1606{
34617e2a
BC
1607 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1608
63c85238 1609 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1610 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1611 oh->name);
63c85238
PW
1612 return -EINVAL;
1613 }
1614
43b40992 1615 if (oh->class->sysc)
74ff3a68 1616 _idle_sysc(oh);
63c85238 1617 _del_initiator_dep(oh, mpu_oh);
bfc141e3
BC
1618
1619 _omap4_disable_module(oh);
1620
45c38252
BC
1621 /*
1622 * The module must be in idle mode before disabling any parents
1623 * clocks. Otherwise, the parent clock might be disabled before
1624 * the module transition is done, and thus will prevent the
1625 * transition to complete properly.
1626 */
1627 _disable_clocks(oh);
665d0013
RN
1628 if (oh->clkdm)
1629 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1630
8d9af88f 1631 /* Mux pins for device idle if populated */
029268e4 1632 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1633 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1634
63c85238
PW
1635 oh->_state = _HWMOD_STATE_IDLE;
1636
1637 return 0;
1638}
1639
9599217a
KVA
1640/**
1641 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1642 * @oh: struct omap_hwmod *
1643 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1644 *
1645 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1646 * local copy. Intended to be used by drivers that require
1647 * direct manipulation of the AUTOIDLE bits.
1648 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1649 * along the return value from _set_module_autoidle().
1650 *
1651 * Any users of this function should be scrutinized carefully.
1652 */
1653int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1654{
1655 u32 v;
1656 int retval = 0;
1657 unsigned long flags;
1658
1659 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1660 return -EINVAL;
1661
1662 spin_lock_irqsave(&oh->_lock, flags);
1663
1664 v = oh->_sysc_cache;
1665
1666 retval = _set_module_autoidle(oh, autoidle, &v);
1667
1668 if (!retval)
1669 _write_sysconfig(v, oh);
1670
1671 spin_unlock_irqrestore(&oh->_lock, flags);
1672
1673 return retval;
1674}
1675
63c85238
PW
1676/**
1677 * _shutdown - shutdown an omap_hwmod
1678 * @oh: struct omap_hwmod *
1679 *
1680 * Shut down an omap_hwmod @oh. This should be called when the driver
1681 * used for the hwmod is removed or unloaded or if the driver is not
1682 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1683 * state or returns 0.
1684 */
1685static int _shutdown(struct omap_hwmod *oh)
1686{
e4dc8f50
PW
1687 int ret;
1688 u8 prev_state;
1689
63c85238
PW
1690 if (oh->_state != _HWMOD_STATE_IDLE &&
1691 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1692 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1693 oh->name);
63c85238
PW
1694 return -EINVAL;
1695 }
1696
1697 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1698
e4dc8f50
PW
1699 if (oh->class->pre_shutdown) {
1700 prev_state = oh->_state;
1701 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1702 _enable(oh);
e4dc8f50
PW
1703 ret = oh->class->pre_shutdown(oh);
1704 if (ret) {
1705 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1706 _idle(oh);
e4dc8f50
PW
1707 return ret;
1708 }
1709 }
1710
6481c73c
MV
1711 if (oh->class->sysc) {
1712 if (oh->_state == _HWMOD_STATE_IDLE)
1713 _enable(oh);
74ff3a68 1714 _shutdown_sysc(oh);
6481c73c 1715 }
5365efbe 1716
3827f949
BC
1717 /* clocks and deps are already disabled in idle */
1718 if (oh->_state == _HWMOD_STATE_ENABLED) {
1719 _del_initiator_dep(oh, mpu_oh);
1720 /* XXX what about the other system initiators here? dma, dsp */
bfc141e3 1721 _omap4_disable_module(oh);
45c38252 1722 _disable_clocks(oh);
665d0013
RN
1723 if (oh->clkdm)
1724 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 1725 }
63c85238
PW
1726 /* XXX Should this code also force-disable the optional clocks? */
1727
31f62866
BC
1728 /*
1729 * If an IP contains only one HW reset line, then assert it
1730 * after disabling the clocks and before shutting down the IP.
1731 */
1732 if (oh->rst_lines_cnt == 1)
1733 _assert_hardreset(oh, oh->rst_lines[0].name);
1734
8d9af88f
TL
1735 /* Mux pins to safe mode or use populated off mode values */
1736 if (oh->mux)
1737 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
1738
1739 oh->_state = _HWMOD_STATE_DISABLED;
1740
1741 return 0;
1742}
1743
63c85238
PW
1744/**
1745 * _setup - do initial configuration of omap_hwmod
1746 * @oh: struct omap_hwmod *
1747 *
1748 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
48d54f3f 1749 * OCP_SYSCONFIG register. Returns 0.
63c85238 1750 */
97d60162 1751static int _setup(struct omap_hwmod *oh, void *data)
63c85238 1752{
9a23dfe1 1753 int i, r;
2092e5cc 1754 u8 postsetup_state;
97d60162 1755
48d54f3f
PW
1756 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1757 return 0;
1758
63c85238
PW
1759 /* Set iclk autoidle mode */
1760 if (oh->slaves_cnt > 0) {
682fdc96
BC
1761 for (i = 0; i < oh->slaves_cnt; i++) {
1762 struct omap_hwmod_ocp_if *os = oh->slaves[i];
63c85238
PW
1763 struct clk *c = os->_clk;
1764
4d3ae5a9 1765 if (!c)
63c85238
PW
1766 continue;
1767
1768 if (os->flags & OCPIF_SWSUP_IDLE) {
1769 /* XXX omap_iclk_deny_idle(c); */
1770 } else {
1771 /* XXX omap_iclk_allow_idle(c); */
1772 clk_enable(c);
1773 }
1774 }
1775 }
1776
1777 oh->_state = _HWMOD_STATE_INITIALIZED;
1778
5365efbe
BC
1779 /*
1780 * In the case of hwmod with hardreset that should not be
1781 * de-assert at boot time, we have to keep the module
1782 * initialized, because we cannot enable it properly with the
1783 * reset asserted. Exit without warning because that behavior is
1784 * expected.
1785 */
1786 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1787 return 0;
1788
dc6d1cda 1789 r = _enable(oh);
9a23dfe1
BC
1790 if (r) {
1791 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1792 oh->name, oh->_state);
1793 return 0;
1794 }
63c85238 1795
2800852a 1796 if (!(oh->flags & HWMOD_INIT_NO_RESET))
76e5589e
BC
1797 _reset(oh);
1798
2092e5cc
PW
1799 postsetup_state = oh->_postsetup_state;
1800 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1801 postsetup_state = _HWMOD_STATE_ENABLED;
1802
1803 /*
1804 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1805 * it should be set by the core code as a runtime flag during startup
1806 */
1807 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
1808 (postsetup_state == _HWMOD_STATE_IDLE)) {
1809 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 1810 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 1811 }
2092e5cc
PW
1812
1813 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 1814 _idle(oh);
2092e5cc
PW
1815 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1816 _shutdown(oh);
1817 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1818 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1819 oh->name, postsetup_state);
63c85238
PW
1820
1821 return 0;
1822}
1823
63c85238 1824/**
0102b627 1825 * _register - register a struct omap_hwmod
63c85238
PW
1826 * @oh: struct omap_hwmod *
1827 *
43b40992
PW
1828 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1829 * already has been registered by the same name; -EINVAL if the
1830 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1831 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1832 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1833 * success.
63c85238
PW
1834 *
1835 * XXX The data should be copied into bootmem, so the original data
1836 * should be marked __initdata and freed after init. This would allow
1837 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1838 * that the copy process would be relatively complex due to the large number
1839 * of substructures.
1840 */
01592df9 1841static int __init _register(struct omap_hwmod *oh)
63c85238 1842{
569edd70 1843 int ms_id;
63c85238 1844
43b40992
PW
1845 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1846 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
1847 return -EINVAL;
1848
63c85238
PW
1849 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1850
ce35b244
BC
1851 if (_lookup(oh->name))
1852 return -EEXIST;
63c85238
PW
1853
1854 ms_id = _find_mpu_port_index(oh);
e7c7d760 1855 if (!IS_ERR_VALUE(ms_id))
63c85238 1856 oh->_mpu_port_index = ms_id;
e7c7d760 1857 else
63c85238 1858 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238
PW
1859
1860 list_add_tail(&oh->node, &omap_hwmod_list);
1861
dc6d1cda 1862 spin_lock_init(&oh->_lock);
2092e5cc 1863
63c85238
PW
1864 oh->_state = _HWMOD_STATE_REGISTERED;
1865
569edd70
PW
1866 /*
1867 * XXX Rather than doing a strcmp(), this should test a flag
1868 * set in the hwmod data, inserted by the autogenerator code.
1869 */
1870 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1871 mpu_oh = oh;
63c85238 1872
569edd70 1873 return 0;
63c85238
PW
1874}
1875
0102b627
BC
1876
1877/* Public functions */
1878
1879u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1880{
1881 if (oh->flags & HWMOD_16BIT_REG)
1882 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1883 else
1884 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1885}
1886
1887void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1888{
1889 if (oh->flags & HWMOD_16BIT_REG)
1890 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1891 else
1892 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1893}
1894
6d3c55fd
A
1895/**
1896 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1897 * @oh: struct omap_hwmod *
1898 *
1899 * This is a public function exposed to drivers. Some drivers may need to do
1900 * some settings before and after resetting the device. Those drivers after
1901 * doing the necessary settings could use this function to start a reset by
1902 * setting the SYSCONFIG.SOFTRESET bit.
1903 */
1904int omap_hwmod_softreset(struct omap_hwmod *oh)
1905{
f9a2f9c3 1906 if (!oh)
6d3c55fd
A
1907 return -EINVAL;
1908
f9a2f9c3 1909 return _ocp_softreset(oh);
6d3c55fd
A
1910}
1911
0102b627
BC
1912/**
1913 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1914 * @oh: struct omap_hwmod *
1915 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1916 *
1917 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1918 * local copy. Intended to be used by drivers that have some erratum
1919 * that requires direct manipulation of the SIDLEMODE bits. Returns
1920 * -EINVAL if @oh is null, or passes along the return value from
1921 * _set_slave_idlemode().
1922 *
1923 * XXX Does this function have any current users? If not, we should
1924 * remove it; it is better to let the rest of the hwmod code handle this.
1925 * Any users of this function should be scrutinized carefully.
1926 */
1927int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1928{
1929 u32 v;
1930 int retval = 0;
1931
1932 if (!oh)
1933 return -EINVAL;
1934
1935 v = oh->_sysc_cache;
1936
1937 retval = _set_slave_idlemode(oh, idlemode, &v);
1938 if (!retval)
1939 _write_sysconfig(v, oh);
1940
1941 return retval;
1942}
1943
63c85238
PW
1944/**
1945 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1946 * @name: name of the omap_hwmod to look up
1947 *
1948 * Given a @name of an omap_hwmod, return a pointer to the registered
1949 * struct omap_hwmod *, or NULL upon error.
1950 */
1951struct omap_hwmod *omap_hwmod_lookup(const char *name)
1952{
1953 struct omap_hwmod *oh;
1954
1955 if (!name)
1956 return NULL;
1957
63c85238 1958 oh = _lookup(name);
63c85238
PW
1959
1960 return oh;
1961}
1962
1963/**
1964 * omap_hwmod_for_each - call function for each registered omap_hwmod
1965 * @fn: pointer to a callback function
97d60162 1966 * @data: void * data to pass to callback function
63c85238
PW
1967 *
1968 * Call @fn for each registered omap_hwmod, passing @data to each
1969 * function. @fn must return 0 for success or any other value for
1970 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1971 * will stop and the non-zero return value will be passed to the
1972 * caller of omap_hwmod_for_each(). @fn is called with
1973 * omap_hwmod_for_each() held.
1974 */
97d60162
PW
1975int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1976 void *data)
63c85238
PW
1977{
1978 struct omap_hwmod *temp_oh;
30ebad9d 1979 int ret = 0;
63c85238
PW
1980
1981 if (!fn)
1982 return -EINVAL;
1983
63c85238 1984 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 1985 ret = (*fn)(temp_oh, data);
63c85238
PW
1986 if (ret)
1987 break;
1988 }
63c85238
PW
1989
1990 return ret;
1991}
1992
63c85238 1993/**
550c8092 1994 * omap_hwmod_register - register an array of hwmods
63c85238
PW
1995 * @ohs: pointer to an array of omap_hwmods to register
1996 *
1997 * Intended to be called early in boot before the clock framework is
1998 * initialized. If @ohs is not null, will register all omap_hwmods
550c8092 1999 * listed in @ohs that are valid for this chip. Returns 0.
63c85238 2000 */
550c8092 2001int __init omap_hwmod_register(struct omap_hwmod **ohs)
63c85238 2002{
bac1a0f0 2003 int r, i;
63c85238
PW
2004
2005 if (!ohs)
2006 return 0;
2007
bac1a0f0
PW
2008 i = 0;
2009 do {
bac1a0f0
PW
2010 r = _register(ohs[i]);
2011 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2012 r);
2013 } while (ohs[++i]);
63c85238
PW
2014
2015 return 0;
2016}
2017
e7c7d760
TL
2018/*
2019 * _populate_mpu_rt_base - populate the virtual address for a hwmod
2020 *
a2debdbd 2021 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
e7c7d760 2022 * Assumes the caller takes care of locking if needed.
63c85238 2023 */
e7c7d760
TL
2024static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
2025{
48d54f3f
PW
2026 if (oh->_state != _HWMOD_STATE_REGISTERED)
2027 return 0;
2028
e7c7d760
TL
2029 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2030 return 0;
2031
2032 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
e7c7d760
TL
2033
2034 return 0;
2035}
2036
63c85238 2037/**
a2debdbd
PW
2038 * omap_hwmod_setup_one - set up a single hwmod
2039 * @oh_name: const char * name of the already-registered hwmod to set up
2040 *
2041 * Must be called after omap2_clk_init(). Resolves the struct clk
2042 * names to struct clk pointers for each registered omap_hwmod. Also
2043 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
2044 * success.
2045 */
2046int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2047{
2048 struct omap_hwmod *oh;
2049 int r;
2050
a2debdbd
PW
2051 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2052
2053 if (!mpu_oh) {
2054 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
2055 oh_name, MPU_INITIATOR_NAME);
63c85238 2056 return -EINVAL;
a2debdbd 2057 }
63c85238 2058
a2debdbd
PW
2059 oh = _lookup(oh_name);
2060 if (!oh) {
2061 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2062 return -EINVAL;
2063 }
63c85238 2064
a2debdbd
PW
2065 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2066 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
63c85238 2067
a2debdbd
PW
2068 r = _populate_mpu_rt_base(oh, NULL);
2069 if (IS_ERR_VALUE(r)) {
2070 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
2071 return -EINVAL;
2072 }
2073
2074 r = _init_clocks(oh, NULL);
2075 if (IS_ERR_VALUE(r)) {
2076 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
2077 return -EINVAL;
63c85238
PW
2078 }
2079
a2debdbd
PW
2080 _setup(oh, NULL);
2081
63c85238
PW
2082 return 0;
2083}
2084
2085/**
550c8092 2086 * omap_hwmod_setup - do some post-clock framework initialization
63c85238
PW
2087 *
2088 * Must be called after omap2_clk_init(). Resolves the struct clk names
2089 * to struct clk pointers for each registered omap_hwmod. Also calls
a2debdbd 2090 * _setup() on each hwmod. Returns 0 upon success.
63c85238 2091 */
550c8092 2092static int __init omap_hwmod_setup_all(void)
63c85238
PW
2093{
2094 int r;
2095
569edd70
PW
2096 if (!mpu_oh) {
2097 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2098 __func__, MPU_INITIATOR_NAME);
2099 return -EINVAL;
2100 }
2101
e7c7d760 2102 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
63c85238 2103
97d60162 2104 r = omap_hwmod_for_each(_init_clocks, NULL);
a2debdbd
PW
2105 WARN(IS_ERR_VALUE(r),
2106 "omap_hwmod: %s: _init_clocks failed\n", __func__);
63c85238 2107
2092e5cc 2108 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2109
2110 return 0;
2111}
550c8092 2112core_initcall(omap_hwmod_setup_all);
63c85238 2113
63c85238
PW
2114/**
2115 * omap_hwmod_enable - enable an omap_hwmod
2116 * @oh: struct omap_hwmod *
2117 *
74ff3a68 2118 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2119 * Returns -EINVAL on error or passes along the return value from _enable().
2120 */
2121int omap_hwmod_enable(struct omap_hwmod *oh)
2122{
2123 int r;
dc6d1cda 2124 unsigned long flags;
63c85238
PW
2125
2126 if (!oh)
2127 return -EINVAL;
2128
dc6d1cda
PW
2129 spin_lock_irqsave(&oh->_lock, flags);
2130 r = _enable(oh);
2131 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2132
2133 return r;
2134}
2135
2136/**
2137 * omap_hwmod_idle - idle an omap_hwmod
2138 * @oh: struct omap_hwmod *
2139 *
74ff3a68 2140 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2141 * Returns -EINVAL on error or passes along the return value from _idle().
2142 */
2143int omap_hwmod_idle(struct omap_hwmod *oh)
2144{
dc6d1cda
PW
2145 unsigned long flags;
2146
63c85238
PW
2147 if (!oh)
2148 return -EINVAL;
2149
dc6d1cda
PW
2150 spin_lock_irqsave(&oh->_lock, flags);
2151 _idle(oh);
2152 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2153
2154 return 0;
2155}
2156
2157/**
2158 * omap_hwmod_shutdown - shutdown an omap_hwmod
2159 * @oh: struct omap_hwmod *
2160 *
74ff3a68 2161 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2162 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2163 * the return value from _shutdown().
2164 */
2165int omap_hwmod_shutdown(struct omap_hwmod *oh)
2166{
dc6d1cda
PW
2167 unsigned long flags;
2168
63c85238
PW
2169 if (!oh)
2170 return -EINVAL;
2171
dc6d1cda 2172 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2173 _shutdown(oh);
dc6d1cda 2174 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2175
2176 return 0;
2177}
2178
2179/**
2180 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2181 * @oh: struct omap_hwmod *oh
2182 *
2183 * Intended to be called by the omap_device code.
2184 */
2185int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2186{
dc6d1cda
PW
2187 unsigned long flags;
2188
2189 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2190 _enable_clocks(oh);
dc6d1cda 2191 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2192
2193 return 0;
2194}
2195
2196/**
2197 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2198 * @oh: struct omap_hwmod *oh
2199 *
2200 * Intended to be called by the omap_device code.
2201 */
2202int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2203{
dc6d1cda
PW
2204 unsigned long flags;
2205
2206 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2207 _disable_clocks(oh);
dc6d1cda 2208 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2209
2210 return 0;
2211}
2212
2213/**
2214 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2215 * @oh: struct omap_hwmod *oh
2216 *
2217 * Intended to be called by drivers and core code when all posted
2218 * writes to a device must complete before continuing further
2219 * execution (for example, after clearing some device IRQSTATUS
2220 * register bits)
2221 *
2222 * XXX what about targets with multiple OCP threads?
2223 */
2224void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2225{
2226 BUG_ON(!oh);
2227
43b40992 2228 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2229 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2230 oh->name);
63c85238
PW
2231 return;
2232 }
2233
2234 /*
2235 * Forces posted writes to complete on the OCP thread handling
2236 * register writes
2237 */
cc7a1d2a 2238 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2239}
2240
2241/**
2242 * omap_hwmod_reset - reset the hwmod
2243 * @oh: struct omap_hwmod *
2244 *
2245 * Under some conditions, a driver may wish to reset the entire device.
2246 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2247 * the return value from _reset().
63c85238
PW
2248 */
2249int omap_hwmod_reset(struct omap_hwmod *oh)
2250{
2251 int r;
dc6d1cda 2252 unsigned long flags;
63c85238 2253
9b579114 2254 if (!oh)
63c85238
PW
2255 return -EINVAL;
2256
dc6d1cda 2257 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2258 r = _reset(oh);
dc6d1cda 2259 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2260
2261 return r;
2262}
2263
2264/**
2265 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2266 * @oh: struct omap_hwmod *
2267 * @res: pointer to the first element of an array of struct resource to fill
2268 *
2269 * Count the number of struct resource array elements necessary to
2270 * contain omap_hwmod @oh resources. Intended to be called by code
2271 * that registers omap_devices. Intended to be used to determine the
2272 * size of a dynamically-allocated struct resource array, before
2273 * calling omap_hwmod_fill_resources(). Returns the number of struct
2274 * resource array elements needed.
2275 *
2276 * XXX This code is not optimized. It could attempt to merge adjacent
2277 * resource IDs.
2278 *
2279 */
2280int omap_hwmod_count_resources(struct omap_hwmod *oh)
2281{
2282 int ret, i;
2283
bc614958 2284 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238
PW
2285
2286 for (i = 0; i < oh->slaves_cnt; i++)
78183f3f 2287 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
63c85238
PW
2288
2289 return ret;
2290}
2291
2292/**
2293 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2294 * @oh: struct omap_hwmod *
2295 * @res: pointer to the first element of an array of struct resource to fill
2296 *
2297 * Fill the struct resource array @res with resource data from the
2298 * omap_hwmod @oh. Intended to be called by code that registers
2299 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2300 * number of array elements filled.
2301 */
2302int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2303{
bc614958 2304 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
63c85238
PW
2305 int r = 0;
2306
2307 /* For each IRQ, DMA, memory area, fill in array.*/
2308
212738a4
PW
2309 mpu_irqs_cnt = _count_mpu_irqs(oh);
2310 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2311 (res + r)->name = (oh->mpu_irqs + i)->name;
2312 (res + r)->start = (oh->mpu_irqs + i)->irq;
2313 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2314 (res + r)->flags = IORESOURCE_IRQ;
2315 r++;
2316 }
2317
bc614958
PW
2318 sdma_reqs_cnt = _count_sdma_reqs(oh);
2319 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2320 (res + r)->name = (oh->sdma_reqs + i)->name;
2321 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2322 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2323 (res + r)->flags = IORESOURCE_DMA;
2324 r++;
2325 }
2326
2327 for (i = 0; i < oh->slaves_cnt; i++) {
2328 struct omap_hwmod_ocp_if *os;
78183f3f 2329 int addr_cnt;
63c85238 2330
682fdc96 2331 os = oh->slaves[i];
78183f3f 2332 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2333
78183f3f 2334 for (j = 0; j < addr_cnt; j++) {
cd503802 2335 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2336 (res + r)->start = (os->addr + j)->pa_start;
2337 (res + r)->end = (os->addr + j)->pa_end;
2338 (res + r)->flags = IORESOURCE_MEM;
2339 r++;
2340 }
2341 }
2342
2343 return r;
2344}
2345
2346/**
2347 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2348 * @oh: struct omap_hwmod *
2349 *
2350 * Return the powerdomain pointer associated with the OMAP module
2351 * @oh's main clock. If @oh does not have a main clk, return the
2352 * powerdomain associated with the interface clock associated with the
2353 * module's MPU port. (XXX Perhaps this should use the SDMA port
2354 * instead?) Returns NULL on error, or a struct powerdomain * on
2355 * success.
2356 */
2357struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2358{
2359 struct clk *c;
2360
2361 if (!oh)
2362 return NULL;
2363
2364 if (oh->_clk) {
2365 c = oh->_clk;
2366 } else {
2367 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2368 return NULL;
2369 c = oh->slaves[oh->_mpu_port_index]->_clk;
2370 }
2371
d5647c18
TG
2372 if (!c->clkdm)
2373 return NULL;
2374
63c85238
PW
2375 return c->clkdm->pwrdm.ptr;
2376
2377}
2378
db2a60bf
PW
2379/**
2380 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2381 * @oh: struct omap_hwmod *
2382 *
2383 * Returns the virtual address corresponding to the beginning of the
2384 * module's register target, in the address range that is intended to
2385 * be used by the MPU. Returns the virtual address upon success or NULL
2386 * upon error.
2387 */
2388void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2389{
2390 if (!oh)
2391 return NULL;
2392
2393 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2394 return NULL;
2395
2396 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2397 return NULL;
2398
2399 return oh->_mpu_rt_va;
2400}
2401
63c85238
PW
2402/**
2403 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2404 * @oh: struct omap_hwmod *
2405 * @init_oh: struct omap_hwmod * (initiator)
2406 *
2407 * Add a sleep dependency between the initiator @init_oh and @oh.
2408 * Intended to be called by DSP/Bridge code via platform_data for the
2409 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2410 * code needs to add/del initiator dependencies dynamically
2411 * before/after accessing a device. Returns the return value from
2412 * _add_initiator_dep().
2413 *
2414 * XXX Keep a usecount in the clockdomain code
2415 */
2416int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2417 struct omap_hwmod *init_oh)
2418{
2419 return _add_initiator_dep(oh, init_oh);
2420}
2421
2422/*
2423 * XXX what about functions for drivers to save/restore ocp_sysconfig
2424 * for context save/restore operations?
2425 */
2426
2427/**
2428 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2429 * @oh: struct omap_hwmod *
2430 * @init_oh: struct omap_hwmod * (initiator)
2431 *
2432 * Remove a sleep dependency between the initiator @init_oh and @oh.
2433 * Intended to be called by DSP/Bridge code via platform_data for the
2434 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2435 * code needs to add/del initiator dependencies dynamically
2436 * before/after accessing a device. Returns the return value from
2437 * _del_initiator_dep().
2438 *
2439 * XXX Keep a usecount in the clockdomain code
2440 */
2441int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2442 struct omap_hwmod *init_oh)
2443{
2444 return _del_initiator_dep(oh, init_oh);
2445}
2446
63c85238
PW
2447/**
2448 * omap_hwmod_enable_wakeup - allow device to wake up the system
2449 * @oh: struct omap_hwmod *
2450 *
2451 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
2452 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2453 * this IP block if it has dynamic mux entries. Eventually this
2454 * should set PRCM wakeup registers to cause the PRCM to receive
2455 * wakeup events from the module. Does not set any wakeup routing
2456 * registers beyond this point - if the module is to wake up any other
2457 * module or subsystem, that must be set separately. Called by
2458 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
2459 */
2460int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2461{
dc6d1cda 2462 unsigned long flags;
5a7ddcbd 2463 u32 v;
dc6d1cda 2464
dc6d1cda 2465 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
2466
2467 if (oh->class->sysc &&
2468 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2469 v = oh->_sysc_cache;
2470 _enable_wakeup(oh, &v);
2471 _write_sysconfig(v, oh);
2472 }
2473
eceec009 2474 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 2475 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2476
2477 return 0;
2478}
2479
2480/**
2481 * omap_hwmod_disable_wakeup - prevent device from waking the system
2482 * @oh: struct omap_hwmod *
2483 *
2484 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
2485 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2486 * events for this IP block if it has dynamic mux entries. Eventually
2487 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2488 * wakeup events from the module. Does not set any wakeup routing
2489 * registers beyond this point - if the module is to wake up any other
2490 * module or subsystem, that must be set separately. Called by
2491 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
2492 */
2493int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2494{
dc6d1cda 2495 unsigned long flags;
5a7ddcbd 2496 u32 v;
dc6d1cda 2497
dc6d1cda 2498 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
2499
2500 if (oh->class->sysc &&
2501 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2502 v = oh->_sysc_cache;
2503 _disable_wakeup(oh, &v);
2504 _write_sysconfig(v, oh);
2505 }
2506
eceec009 2507 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 2508 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2509
2510 return 0;
2511}
43b40992 2512
aee48e3c
PW
2513/**
2514 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2515 * contained in the hwmod module.
2516 * @oh: struct omap_hwmod *
2517 * @name: name of the reset line to lookup and assert
2518 *
2519 * Some IP like dsp, ipu or iva contain processor that require
2520 * an HW reset line to be assert / deassert in order to enable fully
2521 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2522 * yet supported on this OMAP; otherwise, passes along the return value
2523 * from _assert_hardreset().
2524 */
2525int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2526{
2527 int ret;
dc6d1cda 2528 unsigned long flags;
aee48e3c
PW
2529
2530 if (!oh)
2531 return -EINVAL;
2532
dc6d1cda 2533 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2534 ret = _assert_hardreset(oh, name);
dc6d1cda 2535 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2536
2537 return ret;
2538}
2539
2540/**
2541 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2542 * contained in the hwmod module.
2543 * @oh: struct omap_hwmod *
2544 * @name: name of the reset line to look up and deassert
2545 *
2546 * Some IP like dsp, ipu or iva contain processor that require
2547 * an HW reset line to be assert / deassert in order to enable fully
2548 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2549 * yet supported on this OMAP; otherwise, passes along the return value
2550 * from _deassert_hardreset().
2551 */
2552int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2553{
2554 int ret;
dc6d1cda 2555 unsigned long flags;
aee48e3c
PW
2556
2557 if (!oh)
2558 return -EINVAL;
2559
dc6d1cda 2560 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2561 ret = _deassert_hardreset(oh, name);
dc6d1cda 2562 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2563
2564 return ret;
2565}
2566
2567/**
2568 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2569 * contained in the hwmod module
2570 * @oh: struct omap_hwmod *
2571 * @name: name of the reset line to look up and read
2572 *
2573 * Return the current state of the hwmod @oh's reset line named @name:
2574 * returns -EINVAL upon parameter error or if this operation
2575 * is unsupported on the current OMAP; otherwise, passes along the return
2576 * value from _read_hardreset().
2577 */
2578int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2579{
2580 int ret;
dc6d1cda 2581 unsigned long flags;
aee48e3c
PW
2582
2583 if (!oh)
2584 return -EINVAL;
2585
dc6d1cda 2586 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 2587 ret = _read_hardreset(oh, name);
dc6d1cda 2588 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
2589
2590 return ret;
2591}
2592
2593
43b40992
PW
2594/**
2595 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2596 * @classname: struct omap_hwmod_class name to search for
2597 * @fn: callback function pointer to call for each hwmod in class @classname
2598 * @user: arbitrary context data to pass to the callback function
2599 *
ce35b244
BC
2600 * For each omap_hwmod of class @classname, call @fn.
2601 * If the callback function returns something other than
43b40992
PW
2602 * zero, the iterator is terminated, and the callback function's return
2603 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2604 * if @classname or @fn are NULL, or passes back the error code from @fn.
2605 */
2606int omap_hwmod_for_each_by_class(const char *classname,
2607 int (*fn)(struct omap_hwmod *oh,
2608 void *user),
2609 void *user)
2610{
2611 struct omap_hwmod *temp_oh;
2612 int ret = 0;
2613
2614 if (!classname || !fn)
2615 return -EINVAL;
2616
2617 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2618 __func__, classname);
2619
43b40992
PW
2620 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2621 if (!strcmp(temp_oh->class->name, classname)) {
2622 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2623 __func__, temp_oh->name);
2624 ret = (*fn)(temp_oh, user);
2625 if (ret)
2626 break;
2627 }
2628 }
2629
43b40992
PW
2630 if (ret)
2631 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2632 __func__, ret);
2633
2634 return ret;
2635}
2636
2092e5cc
PW
2637/**
2638 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2639 * @oh: struct omap_hwmod *
2640 * @state: state that _setup() should leave the hwmod in
2641 *
550c8092 2642 * Sets the hwmod state that @oh will enter at the end of _setup()
a2debdbd
PW
2643 * (called by omap_hwmod_setup_*()). Only valid to call between
2644 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
550c8092
PW
2645 * 0 upon success or -EINVAL if there is a problem with the arguments
2646 * or if the hwmod is in the wrong state.
2092e5cc
PW
2647 */
2648int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2649{
2650 int ret;
dc6d1cda 2651 unsigned long flags;
2092e5cc
PW
2652
2653 if (!oh)
2654 return -EINVAL;
2655
2656 if (state != _HWMOD_STATE_DISABLED &&
2657 state != _HWMOD_STATE_ENABLED &&
2658 state != _HWMOD_STATE_IDLE)
2659 return -EINVAL;
2660
dc6d1cda 2661 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
2662
2663 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2664 ret = -EINVAL;
2665 goto ohsps_unlock;
2666 }
2667
2668 oh->_postsetup_state = state;
2669 ret = 0;
2670
2671ohsps_unlock:
dc6d1cda 2672 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
2673
2674 return ret;
2675}
c80705aa
KH
2676
2677/**
2678 * omap_hwmod_get_context_loss_count - get lost context count
2679 * @oh: struct omap_hwmod *
2680 *
2681 * Query the powerdomain of of @oh to get the context loss
2682 * count for this device.
2683 *
2684 * Returns the context loss count of the powerdomain assocated with @oh
2685 * upon success, or zero if no powerdomain exists for @oh.
2686 */
fc013873 2687int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
2688{
2689 struct powerdomain *pwrdm;
2690 int ret = 0;
2691
2692 pwrdm = omap_hwmod_get_pwrdm(oh);
2693 if (pwrdm)
2694 ret = pwrdm_get_context_loss_count(pwrdm);
2695
2696 return ret;
2697}
43b01643
PW
2698
2699/**
2700 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2701 * @oh: struct omap_hwmod *
2702 *
2703 * Prevent the hwmod @oh from being reset during the setup process.
2704 * Intended for use by board-*.c files on boards with devices that
2705 * cannot tolerate being reset. Must be called before the hwmod has
2706 * been set up. Returns 0 upon success or negative error code upon
2707 * failure.
2708 */
2709int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2710{
2711 if (!oh)
2712 return -EINVAL;
2713
2714 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2715 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2716 oh->name);
2717 return -EINVAL;
2718 }
2719
2720 oh->flags |= HWMOD_INIT_NO_RESET;
2721
2722 return 0;
2723}
abc2d545
TK
2724
2725/**
2726 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
2727 * @oh: struct omap_hwmod * containing hwmod mux entries
2728 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
2729 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
2730 *
2731 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
2732 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
2733 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
2734 * this function is not called for a given pad_idx, then the ISR
2735 * associated with @oh's first MPU IRQ will be triggered when an I/O
2736 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
2737 * the _dynamic or wakeup_ entry: if there are other entries not
2738 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
2739 * entries are NOT COUNTED in the dynamic pad index. This function
2740 * must be called separately for each pad that requires its interrupt
2741 * to be re-routed this way. Returns -EINVAL if there is an argument
2742 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
2743 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
2744 *
2745 * XXX This function interface is fragile. Rather than using array
2746 * indexes, which are subject to unpredictable change, it should be
2747 * using hwmod IRQ names, and some other stable key for the hwmod mux
2748 * pad records.
2749 */
2750int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
2751{
2752 int nr_irqs;
2753
2754 might_sleep();
2755
2756 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
2757 pad_idx >= oh->mux->nr_pads_dynamic)
2758 return -EINVAL;
2759
2760 /* Check the number of available mpu_irqs */
2761 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
2762 ;
2763
2764 if (irq_idx >= nr_irqs)
2765 return -EINVAL;
2766
2767 if (!oh->mux->irqs) {
2768 /* XXX What frees this? */
2769 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
2770 GFP_KERNEL);
2771 if (!oh->mux->irqs)
2772 return -ENOMEM;
2773 }
2774 oh->mux->irqs[pad_idx] = irq_idx;
2775
2776 return 0;
2777}