Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
15 | #include <linux/spi/spi.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/i2c/twl4030.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/regulator/machine.h> | |
21 | #include <linux/gpio.h> | |
5e763d29 | 22 | #include <linux/mmc/host.h> |
ffe7f95b LL |
23 | |
24 | #include <mach/mcspi.h> | |
25 | #include <mach/mux.h> | |
26 | #include <mach/board.h> | |
27 | #include <mach/common.h> | |
28 | #include <mach/dma.h> | |
29 | #include <mach/gpmc.h> | |
30 | #include <mach/keypad.h> | |
aa62e90f | 31 | #include <mach/onenand.h> |
1a48e157 | 32 | #include <mach/gpmc-smc91x.h> |
ffe7f95b LL |
33 | |
34 | #include "mmc-twl4030.h" | |
35 | ||
f52eeee8 AH |
36 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
37 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
38 | ||
ffe7f95b LL |
39 | static int rx51_keymap[] = { |
40 | KEY(0, 0, KEY_Q), | |
41 | KEY(0, 1, KEY_W), | |
42 | KEY(0, 2, KEY_E), | |
43 | KEY(0, 3, KEY_R), | |
44 | KEY(0, 4, KEY_T), | |
45 | KEY(0, 5, KEY_Y), | |
46 | KEY(0, 6, KEY_U), | |
47 | KEY(0, 7, KEY_I), | |
48 | KEY(1, 0, KEY_O), | |
49 | KEY(1, 1, KEY_D), | |
50 | KEY(1, 2, KEY_DOT), | |
51 | KEY(1, 3, KEY_V), | |
52 | KEY(1, 4, KEY_DOWN), | |
53 | KEY(2, 0, KEY_P), | |
54 | KEY(2, 1, KEY_F), | |
55 | KEY(2, 2, KEY_UP), | |
56 | KEY(2, 3, KEY_B), | |
57 | KEY(2, 4, KEY_RIGHT), | |
58 | KEY(3, 0, KEY_COMMA), | |
59 | KEY(3, 1, KEY_G), | |
60 | KEY(3, 2, KEY_ENTER), | |
61 | KEY(3, 3, KEY_N), | |
62 | KEY(4, 0, KEY_BACKSPACE), | |
63 | KEY(4, 1, KEY_H), | |
64 | KEY(4, 3, KEY_M), | |
65 | KEY(4, 4, KEY_LEFTCTRL), | |
66 | KEY(5, 1, KEY_J), | |
67 | KEY(5, 2, KEY_Z), | |
68 | KEY(5, 3, KEY_SPACE), | |
69 | KEY(5, 4, KEY_LEFTSHIFT), | |
70 | KEY(6, 0, KEY_A), | |
71 | KEY(6, 1, KEY_K), | |
72 | KEY(6, 2, KEY_X), | |
73 | KEY(6, 3, KEY_SPACE), | |
74 | KEY(6, 4, KEY_FN), | |
75 | KEY(7, 0, KEY_S), | |
76 | KEY(7, 1, KEY_L), | |
77 | KEY(7, 2, KEY_C), | |
78 | KEY(7, 3, KEY_LEFT), | |
79 | KEY(0xff, 0, KEY_F6), | |
80 | KEY(0xff, 1, KEY_F7), | |
81 | KEY(0xff, 2, KEY_F8), | |
82 | KEY(0xff, 4, KEY_F9), | |
83 | KEY(0xff, 5, KEY_F10), | |
84 | }; | |
85 | ||
86 | static struct twl4030_keypad_data rx51_kp_data = { | |
87 | .rows = 8, | |
88 | .cols = 8, | |
89 | .keymap = rx51_keymap, | |
90 | .keymapsize = ARRAY_SIZE(rx51_keymap), | |
91 | .rep = 1, | |
92 | }; | |
93 | ||
ffe7f95b LL |
94 | static struct twl4030_madc_platform_data rx51_madc_data = { |
95 | .irq_line = 1, | |
96 | }; | |
97 | ||
98 | static struct twl4030_hsmmc_info mmc[] = { | |
99 | { | |
100 | .name = "external", | |
101 | .mmc = 1, | |
102 | .wires = 4, | |
103 | .cover_only = true, | |
104 | .gpio_cd = 160, | |
105 | .gpio_wp = -EINVAL, | |
5e763d29 | 106 | .power_saving = true, |
ffe7f95b LL |
107 | }, |
108 | { | |
109 | .name = "internal", | |
110 | .mmc = 2, | |
111 | .wires = 8, | |
112 | .gpio_cd = -EINVAL, | |
113 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
114 | .nonremovable = true, |
115 | .power_saving = true, | |
ffe7f95b LL |
116 | }, |
117 | {} /* Terminator */ | |
118 | }; | |
119 | ||
120 | static struct regulator_consumer_supply rx51_vmmc1_supply = { | |
121 | .supply = "vmmc", | |
122 | }; | |
123 | ||
124 | static struct regulator_consumer_supply rx51_vmmc2_supply = { | |
125 | .supply = "vmmc", | |
126 | }; | |
127 | ||
128 | static struct regulator_consumer_supply rx51_vsim_supply = { | |
129 | .supply = "vmmc_aux", | |
130 | }; | |
131 | ||
132 | static struct regulator_init_data rx51_vaux1 = { | |
133 | .constraints = { | |
134 | .name = "V28", | |
135 | .min_uV = 2800000, | |
136 | .max_uV = 2800000, | |
137 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
138 | | REGULATOR_MODE_STANDBY, | |
139 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
140 | | REGULATOR_CHANGE_STATUS, | |
141 | }, | |
142 | }; | |
143 | ||
144 | static struct regulator_init_data rx51_vaux2 = { | |
145 | .constraints = { | |
146 | .name = "VCSI", | |
147 | .min_uV = 1800000, | |
148 | .max_uV = 1800000, | |
149 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
150 | | REGULATOR_MODE_STANDBY, | |
151 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
152 | | REGULATOR_CHANGE_STATUS, | |
153 | }, | |
154 | }; | |
155 | ||
156 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 157 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
158 | .constraints = { |
159 | .name = "VCAM_DIG_18", | |
160 | .min_uV = 1800000, | |
161 | .max_uV = 1800000, | |
162 | .apply_uV = true, | |
163 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
164 | | REGULATOR_MODE_STANDBY, | |
165 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
166 | | REGULATOR_CHANGE_STATUS, | |
167 | }, | |
168 | }; | |
169 | ||
f52eeee8 AH |
170 | static struct regulator_init_data rx51_vaux3_mmc = { |
171 | .constraints = { | |
172 | .name = "VMMC2_30", | |
173 | .min_uV = 2800000, | |
174 | .max_uV = 3000000, | |
175 | .apply_uV = true, | |
176 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
177 | | REGULATOR_MODE_STANDBY, | |
178 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
179 | | REGULATOR_CHANGE_MODE | |
180 | | REGULATOR_CHANGE_STATUS, | |
181 | }, | |
182 | .num_consumer_supplies = 1, | |
183 | .consumer_supplies = &rx51_vmmc2_supply, | |
184 | }; | |
185 | ||
ffe7f95b LL |
186 | static struct regulator_init_data rx51_vaux4 = { |
187 | .constraints = { | |
188 | .name = "VCAM_ANA_28", | |
189 | .min_uV = 2800000, | |
190 | .max_uV = 2800000, | |
191 | .apply_uV = true, | |
192 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
193 | | REGULATOR_MODE_STANDBY, | |
194 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
195 | | REGULATOR_CHANGE_STATUS, | |
196 | }, | |
197 | }; | |
198 | ||
199 | static struct regulator_init_data rx51_vmmc1 = { | |
200 | .constraints = { | |
201 | .min_uV = 1850000, | |
202 | .max_uV = 3150000, | |
203 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
204 | | REGULATOR_MODE_STANDBY, | |
205 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
206 | | REGULATOR_CHANGE_MODE | |
207 | | REGULATOR_CHANGE_STATUS, | |
208 | }, | |
209 | .num_consumer_supplies = 1, | |
210 | .consumer_supplies = &rx51_vmmc1_supply, | |
211 | }; | |
212 | ||
213 | static struct regulator_init_data rx51_vmmc2 = { | |
214 | .constraints = { | |
215 | .name = "VMMC2_30", | |
216 | .min_uV = 1850000, | |
217 | .max_uV = 3150000, | |
218 | .apply_uV = true, | |
219 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
220 | | REGULATOR_MODE_STANDBY, | |
221 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
222 | | REGULATOR_CHANGE_MODE | |
223 | | REGULATOR_CHANGE_STATUS, | |
224 | }, | |
225 | .num_consumer_supplies = 1, | |
226 | .consumer_supplies = &rx51_vmmc2_supply, | |
227 | }; | |
228 | ||
229 | static struct regulator_init_data rx51_vsim = { | |
230 | .constraints = { | |
231 | .name = "VMMC2_IO_18", | |
232 | .min_uV = 1800000, | |
233 | .max_uV = 1800000, | |
234 | .apply_uV = true, | |
235 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
236 | | REGULATOR_MODE_STANDBY, | |
237 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
238 | | REGULATOR_CHANGE_STATUS, | |
239 | }, | |
240 | .num_consumer_supplies = 1, | |
241 | .consumer_supplies = &rx51_vsim_supply, | |
242 | }; | |
243 | ||
244 | static struct regulator_init_data rx51_vdac = { | |
245 | .constraints = { | |
246 | .min_uV = 1800000, | |
247 | .max_uV = 1800000, | |
248 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
249 | | REGULATOR_MODE_STANDBY, | |
250 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
251 | | REGULATOR_CHANGE_MODE | |
252 | | REGULATOR_CHANGE_STATUS, | |
253 | }, | |
254 | }; | |
255 | ||
256 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) | |
257 | { | |
258 | /* FIXME this gpio setup is just a placeholder for now */ | |
259 | gpio_request(gpio + 6, "backlight_pwm"); | |
260 | gpio_direction_output(gpio + 6, 0); | |
261 | gpio_request(gpio + 7, "speaker_en"); | |
262 | gpio_direction_output(gpio + 7, 1); | |
263 | ||
264 | /* set up MMC adapters, linking their regulators to them */ | |
265 | twl4030_mmc_init(mmc); | |
266 | rx51_vmmc1_supply.dev = mmc[0].dev; | |
267 | rx51_vmmc2_supply.dev = mmc[1].dev; | |
268 | rx51_vsim_supply.dev = mmc[1].dev; | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
273 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
274 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
275 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
276 | .irq_end = TWL4030_GPIO_IRQ_END, | |
277 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
278 | | BIT(4) | BIT(5) | |
279 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
280 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
281 | | BIT(16) | BIT(17) , | |
282 | .setup = rx51_twlgpio_setup, | |
283 | }; | |
284 | ||
dfc27b34 RQ |
285 | static struct twl4030_usb_data rx51_usb_data = { |
286 | .usb_mode = T2_USB_MODE_ULPI, | |
287 | }; | |
288 | ||
9312fffb AK |
289 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
290 | /* | |
291 | * Turn off VDD1 and VDD2. | |
292 | */ | |
293 | {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4}, | |
294 | {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2}, | |
295 | /* | |
296 | * And also turn off the OMAP3 PLLs and the sysclk output. | |
297 | */ | |
298 | {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3}, | |
299 | {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_OFF), 3}, | |
300 | }; | |
301 | ||
302 | static struct twl4030_script sleep_on_script __initdata = { | |
303 | .script = sleep_on_seq, | |
304 | .size = ARRAY_SIZE(sleep_on_seq), | |
305 | .flags = TWL4030_SLEEP_SCRIPT, | |
306 | }; | |
307 | ||
308 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
309 | /* | |
310 | * Reenable the OMAP3 PLLs. | |
311 | * Wakeup VDD1 and VDD2. | |
312 | * Reenable sysclk output. | |
313 | */ | |
314 | {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30}, | |
315 | {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30}, | |
316 | {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37}, | |
317 | {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3}, | |
318 | }; | |
319 | ||
320 | static struct twl4030_script wakeup_script __initdata = { | |
321 | .script = wakeup_seq, | |
322 | .size = ARRAY_SIZE(wakeup_seq), | |
323 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
324 | }; | |
325 | ||
326 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
327 | /* | |
328 | * Wakeup VDD1 (dummy to be able to insert a delay) | |
329 | * Enable CLKEN | |
330 | */ | |
331 | {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_ACTIVE), 3}, | |
332 | }; | |
333 | ||
334 | static struct twl4030_script wakeup_p3_script __initdata = { | |
335 | .script = wakeup_p3_seq, | |
336 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
337 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
338 | }; | |
339 | ||
340 | static struct twl4030_ins wrst_seq[] __initdata = { | |
341 | /* | |
342 | * Reset twl4030. | |
343 | * Reset VDD1 regulator. | |
344 | * Reset VDD2 regulator. | |
345 | * Reset VPLL1 regulator. | |
346 | * Enable sysclk output. | |
347 | * Reenable twl4030. | |
348 | */ | |
349 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
350 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
351 | 0x13}, | |
352 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 2, RES_STATE_WRST), 0x13}, | |
353 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, | |
354 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
355 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
356 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
357 | {MSG_SINGULAR(DEV_GRP_P1, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, | |
358 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, | |
359 | }; | |
360 | ||
361 | static struct twl4030_script wrst_script __initdata = { | |
362 | .script = wrst_seq, | |
363 | .size = ARRAY_SIZE(wrst_seq), | |
364 | .flags = TWL4030_WRST_SCRIPT, | |
365 | }; | |
366 | ||
367 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
368 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
369 | board might hit retention before loading of wakeup script is | |
370 | completed. This can cause boot failures depending on timing issues. | |
371 | */ | |
372 | &wakeup_script, | |
373 | &sleep_on_script, | |
374 | &wakeup_p3_script, | |
375 | &wrst_script, | |
376 | }; | |
377 | ||
378 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
379 | { .resource = RES_VINTANA1, .devgroup = -1, .type = -1, .type2 = 1 }, | |
380 | { .resource = RES_VINTANA2, .devgroup = -1, .type = -1, .type2 = 1 }, | |
381 | { .resource = RES_VINTDIG, .devgroup = -1, .type = -1, .type2 = 1 }, | |
382 | { .resource = RES_VMMC1, .devgroup = -1, .type = -1, .type2 = 3}, | |
383 | { .resource = RES_VMMC2, .devgroup = DEV_GRP_NULL, .type = -1, | |
384 | .type2 = 3}, | |
385 | { .resource = RES_VAUX1, .devgroup = -1, .type = -1, .type2 = 3}, | |
386 | { .resource = RES_VAUX2, .devgroup = -1, .type = -1, .type2 = 3}, | |
387 | { .resource = RES_VAUX3, .devgroup = -1, .type = -1, .type2 = 3}, | |
388 | { .resource = RES_VAUX4, .devgroup = -1, .type = -1, .type2 = 3}, | |
389 | { .resource = RES_VPLL2, .devgroup = -1, .type = -1, .type2 = 3}, | |
390 | { .resource = RES_VDAC, .devgroup = -1, .type = -1, .type2 = 3}, | |
391 | { .resource = RES_VSIM, .devgroup = DEV_GRP_NULL, .type = -1, | |
392 | .type2 = 3}, | |
393 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P3, .type = -1, | |
394 | .type2 = 1 }, | |
395 | { 0, 0}, | |
396 | }; | |
397 | ||
398 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
399 | .scripts = twl4030_scripts, | |
400 | .num = ARRAY_SIZE(twl4030_scripts), | |
401 | .resource_config = twl4030_rconfig, | |
402 | }; | |
403 | ||
404 | ||
405 | ||
406 | static struct twl4030_platform_data rx51_twldata __initdata = { | |
ffe7f95b LL |
407 | .irq_base = TWL4030_IRQ_BASE, |
408 | .irq_end = TWL4030_IRQ_END, | |
409 | ||
410 | /* platform_data for children goes here */ | |
411 | .gpio = &rx51_gpio_data, | |
412 | .keypad = &rx51_kp_data, | |
413 | .madc = &rx51_madc_data, | |
dfc27b34 | 414 | .usb = &rx51_usb_data, |
9312fffb | 415 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
416 | |
417 | .vaux1 = &rx51_vaux1, | |
418 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
419 | .vaux4 = &rx51_vaux4, |
420 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
421 | .vsim = &rx51_vsim, |
422 | .vdac = &rx51_vdac, | |
423 | }; | |
424 | ||
425 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { | |
426 | { | |
427 | I2C_BOARD_INFO("twl5030", 0x48), | |
428 | .flags = I2C_CLIENT_WAKE, | |
429 | .irq = INT_34XX_SYS_NIRQ, | |
430 | .platform_data = &rx51_twldata, | |
431 | }, | |
432 | }; | |
433 | ||
434 | static int __init rx51_i2c_init(void) | |
435 | { | |
f52eeee8 AH |
436 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
437 | system_rev >= SYSTEM_REV_B_USES_VAUX3) | |
438 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; | |
439 | else { | |
440 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | |
441 | rx51_twldata.vmmc2 = &rx51_vmmc2; | |
442 | } | |
ffe7f95b LL |
443 | omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, |
444 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); | |
445 | omap_register_i2c_bus(2, 100, NULL, 0); | |
446 | omap_register_i2c_bus(3, 400, NULL, 0); | |
447 | return 0; | |
448 | } | |
449 | ||
aa62e90f JY |
450 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
451 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
452 | ||
453 | static struct mtd_partition onenand_partitions[] = { | |
454 | { | |
455 | .name = "bootloader", | |
456 | .offset = 0, | |
457 | .size = 0x20000, | |
458 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
459 | }, | |
460 | { | |
461 | .name = "config", | |
462 | .offset = MTDPART_OFS_APPEND, | |
463 | .size = 0x60000, | |
464 | }, | |
465 | { | |
466 | .name = "log", | |
467 | .offset = MTDPART_OFS_APPEND, | |
468 | .size = 0x40000, | |
469 | }, | |
470 | { | |
471 | .name = "kernel", | |
472 | .offset = MTDPART_OFS_APPEND, | |
473 | .size = 0x200000, | |
474 | }, | |
475 | { | |
476 | .name = "initfs", | |
477 | .offset = MTDPART_OFS_APPEND, | |
478 | .size = 0x200000, | |
479 | }, | |
480 | { | |
481 | .name = "rootfs", | |
482 | .offset = MTDPART_OFS_APPEND, | |
483 | .size = MTDPART_SIZ_FULL, | |
484 | }, | |
485 | }; | |
486 | ||
487 | static struct omap_onenand_platform_data board_onenand_data = { | |
488 | .cs = 0, | |
489 | .gpio_irq = 65, | |
490 | .parts = onenand_partitions, | |
491 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
c8e6488f | 492 | .flags = ONENAND_SYNC_READWRITE, |
aa62e90f JY |
493 | }; |
494 | ||
495 | static void __init board_onenand_init(void) | |
496 | { | |
497 | gpmc_onenand_init(&board_onenand_data); | |
498 | } | |
499 | ||
500 | #else | |
501 | ||
502 | static inline void board_onenand_init(void) | |
503 | { | |
504 | } | |
505 | ||
506 | #endif | |
ffe7f95b | 507 | |
1a48e157 TL |
508 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
509 | ||
510 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
511 | .cs = 1, | |
512 | .gpio_irq = 54, | |
513 | .gpio_pwrdwn = 86, | |
514 | .gpio_reset = 164, | |
515 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
516 | }; | |
517 | ||
518 | static void __init board_smc91x_init(void) | |
519 | { | |
520 | omap_cfg_reg(U8_34XX_GPIO54_DOWN); | |
521 | omap_cfg_reg(G25_34XX_GPIO86_OUT); | |
522 | omap_cfg_reg(H19_34XX_GPIO164_OUT); | |
523 | ||
524 | gpmc_smc91x_init(&board_smc91x_data); | |
525 | } | |
526 | ||
527 | #else | |
528 | ||
529 | static inline void board_smc91x_init(void) | |
530 | { | |
531 | } | |
532 | ||
533 | #endif | |
534 | ||
ffe7f95b LL |
535 | void __init rx51_peripherals_init(void) |
536 | { | |
ffe7f95b | 537 | rx51_i2c_init(); |
aa62e90f | 538 | board_onenand_init(); |
1a48e157 | 539 | board_smc91x_init(); |
ffe7f95b LL |
540 | } |
541 |