include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-2.6-block.git] / arch / arm / mach-mx3 / mach-mx31moboard.c
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1/*
2 * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
b23f1534 19#include <linux/delay.h>
04ea3c80 20#include <linux/dma-mapping.h>
88b05647 21#include <linux/fsl_devices.h>
5a0e3ad6 22#include <linux/gfp.h>
45b131a7 23#include <linux/gpio.h>
988d2d49 24#include <linux/init.h>
45b131a7 25#include <linux/interrupt.h>
77aa561d 26#include <linux/leds.h>
220bbcea 27#include <linux/memory.h>
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28#include <linux/mtd/physmap.h>
29#include <linux/mtd/partitions.h>
220bbcea 30#include <linux/platform_device.h>
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31#include <linux/regulator/machine.h>
32#include <linux/mfd/mc13783.h>
33#include <linux/spi/spi.h>
220bbcea 34#include <linux/types.h>
988d2d49 35
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36#include <linux/usb/otg.h>
37#include <linux/usb/ulpi.h>
38
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39#include <asm/mach-types.h>
40#include <asm/mach/arch.h>
41#include <asm/mach/time.h>
42#include <asm/mach/map.h>
220bbcea 43#include <mach/board-mx31moboard.h>
988d2d49 44#include <mach/common.h>
220bbcea 45#include <mach/hardware.h>
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46#include <mach/imx-uart.h>
47#include <mach/iomux-mx3.h>
4dd71293 48#include <mach/ipu.h>
4ec6ecc7 49#include <mach/i2c.h>
45b131a7 50#include <mach/mmc.h>
d67d1075 51#include <mach/mxc_ehci.h>
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52#include <mach/mx3_camera.h>
53#include <mach/spi.h>
d67d1075 54#include <mach/ulpi.h>
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55
56#include "devices.h"
57
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58static unsigned int moboard_pins[] = {
59 /* UART0 */
220bbcea 60 MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
421bf82e 61 MX31_PIN_CTS1__GPIO2_7,
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62 /* UART4 */
63 MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5,
64 MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5,
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65 /* I2C0 */
66 MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL,
67 /* I2C1 */
68 MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL,
69 /* SDHC1 */
70 MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2,
71 MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0,
72 MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD,
73 MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27,
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74 /* USB reset */
75 MX31_PIN_GPIO1_0__GPIO1_0,
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76 /* USB OTG */
77 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
78 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
79 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
80 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
81 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
82 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
83 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
84 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
85 MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
86 MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
87 MX31_PIN_USB_OC__GPIO1_30,
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88 /* USB H2 */
89 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
90 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
91 MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3,
92 MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5,
93 MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7,
94 MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR,
95 MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP,
96 MX31_PIN_SCK6__GPIO1_25,
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97 /* LEDs */
98 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
99 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
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100 /* SPI1 */
101 MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
102 MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
103 MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2,
104 /* Atlas IRQ */
105 MX31_PIN_GPIO1_3__GPIO1_3,
106 /* SPI2 */
107 MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO,
108 MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY,
109 MX31_PIN_CSPI2_SS1__CSPI3_SS1,
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110};
111
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112static struct physmap_flash_data mx31moboard_flash_data = {
113 .width = 2,
114};
115
116static struct resource mx31moboard_flash_resource = {
117 .start = 0xa0000000,
118 .end = 0xa1ffffff,
119 .flags = IORESOURCE_MEM,
120};
121
122static struct platform_device mx31moboard_flash = {
123 .name = "physmap-flash",
124 .id = 0,
125 .dev = {
126 .platform_data = &mx31moboard_flash_data,
127 },
128 .resource = &mx31moboard_flash_resource,
129 .num_resources = 1,
130};
131
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132static int moboard_uart0_init(struct platform_device *pdev)
133{
134 gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack");
135 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0);
136 return 0;
137}
138
139static struct imxuart_platform_data uart0_pdata = {
140 .init = moboard_uart0_init,
141};
142
143static struct imxuart_platform_data uart4_pdata = {
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144 .flags = IMXUART_HAVE_RTSCTS,
145};
146
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147static struct imxi2c_platform_data moboard_i2c0_pdata = {
148 .bitrate = 400000,
149};
150
151static struct imxi2c_platform_data moboard_i2c1_pdata = {
152 .bitrate = 100000,
153};
154
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155static int moboard_spi1_cs[] = {
156 MXC_SPI_CS(0),
157 MXC_SPI_CS(2),
158};
159
160static struct spi_imx_master moboard_spi1_master = {
161 .chipselect = moboard_spi1_cs,
162 .num_chipselect = ARRAY_SIZE(moboard_spi1_cs),
163};
164
165static struct regulator_consumer_supply sdhc_consumers[] = {
166 {
167 .dev = &mxcsdhc_device0.dev,
168 .supply = "sdhc0_vcc",
169 },
170 {
171 .dev = &mxcsdhc_device1.dev,
172 .supply = "sdhc1_vcc",
173 },
174};
175
176static struct regulator_init_data sdhc_vreg_data = {
177 .constraints = {
178 .min_uV = 2700000,
179 .max_uV = 3000000,
180 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
181 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
182 .valid_modes_mask = REGULATOR_MODE_NORMAL |
183 REGULATOR_MODE_FAST,
184 .always_on = 0,
185 .boot_on = 1,
186 },
187 .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers),
188 .consumer_supplies = sdhc_consumers,
189};
190
191static struct regulator_consumer_supply cam_consumers[] = {
192 {
193 .dev = &mx3_camera.dev,
194 .supply = "cam_vcc",
195 },
196};
197
198static struct regulator_init_data cam_vreg_data = {
199 .constraints = {
200 .min_uV = 2700000,
201 .max_uV = 3000000,
202 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
203 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
204 .valid_modes_mask = REGULATOR_MODE_NORMAL |
205 REGULATOR_MODE_FAST,
206 .always_on = 0,
207 .boot_on = 1,
208 },
209 .num_consumer_supplies = ARRAY_SIZE(cam_consumers),
210 .consumer_supplies = cam_consumers,
211};
212
213static struct mc13783_regulator_init_data moboard_regulators[] = {
214 {
215 .id = MC13783_REGU_VMMC1,
216 .init_data = &sdhc_vreg_data,
217 },
218 {
219 .id = MC13783_REGU_VCAM,
220 .init_data = &cam_vreg_data,
221 },
222};
223
224static struct mc13783_platform_data moboard_pmic = {
225 .regulators = moboard_regulators,
226 .num_regulators = ARRAY_SIZE(moboard_regulators),
fedea672 227 .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC |
33c4d919 228 MC13783_USE_ADC,
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229};
230
231static struct spi_board_info moboard_spi_board_info[] __initdata = {
232 {
233 .modalias = "mc13783",
234 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
235 .max_speed_hz = 300000,
236 .bus_num = 1,
237 .chip_select = 0,
238 .platform_data = &moboard_pmic,
239 .mode = SPI_CS_HIGH,
240 },
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241};
242
243static int moboard_spi2_cs[] = {
244 MXC_SPI_CS(1),
245};
246
247static struct spi_imx_master moboard_spi2_master = {
248 .chipselect = moboard_spi2_cs,
249 .num_chipselect = ARRAY_SIZE(moboard_spi2_cs),
250};
251
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252#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
253#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1)
254
255static int moboard_sdhc1_get_ro(struct device *dev)
256{
563abb4b 257 return !gpio_get_value(SDHC1_WP);
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258}
259
260static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
261 void *data)
262{
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263 int ret;
264
265 ret = gpio_request(SDHC1_CD, "sdhc-detect");
266 if (ret)
267 return ret;
268
269 gpio_direction_input(SDHC1_CD);
270
271 ret = gpio_request(SDHC1_WP, "sdhc-wp");
272 if (ret)
273 goto err_gpio_free;
274 gpio_direction_input(SDHC1_WP);
275
276 ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq,
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277 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
278 "sdhc1-card-detect", data);
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279 if (ret)
280 goto err_gpio_free_2;
281
282 return 0;
283
284err_gpio_free_2:
285 gpio_free(SDHC1_WP);
286err_gpio_free:
287 gpio_free(SDHC1_CD);
288
289 return ret;
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290}
291
292static void moboard_sdhc1_exit(struct device *dev, void *data)
293{
294 free_irq(gpio_to_irq(SDHC1_CD), data);
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295 gpio_free(SDHC1_WP);
296 gpio_free(SDHC1_CD);
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297}
298
299static struct imxmmc_platform_data sdhc1_pdata = {
300 .get_ro = moboard_sdhc1_get_ro,
301 .init = moboard_sdhc1_init,
302 .exit = moboard_sdhc1_exit,
303};
304
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305/*
306 * this pin is dedicated for all mx31moboard systems, so we do it here
307 */
308#define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)
309
310static void usb_xcvr_reset(void)
311{
312 gpio_request(USB_RESET_B, "usb-reset");
313 gpio_direction_output(USB_RESET_B, 0);
314 mdelay(1);
315 gpio_set_value(USB_RESET_B, 1);
316}
317
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318#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
319 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
320
321#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
322
323static void moboard_usbotg_init(void)
324{
325 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
326 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
327 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
328 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
329 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
330 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
331 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
332 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
333 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
334 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
335 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
336 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
337
338 gpio_request(OTG_EN_B, "usb-udc-en");
339 gpio_direction_output(OTG_EN_B, 0);
340}
341
342static struct fsl_usb2_platform_data usb_pdata = {
343 .operating_mode = FSL_USB2_DR_DEVICE,
344 .phy_mode = FSL_USB2_PHY_ULPI,
345};
346
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347#if defined(CONFIG_USB_ULPI)
348
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349#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
350
351static int moboard_usbh2_hw_init(struct platform_device *pdev)
352{
cda82f85 353 int ret;
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354
355 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
356
357 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
358 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
359 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
360 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
361 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
362 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
363 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
364 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
365 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
366 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
367 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
368 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
369
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370 ret = gpio_request(USBH2_EN_B, "usbh2-en");
371 if (ret)
372 return ret;
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373 gpio_direction_output(USBH2_EN_B, 0);
374
375 return 0;
376}
377
378static int moboard_usbh2_hw_exit(struct platform_device *pdev)
379{
380 gpio_free(USBH2_EN_B);
381 return 0;
382}
383
384static struct mxc_usbh_platform_data usbh2_pdata = {
385 .init = moboard_usbh2_hw_init,
386 .exit = moboard_usbh2_hw_exit,
387 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
388 .flags = MXC_EHCI_POWER_PINS_ENABLED,
389};
390
391static int __init moboard_usbh2_init(void)
392{
393 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
394 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
395
4c21186b 396 return mxc_register_device(&mxc_usbh2, &usbh2_pdata);
d67d1075 397}
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398#else
399static inline int moboard_usbh2_init(void) { return 0; }
400#endif
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401
402
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403static struct gpio_led mx31moboard_leds[] = {
404 {
405 .name = "coreboard-led-0:red:running",
406 .default_trigger = "heartbeat",
407 .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
408 }, {
409 .name = "coreboard-led-1:red",
410 .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0),
411 }, {
412 .name = "coreboard-led-2:red",
413 .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0),
414 }, {
415 .name = "coreboard-led-3:red",
416 .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0),
417 },
418};
419
420static struct gpio_led_platform_data mx31moboard_led_pdata = {
421 .num_leds = ARRAY_SIZE(mx31moboard_leds),
422 .leds = mx31moboard_leds,
423};
424
425static struct platform_device mx31moboard_leds_device = {
426 .name = "leds-gpio",
427 .id = -1,
428 .dev = {
429 .platform_data = &mx31moboard_led_pdata,
430 },
431};
432
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433static struct ipu_platform_data mx3_ipu_data = {
434 .irq_base = MXC_IPU_IRQ_START,
435};
436
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437static struct platform_device *devices[] __initdata = {
438 &mx31moboard_flash,
77aa561d 439 &mx31moboard_leds_device,
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440};
441
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442static struct mx3_camera_pdata camera_pdata = {
443 .dma_dev = &mx3_ipu.dev,
444 .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
445 .mclk_10khz = 4800,
446};
447
448#define CAMERA_BUF_SIZE (4*1024*1024)
449
450static int __init mx31moboard_cam_alloc_dma(const size_t buf_size)
451{
452 dma_addr_t dma_handle;
453 void *buf;
454 int dma;
455
456 if (buf_size < 2 * 1024 * 1024)
457 return -EINVAL;
458
459 buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
460 if (!buf) {
461 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
462 return -ENOMEM;
463 }
464
465 memset(buf, 0, buf_size);
466
467 dma = dma_declare_coherent_memory(&mx3_camera.dev,
468 dma_handle, dma_handle, buf_size,
469 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
470
471 /* The way we call dma_declare_coherent_memory only a malloc can fail */
472 return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
473}
474
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475static int mx31moboard_baseboard;
476core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
477
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478/*
479 * Board specific initialization.
480 */
481static void __init mxc_board_init(void)
482{
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483 mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins),
484 "moboard");
485
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486 platform_add_devices(devices, ARRAY_SIZE(devices));
487
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488 mxc_register_device(&mxc_uart_device0, &uart0_pdata);
489
490 mxc_register_device(&mxc_uart_device4, &uart4_pdata);
e00f0b4a 491
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492 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
493 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
494
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495 mxc_register_device(&mxc_spi_device1, &moboard_spi1_master);
496 mxc_register_device(&mxc_spi_device2, &moboard_spi2_master);
497
498 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
499 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
500 spi_register_board_info(moboard_spi_board_info,
501 ARRAY_SIZE(moboard_spi_board_info));
502
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503 mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata);
504
4dd71293 505 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
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506 if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE))
507 mxc_register_device(&mx3_camera, &camera_pdata);
4dd71293 508
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509 usb_xcvr_reset();
510
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511 moboard_usbotg_init();
512 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
d67d1075 513 moboard_usbh2_init();
88b05647 514
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515 switch (mx31moboard_baseboard) {
516 case MX31NOBOARD:
517 break;
518 case MX31DEVBOARD:
519 mx31moboard_devboard_init();
520 break;
521 case MX31MARXBOT:
522 mx31moboard_marxbot_init();
523 break;
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524 case MX31SMARTBOT:
525 mx31moboard_smartbot_init();
526 break;
e00f0b4a 527 default:
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528 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
529 mx31moboard_baseboard);
e00f0b4a 530 }
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531}
532
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533static void __init mx31moboard_timer_init(void)
534{
30c730f8 535 mx31_clocks_init(26000000);
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536}
537
538struct sys_timer mx31moboard_timer = {
539 .init = mx31moboard_timer_init,
540};
541
542MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
543 /* Maintainer: Valentin Longchamp, EPFL Mobots group */
f568dd7f 544 .phys_io = MX31_AIPS1_BASE_ADDR,
321ed164 545 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
34101237 546 .boot_params = MX3x_PHYS_OFFSET + 0x100,
cd4a05f9 547 .map_io = mx31_map_io,
c5aa0ad0 548 .init_irq = mx31_init_irq,
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549 .init_machine = mxc_board_init,
550 .timer = &mx31moboard_timer,
551MACHINE_END
552